mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MTS_DRAGONFLY_F411RE/core_cmFunc.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
110:165afa46840b 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /**************************************************************************//**
Kojto 101:7cff1c4259d7 2 * @file core_cmFunc.h
Kojto 101:7cff1c4259d7 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 110:165afa46840b 4 * @version V4.10
Kojto 110:165afa46840b 5 * @date 18. March 2015
Kojto 101:7cff1c4259d7 6 *
Kojto 101:7cff1c4259d7 7 * @note
Kojto 101:7cff1c4259d7 8 *
Kojto 101:7cff1c4259d7 9 ******************************************************************************/
Kojto 110:165afa46840b 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
Kojto 101:7cff1c4259d7 11
Kojto 101:7cff1c4259d7 12 All rights reserved.
Kojto 101:7cff1c4259d7 13 Redistribution and use in source and binary forms, with or without
Kojto 101:7cff1c4259d7 14 modification, are permitted provided that the following conditions are met:
Kojto 101:7cff1c4259d7 15 - Redistributions of source code must retain the above copyright
Kojto 101:7cff1c4259d7 16 notice, this list of conditions and the following disclaimer.
Kojto 101:7cff1c4259d7 17 - Redistributions in binary form must reproduce the above copyright
Kojto 101:7cff1c4259d7 18 notice, this list of conditions and the following disclaimer in the
Kojto 101:7cff1c4259d7 19 documentation and/or other materials provided with the distribution.
Kojto 101:7cff1c4259d7 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 101:7cff1c4259d7 21 to endorse or promote products derived from this software without
Kojto 101:7cff1c4259d7 22 specific prior written permission.
Kojto 101:7cff1c4259d7 23 *
Kojto 101:7cff1c4259d7 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 101:7cff1c4259d7 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 101:7cff1c4259d7 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 101:7cff1c4259d7 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 101:7cff1c4259d7 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 101:7cff1c4259d7 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 101:7cff1c4259d7 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 101:7cff1c4259d7 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 101:7cff1c4259d7 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 101:7cff1c4259d7 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 101:7cff1c4259d7 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 101:7cff1c4259d7 35 ---------------------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 36
Kojto 101:7cff1c4259d7 37
Kojto 101:7cff1c4259d7 38 #ifndef __CORE_CMFUNC_H
Kojto 101:7cff1c4259d7 39 #define __CORE_CMFUNC_H
Kojto 101:7cff1c4259d7 40
Kojto 101:7cff1c4259d7 41
Kojto 101:7cff1c4259d7 42 /* ########################### Core Function Access ########################### */
Kojto 101:7cff1c4259d7 43 /** \ingroup CMSIS_Core_FunctionInterface
Kojto 101:7cff1c4259d7 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Kojto 101:7cff1c4259d7 45 @{
Kojto 101:7cff1c4259d7 46 */
Kojto 101:7cff1c4259d7 47
Kojto 101:7cff1c4259d7 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Kojto 101:7cff1c4259d7 49 /* ARM armcc specific functions */
Kojto 101:7cff1c4259d7 50
Kojto 101:7cff1c4259d7 51 #if (__ARMCC_VERSION < 400677)
Kojto 101:7cff1c4259d7 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Kojto 101:7cff1c4259d7 53 #endif
Kojto 101:7cff1c4259d7 54
Kojto 101:7cff1c4259d7 55 /* intrinsic void __enable_irq(); */
Kojto 101:7cff1c4259d7 56 /* intrinsic void __disable_irq(); */
Kojto 101:7cff1c4259d7 57
Kojto 101:7cff1c4259d7 58 /** \brief Get Control Register
Kojto 101:7cff1c4259d7 59
Kojto 101:7cff1c4259d7 60 This function returns the content of the Control Register.
Kojto 101:7cff1c4259d7 61
Kojto 101:7cff1c4259d7 62 \return Control Register value
Kojto 101:7cff1c4259d7 63 */
Kojto 101:7cff1c4259d7 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 101:7cff1c4259d7 65 {
Kojto 101:7cff1c4259d7 66 register uint32_t __regControl __ASM("control");
Kojto 101:7cff1c4259d7 67 return(__regControl);
Kojto 101:7cff1c4259d7 68 }
Kojto 101:7cff1c4259d7 69
Kojto 101:7cff1c4259d7 70
Kojto 101:7cff1c4259d7 71 /** \brief Set Control Register
Kojto 101:7cff1c4259d7 72
Kojto 101:7cff1c4259d7 73 This function writes the given value to the Control Register.
Kojto 101:7cff1c4259d7 74
Kojto 101:7cff1c4259d7 75 \param [in] control Control Register value to set
Kojto 101:7cff1c4259d7 76 */
Kojto 101:7cff1c4259d7 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 101:7cff1c4259d7 78 {
Kojto 101:7cff1c4259d7 79 register uint32_t __regControl __ASM("control");
Kojto 101:7cff1c4259d7 80 __regControl = control;
Kojto 101:7cff1c4259d7 81 }
Kojto 101:7cff1c4259d7 82
Kojto 101:7cff1c4259d7 83
Kojto 101:7cff1c4259d7 84 /** \brief Get IPSR Register
Kojto 101:7cff1c4259d7 85
Kojto 101:7cff1c4259d7 86 This function returns the content of the IPSR Register.
Kojto 101:7cff1c4259d7 87
Kojto 101:7cff1c4259d7 88 \return IPSR Register value
Kojto 101:7cff1c4259d7 89 */
Kojto 101:7cff1c4259d7 90 __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 101:7cff1c4259d7 91 {
Kojto 101:7cff1c4259d7 92 register uint32_t __regIPSR __ASM("ipsr");
Kojto 101:7cff1c4259d7 93 return(__regIPSR);
Kojto 101:7cff1c4259d7 94 }
Kojto 101:7cff1c4259d7 95
Kojto 101:7cff1c4259d7 96
Kojto 101:7cff1c4259d7 97 /** \brief Get APSR Register
Kojto 101:7cff1c4259d7 98
Kojto 101:7cff1c4259d7 99 This function returns the content of the APSR Register.
Kojto 101:7cff1c4259d7 100
Kojto 101:7cff1c4259d7 101 \return APSR Register value
Kojto 101:7cff1c4259d7 102 */
Kojto 101:7cff1c4259d7 103 __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 101:7cff1c4259d7 104 {
Kojto 101:7cff1c4259d7 105 register uint32_t __regAPSR __ASM("apsr");
Kojto 101:7cff1c4259d7 106 return(__regAPSR);
Kojto 101:7cff1c4259d7 107 }
Kojto 101:7cff1c4259d7 108
Kojto 101:7cff1c4259d7 109
Kojto 101:7cff1c4259d7 110 /** \brief Get xPSR Register
Kojto 101:7cff1c4259d7 111
Kojto 101:7cff1c4259d7 112 This function returns the content of the xPSR Register.
Kojto 101:7cff1c4259d7 113
Kojto 101:7cff1c4259d7 114 \return xPSR Register value
Kojto 101:7cff1c4259d7 115 */
Kojto 101:7cff1c4259d7 116 __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 101:7cff1c4259d7 117 {
Kojto 101:7cff1c4259d7 118 register uint32_t __regXPSR __ASM("xpsr");
Kojto 101:7cff1c4259d7 119 return(__regXPSR);
Kojto 101:7cff1c4259d7 120 }
Kojto 101:7cff1c4259d7 121
Kojto 101:7cff1c4259d7 122
Kojto 101:7cff1c4259d7 123 /** \brief Get Process Stack Pointer
Kojto 101:7cff1c4259d7 124
Kojto 101:7cff1c4259d7 125 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 101:7cff1c4259d7 126
Kojto 101:7cff1c4259d7 127 \return PSP Register value
Kojto 101:7cff1c4259d7 128 */
Kojto 101:7cff1c4259d7 129 __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 101:7cff1c4259d7 130 {
Kojto 101:7cff1c4259d7 131 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 101:7cff1c4259d7 132 return(__regProcessStackPointer);
Kojto 101:7cff1c4259d7 133 }
Kojto 101:7cff1c4259d7 134
Kojto 101:7cff1c4259d7 135
Kojto 101:7cff1c4259d7 136 /** \brief Set Process Stack Pointer
Kojto 101:7cff1c4259d7 137
Kojto 101:7cff1c4259d7 138 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 101:7cff1c4259d7 139
Kojto 101:7cff1c4259d7 140 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 101:7cff1c4259d7 141 */
Kojto 101:7cff1c4259d7 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 101:7cff1c4259d7 143 {
Kojto 101:7cff1c4259d7 144 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 101:7cff1c4259d7 145 __regProcessStackPointer = topOfProcStack;
Kojto 101:7cff1c4259d7 146 }
Kojto 101:7cff1c4259d7 147
Kojto 101:7cff1c4259d7 148
Kojto 101:7cff1c4259d7 149 /** \brief Get Main Stack Pointer
Kojto 101:7cff1c4259d7 150
Kojto 101:7cff1c4259d7 151 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 101:7cff1c4259d7 152
Kojto 101:7cff1c4259d7 153 \return MSP Register value
Kojto 101:7cff1c4259d7 154 */
Kojto 101:7cff1c4259d7 155 __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 101:7cff1c4259d7 156 {
Kojto 101:7cff1c4259d7 157 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 101:7cff1c4259d7 158 return(__regMainStackPointer);
Kojto 101:7cff1c4259d7 159 }
Kojto 101:7cff1c4259d7 160
Kojto 101:7cff1c4259d7 161
Kojto 101:7cff1c4259d7 162 /** \brief Set Main Stack Pointer
Kojto 101:7cff1c4259d7 163
Kojto 101:7cff1c4259d7 164 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 101:7cff1c4259d7 165
Kojto 101:7cff1c4259d7 166 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 101:7cff1c4259d7 167 */
Kojto 101:7cff1c4259d7 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 101:7cff1c4259d7 169 {
Kojto 101:7cff1c4259d7 170 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 101:7cff1c4259d7 171 __regMainStackPointer = topOfMainStack;
Kojto 101:7cff1c4259d7 172 }
Kojto 101:7cff1c4259d7 173
Kojto 101:7cff1c4259d7 174
Kojto 101:7cff1c4259d7 175 /** \brief Get Priority Mask
Kojto 101:7cff1c4259d7 176
Kojto 101:7cff1c4259d7 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 101:7cff1c4259d7 178
Kojto 101:7cff1c4259d7 179 \return Priority Mask value
Kojto 101:7cff1c4259d7 180 */
Kojto 101:7cff1c4259d7 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 101:7cff1c4259d7 182 {
Kojto 101:7cff1c4259d7 183 register uint32_t __regPriMask __ASM("primask");
Kojto 101:7cff1c4259d7 184 return(__regPriMask);
Kojto 101:7cff1c4259d7 185 }
Kojto 101:7cff1c4259d7 186
Kojto 101:7cff1c4259d7 187
Kojto 101:7cff1c4259d7 188 /** \brief Set Priority Mask
Kojto 101:7cff1c4259d7 189
Kojto 101:7cff1c4259d7 190 This function assigns the given value to the Priority Mask Register.
Kojto 101:7cff1c4259d7 191
Kojto 101:7cff1c4259d7 192 \param [in] priMask Priority Mask
Kojto 101:7cff1c4259d7 193 */
Kojto 101:7cff1c4259d7 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 101:7cff1c4259d7 195 {
Kojto 101:7cff1c4259d7 196 register uint32_t __regPriMask __ASM("primask");
Kojto 101:7cff1c4259d7 197 __regPriMask = (priMask);
Kojto 101:7cff1c4259d7 198 }
Kojto 101:7cff1c4259d7 199
Kojto 101:7cff1c4259d7 200
Kojto 110:165afa46840b 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 101:7cff1c4259d7 202
Kojto 101:7cff1c4259d7 203 /** \brief Enable FIQ
Kojto 101:7cff1c4259d7 204
Kojto 101:7cff1c4259d7 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 101:7cff1c4259d7 206 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 207 */
Kojto 101:7cff1c4259d7 208 #define __enable_fault_irq __enable_fiq
Kojto 101:7cff1c4259d7 209
Kojto 101:7cff1c4259d7 210
Kojto 101:7cff1c4259d7 211 /** \brief Disable FIQ
Kojto 101:7cff1c4259d7 212
Kojto 101:7cff1c4259d7 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 101:7cff1c4259d7 214 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 215 */
Kojto 101:7cff1c4259d7 216 #define __disable_fault_irq __disable_fiq
Kojto 101:7cff1c4259d7 217
Kojto 101:7cff1c4259d7 218
Kojto 101:7cff1c4259d7 219 /** \brief Get Base Priority
Kojto 101:7cff1c4259d7 220
Kojto 101:7cff1c4259d7 221 This function returns the current value of the Base Priority register.
Kojto 101:7cff1c4259d7 222
Kojto 101:7cff1c4259d7 223 \return Base Priority register value
Kojto 101:7cff1c4259d7 224 */
Kojto 101:7cff1c4259d7 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 101:7cff1c4259d7 226 {
Kojto 101:7cff1c4259d7 227 register uint32_t __regBasePri __ASM("basepri");
Kojto 101:7cff1c4259d7 228 return(__regBasePri);
Kojto 101:7cff1c4259d7 229 }
Kojto 101:7cff1c4259d7 230
Kojto 101:7cff1c4259d7 231
Kojto 101:7cff1c4259d7 232 /** \brief Set Base Priority
Kojto 101:7cff1c4259d7 233
Kojto 101:7cff1c4259d7 234 This function assigns the given value to the Base Priority register.
Kojto 101:7cff1c4259d7 235
Kojto 101:7cff1c4259d7 236 \param [in] basePri Base Priority value to set
Kojto 101:7cff1c4259d7 237 */
Kojto 101:7cff1c4259d7 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
Kojto 101:7cff1c4259d7 239 {
Kojto 101:7cff1c4259d7 240 register uint32_t __regBasePri __ASM("basepri");
Kojto 101:7cff1c4259d7 241 __regBasePri = (basePri & 0xff);
Kojto 101:7cff1c4259d7 242 }
Kojto 101:7cff1c4259d7 243
Kojto 101:7cff1c4259d7 244
Kojto 110:165afa46840b 245 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 246
Kojto 110:165afa46840b 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 248 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 249
Kojto 110:165afa46840b 250 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 251 */
Kojto 110:165afa46840b 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 110:165afa46840b 253 {
Kojto 110:165afa46840b 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Kojto 110:165afa46840b 255 __regBasePriMax = (basePri & 0xff);
Kojto 110:165afa46840b 256 }
Kojto 110:165afa46840b 257
Kojto 110:165afa46840b 258
Kojto 101:7cff1c4259d7 259 /** \brief Get Fault Mask
Kojto 101:7cff1c4259d7 260
Kojto 101:7cff1c4259d7 261 This function returns the current value of the Fault Mask register.
Kojto 101:7cff1c4259d7 262
Kojto 101:7cff1c4259d7 263 \return Fault Mask register value
Kojto 101:7cff1c4259d7 264 */
Kojto 101:7cff1c4259d7 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 101:7cff1c4259d7 266 {
Kojto 101:7cff1c4259d7 267 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 101:7cff1c4259d7 268 return(__regFaultMask);
Kojto 101:7cff1c4259d7 269 }
Kojto 101:7cff1c4259d7 270
Kojto 101:7cff1c4259d7 271
Kojto 101:7cff1c4259d7 272 /** \brief Set Fault Mask
Kojto 101:7cff1c4259d7 273
Kojto 101:7cff1c4259d7 274 This function assigns the given value to the Fault Mask register.
Kojto 101:7cff1c4259d7 275
Kojto 101:7cff1c4259d7 276 \param [in] faultMask Fault Mask value to set
Kojto 101:7cff1c4259d7 277 */
Kojto 101:7cff1c4259d7 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 101:7cff1c4259d7 279 {
Kojto 101:7cff1c4259d7 280 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 101:7cff1c4259d7 281 __regFaultMask = (faultMask & (uint32_t)1);
Kojto 101:7cff1c4259d7 282 }
Kojto 101:7cff1c4259d7 283
Kojto 110:165afa46840b 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Kojto 101:7cff1c4259d7 285
Kojto 101:7cff1c4259d7 286
Kojto 110:165afa46840b 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Kojto 101:7cff1c4259d7 288
Kojto 101:7cff1c4259d7 289 /** \brief Get FPSCR
Kojto 101:7cff1c4259d7 290
Kojto 101:7cff1c4259d7 291 This function returns the current value of the Floating Point Status/Control register.
Kojto 101:7cff1c4259d7 292
Kojto 101:7cff1c4259d7 293 \return Floating Point Status/Control register value
Kojto 101:7cff1c4259d7 294 */
Kojto 101:7cff1c4259d7 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 101:7cff1c4259d7 296 {
Kojto 101:7cff1c4259d7 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 101:7cff1c4259d7 298 register uint32_t __regfpscr __ASM("fpscr");
Kojto 101:7cff1c4259d7 299 return(__regfpscr);
Kojto 101:7cff1c4259d7 300 #else
Kojto 101:7cff1c4259d7 301 return(0);
Kojto 101:7cff1c4259d7 302 #endif
Kojto 101:7cff1c4259d7 303 }
Kojto 101:7cff1c4259d7 304
Kojto 101:7cff1c4259d7 305
Kojto 101:7cff1c4259d7 306 /** \brief Set FPSCR
Kojto 101:7cff1c4259d7 307
Kojto 101:7cff1c4259d7 308 This function assigns the given value to the Floating Point Status/Control register.
Kojto 101:7cff1c4259d7 309
Kojto 101:7cff1c4259d7 310 \param [in] fpscr Floating Point Status/Control value to set
Kojto 101:7cff1c4259d7 311 */
Kojto 101:7cff1c4259d7 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 101:7cff1c4259d7 313 {
Kojto 101:7cff1c4259d7 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 101:7cff1c4259d7 315 register uint32_t __regfpscr __ASM("fpscr");
Kojto 101:7cff1c4259d7 316 __regfpscr = (fpscr);
Kojto 101:7cff1c4259d7 317 #endif
Kojto 101:7cff1c4259d7 318 }
Kojto 101:7cff1c4259d7 319
Kojto 110:165afa46840b 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 101:7cff1c4259d7 321
Kojto 101:7cff1c4259d7 322
Kojto 101:7cff1c4259d7 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Kojto 101:7cff1c4259d7 324 /* GNU gcc specific functions */
Kojto 101:7cff1c4259d7 325
Kojto 101:7cff1c4259d7 326 /** \brief Enable IRQ Interrupts
Kojto 101:7cff1c4259d7 327
Kojto 101:7cff1c4259d7 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Kojto 101:7cff1c4259d7 329 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 330 */
Kojto 101:7cff1c4259d7 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
Kojto 101:7cff1c4259d7 332 {
Kojto 101:7cff1c4259d7 333 __ASM volatile ("cpsie i" : : : "memory");
Kojto 101:7cff1c4259d7 334 }
Kojto 101:7cff1c4259d7 335
Kojto 101:7cff1c4259d7 336
Kojto 101:7cff1c4259d7 337 /** \brief Disable IRQ Interrupts
Kojto 101:7cff1c4259d7 338
Kojto 101:7cff1c4259d7 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
Kojto 101:7cff1c4259d7 340 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 341 */
Kojto 101:7cff1c4259d7 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
Kojto 101:7cff1c4259d7 343 {
Kojto 101:7cff1c4259d7 344 __ASM volatile ("cpsid i" : : : "memory");
Kojto 101:7cff1c4259d7 345 }
Kojto 101:7cff1c4259d7 346
Kojto 101:7cff1c4259d7 347
Kojto 101:7cff1c4259d7 348 /** \brief Get Control Register
Kojto 101:7cff1c4259d7 349
Kojto 101:7cff1c4259d7 350 This function returns the content of the Control Register.
Kojto 101:7cff1c4259d7 351
Kojto 101:7cff1c4259d7 352 \return Control Register value
Kojto 101:7cff1c4259d7 353 */
Kojto 101:7cff1c4259d7 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 101:7cff1c4259d7 355 {
Kojto 101:7cff1c4259d7 356 uint32_t result;
Kojto 101:7cff1c4259d7 357
Kojto 101:7cff1c4259d7 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
Kojto 101:7cff1c4259d7 359 return(result);
Kojto 101:7cff1c4259d7 360 }
Kojto 101:7cff1c4259d7 361
Kojto 101:7cff1c4259d7 362
Kojto 101:7cff1c4259d7 363 /** \brief Set Control Register
Kojto 101:7cff1c4259d7 364
Kojto 101:7cff1c4259d7 365 This function writes the given value to the Control Register.
Kojto 101:7cff1c4259d7 366
Kojto 101:7cff1c4259d7 367 \param [in] control Control Register value to set
Kojto 101:7cff1c4259d7 368 */
Kojto 101:7cff1c4259d7 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 101:7cff1c4259d7 370 {
Kojto 101:7cff1c4259d7 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
Kojto 101:7cff1c4259d7 372 }
Kojto 101:7cff1c4259d7 373
Kojto 101:7cff1c4259d7 374
Kojto 101:7cff1c4259d7 375 /** \brief Get IPSR Register
Kojto 101:7cff1c4259d7 376
Kojto 101:7cff1c4259d7 377 This function returns the content of the IPSR Register.
Kojto 101:7cff1c4259d7 378
Kojto 101:7cff1c4259d7 379 \return IPSR Register value
Kojto 101:7cff1c4259d7 380 */
Kojto 101:7cff1c4259d7 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 101:7cff1c4259d7 382 {
Kojto 101:7cff1c4259d7 383 uint32_t result;
Kojto 101:7cff1c4259d7 384
Kojto 101:7cff1c4259d7 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Kojto 101:7cff1c4259d7 386 return(result);
Kojto 101:7cff1c4259d7 387 }
Kojto 101:7cff1c4259d7 388
Kojto 101:7cff1c4259d7 389
Kojto 101:7cff1c4259d7 390 /** \brief Get APSR Register
Kojto 101:7cff1c4259d7 391
Kojto 101:7cff1c4259d7 392 This function returns the content of the APSR Register.
Kojto 101:7cff1c4259d7 393
Kojto 101:7cff1c4259d7 394 \return APSR Register value
Kojto 101:7cff1c4259d7 395 */
Kojto 101:7cff1c4259d7 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 101:7cff1c4259d7 397 {
Kojto 101:7cff1c4259d7 398 uint32_t result;
Kojto 101:7cff1c4259d7 399
Kojto 101:7cff1c4259d7 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Kojto 101:7cff1c4259d7 401 return(result);
Kojto 101:7cff1c4259d7 402 }
Kojto 101:7cff1c4259d7 403
Kojto 101:7cff1c4259d7 404
Kojto 101:7cff1c4259d7 405 /** \brief Get xPSR Register
Kojto 101:7cff1c4259d7 406
Kojto 101:7cff1c4259d7 407 This function returns the content of the xPSR Register.
Kojto 101:7cff1c4259d7 408
Kojto 101:7cff1c4259d7 409 \return xPSR Register value
Kojto 101:7cff1c4259d7 410 */
Kojto 101:7cff1c4259d7 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 101:7cff1c4259d7 412 {
Kojto 101:7cff1c4259d7 413 uint32_t result;
Kojto 101:7cff1c4259d7 414
Kojto 101:7cff1c4259d7 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Kojto 101:7cff1c4259d7 416 return(result);
Kojto 101:7cff1c4259d7 417 }
Kojto 101:7cff1c4259d7 418
Kojto 101:7cff1c4259d7 419
Kojto 101:7cff1c4259d7 420 /** \brief Get Process Stack Pointer
Kojto 101:7cff1c4259d7 421
Kojto 101:7cff1c4259d7 422 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 101:7cff1c4259d7 423
Kojto 101:7cff1c4259d7 424 \return PSP Register value
Kojto 101:7cff1c4259d7 425 */
Kojto 101:7cff1c4259d7 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 101:7cff1c4259d7 427 {
Kojto 101:7cff1c4259d7 428 register uint32_t result;
Kojto 101:7cff1c4259d7 429
Kojto 101:7cff1c4259d7 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
Kojto 101:7cff1c4259d7 431 return(result);
Kojto 101:7cff1c4259d7 432 }
Kojto 101:7cff1c4259d7 433
Kojto 101:7cff1c4259d7 434
Kojto 101:7cff1c4259d7 435 /** \brief Set Process Stack Pointer
Kojto 101:7cff1c4259d7 436
Kojto 101:7cff1c4259d7 437 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 101:7cff1c4259d7 438
Kojto 101:7cff1c4259d7 439 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 101:7cff1c4259d7 440 */
Kojto 101:7cff1c4259d7 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 101:7cff1c4259d7 442 {
Kojto 101:7cff1c4259d7 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
Kojto 101:7cff1c4259d7 444 }
Kojto 101:7cff1c4259d7 445
Kojto 101:7cff1c4259d7 446
Kojto 101:7cff1c4259d7 447 /** \brief Get Main Stack Pointer
Kojto 101:7cff1c4259d7 448
Kojto 101:7cff1c4259d7 449 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 101:7cff1c4259d7 450
Kojto 101:7cff1c4259d7 451 \return MSP Register value
Kojto 101:7cff1c4259d7 452 */
Kojto 101:7cff1c4259d7 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 101:7cff1c4259d7 454 {
Kojto 101:7cff1c4259d7 455 register uint32_t result;
Kojto 101:7cff1c4259d7 456
Kojto 101:7cff1c4259d7 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
Kojto 101:7cff1c4259d7 458 return(result);
Kojto 101:7cff1c4259d7 459 }
Kojto 101:7cff1c4259d7 460
Kojto 101:7cff1c4259d7 461
Kojto 101:7cff1c4259d7 462 /** \brief Set Main Stack Pointer
Kojto 101:7cff1c4259d7 463
Kojto 101:7cff1c4259d7 464 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 101:7cff1c4259d7 465
Kojto 101:7cff1c4259d7 466 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 101:7cff1c4259d7 467 */
Kojto 101:7cff1c4259d7 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 101:7cff1c4259d7 469 {
Kojto 101:7cff1c4259d7 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
Kojto 101:7cff1c4259d7 471 }
Kojto 101:7cff1c4259d7 472
Kojto 101:7cff1c4259d7 473
Kojto 101:7cff1c4259d7 474 /** \brief Get Priority Mask
Kojto 101:7cff1c4259d7 475
Kojto 101:7cff1c4259d7 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 101:7cff1c4259d7 477
Kojto 101:7cff1c4259d7 478 \return Priority Mask value
Kojto 101:7cff1c4259d7 479 */
Kojto 101:7cff1c4259d7 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 101:7cff1c4259d7 481 {
Kojto 101:7cff1c4259d7 482 uint32_t result;
Kojto 101:7cff1c4259d7 483
Kojto 101:7cff1c4259d7 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Kojto 101:7cff1c4259d7 485 return(result);
Kojto 101:7cff1c4259d7 486 }
Kojto 101:7cff1c4259d7 487
Kojto 101:7cff1c4259d7 488
Kojto 101:7cff1c4259d7 489 /** \brief Set Priority Mask
Kojto 101:7cff1c4259d7 490
Kojto 101:7cff1c4259d7 491 This function assigns the given value to the Priority Mask Register.
Kojto 101:7cff1c4259d7 492
Kojto 101:7cff1c4259d7 493 \param [in] priMask Priority Mask
Kojto 101:7cff1c4259d7 494 */
Kojto 101:7cff1c4259d7 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 101:7cff1c4259d7 496 {
Kojto 101:7cff1c4259d7 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
Kojto 101:7cff1c4259d7 498 }
Kojto 101:7cff1c4259d7 499
Kojto 101:7cff1c4259d7 500
Kojto 101:7cff1c4259d7 501 #if (__CORTEX_M >= 0x03)
Kojto 101:7cff1c4259d7 502
Kojto 101:7cff1c4259d7 503 /** \brief Enable FIQ
Kojto 101:7cff1c4259d7 504
Kojto 101:7cff1c4259d7 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 101:7cff1c4259d7 506 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 507 */
Kojto 101:7cff1c4259d7 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
Kojto 101:7cff1c4259d7 509 {
Kojto 101:7cff1c4259d7 510 __ASM volatile ("cpsie f" : : : "memory");
Kojto 101:7cff1c4259d7 511 }
Kojto 101:7cff1c4259d7 512
Kojto 101:7cff1c4259d7 513
Kojto 101:7cff1c4259d7 514 /** \brief Disable FIQ
Kojto 101:7cff1c4259d7 515
Kojto 101:7cff1c4259d7 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 101:7cff1c4259d7 517 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 518 */
Kojto 101:7cff1c4259d7 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
Kojto 101:7cff1c4259d7 520 {
Kojto 101:7cff1c4259d7 521 __ASM volatile ("cpsid f" : : : "memory");
Kojto 101:7cff1c4259d7 522 }
Kojto 101:7cff1c4259d7 523
Kojto 101:7cff1c4259d7 524
Kojto 101:7cff1c4259d7 525 /** \brief Get Base Priority
Kojto 101:7cff1c4259d7 526
Kojto 101:7cff1c4259d7 527 This function returns the current value of the Base Priority register.
Kojto 101:7cff1c4259d7 528
Kojto 101:7cff1c4259d7 529 \return Base Priority register value
Kojto 101:7cff1c4259d7 530 */
Kojto 101:7cff1c4259d7 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 101:7cff1c4259d7 532 {
Kojto 101:7cff1c4259d7 533 uint32_t result;
Kojto 101:7cff1c4259d7 534
Kojto 110:165afa46840b 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
Kojto 101:7cff1c4259d7 536 return(result);
Kojto 101:7cff1c4259d7 537 }
Kojto 101:7cff1c4259d7 538
Kojto 101:7cff1c4259d7 539
Kojto 101:7cff1c4259d7 540 /** \brief Set Base Priority
Kojto 101:7cff1c4259d7 541
Kojto 101:7cff1c4259d7 542 This function assigns the given value to the Base Priority register.
Kojto 101:7cff1c4259d7 543
Kojto 101:7cff1c4259d7 544 \param [in] basePri Base Priority value to set
Kojto 101:7cff1c4259d7 545 */
Kojto 101:7cff1c4259d7 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
Kojto 101:7cff1c4259d7 547 {
Kojto 101:7cff1c4259d7 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
Kojto 101:7cff1c4259d7 549 }
Kojto 101:7cff1c4259d7 550
Kojto 101:7cff1c4259d7 551
Kojto 110:165afa46840b 552 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 553
Kojto 110:165afa46840b 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 555 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 556
Kojto 110:165afa46840b 557 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 558 */
Kojto 110:165afa46840b 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Kojto 110:165afa46840b 560 {
Kojto 110:165afa46840b 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Kojto 110:165afa46840b 562 }
Kojto 110:165afa46840b 563
Kojto 110:165afa46840b 564
Kojto 101:7cff1c4259d7 565 /** \brief Get Fault Mask
Kojto 101:7cff1c4259d7 566
Kojto 101:7cff1c4259d7 567 This function returns the current value of the Fault Mask register.
Kojto 101:7cff1c4259d7 568
Kojto 101:7cff1c4259d7 569 \return Fault Mask register value
Kojto 101:7cff1c4259d7 570 */
Kojto 101:7cff1c4259d7 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 101:7cff1c4259d7 572 {
Kojto 101:7cff1c4259d7 573 uint32_t result;
Kojto 101:7cff1c4259d7 574
Kojto 101:7cff1c4259d7 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Kojto 101:7cff1c4259d7 576 return(result);
Kojto 101:7cff1c4259d7 577 }
Kojto 101:7cff1c4259d7 578
Kojto 101:7cff1c4259d7 579
Kojto 101:7cff1c4259d7 580 /** \brief Set Fault Mask
Kojto 101:7cff1c4259d7 581
Kojto 101:7cff1c4259d7 582 This function assigns the given value to the Fault Mask register.
Kojto 101:7cff1c4259d7 583
Kojto 101:7cff1c4259d7 584 \param [in] faultMask Fault Mask value to set
Kojto 101:7cff1c4259d7 585 */
Kojto 101:7cff1c4259d7 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 101:7cff1c4259d7 587 {
Kojto 101:7cff1c4259d7 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
Kojto 101:7cff1c4259d7 589 }
Kojto 101:7cff1c4259d7 590
Kojto 101:7cff1c4259d7 591 #endif /* (__CORTEX_M >= 0x03) */
Kojto 101:7cff1c4259d7 592
Kojto 101:7cff1c4259d7 593
Kojto 110:165afa46840b 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Kojto 101:7cff1c4259d7 595
Kojto 101:7cff1c4259d7 596 /** \brief Get FPSCR
Kojto 101:7cff1c4259d7 597
Kojto 101:7cff1c4259d7 598 This function returns the current value of the Floating Point Status/Control register.
Kojto 101:7cff1c4259d7 599
Kojto 101:7cff1c4259d7 600 \return Floating Point Status/Control register value
Kojto 101:7cff1c4259d7 601 */
Kojto 101:7cff1c4259d7 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 101:7cff1c4259d7 603 {
Kojto 101:7cff1c4259d7 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 101:7cff1c4259d7 605 uint32_t result;
Kojto 101:7cff1c4259d7 606
Kojto 101:7cff1c4259d7 607 /* Empty asm statement works as a scheduling barrier */
Kojto 101:7cff1c4259d7 608 __ASM volatile ("");
Kojto 101:7cff1c4259d7 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
Kojto 101:7cff1c4259d7 610 __ASM volatile ("");
Kojto 101:7cff1c4259d7 611 return(result);
Kojto 101:7cff1c4259d7 612 #else
Kojto 101:7cff1c4259d7 613 return(0);
Kojto 101:7cff1c4259d7 614 #endif
Kojto 101:7cff1c4259d7 615 }
Kojto 101:7cff1c4259d7 616
Kojto 101:7cff1c4259d7 617
Kojto 101:7cff1c4259d7 618 /** \brief Set FPSCR
Kojto 101:7cff1c4259d7 619
Kojto 101:7cff1c4259d7 620 This function assigns the given value to the Floating Point Status/Control register.
Kojto 101:7cff1c4259d7 621
Kojto 101:7cff1c4259d7 622 \param [in] fpscr Floating Point Status/Control value to set
Kojto 101:7cff1c4259d7 623 */
Kojto 101:7cff1c4259d7 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 101:7cff1c4259d7 625 {
Kojto 101:7cff1c4259d7 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 101:7cff1c4259d7 627 /* Empty asm statement works as a scheduling barrier */
Kojto 101:7cff1c4259d7 628 __ASM volatile ("");
Kojto 101:7cff1c4259d7 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
Kojto 101:7cff1c4259d7 630 __ASM volatile ("");
Kojto 101:7cff1c4259d7 631 #endif
Kojto 101:7cff1c4259d7 632 }
Kojto 101:7cff1c4259d7 633
Kojto 110:165afa46840b 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 110:165afa46840b 635
Kojto 110:165afa46840b 636
Kojto 110:165afa46840b 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 110:165afa46840b 638 /* IAR iccarm specific functions */
Kojto 110:165afa46840b 639 #include <cmsis_iar.h>
Kojto 110:165afa46840b 640
Kojto 110:165afa46840b 641
Kojto 110:165afa46840b 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 110:165afa46840b 643 /* TI CCS specific functions */
Kojto 110:165afa46840b 644 #include <cmsis_ccs.h>
Kojto 101:7cff1c4259d7 645
Kojto 101:7cff1c4259d7 646
Kojto 101:7cff1c4259d7 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Kojto 101:7cff1c4259d7 648 /* TASKING carm specific functions */
Kojto 101:7cff1c4259d7 649 /*
Kojto 101:7cff1c4259d7 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 110:165afa46840b 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
Kojto 101:7cff1c4259d7 652 * Including the CMSIS ones.
Kojto 101:7cff1c4259d7 653 */
Kojto 101:7cff1c4259d7 654
Kojto 110:165afa46840b 655
Kojto 110:165afa46840b 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 110:165afa46840b 657 /* Cosmic specific functions */
Kojto 110:165afa46840b 658 #include <cmsis_csm.h>
Kojto 110:165afa46840b 659
Kojto 101:7cff1c4259d7 660 #endif
Kojto 101:7cff1c4259d7 661
Kojto 101:7cff1c4259d7 662 /*@} end of CMSIS_Core_RegAccFunctions */
Kojto 101:7cff1c4259d7 663
Kojto 101:7cff1c4259d7 664 #endif /* __CORE_CMFUNC_H */