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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MTS_DRAGONFLY_F411RE/core_cmFunc.h@101:7cff1c4259d7, 2015-06-09 (annotated)

Committer:
Kojto
Date:
Tue Jun 09 14:29:26 2015 +0100
Revision:
101:7cff1c4259d7
Child:
110:165afa46840b
Release 101 of the mbed library



Changes:

- new platform: APPNEARME_MICRONFCBOARD, MTS_DRAGONFLY_F411RE, MAX32600MBED, WIZwiki_W7500

- Silabs memory optimization in gpio, pwm fixes

- SPI  - ssel documentation fixes and its use

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /**************************************************************************//**
Kojto 101:7cff1c4259d7 2 * @file core_cmFunc.h
Kojto 101:7cff1c4259d7 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 101:7cff1c4259d7 4 * @version V3.20
Kojto 101:7cff1c4259d7 5 * @date 25. February 2013
Kojto 101:7cff1c4259d7 6 *
Kojto 101:7cff1c4259d7 7 * @note
Kojto 101:7cff1c4259d7 8 *
Kojto 101:7cff1c4259d7 9 ******************************************************************************/
Kojto 101:7cff1c4259d7 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
Kojto 101:7cff1c4259d7 11
Kojto 101:7cff1c4259d7 12 All rights reserved.
Kojto 101:7cff1c4259d7 13 Redistribution and use in source and binary forms, with or without
Kojto 101:7cff1c4259d7 14 modification, are permitted provided that the following conditions are met:
Kojto 101:7cff1c4259d7 15 - Redistributions of source code must retain the above copyright
Kojto 101:7cff1c4259d7 16 notice, this list of conditions and the following disclaimer.
Kojto 101:7cff1c4259d7 17 - Redistributions in binary form must reproduce the above copyright
Kojto 101:7cff1c4259d7 18 notice, this list of conditions and the following disclaimer in the
Kojto 101:7cff1c4259d7 19 documentation and/or other materials provided with the distribution.
Kojto 101:7cff1c4259d7 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 101:7cff1c4259d7 21 to endorse or promote products derived from this software without
Kojto 101:7cff1c4259d7 22 specific prior written permission.
Kojto 101:7cff1c4259d7 23 *
Kojto 101:7cff1c4259d7 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 101:7cff1c4259d7 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 101:7cff1c4259d7 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 101:7cff1c4259d7 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 101:7cff1c4259d7 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 101:7cff1c4259d7 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 101:7cff1c4259d7 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 101:7cff1c4259d7 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 101:7cff1c4259d7 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 101:7cff1c4259d7 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 101:7cff1c4259d7 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 101:7cff1c4259d7 35 ---------------------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 36
Kojto 101:7cff1c4259d7 37
Kojto 101:7cff1c4259d7 38 #ifndef __CORE_CMFUNC_H
Kojto 101:7cff1c4259d7 39 #define __CORE_CMFUNC_H
Kojto 101:7cff1c4259d7 40
Kojto 101:7cff1c4259d7 41
Kojto 101:7cff1c4259d7 42 /* ########################### Core Function Access ########################### */
Kojto 101:7cff1c4259d7 43 /** \ingroup CMSIS_Core_FunctionInterface
Kojto 101:7cff1c4259d7 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Kojto 101:7cff1c4259d7 45 @{
Kojto 101:7cff1c4259d7 46 */
Kojto 101:7cff1c4259d7 47
Kojto 101:7cff1c4259d7 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Kojto 101:7cff1c4259d7 49 /* ARM armcc specific functions */
Kojto 101:7cff1c4259d7 50
Kojto 101:7cff1c4259d7 51 #if (__ARMCC_VERSION < 400677)
Kojto 101:7cff1c4259d7 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Kojto 101:7cff1c4259d7 53 #endif
Kojto 101:7cff1c4259d7 54
Kojto 101:7cff1c4259d7 55 /* intrinsic void __enable_irq(); */
Kojto 101:7cff1c4259d7 56 /* intrinsic void __disable_irq(); */
Kojto 101:7cff1c4259d7 57
Kojto 101:7cff1c4259d7 58 /** \brief Get Control Register
Kojto 101:7cff1c4259d7 59
Kojto 101:7cff1c4259d7 60 This function returns the content of the Control Register.
Kojto 101:7cff1c4259d7 61
Kojto 101:7cff1c4259d7 62 \return Control Register value
Kojto 101:7cff1c4259d7 63 */
Kojto 101:7cff1c4259d7 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 101:7cff1c4259d7 65 {
Kojto 101:7cff1c4259d7 66 register uint32_t __regControl __ASM("control");
Kojto 101:7cff1c4259d7 67 return(__regControl);
Kojto 101:7cff1c4259d7 68 }
Kojto 101:7cff1c4259d7 69
Kojto 101:7cff1c4259d7 70
Kojto 101:7cff1c4259d7 71 /** \brief Set Control Register
Kojto 101:7cff1c4259d7 72
Kojto 101:7cff1c4259d7 73 This function writes the given value to the Control Register.
Kojto 101:7cff1c4259d7 74
Kojto 101:7cff1c4259d7 75 \param [in] control Control Register value to set
Kojto 101:7cff1c4259d7 76 */
Kojto 101:7cff1c4259d7 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 101:7cff1c4259d7 78 {
Kojto 101:7cff1c4259d7 79 register uint32_t __regControl __ASM("control");
Kojto 101:7cff1c4259d7 80 __regControl = control;
Kojto 101:7cff1c4259d7 81 }
Kojto 101:7cff1c4259d7 82
Kojto 101:7cff1c4259d7 83
Kojto 101:7cff1c4259d7 84 /** \brief Get IPSR Register
Kojto 101:7cff1c4259d7 85
Kojto 101:7cff1c4259d7 86 This function returns the content of the IPSR Register.
Kojto 101:7cff1c4259d7 87
Kojto 101:7cff1c4259d7 88 \return IPSR Register value
Kojto 101:7cff1c4259d7 89 */
Kojto 101:7cff1c4259d7 90 __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 101:7cff1c4259d7 91 {
Kojto 101:7cff1c4259d7 92 register uint32_t __regIPSR __ASM("ipsr");
Kojto 101:7cff1c4259d7 93 return(__regIPSR);
Kojto 101:7cff1c4259d7 94 }
Kojto 101:7cff1c4259d7 95
Kojto 101:7cff1c4259d7 96
Kojto 101:7cff1c4259d7 97 /** \brief Get APSR Register
Kojto 101:7cff1c4259d7 98
Kojto 101:7cff1c4259d7 99 This function returns the content of the APSR Register.
Kojto 101:7cff1c4259d7 100
Kojto 101:7cff1c4259d7 101 \return APSR Register value
Kojto 101:7cff1c4259d7 102 */
Kojto 101:7cff1c4259d7 103 __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 101:7cff1c4259d7 104 {
Kojto 101:7cff1c4259d7 105 register uint32_t __regAPSR __ASM("apsr");
Kojto 101:7cff1c4259d7 106 return(__regAPSR);
Kojto 101:7cff1c4259d7 107 }
Kojto 101:7cff1c4259d7 108
Kojto 101:7cff1c4259d7 109
Kojto 101:7cff1c4259d7 110 /** \brief Get xPSR Register
Kojto 101:7cff1c4259d7 111
Kojto 101:7cff1c4259d7 112 This function returns the content of the xPSR Register.
Kojto 101:7cff1c4259d7 113
Kojto 101:7cff1c4259d7 114 \return xPSR Register value
Kojto 101:7cff1c4259d7 115 */
Kojto 101:7cff1c4259d7 116 __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 101:7cff1c4259d7 117 {
Kojto 101:7cff1c4259d7 118 register uint32_t __regXPSR __ASM("xpsr");
Kojto 101:7cff1c4259d7 119 return(__regXPSR);
Kojto 101:7cff1c4259d7 120 }
Kojto 101:7cff1c4259d7 121
Kojto 101:7cff1c4259d7 122
Kojto 101:7cff1c4259d7 123 /** \brief Get Process Stack Pointer
Kojto 101:7cff1c4259d7 124
Kojto 101:7cff1c4259d7 125 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 101:7cff1c4259d7 126
Kojto 101:7cff1c4259d7 127 \return PSP Register value
Kojto 101:7cff1c4259d7 128 */
Kojto 101:7cff1c4259d7 129 __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 101:7cff1c4259d7 130 {
Kojto 101:7cff1c4259d7 131 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 101:7cff1c4259d7 132 return(__regProcessStackPointer);
Kojto 101:7cff1c4259d7 133 }
Kojto 101:7cff1c4259d7 134
Kojto 101:7cff1c4259d7 135
Kojto 101:7cff1c4259d7 136 /** \brief Set Process Stack Pointer
Kojto 101:7cff1c4259d7 137
Kojto 101:7cff1c4259d7 138 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 101:7cff1c4259d7 139
Kojto 101:7cff1c4259d7 140 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 101:7cff1c4259d7 141 */
Kojto 101:7cff1c4259d7 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 101:7cff1c4259d7 143 {
Kojto 101:7cff1c4259d7 144 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 101:7cff1c4259d7 145 __regProcessStackPointer = topOfProcStack;
Kojto 101:7cff1c4259d7 146 }
Kojto 101:7cff1c4259d7 147
Kojto 101:7cff1c4259d7 148
Kojto 101:7cff1c4259d7 149 /** \brief Get Main Stack Pointer
Kojto 101:7cff1c4259d7 150
Kojto 101:7cff1c4259d7 151 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 101:7cff1c4259d7 152
Kojto 101:7cff1c4259d7 153 \return MSP Register value
Kojto 101:7cff1c4259d7 154 */
Kojto 101:7cff1c4259d7 155 __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 101:7cff1c4259d7 156 {
Kojto 101:7cff1c4259d7 157 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 101:7cff1c4259d7 158 return(__regMainStackPointer);
Kojto 101:7cff1c4259d7 159 }
Kojto 101:7cff1c4259d7 160
Kojto 101:7cff1c4259d7 161
Kojto 101:7cff1c4259d7 162 /** \brief Set Main Stack Pointer
Kojto 101:7cff1c4259d7 163
Kojto 101:7cff1c4259d7 164 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 101:7cff1c4259d7 165
Kojto 101:7cff1c4259d7 166 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 101:7cff1c4259d7 167 */
Kojto 101:7cff1c4259d7 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 101:7cff1c4259d7 169 {
Kojto 101:7cff1c4259d7 170 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 101:7cff1c4259d7 171 __regMainStackPointer = topOfMainStack;
Kojto 101:7cff1c4259d7 172 }
Kojto 101:7cff1c4259d7 173
Kojto 101:7cff1c4259d7 174
Kojto 101:7cff1c4259d7 175 /** \brief Get Priority Mask
Kojto 101:7cff1c4259d7 176
Kojto 101:7cff1c4259d7 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 101:7cff1c4259d7 178
Kojto 101:7cff1c4259d7 179 \return Priority Mask value
Kojto 101:7cff1c4259d7 180 */
Kojto 101:7cff1c4259d7 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 101:7cff1c4259d7 182 {
Kojto 101:7cff1c4259d7 183 register uint32_t __regPriMask __ASM("primask");
Kojto 101:7cff1c4259d7 184 return(__regPriMask);
Kojto 101:7cff1c4259d7 185 }
Kojto 101:7cff1c4259d7 186
Kojto 101:7cff1c4259d7 187
Kojto 101:7cff1c4259d7 188 /** \brief Set Priority Mask
Kojto 101:7cff1c4259d7 189
Kojto 101:7cff1c4259d7 190 This function assigns the given value to the Priority Mask Register.
Kojto 101:7cff1c4259d7 191
Kojto 101:7cff1c4259d7 192 \param [in] priMask Priority Mask
Kojto 101:7cff1c4259d7 193 */
Kojto 101:7cff1c4259d7 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 101:7cff1c4259d7 195 {
Kojto 101:7cff1c4259d7 196 register uint32_t __regPriMask __ASM("primask");
Kojto 101:7cff1c4259d7 197 __regPriMask = (priMask);
Kojto 101:7cff1c4259d7 198 }
Kojto 101:7cff1c4259d7 199
Kojto 101:7cff1c4259d7 200
Kojto 101:7cff1c4259d7 201 #if (__CORTEX_M >= 0x03)
Kojto 101:7cff1c4259d7 202
Kojto 101:7cff1c4259d7 203 /** \brief Enable FIQ
Kojto 101:7cff1c4259d7 204
Kojto 101:7cff1c4259d7 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 101:7cff1c4259d7 206 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 207 */
Kojto 101:7cff1c4259d7 208 #define __enable_fault_irq __enable_fiq
Kojto 101:7cff1c4259d7 209
Kojto 101:7cff1c4259d7 210
Kojto 101:7cff1c4259d7 211 /** \brief Disable FIQ
Kojto 101:7cff1c4259d7 212
Kojto 101:7cff1c4259d7 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 101:7cff1c4259d7 214 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 215 */
Kojto 101:7cff1c4259d7 216 #define __disable_fault_irq __disable_fiq
Kojto 101:7cff1c4259d7 217
Kojto 101:7cff1c4259d7 218
Kojto 101:7cff1c4259d7 219 /** \brief Get Base Priority
Kojto 101:7cff1c4259d7 220
Kojto 101:7cff1c4259d7 221 This function returns the current value of the Base Priority register.
Kojto 101:7cff1c4259d7 222
Kojto 101:7cff1c4259d7 223 \return Base Priority register value
Kojto 101:7cff1c4259d7 224 */
Kojto 101:7cff1c4259d7 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 101:7cff1c4259d7 226 {
Kojto 101:7cff1c4259d7 227 register uint32_t __regBasePri __ASM("basepri");
Kojto 101:7cff1c4259d7 228 return(__regBasePri);
Kojto 101:7cff1c4259d7 229 }
Kojto 101:7cff1c4259d7 230
Kojto 101:7cff1c4259d7 231
Kojto 101:7cff1c4259d7 232 /** \brief Set Base Priority
Kojto 101:7cff1c4259d7 233
Kojto 101:7cff1c4259d7 234 This function assigns the given value to the Base Priority register.
Kojto 101:7cff1c4259d7 235
Kojto 101:7cff1c4259d7 236 \param [in] basePri Base Priority value to set
Kojto 101:7cff1c4259d7 237 */
Kojto 101:7cff1c4259d7 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
Kojto 101:7cff1c4259d7 239 {
Kojto 101:7cff1c4259d7 240 register uint32_t __regBasePri __ASM("basepri");
Kojto 101:7cff1c4259d7 241 __regBasePri = (basePri & 0xff);
Kojto 101:7cff1c4259d7 242 }
Kojto 101:7cff1c4259d7 243
Kojto 101:7cff1c4259d7 244
Kojto 101:7cff1c4259d7 245 /** \brief Get Fault Mask
Kojto 101:7cff1c4259d7 246
Kojto 101:7cff1c4259d7 247 This function returns the current value of the Fault Mask register.
Kojto 101:7cff1c4259d7 248
Kojto 101:7cff1c4259d7 249 \return Fault Mask register value
Kojto 101:7cff1c4259d7 250 */
Kojto 101:7cff1c4259d7 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 101:7cff1c4259d7 252 {
Kojto 101:7cff1c4259d7 253 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 101:7cff1c4259d7 254 return(__regFaultMask);
Kojto 101:7cff1c4259d7 255 }
Kojto 101:7cff1c4259d7 256
Kojto 101:7cff1c4259d7 257
Kojto 101:7cff1c4259d7 258 /** \brief Set Fault Mask
Kojto 101:7cff1c4259d7 259
Kojto 101:7cff1c4259d7 260 This function assigns the given value to the Fault Mask register.
Kojto 101:7cff1c4259d7 261
Kojto 101:7cff1c4259d7 262 \param [in] faultMask Fault Mask value to set
Kojto 101:7cff1c4259d7 263 */
Kojto 101:7cff1c4259d7 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 101:7cff1c4259d7 265 {
Kojto 101:7cff1c4259d7 266 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 101:7cff1c4259d7 267 __regFaultMask = (faultMask & (uint32_t)1);
Kojto 101:7cff1c4259d7 268 }
Kojto 101:7cff1c4259d7 269
Kojto 101:7cff1c4259d7 270 #endif /* (__CORTEX_M >= 0x03) */
Kojto 101:7cff1c4259d7 271
Kojto 101:7cff1c4259d7 272
Kojto 101:7cff1c4259d7 273 #if (__CORTEX_M == 0x04)
Kojto 101:7cff1c4259d7 274
Kojto 101:7cff1c4259d7 275 /** \brief Get FPSCR
Kojto 101:7cff1c4259d7 276
Kojto 101:7cff1c4259d7 277 This function returns the current value of the Floating Point Status/Control register.
Kojto 101:7cff1c4259d7 278
Kojto 101:7cff1c4259d7 279 \return Floating Point Status/Control register value
Kojto 101:7cff1c4259d7 280 */
Kojto 101:7cff1c4259d7 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 101:7cff1c4259d7 282 {
Kojto 101:7cff1c4259d7 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 101:7cff1c4259d7 284 register uint32_t __regfpscr __ASM("fpscr");
Kojto 101:7cff1c4259d7 285 return(__regfpscr);
Kojto 101:7cff1c4259d7 286 #else
Kojto 101:7cff1c4259d7 287 return(0);
Kojto 101:7cff1c4259d7 288 #endif
Kojto 101:7cff1c4259d7 289 }
Kojto 101:7cff1c4259d7 290
Kojto 101:7cff1c4259d7 291
Kojto 101:7cff1c4259d7 292 /** \brief Set FPSCR
Kojto 101:7cff1c4259d7 293
Kojto 101:7cff1c4259d7 294 This function assigns the given value to the Floating Point Status/Control register.
Kojto 101:7cff1c4259d7 295
Kojto 101:7cff1c4259d7 296 \param [in] fpscr Floating Point Status/Control value to set
Kojto 101:7cff1c4259d7 297 */
Kojto 101:7cff1c4259d7 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 101:7cff1c4259d7 299 {
Kojto 101:7cff1c4259d7 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 101:7cff1c4259d7 301 register uint32_t __regfpscr __ASM("fpscr");
Kojto 101:7cff1c4259d7 302 __regfpscr = (fpscr);
Kojto 101:7cff1c4259d7 303 #endif
Kojto 101:7cff1c4259d7 304 }
Kojto 101:7cff1c4259d7 305
Kojto 101:7cff1c4259d7 306 #endif /* (__CORTEX_M == 0x04) */
Kojto 101:7cff1c4259d7 307
Kojto 101:7cff1c4259d7 308
Kojto 101:7cff1c4259d7 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 101:7cff1c4259d7 310 /* IAR iccarm specific functions */
Kojto 101:7cff1c4259d7 311
Kojto 101:7cff1c4259d7 312 #include <cmsis_iar.h>
Kojto 101:7cff1c4259d7 313
Kojto 101:7cff1c4259d7 314
Kojto 101:7cff1c4259d7 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 101:7cff1c4259d7 316 /* TI CCS specific functions */
Kojto 101:7cff1c4259d7 317
Kojto 101:7cff1c4259d7 318 #include <cmsis_ccs.h>
Kojto 101:7cff1c4259d7 319
Kojto 101:7cff1c4259d7 320
Kojto 101:7cff1c4259d7 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Kojto 101:7cff1c4259d7 322 /* GNU gcc specific functions */
Kojto 101:7cff1c4259d7 323
Kojto 101:7cff1c4259d7 324 /** \brief Enable IRQ Interrupts
Kojto 101:7cff1c4259d7 325
Kojto 101:7cff1c4259d7 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Kojto 101:7cff1c4259d7 327 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 328 */
Kojto 101:7cff1c4259d7 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
Kojto 101:7cff1c4259d7 330 {
Kojto 101:7cff1c4259d7 331 __ASM volatile ("cpsie i" : : : "memory");
Kojto 101:7cff1c4259d7 332 }
Kojto 101:7cff1c4259d7 333
Kojto 101:7cff1c4259d7 334
Kojto 101:7cff1c4259d7 335 /** \brief Disable IRQ Interrupts
Kojto 101:7cff1c4259d7 336
Kojto 101:7cff1c4259d7 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
Kojto 101:7cff1c4259d7 338 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 339 */
Kojto 101:7cff1c4259d7 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
Kojto 101:7cff1c4259d7 341 {
Kojto 101:7cff1c4259d7 342 __ASM volatile ("cpsid i" : : : "memory");
Kojto 101:7cff1c4259d7 343 }
Kojto 101:7cff1c4259d7 344
Kojto 101:7cff1c4259d7 345
Kojto 101:7cff1c4259d7 346 /** \brief Get Control Register
Kojto 101:7cff1c4259d7 347
Kojto 101:7cff1c4259d7 348 This function returns the content of the Control Register.
Kojto 101:7cff1c4259d7 349
Kojto 101:7cff1c4259d7 350 \return Control Register value
Kojto 101:7cff1c4259d7 351 */
Kojto 101:7cff1c4259d7 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 101:7cff1c4259d7 353 {
Kojto 101:7cff1c4259d7 354 uint32_t result;
Kojto 101:7cff1c4259d7 355
Kojto 101:7cff1c4259d7 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
Kojto 101:7cff1c4259d7 357 return(result);
Kojto 101:7cff1c4259d7 358 }
Kojto 101:7cff1c4259d7 359
Kojto 101:7cff1c4259d7 360
Kojto 101:7cff1c4259d7 361 /** \brief Set Control Register
Kojto 101:7cff1c4259d7 362
Kojto 101:7cff1c4259d7 363 This function writes the given value to the Control Register.
Kojto 101:7cff1c4259d7 364
Kojto 101:7cff1c4259d7 365 \param [in] control Control Register value to set
Kojto 101:7cff1c4259d7 366 */
Kojto 101:7cff1c4259d7 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 101:7cff1c4259d7 368 {
Kojto 101:7cff1c4259d7 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
Kojto 101:7cff1c4259d7 370 }
Kojto 101:7cff1c4259d7 371
Kojto 101:7cff1c4259d7 372
Kojto 101:7cff1c4259d7 373 /** \brief Get IPSR Register
Kojto 101:7cff1c4259d7 374
Kojto 101:7cff1c4259d7 375 This function returns the content of the IPSR Register.
Kojto 101:7cff1c4259d7 376
Kojto 101:7cff1c4259d7 377 \return IPSR Register value
Kojto 101:7cff1c4259d7 378 */
Kojto 101:7cff1c4259d7 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 101:7cff1c4259d7 380 {
Kojto 101:7cff1c4259d7 381 uint32_t result;
Kojto 101:7cff1c4259d7 382
Kojto 101:7cff1c4259d7 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Kojto 101:7cff1c4259d7 384 return(result);
Kojto 101:7cff1c4259d7 385 }
Kojto 101:7cff1c4259d7 386
Kojto 101:7cff1c4259d7 387
Kojto 101:7cff1c4259d7 388 /** \brief Get APSR Register
Kojto 101:7cff1c4259d7 389
Kojto 101:7cff1c4259d7 390 This function returns the content of the APSR Register.
Kojto 101:7cff1c4259d7 391
Kojto 101:7cff1c4259d7 392 \return APSR Register value
Kojto 101:7cff1c4259d7 393 */
Kojto 101:7cff1c4259d7 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 101:7cff1c4259d7 395 {
Kojto 101:7cff1c4259d7 396 uint32_t result;
Kojto 101:7cff1c4259d7 397
Kojto 101:7cff1c4259d7 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Kojto 101:7cff1c4259d7 399 return(result);
Kojto 101:7cff1c4259d7 400 }
Kojto 101:7cff1c4259d7 401
Kojto 101:7cff1c4259d7 402
Kojto 101:7cff1c4259d7 403 /** \brief Get xPSR Register
Kojto 101:7cff1c4259d7 404
Kojto 101:7cff1c4259d7 405 This function returns the content of the xPSR Register.
Kojto 101:7cff1c4259d7 406
Kojto 101:7cff1c4259d7 407 \return xPSR Register value
Kojto 101:7cff1c4259d7 408 */
Kojto 101:7cff1c4259d7 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 101:7cff1c4259d7 410 {
Kojto 101:7cff1c4259d7 411 uint32_t result;
Kojto 101:7cff1c4259d7 412
Kojto 101:7cff1c4259d7 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Kojto 101:7cff1c4259d7 414 return(result);
Kojto 101:7cff1c4259d7 415 }
Kojto 101:7cff1c4259d7 416
Kojto 101:7cff1c4259d7 417
Kojto 101:7cff1c4259d7 418 /** \brief Get Process Stack Pointer
Kojto 101:7cff1c4259d7 419
Kojto 101:7cff1c4259d7 420 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 101:7cff1c4259d7 421
Kojto 101:7cff1c4259d7 422 \return PSP Register value
Kojto 101:7cff1c4259d7 423 */
Kojto 101:7cff1c4259d7 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 101:7cff1c4259d7 425 {
Kojto 101:7cff1c4259d7 426 register uint32_t result;
Kojto 101:7cff1c4259d7 427
Kojto 101:7cff1c4259d7 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
Kojto 101:7cff1c4259d7 429 return(result);
Kojto 101:7cff1c4259d7 430 }
Kojto 101:7cff1c4259d7 431
Kojto 101:7cff1c4259d7 432
Kojto 101:7cff1c4259d7 433 /** \brief Set Process Stack Pointer
Kojto 101:7cff1c4259d7 434
Kojto 101:7cff1c4259d7 435 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 101:7cff1c4259d7 436
Kojto 101:7cff1c4259d7 437 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 101:7cff1c4259d7 438 */
Kojto 101:7cff1c4259d7 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 101:7cff1c4259d7 440 {
Kojto 101:7cff1c4259d7 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
Kojto 101:7cff1c4259d7 442 }
Kojto 101:7cff1c4259d7 443
Kojto 101:7cff1c4259d7 444
Kojto 101:7cff1c4259d7 445 /** \brief Get Main Stack Pointer
Kojto 101:7cff1c4259d7 446
Kojto 101:7cff1c4259d7 447 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 101:7cff1c4259d7 448
Kojto 101:7cff1c4259d7 449 \return MSP Register value
Kojto 101:7cff1c4259d7 450 */
Kojto 101:7cff1c4259d7 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 101:7cff1c4259d7 452 {
Kojto 101:7cff1c4259d7 453 register uint32_t result;
Kojto 101:7cff1c4259d7 454
Kojto 101:7cff1c4259d7 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
Kojto 101:7cff1c4259d7 456 return(result);
Kojto 101:7cff1c4259d7 457 }
Kojto 101:7cff1c4259d7 458
Kojto 101:7cff1c4259d7 459
Kojto 101:7cff1c4259d7 460 /** \brief Set Main Stack Pointer
Kojto 101:7cff1c4259d7 461
Kojto 101:7cff1c4259d7 462 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 101:7cff1c4259d7 463
Kojto 101:7cff1c4259d7 464 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 101:7cff1c4259d7 465 */
Kojto 101:7cff1c4259d7 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 101:7cff1c4259d7 467 {
Kojto 101:7cff1c4259d7 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
Kojto 101:7cff1c4259d7 469 }
Kojto 101:7cff1c4259d7 470
Kojto 101:7cff1c4259d7 471
Kojto 101:7cff1c4259d7 472 /** \brief Get Priority Mask
Kojto 101:7cff1c4259d7 473
Kojto 101:7cff1c4259d7 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 101:7cff1c4259d7 475
Kojto 101:7cff1c4259d7 476 \return Priority Mask value
Kojto 101:7cff1c4259d7 477 */
Kojto 101:7cff1c4259d7 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 101:7cff1c4259d7 479 {
Kojto 101:7cff1c4259d7 480 uint32_t result;
Kojto 101:7cff1c4259d7 481
Kojto 101:7cff1c4259d7 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Kojto 101:7cff1c4259d7 483 return(result);
Kojto 101:7cff1c4259d7 484 }
Kojto 101:7cff1c4259d7 485
Kojto 101:7cff1c4259d7 486
Kojto 101:7cff1c4259d7 487 /** \brief Set Priority Mask
Kojto 101:7cff1c4259d7 488
Kojto 101:7cff1c4259d7 489 This function assigns the given value to the Priority Mask Register.
Kojto 101:7cff1c4259d7 490
Kojto 101:7cff1c4259d7 491 \param [in] priMask Priority Mask
Kojto 101:7cff1c4259d7 492 */
Kojto 101:7cff1c4259d7 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 101:7cff1c4259d7 494 {
Kojto 101:7cff1c4259d7 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
Kojto 101:7cff1c4259d7 496 }
Kojto 101:7cff1c4259d7 497
Kojto 101:7cff1c4259d7 498
Kojto 101:7cff1c4259d7 499 #if (__CORTEX_M >= 0x03)
Kojto 101:7cff1c4259d7 500
Kojto 101:7cff1c4259d7 501 /** \brief Enable FIQ
Kojto 101:7cff1c4259d7 502
Kojto 101:7cff1c4259d7 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 101:7cff1c4259d7 504 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 505 */
Kojto 101:7cff1c4259d7 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
Kojto 101:7cff1c4259d7 507 {
Kojto 101:7cff1c4259d7 508 __ASM volatile ("cpsie f" : : : "memory");
Kojto 101:7cff1c4259d7 509 }
Kojto 101:7cff1c4259d7 510
Kojto 101:7cff1c4259d7 511
Kojto 101:7cff1c4259d7 512 /** \brief Disable FIQ
Kojto 101:7cff1c4259d7 513
Kojto 101:7cff1c4259d7 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 101:7cff1c4259d7 515 Can only be executed in Privileged modes.
Kojto 101:7cff1c4259d7 516 */
Kojto 101:7cff1c4259d7 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
Kojto 101:7cff1c4259d7 518 {
Kojto 101:7cff1c4259d7 519 __ASM volatile ("cpsid f" : : : "memory");
Kojto 101:7cff1c4259d7 520 }
Kojto 101:7cff1c4259d7 521
Kojto 101:7cff1c4259d7 522
Kojto 101:7cff1c4259d7 523 /** \brief Get Base Priority
Kojto 101:7cff1c4259d7 524
Kojto 101:7cff1c4259d7 525 This function returns the current value of the Base Priority register.
Kojto 101:7cff1c4259d7 526
Kojto 101:7cff1c4259d7 527 \return Base Priority register value
Kojto 101:7cff1c4259d7 528 */
Kojto 101:7cff1c4259d7 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 101:7cff1c4259d7 530 {
Kojto 101:7cff1c4259d7 531 uint32_t result;
Kojto 101:7cff1c4259d7 532
Kojto 101:7cff1c4259d7 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
Kojto 101:7cff1c4259d7 534 return(result);
Kojto 101:7cff1c4259d7 535 }
Kojto 101:7cff1c4259d7 536
Kojto 101:7cff1c4259d7 537
Kojto 101:7cff1c4259d7 538 /** \brief Set Base Priority
Kojto 101:7cff1c4259d7 539
Kojto 101:7cff1c4259d7 540 This function assigns the given value to the Base Priority register.
Kojto 101:7cff1c4259d7 541
Kojto 101:7cff1c4259d7 542 \param [in] basePri Base Priority value to set
Kojto 101:7cff1c4259d7 543 */
Kojto 101:7cff1c4259d7 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
Kojto 101:7cff1c4259d7 545 {
Kojto 101:7cff1c4259d7 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
Kojto 101:7cff1c4259d7 547 }
Kojto 101:7cff1c4259d7 548
Kojto 101:7cff1c4259d7 549
Kojto 101:7cff1c4259d7 550 /** \brief Get Fault Mask
Kojto 101:7cff1c4259d7 551
Kojto 101:7cff1c4259d7 552 This function returns the current value of the Fault Mask register.
Kojto 101:7cff1c4259d7 553
Kojto 101:7cff1c4259d7 554 \return Fault Mask register value
Kojto 101:7cff1c4259d7 555 */
Kojto 101:7cff1c4259d7 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 101:7cff1c4259d7 557 {
Kojto 101:7cff1c4259d7 558 uint32_t result;
Kojto 101:7cff1c4259d7 559
Kojto 101:7cff1c4259d7 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Kojto 101:7cff1c4259d7 561 return(result);
Kojto 101:7cff1c4259d7 562 }
Kojto 101:7cff1c4259d7 563
Kojto 101:7cff1c4259d7 564
Kojto 101:7cff1c4259d7 565 /** \brief Set Fault Mask
Kojto 101:7cff1c4259d7 566
Kojto 101:7cff1c4259d7 567 This function assigns the given value to the Fault Mask register.
Kojto 101:7cff1c4259d7 568
Kojto 101:7cff1c4259d7 569 \param [in] faultMask Fault Mask value to set
Kojto 101:7cff1c4259d7 570 */
Kojto 101:7cff1c4259d7 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 101:7cff1c4259d7 572 {
Kojto 101:7cff1c4259d7 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
Kojto 101:7cff1c4259d7 574 }
Kojto 101:7cff1c4259d7 575
Kojto 101:7cff1c4259d7 576 #endif /* (__CORTEX_M >= 0x03) */
Kojto 101:7cff1c4259d7 577
Kojto 101:7cff1c4259d7 578
Kojto 101:7cff1c4259d7 579 #if (__CORTEX_M == 0x04)
Kojto 101:7cff1c4259d7 580
Kojto 101:7cff1c4259d7 581 /** \brief Get FPSCR
Kojto 101:7cff1c4259d7 582
Kojto 101:7cff1c4259d7 583 This function returns the current value of the Floating Point Status/Control register.
Kojto 101:7cff1c4259d7 584
Kojto 101:7cff1c4259d7 585 \return Floating Point Status/Control register value
Kojto 101:7cff1c4259d7 586 */
Kojto 101:7cff1c4259d7 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 101:7cff1c4259d7 588 {
Kojto 101:7cff1c4259d7 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 101:7cff1c4259d7 590 uint32_t result;
Kojto 101:7cff1c4259d7 591
Kojto 101:7cff1c4259d7 592 /* Empty asm statement works as a scheduling barrier */
Kojto 101:7cff1c4259d7 593 __ASM volatile ("");
Kojto 101:7cff1c4259d7 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
Kojto 101:7cff1c4259d7 595 __ASM volatile ("");
Kojto 101:7cff1c4259d7 596 return(result);
Kojto 101:7cff1c4259d7 597 #else
Kojto 101:7cff1c4259d7 598 return(0);
Kojto 101:7cff1c4259d7 599 #endif
Kojto 101:7cff1c4259d7 600 }
Kojto 101:7cff1c4259d7 601
Kojto 101:7cff1c4259d7 602
Kojto 101:7cff1c4259d7 603 /** \brief Set FPSCR
Kojto 101:7cff1c4259d7 604
Kojto 101:7cff1c4259d7 605 This function assigns the given value to the Floating Point Status/Control register.
Kojto 101:7cff1c4259d7 606
Kojto 101:7cff1c4259d7 607 \param [in] fpscr Floating Point Status/Control value to set
Kojto 101:7cff1c4259d7 608 */
Kojto 101:7cff1c4259d7 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 101:7cff1c4259d7 610 {
Kojto 101:7cff1c4259d7 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 101:7cff1c4259d7 612 /* Empty asm statement works as a scheduling barrier */
Kojto 101:7cff1c4259d7 613 __ASM volatile ("");
Kojto 101:7cff1c4259d7 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
Kojto 101:7cff1c4259d7 615 __ASM volatile ("");
Kojto 101:7cff1c4259d7 616 #endif
Kojto 101:7cff1c4259d7 617 }
Kojto 101:7cff1c4259d7 618
Kojto 101:7cff1c4259d7 619 #endif /* (__CORTEX_M == 0x04) */
Kojto 101:7cff1c4259d7 620
Kojto 101:7cff1c4259d7 621
Kojto 101:7cff1c4259d7 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Kojto 101:7cff1c4259d7 623 /* TASKING carm specific functions */
Kojto 101:7cff1c4259d7 624
Kojto 101:7cff1c4259d7 625 /*
Kojto 101:7cff1c4259d7 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 101:7cff1c4259d7 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
Kojto 101:7cff1c4259d7 628 * Including the CMSIS ones.
Kojto 101:7cff1c4259d7 629 */
Kojto 101:7cff1c4259d7 630
Kojto 101:7cff1c4259d7 631 #endif
Kojto 101:7cff1c4259d7 632
Kojto 101:7cff1c4259d7 633 /*@} end of CMSIS_Core_RegAccFunctions */
Kojto 101:7cff1c4259d7 634
Kojto 101:7cff1c4259d7 635
Kojto 101:7cff1c4259d7 636 #endif /* __CORE_CMFUNC_H */