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mbed 2

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TARGET_RZ_A1H/core_cmInstr.h@147:a97add6d7e64, 2017-07-19 (annotated)

Committer:
Kojto
Date:
Wed Jul 19 16:46:19 2017 +0100
Revision:
147:a97add6d7e64
Parent:
110:165afa46840b 
Release 147 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**************************************************************************//**
bogdanm 92:4fc01daae5a5 2 * @file core_cmInstr.h
bogdanm 92:4fc01daae5a5 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
Kojto 110:165afa46840b 4 * @version V4.10
Kojto 110:165afa46840b 5 * @date 18. March 2015
bogdanm 92:4fc01daae5a5 6 *
bogdanm 92:4fc01daae5a5 7 * @note
bogdanm 92:4fc01daae5a5 8 *
bogdanm 92:4fc01daae5a5 9 ******************************************************************************/
Kojto 110:165afa46840b 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
bogdanm 92:4fc01daae5a5 11
bogdanm 92:4fc01daae5a5 12 All rights reserved.
bogdanm 92:4fc01daae5a5 13 Redistribution and use in source and binary forms, with or without
bogdanm 92:4fc01daae5a5 14 modification, are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 - Redistributions of source code must retain the above copyright
bogdanm 92:4fc01daae5a5 16 notice, this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 92:4fc01daae5a5 18 notice, this list of conditions and the following disclaimer in the
bogdanm 92:4fc01daae5a5 19 documentation and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 92:4fc01daae5a5 21 to endorse or promote products derived from this software without
bogdanm 92:4fc01daae5a5 22 specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 92:4fc01daae5a5 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 92:4fc01daae5a5 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 92:4fc01daae5a5 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 92:4fc01daae5a5 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 92:4fc01daae5a5 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 92:4fc01daae5a5 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 92:4fc01daae5a5 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 92:4fc01daae5a5 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 35 ---------------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 36
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 #ifndef __CORE_CMINSTR_H
bogdanm 92:4fc01daae5a5 39 #define __CORE_CMINSTR_H
bogdanm 92:4fc01daae5a5 40
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 /* ########################## Core Instruction Access ######################### */
bogdanm 92:4fc01daae5a5 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
bogdanm 92:4fc01daae5a5 44 Access to dedicated instructions
bogdanm 92:4fc01daae5a5 45 @{
bogdanm 92:4fc01daae5a5 46 */
bogdanm 92:4fc01daae5a5 47
bogdanm 92:4fc01daae5a5 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 92:4fc01daae5a5 49 /* ARM armcc specific functions */
bogdanm 92:4fc01daae5a5 50
bogdanm 92:4fc01daae5a5 51 #if (__ARMCC_VERSION < 400677)
bogdanm 92:4fc01daae5a5 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 92:4fc01daae5a5 53 #endif
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55
bogdanm 92:4fc01daae5a5 56 /** \brief No Operation
bogdanm 92:4fc01daae5a5 57
bogdanm 92:4fc01daae5a5 58 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 92:4fc01daae5a5 59 */
bogdanm 92:4fc01daae5a5 60 #define __NOP __nop
bogdanm 92:4fc01daae5a5 61
bogdanm 92:4fc01daae5a5 62
bogdanm 92:4fc01daae5a5 63 /** \brief Wait For Interrupt
bogdanm 92:4fc01daae5a5 64
bogdanm 92:4fc01daae5a5 65 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 92:4fc01daae5a5 66 until one of a number of events occurs.
bogdanm 92:4fc01daae5a5 67 */
bogdanm 92:4fc01daae5a5 68 #define __WFI __wfi
bogdanm 92:4fc01daae5a5 69
bogdanm 92:4fc01daae5a5 70
bogdanm 92:4fc01daae5a5 71 /** \brief Wait For Event
bogdanm 92:4fc01daae5a5 72
bogdanm 92:4fc01daae5a5 73 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 92:4fc01daae5a5 74 a low-power state until one of a number of events occurs.
bogdanm 92:4fc01daae5a5 75 */
bogdanm 92:4fc01daae5a5 76 #define __WFE __wfe
bogdanm 92:4fc01daae5a5 77
bogdanm 92:4fc01daae5a5 78
bogdanm 92:4fc01daae5a5 79 /** \brief Send Event
bogdanm 92:4fc01daae5a5 80
bogdanm 92:4fc01daae5a5 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 92:4fc01daae5a5 82 */
bogdanm 92:4fc01daae5a5 83 #define __SEV __sev
bogdanm 92:4fc01daae5a5 84
bogdanm 92:4fc01daae5a5 85
bogdanm 92:4fc01daae5a5 86 /** \brief Instruction Synchronization Barrier
bogdanm 92:4fc01daae5a5 87
bogdanm 92:4fc01daae5a5 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 92:4fc01daae5a5 89 so that all instructions following the ISB are fetched from cache or
bogdanm 92:4fc01daae5a5 90 memory, after the instruction has been completed.
bogdanm 92:4fc01daae5a5 91 */
Kojto 110:165afa46840b 92 #define __ISB() do {\
Kojto 110:165afa46840b 93 __schedule_barrier();\
Kojto 110:165afa46840b 94 __isb(0xF);\
Kojto 110:165afa46840b 95 __schedule_barrier();\
Kojto 110:165afa46840b 96 } while (0)
bogdanm 92:4fc01daae5a5 97
bogdanm 92:4fc01daae5a5 98 /** \brief Data Synchronization Barrier
bogdanm 92:4fc01daae5a5 99
bogdanm 92:4fc01daae5a5 100 This function acts as a special kind of Data Memory Barrier.
bogdanm 92:4fc01daae5a5 101 It completes when all explicit memory accesses before this instruction complete.
bogdanm 92:4fc01daae5a5 102 */
Kojto 110:165afa46840b 103 #define __DSB() do {\
Kojto 110:165afa46840b 104 __schedule_barrier();\
Kojto 110:165afa46840b 105 __dsb(0xF);\
Kojto 110:165afa46840b 106 __schedule_barrier();\
Kojto 110:165afa46840b 107 } while (0)
bogdanm 92:4fc01daae5a5 108
bogdanm 92:4fc01daae5a5 109 /** \brief Data Memory Barrier
bogdanm 92:4fc01daae5a5 110
bogdanm 92:4fc01daae5a5 111 This function ensures the apparent order of the explicit memory operations before
bogdanm 92:4fc01daae5a5 112 and after the instruction, without ensuring their completion.
bogdanm 92:4fc01daae5a5 113 */
Kojto 110:165afa46840b 114 #define __DMB() do {\
Kojto 110:165afa46840b 115 __schedule_barrier();\
Kojto 110:165afa46840b 116 __dmb(0xF);\
Kojto 110:165afa46840b 117 __schedule_barrier();\
Kojto 110:165afa46840b 118 } while (0)
bogdanm 92:4fc01daae5a5 119
bogdanm 92:4fc01daae5a5 120 /** \brief Reverse byte order (32 bit)
bogdanm 92:4fc01daae5a5 121
bogdanm 92:4fc01daae5a5 122 This function reverses the byte order in integer value.
bogdanm 92:4fc01daae5a5 123
bogdanm 92:4fc01daae5a5 124 \param [in] value Value to reverse
bogdanm 92:4fc01daae5a5 125 \return Reversed value
bogdanm 92:4fc01daae5a5 126 */
bogdanm 92:4fc01daae5a5 127 #define __REV __rev
bogdanm 92:4fc01daae5a5 128
bogdanm 92:4fc01daae5a5 129
bogdanm 92:4fc01daae5a5 130 /** \brief Reverse byte order (16 bit)
bogdanm 92:4fc01daae5a5 131
bogdanm 92:4fc01daae5a5 132 This function reverses the byte order in two unsigned short values.
bogdanm 92:4fc01daae5a5 133
bogdanm 92:4fc01daae5a5 134 \param [in] value Value to reverse
bogdanm 92:4fc01daae5a5 135 \return Reversed value
bogdanm 92:4fc01daae5a5 136 */
bogdanm 92:4fc01daae5a5 137 #ifndef __NO_EMBEDDED_ASM
bogdanm 92:4fc01daae5a5 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
bogdanm 92:4fc01daae5a5 139 {
bogdanm 92:4fc01daae5a5 140 rev16 r0, r0
bogdanm 92:4fc01daae5a5 141 bx lr
bogdanm 92:4fc01daae5a5 142 }
bogdanm 92:4fc01daae5a5 143 #endif
bogdanm 92:4fc01daae5a5 144
bogdanm 92:4fc01daae5a5 145 /** \brief Reverse byte order in signed short value
bogdanm 92:4fc01daae5a5 146
bogdanm 92:4fc01daae5a5 147 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 92:4fc01daae5a5 148
bogdanm 92:4fc01daae5a5 149 \param [in] value Value to reverse
bogdanm 92:4fc01daae5a5 150 \return Reversed value
bogdanm 92:4fc01daae5a5 151 */
bogdanm 92:4fc01daae5a5 152 #ifndef __NO_EMBEDDED_ASM
bogdanm 92:4fc01daae5a5 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
bogdanm 92:4fc01daae5a5 154 {
bogdanm 92:4fc01daae5a5 155 revsh r0, r0
bogdanm 92:4fc01daae5a5 156 bx lr
bogdanm 92:4fc01daae5a5 157 }
bogdanm 92:4fc01daae5a5 158 #endif
bogdanm 92:4fc01daae5a5 159
bogdanm 92:4fc01daae5a5 160
bogdanm 92:4fc01daae5a5 161 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 92:4fc01daae5a5 162
bogdanm 92:4fc01daae5a5 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 92:4fc01daae5a5 164
bogdanm 92:4fc01daae5a5 165 \param [in] value Value to rotate
bogdanm 92:4fc01daae5a5 166 \param [in] value Number of Bits to rotate
bogdanm 92:4fc01daae5a5 167 \return Rotated value
bogdanm 92:4fc01daae5a5 168 */
bogdanm 92:4fc01daae5a5 169 #define __ROR __ror
bogdanm 92:4fc01daae5a5 170
bogdanm 92:4fc01daae5a5 171
bogdanm 92:4fc01daae5a5 172 /** \brief Breakpoint
bogdanm 92:4fc01daae5a5 173
bogdanm 92:4fc01daae5a5 174 This function causes the processor to enter Debug state.
bogdanm 92:4fc01daae5a5 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 92:4fc01daae5a5 176
bogdanm 92:4fc01daae5a5 177 \param [in] value is ignored by the processor.
bogdanm 92:4fc01daae5a5 178 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 92:4fc01daae5a5 179 */
bogdanm 92:4fc01daae5a5 180 #define __BKPT(value) __breakpoint(value)
bogdanm 92:4fc01daae5a5 181
bogdanm 92:4fc01daae5a5 182
bogdanm 92:4fc01daae5a5 183 /** \brief Reverse bit order of value
bogdanm 92:4fc01daae5a5 184
bogdanm 92:4fc01daae5a5 185 This function reverses the bit order of the given value.
bogdanm 92:4fc01daae5a5 186
bogdanm 92:4fc01daae5a5 187 \param [in] value Value to reverse
bogdanm 92:4fc01daae5a5 188 \return Reversed value
bogdanm 92:4fc01daae5a5 189 */
Kojto 110:165afa46840b 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 110:165afa46840b 191 #define __RBIT __rbit
Kojto 110:165afa46840b 192 #else
Kojto 110:165afa46840b 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
Kojto 110:165afa46840b 194 {
Kojto 110:165afa46840b 195 uint32_t result;
Kojto 110:165afa46840b 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
bogdanm 92:4fc01daae5a5 197
Kojto 110:165afa46840b 198 result = value; // r will be reversed bits of v; first get LSB of v
Kojto 110:165afa46840b 199 for (value >>= 1; value; value >>= 1)
Kojto 110:165afa46840b 200 {
Kojto 110:165afa46840b 201 result <<= 1;
Kojto 110:165afa46840b 202 result |= value & 1;
Kojto 110:165afa46840b 203 s--;
Kojto 110:165afa46840b 204 }
Kojto 110:165afa46840b 205 result <<= s; // shift when v's highest bits are zero
Kojto 110:165afa46840b 206 return(result);
Kojto 110:165afa46840b 207 }
Kojto 110:165afa46840b 208 #endif
Kojto 110:165afa46840b 209
Kojto 110:165afa46840b 210
Kojto 110:165afa46840b 211 /** \brief Count leading zeros
Kojto 110:165afa46840b 212
Kojto 110:165afa46840b 213 This function counts the number of leading zeros of a data value.
Kojto 110:165afa46840b 214
Kojto 110:165afa46840b 215 \param [in] value Value to count the leading zeros
Kojto 110:165afa46840b 216 \return number of leading zeros in value
Kojto 110:165afa46840b 217 */
Kojto 110:165afa46840b 218 #define __CLZ __clz
Kojto 110:165afa46840b 219
Kojto 110:165afa46840b 220
Kojto 110:165afa46840b 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
bogdanm 92:4fc01daae5a5 222
bogdanm 92:4fc01daae5a5 223 /** \brief LDR Exclusive (8 bit)
bogdanm 92:4fc01daae5a5 224
Kojto 110:165afa46840b 225 This function executes a exclusive LDR instruction for 8 bit value.
bogdanm 92:4fc01daae5a5 226
bogdanm 92:4fc01daae5a5 227 \param [in] ptr Pointer to data
bogdanm 92:4fc01daae5a5 228 \return value of type uint8_t at (*ptr)
bogdanm 92:4fc01daae5a5 229 */
bogdanm 92:4fc01daae5a5 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
bogdanm 92:4fc01daae5a5 231
bogdanm 92:4fc01daae5a5 232
bogdanm 92:4fc01daae5a5 233 /** \brief LDR Exclusive (16 bit)
bogdanm 92:4fc01daae5a5 234
Kojto 110:165afa46840b 235 This function executes a exclusive LDR instruction for 16 bit values.
bogdanm 92:4fc01daae5a5 236
bogdanm 92:4fc01daae5a5 237 \param [in] ptr Pointer to data
bogdanm 92:4fc01daae5a5 238 \return value of type uint16_t at (*ptr)
bogdanm 92:4fc01daae5a5 239 */
bogdanm 92:4fc01daae5a5 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
bogdanm 92:4fc01daae5a5 241
bogdanm 92:4fc01daae5a5 242
bogdanm 92:4fc01daae5a5 243 /** \brief LDR Exclusive (32 bit)
bogdanm 92:4fc01daae5a5 244
Kojto 110:165afa46840b 245 This function executes a exclusive LDR instruction for 32 bit values.
bogdanm 92:4fc01daae5a5 246
bogdanm 92:4fc01daae5a5 247 \param [in] ptr Pointer to data
bogdanm 92:4fc01daae5a5 248 \return value of type uint32_t at (*ptr)
bogdanm 92:4fc01daae5a5 249 */
bogdanm 92:4fc01daae5a5 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
bogdanm 92:4fc01daae5a5 251
bogdanm 92:4fc01daae5a5 252
bogdanm 92:4fc01daae5a5 253 /** \brief STR Exclusive (8 bit)
bogdanm 92:4fc01daae5a5 254
Kojto 110:165afa46840b 255 This function executes a exclusive STR instruction for 8 bit values.
bogdanm 92:4fc01daae5a5 256
bogdanm 92:4fc01daae5a5 257 \param [in] value Value to store
bogdanm 92:4fc01daae5a5 258 \param [in] ptr Pointer to location
bogdanm 92:4fc01daae5a5 259 \return 0 Function succeeded
bogdanm 92:4fc01daae5a5 260 \return 1 Function failed
bogdanm 92:4fc01daae5a5 261 */
bogdanm 92:4fc01daae5a5 262 #define __STREXB(value, ptr) __strex(value, ptr)
bogdanm 92:4fc01daae5a5 263
bogdanm 92:4fc01daae5a5 264
bogdanm 92:4fc01daae5a5 265 /** \brief STR Exclusive (16 bit)
bogdanm 92:4fc01daae5a5 266
Kojto 110:165afa46840b 267 This function executes a exclusive STR instruction for 16 bit values.
bogdanm 92:4fc01daae5a5 268
bogdanm 92:4fc01daae5a5 269 \param [in] value Value to store
bogdanm 92:4fc01daae5a5 270 \param [in] ptr Pointer to location
bogdanm 92:4fc01daae5a5 271 \return 0 Function succeeded
bogdanm 92:4fc01daae5a5 272 \return 1 Function failed
bogdanm 92:4fc01daae5a5 273 */
bogdanm 92:4fc01daae5a5 274 #define __STREXH(value, ptr) __strex(value, ptr)
bogdanm 92:4fc01daae5a5 275
bogdanm 92:4fc01daae5a5 276
bogdanm 92:4fc01daae5a5 277 /** \brief STR Exclusive (32 bit)
bogdanm 92:4fc01daae5a5 278
Kojto 110:165afa46840b 279 This function executes a exclusive STR instruction for 32 bit values.
bogdanm 92:4fc01daae5a5 280
bogdanm 92:4fc01daae5a5 281 \param [in] value Value to store
bogdanm 92:4fc01daae5a5 282 \param [in] ptr Pointer to location
bogdanm 92:4fc01daae5a5 283 \return 0 Function succeeded
bogdanm 92:4fc01daae5a5 284 \return 1 Function failed
bogdanm 92:4fc01daae5a5 285 */
bogdanm 92:4fc01daae5a5 286 #define __STREXW(value, ptr) __strex(value, ptr)
bogdanm 92:4fc01daae5a5 287
bogdanm 92:4fc01daae5a5 288
bogdanm 92:4fc01daae5a5 289 /** \brief Remove the exclusive lock
bogdanm 92:4fc01daae5a5 290
bogdanm 92:4fc01daae5a5 291 This function removes the exclusive lock which is created by LDREX.
bogdanm 92:4fc01daae5a5 292
bogdanm 92:4fc01daae5a5 293 */
bogdanm 92:4fc01daae5a5 294 #define __CLREX __clrex
bogdanm 92:4fc01daae5a5 295
bogdanm 92:4fc01daae5a5 296
bogdanm 92:4fc01daae5a5 297 /** \brief Signed Saturate
bogdanm 92:4fc01daae5a5 298
bogdanm 92:4fc01daae5a5 299 This function saturates a signed value.
bogdanm 92:4fc01daae5a5 300
bogdanm 92:4fc01daae5a5 301 \param [in] value Value to be saturated
bogdanm 92:4fc01daae5a5 302 \param [in] sat Bit position to saturate to (1..32)
bogdanm 92:4fc01daae5a5 303 \return Saturated value
bogdanm 92:4fc01daae5a5 304 */
bogdanm 92:4fc01daae5a5 305 #define __SSAT __ssat
bogdanm 92:4fc01daae5a5 306
bogdanm 92:4fc01daae5a5 307
bogdanm 92:4fc01daae5a5 308 /** \brief Unsigned Saturate
bogdanm 92:4fc01daae5a5 309
bogdanm 92:4fc01daae5a5 310 This function saturates an unsigned value.
bogdanm 92:4fc01daae5a5 311
bogdanm 92:4fc01daae5a5 312 \param [in] value Value to be saturated
bogdanm 92:4fc01daae5a5 313 \param [in] sat Bit position to saturate to (0..31)
bogdanm 92:4fc01daae5a5 314 \return Saturated value
bogdanm 92:4fc01daae5a5 315 */
bogdanm 92:4fc01daae5a5 316 #define __USAT __usat
bogdanm 92:4fc01daae5a5 317
bogdanm 92:4fc01daae5a5 318
Kojto 110:165afa46840b 319 /** \brief Rotate Right with Extend (32 bit)
Kojto 110:165afa46840b 320
Kojto 110:165afa46840b 321 This function moves each bit of a bitstring right by one bit.
Kojto 110:165afa46840b 322 The carry input is shifted in at the left end of the bitstring.
bogdanm 92:4fc01daae5a5 323
Kojto 110:165afa46840b 324 \param [in] value Value to rotate
Kojto 110:165afa46840b 325 \return Rotated value
Kojto 110:165afa46840b 326 */
Kojto 110:165afa46840b 327 #ifndef __NO_EMBEDDED_ASM
Kojto 110:165afa46840b 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
Kojto 110:165afa46840b 329 {
Kojto 110:165afa46840b 330 rrx r0, r0
Kojto 110:165afa46840b 331 bx lr
Kojto 110:165afa46840b 332 }
Kojto 110:165afa46840b 333 #endif
Kojto 110:165afa46840b 334
bogdanm 92:4fc01daae5a5 335
Kojto 110:165afa46840b 336 /** \brief LDRT Unprivileged (8 bit)
Kojto 110:165afa46840b 337
Kojto 110:165afa46840b 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
Kojto 110:165afa46840b 339
Kojto 110:165afa46840b 340 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 341 \return value of type uint8_t at (*ptr)
bogdanm 92:4fc01daae5a5 342 */
Kojto 110:165afa46840b 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
Kojto 110:165afa46840b 344
Kojto 110:165afa46840b 345
Kojto 110:165afa46840b 346 /** \brief LDRT Unprivileged (16 bit)
bogdanm 92:4fc01daae5a5 347
Kojto 110:165afa46840b 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
Kojto 110:165afa46840b 349
Kojto 110:165afa46840b 350 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 351 \return value of type uint16_t at (*ptr)
Kojto 110:165afa46840b 352 */
Kojto 110:165afa46840b 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
bogdanm 92:4fc01daae5a5 354
bogdanm 92:4fc01daae5a5 355
Kojto 110:165afa46840b 356 /** \brief LDRT Unprivileged (32 bit)
bogdanm 92:4fc01daae5a5 357
Kojto 110:165afa46840b 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
Kojto 110:165afa46840b 359
Kojto 110:165afa46840b 360 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 361 \return value of type uint32_t at (*ptr)
Kojto 110:165afa46840b 362 */
Kojto 110:165afa46840b 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
Kojto 110:165afa46840b 364
bogdanm 92:4fc01daae5a5 365
Kojto 110:165afa46840b 366 /** \brief STRT Unprivileged (8 bit)
Kojto 110:165afa46840b 367
Kojto 110:165afa46840b 368 This function executes a Unprivileged STRT instruction for 8 bit values.
Kojto 110:165afa46840b 369
Kojto 110:165afa46840b 370 \param [in] value Value to store
Kojto 110:165afa46840b 371 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 372 */
Kojto 110:165afa46840b 373 #define __STRBT(value, ptr) __strt(value, ptr)
bogdanm 92:4fc01daae5a5 374
bogdanm 92:4fc01daae5a5 375
Kojto 110:165afa46840b 376 /** \brief STRT Unprivileged (16 bit)
Kojto 110:165afa46840b 377
Kojto 110:165afa46840b 378 This function executes a Unprivileged STRT instruction for 16 bit values.
Kojto 110:165afa46840b 379
Kojto 110:165afa46840b 380 \param [in] value Value to store
Kojto 110:165afa46840b 381 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 382 */
Kojto 110:165afa46840b 383 #define __STRHT(value, ptr) __strt(value, ptr)
Kojto 110:165afa46840b 384
bogdanm 92:4fc01daae5a5 385
Kojto 110:165afa46840b 386 /** \brief STRT Unprivileged (32 bit)
Kojto 110:165afa46840b 387
Kojto 110:165afa46840b 388 This function executes a Unprivileged STRT instruction for 32 bit values.
Kojto 110:165afa46840b 389
Kojto 110:165afa46840b 390 \param [in] value Value to store
Kojto 110:165afa46840b 391 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 392 */
Kojto 110:165afa46840b 393 #define __STRT(value, ptr) __strt(value, ptr)
Kojto 110:165afa46840b 394
Kojto 110:165afa46840b 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
bogdanm 92:4fc01daae5a5 396
bogdanm 92:4fc01daae5a5 397
bogdanm 92:4fc01daae5a5 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 92:4fc01daae5a5 399 /* GNU gcc specific functions */
bogdanm 92:4fc01daae5a5 400
bogdanm 92:4fc01daae5a5 401 /* Define macros for porting to both thumb1 and thumb2.
bogdanm 92:4fc01daae5a5 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
bogdanm 92:4fc01daae5a5 403 * Otherwise, use general registers, specified by constrant "r" */
bogdanm 92:4fc01daae5a5 404 #if defined (__thumb__) && !defined (__thumb2__)
bogdanm 92:4fc01daae5a5 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
bogdanm 92:4fc01daae5a5 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
bogdanm 92:4fc01daae5a5 407 #else
bogdanm 92:4fc01daae5a5 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
bogdanm 92:4fc01daae5a5 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
bogdanm 92:4fc01daae5a5 410 #endif
bogdanm 92:4fc01daae5a5 411
bogdanm 92:4fc01daae5a5 412 /** \brief No Operation
bogdanm 92:4fc01daae5a5 413
bogdanm 92:4fc01daae5a5 414 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 92:4fc01daae5a5 415 */
Kojto 110:165afa46840b 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
bogdanm 92:4fc01daae5a5 417 {
bogdanm 92:4fc01daae5a5 418 __ASM volatile ("nop");
bogdanm 92:4fc01daae5a5 419 }
bogdanm 92:4fc01daae5a5 420
bogdanm 92:4fc01daae5a5 421
bogdanm 92:4fc01daae5a5 422 /** \brief Wait For Interrupt
bogdanm 92:4fc01daae5a5 423
bogdanm 92:4fc01daae5a5 424 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 92:4fc01daae5a5 425 until one of a number of events occurs.
bogdanm 92:4fc01daae5a5 426 */
Kojto 110:165afa46840b 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
bogdanm 92:4fc01daae5a5 428 {
bogdanm 92:4fc01daae5a5 429 __ASM volatile ("wfi");
bogdanm 92:4fc01daae5a5 430 }
bogdanm 92:4fc01daae5a5 431
bogdanm 92:4fc01daae5a5 432
bogdanm 92:4fc01daae5a5 433 /** \brief Wait For Event
bogdanm 92:4fc01daae5a5 434
bogdanm 92:4fc01daae5a5 435 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 92:4fc01daae5a5 436 a low-power state until one of a number of events occurs.
bogdanm 92:4fc01daae5a5 437 */
Kojto 110:165afa46840b 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
bogdanm 92:4fc01daae5a5 439 {
bogdanm 92:4fc01daae5a5 440 __ASM volatile ("wfe");
bogdanm 92:4fc01daae5a5 441 }
bogdanm 92:4fc01daae5a5 442
bogdanm 92:4fc01daae5a5 443
bogdanm 92:4fc01daae5a5 444 /** \brief Send Event
bogdanm 92:4fc01daae5a5 445
bogdanm 92:4fc01daae5a5 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 92:4fc01daae5a5 447 */
Kojto 110:165afa46840b 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
bogdanm 92:4fc01daae5a5 449 {
bogdanm 92:4fc01daae5a5 450 __ASM volatile ("sev");
bogdanm 92:4fc01daae5a5 451 }
bogdanm 92:4fc01daae5a5 452
bogdanm 92:4fc01daae5a5 453
bogdanm 92:4fc01daae5a5 454 /** \brief Instruction Synchronization Barrier
bogdanm 92:4fc01daae5a5 455
bogdanm 92:4fc01daae5a5 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 92:4fc01daae5a5 457 so that all instructions following the ISB are fetched from cache or
bogdanm 92:4fc01daae5a5 458 memory, after the instruction has been completed.
bogdanm 92:4fc01daae5a5 459 */
Kojto 110:165afa46840b 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
bogdanm 92:4fc01daae5a5 461 {
Kojto 110:165afa46840b 462 __ASM volatile ("isb 0xF":::"memory");
bogdanm 92:4fc01daae5a5 463 }
bogdanm 92:4fc01daae5a5 464
bogdanm 92:4fc01daae5a5 465
bogdanm 92:4fc01daae5a5 466 /** \brief Data Synchronization Barrier
bogdanm 92:4fc01daae5a5 467
bogdanm 92:4fc01daae5a5 468 This function acts as a special kind of Data Memory Barrier.
bogdanm 92:4fc01daae5a5 469 It completes when all explicit memory accesses before this instruction complete.
bogdanm 92:4fc01daae5a5 470 */
Kojto 110:165afa46840b 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
bogdanm 92:4fc01daae5a5 472 {
Kojto 110:165afa46840b 473 __ASM volatile ("dsb 0xF":::"memory");
bogdanm 92:4fc01daae5a5 474 }
bogdanm 92:4fc01daae5a5 475
bogdanm 92:4fc01daae5a5 476
bogdanm 92:4fc01daae5a5 477 /** \brief Data Memory Barrier
bogdanm 92:4fc01daae5a5 478
bogdanm 92:4fc01daae5a5 479 This function ensures the apparent order of the explicit memory operations before
bogdanm 92:4fc01daae5a5 480 and after the instruction, without ensuring their completion.
bogdanm 92:4fc01daae5a5 481 */
Kojto 110:165afa46840b 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
bogdanm 92:4fc01daae5a5 483 {
Kojto 110:165afa46840b 484 __ASM volatile ("dmb 0xF":::"memory");
bogdanm 92:4fc01daae5a5 485 }
bogdanm 92:4fc01daae5a5 486
bogdanm 92:4fc01daae5a5 487
bogdanm 92:4fc01daae5a5 488 /** \brief Reverse byte order (32 bit)
bogdanm 92:4fc01daae5a5 489
bogdanm 92:4fc01daae5a5 490 This function reverses the byte order in integer value.
bogdanm 92:4fc01daae5a5 491
bogdanm 92:4fc01daae5a5 492 \param [in] value Value to reverse
bogdanm 92:4fc01daae5a5 493 \return Reversed value
bogdanm 92:4fc01daae5a5 494 */
Kojto 110:165afa46840b 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
bogdanm 92:4fc01daae5a5 496 {
bogdanm 92:4fc01daae5a5 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
bogdanm 92:4fc01daae5a5 498 return __builtin_bswap32(value);
bogdanm 92:4fc01daae5a5 499 #else
bogdanm 92:4fc01daae5a5 500 uint32_t result;
bogdanm 92:4fc01daae5a5 501
bogdanm 92:4fc01daae5a5 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 92:4fc01daae5a5 503 return(result);
bogdanm 92:4fc01daae5a5 504 #endif
bogdanm 92:4fc01daae5a5 505 }
bogdanm 92:4fc01daae5a5 506
bogdanm 92:4fc01daae5a5 507
bogdanm 92:4fc01daae5a5 508 /** \brief Reverse byte order (16 bit)
bogdanm 92:4fc01daae5a5 509
bogdanm 92:4fc01daae5a5 510 This function reverses the byte order in two unsigned short values.
bogdanm 92:4fc01daae5a5 511
bogdanm 92:4fc01daae5a5 512 \param [in] value Value to reverse
bogdanm 92:4fc01daae5a5 513 \return Reversed value
bogdanm 92:4fc01daae5a5 514 */
Kojto 110:165afa46840b 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
bogdanm 92:4fc01daae5a5 516 {
bogdanm 92:4fc01daae5a5 517 uint32_t result;
bogdanm 92:4fc01daae5a5 518
bogdanm 92:4fc01daae5a5 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 92:4fc01daae5a5 520 return(result);
bogdanm 92:4fc01daae5a5 521 }
bogdanm 92:4fc01daae5a5 522
bogdanm 92:4fc01daae5a5 523
bogdanm 92:4fc01daae5a5 524 /** \brief Reverse byte order in signed short value
bogdanm 92:4fc01daae5a5 525
bogdanm 92:4fc01daae5a5 526 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 92:4fc01daae5a5 527
bogdanm 92:4fc01daae5a5 528 \param [in] value Value to reverse
bogdanm 92:4fc01daae5a5 529 \return Reversed value
bogdanm 92:4fc01daae5a5 530 */
Kojto 110:165afa46840b 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
bogdanm 92:4fc01daae5a5 532 {
bogdanm 92:4fc01daae5a5 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 92:4fc01daae5a5 534 return (short)__builtin_bswap16(value);
bogdanm 92:4fc01daae5a5 535 #else
bogdanm 92:4fc01daae5a5 536 uint32_t result;
bogdanm 92:4fc01daae5a5 537
bogdanm 92:4fc01daae5a5 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 92:4fc01daae5a5 539 return(result);
bogdanm 92:4fc01daae5a5 540 #endif
bogdanm 92:4fc01daae5a5 541 }
bogdanm 92:4fc01daae5a5 542
bogdanm 92:4fc01daae5a5 543
bogdanm 92:4fc01daae5a5 544 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 92:4fc01daae5a5 545
bogdanm 92:4fc01daae5a5 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 92:4fc01daae5a5 547
bogdanm 92:4fc01daae5a5 548 \param [in] value Value to rotate
bogdanm 92:4fc01daae5a5 549 \param [in] value Number of Bits to rotate
bogdanm 92:4fc01daae5a5 550 \return Rotated value
bogdanm 92:4fc01daae5a5 551 */
Kojto 110:165afa46840b 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
bogdanm 92:4fc01daae5a5 553 {
Kojto 110:165afa46840b 554 return (op1 >> op2) | (op1 << (32 - op2));
bogdanm 92:4fc01daae5a5 555 }
bogdanm 92:4fc01daae5a5 556
bogdanm 92:4fc01daae5a5 557
bogdanm 92:4fc01daae5a5 558 /** \brief Breakpoint
bogdanm 92:4fc01daae5a5 559
bogdanm 92:4fc01daae5a5 560 This function causes the processor to enter Debug state.
bogdanm 92:4fc01daae5a5 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 92:4fc01daae5a5 562
bogdanm 92:4fc01daae5a5 563 \param [in] value is ignored by the processor.
bogdanm 92:4fc01daae5a5 564 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 92:4fc01daae5a5 565 */
bogdanm 92:4fc01daae5a5 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
bogdanm 92:4fc01daae5a5 567
bogdanm 92:4fc01daae5a5 568
bogdanm 92:4fc01daae5a5 569 /** \brief Reverse bit order of value
bogdanm 92:4fc01daae5a5 570
bogdanm 92:4fc01daae5a5 571 This function reverses the bit order of the given value.
bogdanm 92:4fc01daae5a5 572
bogdanm 92:4fc01daae5a5 573 \param [in] value Value to reverse
bogdanm 92:4fc01daae5a5 574 \return Reversed value
bogdanm 92:4fc01daae5a5 575 */
Kojto 110:165afa46840b 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
bogdanm 92:4fc01daae5a5 577 {
bogdanm 92:4fc01daae5a5 578 uint32_t result;
bogdanm 92:4fc01daae5a5 579
Kojto 110:165afa46840b 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
bogdanm 92:4fc01daae5a5 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
Kojto 110:165afa46840b 582 #else
Kojto 110:165afa46840b 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
Kojto 110:165afa46840b 584
Kojto 110:165afa46840b 585 result = value; // r will be reversed bits of v; first get LSB of v
Kojto 110:165afa46840b 586 for (value >>= 1; value; value >>= 1)
Kojto 110:165afa46840b 587 {
Kojto 110:165afa46840b 588 result <<= 1;
Kojto 110:165afa46840b 589 result |= value & 1;
Kojto 110:165afa46840b 590 s--;
Kojto 110:165afa46840b 591 }
Kojto 110:165afa46840b 592 result <<= s; // shift when v's highest bits are zero
Kojto 110:165afa46840b 593 #endif
Kojto 110:165afa46840b 594 return(result);
bogdanm 92:4fc01daae5a5 595 }
bogdanm 92:4fc01daae5a5 596
bogdanm 92:4fc01daae5a5 597
Kojto 110:165afa46840b 598 /** \brief Count leading zeros
Kojto 110:165afa46840b 599
Kojto 110:165afa46840b 600 This function counts the number of leading zeros of a data value.
Kojto 110:165afa46840b 601
Kojto 110:165afa46840b 602 \param [in] value Value to count the leading zeros
Kojto 110:165afa46840b 603 \return number of leading zeros in value
Kojto 110:165afa46840b 604 */
Kojto 110:165afa46840b 605 #define __CLZ __builtin_clz
Kojto 110:165afa46840b 606
Kojto 110:165afa46840b 607
Kojto 110:165afa46840b 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 110:165afa46840b 609
bogdanm 92:4fc01daae5a5 610 /** \brief LDR Exclusive (8 bit)
bogdanm 92:4fc01daae5a5 611
Kojto 110:165afa46840b 612 This function executes a exclusive LDR instruction for 8 bit value.
bogdanm 92:4fc01daae5a5 613
bogdanm 92:4fc01daae5a5 614 \param [in] ptr Pointer to data
bogdanm 92:4fc01daae5a5 615 \return value of type uint8_t at (*ptr)
bogdanm 92:4fc01daae5a5 616 */
Kojto 110:165afa46840b 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
bogdanm 92:4fc01daae5a5 618 {
bogdanm 92:4fc01daae5a5 619 uint32_t result;
bogdanm 92:4fc01daae5a5 620
bogdanm 92:4fc01daae5a5 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 92:4fc01daae5a5 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 92:4fc01daae5a5 623 #else
bogdanm 92:4fc01daae5a5 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 92:4fc01daae5a5 625 accepted by assembler. So has to use following less efficient pattern.
bogdanm 92:4fc01daae5a5 626 */
bogdanm 92:4fc01daae5a5 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 92:4fc01daae5a5 628 #endif
Kojto 110:165afa46840b 629 return ((uint8_t) result); /* Add explicit type cast here */
bogdanm 92:4fc01daae5a5 630 }
bogdanm 92:4fc01daae5a5 631
bogdanm 92:4fc01daae5a5 632
bogdanm 92:4fc01daae5a5 633 /** \brief LDR Exclusive (16 bit)
bogdanm 92:4fc01daae5a5 634
Kojto 110:165afa46840b 635 This function executes a exclusive LDR instruction for 16 bit values.
bogdanm 92:4fc01daae5a5 636
bogdanm 92:4fc01daae5a5 637 \param [in] ptr Pointer to data
bogdanm 92:4fc01daae5a5 638 \return value of type uint16_t at (*ptr)
bogdanm 92:4fc01daae5a5 639 */
Kojto 110:165afa46840b 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
bogdanm 92:4fc01daae5a5 641 {
bogdanm 92:4fc01daae5a5 642 uint32_t result;
bogdanm 92:4fc01daae5a5 643
bogdanm 92:4fc01daae5a5 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 92:4fc01daae5a5 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 92:4fc01daae5a5 646 #else
bogdanm 92:4fc01daae5a5 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 92:4fc01daae5a5 648 accepted by assembler. So has to use following less efficient pattern.
bogdanm 92:4fc01daae5a5 649 */
bogdanm 92:4fc01daae5a5 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 92:4fc01daae5a5 651 #endif
Kojto 110:165afa46840b 652 return ((uint16_t) result); /* Add explicit type cast here */
bogdanm 92:4fc01daae5a5 653 }
bogdanm 92:4fc01daae5a5 654
bogdanm 92:4fc01daae5a5 655
bogdanm 92:4fc01daae5a5 656 /** \brief LDR Exclusive (32 bit)
bogdanm 92:4fc01daae5a5 657
Kojto 110:165afa46840b 658 This function executes a exclusive LDR instruction for 32 bit values.
bogdanm 92:4fc01daae5a5 659
bogdanm 92:4fc01daae5a5 660 \param [in] ptr Pointer to data
bogdanm 92:4fc01daae5a5 661 \return value of type uint32_t at (*ptr)
bogdanm 92:4fc01daae5a5 662 */
Kojto 110:165afa46840b 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
bogdanm 92:4fc01daae5a5 664 {
bogdanm 92:4fc01daae5a5 665 uint32_t result;
bogdanm 92:4fc01daae5a5 666
bogdanm 92:4fc01daae5a5 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 92:4fc01daae5a5 668 return(result);
bogdanm 92:4fc01daae5a5 669 }
bogdanm 92:4fc01daae5a5 670
bogdanm 92:4fc01daae5a5 671
bogdanm 92:4fc01daae5a5 672 /** \brief STR Exclusive (8 bit)
bogdanm 92:4fc01daae5a5 673
Kojto 110:165afa46840b 674 This function executes a exclusive STR instruction for 8 bit values.
bogdanm 92:4fc01daae5a5 675
bogdanm 92:4fc01daae5a5 676 \param [in] value Value to store
bogdanm 92:4fc01daae5a5 677 \param [in] ptr Pointer to location
bogdanm 92:4fc01daae5a5 678 \return 0 Function succeeded
bogdanm 92:4fc01daae5a5 679 \return 1 Function failed
bogdanm 92:4fc01daae5a5 680 */
Kojto 110:165afa46840b 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
bogdanm 92:4fc01daae5a5 682 {
bogdanm 92:4fc01daae5a5 683 uint32_t result;
bogdanm 92:4fc01daae5a5 684
Kojto 110:165afa46840b 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
bogdanm 92:4fc01daae5a5 686 return(result);
bogdanm 92:4fc01daae5a5 687 }
bogdanm 92:4fc01daae5a5 688
bogdanm 92:4fc01daae5a5 689
bogdanm 92:4fc01daae5a5 690 /** \brief STR Exclusive (16 bit)
bogdanm 92:4fc01daae5a5 691
Kojto 110:165afa46840b 692 This function executes a exclusive STR instruction for 16 bit values.
bogdanm 92:4fc01daae5a5 693
bogdanm 92:4fc01daae5a5 694 \param [in] value Value to store
bogdanm 92:4fc01daae5a5 695 \param [in] ptr Pointer to location
bogdanm 92:4fc01daae5a5 696 \return 0 Function succeeded
bogdanm 92:4fc01daae5a5 697 \return 1 Function failed
bogdanm 92:4fc01daae5a5 698 */
Kojto 110:165afa46840b 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
bogdanm 92:4fc01daae5a5 700 {
bogdanm 92:4fc01daae5a5 701 uint32_t result;
bogdanm 92:4fc01daae5a5 702
Kojto 110:165afa46840b 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
bogdanm 92:4fc01daae5a5 704 return(result);
bogdanm 92:4fc01daae5a5 705 }
bogdanm 92:4fc01daae5a5 706
bogdanm 92:4fc01daae5a5 707
bogdanm 92:4fc01daae5a5 708 /** \brief STR Exclusive (32 bit)
bogdanm 92:4fc01daae5a5 709
Kojto 110:165afa46840b 710 This function executes a exclusive STR instruction for 32 bit values.
bogdanm 92:4fc01daae5a5 711
bogdanm 92:4fc01daae5a5 712 \param [in] value Value to store
bogdanm 92:4fc01daae5a5 713 \param [in] ptr Pointer to location
bogdanm 92:4fc01daae5a5 714 \return 0 Function succeeded
bogdanm 92:4fc01daae5a5 715 \return 1 Function failed
bogdanm 92:4fc01daae5a5 716 */
Kojto 110:165afa46840b 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
bogdanm 92:4fc01daae5a5 718 {
bogdanm 92:4fc01daae5a5 719 uint32_t result;
bogdanm 92:4fc01daae5a5 720
bogdanm 92:4fc01daae5a5 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 92:4fc01daae5a5 722 return(result);
bogdanm 92:4fc01daae5a5 723 }
bogdanm 92:4fc01daae5a5 724
bogdanm 92:4fc01daae5a5 725
bogdanm 92:4fc01daae5a5 726 /** \brief Remove the exclusive lock
bogdanm 92:4fc01daae5a5 727
bogdanm 92:4fc01daae5a5 728 This function removes the exclusive lock which is created by LDREX.
bogdanm 92:4fc01daae5a5 729
bogdanm 92:4fc01daae5a5 730 */
Kojto 110:165afa46840b 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
bogdanm 92:4fc01daae5a5 732 {
bogdanm 92:4fc01daae5a5 733 __ASM volatile ("clrex" ::: "memory");
bogdanm 92:4fc01daae5a5 734 }
bogdanm 92:4fc01daae5a5 735
bogdanm 92:4fc01daae5a5 736
bogdanm 92:4fc01daae5a5 737 /** \brief Signed Saturate
bogdanm 92:4fc01daae5a5 738
bogdanm 92:4fc01daae5a5 739 This function saturates a signed value.
bogdanm 92:4fc01daae5a5 740
bogdanm 92:4fc01daae5a5 741 \param [in] value Value to be saturated
bogdanm 92:4fc01daae5a5 742 \param [in] sat Bit position to saturate to (1..32)
bogdanm 92:4fc01daae5a5 743 \return Saturated value
bogdanm 92:4fc01daae5a5 744 */
bogdanm 92:4fc01daae5a5 745 #define __SSAT(ARG1,ARG2) \
bogdanm 92:4fc01daae5a5 746 ({ \
bogdanm 92:4fc01daae5a5 747 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 92:4fc01daae5a5 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 92:4fc01daae5a5 749 __RES; \
bogdanm 92:4fc01daae5a5 750 })
bogdanm 92:4fc01daae5a5 751
bogdanm 92:4fc01daae5a5 752
bogdanm 92:4fc01daae5a5 753 /** \brief Unsigned Saturate
bogdanm 92:4fc01daae5a5 754
bogdanm 92:4fc01daae5a5 755 This function saturates an unsigned value.
bogdanm 92:4fc01daae5a5 756
bogdanm 92:4fc01daae5a5 757 \param [in] value Value to be saturated
bogdanm 92:4fc01daae5a5 758 \param [in] sat Bit position to saturate to (0..31)
bogdanm 92:4fc01daae5a5 759 \return Saturated value
bogdanm 92:4fc01daae5a5 760 */
bogdanm 92:4fc01daae5a5 761 #define __USAT(ARG1,ARG2) \
bogdanm 92:4fc01daae5a5 762 ({ \
bogdanm 92:4fc01daae5a5 763 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 92:4fc01daae5a5 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 92:4fc01daae5a5 765 __RES; \
bogdanm 92:4fc01daae5a5 766 })
bogdanm 92:4fc01daae5a5 767
bogdanm 92:4fc01daae5a5 768
Kojto 110:165afa46840b 769 /** \brief Rotate Right with Extend (32 bit)
bogdanm 92:4fc01daae5a5 770
Kojto 110:165afa46840b 771 This function moves each bit of a bitstring right by one bit.
Kojto 110:165afa46840b 772 The carry input is shifted in at the left end of the bitstring.
bogdanm 92:4fc01daae5a5 773
Kojto 110:165afa46840b 774 \param [in] value Value to rotate
Kojto 110:165afa46840b 775 \return Rotated value
bogdanm 92:4fc01daae5a5 776 */
Kojto 110:165afa46840b 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
bogdanm 92:4fc01daae5a5 778 {
Kojto 110:165afa46840b 779 uint32_t result;
bogdanm 92:4fc01daae5a5 780
Kojto 110:165afa46840b 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 92:4fc01daae5a5 782 return(result);
bogdanm 92:4fc01daae5a5 783 }
bogdanm 92:4fc01daae5a5 784
Kojto 110:165afa46840b 785
Kojto 110:165afa46840b 786 /** \brief LDRT Unprivileged (8 bit)
Kojto 110:165afa46840b 787
Kojto 110:165afa46840b 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
Kojto 110:165afa46840b 789
Kojto 110:165afa46840b 790 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 791 \return value of type uint8_t at (*ptr)
Kojto 110:165afa46840b 792 */
Kojto 110:165afa46840b 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
Kojto 110:165afa46840b 794 {
Kojto 110:165afa46840b 795 uint32_t result;
Kojto 110:165afa46840b 796
Kojto 110:165afa46840b 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 110:165afa46840b 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 110:165afa46840b 799 #else
Kojto 110:165afa46840b 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Kojto 110:165afa46840b 801 accepted by assembler. So has to use following less efficient pattern.
Kojto 110:165afa46840b 802 */
Kojto 110:165afa46840b 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Kojto 110:165afa46840b 804 #endif
Kojto 110:165afa46840b 805 return ((uint8_t) result); /* Add explicit type cast here */
Kojto 110:165afa46840b 806 }
Kojto 110:165afa46840b 807
Kojto 110:165afa46840b 808
Kojto 110:165afa46840b 809 /** \brief LDRT Unprivileged (16 bit)
Kojto 110:165afa46840b 810
Kojto 110:165afa46840b 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
Kojto 110:165afa46840b 812
Kojto 110:165afa46840b 813 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 814 \return value of type uint16_t at (*ptr)
Kojto 110:165afa46840b 815 */
Kojto 110:165afa46840b 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
Kojto 110:165afa46840b 817 {
Kojto 110:165afa46840b 818 uint32_t result;
Kojto 110:165afa46840b 819
Kojto 110:165afa46840b 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 110:165afa46840b 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 110:165afa46840b 822 #else
Kojto 110:165afa46840b 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Kojto 110:165afa46840b 824 accepted by assembler. So has to use following less efficient pattern.
Kojto 110:165afa46840b 825 */
Kojto 110:165afa46840b 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Kojto 110:165afa46840b 827 #endif
Kojto 110:165afa46840b 828 return ((uint16_t) result); /* Add explicit type cast here */
Kojto 110:165afa46840b 829 }
bogdanm 92:4fc01daae5a5 830
bogdanm 92:4fc01daae5a5 831
Kojto 110:165afa46840b 832 /** \brief LDRT Unprivileged (32 bit)
Kojto 110:165afa46840b 833
Kojto 110:165afa46840b 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
Kojto 110:165afa46840b 835
Kojto 110:165afa46840b 836 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 837 \return value of type uint32_t at (*ptr)
Kojto 110:165afa46840b 838 */
Kojto 110:165afa46840b 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
Kojto 110:165afa46840b 840 {
Kojto 110:165afa46840b 841 uint32_t result;
Kojto 110:165afa46840b 842
Kojto 110:165afa46840b 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 110:165afa46840b 844 return(result);
Kojto 110:165afa46840b 845 }
Kojto 110:165afa46840b 846
Kojto 110:165afa46840b 847
Kojto 110:165afa46840b 848 /** \brief STRT Unprivileged (8 bit)
Kojto 110:165afa46840b 849
Kojto 110:165afa46840b 850 This function executes a Unprivileged STRT instruction for 8 bit values.
Kojto 110:165afa46840b 851
Kojto 110:165afa46840b 852 \param [in] value Value to store
Kojto 110:165afa46840b 853 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 854 */
Kojto 110:165afa46840b 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
Kojto 110:165afa46840b 856 {
Kojto 110:165afa46840b 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
Kojto 110:165afa46840b 858 }
Kojto 110:165afa46840b 859
Kojto 110:165afa46840b 860
Kojto 110:165afa46840b 861 /** \brief STRT Unprivileged (16 bit)
Kojto 110:165afa46840b 862
Kojto 110:165afa46840b 863 This function executes a Unprivileged STRT instruction for 16 bit values.
Kojto 110:165afa46840b 864
Kojto 110:165afa46840b 865 \param [in] value Value to store
Kojto 110:165afa46840b 866 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 867 */
Kojto 110:165afa46840b 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
Kojto 110:165afa46840b 869 {
Kojto 110:165afa46840b 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
Kojto 110:165afa46840b 871 }
Kojto 110:165afa46840b 872
Kojto 110:165afa46840b 873
Kojto 110:165afa46840b 874 /** \brief STRT Unprivileged (32 bit)
Kojto 110:165afa46840b 875
Kojto 110:165afa46840b 876 This function executes a Unprivileged STRT instruction for 32 bit values.
Kojto 110:165afa46840b 877
Kojto 110:165afa46840b 878 \param [in] value Value to store
Kojto 110:165afa46840b 879 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 880 */
Kojto 110:165afa46840b 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
Kojto 110:165afa46840b 882 {
Kojto 110:165afa46840b 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
Kojto 110:165afa46840b 884 }
Kojto 110:165afa46840b 885
Kojto 110:165afa46840b 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Kojto 110:165afa46840b 887
Kojto 110:165afa46840b 888
Kojto 110:165afa46840b 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 110:165afa46840b 890 /* IAR iccarm specific functions */
Kojto 110:165afa46840b 891 #include <cmsis_iar.h>
Kojto 110:165afa46840b 892
Kojto 110:165afa46840b 893
Kojto 110:165afa46840b 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 110:165afa46840b 895 /* TI CCS specific functions */
Kojto 110:165afa46840b 896 #include <cmsis_ccs.h>
bogdanm 92:4fc01daae5a5 897
bogdanm 92:4fc01daae5a5 898
bogdanm 92:4fc01daae5a5 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 92:4fc01daae5a5 900 /* TASKING carm specific functions */
bogdanm 92:4fc01daae5a5 901 /*
bogdanm 92:4fc01daae5a5 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 92:4fc01daae5a5 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 92:4fc01daae5a5 904 * Including the CMSIS ones.
bogdanm 92:4fc01daae5a5 905 */
bogdanm 92:4fc01daae5a5 906
Kojto 110:165afa46840b 907
Kojto 110:165afa46840b 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 110:165afa46840b 909 /* Cosmic specific functions */
Kojto 110:165afa46840b 910 #include <cmsis_csm.h>
Kojto 110:165afa46840b 911
bogdanm 92:4fc01daae5a5 912 #endif
bogdanm 92:4fc01daae5a5 913
bogdanm 92:4fc01daae5a5 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
bogdanm 92:4fc01daae5a5 915
bogdanm 92:4fc01daae5a5 916 #endif /* __CORE_CMINSTR_H */