mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_LPC1549/core_cmInstr.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
110:165afa46840b 
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 79:0c05e21ae27e 1 /**************************************************************************//**
emilmont 79:0c05e21ae27e 2 * @file core_cmInstr.h
emilmont 79:0c05e21ae27e 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
Kojto 110:165afa46840b 4 * @version V4.10
Kojto 110:165afa46840b 5 * @date 18. March 2015
emilmont 79:0c05e21ae27e 6 *
emilmont 79:0c05e21ae27e 7 * @note
emilmont 79:0c05e21ae27e 8 *
emilmont 79:0c05e21ae27e 9 ******************************************************************************/
Kojto 110:165afa46840b 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
emilmont 79:0c05e21ae27e 11
emilmont 79:0c05e21ae27e 12 All rights reserved.
emilmont 79:0c05e21ae27e 13 Redistribution and use in source and binary forms, with or without
emilmont 79:0c05e21ae27e 14 modification, are permitted provided that the following conditions are met:
emilmont 79:0c05e21ae27e 15 - Redistributions of source code must retain the above copyright
emilmont 79:0c05e21ae27e 16 notice, this list of conditions and the following disclaimer.
emilmont 79:0c05e21ae27e 17 - Redistributions in binary form must reproduce the above copyright
emilmont 79:0c05e21ae27e 18 notice, this list of conditions and the following disclaimer in the
emilmont 79:0c05e21ae27e 19 documentation and/or other materials provided with the distribution.
emilmont 79:0c05e21ae27e 20 - Neither the name of ARM nor the names of its contributors may be used
emilmont 79:0c05e21ae27e 21 to endorse or promote products derived from this software without
emilmont 79:0c05e21ae27e 22 specific prior written permission.
emilmont 79:0c05e21ae27e 23 *
emilmont 79:0c05e21ae27e 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 79:0c05e21ae27e 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 79:0c05e21ae27e 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
emilmont 79:0c05e21ae27e 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
emilmont 79:0c05e21ae27e 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
emilmont 79:0c05e21ae27e 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
emilmont 79:0c05e21ae27e 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
emilmont 79:0c05e21ae27e 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
emilmont 79:0c05e21ae27e 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
emilmont 79:0c05e21ae27e 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emilmont 79:0c05e21ae27e 34 POSSIBILITY OF SUCH DAMAGE.
emilmont 79:0c05e21ae27e 35 ---------------------------------------------------------------------------*/
emilmont 79:0c05e21ae27e 36
emilmont 79:0c05e21ae27e 37
emilmont 79:0c05e21ae27e 38 #ifndef __CORE_CMINSTR_H
emilmont 79:0c05e21ae27e 39 #define __CORE_CMINSTR_H
emilmont 79:0c05e21ae27e 40
emilmont 79:0c05e21ae27e 41
emilmont 79:0c05e21ae27e 42 /* ########################## Core Instruction Access ######################### */
emilmont 79:0c05e21ae27e 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
emilmont 79:0c05e21ae27e 44 Access to dedicated instructions
emilmont 79:0c05e21ae27e 45 @{
emilmont 79:0c05e21ae27e 46 */
emilmont 79:0c05e21ae27e 47
emilmont 79:0c05e21ae27e 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
emilmont 79:0c05e21ae27e 49 /* ARM armcc specific functions */
emilmont 79:0c05e21ae27e 50
emilmont 79:0c05e21ae27e 51 #if (__ARMCC_VERSION < 400677)
emilmont 79:0c05e21ae27e 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
emilmont 79:0c05e21ae27e 53 #endif
emilmont 79:0c05e21ae27e 54
emilmont 79:0c05e21ae27e 55
emilmont 79:0c05e21ae27e 56 /** \brief No Operation
emilmont 79:0c05e21ae27e 57
emilmont 79:0c05e21ae27e 58 No Operation does nothing. This instruction can be used for code alignment purposes.
emilmont 79:0c05e21ae27e 59 */
emilmont 79:0c05e21ae27e 60 #define __NOP __nop
emilmont 79:0c05e21ae27e 61
emilmont 79:0c05e21ae27e 62
emilmont 79:0c05e21ae27e 63 /** \brief Wait For Interrupt
emilmont 79:0c05e21ae27e 64
emilmont 79:0c05e21ae27e 65 Wait For Interrupt is a hint instruction that suspends execution
emilmont 79:0c05e21ae27e 66 until one of a number of events occurs.
emilmont 79:0c05e21ae27e 67 */
emilmont 79:0c05e21ae27e 68 #define __WFI __wfi
emilmont 79:0c05e21ae27e 69
emilmont 79:0c05e21ae27e 70
emilmont 79:0c05e21ae27e 71 /** \brief Wait For Event
emilmont 79:0c05e21ae27e 72
emilmont 79:0c05e21ae27e 73 Wait For Event is a hint instruction that permits the processor to enter
emilmont 79:0c05e21ae27e 74 a low-power state until one of a number of events occurs.
emilmont 79:0c05e21ae27e 75 */
emilmont 79:0c05e21ae27e 76 #define __WFE __wfe
emilmont 79:0c05e21ae27e 77
emilmont 79:0c05e21ae27e 78
emilmont 79:0c05e21ae27e 79 /** \brief Send Event
emilmont 79:0c05e21ae27e 80
emilmont 79:0c05e21ae27e 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
emilmont 79:0c05e21ae27e 82 */
emilmont 79:0c05e21ae27e 83 #define __SEV __sev
emilmont 79:0c05e21ae27e 84
emilmont 79:0c05e21ae27e 85
emilmont 79:0c05e21ae27e 86 /** \brief Instruction Synchronization Barrier
emilmont 79:0c05e21ae27e 87
emilmont 79:0c05e21ae27e 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
emilmont 79:0c05e21ae27e 89 so that all instructions following the ISB are fetched from cache or
emilmont 79:0c05e21ae27e 90 memory, after the instruction has been completed.
emilmont 79:0c05e21ae27e 91 */
Kojto 110:165afa46840b 92 #define __ISB() do {\
Kojto 110:165afa46840b 93 __schedule_barrier();\
Kojto 110:165afa46840b 94 __isb(0xF);\
Kojto 110:165afa46840b 95 __schedule_barrier();\
Kojto 110:165afa46840b 96 } while (0)
emilmont 79:0c05e21ae27e 97
emilmont 79:0c05e21ae27e 98 /** \brief Data Synchronization Barrier
emilmont 79:0c05e21ae27e 99
emilmont 79:0c05e21ae27e 100 This function acts as a special kind of Data Memory Barrier.
emilmont 79:0c05e21ae27e 101 It completes when all explicit memory accesses before this instruction complete.
emilmont 79:0c05e21ae27e 102 */
Kojto 110:165afa46840b 103 #define __DSB() do {\
Kojto 110:165afa46840b 104 __schedule_barrier();\
Kojto 110:165afa46840b 105 __dsb(0xF);\
Kojto 110:165afa46840b 106 __schedule_barrier();\
Kojto 110:165afa46840b 107 } while (0)
emilmont 79:0c05e21ae27e 108
emilmont 79:0c05e21ae27e 109 /** \brief Data Memory Barrier
emilmont 79:0c05e21ae27e 110
emilmont 79:0c05e21ae27e 111 This function ensures the apparent order of the explicit memory operations before
emilmont 79:0c05e21ae27e 112 and after the instruction, without ensuring their completion.
emilmont 79:0c05e21ae27e 113 */
Kojto 110:165afa46840b 114 #define __DMB() do {\
Kojto 110:165afa46840b 115 __schedule_barrier();\
Kojto 110:165afa46840b 116 __dmb(0xF);\
Kojto 110:165afa46840b 117 __schedule_barrier();\
Kojto 110:165afa46840b 118 } while (0)
emilmont 79:0c05e21ae27e 119
emilmont 79:0c05e21ae27e 120 /** \brief Reverse byte order (32 bit)
emilmont 79:0c05e21ae27e 121
emilmont 79:0c05e21ae27e 122 This function reverses the byte order in integer value.
emilmont 79:0c05e21ae27e 123
emilmont 79:0c05e21ae27e 124 \param [in] value Value to reverse
emilmont 79:0c05e21ae27e 125 \return Reversed value
emilmont 79:0c05e21ae27e 126 */
emilmont 79:0c05e21ae27e 127 #define __REV __rev
emilmont 79:0c05e21ae27e 128
emilmont 79:0c05e21ae27e 129
emilmont 79:0c05e21ae27e 130 /** \brief Reverse byte order (16 bit)
emilmont 79:0c05e21ae27e 131
emilmont 79:0c05e21ae27e 132 This function reverses the byte order in two unsigned short values.
emilmont 79:0c05e21ae27e 133
emilmont 79:0c05e21ae27e 134 \param [in] value Value to reverse
emilmont 79:0c05e21ae27e 135 \return Reversed value
emilmont 79:0c05e21ae27e 136 */
emilmont 79:0c05e21ae27e 137 #ifndef __NO_EMBEDDED_ASM
emilmont 79:0c05e21ae27e 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
emilmont 79:0c05e21ae27e 139 {
emilmont 79:0c05e21ae27e 140 rev16 r0, r0
emilmont 79:0c05e21ae27e 141 bx lr
emilmont 79:0c05e21ae27e 142 }
emilmont 79:0c05e21ae27e 143 #endif
emilmont 79:0c05e21ae27e 144
emilmont 79:0c05e21ae27e 145 /** \brief Reverse byte order in signed short value
emilmont 79:0c05e21ae27e 146
emilmont 79:0c05e21ae27e 147 This function reverses the byte order in a signed short value with sign extension to integer.
emilmont 79:0c05e21ae27e 148
emilmont 79:0c05e21ae27e 149 \param [in] value Value to reverse
emilmont 79:0c05e21ae27e 150 \return Reversed value
emilmont 79:0c05e21ae27e 151 */
emilmont 79:0c05e21ae27e 152 #ifndef __NO_EMBEDDED_ASM
emilmont 79:0c05e21ae27e 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
emilmont 79:0c05e21ae27e 154 {
emilmont 79:0c05e21ae27e 155 revsh r0, r0
emilmont 79:0c05e21ae27e 156 bx lr
emilmont 79:0c05e21ae27e 157 }
emilmont 79:0c05e21ae27e 158 #endif
emilmont 79:0c05e21ae27e 159
emilmont 79:0c05e21ae27e 160
emilmont 79:0c05e21ae27e 161 /** \brief Rotate Right in unsigned value (32 bit)
emilmont 79:0c05e21ae27e 162
emilmont 79:0c05e21ae27e 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
emilmont 79:0c05e21ae27e 164
emilmont 79:0c05e21ae27e 165 \param [in] value Value to rotate
emilmont 79:0c05e21ae27e 166 \param [in] value Number of Bits to rotate
emilmont 79:0c05e21ae27e 167 \return Rotated value
emilmont 79:0c05e21ae27e 168 */
emilmont 79:0c05e21ae27e 169 #define __ROR __ror
emilmont 79:0c05e21ae27e 170
emilmont 79:0c05e21ae27e 171
emilmont 79:0c05e21ae27e 172 /** \brief Breakpoint
emilmont 79:0c05e21ae27e 173
emilmont 79:0c05e21ae27e 174 This function causes the processor to enter Debug state.
emilmont 79:0c05e21ae27e 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
emilmont 79:0c05e21ae27e 176
emilmont 79:0c05e21ae27e 177 \param [in] value is ignored by the processor.
emilmont 79:0c05e21ae27e 178 If required, a debugger can use it to store additional information about the breakpoint.
emilmont 79:0c05e21ae27e 179 */
emilmont 79:0c05e21ae27e 180 #define __BKPT(value) __breakpoint(value)
emilmont 79:0c05e21ae27e 181
emilmont 79:0c05e21ae27e 182
emilmont 79:0c05e21ae27e 183 /** \brief Reverse bit order of value
emilmont 79:0c05e21ae27e 184
emilmont 79:0c05e21ae27e 185 This function reverses the bit order of the given value.
emilmont 79:0c05e21ae27e 186
emilmont 79:0c05e21ae27e 187 \param [in] value Value to reverse
emilmont 79:0c05e21ae27e 188 \return Reversed value
emilmont 79:0c05e21ae27e 189 */
Kojto 110:165afa46840b 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 110:165afa46840b 191 #define __RBIT __rbit
Kojto 110:165afa46840b 192 #else
Kojto 110:165afa46840b 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
Kojto 110:165afa46840b 194 {
Kojto 110:165afa46840b 195 uint32_t result;
Kojto 110:165afa46840b 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
emilmont 79:0c05e21ae27e 197
Kojto 110:165afa46840b 198 result = value; // r will be reversed bits of v; first get LSB of v
Kojto 110:165afa46840b 199 for (value >>= 1; value; value >>= 1)
Kojto 110:165afa46840b 200 {
Kojto 110:165afa46840b 201 result <<= 1;
Kojto 110:165afa46840b 202 result |= value & 1;
Kojto 110:165afa46840b 203 s--;
Kojto 110:165afa46840b 204 }
Kojto 110:165afa46840b 205 result <<= s; // shift when v's highest bits are zero
Kojto 110:165afa46840b 206 return(result);
Kojto 110:165afa46840b 207 }
Kojto 110:165afa46840b 208 #endif
Kojto 110:165afa46840b 209
Kojto 110:165afa46840b 210
Kojto 110:165afa46840b 211 /** \brief Count leading zeros
Kojto 110:165afa46840b 212
Kojto 110:165afa46840b 213 This function counts the number of leading zeros of a data value.
Kojto 110:165afa46840b 214
Kojto 110:165afa46840b 215 \param [in] value Value to count the leading zeros
Kojto 110:165afa46840b 216 \return number of leading zeros in value
Kojto 110:165afa46840b 217 */
Kojto 110:165afa46840b 218 #define __CLZ __clz
Kojto 110:165afa46840b 219
Kojto 110:165afa46840b 220
Kojto 110:165afa46840b 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
emilmont 79:0c05e21ae27e 222
emilmont 79:0c05e21ae27e 223 /** \brief LDR Exclusive (8 bit)
emilmont 79:0c05e21ae27e 224
Kojto 110:165afa46840b 225 This function executes a exclusive LDR instruction for 8 bit value.
emilmont 79:0c05e21ae27e 226
emilmont 79:0c05e21ae27e 227 \param [in] ptr Pointer to data
emilmont 79:0c05e21ae27e 228 \return value of type uint8_t at (*ptr)
emilmont 79:0c05e21ae27e 229 */
emilmont 79:0c05e21ae27e 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
emilmont 79:0c05e21ae27e 231
emilmont 79:0c05e21ae27e 232
emilmont 79:0c05e21ae27e 233 /** \brief LDR Exclusive (16 bit)
emilmont 79:0c05e21ae27e 234
Kojto 110:165afa46840b 235 This function executes a exclusive LDR instruction for 16 bit values.
emilmont 79:0c05e21ae27e 236
emilmont 79:0c05e21ae27e 237 \param [in] ptr Pointer to data
emilmont 79:0c05e21ae27e 238 \return value of type uint16_t at (*ptr)
emilmont 79:0c05e21ae27e 239 */
emilmont 79:0c05e21ae27e 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
emilmont 79:0c05e21ae27e 241
emilmont 79:0c05e21ae27e 242
emilmont 79:0c05e21ae27e 243 /** \brief LDR Exclusive (32 bit)
emilmont 79:0c05e21ae27e 244
Kojto 110:165afa46840b 245 This function executes a exclusive LDR instruction for 32 bit values.
emilmont 79:0c05e21ae27e 246
emilmont 79:0c05e21ae27e 247 \param [in] ptr Pointer to data
emilmont 79:0c05e21ae27e 248 \return value of type uint32_t at (*ptr)
emilmont 79:0c05e21ae27e 249 */
emilmont 79:0c05e21ae27e 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
emilmont 79:0c05e21ae27e 251
emilmont 79:0c05e21ae27e 252
emilmont 79:0c05e21ae27e 253 /** \brief STR Exclusive (8 bit)
emilmont 79:0c05e21ae27e 254
Kojto 110:165afa46840b 255 This function executes a exclusive STR instruction for 8 bit values.
emilmont 79:0c05e21ae27e 256
emilmont 79:0c05e21ae27e 257 \param [in] value Value to store
emilmont 79:0c05e21ae27e 258 \param [in] ptr Pointer to location
emilmont 79:0c05e21ae27e 259 \return 0 Function succeeded
emilmont 79:0c05e21ae27e 260 \return 1 Function failed
emilmont 79:0c05e21ae27e 261 */
emilmont 79:0c05e21ae27e 262 #define __STREXB(value, ptr) __strex(value, ptr)
emilmont 79:0c05e21ae27e 263
emilmont 79:0c05e21ae27e 264
emilmont 79:0c05e21ae27e 265 /** \brief STR Exclusive (16 bit)
emilmont 79:0c05e21ae27e 266
Kojto 110:165afa46840b 267 This function executes a exclusive STR instruction for 16 bit values.
emilmont 79:0c05e21ae27e 268
emilmont 79:0c05e21ae27e 269 \param [in] value Value to store
emilmont 79:0c05e21ae27e 270 \param [in] ptr Pointer to location
emilmont 79:0c05e21ae27e 271 \return 0 Function succeeded
emilmont 79:0c05e21ae27e 272 \return 1 Function failed
emilmont 79:0c05e21ae27e 273 */
emilmont 79:0c05e21ae27e 274 #define __STREXH(value, ptr) __strex(value, ptr)
emilmont 79:0c05e21ae27e 275
emilmont 79:0c05e21ae27e 276
emilmont 79:0c05e21ae27e 277 /** \brief STR Exclusive (32 bit)
emilmont 79:0c05e21ae27e 278
Kojto 110:165afa46840b 279 This function executes a exclusive STR instruction for 32 bit values.
emilmont 79:0c05e21ae27e 280
emilmont 79:0c05e21ae27e 281 \param [in] value Value to store
emilmont 79:0c05e21ae27e 282 \param [in] ptr Pointer to location
emilmont 79:0c05e21ae27e 283 \return 0 Function succeeded
emilmont 79:0c05e21ae27e 284 \return 1 Function failed
emilmont 79:0c05e21ae27e 285 */
emilmont 79:0c05e21ae27e 286 #define __STREXW(value, ptr) __strex(value, ptr)
emilmont 79:0c05e21ae27e 287
emilmont 79:0c05e21ae27e 288
emilmont 79:0c05e21ae27e 289 /** \brief Remove the exclusive lock
emilmont 79:0c05e21ae27e 290
emilmont 79:0c05e21ae27e 291 This function removes the exclusive lock which is created by LDREX.
emilmont 79:0c05e21ae27e 292
emilmont 79:0c05e21ae27e 293 */
emilmont 79:0c05e21ae27e 294 #define __CLREX __clrex
emilmont 79:0c05e21ae27e 295
emilmont 79:0c05e21ae27e 296
emilmont 79:0c05e21ae27e 297 /** \brief Signed Saturate
emilmont 79:0c05e21ae27e 298
emilmont 79:0c05e21ae27e 299 This function saturates a signed value.
emilmont 79:0c05e21ae27e 300
emilmont 79:0c05e21ae27e 301 \param [in] value Value to be saturated
emilmont 79:0c05e21ae27e 302 \param [in] sat Bit position to saturate to (1..32)
emilmont 79:0c05e21ae27e 303 \return Saturated value
emilmont 79:0c05e21ae27e 304 */
emilmont 79:0c05e21ae27e 305 #define __SSAT __ssat
emilmont 79:0c05e21ae27e 306
emilmont 79:0c05e21ae27e 307
emilmont 79:0c05e21ae27e 308 /** \brief Unsigned Saturate
emilmont 79:0c05e21ae27e 309
emilmont 79:0c05e21ae27e 310 This function saturates an unsigned value.
emilmont 79:0c05e21ae27e 311
emilmont 79:0c05e21ae27e 312 \param [in] value Value to be saturated
emilmont 79:0c05e21ae27e 313 \param [in] sat Bit position to saturate to (0..31)
emilmont 79:0c05e21ae27e 314 \return Saturated value
emilmont 79:0c05e21ae27e 315 */
emilmont 79:0c05e21ae27e 316 #define __USAT __usat
emilmont 79:0c05e21ae27e 317
emilmont 79:0c05e21ae27e 318
Kojto 110:165afa46840b 319 /** \brief Rotate Right with Extend (32 bit)
Kojto 110:165afa46840b 320
Kojto 110:165afa46840b 321 This function moves each bit of a bitstring right by one bit.
Kojto 110:165afa46840b 322 The carry input is shifted in at the left end of the bitstring.
emilmont 79:0c05e21ae27e 323
Kojto 110:165afa46840b 324 \param [in] value Value to rotate
Kojto 110:165afa46840b 325 \return Rotated value
Kojto 110:165afa46840b 326 */
Kojto 110:165afa46840b 327 #ifndef __NO_EMBEDDED_ASM
Kojto 110:165afa46840b 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
Kojto 110:165afa46840b 329 {
Kojto 110:165afa46840b 330 rrx r0, r0
Kojto 110:165afa46840b 331 bx lr
Kojto 110:165afa46840b 332 }
Kojto 110:165afa46840b 333 #endif
Kojto 110:165afa46840b 334
emilmont 79:0c05e21ae27e 335
Kojto 110:165afa46840b 336 /** \brief LDRT Unprivileged (8 bit)
Kojto 110:165afa46840b 337
Kojto 110:165afa46840b 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
Kojto 110:165afa46840b 339
Kojto 110:165afa46840b 340 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 341 \return value of type uint8_t at (*ptr)
emilmont 79:0c05e21ae27e 342 */
Kojto 110:165afa46840b 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
Kojto 110:165afa46840b 344
Kojto 110:165afa46840b 345
Kojto 110:165afa46840b 346 /** \brief LDRT Unprivileged (16 bit)
emilmont 79:0c05e21ae27e 347
Kojto 110:165afa46840b 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
Kojto 110:165afa46840b 349
Kojto 110:165afa46840b 350 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 351 \return value of type uint16_t at (*ptr)
Kojto 110:165afa46840b 352 */
Kojto 110:165afa46840b 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
emilmont 79:0c05e21ae27e 354
emilmont 79:0c05e21ae27e 355
Kojto 110:165afa46840b 356 /** \brief LDRT Unprivileged (32 bit)
emilmont 79:0c05e21ae27e 357
Kojto 110:165afa46840b 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
Kojto 110:165afa46840b 359
Kojto 110:165afa46840b 360 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 361 \return value of type uint32_t at (*ptr)
Kojto 110:165afa46840b 362 */
Kojto 110:165afa46840b 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
Kojto 110:165afa46840b 364
emilmont 79:0c05e21ae27e 365
Kojto 110:165afa46840b 366 /** \brief STRT Unprivileged (8 bit)
Kojto 110:165afa46840b 367
Kojto 110:165afa46840b 368 This function executes a Unprivileged STRT instruction for 8 bit values.
Kojto 110:165afa46840b 369
Kojto 110:165afa46840b 370 \param [in] value Value to store
Kojto 110:165afa46840b 371 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 372 */
Kojto 110:165afa46840b 373 #define __STRBT(value, ptr) __strt(value, ptr)
emilmont 79:0c05e21ae27e 374
emilmont 79:0c05e21ae27e 375
Kojto 110:165afa46840b 376 /** \brief STRT Unprivileged (16 bit)
Kojto 110:165afa46840b 377
Kojto 110:165afa46840b 378 This function executes a Unprivileged STRT instruction for 16 bit values.
Kojto 110:165afa46840b 379
Kojto 110:165afa46840b 380 \param [in] value Value to store
Kojto 110:165afa46840b 381 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 382 */
Kojto 110:165afa46840b 383 #define __STRHT(value, ptr) __strt(value, ptr)
Kojto 110:165afa46840b 384
emilmont 79:0c05e21ae27e 385
Kojto 110:165afa46840b 386 /** \brief STRT Unprivileged (32 bit)
Kojto 110:165afa46840b 387
Kojto 110:165afa46840b 388 This function executes a Unprivileged STRT instruction for 32 bit values.
Kojto 110:165afa46840b 389
Kojto 110:165afa46840b 390 \param [in] value Value to store
Kojto 110:165afa46840b 391 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 392 */
Kojto 110:165afa46840b 393 #define __STRT(value, ptr) __strt(value, ptr)
Kojto 110:165afa46840b 394
Kojto 110:165afa46840b 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
emilmont 79:0c05e21ae27e 396
emilmont 79:0c05e21ae27e 397
emilmont 79:0c05e21ae27e 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
emilmont 79:0c05e21ae27e 399 /* GNU gcc specific functions */
emilmont 79:0c05e21ae27e 400
emilmont 79:0c05e21ae27e 401 /* Define macros for porting to both thumb1 and thumb2.
emilmont 79:0c05e21ae27e 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
emilmont 79:0c05e21ae27e 403 * Otherwise, use general registers, specified by constrant "r" */
emilmont 79:0c05e21ae27e 404 #if defined (__thumb__) && !defined (__thumb2__)
emilmont 79:0c05e21ae27e 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
emilmont 79:0c05e21ae27e 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
emilmont 79:0c05e21ae27e 407 #else
emilmont 79:0c05e21ae27e 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
emilmont 79:0c05e21ae27e 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
emilmont 79:0c05e21ae27e 410 #endif
emilmont 79:0c05e21ae27e 411
emilmont 79:0c05e21ae27e 412 /** \brief No Operation
emilmont 79:0c05e21ae27e 413
emilmont 79:0c05e21ae27e 414 No Operation does nothing. This instruction can be used for code alignment purposes.
emilmont 79:0c05e21ae27e 415 */
Kojto 110:165afa46840b 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
emilmont 79:0c05e21ae27e 417 {
emilmont 79:0c05e21ae27e 418 __ASM volatile ("nop");
emilmont 79:0c05e21ae27e 419 }
emilmont 79:0c05e21ae27e 420
emilmont 79:0c05e21ae27e 421
emilmont 79:0c05e21ae27e 422 /** \brief Wait For Interrupt
emilmont 79:0c05e21ae27e 423
emilmont 79:0c05e21ae27e 424 Wait For Interrupt is a hint instruction that suspends execution
emilmont 79:0c05e21ae27e 425 until one of a number of events occurs.
emilmont 79:0c05e21ae27e 426 */
Kojto 110:165afa46840b 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
emilmont 79:0c05e21ae27e 428 {
emilmont 79:0c05e21ae27e 429 __ASM volatile ("wfi");
emilmont 79:0c05e21ae27e 430 }
emilmont 79:0c05e21ae27e 431
emilmont 79:0c05e21ae27e 432
emilmont 79:0c05e21ae27e 433 /** \brief Wait For Event
emilmont 79:0c05e21ae27e 434
emilmont 79:0c05e21ae27e 435 Wait For Event is a hint instruction that permits the processor to enter
emilmont 79:0c05e21ae27e 436 a low-power state until one of a number of events occurs.
emilmont 79:0c05e21ae27e 437 */
Kojto 110:165afa46840b 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
emilmont 79:0c05e21ae27e 439 {
emilmont 79:0c05e21ae27e 440 __ASM volatile ("wfe");
emilmont 79:0c05e21ae27e 441 }
emilmont 79:0c05e21ae27e 442
emilmont 79:0c05e21ae27e 443
emilmont 79:0c05e21ae27e 444 /** \brief Send Event
emilmont 79:0c05e21ae27e 445
emilmont 79:0c05e21ae27e 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
emilmont 79:0c05e21ae27e 447 */
Kojto 110:165afa46840b 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
emilmont 79:0c05e21ae27e 449 {
emilmont 79:0c05e21ae27e 450 __ASM volatile ("sev");
emilmont 79:0c05e21ae27e 451 }
emilmont 79:0c05e21ae27e 452
emilmont 79:0c05e21ae27e 453
emilmont 79:0c05e21ae27e 454 /** \brief Instruction Synchronization Barrier
emilmont 79:0c05e21ae27e 455
emilmont 79:0c05e21ae27e 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
emilmont 79:0c05e21ae27e 457 so that all instructions following the ISB are fetched from cache or
emilmont 79:0c05e21ae27e 458 memory, after the instruction has been completed.
emilmont 79:0c05e21ae27e 459 */
Kojto 110:165afa46840b 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
emilmont 79:0c05e21ae27e 461 {
Kojto 110:165afa46840b 462 __ASM volatile ("isb 0xF":::"memory");
emilmont 79:0c05e21ae27e 463 }
emilmont 79:0c05e21ae27e 464
emilmont 79:0c05e21ae27e 465
emilmont 79:0c05e21ae27e 466 /** \brief Data Synchronization Barrier
emilmont 79:0c05e21ae27e 467
emilmont 79:0c05e21ae27e 468 This function acts as a special kind of Data Memory Barrier.
emilmont 79:0c05e21ae27e 469 It completes when all explicit memory accesses before this instruction complete.
emilmont 79:0c05e21ae27e 470 */
Kojto 110:165afa46840b 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
emilmont 79:0c05e21ae27e 472 {
Kojto 110:165afa46840b 473 __ASM volatile ("dsb 0xF":::"memory");
emilmont 79:0c05e21ae27e 474 }
emilmont 79:0c05e21ae27e 475
emilmont 79:0c05e21ae27e 476
emilmont 79:0c05e21ae27e 477 /** \brief Data Memory Barrier
emilmont 79:0c05e21ae27e 478
emilmont 79:0c05e21ae27e 479 This function ensures the apparent order of the explicit memory operations before
emilmont 79:0c05e21ae27e 480 and after the instruction, without ensuring their completion.
emilmont 79:0c05e21ae27e 481 */
Kojto 110:165afa46840b 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
emilmont 79:0c05e21ae27e 483 {
Kojto 110:165afa46840b 484 __ASM volatile ("dmb 0xF":::"memory");
emilmont 79:0c05e21ae27e 485 }
emilmont 79:0c05e21ae27e 486
emilmont 79:0c05e21ae27e 487
emilmont 79:0c05e21ae27e 488 /** \brief Reverse byte order (32 bit)
emilmont 79:0c05e21ae27e 489
emilmont 79:0c05e21ae27e 490 This function reverses the byte order in integer value.
emilmont 79:0c05e21ae27e 491
emilmont 79:0c05e21ae27e 492 \param [in] value Value to reverse
emilmont 79:0c05e21ae27e 493 \return Reversed value
emilmont 79:0c05e21ae27e 494 */
Kojto 110:165afa46840b 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
emilmont 79:0c05e21ae27e 496 {
emilmont 79:0c05e21ae27e 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
emilmont 79:0c05e21ae27e 498 return __builtin_bswap32(value);
emilmont 79:0c05e21ae27e 499 #else
emilmont 79:0c05e21ae27e 500 uint32_t result;
emilmont 79:0c05e21ae27e 501
emilmont 79:0c05e21ae27e 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emilmont 79:0c05e21ae27e 503 return(result);
emilmont 79:0c05e21ae27e 504 #endif
emilmont 79:0c05e21ae27e 505 }
emilmont 79:0c05e21ae27e 506
emilmont 79:0c05e21ae27e 507
emilmont 79:0c05e21ae27e 508 /** \brief Reverse byte order (16 bit)
emilmont 79:0c05e21ae27e 509
emilmont 79:0c05e21ae27e 510 This function reverses the byte order in two unsigned short values.
emilmont 79:0c05e21ae27e 511
emilmont 79:0c05e21ae27e 512 \param [in] value Value to reverse
emilmont 79:0c05e21ae27e 513 \return Reversed value
emilmont 79:0c05e21ae27e 514 */
Kojto 110:165afa46840b 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
emilmont 79:0c05e21ae27e 516 {
emilmont 79:0c05e21ae27e 517 uint32_t result;
emilmont 79:0c05e21ae27e 518
emilmont 79:0c05e21ae27e 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emilmont 79:0c05e21ae27e 520 return(result);
emilmont 79:0c05e21ae27e 521 }
emilmont 79:0c05e21ae27e 522
emilmont 79:0c05e21ae27e 523
emilmont 79:0c05e21ae27e 524 /** \brief Reverse byte order in signed short value
emilmont 79:0c05e21ae27e 525
emilmont 79:0c05e21ae27e 526 This function reverses the byte order in a signed short value with sign extension to integer.
emilmont 79:0c05e21ae27e 527
emilmont 79:0c05e21ae27e 528 \param [in] value Value to reverse
emilmont 79:0c05e21ae27e 529 \return Reversed value
emilmont 79:0c05e21ae27e 530 */
Kojto 110:165afa46840b 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
emilmont 79:0c05e21ae27e 532 {
emilmont 79:0c05e21ae27e 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
emilmont 79:0c05e21ae27e 534 return (short)__builtin_bswap16(value);
emilmont 79:0c05e21ae27e 535 #else
emilmont 79:0c05e21ae27e 536 uint32_t result;
emilmont 79:0c05e21ae27e 537
emilmont 79:0c05e21ae27e 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emilmont 79:0c05e21ae27e 539 return(result);
emilmont 79:0c05e21ae27e 540 #endif
emilmont 79:0c05e21ae27e 541 }
emilmont 79:0c05e21ae27e 542
emilmont 79:0c05e21ae27e 543
emilmont 79:0c05e21ae27e 544 /** \brief Rotate Right in unsigned value (32 bit)
emilmont 79:0c05e21ae27e 545
emilmont 79:0c05e21ae27e 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
emilmont 79:0c05e21ae27e 547
emilmont 79:0c05e21ae27e 548 \param [in] value Value to rotate
emilmont 79:0c05e21ae27e 549 \param [in] value Number of Bits to rotate
emilmont 79:0c05e21ae27e 550 \return Rotated value
emilmont 79:0c05e21ae27e 551 */
Kojto 110:165afa46840b 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
emilmont 79:0c05e21ae27e 553 {
Kojto 110:165afa46840b 554 return (op1 >> op2) | (op1 << (32 - op2));
emilmont 79:0c05e21ae27e 555 }
emilmont 79:0c05e21ae27e 556
emilmont 79:0c05e21ae27e 557
emilmont 79:0c05e21ae27e 558 /** \brief Breakpoint
emilmont 79:0c05e21ae27e 559
emilmont 79:0c05e21ae27e 560 This function causes the processor to enter Debug state.
emilmont 79:0c05e21ae27e 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
emilmont 79:0c05e21ae27e 562
emilmont 79:0c05e21ae27e 563 \param [in] value is ignored by the processor.
emilmont 79:0c05e21ae27e 564 If required, a debugger can use it to store additional information about the breakpoint.
emilmont 79:0c05e21ae27e 565 */
emilmont 79:0c05e21ae27e 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
emilmont 79:0c05e21ae27e 567
emilmont 79:0c05e21ae27e 568
emilmont 79:0c05e21ae27e 569 /** \brief Reverse bit order of value
emilmont 79:0c05e21ae27e 570
emilmont 79:0c05e21ae27e 571 This function reverses the bit order of the given value.
emilmont 79:0c05e21ae27e 572
emilmont 79:0c05e21ae27e 573 \param [in] value Value to reverse
emilmont 79:0c05e21ae27e 574 \return Reversed value
emilmont 79:0c05e21ae27e 575 */
Kojto 110:165afa46840b 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
emilmont 79:0c05e21ae27e 577 {
emilmont 79:0c05e21ae27e 578 uint32_t result;
emilmont 79:0c05e21ae27e 579
Kojto 110:165afa46840b 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
emilmont 79:0c05e21ae27e 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
Kojto 110:165afa46840b 582 #else
Kojto 110:165afa46840b 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
Kojto 110:165afa46840b 584
Kojto 110:165afa46840b 585 result = value; // r will be reversed bits of v; first get LSB of v
Kojto 110:165afa46840b 586 for (value >>= 1; value; value >>= 1)
Kojto 110:165afa46840b 587 {
Kojto 110:165afa46840b 588 result <<= 1;
Kojto 110:165afa46840b 589 result |= value & 1;
Kojto 110:165afa46840b 590 s--;
Kojto 110:165afa46840b 591 }
Kojto 110:165afa46840b 592 result <<= s; // shift when v's highest bits are zero
Kojto 110:165afa46840b 593 #endif
Kojto 110:165afa46840b 594 return(result);
emilmont 79:0c05e21ae27e 595 }
emilmont 79:0c05e21ae27e 596
emilmont 79:0c05e21ae27e 597
Kojto 110:165afa46840b 598 /** \brief Count leading zeros
Kojto 110:165afa46840b 599
Kojto 110:165afa46840b 600 This function counts the number of leading zeros of a data value.
Kojto 110:165afa46840b 601
Kojto 110:165afa46840b 602 \param [in] value Value to count the leading zeros
Kojto 110:165afa46840b 603 \return number of leading zeros in value
Kojto 110:165afa46840b 604 */
Kojto 110:165afa46840b 605 #define __CLZ __builtin_clz
Kojto 110:165afa46840b 606
Kojto 110:165afa46840b 607
Kojto 110:165afa46840b 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 110:165afa46840b 609
emilmont 79:0c05e21ae27e 610 /** \brief LDR Exclusive (8 bit)
emilmont 79:0c05e21ae27e 611
Kojto 110:165afa46840b 612 This function executes a exclusive LDR instruction for 8 bit value.
emilmont 79:0c05e21ae27e 613
emilmont 79:0c05e21ae27e 614 \param [in] ptr Pointer to data
emilmont 79:0c05e21ae27e 615 \return value of type uint8_t at (*ptr)
emilmont 79:0c05e21ae27e 616 */
Kojto 110:165afa46840b 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
emilmont 79:0c05e21ae27e 618 {
emilmont 79:0c05e21ae27e 619 uint32_t result;
emilmont 79:0c05e21ae27e 620
emilmont 79:0c05e21ae27e 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
emilmont 79:0c05e21ae27e 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
emilmont 79:0c05e21ae27e 623 #else
emilmont 79:0c05e21ae27e 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
emilmont 79:0c05e21ae27e 625 accepted by assembler. So has to use following less efficient pattern.
emilmont 79:0c05e21ae27e 626 */
emilmont 79:0c05e21ae27e 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
emilmont 79:0c05e21ae27e 628 #endif
Kojto 110:165afa46840b 629 return ((uint8_t) result); /* Add explicit type cast here */
emilmont 79:0c05e21ae27e 630 }
emilmont 79:0c05e21ae27e 631
emilmont 79:0c05e21ae27e 632
emilmont 79:0c05e21ae27e 633 /** \brief LDR Exclusive (16 bit)
emilmont 79:0c05e21ae27e 634
Kojto 110:165afa46840b 635 This function executes a exclusive LDR instruction for 16 bit values.
emilmont 79:0c05e21ae27e 636
emilmont 79:0c05e21ae27e 637 \param [in] ptr Pointer to data
emilmont 79:0c05e21ae27e 638 \return value of type uint16_t at (*ptr)
emilmont 79:0c05e21ae27e 639 */
Kojto 110:165afa46840b 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
emilmont 79:0c05e21ae27e 641 {
emilmont 79:0c05e21ae27e 642 uint32_t result;
emilmont 79:0c05e21ae27e 643
emilmont 79:0c05e21ae27e 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
emilmont 79:0c05e21ae27e 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
emilmont 79:0c05e21ae27e 646 #else
emilmont 79:0c05e21ae27e 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
emilmont 79:0c05e21ae27e 648 accepted by assembler. So has to use following less efficient pattern.
emilmont 79:0c05e21ae27e 649 */
emilmont 79:0c05e21ae27e 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
emilmont 79:0c05e21ae27e 651 #endif
Kojto 110:165afa46840b 652 return ((uint16_t) result); /* Add explicit type cast here */
emilmont 79:0c05e21ae27e 653 }
emilmont 79:0c05e21ae27e 654
emilmont 79:0c05e21ae27e 655
emilmont 79:0c05e21ae27e 656 /** \brief LDR Exclusive (32 bit)
emilmont 79:0c05e21ae27e 657
Kojto 110:165afa46840b 658 This function executes a exclusive LDR instruction for 32 bit values.
emilmont 79:0c05e21ae27e 659
emilmont 79:0c05e21ae27e 660 \param [in] ptr Pointer to data
emilmont 79:0c05e21ae27e 661 \return value of type uint32_t at (*ptr)
emilmont 79:0c05e21ae27e 662 */
Kojto 110:165afa46840b 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
emilmont 79:0c05e21ae27e 664 {
emilmont 79:0c05e21ae27e 665 uint32_t result;
emilmont 79:0c05e21ae27e 666
emilmont 79:0c05e21ae27e 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
emilmont 79:0c05e21ae27e 668 return(result);
emilmont 79:0c05e21ae27e 669 }
emilmont 79:0c05e21ae27e 670
emilmont 79:0c05e21ae27e 671
emilmont 79:0c05e21ae27e 672 /** \brief STR Exclusive (8 bit)
emilmont 79:0c05e21ae27e 673
Kojto 110:165afa46840b 674 This function executes a exclusive STR instruction for 8 bit values.
emilmont 79:0c05e21ae27e 675
emilmont 79:0c05e21ae27e 676 \param [in] value Value to store
emilmont 79:0c05e21ae27e 677 \param [in] ptr Pointer to location
emilmont 79:0c05e21ae27e 678 \return 0 Function succeeded
emilmont 79:0c05e21ae27e 679 \return 1 Function failed
emilmont 79:0c05e21ae27e 680 */
Kojto 110:165afa46840b 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
emilmont 79:0c05e21ae27e 682 {
emilmont 79:0c05e21ae27e 683 uint32_t result;
emilmont 79:0c05e21ae27e 684
Kojto 110:165afa46840b 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
emilmont 79:0c05e21ae27e 686 return(result);
emilmont 79:0c05e21ae27e 687 }
emilmont 79:0c05e21ae27e 688
emilmont 79:0c05e21ae27e 689
emilmont 79:0c05e21ae27e 690 /** \brief STR Exclusive (16 bit)
emilmont 79:0c05e21ae27e 691
Kojto 110:165afa46840b 692 This function executes a exclusive STR instruction for 16 bit values.
emilmont 79:0c05e21ae27e 693
emilmont 79:0c05e21ae27e 694 \param [in] value Value to store
emilmont 79:0c05e21ae27e 695 \param [in] ptr Pointer to location
emilmont 79:0c05e21ae27e 696 \return 0 Function succeeded
emilmont 79:0c05e21ae27e 697 \return 1 Function failed
emilmont 79:0c05e21ae27e 698 */
Kojto 110:165afa46840b 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
emilmont 79:0c05e21ae27e 700 {
emilmont 79:0c05e21ae27e 701 uint32_t result;
emilmont 79:0c05e21ae27e 702
Kojto 110:165afa46840b 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
emilmont 79:0c05e21ae27e 704 return(result);
emilmont 79:0c05e21ae27e 705 }
emilmont 79:0c05e21ae27e 706
emilmont 79:0c05e21ae27e 707
emilmont 79:0c05e21ae27e 708 /** \brief STR Exclusive (32 bit)
emilmont 79:0c05e21ae27e 709
Kojto 110:165afa46840b 710 This function executes a exclusive STR instruction for 32 bit values.
emilmont 79:0c05e21ae27e 711
emilmont 79:0c05e21ae27e 712 \param [in] value Value to store
emilmont 79:0c05e21ae27e 713 \param [in] ptr Pointer to location
emilmont 79:0c05e21ae27e 714 \return 0 Function succeeded
emilmont 79:0c05e21ae27e 715 \return 1 Function failed
emilmont 79:0c05e21ae27e 716 */
Kojto 110:165afa46840b 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
emilmont 79:0c05e21ae27e 718 {
emilmont 79:0c05e21ae27e 719 uint32_t result;
emilmont 79:0c05e21ae27e 720
emilmont 79:0c05e21ae27e 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
emilmont 79:0c05e21ae27e 722 return(result);
emilmont 79:0c05e21ae27e 723 }
emilmont 79:0c05e21ae27e 724
emilmont 79:0c05e21ae27e 725
emilmont 79:0c05e21ae27e 726 /** \brief Remove the exclusive lock
emilmont 79:0c05e21ae27e 727
emilmont 79:0c05e21ae27e 728 This function removes the exclusive lock which is created by LDREX.
emilmont 79:0c05e21ae27e 729
emilmont 79:0c05e21ae27e 730 */
Kojto 110:165afa46840b 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
emilmont 79:0c05e21ae27e 732 {
emilmont 79:0c05e21ae27e 733 __ASM volatile ("clrex" ::: "memory");
emilmont 79:0c05e21ae27e 734 }
emilmont 79:0c05e21ae27e 735
emilmont 79:0c05e21ae27e 736
emilmont 79:0c05e21ae27e 737 /** \brief Signed Saturate
emilmont 79:0c05e21ae27e 738
emilmont 79:0c05e21ae27e 739 This function saturates a signed value.
emilmont 79:0c05e21ae27e 740
emilmont 79:0c05e21ae27e 741 \param [in] value Value to be saturated
emilmont 79:0c05e21ae27e 742 \param [in] sat Bit position to saturate to (1..32)
emilmont 79:0c05e21ae27e 743 \return Saturated value
emilmont 79:0c05e21ae27e 744 */
emilmont 79:0c05e21ae27e 745 #define __SSAT(ARG1,ARG2) \
emilmont 79:0c05e21ae27e 746 ({ \
emilmont 79:0c05e21ae27e 747 uint32_t __RES, __ARG1 = (ARG1); \
emilmont 79:0c05e21ae27e 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
emilmont 79:0c05e21ae27e 749 __RES; \
emilmont 79:0c05e21ae27e 750 })
emilmont 79:0c05e21ae27e 751
emilmont 79:0c05e21ae27e 752
emilmont 79:0c05e21ae27e 753 /** \brief Unsigned Saturate
emilmont 79:0c05e21ae27e 754
emilmont 79:0c05e21ae27e 755 This function saturates an unsigned value.
emilmont 79:0c05e21ae27e 756
emilmont 79:0c05e21ae27e 757 \param [in] value Value to be saturated
emilmont 79:0c05e21ae27e 758 \param [in] sat Bit position to saturate to (0..31)
emilmont 79:0c05e21ae27e 759 \return Saturated value
emilmont 79:0c05e21ae27e 760 */
emilmont 79:0c05e21ae27e 761 #define __USAT(ARG1,ARG2) \
emilmont 79:0c05e21ae27e 762 ({ \
emilmont 79:0c05e21ae27e 763 uint32_t __RES, __ARG1 = (ARG1); \
emilmont 79:0c05e21ae27e 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
emilmont 79:0c05e21ae27e 765 __RES; \
emilmont 79:0c05e21ae27e 766 })
emilmont 79:0c05e21ae27e 767
emilmont 79:0c05e21ae27e 768
Kojto 110:165afa46840b 769 /** \brief Rotate Right with Extend (32 bit)
emilmont 79:0c05e21ae27e 770
Kojto 110:165afa46840b 771 This function moves each bit of a bitstring right by one bit.
Kojto 110:165afa46840b 772 The carry input is shifted in at the left end of the bitstring.
emilmont 79:0c05e21ae27e 773
Kojto 110:165afa46840b 774 \param [in] value Value to rotate
Kojto 110:165afa46840b 775 \return Rotated value
emilmont 79:0c05e21ae27e 776 */
Kojto 110:165afa46840b 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
emilmont 79:0c05e21ae27e 778 {
Kojto 110:165afa46840b 779 uint32_t result;
emilmont 79:0c05e21ae27e 780
Kojto 110:165afa46840b 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emilmont 79:0c05e21ae27e 782 return(result);
emilmont 79:0c05e21ae27e 783 }
emilmont 79:0c05e21ae27e 784
Kojto 110:165afa46840b 785
Kojto 110:165afa46840b 786 /** \brief LDRT Unprivileged (8 bit)
Kojto 110:165afa46840b 787
Kojto 110:165afa46840b 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
Kojto 110:165afa46840b 789
Kojto 110:165afa46840b 790 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 791 \return value of type uint8_t at (*ptr)
Kojto 110:165afa46840b 792 */
Kojto 110:165afa46840b 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
Kojto 110:165afa46840b 794 {
Kojto 110:165afa46840b 795 uint32_t result;
Kojto 110:165afa46840b 796
Kojto 110:165afa46840b 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 110:165afa46840b 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 110:165afa46840b 799 #else
Kojto 110:165afa46840b 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Kojto 110:165afa46840b 801 accepted by assembler. So has to use following less efficient pattern.
Kojto 110:165afa46840b 802 */
Kojto 110:165afa46840b 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Kojto 110:165afa46840b 804 #endif
Kojto 110:165afa46840b 805 return ((uint8_t) result); /* Add explicit type cast here */
Kojto 110:165afa46840b 806 }
Kojto 110:165afa46840b 807
Kojto 110:165afa46840b 808
Kojto 110:165afa46840b 809 /** \brief LDRT Unprivileged (16 bit)
Kojto 110:165afa46840b 810
Kojto 110:165afa46840b 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
Kojto 110:165afa46840b 812
Kojto 110:165afa46840b 813 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 814 \return value of type uint16_t at (*ptr)
Kojto 110:165afa46840b 815 */
Kojto 110:165afa46840b 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
Kojto 110:165afa46840b 817 {
Kojto 110:165afa46840b 818 uint32_t result;
Kojto 110:165afa46840b 819
Kojto 110:165afa46840b 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 110:165afa46840b 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 110:165afa46840b 822 #else
Kojto 110:165afa46840b 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Kojto 110:165afa46840b 824 accepted by assembler. So has to use following less efficient pattern.
Kojto 110:165afa46840b 825 */
Kojto 110:165afa46840b 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Kojto 110:165afa46840b 827 #endif
Kojto 110:165afa46840b 828 return ((uint16_t) result); /* Add explicit type cast here */
Kojto 110:165afa46840b 829 }
emilmont 79:0c05e21ae27e 830
emilmont 79:0c05e21ae27e 831
Kojto 110:165afa46840b 832 /** \brief LDRT Unprivileged (32 bit)
Kojto 110:165afa46840b 833
Kojto 110:165afa46840b 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
Kojto 110:165afa46840b 835
Kojto 110:165afa46840b 836 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 837 \return value of type uint32_t at (*ptr)
Kojto 110:165afa46840b 838 */
Kojto 110:165afa46840b 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
Kojto 110:165afa46840b 840 {
Kojto 110:165afa46840b 841 uint32_t result;
Kojto 110:165afa46840b 842
Kojto 110:165afa46840b 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 110:165afa46840b 844 return(result);
Kojto 110:165afa46840b 845 }
Kojto 110:165afa46840b 846
Kojto 110:165afa46840b 847
Kojto 110:165afa46840b 848 /** \brief STRT Unprivileged (8 bit)
Kojto 110:165afa46840b 849
Kojto 110:165afa46840b 850 This function executes a Unprivileged STRT instruction for 8 bit values.
Kojto 110:165afa46840b 851
Kojto 110:165afa46840b 852 \param [in] value Value to store
Kojto 110:165afa46840b 853 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 854 */
Kojto 110:165afa46840b 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
Kojto 110:165afa46840b 856 {
Kojto 110:165afa46840b 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
Kojto 110:165afa46840b 858 }
Kojto 110:165afa46840b 859
Kojto 110:165afa46840b 860
Kojto 110:165afa46840b 861 /** \brief STRT Unprivileged (16 bit)
Kojto 110:165afa46840b 862
Kojto 110:165afa46840b 863 This function executes a Unprivileged STRT instruction for 16 bit values.
Kojto 110:165afa46840b 864
Kojto 110:165afa46840b 865 \param [in] value Value to store
Kojto 110:165afa46840b 866 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 867 */
Kojto 110:165afa46840b 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
Kojto 110:165afa46840b 869 {
Kojto 110:165afa46840b 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
Kojto 110:165afa46840b 871 }
Kojto 110:165afa46840b 872
Kojto 110:165afa46840b 873
Kojto 110:165afa46840b 874 /** \brief STRT Unprivileged (32 bit)
Kojto 110:165afa46840b 875
Kojto 110:165afa46840b 876 This function executes a Unprivileged STRT instruction for 32 bit values.
Kojto 110:165afa46840b 877
Kojto 110:165afa46840b 878 \param [in] value Value to store
Kojto 110:165afa46840b 879 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 880 */
Kojto 110:165afa46840b 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
Kojto 110:165afa46840b 882 {
Kojto 110:165afa46840b 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
Kojto 110:165afa46840b 884 }
Kojto 110:165afa46840b 885
Kojto 110:165afa46840b 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Kojto 110:165afa46840b 887
Kojto 110:165afa46840b 888
Kojto 110:165afa46840b 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 110:165afa46840b 890 /* IAR iccarm specific functions */
Kojto 110:165afa46840b 891 #include <cmsis_iar.h>
Kojto 110:165afa46840b 892
Kojto 110:165afa46840b 893
Kojto 110:165afa46840b 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 110:165afa46840b 895 /* TI CCS specific functions */
Kojto 110:165afa46840b 896 #include <cmsis_ccs.h>
emilmont 79:0c05e21ae27e 897
emilmont 79:0c05e21ae27e 898
emilmont 79:0c05e21ae27e 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
emilmont 79:0c05e21ae27e 900 /* TASKING carm specific functions */
emilmont 79:0c05e21ae27e 901 /*
emilmont 79:0c05e21ae27e 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
emilmont 79:0c05e21ae27e 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
emilmont 79:0c05e21ae27e 904 * Including the CMSIS ones.
emilmont 79:0c05e21ae27e 905 */
emilmont 79:0c05e21ae27e 906
Kojto 110:165afa46840b 907
Kojto 110:165afa46840b 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 110:165afa46840b 909 /* Cosmic specific functions */
Kojto 110:165afa46840b 910 #include <cmsis_csm.h>
Kojto 110:165afa46840b 911
emilmont 79:0c05e21ae27e 912 #endif
emilmont 79:0c05e21ae27e 913
emilmont 79:0c05e21ae27e 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
emilmont 79:0c05e21ae27e 915
emilmont 79:0c05e21ae27e 916 #endif /* __CORE_CMINSTR_H */