mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.c@165:e614a9f1c9e2, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:39:01 2017 +0100
Revision:
165:e614a9f1c9e2
Parent:
161:2cc1468da177
Child:
168:9672193075cf
This updates the lib to the mbed lib v 143

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_irda.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 161:2cc1468da177 5 * @version V1.2.0
<> 161:2cc1468da177 6 * @date 30-December-2016
<> 144:ef7eb2e8f9f7 7 * @brief IRDA HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 157:ff67d9f36b67 9 * functionalities of the IrDA (Infrared Data Association) Peripheral
<> 157:ff67d9f36b67 10 * (IRDA)
<> 157:ff67d9f36b67 11 * + Initialization and de-initialization functions
<> 157:ff67d9f36b67 12 * + IO operation functions
<> 157:ff67d9f36b67 13 * + Peripheral State and Errors functions
<> 157:ff67d9f36b67 14 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 @verbatim
<> 144:ef7eb2e8f9f7 17 ==============================================================================
<> 144:ef7eb2e8f9f7 18 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 19 ==============================================================================
<> 144:ef7eb2e8f9f7 20 [..]
<> 144:ef7eb2e8f9f7 21 The IRDA HAL driver can be used as follows:
<> 144:ef7eb2e8f9f7 22
<> 157:ff67d9f36b67 23 (#) Declare a IRDA_HandleTypeDef handle structure (eg. IRDA_HandleTypeDef hirda).
<> 157:ff67d9f36b67 24 (#) Initialize the IRDA low level resources by implementing the HAL_IRDA_MspInit() API
<> 157:ff67d9f36b67 25 in setting the associated USART or UART in IRDA mode:
<> 157:ff67d9f36b67 26 (++) Enable the USARTx/UARTx interface clock.
<> 157:ff67d9f36b67 27 (++) USARTx/UARTx pins configuration:
<> 157:ff67d9f36b67 28 (+++) Enable the clock for the USARTx/UARTx GPIOs.
<> 157:ff67d9f36b67 29 (+++) Configure these USARTx/UARTx pins (TX as alternate function pull-up, RX as alternate function Input).
<> 157:ff67d9f36b67 30 (++) NVIC configuration if you need to use interrupt process (HAL_IRDA_Transmit_IT()
<> 157:ff67d9f36b67 31 and HAL_IRDA_Receive_IT() APIs):
<> 157:ff67d9f36b67 32 (+++) Configure the USARTx/UARTx interrupt priority.
<> 157:ff67d9f36b67 33 (+++) Enable the NVIC USARTx/UARTx IRQ handle.
<> 157:ff67d9f36b67 34 (+++) The specific IRDA interrupts (Transmission complete interrupt,
<> 157:ff67d9f36b67 35 RXNE interrupt and Error Interrupts) will be managed using the macros
<> 157:ff67d9f36b67 36 __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process.
<> 157:ff67d9f36b67 37
<> 157:ff67d9f36b67 38 (++) DMA Configuration if you need to use DMA process (HAL_IRDA_Transmit_DMA()
<> 144:ef7eb2e8f9f7 39 and HAL_IRDA_Receive_DMA() APIs):
<> 157:ff67d9f36b67 40 (+++) Declare a DMA handle structure for the Tx/Rx channel.
<> 144:ef7eb2e8f9f7 41 (+++) Enable the DMAx interface clock.
<> 144:ef7eb2e8f9f7 42 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
<> 157:ff67d9f36b67 43 (+++) Configure the DMA Tx/Rx channel.
<> 144:ef7eb2e8f9f7 44 (+++) Associate the initialized DMA handle to the IRDA DMA Tx/Rx handle.
<> 157:ff67d9f36b67 45 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 (#) Program the Baud Rate, Word Length, Parity, IrDA Mode, Prescaler
<> 144:ef7eb2e8f9f7 48 and Mode(Receiver/Transmitter) in the hirda Init structure.
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 (#) Initialize the IRDA registers by calling the HAL_IRDA_Init() API:
<> 144:ef7eb2e8f9f7 51 (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
<> 157:ff67d9f36b67 52 by calling the customized HAL_IRDA_MspInit() API.
<> 157:ff67d9f36b67 53
<> 157:ff67d9f36b67 54 -@@- The specific IRDA interrupts (Transmission complete interrupt,
<> 157:ff67d9f36b67 55 RXNE interrupt and Error Interrupts) will be managed using the macros
<> 157:ff67d9f36b67 56 __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process.
<> 157:ff67d9f36b67 57
<> 144:ef7eb2e8f9f7 58 (#) Three operation modes are available within this driver :
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 *** Polling mode IO operation ***
<> 144:ef7eb2e8f9f7 61 =================================
<> 144:ef7eb2e8f9f7 62 [..]
<> 144:ef7eb2e8f9f7 63 (+) Send an amount of data in blocking mode using HAL_IRDA_Transmit()
<> 144:ef7eb2e8f9f7 64 (+) Receive an amount of data in blocking mode using HAL_IRDA_Receive()
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 *** Interrupt mode IO operation ***
<> 144:ef7eb2e8f9f7 67 ===================================
<> 144:ef7eb2e8f9f7 68 [..]
<> 144:ef7eb2e8f9f7 69 (+) Send an amount of data in non blocking mode using HAL_IRDA_Transmit_IT()
<> 144:ef7eb2e8f9f7 70 (+) At transmission end of transfer HAL_IRDA_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 71 add his own code by customization of function pointer HAL_IRDA_TxCpltCallback
<> 144:ef7eb2e8f9f7 72 (+) Receive an amount of data in non blocking mode using HAL_IRDA_Receive_IT()
<> 144:ef7eb2e8f9f7 73 (+) At reception end of transfer HAL_IRDA_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 74 add his own code by customization of function pointer HAL_IRDA_RxCpltCallback
<> 144:ef7eb2e8f9f7 75 (+) In case of transfer Error, HAL_IRDA_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 76 add his own code by customization of function pointer HAL_IRDA_ErrorCallback
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 *** DMA mode IO operation ***
<> 144:ef7eb2e8f9f7 79 =============================
<> 144:ef7eb2e8f9f7 80 [..]
<> 144:ef7eb2e8f9f7 81 (+) Send an amount of data in non blocking mode (DMA) using HAL_IRDA_Transmit_DMA()
<> 144:ef7eb2e8f9f7 82 (+) At transmission end of transfer HAL_IRDA_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 83 add his own code by customization of function pointer HAL_IRDA_TxCpltCallback
<> 144:ef7eb2e8f9f7 84 (+) Receive an amount of data in non blocking mode (DMA) using HAL_IRDA_Receive_DMA()
<> 144:ef7eb2e8f9f7 85 (+) At reception end of transfer HAL_IRDA_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 86 add his own code by customization of function pointer HAL_IRDA_RxCpltCallback
<> 144:ef7eb2e8f9f7 87 (+) In case of transfer Error, HAL_IRDA_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 88 add his own code by customization of function pointer HAL_IRDA_ErrorCallback
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 *** IRDA HAL driver macros list ***
<> 144:ef7eb2e8f9f7 91 ===================================
<> 144:ef7eb2e8f9f7 92 [..]
<> 144:ef7eb2e8f9f7 93 Below the list of most used macros in IRDA HAL driver.
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 (+) __HAL_IRDA_ENABLE: Enable the IRDA peripheral
<> 144:ef7eb2e8f9f7 96 (+) __HAL_IRDA_DISABLE: Disable the IRDA peripheral
<> 144:ef7eb2e8f9f7 97 (+) __HAL_IRDA_GET_FLAG : Checks whether the specified IRDA flag is set or not
<> 144:ef7eb2e8f9f7 98 (+) __HAL_IRDA_CLEAR_FLAG : Clears the specified IRDA pending flag
<> 144:ef7eb2e8f9f7 99 (+) __HAL_IRDA_ENABLE_IT: Enables the specified IRDA interrupt
<> 144:ef7eb2e8f9f7 100 (+) __HAL_IRDA_DISABLE_IT: Disables the specified IRDA interrupt
<> 144:ef7eb2e8f9f7 101
<> 161:2cc1468da177 102 [..]
<> 144:ef7eb2e8f9f7 103 (@) You can refer to the IRDA HAL driver header file for more useful macros
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 @endverbatim
<> 144:ef7eb2e8f9f7 106 ******************************************************************************
<> 144:ef7eb2e8f9f7 107 * @attention
<> 144:ef7eb2e8f9f7 108 *
<> 144:ef7eb2e8f9f7 109 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 110 *
<> 144:ef7eb2e8f9f7 111 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 112 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 113 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 114 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 115 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 116 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 117 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 118 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 119 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 120 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 121 *
<> 144:ef7eb2e8f9f7 122 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 123 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 124 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 125 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 126 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 127 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 128 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 129 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 130 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 131 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 132 *
<> 144:ef7eb2e8f9f7 133 ******************************************************************************
<> 144:ef7eb2e8f9f7 134 */
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 137 #include "stm32f7xx_hal.h"
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 140 * @{
<> 144:ef7eb2e8f9f7 141 */
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 /** @defgroup IRDA IRDA
<> 144:ef7eb2e8f9f7 144 * @brief HAL IRDA module driver
<> 144:ef7eb2e8f9f7 145 * @{
<> 144:ef7eb2e8f9f7 146 */
<> 157:ff67d9f36b67 147
<> 144:ef7eb2e8f9f7 148 #ifdef HAL_IRDA_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 151 /* Private define ------------------------------------------------------------*/
<> 157:ff67d9f36b67 152 /** @defgroup IRDA_Private_Constants IRDA Private Constants
<> 144:ef7eb2e8f9f7 153 * @{
<> 144:ef7eb2e8f9f7 154 */
<> 157:ff67d9f36b67 155 #define IRDA_TEACK_REACK_TIMEOUT 1000U
<> 144:ef7eb2e8f9f7 156 #define HAL_IRDA_TXDMA_TIMEOUTVALUE 22000U
<> 144:ef7eb2e8f9f7 157 #define IRDA_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE \
<> 157:ff67d9f36b67 158 | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE)) /*!< UART or USART CR1 fields of parameters set by IRDA_SetConfig API */
<> 144:ef7eb2e8f9f7 159 /**
<> 144:ef7eb2e8f9f7 160 * @}
<> 144:ef7eb2e8f9f7 161 */
<> 157:ff67d9f36b67 162
<> 157:ff67d9f36b67 163 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 164 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 165 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 166 /** @addtogroup IRDA_Private_Functions
<> 144:ef7eb2e8f9f7 167 * @{
<> 144:ef7eb2e8f9f7 168 */
<> 157:ff67d9f36b67 169 static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda);
<> 157:ff67d9f36b67 170 static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda);
<> 157:ff67d9f36b67 171 static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
<> 157:ff67d9f36b67 172 static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda);
<> 157:ff67d9f36b67 173 static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 174 static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 175 static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 176 static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 177 static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 178 static void IRDA_DMAError(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 179 static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma);
<> 157:ff67d9f36b67 180 static void IRDA_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
<> 157:ff67d9f36b67 181 static void IRDA_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
<> 157:ff67d9f36b67 182 static void IRDA_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
<> 157:ff67d9f36b67 183 static void IRDA_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 184 static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 185 static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 186 static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 187 /**
<> 144:ef7eb2e8f9f7 188 * @}
<> 144:ef7eb2e8f9f7 189 */
<> 157:ff67d9f36b67 190
<> 144:ef7eb2e8f9f7 191 /* Exported functions --------------------------------------------------------*/
<> 157:ff67d9f36b67 192
<> 157:ff67d9f36b67 193 /** @defgroup IRDA_Exported_Functions IRDA Exported Functions
<> 144:ef7eb2e8f9f7 194 * @{
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196
<> 161:2cc1468da177 197 /** @defgroup IRDA_Exported_Functions_Group1 IrDA Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 198 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 199 *
<> 144:ef7eb2e8f9f7 200 @verbatim
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 ===============================================================================
<> 144:ef7eb2e8f9f7 203 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 204 ===============================================================================
<> 144:ef7eb2e8f9f7 205 [..]
<> 144:ef7eb2e8f9f7 206 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
<> 144:ef7eb2e8f9f7 207 in IrDA mode.
<> 144:ef7eb2e8f9f7 208 (+) For the asynchronous mode only these parameters can be configured:
<> 144:ef7eb2e8f9f7 209 (++) BaudRate
<> 144:ef7eb2e8f9f7 210 (++) WordLength
<> 144:ef7eb2e8f9f7 211 (++) Parity: If the parity is enabled, then the MSB bit of the data written
<> 144:ef7eb2e8f9f7 212 in the data register is transmitted but is changed by the parity bit.
<> 144:ef7eb2e8f9f7 213 Depending on the frame length defined by the M bit (8-bits or 9-bits),
<> 144:ef7eb2e8f9f7 214 please refer to Reference manual for possible IRDA frame formats.
<> 144:ef7eb2e8f9f7 215 (++) Prescaler: A pulse of width less than two and greater than one PSC period(s) may or may
<> 144:ef7eb2e8f9f7 216 not be rejected. The receiver set up time should be managed by software. The IrDA physical layer
<> 144:ef7eb2e8f9f7 217 specification specifies a minimum of 10 ms delay between transmission and
<> 144:ef7eb2e8f9f7 218 reception (IrDA is a half duplex protocol).
<> 144:ef7eb2e8f9f7 219 (++) Mode: Receiver/transmitter modes
<> 144:ef7eb2e8f9f7 220 (++) IrDAMode: the IrDA can operate in the Normal mode or in the Low power mode.
<> 144:ef7eb2e8f9f7 221 [..]
<> 144:ef7eb2e8f9f7 222 The HAL_IRDA_Init() API follows IRDA configuration procedures (details for the procedures
<> 144:ef7eb2e8f9f7 223 are available in reference manual).
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 @endverbatim
<> 144:ef7eb2e8f9f7 226 * @{
<> 144:ef7eb2e8f9f7 227 */
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 /**
<> 157:ff67d9f36b67 230 * @brief Initialize the IRDA mode according to the specified
<> 157:ff67d9f36b67 231 * parameters in the IRDA_InitTypeDef and initialize the associated handle.
<> 157:ff67d9f36b67 232 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 233 * the configuration information for the specified IRDA module.
<> 144:ef7eb2e8f9f7 234 * @retval HAL status
<> 144:ef7eb2e8f9f7 235 */
<> 144:ef7eb2e8f9f7 236 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 237 {
<> 157:ff67d9f36b67 238 /* Check the IRDA handle allocation */
<> 157:ff67d9f36b67 239 if(hirda == NULL)
<> 157:ff67d9f36b67 240 {
<> 157:ff67d9f36b67 241 return HAL_ERROR;
<> 157:ff67d9f36b67 242 }
<> 144:ef7eb2e8f9f7 243
<> 157:ff67d9f36b67 244 /* Check the USART/UART associated to the IRDA handle */
<> 157:ff67d9f36b67 245 assert_param(IS_IRDA_INSTANCE(hirda->Instance));
<> 144:ef7eb2e8f9f7 246
<> 157:ff67d9f36b67 247 if(hirda->gState == HAL_IRDA_STATE_RESET)
<> 157:ff67d9f36b67 248 {
<> 157:ff67d9f36b67 249 /* Allocate lock resource and initialize it */
<> 157:ff67d9f36b67 250 hirda->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 251
<> 157:ff67d9f36b67 252 /* Init the low level hardware : GPIO, CLOCK */
<> 157:ff67d9f36b67 253 HAL_IRDA_MspInit(hirda);
<> 157:ff67d9f36b67 254 }
<> 157:ff67d9f36b67 255
<> 157:ff67d9f36b67 256 hirda->gState = HAL_IRDA_STATE_BUSY;
<> 144:ef7eb2e8f9f7 257
<> 157:ff67d9f36b67 258 /* Disable the Peripheral to update the configuration registers */
<> 157:ff67d9f36b67 259 __HAL_IRDA_DISABLE(hirda);
<> 144:ef7eb2e8f9f7 260
<> 157:ff67d9f36b67 261 /* Set the IRDA Communication parameters */
<> 157:ff67d9f36b67 262 if (IRDA_SetConfig(hirda) == HAL_ERROR)
<> 157:ff67d9f36b67 263 {
<> 157:ff67d9f36b67 264 return HAL_ERROR;
<> 157:ff67d9f36b67 265 }
<> 144:ef7eb2e8f9f7 266
<> 157:ff67d9f36b67 267 /* In IRDA mode, the following bits must be kept cleared:
<> 157:ff67d9f36b67 268 - LINEN, STOP and CLKEN bits in the USART_CR2 register,
<> 157:ff67d9f36b67 269 - SCEN and HDSEL bits in the USART_CR3 register.*/
<> 157:ff67d9f36b67 270 CLEAR_BIT(hirda->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
<> 157:ff67d9f36b67 271 CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
<> 144:ef7eb2e8f9f7 272
<> 157:ff67d9f36b67 273 /* set the UART/USART in IRDA mode */
<> 157:ff67d9f36b67 274 hirda->Instance->CR3 |= USART_CR3_IREN;
<> 144:ef7eb2e8f9f7 275
<> 157:ff67d9f36b67 276 /* Enable the Peripheral */
<> 157:ff67d9f36b67 277 __HAL_IRDA_ENABLE(hirda);
<> 144:ef7eb2e8f9f7 278
<> 157:ff67d9f36b67 279 /* TEACK and/or REACK to check before moving hirda->gState and hirda->RxState to Ready */
<> 157:ff67d9f36b67 280 return (IRDA_CheckIdleState(hirda));
<> 144:ef7eb2e8f9f7 281 }
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 /**
<> 157:ff67d9f36b67 284 * @brief DeInitialize the IRDA peripheral.
<> 157:ff67d9f36b67 285 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 286 * the configuration information for the specified IRDA module.
<> 144:ef7eb2e8f9f7 287 * @retval HAL status
<> 144:ef7eb2e8f9f7 288 */
<> 144:ef7eb2e8f9f7 289 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 290 {
<> 157:ff67d9f36b67 291 /* Check the IRDA handle allocation */
<> 157:ff67d9f36b67 292 if(hirda == NULL)
<> 157:ff67d9f36b67 293 {
<> 157:ff67d9f36b67 294 return HAL_ERROR;
<> 157:ff67d9f36b67 295 }
<> 144:ef7eb2e8f9f7 296
<> 157:ff67d9f36b67 297 /* Check the USART/UART associated to the IRDA handle */
<> 157:ff67d9f36b67 298 assert_param(IS_IRDA_INSTANCE(hirda->Instance));
<> 144:ef7eb2e8f9f7 299
<> 157:ff67d9f36b67 300 hirda->gState = HAL_IRDA_STATE_BUSY;
<> 144:ef7eb2e8f9f7 301
<> 157:ff67d9f36b67 302 /* DeInit the low level hardware */
<> 157:ff67d9f36b67 303 HAL_IRDA_MspDeInit(hirda);
<> 157:ff67d9f36b67 304 /* Disable the Peripheral */
<> 157:ff67d9f36b67 305 __HAL_IRDA_DISABLE(hirda);
<> 144:ef7eb2e8f9f7 306
<> 157:ff67d9f36b67 307 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 308 hirda->gState = HAL_IRDA_STATE_RESET;
<> 157:ff67d9f36b67 309 hirda->RxState = HAL_IRDA_STATE_RESET;
<> 144:ef7eb2e8f9f7 310
<> 157:ff67d9f36b67 311 /* Release Lock */
<> 157:ff67d9f36b67 312 __HAL_UNLOCK(hirda);
<> 144:ef7eb2e8f9f7 313
<> 157:ff67d9f36b67 314 return HAL_OK;
<> 144:ef7eb2e8f9f7 315 }
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317 /**
<> 157:ff67d9f36b67 318 * @brief Initialize the IRDA MSP.
<> 157:ff67d9f36b67 319 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 320 * the configuration information for the specified IRDA module.
<> 144:ef7eb2e8f9f7 321 * @retval None
<> 144:ef7eb2e8f9f7 322 */
<> 144:ef7eb2e8f9f7 323 __weak void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 324 {
<> 157:ff67d9f36b67 325 /* Prevent unused argument(s) compilation warning */
<> 157:ff67d9f36b67 326 UNUSED(hirda);
<> 144:ef7eb2e8f9f7 327
<> 157:ff67d9f36b67 328 /* NOTE: This function should not be modified, when the callback is needed,
<> 157:ff67d9f36b67 329 the HAL_IRDA_MspInit can be implemented in the user file
<> 157:ff67d9f36b67 330 */
<> 144:ef7eb2e8f9f7 331 }
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 /**
<> 157:ff67d9f36b67 334 * @brief DeInitialize the IRDA MSP.
<> 157:ff67d9f36b67 335 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 336 * the configuration information for the specified IRDA module.
<> 144:ef7eb2e8f9f7 337 * @retval None
<> 144:ef7eb2e8f9f7 338 */
<> 144:ef7eb2e8f9f7 339 __weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 340 {
<> 157:ff67d9f36b67 341 /* Prevent unused argument(s) compilation warning */
<> 157:ff67d9f36b67 342 UNUSED(hirda);
<> 144:ef7eb2e8f9f7 343
<> 157:ff67d9f36b67 344 /* NOTE: This function should not be modified, when the callback is needed,
<> 157:ff67d9f36b67 345 the HAL_IRDA_MspDeInit can be implemented in the user file
<> 157:ff67d9f36b67 346 */
<> 144:ef7eb2e8f9f7 347 }
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 /**
<> 144:ef7eb2e8f9f7 350 * @}
<> 144:ef7eb2e8f9f7 351 */
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 /** @defgroup IRDA_Exported_Functions_Group2 IO operation functions
<> 157:ff67d9f36b67 354 * @brief IRDA Transmit and Receive functions
<> 144:ef7eb2e8f9f7 355 *
<> 144:ef7eb2e8f9f7 356 @verbatim
<> 144:ef7eb2e8f9f7 357 ===============================================================================
<> 144:ef7eb2e8f9f7 358 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 359 ===============================================================================
<> 157:ff67d9f36b67 360 [..]
<> 144:ef7eb2e8f9f7 361 This subsection provides a set of functions allowing to manage the IRDA data transfers.
<> 157:ff67d9f36b67 362
<> 157:ff67d9f36b67 363 [..]
<> 144:ef7eb2e8f9f7 364 IrDA is a half duplex communication protocol. If the Transmitter is busy, any data
<> 144:ef7eb2e8f9f7 365 on the IrDA receive line will be ignored by the IrDA decoder and if the Receiver
<> 144:ef7eb2e8f9f7 366 is busy, data on the TX from the USART to IrDA will not be encoded by IrDA.
<> 144:ef7eb2e8f9f7 367 While receiving data, transmission should be avoided as the data to be transmitted
<> 144:ef7eb2e8f9f7 368 could be corrupted.
<> 144:ef7eb2e8f9f7 369
<> 144:ef7eb2e8f9f7 370 (#) There are two modes of transfer:
<> 157:ff67d9f36b67 371 (++) Blocking mode: the communication is performed in polling mode.
<> 157:ff67d9f36b67 372 The HAL status of all data processing is returned by the same function
<> 157:ff67d9f36b67 373 after finishing transfer.
<> 157:ff67d9f36b67 374 (++) Non-Blocking mode: the communication is performed using Interrupts
<> 157:ff67d9f36b67 375 or DMA, these API's return the HAL status.
<> 157:ff67d9f36b67 376 The end of the data processing will be indicated through the
<> 157:ff67d9f36b67 377 dedicated IRDA IRQ when using Interrupt mode or the DMA IRQ when
<> 157:ff67d9f36b67 378 using DMA mode.
<> 157:ff67d9f36b67 379 The HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxCpltCallback() user callbacks
<> 157:ff67d9f36b67 380 will be executed respectively at the end of the Transmit or Receive process
<> 157:ff67d9f36b67 381 The HAL_IRDA_ErrorCallback() user callback will be executed when a communication error is detected
<> 144:ef7eb2e8f9f7 382
<> 157:ff67d9f36b67 383 (#) Blocking mode APIs are :
<> 144:ef7eb2e8f9f7 384 (++) HAL_IRDA_Transmit()
<> 144:ef7eb2e8f9f7 385 (++) HAL_IRDA_Receive()
<> 144:ef7eb2e8f9f7 386
<> 157:ff67d9f36b67 387 (#) Non-Blocking mode APIs with Interrupt are :
<> 144:ef7eb2e8f9f7 388 (++) HAL_IRDA_Transmit_IT()
<> 144:ef7eb2e8f9f7 389 (++) HAL_IRDA_Receive_IT()
<> 144:ef7eb2e8f9f7 390 (++) HAL_IRDA_IRQHandler()
<> 144:ef7eb2e8f9f7 391 (++) IRDA_Transmit_IT()
<> 144:ef7eb2e8f9f7 392 (++) IRDA_Receive_IT()
<> 144:ef7eb2e8f9f7 393
<> 144:ef7eb2e8f9f7 394 (#) Non-Blocking mode functions with DMA are :
<> 144:ef7eb2e8f9f7 395 (++) HAL_IRDA_Transmit_DMA()
<> 144:ef7eb2e8f9f7 396 (++) HAL_IRDA_Receive_DMA()
<> 157:ff67d9f36b67 397 (++) HAL_IRDA_DMAPause()
<> 157:ff67d9f36b67 398 (++) HAL_IRDA_DMAResume()
<> 157:ff67d9f36b67 399 (++) HAL_IRDA_DMAStop()
<> 144:ef7eb2e8f9f7 400
<> 157:ff67d9f36b67 401 (#) A set of Transfer Complete Callbacks are provided in Non-Blocking mode:
<> 157:ff67d9f36b67 402 (++) HAL_IRDA_TxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 403 (++) HAL_IRDA_TxCpltCallback()
<> 157:ff67d9f36b67 404 (++) HAL_IRDA_RxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 405 (++) HAL_IRDA_RxCpltCallback()
<> 144:ef7eb2e8f9f7 406 (++) HAL_IRDA_ErrorCallback()
<> 144:ef7eb2e8f9f7 407
<> 157:ff67d9f36b67 408 (#) Non-Blocking mode transfers could be aborted using Abort API's :
<> 161:2cc1468da177 409 (++) HAL_IRDA_Abort()
<> 161:2cc1468da177 410 (++) HAL_IRDA_AbortTransmit()
<> 161:2cc1468da177 411 (++) HAL_IRDA_AbortReceive()
<> 161:2cc1468da177 412 (++) HAL_IRDA_Abort_IT()
<> 161:2cc1468da177 413 (++) HAL_IRDA_AbortTransmit_IT()
<> 161:2cc1468da177 414 (++) HAL_IRDA_AbortReceive_IT()
<> 157:ff67d9f36b67 415
<> 157:ff67d9f36b67 416 (#) For Abort services based on interrupts (HAL_IRDA_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
<> 161:2cc1468da177 417 (++) HAL_IRDA_AbortCpltCallback()
<> 161:2cc1468da177 418 (++) HAL_IRDA_AbortTransmitCpltCallback()
<> 161:2cc1468da177 419 (++) HAL_IRDA_AbortReceiveCpltCallback()
<> 157:ff67d9f36b67 420
<> 157:ff67d9f36b67 421 (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
<> 157:ff67d9f36b67 422 Errors are handled as follows :
<> 161:2cc1468da177 423 (++) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is
<> 161:2cc1468da177 424 to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
<> 161:2cc1468da177 425 Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
<> 161:2cc1468da177 426 and HAL_IRDA_ErrorCallback() user callback is executed. Transfer is kept ongoing on IRDA side.
<> 161:2cc1468da177 427 If user wants to abort it, Abort services should be called by user.
<> 161:2cc1468da177 428 (++) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
<> 161:2cc1468da177 429 This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
<> 161:2cc1468da177 430 Error code is set to allow user to identify error type, and HAL_IRDA_ErrorCallback() user callback is executed.
<> 157:ff67d9f36b67 431
<> 144:ef7eb2e8f9f7 432 @endverbatim
<> 144:ef7eb2e8f9f7 433 * @{
<> 144:ef7eb2e8f9f7 434 */
<> 144:ef7eb2e8f9f7 435
<> 144:ef7eb2e8f9f7 436 /**
<> 157:ff67d9f36b67 437 * @brief Send an amount of data in blocking mode.
<> 157:ff67d9f36b67 438 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 439 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 440 * @param pData Pointer to data buffer.
<> 157:ff67d9f36b67 441 * @param Size Amount of data to be sent.
<> 157:ff67d9f36b67 442 * @param Timeout Specify timeout value.
<> 144:ef7eb2e8f9f7 443 * @retval HAL status
<> 144:ef7eb2e8f9f7 444 */
<> 144:ef7eb2e8f9f7 445 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 446 {
<> 157:ff67d9f36b67 447 uint16_t* tmp;
<> 157:ff67d9f36b67 448 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 449
<> 157:ff67d9f36b67 450 /* Check that a Tx process is not already ongoing */
<> 157:ff67d9f36b67 451 if(hirda->gState == HAL_IRDA_STATE_READY)
<> 157:ff67d9f36b67 452 {
<> 157:ff67d9f36b67 453 if((pData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 454 {
<> 157:ff67d9f36b67 455 return HAL_ERROR;
<> 157:ff67d9f36b67 456 }
<> 144:ef7eb2e8f9f7 457
<> 157:ff67d9f36b67 458 /* Process Locked */
<> 157:ff67d9f36b67 459 __HAL_LOCK(hirda);
<> 157:ff67d9f36b67 460
<> 157:ff67d9f36b67 461 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 462 hirda->gState = HAL_IRDA_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 463
<> 157:ff67d9f36b67 464 /* Init tickstart for timeout managment*/
<> 157:ff67d9f36b67 465 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 466
<> 157:ff67d9f36b67 467 hirda->TxXferSize = Size;
<> 157:ff67d9f36b67 468 hirda->TxXferCount = Size;
<> 157:ff67d9f36b67 469 while(hirda->TxXferCount > 0)
<> 157:ff67d9f36b67 470 {
<> 157:ff67d9f36b67 471 hirda->TxXferCount--;
<> 144:ef7eb2e8f9f7 472
<> 157:ff67d9f36b67 473 if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 157:ff67d9f36b67 474 {
<> 157:ff67d9f36b67 475 return HAL_TIMEOUT;
<> 157:ff67d9f36b67 476 }
<> 157:ff67d9f36b67 477 if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
<> 157:ff67d9f36b67 478 {
<> 157:ff67d9f36b67 479 tmp = (uint16_t*) pData;
<> 157:ff67d9f36b67 480 hirda->Instance->TDR = (*tmp & (uint16_t)0x01FF);
<> 157:ff67d9f36b67 481 pData += 2;
<> 157:ff67d9f36b67 482 }
<> 157:ff67d9f36b67 483 else
<> 157:ff67d9f36b67 484 {
<> 157:ff67d9f36b67 485 hirda->Instance->TDR = (*pData++ & (uint8_t)0xFF);
<> 157:ff67d9f36b67 486 }
<> 157:ff67d9f36b67 487 }
<> 144:ef7eb2e8f9f7 488
<> 157:ff67d9f36b67 489 if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
<> 157:ff67d9f36b67 490 {
<> 157:ff67d9f36b67 491 return HAL_TIMEOUT;
<> 157:ff67d9f36b67 492 }
<> 144:ef7eb2e8f9f7 493
<> 157:ff67d9f36b67 494 /* At end of Tx process, restore hirda->gState to Ready */
<> 157:ff67d9f36b67 495 hirda->gState = HAL_IRDA_STATE_READY;
<> 144:ef7eb2e8f9f7 496
<> 157:ff67d9f36b67 497 /* Process Unlocked */
<> 157:ff67d9f36b67 498 __HAL_UNLOCK(hirda);
<> 144:ef7eb2e8f9f7 499
<> 157:ff67d9f36b67 500 return HAL_OK;
<> 157:ff67d9f36b67 501 }
<> 157:ff67d9f36b67 502 else
<> 157:ff67d9f36b67 503 {
<> 157:ff67d9f36b67 504 return HAL_BUSY;
<> 157:ff67d9f36b67 505 }
<> 144:ef7eb2e8f9f7 506 }
<> 144:ef7eb2e8f9f7 507
<> 144:ef7eb2e8f9f7 508 /**
<> 144:ef7eb2e8f9f7 509 * @brief Receive an amount of data in blocking mode.
<> 157:ff67d9f36b67 510 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 511 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 512 * @param pData Pointer to data buffer.
<> 157:ff67d9f36b67 513 * @param Size Amount of data to be received.
<> 157:ff67d9f36b67 514 * @param Timeout Specify timeout value.
<> 144:ef7eb2e8f9f7 515 * @retval HAL status
<> 144:ef7eb2e8f9f7 516 */
<> 144:ef7eb2e8f9f7 517 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 518 {
<> 157:ff67d9f36b67 519 uint16_t* tmp;
<> 157:ff67d9f36b67 520 uint16_t uhMask;
<> 157:ff67d9f36b67 521 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 522
<> 157:ff67d9f36b67 523 /* Check that a Rx process is not already ongoing */
<> 157:ff67d9f36b67 524 if(hirda->RxState == HAL_IRDA_STATE_READY)
<> 157:ff67d9f36b67 525 {
<> 157:ff67d9f36b67 526 if((pData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 527 {
<> 157:ff67d9f36b67 528 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 529 }
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 /* Process Locked */
<> 144:ef7eb2e8f9f7 532 __HAL_LOCK(hirda);
<> 144:ef7eb2e8f9f7 533
<> 157:ff67d9f36b67 534 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 535 hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
<> 157:ff67d9f36b67 536
<> 157:ff67d9f36b67 537 /* Init tickstart for timeout managment*/
<> 157:ff67d9f36b67 538 tickstart = HAL_GetTick();
<> 157:ff67d9f36b67 539
<> 157:ff67d9f36b67 540 hirda->RxXferSize = Size;
<> 157:ff67d9f36b67 541 hirda->RxXferCount = Size;
<> 157:ff67d9f36b67 542
<> 157:ff67d9f36b67 543 /* Computation of the mask to apply to RDR register
<> 157:ff67d9f36b67 544 of the UART associated to the IRDA */
<> 157:ff67d9f36b67 545 IRDA_MASK_COMPUTATION(hirda);
<> 157:ff67d9f36b67 546 uhMask = hirda->Mask;
<> 157:ff67d9f36b67 547
<> 157:ff67d9f36b67 548 /* Check data remaining to be received */
<> 157:ff67d9f36b67 549 while(hirda->RxXferCount > 0)
<> 144:ef7eb2e8f9f7 550 {
<> 157:ff67d9f36b67 551 hirda->RxXferCount--;
<> 157:ff67d9f36b67 552
<> 157:ff67d9f36b67 553 if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 157:ff67d9f36b67 554 {
<> 157:ff67d9f36b67 555 return HAL_TIMEOUT;
<> 157:ff67d9f36b67 556 }
<> 157:ff67d9f36b67 557 if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
<> 157:ff67d9f36b67 558 {
<> 157:ff67d9f36b67 559 tmp = (uint16_t*) pData ;
<> 157:ff67d9f36b67 560 *tmp = (uint16_t)(hirda->Instance->RDR & uhMask);
<> 157:ff67d9f36b67 561 pData +=2;
<> 157:ff67d9f36b67 562 }
<> 157:ff67d9f36b67 563 else
<> 157:ff67d9f36b67 564 {
<> 157:ff67d9f36b67 565 *pData++ = (uint8_t)(hirda->Instance->RDR & (uint8_t)uhMask);
<> 157:ff67d9f36b67 566 }
<> 144:ef7eb2e8f9f7 567 }
<> 144:ef7eb2e8f9f7 568
<> 157:ff67d9f36b67 569 /* At end of Rx process, restore hirda->RxState to Ready */
<> 157:ff67d9f36b67 570 hirda->RxState = HAL_IRDA_STATE_READY;
<> 144:ef7eb2e8f9f7 571
<> 144:ef7eb2e8f9f7 572 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 573 __HAL_UNLOCK(hirda);
<> 144:ef7eb2e8f9f7 574
<> 144:ef7eb2e8f9f7 575 return HAL_OK;
<> 157:ff67d9f36b67 576 }
<> 157:ff67d9f36b67 577 else
<> 157:ff67d9f36b67 578 {
<> 157:ff67d9f36b67 579 return HAL_BUSY;
<> 157:ff67d9f36b67 580 }
<> 157:ff67d9f36b67 581 }
<> 157:ff67d9f36b67 582
<> 157:ff67d9f36b67 583 /**
<> 157:ff67d9f36b67 584 * @brief Send an amount of data in interrupt mode.
<> 157:ff67d9f36b67 585 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 586 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 587 * @param pData Pointer to data buffer.
<> 157:ff67d9f36b67 588 * @param Size Amount of data to be sent.
<> 157:ff67d9f36b67 589 * @retval HAL status
<> 157:ff67d9f36b67 590 */
<> 157:ff67d9f36b67 591 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
<> 157:ff67d9f36b67 592 {
<> 157:ff67d9f36b67 593 /* Check that a Tx process is not already ongoing */
<> 157:ff67d9f36b67 594 if(hirda->gState == HAL_IRDA_STATE_READY)
<> 157:ff67d9f36b67 595 {
<> 157:ff67d9f36b67 596 if((pData == NULL) || (Size == 0))
<> 157:ff67d9f36b67 597 {
<> 157:ff67d9f36b67 598 return HAL_ERROR;
<> 157:ff67d9f36b67 599 }
<> 157:ff67d9f36b67 600
<> 157:ff67d9f36b67 601 /* Process Locked */
<> 157:ff67d9f36b67 602 __HAL_LOCK(hirda);
<> 157:ff67d9f36b67 603
<> 157:ff67d9f36b67 604 hirda->pTxBuffPtr = pData;
<> 157:ff67d9f36b67 605 hirda->TxXferSize = Size;
<> 157:ff67d9f36b67 606 hirda->TxXferCount = Size;
<> 157:ff67d9f36b67 607
<> 157:ff67d9f36b67 608 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 609 hirda->gState = HAL_IRDA_STATE_BUSY_TX;
<> 157:ff67d9f36b67 610
<> 157:ff67d9f36b67 611 /* Process Unlocked */
<> 157:ff67d9f36b67 612 __HAL_UNLOCK(hirda);
<> 157:ff67d9f36b67 613
<> 157:ff67d9f36b67 614 /* Enable the IRDA Transmit Data Register Empty Interrupt */
<> 157:ff67d9f36b67 615 SET_BIT(hirda->Instance->CR1, USART_CR1_TXEIE);
<> 157:ff67d9f36b67 616
<> 157:ff67d9f36b67 617 return HAL_OK;
<> 157:ff67d9f36b67 618 }
<> 157:ff67d9f36b67 619 else
<> 157:ff67d9f36b67 620 {
<> 157:ff67d9f36b67 621 return HAL_BUSY;
<> 157:ff67d9f36b67 622 }
<> 157:ff67d9f36b67 623 }
<> 157:ff67d9f36b67 624
<> 157:ff67d9f36b67 625 /**
<> 157:ff67d9f36b67 626 * @brief Receive an amount of data in interrupt mode.
<> 157:ff67d9f36b67 627 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 628 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 629 * @param pData Pointer to data buffer.
<> 157:ff67d9f36b67 630 * @param Size Amount of data to be received.
<> 157:ff67d9f36b67 631 * @retval HAL status
<> 157:ff67d9f36b67 632 */
<> 157:ff67d9f36b67 633 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
<> 157:ff67d9f36b67 634 {
<> 157:ff67d9f36b67 635 /* Check that a Rx process is not already ongoing */
<> 157:ff67d9f36b67 636 if(hirda->RxState == HAL_IRDA_STATE_READY)
<> 157:ff67d9f36b67 637 {
<> 157:ff67d9f36b67 638 if((pData == NULL) || (Size == 0))
<> 157:ff67d9f36b67 639 {
<> 157:ff67d9f36b67 640 return HAL_ERROR;
<> 157:ff67d9f36b67 641 }
<> 157:ff67d9f36b67 642
<> 157:ff67d9f36b67 643 /* Process Locked */
<> 157:ff67d9f36b67 644 __HAL_LOCK(hirda);
<> 157:ff67d9f36b67 645
<> 157:ff67d9f36b67 646 hirda->pRxBuffPtr = pData;
<> 157:ff67d9f36b67 647 hirda->RxXferSize = Size;
<> 157:ff67d9f36b67 648 hirda->RxXferCount = Size;
<> 157:ff67d9f36b67 649
<> 157:ff67d9f36b67 650 /* Computation of the mask to apply to the RDR register
<> 157:ff67d9f36b67 651 of the UART associated to the IRDA */
<> 157:ff67d9f36b67 652 IRDA_MASK_COMPUTATION(hirda);
<> 157:ff67d9f36b67 653
<> 157:ff67d9f36b67 654 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 655 hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
<> 157:ff67d9f36b67 656
<> 157:ff67d9f36b67 657 /* Process Unlocked */
<> 157:ff67d9f36b67 658 __HAL_UNLOCK(hirda);
<> 157:ff67d9f36b67 659
<> 157:ff67d9f36b67 660 /* Enable the IRDA Parity Error and Data Register not empty Interrupts */
<> 157:ff67d9f36b67 661 SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE| USART_CR1_RXNEIE);
<> 157:ff67d9f36b67 662
<> 157:ff67d9f36b67 663 /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
<> 157:ff67d9f36b67 664 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 665
<> 157:ff67d9f36b67 666 return HAL_OK;
<> 157:ff67d9f36b67 667 }
<> 157:ff67d9f36b67 668 else
<> 157:ff67d9f36b67 669 {
<> 157:ff67d9f36b67 670 return HAL_BUSY;
<> 157:ff67d9f36b67 671 }
<> 144:ef7eb2e8f9f7 672 }
<> 144:ef7eb2e8f9f7 673
<> 144:ef7eb2e8f9f7 674 /**
<> 157:ff67d9f36b67 675 * @brief Send an amount of data in DMA mode.
<> 157:ff67d9f36b67 676 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 677 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 678 * @param pData pointer to data buffer.
<> 157:ff67d9f36b67 679 * @param Size amount of data to be sent.
<> 157:ff67d9f36b67 680 * @retval HAL status
<> 157:ff67d9f36b67 681 */
<> 157:ff67d9f36b67 682 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
<> 157:ff67d9f36b67 683 {
<> 157:ff67d9f36b67 684 /* Check that a Tx process is not already ongoing */
<> 157:ff67d9f36b67 685 if(hirda->gState == HAL_IRDA_STATE_READY)
<> 157:ff67d9f36b67 686 {
<> 157:ff67d9f36b67 687 if((pData == NULL) || (Size == 0))
<> 157:ff67d9f36b67 688 {
<> 157:ff67d9f36b67 689 return HAL_ERROR;
<> 157:ff67d9f36b67 690 }
<> 157:ff67d9f36b67 691
<> 157:ff67d9f36b67 692 /* Process Locked */
<> 157:ff67d9f36b67 693 __HAL_LOCK(hirda);
<> 157:ff67d9f36b67 694
<> 157:ff67d9f36b67 695 hirda->pTxBuffPtr = pData;
<> 157:ff67d9f36b67 696 hirda->TxXferSize = Size;
<> 157:ff67d9f36b67 697 hirda->TxXferCount = Size;
<> 157:ff67d9f36b67 698
<> 157:ff67d9f36b67 699 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 700 hirda->gState = HAL_IRDA_STATE_BUSY_TX;
<> 157:ff67d9f36b67 701
<> 157:ff67d9f36b67 702 /* Set the IRDA DMA transfer complete callback */
<> 157:ff67d9f36b67 703 hirda->hdmatx->XferCpltCallback = IRDA_DMATransmitCplt;
<> 157:ff67d9f36b67 704
<> 157:ff67d9f36b67 705 /* Set the IRDA DMA half transfer complete callback */
<> 157:ff67d9f36b67 706 hirda->hdmatx->XferHalfCpltCallback = IRDA_DMATransmitHalfCplt;
<> 157:ff67d9f36b67 707
<> 157:ff67d9f36b67 708 /* Set the DMA error callback */
<> 157:ff67d9f36b67 709 hirda->hdmatx->XferErrorCallback = IRDA_DMAError;
<> 157:ff67d9f36b67 710
<> 157:ff67d9f36b67 711 /* Set the DMA abort callback */
<> 157:ff67d9f36b67 712 hirda->hdmatx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 713
<> 157:ff67d9f36b67 714 /* Enable the IRDA transmit DMA channel */
<> 157:ff67d9f36b67 715 HAL_DMA_Start_IT(hirda->hdmatx, (uint32_t)hirda->pTxBuffPtr, (uint32_t)&hirda->Instance->TDR, Size);
<> 157:ff67d9f36b67 716
<> 157:ff67d9f36b67 717 /* Clear the TC flag in the ICR register */
<> 157:ff67d9f36b67 718 __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_TCF);
<> 157:ff67d9f36b67 719
<> 157:ff67d9f36b67 720 /* Process Unlocked */
<> 157:ff67d9f36b67 721 __HAL_UNLOCK(hirda);
<> 157:ff67d9f36b67 722
<> 157:ff67d9f36b67 723 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 157:ff67d9f36b67 724 in the USART CR3 register */
<> 157:ff67d9f36b67 725 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
<> 157:ff67d9f36b67 726
<> 157:ff67d9f36b67 727 return HAL_OK;
<> 157:ff67d9f36b67 728 }
<> 157:ff67d9f36b67 729 else
<> 157:ff67d9f36b67 730 {
<> 157:ff67d9f36b67 731 return HAL_BUSY;
<> 157:ff67d9f36b67 732 }
<> 157:ff67d9f36b67 733 }
<> 157:ff67d9f36b67 734
<> 157:ff67d9f36b67 735 /**
<> 157:ff67d9f36b67 736 * @brief Receive an amount of data in DMA mode.
<> 157:ff67d9f36b67 737 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 738 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 739 * @param pData Pointer to data buffer.
<> 157:ff67d9f36b67 740 * @param Size Amount of data to be received.
<> 157:ff67d9f36b67 741 * @note When the IRDA parity is enabled (PCE = 1), the received data contains
<> 157:ff67d9f36b67 742 * the parity bit (MSB position).
<> 157:ff67d9f36b67 743 * @retval HAL status
<> 157:ff67d9f36b67 744 */
<> 157:ff67d9f36b67 745 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
<> 157:ff67d9f36b67 746 {
<> 157:ff67d9f36b67 747 /* Check that a Rx process is not already ongoing */
<> 157:ff67d9f36b67 748 if(hirda->RxState == HAL_IRDA_STATE_READY)
<> 157:ff67d9f36b67 749 {
<> 157:ff67d9f36b67 750 if((pData == NULL) || (Size == 0))
<> 157:ff67d9f36b67 751 {
<> 157:ff67d9f36b67 752 return HAL_ERROR;
<> 157:ff67d9f36b67 753 }
<> 157:ff67d9f36b67 754
<> 157:ff67d9f36b67 755 /* Process Locked */
<> 157:ff67d9f36b67 756 __HAL_LOCK(hirda);
<> 157:ff67d9f36b67 757
<> 157:ff67d9f36b67 758 hirda->pRxBuffPtr = pData;
<> 157:ff67d9f36b67 759 hirda->RxXferSize = Size;
<> 157:ff67d9f36b67 760
<> 157:ff67d9f36b67 761 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 762 hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
<> 157:ff67d9f36b67 763
<> 157:ff67d9f36b67 764 /* Set the IRDA DMA transfer complete callback */
<> 157:ff67d9f36b67 765 hirda->hdmarx->XferCpltCallback = IRDA_DMAReceiveCplt;
<> 157:ff67d9f36b67 766
<> 157:ff67d9f36b67 767 /* Set the IRDA DMA half transfer complete callback */
<> 157:ff67d9f36b67 768 hirda->hdmarx->XferHalfCpltCallback = IRDA_DMAReceiveHalfCplt;
<> 157:ff67d9f36b67 769
<> 157:ff67d9f36b67 770 /* Set the DMA error callback */
<> 157:ff67d9f36b67 771 hirda->hdmarx->XferErrorCallback = IRDA_DMAError;
<> 157:ff67d9f36b67 772
<> 157:ff67d9f36b67 773 /* Set the DMA abort callback */
<> 157:ff67d9f36b67 774 hirda->hdmarx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 775
<> 157:ff67d9f36b67 776 /* Enable the DMA channel */
<> 157:ff67d9f36b67 777 HAL_DMA_Start_IT(hirda->hdmarx, (uint32_t)&hirda->Instance->RDR, (uint32_t)hirda->pRxBuffPtr, Size);
<> 157:ff67d9f36b67 778
<> 157:ff67d9f36b67 779 /* Process Unlocked */
<> 157:ff67d9f36b67 780 __HAL_UNLOCK(hirda);
<> 157:ff67d9f36b67 781
<> 157:ff67d9f36b67 782 /* Enable the UART Parity Error Interrupt */
<> 157:ff67d9f36b67 783 SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
<> 157:ff67d9f36b67 784
<> 157:ff67d9f36b67 785 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
<> 157:ff67d9f36b67 786 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 787
<> 157:ff67d9f36b67 788 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
<> 157:ff67d9f36b67 789 in the USART CR3 register */
<> 157:ff67d9f36b67 790 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
<> 157:ff67d9f36b67 791
<> 157:ff67d9f36b67 792 return HAL_OK;
<> 157:ff67d9f36b67 793 }
<> 157:ff67d9f36b67 794 else
<> 157:ff67d9f36b67 795 {
<> 157:ff67d9f36b67 796 return HAL_BUSY;
<> 157:ff67d9f36b67 797 }
<> 157:ff67d9f36b67 798 }
<> 157:ff67d9f36b67 799
<> 157:ff67d9f36b67 800
<> 157:ff67d9f36b67 801 /**
<> 157:ff67d9f36b67 802 * @brief Pause the DMA Transfer.
<> 157:ff67d9f36b67 803 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 804 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 805 * @retval HAL status
<> 157:ff67d9f36b67 806 */
<> 157:ff67d9f36b67 807 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 808 {
<> 157:ff67d9f36b67 809 /* Process Locked */
<> 157:ff67d9f36b67 810 __HAL_LOCK(hirda);
<> 157:ff67d9f36b67 811
<> 157:ff67d9f36b67 812 if ((hirda->gState == HAL_IRDA_STATE_BUSY_TX) &&
<> 157:ff67d9f36b67 813 (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
<> 157:ff67d9f36b67 814 {
<> 157:ff67d9f36b67 815 /* Disable the IRDA DMA Tx request */
<> 157:ff67d9f36b67 816 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
<> 157:ff67d9f36b67 817 }
<> 157:ff67d9f36b67 818 if ((hirda->RxState == HAL_IRDA_STATE_BUSY_RX) &&
<> 157:ff67d9f36b67 819 (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
<> 157:ff67d9f36b67 820 {
<> 157:ff67d9f36b67 821 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 157:ff67d9f36b67 822 CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
<> 157:ff67d9f36b67 823 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 824
<> 157:ff67d9f36b67 825 /* Disable the IRDA DMA Rx request */
<> 157:ff67d9f36b67 826 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
<> 157:ff67d9f36b67 827 }
<> 157:ff67d9f36b67 828
<> 157:ff67d9f36b67 829 /* Process Unlocked */
<> 157:ff67d9f36b67 830 __HAL_UNLOCK(hirda);
<> 157:ff67d9f36b67 831
<> 157:ff67d9f36b67 832 return HAL_OK;
<> 157:ff67d9f36b67 833 }
<> 157:ff67d9f36b67 834
<> 157:ff67d9f36b67 835 /**
<> 157:ff67d9f36b67 836 * @brief Resume the DMA Transfer.
<> 157:ff67d9f36b67 837 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 838 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 839 * @retval HAL status
<> 144:ef7eb2e8f9f7 840 */
<> 144:ef7eb2e8f9f7 841 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 842 {
<> 157:ff67d9f36b67 843 /* Process Locked */
<> 157:ff67d9f36b67 844 __HAL_LOCK(hirda);
<> 144:ef7eb2e8f9f7 845
<> 157:ff67d9f36b67 846 if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
<> 157:ff67d9f36b67 847 {
<> 157:ff67d9f36b67 848 /* Enable the IRDA DMA Tx request */
<> 157:ff67d9f36b67 849 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
<> 157:ff67d9f36b67 850 }
<> 157:ff67d9f36b67 851 if(hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
<> 157:ff67d9f36b67 852 {
<> 157:ff67d9f36b67 853 /* Clear the Overrun flag before resuming the Rx transfer*/
<> 157:ff67d9f36b67 854 __HAL_IRDA_CLEAR_OREFLAG(hirda);
<> 144:ef7eb2e8f9f7 855
<> 157:ff67d9f36b67 856 /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 157:ff67d9f36b67 857 SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
<> 157:ff67d9f36b67 858 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 859
<> 157:ff67d9f36b67 860 /* Enable the IRDA DMA Rx request */
<> 157:ff67d9f36b67 861 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
<> 157:ff67d9f36b67 862 }
<> 144:ef7eb2e8f9f7 863
<> 157:ff67d9f36b67 864 /* Process Unlocked */
<> 157:ff67d9f36b67 865 __HAL_UNLOCK(hirda);
<> 144:ef7eb2e8f9f7 866
<> 157:ff67d9f36b67 867 return HAL_OK;
<> 144:ef7eb2e8f9f7 868 }
<> 144:ef7eb2e8f9f7 869
<> 144:ef7eb2e8f9f7 870 /**
<> 157:ff67d9f36b67 871 * @brief Stop the DMA Transfer.
<> 157:ff67d9f36b67 872 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 873 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 874 * @retval HAL status
<> 144:ef7eb2e8f9f7 875 */
<> 144:ef7eb2e8f9f7 876 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 877 {
<> 157:ff67d9f36b67 878 /* The Lock is not implemented on this API to allow the user application
<> 157:ff67d9f36b67 879 to call the HAL IRDA API under callbacks HAL_IRDA_TxCpltCallback() / HAL_IRDA_RxCpltCallback() /
<> 157:ff67d9f36b67 880 HAL_IRDA_TxHalfCpltCallback / HAL_IRDA_RxHalfCpltCallback:
<> 157:ff67d9f36b67 881 indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
<> 157:ff67d9f36b67 882 interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
<> 157:ff67d9f36b67 883 the stream and the corresponding call back is executed. */
<> 157:ff67d9f36b67 884
<> 157:ff67d9f36b67 885 /* Stop IRDA DMA Tx request if ongoing */
<> 157:ff67d9f36b67 886 if ((hirda->gState == HAL_IRDA_STATE_BUSY_TX) &&
<> 157:ff67d9f36b67 887 (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
<> 157:ff67d9f36b67 888 {
<> 157:ff67d9f36b67 889 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 890
<> 157:ff67d9f36b67 891 /* Abort the IRDA DMA Tx channel */
<> 157:ff67d9f36b67 892 if(hirda->hdmatx != NULL)
<> 144:ef7eb2e8f9f7 893 {
<> 157:ff67d9f36b67 894 HAL_DMA_Abort(hirda->hdmatx);
<> 157:ff67d9f36b67 895 }
<> 157:ff67d9f36b67 896
<> 157:ff67d9f36b67 897 IRDA_EndTxTransfer(hirda);
<> 157:ff67d9f36b67 898 }
<> 144:ef7eb2e8f9f7 899
<> 157:ff67d9f36b67 900 /* Stop IRDA DMA Rx request if ongoing */
<> 157:ff67d9f36b67 901 if ((hirda->RxState == HAL_IRDA_STATE_BUSY_RX) &&
<> 157:ff67d9f36b67 902 (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
<> 157:ff67d9f36b67 903 {
<> 157:ff67d9f36b67 904 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
<> 157:ff67d9f36b67 905
<> 157:ff67d9f36b67 906 /* Abort the IRDA DMA Rx channel */
<> 157:ff67d9f36b67 907 if(hirda->hdmarx != NULL)
<> 157:ff67d9f36b67 908 {
<> 157:ff67d9f36b67 909 HAL_DMA_Abort(hirda->hdmarx);
<> 144:ef7eb2e8f9f7 910 }
<> 144:ef7eb2e8f9f7 911
<> 157:ff67d9f36b67 912 IRDA_EndRxTransfer(hirda);
<> 157:ff67d9f36b67 913 }
<> 157:ff67d9f36b67 914
<> 157:ff67d9f36b67 915 return HAL_OK;
<> 157:ff67d9f36b67 916 }
<> 157:ff67d9f36b67 917
<> 157:ff67d9f36b67 918 /**
<> 157:ff67d9f36b67 919 * @brief Abort ongoing transfers (blocking mode).
<> 157:ff67d9f36b67 920 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 921 * the configuration information for the specified UART module.
<> 157:ff67d9f36b67 922 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
<> 157:ff67d9f36b67 923 * This procedure performs following operations :
<> 157:ff67d9f36b67 924 * - Disable IRDA Interrupts (Tx and Rx)
<> 157:ff67d9f36b67 925 * - Disable the DMA transfer in the peripheral register (if enabled)
<> 157:ff67d9f36b67 926 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
<> 157:ff67d9f36b67 927 * - Set handle State to READY
<> 157:ff67d9f36b67 928 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
<> 157:ff67d9f36b67 929 * @retval HAL status
<> 157:ff67d9f36b67 930 */
<> 157:ff67d9f36b67 931 HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 932 {
<> 157:ff67d9f36b67 933 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 157:ff67d9f36b67 934 CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
<> 157:ff67d9f36b67 935 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 936
<> 157:ff67d9f36b67 937 /* Disable the IRDA DMA Tx request if enabled */
<> 157:ff67d9f36b67 938 if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
<> 157:ff67d9f36b67 939 {
<> 157:ff67d9f36b67 940 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
<> 157:ff67d9f36b67 941
<> 157:ff67d9f36b67 942 /* Abort the IRDA DMA Tx channel : use blocking DMA Abort API (no callback) */
<> 157:ff67d9f36b67 943 if(hirda->hdmatx != NULL)
<> 144:ef7eb2e8f9f7 944 {
<> 157:ff67d9f36b67 945 /* Set the IRDA DMA Abort callback to Null.
<> 157:ff67d9f36b67 946 No call back execution at end of DMA abort procedure */
<> 157:ff67d9f36b67 947 hirda->hdmatx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 948
<> 157:ff67d9f36b67 949 HAL_DMA_Abort(hirda->hdmatx);
<> 157:ff67d9f36b67 950 }
<> 157:ff67d9f36b67 951 }
<> 157:ff67d9f36b67 952
<> 157:ff67d9f36b67 953 /* Disable the IRDA DMA Rx request if enabled */
<> 157:ff67d9f36b67 954 if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
<> 157:ff67d9f36b67 955 {
<> 157:ff67d9f36b67 956 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
<> 157:ff67d9f36b67 957
<> 157:ff67d9f36b67 958 /* Abort the IRDA DMA Rx channel : use blocking DMA Abort API (no callback) */
<> 157:ff67d9f36b67 959 if(hirda->hdmarx != NULL)
<> 157:ff67d9f36b67 960 {
<> 157:ff67d9f36b67 961 /* Set the IRDA DMA Abort callback to Null.
<> 157:ff67d9f36b67 962 No call back execution at end of DMA abort procedure */
<> 157:ff67d9f36b67 963 hirda->hdmarx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 964
<> 157:ff67d9f36b67 965 HAL_DMA_Abort(hirda->hdmarx);
<> 157:ff67d9f36b67 966 }
<> 157:ff67d9f36b67 967 }
<> 157:ff67d9f36b67 968
<> 157:ff67d9f36b67 969 /* Reset Tx and Rx transfer counters */
<> 157:ff67d9f36b67 970 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 971 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 972
<> 157:ff67d9f36b67 973 /* Clear the Error flags in the ICR register */
<> 157:ff67d9f36b67 974 __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
<> 157:ff67d9f36b67 975
<> 157:ff67d9f36b67 976 /* Restore hirda->gState and hirda->RxState to Ready */
<> 157:ff67d9f36b67 977 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 978 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 979
<> 157:ff67d9f36b67 980 /* Reset Handle ErrorCode to No Error */
<> 157:ff67d9f36b67 981 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 982
<> 157:ff67d9f36b67 983 return HAL_OK;
<> 157:ff67d9f36b67 984 }
<> 144:ef7eb2e8f9f7 985
<> 157:ff67d9f36b67 986 /**
<> 157:ff67d9f36b67 987 * @brief Abort ongoing Transmit transfer (blocking mode).
<> 157:ff67d9f36b67 988 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 989 * the configuration information for the specified UART module.
<> 157:ff67d9f36b67 990 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
<> 157:ff67d9f36b67 991 * This procedure performs following operations :
<> 157:ff67d9f36b67 992 * - Disable IRDA Interrupts (Tx)
<> 157:ff67d9f36b67 993 * - Disable the DMA transfer in the peripheral register (if enabled)
<> 157:ff67d9f36b67 994 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
<> 157:ff67d9f36b67 995 * - Set handle State to READY
<> 157:ff67d9f36b67 996 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
<> 157:ff67d9f36b67 997 * @retval HAL status
<> 157:ff67d9f36b67 998 */
<> 157:ff67d9f36b67 999 HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1000 {
<> 157:ff67d9f36b67 1001 /* Disable TXEIE and TCIE interrupts */
<> 157:ff67d9f36b67 1002 CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
<> 157:ff67d9f36b67 1003
<> 157:ff67d9f36b67 1004 /* Disable the IRDA DMA Tx request if enabled */
<> 157:ff67d9f36b67 1005 if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
<> 157:ff67d9f36b67 1006 {
<> 157:ff67d9f36b67 1007 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
<> 157:ff67d9f36b67 1008
<> 157:ff67d9f36b67 1009 /* Abort the IRDA DMA Tx channel : use blocking DMA Abort API (no callback) */
<> 157:ff67d9f36b67 1010 if(hirda->hdmatx != NULL)
<> 157:ff67d9f36b67 1011 {
<> 157:ff67d9f36b67 1012 /* Set the IRDA DMA Abort callback to Null.
<> 157:ff67d9f36b67 1013 No call back execution at end of DMA abort procedure */
<> 157:ff67d9f36b67 1014 hirda->hdmatx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 1015
<> 157:ff67d9f36b67 1016 HAL_DMA_Abort(hirda->hdmatx);
<> 144:ef7eb2e8f9f7 1017 }
<> 157:ff67d9f36b67 1018 }
<> 157:ff67d9f36b67 1019
<> 157:ff67d9f36b67 1020 /* Reset Tx transfer counter */
<> 157:ff67d9f36b67 1021 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 1022
<> 157:ff67d9f36b67 1023 /* Restore hirda->gState to Ready */
<> 157:ff67d9f36b67 1024 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1025
<> 157:ff67d9f36b67 1026 return HAL_OK;
<> 157:ff67d9f36b67 1027 }
<> 157:ff67d9f36b67 1028
<> 157:ff67d9f36b67 1029 /**
<> 157:ff67d9f36b67 1030 * @brief Abort ongoing Receive transfer (blocking mode).
<> 157:ff67d9f36b67 1031 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1032 * the configuration information for the specified UART module.
<> 157:ff67d9f36b67 1033 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
<> 157:ff67d9f36b67 1034 * This procedure performs following operations :
<> 157:ff67d9f36b67 1035 * - Disable IRDA Interrupts (Rx)
<> 157:ff67d9f36b67 1036 * - Disable the DMA transfer in the peripheral register (if enabled)
<> 157:ff67d9f36b67 1037 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
<> 157:ff67d9f36b67 1038 * - Set handle State to READY
<> 157:ff67d9f36b67 1039 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
<> 157:ff67d9f36b67 1040 * @retval HAL status
<> 157:ff67d9f36b67 1041 */
<> 157:ff67d9f36b67 1042 HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1043 {
<> 157:ff67d9f36b67 1044 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 157:ff67d9f36b67 1045 CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 157:ff67d9f36b67 1046 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 1047
<> 157:ff67d9f36b67 1048 /* Disable the IRDA DMA Rx request if enabled */
<> 157:ff67d9f36b67 1049 if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
<> 157:ff67d9f36b67 1050 {
<> 157:ff67d9f36b67 1051 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
<> 157:ff67d9f36b67 1052
<> 157:ff67d9f36b67 1053 /* Abort the IRDA DMA Rx channel : use blocking DMA Abort API (no callback) */
<> 157:ff67d9f36b67 1054 if(hirda->hdmarx != NULL)
<> 157:ff67d9f36b67 1055 {
<> 157:ff67d9f36b67 1056 /* Set the IRDA DMA Abort callback to Null.
<> 157:ff67d9f36b67 1057 No call back execution at end of DMA abort procedure */
<> 157:ff67d9f36b67 1058 hirda->hdmarx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 1059
<> 157:ff67d9f36b67 1060 HAL_DMA_Abort(hirda->hdmarx);
<> 157:ff67d9f36b67 1061 }
<> 157:ff67d9f36b67 1062 }
<> 157:ff67d9f36b67 1063
<> 157:ff67d9f36b67 1064 /* Reset Rx transfer counter */
<> 157:ff67d9f36b67 1065 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 1066
<> 157:ff67d9f36b67 1067 /* Clear the Error flags in the ICR register */
<> 157:ff67d9f36b67 1068 __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
<> 157:ff67d9f36b67 1069
<> 157:ff67d9f36b67 1070 /* Restore hirda->RxState to Ready */
<> 157:ff67d9f36b67 1071 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1072
<> 157:ff67d9f36b67 1073 return HAL_OK;
<> 144:ef7eb2e8f9f7 1074 }
<> 144:ef7eb2e8f9f7 1075
<> 144:ef7eb2e8f9f7 1076 /**
<> 157:ff67d9f36b67 1077 * @brief Abort ongoing transfers (Interrupt mode).
<> 157:ff67d9f36b67 1078 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1079 * the configuration information for the specified UART module.
<> 157:ff67d9f36b67 1080 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
<> 157:ff67d9f36b67 1081 * This procedure performs following operations :
<> 157:ff67d9f36b67 1082 * - Disable IRDA Interrupts (Tx and Rx)
<> 157:ff67d9f36b67 1083 * - Disable the DMA transfer in the peripheral register (if enabled)
<> 157:ff67d9f36b67 1084 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
<> 157:ff67d9f36b67 1085 * - Set handle State to READY
<> 157:ff67d9f36b67 1086 * - At abort completion, call user abort complete callback
<> 157:ff67d9f36b67 1087 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
<> 157:ff67d9f36b67 1088 * considered as completed only when user abort complete callback is executed (not when exiting function).
<> 157:ff67d9f36b67 1089 * @retval HAL status
<> 157:ff67d9f36b67 1090 */
<> 157:ff67d9f36b67 1091 HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 1092 {
<> 157:ff67d9f36b67 1093 uint32_t abortcplt = 1;
<> 157:ff67d9f36b67 1094
<> 157:ff67d9f36b67 1095 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 157:ff67d9f36b67 1096 CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
<> 157:ff67d9f36b67 1097 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 1098
<> 157:ff67d9f36b67 1099 /* If DMA Tx and/or DMA Rx Handles are associated to IRDA Handle, DMA Abort complete callbacks should be initialised
<> 157:ff67d9f36b67 1100 before any call to DMA Abort functions */
<> 157:ff67d9f36b67 1101 /* DMA Tx Handle is valid */
<> 157:ff67d9f36b67 1102 if(hirda->hdmatx != NULL)
<> 157:ff67d9f36b67 1103 {
<> 157:ff67d9f36b67 1104 /* Set DMA Abort Complete callback if IRDA DMA Tx request if enabled.
<> 157:ff67d9f36b67 1105 Otherwise, set it to NULL */
<> 157:ff67d9f36b67 1106 if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
<> 157:ff67d9f36b67 1107 {
<> 157:ff67d9f36b67 1108 hirda->hdmatx->XferAbortCallback = IRDA_DMATxAbortCallback;
<> 157:ff67d9f36b67 1109 }
<> 157:ff67d9f36b67 1110 else
<> 157:ff67d9f36b67 1111 {
<> 157:ff67d9f36b67 1112 hirda->hdmatx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 1113 }
<> 157:ff67d9f36b67 1114 }
<> 157:ff67d9f36b67 1115 /* DMA Rx Handle is valid */
<> 157:ff67d9f36b67 1116 if(hirda->hdmarx != NULL)
<> 157:ff67d9f36b67 1117 {
<> 157:ff67d9f36b67 1118 /* Set DMA Abort Complete callback if IRDA DMA Rx request if enabled.
<> 157:ff67d9f36b67 1119 Otherwise, set it to NULL */
<> 157:ff67d9f36b67 1120 if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
<> 157:ff67d9f36b67 1121 {
<> 157:ff67d9f36b67 1122 hirda->hdmarx->XferAbortCallback = IRDA_DMARxAbortCallback;
<> 157:ff67d9f36b67 1123 }
<> 157:ff67d9f36b67 1124 else
<> 157:ff67d9f36b67 1125 {
<> 157:ff67d9f36b67 1126 hirda->hdmarx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 1127 }
<> 157:ff67d9f36b67 1128 }
<> 157:ff67d9f36b67 1129
<> 157:ff67d9f36b67 1130 /* Disable the IRDA DMA Tx request if enabled */
<> 157:ff67d9f36b67 1131 if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
<> 157:ff67d9f36b67 1132 {
<> 157:ff67d9f36b67 1133 /* Disable DMA Tx at UART level */
<> 157:ff67d9f36b67 1134 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
<> 157:ff67d9f36b67 1135
<> 157:ff67d9f36b67 1136 /* Abort the IRDA DMA Tx channel : use non blocking DMA Abort API (callback) */
<> 157:ff67d9f36b67 1137 if(hirda->hdmatx != NULL)
<> 157:ff67d9f36b67 1138 {
<> 157:ff67d9f36b67 1139 /* IRDA Tx DMA Abort callback has already been initialised :
<> 157:ff67d9f36b67 1140 will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
<> 144:ef7eb2e8f9f7 1141
<> 157:ff67d9f36b67 1142 /* Abort DMA TX */
<> 157:ff67d9f36b67 1143 if(HAL_DMA_Abort_IT(hirda->hdmatx) != HAL_OK)
<> 157:ff67d9f36b67 1144 {
<> 157:ff67d9f36b67 1145 hirda->hdmatx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 1146 }
<> 157:ff67d9f36b67 1147 else
<> 157:ff67d9f36b67 1148 {
<> 157:ff67d9f36b67 1149 abortcplt = 0;
<> 157:ff67d9f36b67 1150 }
<> 157:ff67d9f36b67 1151 }
<> 157:ff67d9f36b67 1152 }
<> 157:ff67d9f36b67 1153
<> 157:ff67d9f36b67 1154 /* Disable the IRDA DMA Rx request if enabled */
<> 157:ff67d9f36b67 1155 if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
<> 157:ff67d9f36b67 1156 {
<> 157:ff67d9f36b67 1157 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
<> 157:ff67d9f36b67 1158
<> 157:ff67d9f36b67 1159 /* Abort the IRDA DMA Rx channel : use non blocking DMA Abort API (callback) */
<> 157:ff67d9f36b67 1160 if(hirda->hdmarx != NULL)
<> 157:ff67d9f36b67 1161 {
<> 157:ff67d9f36b67 1162 /* IRDA Rx DMA Abort callback has already been initialised :
<> 157:ff67d9f36b67 1163 will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
<> 157:ff67d9f36b67 1164
<> 157:ff67d9f36b67 1165 /* Abort DMA RX */
<> 157:ff67d9f36b67 1166 if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
<> 157:ff67d9f36b67 1167 {
<> 157:ff67d9f36b67 1168 hirda->hdmarx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 1169 abortcplt = 1;
<> 157:ff67d9f36b67 1170 }
<> 157:ff67d9f36b67 1171 else
<> 157:ff67d9f36b67 1172 {
<> 157:ff67d9f36b67 1173 abortcplt = 0;
<> 157:ff67d9f36b67 1174 }
<> 157:ff67d9f36b67 1175 }
<> 157:ff67d9f36b67 1176 }
<> 157:ff67d9f36b67 1177
<> 157:ff67d9f36b67 1178 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
<> 157:ff67d9f36b67 1179 if (abortcplt == 1)
<> 157:ff67d9f36b67 1180 {
<> 157:ff67d9f36b67 1181 /* Reset Tx and Rx transfer counters */
<> 157:ff67d9f36b67 1182 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 1183 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 1184
<> 157:ff67d9f36b67 1185 /* Reset errorCode */
<> 157:ff67d9f36b67 1186 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 1187
<> 157:ff67d9f36b67 1188 /* Clear the Error flags in the ICR register */
<> 157:ff67d9f36b67 1189 __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
<> 157:ff67d9f36b67 1190
<> 157:ff67d9f36b67 1191 /* Restore hirda->gState and hirda->RxState to Ready */
<> 157:ff67d9f36b67 1192 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1193 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1194
<> 157:ff67d9f36b67 1195 /* As no DMA to be aborted, call directly user Abort complete callback */
<> 157:ff67d9f36b67 1196 HAL_IRDA_AbortCpltCallback(hirda);
<> 157:ff67d9f36b67 1197 }
<> 157:ff67d9f36b67 1198
<> 157:ff67d9f36b67 1199 return HAL_OK;
<> 144:ef7eb2e8f9f7 1200 }
<> 144:ef7eb2e8f9f7 1201
<> 144:ef7eb2e8f9f7 1202 /**
<> 157:ff67d9f36b67 1203 * @brief Abort ongoing Transmit transfer (Interrupt mode).
<> 157:ff67d9f36b67 1204 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1205 * the configuration information for the specified UART module.
<> 157:ff67d9f36b67 1206 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
<> 157:ff67d9f36b67 1207 * This procedure performs following operations :
<> 157:ff67d9f36b67 1208 * - Disable IRDA Interrupts (Tx)
<> 157:ff67d9f36b67 1209 * - Disable the DMA transfer in the peripheral register (if enabled)
<> 157:ff67d9f36b67 1210 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
<> 157:ff67d9f36b67 1211 * - Set handle State to READY
<> 157:ff67d9f36b67 1212 * - At abort completion, call user abort complete callback
<> 157:ff67d9f36b67 1213 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
<> 157:ff67d9f36b67 1214 * considered as completed only when user abort complete callback is executed (not when exiting function).
<> 157:ff67d9f36b67 1215 * @retval HAL status
<> 157:ff67d9f36b67 1216 */
<> 157:ff67d9f36b67 1217 HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1218 {
<> 157:ff67d9f36b67 1219 /* Disable TXEIE and TCIE interrupts */
<> 157:ff67d9f36b67 1220 CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
<> 157:ff67d9f36b67 1221
<> 157:ff67d9f36b67 1222 /* Disable the IRDA DMA Tx request if enabled */
<> 157:ff67d9f36b67 1223 if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
<> 157:ff67d9f36b67 1224 {
<> 157:ff67d9f36b67 1225 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
<> 157:ff67d9f36b67 1226
<> 157:ff67d9f36b67 1227 /* Abort the IRDA DMA Tx channel : use non blocking DMA Abort API (callback) */
<> 157:ff67d9f36b67 1228 if(hirda->hdmatx != NULL)
<> 157:ff67d9f36b67 1229 {
<> 157:ff67d9f36b67 1230 /* Set the IRDA DMA Abort callback :
<> 157:ff67d9f36b67 1231 will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
<> 157:ff67d9f36b67 1232 hirda->hdmatx->XferAbortCallback = IRDA_DMATxOnlyAbortCallback;
<> 157:ff67d9f36b67 1233
<> 157:ff67d9f36b67 1234 /* Abort DMA TX */
<> 157:ff67d9f36b67 1235 if(HAL_DMA_Abort_IT(hirda->hdmatx) != HAL_OK)
<> 157:ff67d9f36b67 1236 {
<> 157:ff67d9f36b67 1237 /* Call Directly hirda->hdmatx->XferAbortCallback function in case of error */
<> 157:ff67d9f36b67 1238 hirda->hdmatx->XferAbortCallback(hirda->hdmatx);
<> 157:ff67d9f36b67 1239 }
<> 157:ff67d9f36b67 1240 }
<> 157:ff67d9f36b67 1241 else
<> 157:ff67d9f36b67 1242 {
<> 157:ff67d9f36b67 1243 /* Reset Tx transfer counter */
<> 157:ff67d9f36b67 1244 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 1245
<> 157:ff67d9f36b67 1246 /* Restore hirda->gState to Ready */
<> 157:ff67d9f36b67 1247 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1248
<> 157:ff67d9f36b67 1249 /* As no DMA to be aborted, call directly user Abort complete callback */
<> 157:ff67d9f36b67 1250 HAL_IRDA_AbortTransmitCpltCallback(hirda);
<> 157:ff67d9f36b67 1251 }
<> 157:ff67d9f36b67 1252 }
<> 157:ff67d9f36b67 1253 else
<> 157:ff67d9f36b67 1254 {
<> 157:ff67d9f36b67 1255 /* Reset Tx transfer counter */
<> 157:ff67d9f36b67 1256 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 1257
<> 157:ff67d9f36b67 1258 /* Restore hirda->gState to Ready */
<> 157:ff67d9f36b67 1259 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1260
<> 157:ff67d9f36b67 1261 /* As no DMA to be aborted, call directly user Abort complete callback */
<> 157:ff67d9f36b67 1262 HAL_IRDA_AbortTransmitCpltCallback(hirda);
<> 157:ff67d9f36b67 1263 }
<> 157:ff67d9f36b67 1264
<> 157:ff67d9f36b67 1265 return HAL_OK;
<> 157:ff67d9f36b67 1266 }
<> 157:ff67d9f36b67 1267
<> 157:ff67d9f36b67 1268 /**
<> 157:ff67d9f36b67 1269 * @brief Abort ongoing Receive transfer (Interrupt mode).
<> 157:ff67d9f36b67 1270 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1271 * the configuration information for the specified UART module.
<> 157:ff67d9f36b67 1272 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
<> 157:ff67d9f36b67 1273 * This procedure performs following operations :
<> 157:ff67d9f36b67 1274 * - Disable IRDA Interrupts (Rx)
<> 157:ff67d9f36b67 1275 * - Disable the DMA transfer in the peripheral register (if enabled)
<> 157:ff67d9f36b67 1276 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
<> 157:ff67d9f36b67 1277 * - Set handle State to READY
<> 157:ff67d9f36b67 1278 * - At abort completion, call user abort complete callback
<> 157:ff67d9f36b67 1279 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
<> 157:ff67d9f36b67 1280 * considered as completed only when user abort complete callback is executed (not when exiting function).
<> 157:ff67d9f36b67 1281 * @retval HAL status
<> 157:ff67d9f36b67 1282 */
<> 157:ff67d9f36b67 1283 HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1284 {
<> 157:ff67d9f36b67 1285 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 157:ff67d9f36b67 1286 CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 157:ff67d9f36b67 1287 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 1288
<> 157:ff67d9f36b67 1289 /* Disable the IRDA DMA Rx request if enabled */
<> 157:ff67d9f36b67 1290 if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
<> 157:ff67d9f36b67 1291 {
<> 157:ff67d9f36b67 1292 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
<> 157:ff67d9f36b67 1293
<> 157:ff67d9f36b67 1294 /* Abort the IRDA DMA Rx channel : use non blocking DMA Abort API (callback) */
<> 157:ff67d9f36b67 1295 if(hirda->hdmarx != NULL)
<> 157:ff67d9f36b67 1296 {
<> 157:ff67d9f36b67 1297 /* Set the IRDA DMA Abort callback :
<> 157:ff67d9f36b67 1298 will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
<> 157:ff67d9f36b67 1299 hirda->hdmarx->XferAbortCallback = IRDA_DMARxOnlyAbortCallback;
<> 157:ff67d9f36b67 1300
<> 157:ff67d9f36b67 1301 /* Abort DMA RX */
<> 157:ff67d9f36b67 1302 if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
<> 157:ff67d9f36b67 1303 {
<> 157:ff67d9f36b67 1304 /* Call Directly hirda->hdmarx->XferAbortCallback function in case of error */
<> 157:ff67d9f36b67 1305 hirda->hdmarx->XferAbortCallback(hirda->hdmarx);
<> 157:ff67d9f36b67 1306 }
<> 157:ff67d9f36b67 1307 }
<> 157:ff67d9f36b67 1308 else
<> 157:ff67d9f36b67 1309 {
<> 157:ff67d9f36b67 1310 /* Reset Rx transfer counter */
<> 157:ff67d9f36b67 1311 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 1312
<> 157:ff67d9f36b67 1313 /* Clear the Error flags in the ICR register */
<> 157:ff67d9f36b67 1314 __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
<> 157:ff67d9f36b67 1315
<> 157:ff67d9f36b67 1316 /* Restore hirda->RxState to Ready */
<> 157:ff67d9f36b67 1317 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1318
<> 157:ff67d9f36b67 1319 /* As no DMA to be aborted, call directly user Abort complete callback */
<> 157:ff67d9f36b67 1320 HAL_IRDA_AbortReceiveCpltCallback(hirda);
<> 157:ff67d9f36b67 1321 }
<> 157:ff67d9f36b67 1322 }
<> 157:ff67d9f36b67 1323 else
<> 157:ff67d9f36b67 1324 {
<> 157:ff67d9f36b67 1325 /* Reset Rx transfer counter */
<> 157:ff67d9f36b67 1326 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 1327
<> 157:ff67d9f36b67 1328 /* Clear the Error flags in the ICR register */
<> 157:ff67d9f36b67 1329 __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
<> 157:ff67d9f36b67 1330
<> 157:ff67d9f36b67 1331 /* Restore hirda->RxState to Ready */
<> 157:ff67d9f36b67 1332 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1333
<> 157:ff67d9f36b67 1334 /* As no DMA to be aborted, call directly user Abort complete callback */
<> 157:ff67d9f36b67 1335 HAL_IRDA_AbortReceiveCpltCallback(hirda);
<> 157:ff67d9f36b67 1336 }
<> 157:ff67d9f36b67 1337
<> 157:ff67d9f36b67 1338 return HAL_OK;
<> 157:ff67d9f36b67 1339 }
<> 157:ff67d9f36b67 1340
<> 157:ff67d9f36b67 1341 /**
<> 157:ff67d9f36b67 1342 * @brief Handle IRDA interrupt request.
<> 157:ff67d9f36b67 1343 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1344 * the configuration information for the specified IRDA module.
<> 144:ef7eb2e8f9f7 1345 * @retval None
<> 144:ef7eb2e8f9f7 1346 */
<> 144:ef7eb2e8f9f7 1347 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 1348 {
<> 157:ff67d9f36b67 1349 uint32_t isrflags = READ_REG(hirda->Instance->ISR);
<> 157:ff67d9f36b67 1350 uint32_t cr1its = READ_REG(hirda->Instance->CR1);
<> 157:ff67d9f36b67 1351 uint32_t cr3its;
<> 157:ff67d9f36b67 1352 uint32_t errorflags;
<> 144:ef7eb2e8f9f7 1353
<> 157:ff67d9f36b67 1354 /* If no error occurs */
<> 157:ff67d9f36b67 1355 errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
<> 157:ff67d9f36b67 1356 if (errorflags == RESET)
<> 157:ff67d9f36b67 1357 {
<> 157:ff67d9f36b67 1358 /* IRDA in mode Receiver ---------------------------------------------------*/
<> 157:ff67d9f36b67 1359 if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
<> 157:ff67d9f36b67 1360 {
<> 157:ff67d9f36b67 1361 IRDA_Receive_IT(hirda);
<> 157:ff67d9f36b67 1362 return;
<> 157:ff67d9f36b67 1363 }
<> 157:ff67d9f36b67 1364 }
<> 144:ef7eb2e8f9f7 1365
<> 157:ff67d9f36b67 1366 /* If some errors occur */
<> 157:ff67d9f36b67 1367 cr3its = READ_REG(hirda->Instance->CR3);
<> 157:ff67d9f36b67 1368 if( (errorflags != RESET)
<> 157:ff67d9f36b67 1369 && ( ((cr3its & USART_CR3_EIE) != RESET)
<> 157:ff67d9f36b67 1370 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
<> 157:ff67d9f36b67 1371 {
<> 157:ff67d9f36b67 1372 /* IRDA parity error interrupt occurred -------------------------------------*/
<> 157:ff67d9f36b67 1373 if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
<> 157:ff67d9f36b67 1374 {
<> 157:ff67d9f36b67 1375 __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_PEF);
<> 157:ff67d9f36b67 1376
<> 157:ff67d9f36b67 1377 hirda->ErrorCode |= HAL_IRDA_ERROR_PE;
<> 157:ff67d9f36b67 1378 }
<> 157:ff67d9f36b67 1379
<> 157:ff67d9f36b67 1380 /* IRDA frame error interrupt occurred --------------------------------------*/
<> 157:ff67d9f36b67 1381 if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 144:ef7eb2e8f9f7 1382 {
<> 157:ff67d9f36b67 1383 __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_FEF);
<> 157:ff67d9f36b67 1384
<> 157:ff67d9f36b67 1385 hirda->ErrorCode |= HAL_IRDA_ERROR_FE;
<> 157:ff67d9f36b67 1386 }
<> 157:ff67d9f36b67 1387
<> 157:ff67d9f36b67 1388 /* IRDA noise error interrupt occurred --------------------------------------*/
<> 157:ff67d9f36b67 1389 if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 157:ff67d9f36b67 1390 {
<> 157:ff67d9f36b67 1391 __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_NEF);
<> 157:ff67d9f36b67 1392
<> 157:ff67d9f36b67 1393 hirda->ErrorCode |= HAL_IRDA_ERROR_NE;
<> 157:ff67d9f36b67 1394 }
<> 157:ff67d9f36b67 1395
<> 157:ff67d9f36b67 1396 /* IRDA Over-Run interrupt occurred -----------------------------------------*/
<> 157:ff67d9f36b67 1397 if(((isrflags & USART_ISR_ORE) != RESET) &&
<> 157:ff67d9f36b67 1398 (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
<> 157:ff67d9f36b67 1399 {
<> 157:ff67d9f36b67 1400 __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_OREF);
<> 157:ff67d9f36b67 1401
<> 157:ff67d9f36b67 1402 hirda->ErrorCode |= HAL_IRDA_ERROR_ORE;
<> 144:ef7eb2e8f9f7 1403 }
<> 144:ef7eb2e8f9f7 1404
<> 157:ff67d9f36b67 1405 /* Call IRDA Error Call back function if need be --------------------------*/
<> 157:ff67d9f36b67 1406 if(hirda->ErrorCode != HAL_IRDA_ERROR_NONE)
<> 144:ef7eb2e8f9f7 1407 {
<> 157:ff67d9f36b67 1408 /* IRDA in mode Receiver ---------------------------------------------------*/
<> 157:ff67d9f36b67 1409 if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
<> 157:ff67d9f36b67 1410 {
<> 157:ff67d9f36b67 1411 IRDA_Receive_IT(hirda);
<> 157:ff67d9f36b67 1412 }
<> 144:ef7eb2e8f9f7 1413
<> 157:ff67d9f36b67 1414 /* If Overrun error occurs, or if any error occurs in DMA mode reception,
<> 157:ff67d9f36b67 1415 consider error as blocking */
<> 157:ff67d9f36b67 1416 if (((hirda->ErrorCode & HAL_IRDA_ERROR_ORE) != RESET) ||
<> 157:ff67d9f36b67 1417 (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
<> 157:ff67d9f36b67 1418 {
<> 157:ff67d9f36b67 1419 /* Blocking error : transfer is aborted
<> 157:ff67d9f36b67 1420 Set the IRDA state ready to be able to start again the process,
<> 157:ff67d9f36b67 1421 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
<> 157:ff67d9f36b67 1422 IRDA_EndRxTransfer(hirda);
<> 144:ef7eb2e8f9f7 1423
<> 157:ff67d9f36b67 1424 /* Disable the IRDA DMA Rx request if enabled */
<> 157:ff67d9f36b67 1425 if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
<> 144:ef7eb2e8f9f7 1426 {
<> 157:ff67d9f36b67 1427 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1428
<> 157:ff67d9f36b67 1429 /* Abort the IRDA DMA Rx channel */
<> 157:ff67d9f36b67 1430 if(hirda->hdmarx != NULL)
<> 157:ff67d9f36b67 1431 {
<> 157:ff67d9f36b67 1432 /* Set the IRDA DMA Abort callback :
<> 157:ff67d9f36b67 1433 will lead to call HAL_IRDA_ErrorCallback() at end of DMA abort procedure */
<> 157:ff67d9f36b67 1434 hirda->hdmarx->XferAbortCallback = IRDA_DMAAbortOnError;
<> 144:ef7eb2e8f9f7 1435
<> 157:ff67d9f36b67 1436 /* Abort DMA RX */
<> 157:ff67d9f36b67 1437 if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
<> 157:ff67d9f36b67 1438 {
<> 157:ff67d9f36b67 1439 /* Call Directly hirda->hdmarx->XferAbortCallback function in case of error */
<> 157:ff67d9f36b67 1440 hirda->hdmarx->XferAbortCallback(hirda->hdmarx);
<> 157:ff67d9f36b67 1441 }
<> 157:ff67d9f36b67 1442 }
<> 157:ff67d9f36b67 1443 else
<> 157:ff67d9f36b67 1444 {
<> 157:ff67d9f36b67 1445 /* Call user error callback */
<> 157:ff67d9f36b67 1446 HAL_IRDA_ErrorCallback(hirda);
<> 157:ff67d9f36b67 1447 }
<> 157:ff67d9f36b67 1448 }
<> 157:ff67d9f36b67 1449 else
<> 157:ff67d9f36b67 1450 {
<> 157:ff67d9f36b67 1451 /* Call user error callback */
<> 157:ff67d9f36b67 1452 HAL_IRDA_ErrorCallback(hirda);
<> 157:ff67d9f36b67 1453 }
<> 157:ff67d9f36b67 1454 }
<> 157:ff67d9f36b67 1455 else
<> 157:ff67d9f36b67 1456 {
<> 157:ff67d9f36b67 1457 /* Non Blocking error : transfer could go on.
<> 157:ff67d9f36b67 1458 Error is notified to user through user error callback */
<> 157:ff67d9f36b67 1459 HAL_IRDA_ErrorCallback(hirda);
<> 157:ff67d9f36b67 1460 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 1461 }
<> 157:ff67d9f36b67 1462 }
<> 157:ff67d9f36b67 1463 return;
<> 144:ef7eb2e8f9f7 1464
<> 157:ff67d9f36b67 1465 } /* End if some error occurs */
<> 144:ef7eb2e8f9f7 1466
<> 157:ff67d9f36b67 1467 /* IRDA in mode Transmitter ------------------------------------------------*/
<> 157:ff67d9f36b67 1468 if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
<> 157:ff67d9f36b67 1469 {
<> 157:ff67d9f36b67 1470 IRDA_Transmit_IT(hirda);
<> 157:ff67d9f36b67 1471 return;
<> 157:ff67d9f36b67 1472 }
<> 144:ef7eb2e8f9f7 1473
<> 157:ff67d9f36b67 1474 /* IRDA in mode Transmitter (transmission end) -----------------------------*/
<> 157:ff67d9f36b67 1475 if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
<> 157:ff67d9f36b67 1476 {
<> 157:ff67d9f36b67 1477 IRDA_EndTransmit_IT(hirda);
<> 157:ff67d9f36b67 1478 return;
<> 157:ff67d9f36b67 1479 }
<> 144:ef7eb2e8f9f7 1480
<> 144:ef7eb2e8f9f7 1481 }
<> 144:ef7eb2e8f9f7 1482
<> 144:ef7eb2e8f9f7 1483 /**
<> 157:ff67d9f36b67 1484 * @brief Tx Transfer completed callback.
<> 157:ff67d9f36b67 1485 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1486 * the configuration information for the specified IRDA module.
<> 144:ef7eb2e8f9f7 1487 * @retval None
<> 144:ef7eb2e8f9f7 1488 */
<> 157:ff67d9f36b67 1489 __weak void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 1490 {
<> 157:ff67d9f36b67 1491 /* Prevent unused argument(s) compilation warning */
<> 157:ff67d9f36b67 1492 UNUSED(hirda);
<> 144:ef7eb2e8f9f7 1493
<> 157:ff67d9f36b67 1494 /* NOTE : This function should not be modified, when the callback is needed,
<> 157:ff67d9f36b67 1495 the HAL_IRDA_TxCpltCallback can be implemented in the user file.
<> 157:ff67d9f36b67 1496 */
<> 144:ef7eb2e8f9f7 1497 }
<> 144:ef7eb2e8f9f7 1498
<> 144:ef7eb2e8f9f7 1499 /**
<> 157:ff67d9f36b67 1500 * @brief Tx Half Transfer completed callback.
<> 157:ff67d9f36b67 1501 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1502 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1503 * @retval None
<> 144:ef7eb2e8f9f7 1504 */
<> 144:ef7eb2e8f9f7 1505 __weak void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 1506 {
<> 157:ff67d9f36b67 1507 /* Prevent unused argument(s) compilation warning */
<> 157:ff67d9f36b67 1508 UNUSED(hirda);
<> 144:ef7eb2e8f9f7 1509
<> 157:ff67d9f36b67 1510 /* NOTE : This function should not be modified, when the callback is needed,
<> 157:ff67d9f36b67 1511 the HAL_IRDA_TxHalfCpltCallback can be implemented in the user file.
<> 157:ff67d9f36b67 1512 */
<> 144:ef7eb2e8f9f7 1513 }
<> 144:ef7eb2e8f9f7 1514
<> 144:ef7eb2e8f9f7 1515 /**
<> 157:ff67d9f36b67 1516 * @brief Rx Transfer completed callback.
<> 157:ff67d9f36b67 1517 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1518 * the configuration information for the specified IRDA module.
<> 144:ef7eb2e8f9f7 1519 * @retval None
<> 144:ef7eb2e8f9f7 1520 */
<> 157:ff67d9f36b67 1521 __weak void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 1522 {
<> 157:ff67d9f36b67 1523 /* Prevent unused argument(s) compilation warning */
<> 157:ff67d9f36b67 1524 UNUSED(hirda);
<> 144:ef7eb2e8f9f7 1525
<> 157:ff67d9f36b67 1526 /* NOTE : This function should not be modified, when the callback is needed,
<> 157:ff67d9f36b67 1527 the HAL_IRDA_RxCpltCallback can be implemented in the user file.
<> 157:ff67d9f36b67 1528 */
<> 144:ef7eb2e8f9f7 1529 }
<> 144:ef7eb2e8f9f7 1530
<> 144:ef7eb2e8f9f7 1531 /**
<> 157:ff67d9f36b67 1532 * @brief Rx Half Transfer complete callback.
<> 157:ff67d9f36b67 1533 * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1534 * the configuration information for the specified IRDA module.
<> 144:ef7eb2e8f9f7 1535 * @retval None
<> 144:ef7eb2e8f9f7 1536 */
<> 144:ef7eb2e8f9f7 1537 __weak void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 1538 {
<> 157:ff67d9f36b67 1539 /* Prevent unused argument(s) compilation warning */
<> 157:ff67d9f36b67 1540 UNUSED(hirda);
<> 144:ef7eb2e8f9f7 1541
<> 157:ff67d9f36b67 1542 /* NOTE : This function should not be modified, when the callback is needed,
<> 157:ff67d9f36b67 1543 the HAL_IRDA_RxHalfCpltCallback can be implemented in the user file.
<> 157:ff67d9f36b67 1544 */
<> 144:ef7eb2e8f9f7 1545 }
<> 144:ef7eb2e8f9f7 1546
<> 144:ef7eb2e8f9f7 1547 /**
<> 157:ff67d9f36b67 1548 * @brief IRDA error callback.
<> 157:ff67d9f36b67 1549 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1550 * the configuration information for the specified IRDA module.
<> 144:ef7eb2e8f9f7 1551 * @retval None
<> 144:ef7eb2e8f9f7 1552 */
<> 144:ef7eb2e8f9f7 1553 __weak void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 1554 {
<> 157:ff67d9f36b67 1555 /* Prevent unused argument(s) compilation warning */
<> 157:ff67d9f36b67 1556 UNUSED(hirda);
<> 157:ff67d9f36b67 1557
<> 157:ff67d9f36b67 1558 /* NOTE : This function should not be modified, when the callback is needed,
<> 157:ff67d9f36b67 1559 the HAL_IRDA_ErrorCallback can be implemented in the user file.
<> 157:ff67d9f36b67 1560 */
<> 157:ff67d9f36b67 1561 }
<> 157:ff67d9f36b67 1562
<> 157:ff67d9f36b67 1563 /**
<> 157:ff67d9f36b67 1564 * @brief IRDA Abort Complete callback.
<> 157:ff67d9f36b67 1565 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1566 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 1567 * @retval None
<> 157:ff67d9f36b67 1568 */
<> 157:ff67d9f36b67 1569 __weak void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1570 {
<> 157:ff67d9f36b67 1571 /* Prevent unused argument(s) compilation warning */
<> 157:ff67d9f36b67 1572 UNUSED(hirda);
<> 157:ff67d9f36b67 1573
<> 157:ff67d9f36b67 1574 /* NOTE : This function should not be modified, when the callback is needed,
<> 157:ff67d9f36b67 1575 the HAL_IRDA_AbortCpltCallback can be implemented in the user file.
<> 157:ff67d9f36b67 1576 */
<> 157:ff67d9f36b67 1577 }
<> 144:ef7eb2e8f9f7 1578
<> 157:ff67d9f36b67 1579 /**
<> 157:ff67d9f36b67 1580 * @brief IRDA Abort Complete callback.
<> 157:ff67d9f36b67 1581 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1582 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 1583 * @retval None
<> 157:ff67d9f36b67 1584 */
<> 157:ff67d9f36b67 1585 __weak void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1586 {
<> 157:ff67d9f36b67 1587 /* Prevent unused argument(s) compilation warning */
<> 157:ff67d9f36b67 1588 UNUSED(hirda);
<> 157:ff67d9f36b67 1589
<> 157:ff67d9f36b67 1590 /* NOTE : This function should not be modified, when the callback is needed,
<> 157:ff67d9f36b67 1591 the HAL_IRDA_AbortTransmitCpltCallback can be implemented in the user file.
<> 157:ff67d9f36b67 1592 */
<> 157:ff67d9f36b67 1593 }
<> 157:ff67d9f36b67 1594
<> 157:ff67d9f36b67 1595 /**
<> 157:ff67d9f36b67 1596 * @brief IRDA Abort Receive Complete callback.
<> 157:ff67d9f36b67 1597 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1598 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 1599 * @retval None
<> 157:ff67d9f36b67 1600 */
<> 157:ff67d9f36b67 1601 __weak void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1602 {
<> 157:ff67d9f36b67 1603 /* Prevent unused argument(s) compilation warning */
<> 157:ff67d9f36b67 1604 UNUSED(hirda);
<> 157:ff67d9f36b67 1605
<> 157:ff67d9f36b67 1606 /* NOTE : This function should not be modified, when the callback is needed,
<> 157:ff67d9f36b67 1607 the HAL_IRDA_AbortReceiveCpltCallback can be implemented in the user file.
<> 157:ff67d9f36b67 1608 */
<> 144:ef7eb2e8f9f7 1609 }
<> 144:ef7eb2e8f9f7 1610
<> 144:ef7eb2e8f9f7 1611 /**
<> 144:ef7eb2e8f9f7 1612 * @}
<> 144:ef7eb2e8f9f7 1613 */
<> 144:ef7eb2e8f9f7 1614
<> 157:ff67d9f36b67 1615 /** @defgroup IRDA_Exported_Functions_Group4 Peripheral State and Error functions
<> 157:ff67d9f36b67 1616 * @brief IRDA State and Errors functions
<> 144:ef7eb2e8f9f7 1617 *
<> 144:ef7eb2e8f9f7 1618 @verbatim
<> 157:ff67d9f36b67 1619 ==============================================================================
<> 157:ff67d9f36b67 1620 ##### Peripheral State and Error functions #####
<> 157:ff67d9f36b67 1621 ==============================================================================
<> 157:ff67d9f36b67 1622 [..]
<> 157:ff67d9f36b67 1623 This subsection provides a set of functions allowing to return the State of IrDA
<> 157:ff67d9f36b67 1624 communication process and also return Peripheral Errors occurred during communication process
<> 157:ff67d9f36b67 1625 (+) HAL_IRDA_GetState() API can be helpful to check in run-time the state
<> 157:ff67d9f36b67 1626 of the IRDA peripheral handle.
<> 157:ff67d9f36b67 1627 (+) HAL_IRDA_GetError() checks in run-time errors that could occur during
<> 157:ff67d9f36b67 1628 communication.
<> 157:ff67d9f36b67 1629
<> 144:ef7eb2e8f9f7 1630 @endverbatim
<> 144:ef7eb2e8f9f7 1631 * @{
<> 144:ef7eb2e8f9f7 1632 */
<> 144:ef7eb2e8f9f7 1633
<> 144:ef7eb2e8f9f7 1634 /**
<> 157:ff67d9f36b67 1635 * @brief Return the IRDA handle state.
<> 157:ff67d9f36b67 1636 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1637 * the configuration information for the specified IRDA module.
<> 144:ef7eb2e8f9f7 1638 * @retval HAL state
<> 144:ef7eb2e8f9f7 1639 */
<> 144:ef7eb2e8f9f7 1640 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 1641 {
<> 157:ff67d9f36b67 1642 /* Return IRDA handle state */
<> 157:ff67d9f36b67 1643 uint32_t temp1= 0x00, temp2 = 0x00;
<> 157:ff67d9f36b67 1644 temp1 = hirda->gState;
<> 157:ff67d9f36b67 1645 temp2 = hirda->RxState;
<> 144:ef7eb2e8f9f7 1646
<> 157:ff67d9f36b67 1647 return (HAL_IRDA_StateTypeDef)(temp1 | temp2);
<> 144:ef7eb2e8f9f7 1648 }
<> 144:ef7eb2e8f9f7 1649
<> 144:ef7eb2e8f9f7 1650 /**
<> 157:ff67d9f36b67 1651 * @brief Return the IRDA handle error code.
<> 157:ff67d9f36b67 1652 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1653 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 1654 * @retval IRDA Error Code
<> 144:ef7eb2e8f9f7 1655 */
<> 157:ff67d9f36b67 1656 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda)
<> 144:ef7eb2e8f9f7 1657 {
<> 157:ff67d9f36b67 1658 return hirda->ErrorCode;
<> 144:ef7eb2e8f9f7 1659 }
<> 144:ef7eb2e8f9f7 1660
<> 144:ef7eb2e8f9f7 1661 /**
<> 144:ef7eb2e8f9f7 1662 * @}
<> 144:ef7eb2e8f9f7 1663 */
<> 144:ef7eb2e8f9f7 1664
<> 144:ef7eb2e8f9f7 1665 /**
<> 144:ef7eb2e8f9f7 1666 * @}
<> 144:ef7eb2e8f9f7 1667 */
<> 144:ef7eb2e8f9f7 1668
<> 157:ff67d9f36b67 1669 /** @defgroup IRDA_Private_Functions IRDA Private Functions
<> 157:ff67d9f36b67 1670 * @{
<> 157:ff67d9f36b67 1671 */
<> 157:ff67d9f36b67 1672
<> 157:ff67d9f36b67 1673 /**
<> 157:ff67d9f36b67 1674 * @brief Configure the IRDA peripheral.
<> 157:ff67d9f36b67 1675 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1676 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 1677 * @retval None
<> 157:ff67d9f36b67 1678 */
<> 157:ff67d9f36b67 1679 static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1680 {
<> 157:ff67d9f36b67 1681 uint32_t tmpreg = 0x00000000;
<> 157:ff67d9f36b67 1682 IRDA_ClockSourceTypeDef clocksource = IRDA_CLOCKSOURCE_UNDEFINED;
<> 157:ff67d9f36b67 1683 HAL_StatusTypeDef ret = HAL_OK;
<> 157:ff67d9f36b67 1684
<> 157:ff67d9f36b67 1685 /* Check the communication parameters */
<> 157:ff67d9f36b67 1686 assert_param(IS_IRDA_BAUDRATE(hirda->Init.BaudRate));
<> 157:ff67d9f36b67 1687 assert_param(IS_IRDA_WORD_LENGTH(hirda->Init.WordLength));
<> 157:ff67d9f36b67 1688 assert_param(IS_IRDA_PARITY(hirda->Init.Parity));
<> 157:ff67d9f36b67 1689 assert_param(IS_IRDA_TX_RX_MODE(hirda->Init.Mode));
<> 157:ff67d9f36b67 1690 assert_param(IS_IRDA_PRESCALER(hirda->Init.Prescaler));
<> 157:ff67d9f36b67 1691 assert_param(IS_IRDA_POWERMODE(hirda->Init.PowerMode));
<> 157:ff67d9f36b67 1692
<> 157:ff67d9f36b67 1693 /*-------------------------- USART CR1 Configuration -----------------------*/
<> 157:ff67d9f36b67 1694 /* Configure the IRDA Word Length, Parity and transfer Mode:
<> 157:ff67d9f36b67 1695 Set the M bits according to hirda->Init.WordLength value
<> 157:ff67d9f36b67 1696 Set PCE and PS bits according to hirda->Init.Parity value
<> 157:ff67d9f36b67 1697 Set TE and RE bits according to hirda->Init.Mode value */
<> 157:ff67d9f36b67 1698 tmpreg = (uint32_t)hirda->Init.WordLength | hirda->Init.Parity | hirda->Init.Mode ;
<> 157:ff67d9f36b67 1699
<> 157:ff67d9f36b67 1700 MODIFY_REG(hirda->Instance->CR1, IRDA_CR1_FIELDS, tmpreg);
<> 157:ff67d9f36b67 1701
<> 157:ff67d9f36b67 1702 /*-------------------------- USART CR3 Configuration -----------------------*/
<> 157:ff67d9f36b67 1703 MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.PowerMode);
<> 157:ff67d9f36b67 1704
<> 157:ff67d9f36b67 1705 /*-------------------------- USART GTPR Configuration ----------------------*/
<> 157:ff67d9f36b67 1706 MODIFY_REG(hirda->Instance->GTPR, USART_GTPR_PSC, hirda->Init.Prescaler);
<> 157:ff67d9f36b67 1707
<> 157:ff67d9f36b67 1708 /*-------------------------- USART BRR Configuration -----------------------*/
<> 157:ff67d9f36b67 1709 IRDA_GETCLOCKSOURCE(hirda, clocksource);
<> 157:ff67d9f36b67 1710 switch (clocksource)
<> 157:ff67d9f36b67 1711 {
<> 157:ff67d9f36b67 1712 case IRDA_CLOCKSOURCE_PCLK1:
<> 157:ff67d9f36b67 1713 hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK1Freq() + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
<> 157:ff67d9f36b67 1714 break;
<> 157:ff67d9f36b67 1715 case IRDA_CLOCKSOURCE_PCLK2:
<> 157:ff67d9f36b67 1716 hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK2Freq() + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
<> 157:ff67d9f36b67 1717 break;
<> 157:ff67d9f36b67 1718 case IRDA_CLOCKSOURCE_HSI:
<> 157:ff67d9f36b67 1719 hirda->Instance->BRR = (uint16_t)((HSI_VALUE + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
<> 157:ff67d9f36b67 1720 break;
<> 157:ff67d9f36b67 1721 case IRDA_CLOCKSOURCE_SYSCLK:
<> 157:ff67d9f36b67 1722 hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetSysClockFreq() + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
<> 157:ff67d9f36b67 1723 break;
<> 157:ff67d9f36b67 1724 case IRDA_CLOCKSOURCE_LSE:
<> 157:ff67d9f36b67 1725 hirda->Instance->BRR = (uint16_t)((LSE_VALUE + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
<> 157:ff67d9f36b67 1726 break;
<> 157:ff67d9f36b67 1727 case IRDA_CLOCKSOURCE_UNDEFINED:
<> 157:ff67d9f36b67 1728 default:
<> 157:ff67d9f36b67 1729 ret = HAL_ERROR;
<> 157:ff67d9f36b67 1730 break;
<> 157:ff67d9f36b67 1731 }
<> 157:ff67d9f36b67 1732
<> 157:ff67d9f36b67 1733 return ret;
<> 157:ff67d9f36b67 1734 }
<> 157:ff67d9f36b67 1735
<> 157:ff67d9f36b67 1736 /**
<> 157:ff67d9f36b67 1737 * @brief Check the IRDA Idle State.
<> 157:ff67d9f36b67 1738 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1739 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 1740 * @retval HAL status
<> 157:ff67d9f36b67 1741 */
<> 157:ff67d9f36b67 1742 static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1743 {
<> 157:ff67d9f36b67 1744 uint32_t tickstart = 0;
<> 157:ff67d9f36b67 1745
<> 157:ff67d9f36b67 1746 /* Initialize the IRDA ErrorCode */
<> 157:ff67d9f36b67 1747 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 1748
<> 157:ff67d9f36b67 1749 /* Init tickstart for timeout managment*/
<> 157:ff67d9f36b67 1750 tickstart = HAL_GetTick();
<> 157:ff67d9f36b67 1751
<> 157:ff67d9f36b67 1752 /* Check if the Transmitter is enabled */
<> 157:ff67d9f36b67 1753 if((hirda->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
<> 157:ff67d9f36b67 1754 {
<> 157:ff67d9f36b67 1755 /* Wait until TEACK flag is set */
<> 157:ff67d9f36b67 1756 if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_TEACK, RESET, tickstart, IRDA_TEACK_REACK_TIMEOUT) != HAL_OK)
<> 157:ff67d9f36b67 1757 {
<> 157:ff67d9f36b67 1758 /* Timeout occurred */
<> 157:ff67d9f36b67 1759 return HAL_TIMEOUT;
<> 157:ff67d9f36b67 1760 }
<> 157:ff67d9f36b67 1761 }
<> 157:ff67d9f36b67 1762
<> 157:ff67d9f36b67 1763 /* Initialize the IRDA state*/
<> 157:ff67d9f36b67 1764 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1765 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1766
<> 157:ff67d9f36b67 1767 /* Process Unlocked */
<> 157:ff67d9f36b67 1768 __HAL_UNLOCK(hirda);
<> 157:ff67d9f36b67 1769
<> 157:ff67d9f36b67 1770 return HAL_OK;
<> 157:ff67d9f36b67 1771 }
<> 157:ff67d9f36b67 1772
<> 157:ff67d9f36b67 1773 /**
<> 157:ff67d9f36b67 1774 * @brief Handle IRDA Communication Timeout.
<> 157:ff67d9f36b67 1775 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1776 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 1777 * @param Flag Specifies the IRDA flag to check.
<> 157:ff67d9f36b67 1778 * @param Status Flag status (SET or RESET)
<> 157:ff67d9f36b67 1779 * @param Tickstart Tick start value
<> 157:ff67d9f36b67 1780 * @param Timeout Timeout duration
<> 157:ff67d9f36b67 1781 * @retval HAL status
<> 157:ff67d9f36b67 1782 */
<> 157:ff67d9f36b67 1783 static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
<> 157:ff67d9f36b67 1784 {
<> 157:ff67d9f36b67 1785 /* Wait until flag is set */
<> 157:ff67d9f36b67 1786 while((__HAL_IRDA_GET_FLAG(hirda, Flag) ? SET : RESET) == Status)
<> 157:ff67d9f36b67 1787 {
<> 157:ff67d9f36b67 1788 /* Check for the Timeout */
<> 157:ff67d9f36b67 1789 if(Timeout != HAL_MAX_DELAY)
<> 157:ff67d9f36b67 1790 {
<> 157:ff67d9f36b67 1791 if((Timeout == 0) || ((HAL_GetTick()-Tickstart) > Timeout))
<> 157:ff67d9f36b67 1792 {
<> 157:ff67d9f36b67 1793 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
<> 157:ff67d9f36b67 1794 CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
<> 157:ff67d9f36b67 1795 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 1796
<> 157:ff67d9f36b67 1797 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1798 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1799
<> 157:ff67d9f36b67 1800 /* Process Unlocked */
<> 157:ff67d9f36b67 1801 __HAL_UNLOCK(hirda);
<> 157:ff67d9f36b67 1802 return HAL_TIMEOUT;
<> 157:ff67d9f36b67 1803 }
<> 157:ff67d9f36b67 1804 }
<> 157:ff67d9f36b67 1805 }
<> 157:ff67d9f36b67 1806 return HAL_OK;
<> 157:ff67d9f36b67 1807 }
<> 157:ff67d9f36b67 1808
<> 157:ff67d9f36b67 1809
<> 157:ff67d9f36b67 1810 /**
<> 157:ff67d9f36b67 1811 * @brief End ongoing Tx transfer on IRDA peripheral (following error detection or Transmit completion).
<> 157:ff67d9f36b67 1812 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1813 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 1814 * @retval None
<> 157:ff67d9f36b67 1815 */
<> 157:ff67d9f36b67 1816 static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1817 {
<> 157:ff67d9f36b67 1818 /* Disable TXEIE and TCIE interrupts */
<> 157:ff67d9f36b67 1819 CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
<> 157:ff67d9f36b67 1820
<> 157:ff67d9f36b67 1821 /* At end of Tx process, restore hirda->gState to Ready */
<> 157:ff67d9f36b67 1822 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1823 }
<> 157:ff67d9f36b67 1824
<> 157:ff67d9f36b67 1825
<> 157:ff67d9f36b67 1826 /**
<> 157:ff67d9f36b67 1827 * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
<> 157:ff67d9f36b67 1828 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1829 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 1830 * @retval None
<> 157:ff67d9f36b67 1831 */
<> 157:ff67d9f36b67 1832 static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 1833 {
<> 157:ff67d9f36b67 1834 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 157:ff67d9f36b67 1835 CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 157:ff67d9f36b67 1836 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 1837
<> 157:ff67d9f36b67 1838 /* At end of Rx process, restore hirda->RxState to Ready */
<> 157:ff67d9f36b67 1839 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1840 }
<> 157:ff67d9f36b67 1841
<> 157:ff67d9f36b67 1842
<> 157:ff67d9f36b67 1843 /**
<> 157:ff67d9f36b67 1844 * @brief DMA IRDA transmit process complete callback.
<> 157:ff67d9f36b67 1845 * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1846 * the configuration information for the specified DMA module.
<> 157:ff67d9f36b67 1847 * @retval None
<> 157:ff67d9f36b67 1848 */
<> 157:ff67d9f36b67 1849 static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma)
<> 157:ff67d9f36b67 1850 {
<> 157:ff67d9f36b67 1851 IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
<> 157:ff67d9f36b67 1852
<> 157:ff67d9f36b67 1853 /* DMA Normal mode */
<> 157:ff67d9f36b67 1854 if ( HAL_IS_BIT_CLR(hdma->Instance->CR, DMA_SxCR_CIRC) )
<> 157:ff67d9f36b67 1855 {
<> 157:ff67d9f36b67 1856 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 1857
<> 157:ff67d9f36b67 1858 /* Disable the DMA transfer for transmit request by resetting the DMAT bit
<> 157:ff67d9f36b67 1859 in the IRDA CR3 register */
<> 157:ff67d9f36b67 1860 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
<> 157:ff67d9f36b67 1861
<> 157:ff67d9f36b67 1862 /* Enable the IRDA Transmit Complete Interrupt */
<> 157:ff67d9f36b67 1863 SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
<> 157:ff67d9f36b67 1864 }
<> 157:ff67d9f36b67 1865 /* DMA Circular mode */
<> 157:ff67d9f36b67 1866 else
<> 157:ff67d9f36b67 1867 {
<> 157:ff67d9f36b67 1868 HAL_IRDA_TxCpltCallback(hirda);
<> 157:ff67d9f36b67 1869 }
<> 157:ff67d9f36b67 1870
<> 157:ff67d9f36b67 1871 }
<> 157:ff67d9f36b67 1872
<> 157:ff67d9f36b67 1873 /**
<> 157:ff67d9f36b67 1874 * @brief DMA IRDA transmit process half complete callback.
<> 157:ff67d9f36b67 1875 * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1876 * the configuration information for the specified DMA module.
<> 157:ff67d9f36b67 1877 * @retval None
<> 157:ff67d9f36b67 1878 */
<> 157:ff67d9f36b67 1879 static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma)
<> 157:ff67d9f36b67 1880 {
<> 157:ff67d9f36b67 1881 IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
<> 157:ff67d9f36b67 1882
<> 157:ff67d9f36b67 1883 HAL_IRDA_TxHalfCpltCallback(hirda);
<> 157:ff67d9f36b67 1884 }
<> 157:ff67d9f36b67 1885
<> 157:ff67d9f36b67 1886 /**
<> 157:ff67d9f36b67 1887 * @brief DMA IRDA receive process complete callback.
<> 157:ff67d9f36b67 1888 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1889 * the configuration information for the specified DMA module.
<> 157:ff67d9f36b67 1890 * @retval None
<> 157:ff67d9f36b67 1891 */
<> 157:ff67d9f36b67 1892 static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
<> 157:ff67d9f36b67 1893 {
<> 157:ff67d9f36b67 1894 IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
<> 157:ff67d9f36b67 1895
<> 157:ff67d9f36b67 1896 /* DMA Normal mode */
<> 157:ff67d9f36b67 1897 if ( HAL_IS_BIT_CLR(hdma->Instance->CR, DMA_SxCR_CIRC) )
<> 157:ff67d9f36b67 1898 {
<> 157:ff67d9f36b67 1899 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 1900
<> 157:ff67d9f36b67 1901 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 157:ff67d9f36b67 1902 CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
<> 157:ff67d9f36b67 1903 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 1904
<> 157:ff67d9f36b67 1905 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
<> 157:ff67d9f36b67 1906 in the IRDA CR3 register */
<> 157:ff67d9f36b67 1907 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
<> 157:ff67d9f36b67 1908
<> 157:ff67d9f36b67 1909 /* At end of Rx process, restore hirda->RxState to Ready */
<> 157:ff67d9f36b67 1910 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 1911 }
<> 157:ff67d9f36b67 1912
<> 157:ff67d9f36b67 1913 HAL_IRDA_RxCpltCallback(hirda);
<> 157:ff67d9f36b67 1914 }
<> 157:ff67d9f36b67 1915
<> 157:ff67d9f36b67 1916 /**
<> 157:ff67d9f36b67 1917 * @brief DMA IRDA receive process half complete callback.
<> 157:ff67d9f36b67 1918 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1919 * the configuration information for the specified DMA module.
<> 157:ff67d9f36b67 1920 * @retval None
<> 157:ff67d9f36b67 1921 */
<> 157:ff67d9f36b67 1922 static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma)
<> 157:ff67d9f36b67 1923 {
<> 157:ff67d9f36b67 1924 IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
<> 157:ff67d9f36b67 1925
<> 157:ff67d9f36b67 1926 HAL_IRDA_RxHalfCpltCallback(hirda);
<> 157:ff67d9f36b67 1927 }
<> 157:ff67d9f36b67 1928
<> 157:ff67d9f36b67 1929 /**
<> 157:ff67d9f36b67 1930 * @brief DMA IRDA communication error callback.
<> 157:ff67d9f36b67 1931 * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 1932 * the configuration information for the specified DMA module.
<> 157:ff67d9f36b67 1933 * @retval None
<> 157:ff67d9f36b67 1934 */
<> 157:ff67d9f36b67 1935 static void IRDA_DMAError(DMA_HandleTypeDef *hdma)
<> 157:ff67d9f36b67 1936 {
<> 157:ff67d9f36b67 1937 IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
<> 157:ff67d9f36b67 1938
<> 157:ff67d9f36b67 1939 /* Stop IRDA DMA Tx request if ongoing */
<> 157:ff67d9f36b67 1940 if ( (hirda->gState == HAL_IRDA_STATE_BUSY_TX)
<> 157:ff67d9f36b67 1941 &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)) )
<> 157:ff67d9f36b67 1942 {
<> 157:ff67d9f36b67 1943 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 1944 IRDA_EndTxTransfer(hirda);
<> 157:ff67d9f36b67 1945 }
<> 157:ff67d9f36b67 1946
<> 157:ff67d9f36b67 1947 /* Stop IRDA DMA Rx request if ongoing */
<> 157:ff67d9f36b67 1948 if ( (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
<> 157:ff67d9f36b67 1949 &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)) )
<> 157:ff67d9f36b67 1950 {
<> 157:ff67d9f36b67 1951 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 1952 IRDA_EndRxTransfer(hirda);
<> 157:ff67d9f36b67 1953 }
<> 157:ff67d9f36b67 1954
<> 157:ff67d9f36b67 1955 hirda->ErrorCode |= HAL_IRDA_ERROR_DMA;
<> 157:ff67d9f36b67 1956 HAL_IRDA_ErrorCallback(hirda);
<> 157:ff67d9f36b67 1957 }
<> 157:ff67d9f36b67 1958
<> 157:ff67d9f36b67 1959 /**
<> 157:ff67d9f36b67 1960 * @brief DMA IRDA communication abort callback, when initiated by HAL services on Error
<> 157:ff67d9f36b67 1961 * (To be called at end of DMA Abort procedure following error occurrence).
<> 157:ff67d9f36b67 1962 * @param hdma DMA handle.
<> 157:ff67d9f36b67 1963 * @retval None
<> 157:ff67d9f36b67 1964 */
<> 157:ff67d9f36b67 1965 static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma)
<> 157:ff67d9f36b67 1966 {
<> 157:ff67d9f36b67 1967 IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
<> 157:ff67d9f36b67 1968 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 1969 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 1970
<> 157:ff67d9f36b67 1971 HAL_IRDA_ErrorCallback(hirda);
<> 157:ff67d9f36b67 1972 }
<> 157:ff67d9f36b67 1973
<> 157:ff67d9f36b67 1974 /**
<> 157:ff67d9f36b67 1975 * @brief DMA IRDA Tx communication abort callback, when initiated by user
<> 157:ff67d9f36b67 1976 * (To be called at end of DMA Tx Abort procedure following user abort request).
<> 157:ff67d9f36b67 1977 * @note When this callback is executed, User Abort complete call back is called only if no
<> 157:ff67d9f36b67 1978 * Abort still ongoing for Rx DMA Handle.
<> 157:ff67d9f36b67 1979 * @param hdma DMA handle.
<> 157:ff67d9f36b67 1980 * @retval None
<> 157:ff67d9f36b67 1981 */
<> 157:ff67d9f36b67 1982 static void IRDA_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
<> 157:ff67d9f36b67 1983 {
<> 157:ff67d9f36b67 1984 IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef* )(hdma->Parent);
<> 157:ff67d9f36b67 1985
<> 157:ff67d9f36b67 1986 hirda->hdmatx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 1987
<> 157:ff67d9f36b67 1988 /* Check if an Abort process is still ongoing */
<> 157:ff67d9f36b67 1989 if(hirda->hdmarx != NULL)
<> 157:ff67d9f36b67 1990 {
<> 157:ff67d9f36b67 1991 if(hirda->hdmarx->XferAbortCallback != NULL)
<> 157:ff67d9f36b67 1992 {
<> 157:ff67d9f36b67 1993 return;
<> 157:ff67d9f36b67 1994 }
<> 157:ff67d9f36b67 1995 }
<> 157:ff67d9f36b67 1996
<> 157:ff67d9f36b67 1997 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
<> 157:ff67d9f36b67 1998 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 1999 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 2000
<> 157:ff67d9f36b67 2001 /* Reset errorCode */
<> 157:ff67d9f36b67 2002 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 2003
<> 157:ff67d9f36b67 2004 /* Clear the Error flags in the ICR register */
<> 157:ff67d9f36b67 2005 __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
<> 157:ff67d9f36b67 2006
<> 157:ff67d9f36b67 2007 /* Restore hirda->gState and hirda->RxState to Ready */
<> 157:ff67d9f36b67 2008 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 2009 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 2010
<> 157:ff67d9f36b67 2011 /* Call user Abort complete callback */
<> 157:ff67d9f36b67 2012 HAL_IRDA_AbortCpltCallback(hirda);
<> 157:ff67d9f36b67 2013 }
<> 157:ff67d9f36b67 2014
<> 157:ff67d9f36b67 2015
<> 157:ff67d9f36b67 2016 /**
<> 157:ff67d9f36b67 2017 * @brief DMA IRDA Rx communication abort callback, when initiated by user
<> 157:ff67d9f36b67 2018 * (To be called at end of DMA Rx Abort procedure following user abort request).
<> 157:ff67d9f36b67 2019 * @note When this callback is executed, User Abort complete call back is called only if no
<> 157:ff67d9f36b67 2020 * Abort still ongoing for Tx DMA Handle.
<> 157:ff67d9f36b67 2021 * @param hdma DMA handle.
<> 157:ff67d9f36b67 2022 * @retval None
<> 157:ff67d9f36b67 2023 */
<> 157:ff67d9f36b67 2024 static void IRDA_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
<> 157:ff67d9f36b67 2025 {
<> 157:ff67d9f36b67 2026 IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef* )(hdma->Parent);
<> 157:ff67d9f36b67 2027
<> 157:ff67d9f36b67 2028 hirda->hdmarx->XferAbortCallback = NULL;
<> 157:ff67d9f36b67 2029
<> 157:ff67d9f36b67 2030 /* Check if an Abort process is still ongoing */
<> 157:ff67d9f36b67 2031 if(hirda->hdmatx != NULL)
<> 157:ff67d9f36b67 2032 {
<> 157:ff67d9f36b67 2033 if(hirda->hdmatx->XferAbortCallback != NULL)
<> 157:ff67d9f36b67 2034 {
<> 157:ff67d9f36b67 2035 return;
<> 157:ff67d9f36b67 2036 }
<> 157:ff67d9f36b67 2037 }
<> 157:ff67d9f36b67 2038
<> 157:ff67d9f36b67 2039 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
<> 157:ff67d9f36b67 2040 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 2041 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 2042
<> 157:ff67d9f36b67 2043 /* Reset errorCode */
<> 157:ff67d9f36b67 2044 hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
<> 157:ff67d9f36b67 2045
<> 157:ff67d9f36b67 2046 /* Clear the Error flags in the ICR register */
<> 157:ff67d9f36b67 2047 __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
<> 157:ff67d9f36b67 2048
<> 157:ff67d9f36b67 2049 /* Restore hirda->gState and hirda->RxState to Ready */
<> 157:ff67d9f36b67 2050 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 2051 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 2052
<> 157:ff67d9f36b67 2053 /* Call user Abort complete callback */
<> 157:ff67d9f36b67 2054 HAL_IRDA_AbortCpltCallback(hirda);
<> 157:ff67d9f36b67 2055 }
<> 157:ff67d9f36b67 2056
<> 157:ff67d9f36b67 2057
<> 157:ff67d9f36b67 2058 /**
<> 157:ff67d9f36b67 2059 * @brief DMA IRDA Tx communication abort callback, when initiated by user by a call to
<> 157:ff67d9f36b67 2060 * HAL_IRDA_AbortTransmit_IT API (Abort only Tx transfer)
<> 157:ff67d9f36b67 2061 * (This callback is executed at end of DMA Tx Abort procedure following user abort request,
<> 157:ff67d9f36b67 2062 * and leads to user Tx Abort Complete callback execution).
<> 157:ff67d9f36b67 2063 * @param hdma DMA handle.
<> 157:ff67d9f36b67 2064 * @retval None
<> 157:ff67d9f36b67 2065 */
<> 157:ff67d9f36b67 2066 static void IRDA_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
<> 157:ff67d9f36b67 2067 {
<> 157:ff67d9f36b67 2068 IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
<> 157:ff67d9f36b67 2069
<> 157:ff67d9f36b67 2070 hirda->TxXferCount = 0;
<> 157:ff67d9f36b67 2071
<> 157:ff67d9f36b67 2072 /* Restore hirda->gState to Ready */
<> 157:ff67d9f36b67 2073 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 2074
<> 157:ff67d9f36b67 2075 /* Call user Abort complete callback */
<> 157:ff67d9f36b67 2076 HAL_IRDA_AbortTransmitCpltCallback(hirda);
<> 157:ff67d9f36b67 2077 }
<> 157:ff67d9f36b67 2078
<> 157:ff67d9f36b67 2079 /**
<> 157:ff67d9f36b67 2080 * @brief DMA IRDA Rx communication abort callback, when initiated by user by a call to
<> 157:ff67d9f36b67 2081 * HAL_IRDA_AbortReceive_IT API (Abort only Rx transfer)
<> 157:ff67d9f36b67 2082 * (This callback is executed at end of DMA Rx Abort procedure following user abort request,
<> 157:ff67d9f36b67 2083 * and leads to user Rx Abort Complete callback execution).
<> 157:ff67d9f36b67 2084 * @param hdma DMA handle.
<> 157:ff67d9f36b67 2085 * @retval None
<> 157:ff67d9f36b67 2086 */
<> 157:ff67d9f36b67 2087 static void IRDA_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
<> 157:ff67d9f36b67 2088 {
<> 157:ff67d9f36b67 2089 IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 157:ff67d9f36b67 2090
<> 157:ff67d9f36b67 2091 hirda->RxXferCount = 0;
<> 157:ff67d9f36b67 2092
<> 157:ff67d9f36b67 2093 /* Clear the Error flags in the ICR register */
<> 157:ff67d9f36b67 2094 __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
<> 157:ff67d9f36b67 2095
<> 157:ff67d9f36b67 2096 /* Restore hirda->RxState to Ready */
<> 157:ff67d9f36b67 2097 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 2098
<> 157:ff67d9f36b67 2099 /* Call user Abort complete callback */
<> 157:ff67d9f36b67 2100 HAL_IRDA_AbortReceiveCpltCallback(hirda);
<> 157:ff67d9f36b67 2101 }
<> 157:ff67d9f36b67 2102
<> 157:ff67d9f36b67 2103 /**
<> 157:ff67d9f36b67 2104 * @brief Send an amount of data in interrupt mode.
<> 157:ff67d9f36b67 2105 * @note Function is called under interruption only, once
<> 157:ff67d9f36b67 2106 * interruptions have been enabled by HAL_IRDA_Transmit_IT().
<> 157:ff67d9f36b67 2107 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 2108 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 2109 * @retval HAL status
<> 157:ff67d9f36b67 2110 */
<> 157:ff67d9f36b67 2111 static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 2112 {
<> 157:ff67d9f36b67 2113 uint16_t* tmp;
<> 157:ff67d9f36b67 2114
<> 157:ff67d9f36b67 2115 /* Check that a Tx process is ongoing */
<> 157:ff67d9f36b67 2116 if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
<> 157:ff67d9f36b67 2117 {
<> 157:ff67d9f36b67 2118 if(hirda->TxXferCount == 0)
<> 157:ff67d9f36b67 2119 {
<> 157:ff67d9f36b67 2120 /* Disable the IRDA Transmit Data Register Empty Interrupt */
<> 157:ff67d9f36b67 2121 CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TXEIE);
<> 157:ff67d9f36b67 2122
<> 157:ff67d9f36b67 2123 /* Enable the IRDA Transmit Complete Interrupt */
<> 157:ff67d9f36b67 2124 SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
<> 157:ff67d9f36b67 2125
<> 157:ff67d9f36b67 2126 return HAL_OK;
<> 157:ff67d9f36b67 2127 }
<> 157:ff67d9f36b67 2128 else
<> 157:ff67d9f36b67 2129 {
<> 157:ff67d9f36b67 2130 if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
<> 157:ff67d9f36b67 2131 {
<> 157:ff67d9f36b67 2132 tmp = (uint16_t*) hirda->pTxBuffPtr;
<> 157:ff67d9f36b67 2133 hirda->Instance->TDR = (*tmp & (uint16_t)0x01FF);
<> 157:ff67d9f36b67 2134 hirda->pTxBuffPtr += 2;
<> 157:ff67d9f36b67 2135 }
<> 157:ff67d9f36b67 2136 else
<> 157:ff67d9f36b67 2137 {
<> 157:ff67d9f36b67 2138 hirda->Instance->TDR = (uint8_t)(*hirda->pTxBuffPtr++ & (uint8_t)0xFF);
<> 157:ff67d9f36b67 2139 }
<> 157:ff67d9f36b67 2140 hirda->TxXferCount--;
<> 157:ff67d9f36b67 2141
<> 157:ff67d9f36b67 2142 return HAL_OK;
<> 157:ff67d9f36b67 2143 }
<> 157:ff67d9f36b67 2144 }
<> 157:ff67d9f36b67 2145 else
<> 157:ff67d9f36b67 2146 {
<> 157:ff67d9f36b67 2147 return HAL_BUSY;
<> 157:ff67d9f36b67 2148 }
<> 157:ff67d9f36b67 2149 }
<> 157:ff67d9f36b67 2150
<> 157:ff67d9f36b67 2151 /**
<> 157:ff67d9f36b67 2152 * @brief Wrap up transmission in non-blocking mode.
<> 157:ff67d9f36b67 2153 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 2154 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 2155 * @retval HAL status
<> 157:ff67d9f36b67 2156 */
<> 157:ff67d9f36b67 2157 static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 2158 {
<> 157:ff67d9f36b67 2159 /* Disable the IRDA Transmit Complete Interrupt */
<> 157:ff67d9f36b67 2160 CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
<> 157:ff67d9f36b67 2161
<> 157:ff67d9f36b67 2162 /* Tx process is ended, restore hirda->gState to Ready */
<> 157:ff67d9f36b67 2163 hirda->gState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 2164
<> 157:ff67d9f36b67 2165 HAL_IRDA_TxCpltCallback(hirda);
<> 157:ff67d9f36b67 2166
<> 157:ff67d9f36b67 2167 return HAL_OK;
<> 157:ff67d9f36b67 2168 }
<> 157:ff67d9f36b67 2169
<> 157:ff67d9f36b67 2170 /**
<> 157:ff67d9f36b67 2171 * @brief Receive an amount of data in interrupt mode.
<> 157:ff67d9f36b67 2172 * @note Function is called under interruption only, once
<> 157:ff67d9f36b67 2173 * interruptions have been enabled by HAL_IRDA_Receive_IT()
<> 157:ff67d9f36b67 2174 * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
<> 157:ff67d9f36b67 2175 * the configuration information for the specified IRDA module.
<> 157:ff67d9f36b67 2176 * @retval HAL status
<> 157:ff67d9f36b67 2177 */
<> 157:ff67d9f36b67 2178 static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda)
<> 157:ff67d9f36b67 2179 {
<> 157:ff67d9f36b67 2180 uint16_t* tmp;
<> 157:ff67d9f36b67 2181 uint16_t uhMask = hirda->Mask;
<> 157:ff67d9f36b67 2182 uint16_t uhdata;
<> 157:ff67d9f36b67 2183
<> 157:ff67d9f36b67 2184 /* Check that a Rx process is ongoing */
<> 157:ff67d9f36b67 2185 if (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
<> 157:ff67d9f36b67 2186 {
<> 157:ff67d9f36b67 2187 uhdata = (uint16_t) READ_REG(hirda->Instance->RDR);
<> 157:ff67d9f36b67 2188 if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
<> 157:ff67d9f36b67 2189 {
<> 157:ff67d9f36b67 2190 tmp = (uint16_t*) hirda->pRxBuffPtr ;
<> 157:ff67d9f36b67 2191 *tmp = (uint16_t)(uhdata & uhMask);
<> 157:ff67d9f36b67 2192 hirda->pRxBuffPtr +=2;
<> 157:ff67d9f36b67 2193 }
<> 157:ff67d9f36b67 2194 else
<> 157:ff67d9f36b67 2195 {
<> 157:ff67d9f36b67 2196 *hirda->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask);
<> 157:ff67d9f36b67 2197 }
<> 157:ff67d9f36b67 2198
<> 157:ff67d9f36b67 2199 if(--hirda->RxXferCount == 0)
<> 157:ff67d9f36b67 2200 {
<> 157:ff67d9f36b67 2201 /* Disable the IRDA Parity Error Interrupt and RXNE interrupt */
<> 157:ff67d9f36b67 2202 CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 157:ff67d9f36b67 2203
<> 157:ff67d9f36b67 2204 /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
<> 157:ff67d9f36b67 2205 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
<> 157:ff67d9f36b67 2206
<> 157:ff67d9f36b67 2207 /* Rx process is completed, restore hirda->RxState to Ready */
<> 157:ff67d9f36b67 2208 hirda->RxState = HAL_IRDA_STATE_READY;
<> 157:ff67d9f36b67 2209
<> 157:ff67d9f36b67 2210 HAL_IRDA_RxCpltCallback(hirda);
<> 157:ff67d9f36b67 2211
<> 157:ff67d9f36b67 2212 return HAL_OK;
<> 157:ff67d9f36b67 2213 }
<> 157:ff67d9f36b67 2214
<> 157:ff67d9f36b67 2215 return HAL_OK;
<> 157:ff67d9f36b67 2216 }
<> 157:ff67d9f36b67 2217 else
<> 157:ff67d9f36b67 2218 {
<> 157:ff67d9f36b67 2219 /* Clear RXNE interrupt flag */
<> 157:ff67d9f36b67 2220 __HAL_IRDA_SEND_REQ(hirda, IRDA_RXDATA_FLUSH_REQUEST);
<> 157:ff67d9f36b67 2221
<> 157:ff67d9f36b67 2222 return HAL_BUSY;
<> 157:ff67d9f36b67 2223 }
<> 157:ff67d9f36b67 2224 }
<> 157:ff67d9f36b67 2225
<> 157:ff67d9f36b67 2226 /**
<> 157:ff67d9f36b67 2227 * @}
<> 157:ff67d9f36b67 2228 */
<> 157:ff67d9f36b67 2229
<> 144:ef7eb2e8f9f7 2230 #endif /* HAL_IRDA_MODULE_ENABLED */
<> 157:ff67d9f36b67 2231 /**
<> 157:ff67d9f36b67 2232 * @}
<> 157:ff67d9f36b67 2233 */
<> 144:ef7eb2e8f9f7 2234
<> 144:ef7eb2e8f9f7 2235 /**
<> 144:ef7eb2e8f9f7 2236 * @}
<> 144:ef7eb2e8f9f7 2237 */
<> 144:ef7eb2e8f9f7 2238
<> 144:ef7eb2e8f9f7 2239 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 2240