robot

Dependencies:   FastPWM3 mbed

Committer:
bwang
Date:
Sun Mar 12 08:46:04 2017 +0000
Revision:
85:2280526f9bad
Parent:
84:dd32640942a4
Child:
86:b059f637e9ac
better error handling, continued

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bwang 42:030e0ec4eac5 1 #include "mbed.h"
bwang 42:030e0ec4eac5 2
bwang 42:030e0ec4eac5 3 #include "BREMSConfig.h"
bwang 42:030e0ec4eac5 4 #include "BREMSStructs.h"
bwang 42:030e0ec4eac5 5
bwang 82:5e741c5ffd9f 6 #include "CommandProcessor.h"
bwang 82:5e741c5ffd9f 7 #include "PreferenceWriter.h"
bwang 82:5e741c5ffd9f 8
bwang 85:2280526f9bad 9 #include "errors.h"
bwang 85:2280526f9bad 10
bwang 42:030e0ec4eac5 11 #include "config_pins.h"
bwang 42:030e0ec4eac5 12 #include "config_inverter.h"
bwang 42:030e0ec4eac5 13 #include "config_motor.h"
bwang 42:030e0ec4eac5 14 #include "config_loop.h"
bwang 82:5e741c5ffd9f 15 #include "layout.h"
bwang 42:030e0ec4eac5 16
bwang 42:030e0ec4eac5 17 void BREMSConfigRegisters(IOStruct *io) {
bwang 42:030e0ec4eac5 18 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
bwang 42:030e0ec4eac5 19 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
bwang 42:030e0ec4eac5 20 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
bwang 42:030e0ec4eac5 21
bwang 42:030e0ec4eac5 22 RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; //enable TIM1 clock
bwang 42:030e0ec4eac5 23
bwang 42:030e0ec4eac5 24 io->a = new FastPWM(PWMA);
bwang 42:030e0ec4eac5 25 io->b = new FastPWM(PWMB);
bwang 42:030e0ec4eac5 26 io->c = new FastPWM(PWMC);
bwang 42:030e0ec4eac5 27
bwang 42:030e0ec4eac5 28 NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ
bwang 42:030e0ec4eac5 29
bwang 42:030e0ec4eac5 30 TIM1->DIER |= TIM_DIER_UIE; //enable update interrupt
bwang 42:030e0ec4eac5 31 TIM1->CR1 = 0x40; //CMS = 10, interrupt only when counting up
bwang 42:030e0ec4eac5 32 TIM1->CR1 |= TIM_CR1_ARPE; //autoreload on,
bwang 42:030e0ec4eac5 33 TIM1->RCR |= 0x01; //update event once per up/down count of tim1
bwang 42:030e0ec4eac5 34 TIM1->EGR |= TIM_EGR_UG;
bwang 42:030e0ec4eac5 35
bwang 42:030e0ec4eac5 36 TIM1->PSC = 0x00; //no prescaler, timer counts up in sync with the peripheral clock
bwang 42:030e0ec4eac5 37 TIM1->ARR = (int) ((float) 9e7 / F_SW);
bwang 42:030e0ec4eac5 38 TIM1->CCER |= ~(TIM_CCER_CC1NP); //Interupt when low side is on.
bwang 42:030e0ec4eac5 39 TIM1->CR1 |= TIM_CR1_CEN;
bwang 42:030e0ec4eac5 40
bwang 42:030e0ec4eac5 41 //ADC Setup
bwang 42:030e0ec4eac5 42 RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1
bwang 42:030e0ec4eac5 43 RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2
bwang 42:030e0ec4eac5 44
bwang 42:030e0ec4eac5 45 ADC->CCR = 0x00000006; //Regular simultaneous mode, 3 channels
bwang 42:030e0ec4eac5 46
bwang 42:030e0ec4eac5 47 ADC1->CR2 |= ADC_CR2_ADON; //ADC1 on
bwang 42:030e0ec4eac5 48 ADC1->SQR3 = 0x0000004; //PA_4 as ADC1, sequence 0
bwang 42:030e0ec4eac5 49
bwang 42:030e0ec4eac5 50 ADC2->CR2 |= ADC_CR2_ADON; //ADC2 ON
bwang 42:030e0ec4eac5 51 ADC2->SQR3 = 0x00000008; //PB_0 as ADC2, sequence 1
bwang 42:030e0ec4eac5 52
bwang 42:030e0ec4eac5 53 GPIOA->MODER |= (1 << 8);
bwang 42:030e0ec4eac5 54 GPIOA->MODER |= (1 << 9);
bwang 42:030e0ec4eac5 55
bwang 42:030e0ec4eac5 56 GPIOA->MODER |= (1 << 2);
bwang 42:030e0ec4eac5 57 GPIOA->MODER |= (1 << 3);
bwang 42:030e0ec4eac5 58
bwang 42:030e0ec4eac5 59 GPIOA->MODER |= (1 << 0);
bwang 42:030e0ec4eac5 60 GPIOA->MODER |= (1 << 1);
bwang 42:030e0ec4eac5 61
bwang 42:030e0ec4eac5 62 GPIOB->MODER |= (1 << 0);
bwang 42:030e0ec4eac5 63 GPIOB->MODER |= (1 << 1);
bwang 42:030e0ec4eac5 64
bwang 42:030e0ec4eac5 65 GPIOC->MODER |= (1 << 2);
bwang 42:030e0ec4eac5 66 GPIOC->MODER |= (1 << 3);
bwang 42:030e0ec4eac5 67
bwang 42:030e0ec4eac5 68 //DAC setup
bwang 42:030e0ec4eac5 69 RCC->APB1ENR |= 0x20000000;
bwang 42:030e0ec4eac5 70 DAC->CR |= DAC_CR_EN2;
bwang 42:030e0ec4eac5 71
bwang 42:030e0ec4eac5 72 GPIOA->MODER |= (1 << 10);
bwang 42:030e0ec4eac5 73 GPIOA->MODER |= (1 << 11);
bwang 47:1c9868e226d0 74
bwang 47:1c9868e226d0 75 set_dtc(io->a, 0.0f);
bwang 47:1c9868e226d0 76 set_dtc(io->b, 0.0f);
bwang 47:1c9868e226d0 77 set_dtc(io->c, 0.0f);
bwang 42:030e0ec4eac5 78 }
bwang 42:030e0ec4eac5 79
bwang 42:030e0ec4eac5 80 void BREMSZeroCurrent(ReadDataStruct *read) {
bwang 42:030e0ec4eac5 81 for (int i = 0; i < 1000; i++){
bwang 42:030e0ec4eac5 82 read->ia_supp_offset += (float) (ADC1->DR);
bwang 42:030e0ec4eac5 83 read->ib_supp_offset += (float) (ADC2->DR);
bwang 42:030e0ec4eac5 84 ADC1->CR2 |= 0x40000000;
bwang 42:030e0ec4eac5 85 wait_us(100);
bwang 42:030e0ec4eac5 86 }
bwang 42:030e0ec4eac5 87 read->ia_supp_offset /= 1000.0f;
bwang 42:030e0ec4eac5 88 read->ib_supp_offset /= 1000.0f;
bwang 42:030e0ec4eac5 89 read->ia_supp_offset = read->ia_supp_offset / 4096.0f * AVDD - I_OFFSET;
bwang 42:030e0ec4eac5 90 read->ib_supp_offset = read->ib_supp_offset / 4096.0f * AVDD - I_OFFSET;
bwang 42:030e0ec4eac5 91 }
bwang 42:030e0ec4eac5 92
bwang 42:030e0ec4eac5 93 void BREMSStartupMsg(ReadDataStruct *read, Serial *pc) {
bwang 82:5e741c5ffd9f 94 pc->printf("%s\n", "FOC'ed in the Bot Rev A.");
bwang 42:030e0ec4eac5 95 }
bwang 42:030e0ec4eac5 96
bwang 82:5e741c5ffd9f 97 void BREMSInit(IOStruct *io, ReadDataStruct *read, FOCStruct *foc, ControlStruct *control) {
bwang 42:030e0ec4eac5 98 io->en = new DigitalOut(EN);
bwang 42:030e0ec4eac5 99 io->en->write(0);
bwang 42:030e0ec4eac5 100
bwang 42:030e0ec4eac5 101 io->pc = new Serial(USBTX, USBRX);
bwang 82:5e741c5ffd9f 102 io->pc->baud(115200);
bwang 46:748aba7d111d 103
bwang 78:b8df106126a7 104 io->throttle_in = new PwmIn(TH_PIN, TH_LIMIT_LOW, TH_LIMIT_HIGH, TH_LIMIT_CRAZY);
bwang 42:030e0ec4eac5 105 io->pos = new PositionSensorEncoder(CPR, 0);
bwang 42:030e0ec4eac5 106
bwang 42:030e0ec4eac5 107 read->vbus = BUS_VOLTAGE;
bwang 42:030e0ec4eac5 108 read->w = 0.0f;
bwang 42:030e0ec4eac5 109 read->ia_supp_offset = 0.0f;
bwang 42:030e0ec4eac5 110 read->ib_supp_offset = 0.0f;
bwang 42:030e0ec4eac5 111 read->p_mech = io->pos->GetMechPosition();
bwang 84:dd32640942a4 112 read->err_throttle_disabled = false;
bwang 84:dd32640942a4 113 read->err_pos_invalid = false;
bwang 84:dd32640942a4 114 read->err_not_driving = false;
bwang 42:030e0ec4eac5 115
bwang 52:fd3d8df99287 116 BREMSConfigRegisters(io);
bwang 52:fd3d8df99287 117 wait_ms(250);
bwang 52:fd3d8df99287 118 BREMSZeroCurrent(read);
bwang 82:5e741c5ffd9f 119
bwang 82:5e741c5ffd9f 120 io->pref = new PreferenceWriter(6);
bwang 52:fd3d8df99287 121 BREMSStartupMsg(read, io->pc);
bwang 82:5e741c5ffd9f 122 cmd_reload(io->pc, io->pref);
bwang 82:5e741c5ffd9f 123 io->pc->printf("%s", ">");
bwang 52:fd3d8df99287 124
bwang 42:030e0ec4eac5 125 control->d_integral = 0.0f;
bwang 42:030e0ec4eac5 126 control->q_integral = 0.0f;
bwang 42:030e0ec4eac5 127 control->d_filtered = 0.0f;
bwang 42:030e0ec4eac5 128 control->q_filtered = 0.0f;
bwang 42:030e0ec4eac5 129 control->last_d = 0.0f;
bwang 42:030e0ec4eac5 130 control->last_q = 0.0f;
bwang 42:030e0ec4eac5 131 control->d_ref = 0.0f;
bwang 42:030e0ec4eac5 132 control->q_ref = 0.0f;
bwang 70:5e39beeb4a21 133 control->torque_percent = 0.0f;
bwang 82:5e741c5ffd9f 134 control->enabled = false;
bwang 85:2280526f9bad 135
bwang 85:2280526f9bad 136 init_masks();
bwang 42:030e0ec4eac5 137 }