KBrat-SSD645-HW-8_1_SLCD

Fork of SLCD by Erik -

Revision:
6:f4773221794b
Parent:
3:f70873bc6121
--- a/LCDconfig.h	Thu Feb 27 22:02:34 2014 +0000
+++ b/LCDconfig.h	Fri Mar 14 15:13:15 2014 +0000
@@ -11,7 +11,7 @@
 #define _LCDALRCLKSOURCE  (0)         // 0 -- External clock       1 --  Alternate clock
 
 #define _LCDCLKPSL        (0)         //  Clock divider to generate the LCD Waveforms 
-#define _LCDSUPPLY        (1) 
+#define _LCDSUPPLY        (1)
 #define _LCDHREF          (0)         // 0 or 1 
 #define _LCDCLKSOURCE     (1)         // 0 -- External clock       1 --  Alternate clock
 #define _LCDLCK           (1)         //Any number between 0 and 7 
@@ -23,7 +23,7 @@
 #define _LCDCLKSOURCE     (1)         // 0 -- External clock       1 --  Alternate clock
 #define _LCDALRCLKSOURCE  (0)         // 0 -- External clock       1 --  Alternate clock
 #define _LCDCLKPSL        (0)         // Clock divider to generate the LCD Waveforms 
-#define _LCDSUPPLY        (0) 
+#define _LCDSUPPLY        (0)
 #define _LCDLOADADJUST    (3)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
 #define _LCDALTDIV        (0)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
 #define _LCDRVTRIM        (0)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
@@ -40,27 +40,27 @@
 
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Control Register 0  ~|~|~|~|~|~|~|~|~|~|~|~|~*/
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDINTENABLE          (1)    
+#define _LCDINTENABLE          (1)
 
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Control Register 1  ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
 #define _LCDFRAMEINTERRUPT     (0)     //0 Disable Frame Frequency Interrupt
-                                            //1 Enable an LCD interrupt that coincides with the LCD frame frequency
+//1 Enable an LCD interrupt that coincides with the LCD frame frequency
 #define _LCDFULLCPLDIRIVE      (0)     // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
-                                            // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
+// 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
 #define _LCDWAITMODE           (0)     // 0 Allows the LCD driver and charge pump to continue running during wait mode
-                                            //  1 Disable the LCD when the MCU goes into wait mode
+//  1 Disable the LCD when the MCU goes into wait mode
 #define _LCDSTOPMODE           (0)     // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
-                                            //  1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3                                                               
+//  1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3
 
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Voltage Supply Register  ~|~|~|~|~|~|~|~|~|~|~|~*/
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
 #define _LCDHIGHREF             (0)    //0 Divide input VIREG=1.0v
-                                            //1 Do not divide the input VIREG=1.67v
+//1 Do not divide the input VIREG=1.67v
 #define _LCDBBYPASS             (0)    //Determines whether the internal LCD op amp buffer is bypassed
-                                            //0 Buffered mode
-                                            //1 Unbuffered mode
-                            
+//0 Buffered mode
+//1 Unbuffered mode
+
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
 #define _LCDCONTRAST            (1)       //Contrast by software   0 -- Disable    1-- Enable
@@ -69,13 +69,13 @@
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
 #define _LCDBLINKCONTROL        (1)     //0 Disable blink mode
-                                            //1 Enable blink mode
+//1 Enable blink mode
 #define _LCDALTMODE             (0)     //0 Normal display 
-                                            //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
+//1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
 #define _LCDBLANKDISP           (0)     //0 Do not blank display
-                                            //1 Blank display if you put it in 0 the text before blank is manteined     
+//1 Blank display if you put it in 0 the text before blank is manteined
 #define _LCDBLINKMODE           (0)     //0 Display blank during the blink period 
-                                            //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
+//1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
 
 
 //Calculated values
@@ -83,8 +83,8 @@
 #define _LCDDUTY       (_LCDBACKPLANES-1)         //Any number between 0 and 7 
 #define  LCD_WF_BASE    LCD->WF8B[0]
 
-// General definitions used by the LCD library         
-#define  LCD_WF(x)              *((uint8 *)&LCD_WF_BASE + x) 
+// General definitions used by the LCD library
+#define  LCD_WF(x)              *((uint8 *)&LCD_WF_BASE + x)
 
 /*LCD Fault Detections Consts*/
 #define  FP_TYPE  0x00         // pin is a Front Plane
@@ -95,12 +95,12 @@
 #define FDPRS_2      1
 #define FDPRS_4      2
 #define FDPRS_8      3
-#define FDPRS_16     4 
+#define FDPRS_16     4
 #define FDPRS_32     5
 #define FDPRS_64     6
 #define FDPRS_128    7
 
-// Fault Detect Sample Window Width Values  
+// Fault Detect Sample Window Width Values
 #define FDSWW_4           0
 #define FDSWW_8           1
 #define FDSWW_16          2