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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F302R8/core_cmFunc.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
110:165afa46840b 
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /**************************************************************************//**
bogdanm 82:6473597d706e 2 * @file core_cmFunc.h
bogdanm 82:6473597d706e 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 110:165afa46840b 4 * @version V4.10
Kojto 110:165afa46840b 5 * @date 18. March 2015
bogdanm 82:6473597d706e 6 *
bogdanm 82:6473597d706e 7 * @note
bogdanm 82:6473597d706e 8 *
bogdanm 82:6473597d706e 9 ******************************************************************************/
Kojto 110:165afa46840b 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
bogdanm 82:6473597d706e 11
bogdanm 82:6473597d706e 12 All rights reserved.
bogdanm 82:6473597d706e 13 Redistribution and use in source and binary forms, with or without
bogdanm 82:6473597d706e 14 modification, are permitted provided that the following conditions are met:
bogdanm 82:6473597d706e 15 - Redistributions of source code must retain the above copyright
bogdanm 82:6473597d706e 16 notice, this list of conditions and the following disclaimer.
bogdanm 82:6473597d706e 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 82:6473597d706e 18 notice, this list of conditions and the following disclaimer in the
bogdanm 82:6473597d706e 19 documentation and/or other materials provided with the distribution.
bogdanm 82:6473597d706e 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 82:6473597d706e 21 to endorse or promote products derived from this software without
bogdanm 82:6473597d706e 22 specific prior written permission.
bogdanm 82:6473597d706e 23 *
bogdanm 82:6473597d706e 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 82:6473597d706e 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 82:6473597d706e 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 82:6473597d706e 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 82:6473597d706e 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 82:6473597d706e 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 82:6473597d706e 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 82:6473597d706e 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 82:6473597d706e 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 82:6473597d706e 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 82:6473597d706e 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 82:6473597d706e 35 ---------------------------------------------------------------------------*/
bogdanm 82:6473597d706e 36
bogdanm 82:6473597d706e 37
bogdanm 82:6473597d706e 38 #ifndef __CORE_CMFUNC_H
bogdanm 82:6473597d706e 39 #define __CORE_CMFUNC_H
bogdanm 82:6473597d706e 40
bogdanm 82:6473597d706e 41
bogdanm 82:6473597d706e 42 /* ########################### Core Function Access ########################### */
bogdanm 82:6473597d706e 43 /** \ingroup CMSIS_Core_FunctionInterface
bogdanm 82:6473597d706e 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
bogdanm 82:6473597d706e 45 @{
bogdanm 82:6473597d706e 46 */
bogdanm 82:6473597d706e 47
bogdanm 82:6473597d706e 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 82:6473597d706e 49 /* ARM armcc specific functions */
bogdanm 82:6473597d706e 50
bogdanm 82:6473597d706e 51 #if (__ARMCC_VERSION < 400677)
bogdanm 82:6473597d706e 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 82:6473597d706e 53 #endif
bogdanm 82:6473597d706e 54
bogdanm 82:6473597d706e 55 /* intrinsic void __enable_irq(); */
bogdanm 82:6473597d706e 56 /* intrinsic void __disable_irq(); */
bogdanm 82:6473597d706e 57
bogdanm 82:6473597d706e 58 /** \brief Get Control Register
bogdanm 82:6473597d706e 59
bogdanm 82:6473597d706e 60 This function returns the content of the Control Register.
bogdanm 82:6473597d706e 61
bogdanm 82:6473597d706e 62 \return Control Register value
bogdanm 82:6473597d706e 63 */
bogdanm 82:6473597d706e 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 82:6473597d706e 65 {
bogdanm 82:6473597d706e 66 register uint32_t __regControl __ASM("control");
bogdanm 82:6473597d706e 67 return(__regControl);
bogdanm 82:6473597d706e 68 }
bogdanm 82:6473597d706e 69
bogdanm 82:6473597d706e 70
bogdanm 82:6473597d706e 71 /** \brief Set Control Register
bogdanm 82:6473597d706e 72
bogdanm 82:6473597d706e 73 This function writes the given value to the Control Register.
bogdanm 82:6473597d706e 74
bogdanm 82:6473597d706e 75 \param [in] control Control Register value to set
bogdanm 82:6473597d706e 76 */
bogdanm 82:6473597d706e 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 82:6473597d706e 78 {
bogdanm 82:6473597d706e 79 register uint32_t __regControl __ASM("control");
bogdanm 82:6473597d706e 80 __regControl = control;
bogdanm 82:6473597d706e 81 }
bogdanm 82:6473597d706e 82
bogdanm 82:6473597d706e 83
bogdanm 82:6473597d706e 84 /** \brief Get IPSR Register
bogdanm 82:6473597d706e 85
bogdanm 82:6473597d706e 86 This function returns the content of the IPSR Register.
bogdanm 82:6473597d706e 87
bogdanm 82:6473597d706e 88 \return IPSR Register value
bogdanm 82:6473597d706e 89 */
bogdanm 82:6473597d706e 90 __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 82:6473597d706e 91 {
bogdanm 82:6473597d706e 92 register uint32_t __regIPSR __ASM("ipsr");
bogdanm 82:6473597d706e 93 return(__regIPSR);
bogdanm 82:6473597d706e 94 }
bogdanm 82:6473597d706e 95
bogdanm 82:6473597d706e 96
bogdanm 82:6473597d706e 97 /** \brief Get APSR Register
bogdanm 82:6473597d706e 98
bogdanm 82:6473597d706e 99 This function returns the content of the APSR Register.
bogdanm 82:6473597d706e 100
bogdanm 82:6473597d706e 101 \return APSR Register value
bogdanm 82:6473597d706e 102 */
bogdanm 82:6473597d706e 103 __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 82:6473597d706e 104 {
bogdanm 82:6473597d706e 105 register uint32_t __regAPSR __ASM("apsr");
bogdanm 82:6473597d706e 106 return(__regAPSR);
bogdanm 82:6473597d706e 107 }
bogdanm 82:6473597d706e 108
bogdanm 82:6473597d706e 109
bogdanm 82:6473597d706e 110 /** \brief Get xPSR Register
bogdanm 82:6473597d706e 111
bogdanm 82:6473597d706e 112 This function returns the content of the xPSR Register.
bogdanm 82:6473597d706e 113
bogdanm 82:6473597d706e 114 \return xPSR Register value
bogdanm 82:6473597d706e 115 */
bogdanm 82:6473597d706e 116 __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 82:6473597d706e 117 {
bogdanm 82:6473597d706e 118 register uint32_t __regXPSR __ASM("xpsr");
bogdanm 82:6473597d706e 119 return(__regXPSR);
bogdanm 82:6473597d706e 120 }
bogdanm 82:6473597d706e 121
bogdanm 82:6473597d706e 122
bogdanm 82:6473597d706e 123 /** \brief Get Process Stack Pointer
bogdanm 82:6473597d706e 124
bogdanm 82:6473597d706e 125 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 82:6473597d706e 126
bogdanm 82:6473597d706e 127 \return PSP Register value
bogdanm 82:6473597d706e 128 */
bogdanm 82:6473597d706e 129 __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 82:6473597d706e 130 {
bogdanm 82:6473597d706e 131 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 82:6473597d706e 132 return(__regProcessStackPointer);
bogdanm 82:6473597d706e 133 }
bogdanm 82:6473597d706e 134
bogdanm 82:6473597d706e 135
bogdanm 82:6473597d706e 136 /** \brief Set Process Stack Pointer
bogdanm 82:6473597d706e 137
bogdanm 82:6473597d706e 138 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 82:6473597d706e 139
bogdanm 82:6473597d706e 140 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 82:6473597d706e 141 */
bogdanm 82:6473597d706e 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 82:6473597d706e 143 {
bogdanm 82:6473597d706e 144 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 82:6473597d706e 145 __regProcessStackPointer = topOfProcStack;
bogdanm 82:6473597d706e 146 }
bogdanm 82:6473597d706e 147
bogdanm 82:6473597d706e 148
bogdanm 82:6473597d706e 149 /** \brief Get Main Stack Pointer
bogdanm 82:6473597d706e 150
bogdanm 82:6473597d706e 151 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 82:6473597d706e 152
bogdanm 82:6473597d706e 153 \return MSP Register value
bogdanm 82:6473597d706e 154 */
bogdanm 82:6473597d706e 155 __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 82:6473597d706e 156 {
bogdanm 82:6473597d706e 157 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 82:6473597d706e 158 return(__regMainStackPointer);
bogdanm 82:6473597d706e 159 }
bogdanm 82:6473597d706e 160
bogdanm 82:6473597d706e 161
bogdanm 82:6473597d706e 162 /** \brief Set Main Stack Pointer
bogdanm 82:6473597d706e 163
bogdanm 82:6473597d706e 164 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 82:6473597d706e 165
bogdanm 82:6473597d706e 166 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 82:6473597d706e 167 */
bogdanm 82:6473597d706e 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 82:6473597d706e 169 {
bogdanm 82:6473597d706e 170 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 82:6473597d706e 171 __regMainStackPointer = topOfMainStack;
bogdanm 82:6473597d706e 172 }
bogdanm 82:6473597d706e 173
bogdanm 82:6473597d706e 174
bogdanm 82:6473597d706e 175 /** \brief Get Priority Mask
bogdanm 82:6473597d706e 176
bogdanm 82:6473597d706e 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 82:6473597d706e 178
bogdanm 82:6473597d706e 179 \return Priority Mask value
bogdanm 82:6473597d706e 180 */
bogdanm 82:6473597d706e 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 82:6473597d706e 182 {
bogdanm 82:6473597d706e 183 register uint32_t __regPriMask __ASM("primask");
bogdanm 82:6473597d706e 184 return(__regPriMask);
bogdanm 82:6473597d706e 185 }
bogdanm 82:6473597d706e 186
bogdanm 82:6473597d706e 187
bogdanm 82:6473597d706e 188 /** \brief Set Priority Mask
bogdanm 82:6473597d706e 189
bogdanm 82:6473597d706e 190 This function assigns the given value to the Priority Mask Register.
bogdanm 82:6473597d706e 191
bogdanm 82:6473597d706e 192 \param [in] priMask Priority Mask
bogdanm 82:6473597d706e 193 */
bogdanm 82:6473597d706e 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 82:6473597d706e 195 {
bogdanm 82:6473597d706e 196 register uint32_t __regPriMask __ASM("primask");
bogdanm 82:6473597d706e 197 __regPriMask = (priMask);
bogdanm 82:6473597d706e 198 }
bogdanm 82:6473597d706e 199
bogdanm 82:6473597d706e 200
Kojto 110:165afa46840b 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
bogdanm 82:6473597d706e 202
bogdanm 82:6473597d706e 203 /** \brief Enable FIQ
bogdanm 82:6473597d706e 204
bogdanm 82:6473597d706e 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 82:6473597d706e 206 Can only be executed in Privileged modes.
bogdanm 82:6473597d706e 207 */
bogdanm 82:6473597d706e 208 #define __enable_fault_irq __enable_fiq
bogdanm 82:6473597d706e 209
bogdanm 82:6473597d706e 210
bogdanm 82:6473597d706e 211 /** \brief Disable FIQ
bogdanm 82:6473597d706e 212
bogdanm 82:6473597d706e 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 82:6473597d706e 214 Can only be executed in Privileged modes.
bogdanm 82:6473597d706e 215 */
bogdanm 82:6473597d706e 216 #define __disable_fault_irq __disable_fiq
bogdanm 82:6473597d706e 217
bogdanm 82:6473597d706e 218
bogdanm 82:6473597d706e 219 /** \brief Get Base Priority
bogdanm 82:6473597d706e 220
bogdanm 82:6473597d706e 221 This function returns the current value of the Base Priority register.
bogdanm 82:6473597d706e 222
bogdanm 82:6473597d706e 223 \return Base Priority register value
bogdanm 82:6473597d706e 224 */
bogdanm 82:6473597d706e 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 82:6473597d706e 226 {
bogdanm 82:6473597d706e 227 register uint32_t __regBasePri __ASM("basepri");
bogdanm 82:6473597d706e 228 return(__regBasePri);
bogdanm 82:6473597d706e 229 }
bogdanm 82:6473597d706e 230
bogdanm 82:6473597d706e 231
bogdanm 82:6473597d706e 232 /** \brief Set Base Priority
bogdanm 82:6473597d706e 233
bogdanm 82:6473597d706e 234 This function assigns the given value to the Base Priority register.
bogdanm 82:6473597d706e 235
bogdanm 82:6473597d706e 236 \param [in] basePri Base Priority value to set
bogdanm 82:6473597d706e 237 */
bogdanm 82:6473597d706e 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
bogdanm 82:6473597d706e 239 {
bogdanm 82:6473597d706e 240 register uint32_t __regBasePri __ASM("basepri");
bogdanm 82:6473597d706e 241 __regBasePri = (basePri & 0xff);
bogdanm 82:6473597d706e 242 }
bogdanm 82:6473597d706e 243
bogdanm 82:6473597d706e 244
Kojto 110:165afa46840b 245 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 246
Kojto 110:165afa46840b 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 248 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 249
Kojto 110:165afa46840b 250 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 251 */
Kojto 110:165afa46840b 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 110:165afa46840b 253 {
Kojto 110:165afa46840b 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Kojto 110:165afa46840b 255 __regBasePriMax = (basePri & 0xff);
Kojto 110:165afa46840b 256 }
Kojto 110:165afa46840b 257
Kojto 110:165afa46840b 258
bogdanm 82:6473597d706e 259 /** \brief Get Fault Mask
bogdanm 82:6473597d706e 260
bogdanm 82:6473597d706e 261 This function returns the current value of the Fault Mask register.
bogdanm 82:6473597d706e 262
bogdanm 82:6473597d706e 263 \return Fault Mask register value
bogdanm 82:6473597d706e 264 */
bogdanm 82:6473597d706e 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 82:6473597d706e 266 {
bogdanm 82:6473597d706e 267 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 82:6473597d706e 268 return(__regFaultMask);
bogdanm 82:6473597d706e 269 }
bogdanm 82:6473597d706e 270
bogdanm 82:6473597d706e 271
bogdanm 82:6473597d706e 272 /** \brief Set Fault Mask
bogdanm 82:6473597d706e 273
bogdanm 82:6473597d706e 274 This function assigns the given value to the Fault Mask register.
bogdanm 82:6473597d706e 275
bogdanm 82:6473597d706e 276 \param [in] faultMask Fault Mask value to set
bogdanm 82:6473597d706e 277 */
bogdanm 82:6473597d706e 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 82:6473597d706e 279 {
bogdanm 82:6473597d706e 280 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 82:6473597d706e 281 __regFaultMask = (faultMask & (uint32_t)1);
bogdanm 82:6473597d706e 282 }
bogdanm 82:6473597d706e 283
Kojto 110:165afa46840b 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
bogdanm 82:6473597d706e 285
bogdanm 82:6473597d706e 286
Kojto 110:165afa46840b 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 82:6473597d706e 288
bogdanm 82:6473597d706e 289 /** \brief Get FPSCR
bogdanm 82:6473597d706e 290
bogdanm 82:6473597d706e 291 This function returns the current value of the Floating Point Status/Control register.
bogdanm 82:6473597d706e 292
bogdanm 82:6473597d706e 293 \return Floating Point Status/Control register value
bogdanm 82:6473597d706e 294 */
bogdanm 82:6473597d706e 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 82:6473597d706e 296 {
bogdanm 82:6473597d706e 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 82:6473597d706e 298 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 82:6473597d706e 299 return(__regfpscr);
bogdanm 82:6473597d706e 300 #else
bogdanm 82:6473597d706e 301 return(0);
bogdanm 82:6473597d706e 302 #endif
bogdanm 82:6473597d706e 303 }
bogdanm 82:6473597d706e 304
bogdanm 82:6473597d706e 305
bogdanm 82:6473597d706e 306 /** \brief Set FPSCR
bogdanm 82:6473597d706e 307
bogdanm 82:6473597d706e 308 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 82:6473597d706e 309
bogdanm 82:6473597d706e 310 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 82:6473597d706e 311 */
bogdanm 82:6473597d706e 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 82:6473597d706e 313 {
bogdanm 82:6473597d706e 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 82:6473597d706e 315 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 82:6473597d706e 316 __regfpscr = (fpscr);
bogdanm 82:6473597d706e 317 #endif
bogdanm 82:6473597d706e 318 }
bogdanm 82:6473597d706e 319
Kojto 110:165afa46840b 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
bogdanm 82:6473597d706e 321
bogdanm 82:6473597d706e 322
bogdanm 82:6473597d706e 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 82:6473597d706e 324 /* GNU gcc specific functions */
bogdanm 82:6473597d706e 325
bogdanm 82:6473597d706e 326 /** \brief Enable IRQ Interrupts
bogdanm 82:6473597d706e 327
bogdanm 82:6473597d706e 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
bogdanm 82:6473597d706e 329 Can only be executed in Privileged modes.
bogdanm 82:6473597d706e 330 */
bogdanm 82:6473597d706e 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
bogdanm 82:6473597d706e 332 {
bogdanm 82:6473597d706e 333 __ASM volatile ("cpsie i" : : : "memory");
bogdanm 82:6473597d706e 334 }
bogdanm 82:6473597d706e 335
bogdanm 82:6473597d706e 336
bogdanm 82:6473597d706e 337 /** \brief Disable IRQ Interrupts
bogdanm 82:6473597d706e 338
bogdanm 82:6473597d706e 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
bogdanm 82:6473597d706e 340 Can only be executed in Privileged modes.
bogdanm 82:6473597d706e 341 */
bogdanm 82:6473597d706e 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
bogdanm 82:6473597d706e 343 {
bogdanm 82:6473597d706e 344 __ASM volatile ("cpsid i" : : : "memory");
bogdanm 82:6473597d706e 345 }
bogdanm 82:6473597d706e 346
bogdanm 82:6473597d706e 347
bogdanm 82:6473597d706e 348 /** \brief Get Control Register
bogdanm 82:6473597d706e 349
bogdanm 82:6473597d706e 350 This function returns the content of the Control Register.
bogdanm 82:6473597d706e 351
bogdanm 82:6473597d706e 352 \return Control Register value
bogdanm 82:6473597d706e 353 */
bogdanm 82:6473597d706e 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 82:6473597d706e 355 {
bogdanm 82:6473597d706e 356 uint32_t result;
bogdanm 82:6473597d706e 357
bogdanm 82:6473597d706e 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
bogdanm 82:6473597d706e 359 return(result);
bogdanm 82:6473597d706e 360 }
bogdanm 82:6473597d706e 361
bogdanm 82:6473597d706e 362
bogdanm 82:6473597d706e 363 /** \brief Set Control Register
bogdanm 82:6473597d706e 364
bogdanm 82:6473597d706e 365 This function writes the given value to the Control Register.
bogdanm 82:6473597d706e 366
bogdanm 82:6473597d706e 367 \param [in] control Control Register value to set
bogdanm 82:6473597d706e 368 */
bogdanm 82:6473597d706e 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 82:6473597d706e 370 {
bogdanm 82:6473597d706e 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
bogdanm 82:6473597d706e 372 }
bogdanm 82:6473597d706e 373
bogdanm 82:6473597d706e 374
bogdanm 82:6473597d706e 375 /** \brief Get IPSR Register
bogdanm 82:6473597d706e 376
bogdanm 82:6473597d706e 377 This function returns the content of the IPSR Register.
bogdanm 82:6473597d706e 378
bogdanm 82:6473597d706e 379 \return IPSR Register value
bogdanm 82:6473597d706e 380 */
bogdanm 82:6473597d706e 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 82:6473597d706e 382 {
bogdanm 82:6473597d706e 383 uint32_t result;
bogdanm 82:6473597d706e 384
bogdanm 82:6473597d706e 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
bogdanm 82:6473597d706e 386 return(result);
bogdanm 82:6473597d706e 387 }
bogdanm 82:6473597d706e 388
bogdanm 82:6473597d706e 389
bogdanm 82:6473597d706e 390 /** \brief Get APSR Register
bogdanm 82:6473597d706e 391
bogdanm 82:6473597d706e 392 This function returns the content of the APSR Register.
bogdanm 82:6473597d706e 393
bogdanm 82:6473597d706e 394 \return APSR Register value
bogdanm 82:6473597d706e 395 */
bogdanm 82:6473597d706e 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 82:6473597d706e 397 {
bogdanm 82:6473597d706e 398 uint32_t result;
bogdanm 82:6473597d706e 399
bogdanm 82:6473597d706e 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
bogdanm 82:6473597d706e 401 return(result);
bogdanm 82:6473597d706e 402 }
bogdanm 82:6473597d706e 403
bogdanm 82:6473597d706e 404
bogdanm 82:6473597d706e 405 /** \brief Get xPSR Register
bogdanm 82:6473597d706e 406
bogdanm 82:6473597d706e 407 This function returns the content of the xPSR Register.
bogdanm 82:6473597d706e 408
bogdanm 82:6473597d706e 409 \return xPSR Register value
bogdanm 82:6473597d706e 410 */
bogdanm 82:6473597d706e 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 82:6473597d706e 412 {
bogdanm 82:6473597d706e 413 uint32_t result;
bogdanm 82:6473597d706e 414
bogdanm 82:6473597d706e 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
bogdanm 82:6473597d706e 416 return(result);
bogdanm 82:6473597d706e 417 }
bogdanm 82:6473597d706e 418
bogdanm 82:6473597d706e 419
bogdanm 82:6473597d706e 420 /** \brief Get Process Stack Pointer
bogdanm 82:6473597d706e 421
bogdanm 82:6473597d706e 422 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 82:6473597d706e 423
bogdanm 82:6473597d706e 424 \return PSP Register value
bogdanm 82:6473597d706e 425 */
bogdanm 82:6473597d706e 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 82:6473597d706e 427 {
bogdanm 82:6473597d706e 428 register uint32_t result;
bogdanm 82:6473597d706e 429
bogdanm 82:6473597d706e 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
bogdanm 82:6473597d706e 431 return(result);
bogdanm 82:6473597d706e 432 }
bogdanm 82:6473597d706e 433
bogdanm 82:6473597d706e 434
bogdanm 82:6473597d706e 435 /** \brief Set Process Stack Pointer
bogdanm 82:6473597d706e 436
bogdanm 82:6473597d706e 437 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 82:6473597d706e 438
bogdanm 82:6473597d706e 439 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 82:6473597d706e 440 */
bogdanm 82:6473597d706e 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 82:6473597d706e 442 {
bogdanm 82:6473597d706e 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
bogdanm 82:6473597d706e 444 }
bogdanm 82:6473597d706e 445
bogdanm 82:6473597d706e 446
bogdanm 82:6473597d706e 447 /** \brief Get Main Stack Pointer
bogdanm 82:6473597d706e 448
bogdanm 82:6473597d706e 449 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 82:6473597d706e 450
bogdanm 82:6473597d706e 451 \return MSP Register value
bogdanm 82:6473597d706e 452 */
bogdanm 82:6473597d706e 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 82:6473597d706e 454 {
bogdanm 82:6473597d706e 455 register uint32_t result;
bogdanm 82:6473597d706e 456
bogdanm 82:6473597d706e 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
bogdanm 82:6473597d706e 458 return(result);
bogdanm 82:6473597d706e 459 }
bogdanm 82:6473597d706e 460
bogdanm 82:6473597d706e 461
bogdanm 82:6473597d706e 462 /** \brief Set Main Stack Pointer
bogdanm 82:6473597d706e 463
bogdanm 82:6473597d706e 464 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 82:6473597d706e 465
bogdanm 82:6473597d706e 466 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 82:6473597d706e 467 */
bogdanm 82:6473597d706e 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 82:6473597d706e 469 {
bogdanm 82:6473597d706e 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
bogdanm 82:6473597d706e 471 }
bogdanm 82:6473597d706e 472
bogdanm 82:6473597d706e 473
bogdanm 82:6473597d706e 474 /** \brief Get Priority Mask
bogdanm 82:6473597d706e 475
bogdanm 82:6473597d706e 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 82:6473597d706e 477
bogdanm 82:6473597d706e 478 \return Priority Mask value
bogdanm 82:6473597d706e 479 */
bogdanm 82:6473597d706e 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 82:6473597d706e 481 {
bogdanm 82:6473597d706e 482 uint32_t result;
bogdanm 82:6473597d706e 483
bogdanm 82:6473597d706e 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
bogdanm 82:6473597d706e 485 return(result);
bogdanm 82:6473597d706e 486 }
bogdanm 82:6473597d706e 487
bogdanm 82:6473597d706e 488
bogdanm 82:6473597d706e 489 /** \brief Set Priority Mask
bogdanm 82:6473597d706e 490
bogdanm 82:6473597d706e 491 This function assigns the given value to the Priority Mask Register.
bogdanm 82:6473597d706e 492
bogdanm 82:6473597d706e 493 \param [in] priMask Priority Mask
bogdanm 82:6473597d706e 494 */
bogdanm 82:6473597d706e 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 82:6473597d706e 496 {
bogdanm 82:6473597d706e 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
bogdanm 82:6473597d706e 498 }
bogdanm 82:6473597d706e 499
bogdanm 82:6473597d706e 500
bogdanm 82:6473597d706e 501 #if (__CORTEX_M >= 0x03)
bogdanm 82:6473597d706e 502
bogdanm 82:6473597d706e 503 /** \brief Enable FIQ
bogdanm 82:6473597d706e 504
bogdanm 82:6473597d706e 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 82:6473597d706e 506 Can only be executed in Privileged modes.
bogdanm 82:6473597d706e 507 */
bogdanm 82:6473597d706e 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
bogdanm 82:6473597d706e 509 {
bogdanm 82:6473597d706e 510 __ASM volatile ("cpsie f" : : : "memory");
bogdanm 82:6473597d706e 511 }
bogdanm 82:6473597d706e 512
bogdanm 82:6473597d706e 513
bogdanm 82:6473597d706e 514 /** \brief Disable FIQ
bogdanm 82:6473597d706e 515
bogdanm 82:6473597d706e 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 82:6473597d706e 517 Can only be executed in Privileged modes.
bogdanm 82:6473597d706e 518 */
bogdanm 82:6473597d706e 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
bogdanm 82:6473597d706e 520 {
bogdanm 82:6473597d706e 521 __ASM volatile ("cpsid f" : : : "memory");
bogdanm 82:6473597d706e 522 }
bogdanm 82:6473597d706e 523
bogdanm 82:6473597d706e 524
bogdanm 82:6473597d706e 525 /** \brief Get Base Priority
bogdanm 82:6473597d706e 526
bogdanm 82:6473597d706e 527 This function returns the current value of the Base Priority register.
bogdanm 82:6473597d706e 528
bogdanm 82:6473597d706e 529 \return Base Priority register value
bogdanm 82:6473597d706e 530 */
bogdanm 82:6473597d706e 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 82:6473597d706e 532 {
bogdanm 82:6473597d706e 533 uint32_t result;
bogdanm 82:6473597d706e 534
Kojto 110:165afa46840b 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
bogdanm 82:6473597d706e 536 return(result);
bogdanm 82:6473597d706e 537 }
bogdanm 82:6473597d706e 538
bogdanm 82:6473597d706e 539
bogdanm 82:6473597d706e 540 /** \brief Set Base Priority
bogdanm 82:6473597d706e 541
bogdanm 82:6473597d706e 542 This function assigns the given value to the Base Priority register.
bogdanm 82:6473597d706e 543
bogdanm 82:6473597d706e 544 \param [in] basePri Base Priority value to set
bogdanm 82:6473597d706e 545 */
bogdanm 82:6473597d706e 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
bogdanm 82:6473597d706e 547 {
bogdanm 82:6473597d706e 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
bogdanm 82:6473597d706e 549 }
bogdanm 82:6473597d706e 550
bogdanm 82:6473597d706e 551
Kojto 110:165afa46840b 552 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 553
Kojto 110:165afa46840b 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 555 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 556
Kojto 110:165afa46840b 557 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 558 */
Kojto 110:165afa46840b 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Kojto 110:165afa46840b 560 {
Kojto 110:165afa46840b 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Kojto 110:165afa46840b 562 }
Kojto 110:165afa46840b 563
Kojto 110:165afa46840b 564
bogdanm 82:6473597d706e 565 /** \brief Get Fault Mask
bogdanm 82:6473597d706e 566
bogdanm 82:6473597d706e 567 This function returns the current value of the Fault Mask register.
bogdanm 82:6473597d706e 568
bogdanm 82:6473597d706e 569 \return Fault Mask register value
bogdanm 82:6473597d706e 570 */
bogdanm 82:6473597d706e 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 82:6473597d706e 572 {
bogdanm 82:6473597d706e 573 uint32_t result;
bogdanm 82:6473597d706e 574
bogdanm 82:6473597d706e 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
bogdanm 82:6473597d706e 576 return(result);
bogdanm 82:6473597d706e 577 }
bogdanm 82:6473597d706e 578
bogdanm 82:6473597d706e 579
bogdanm 82:6473597d706e 580 /** \brief Set Fault Mask
bogdanm 82:6473597d706e 581
bogdanm 82:6473597d706e 582 This function assigns the given value to the Fault Mask register.
bogdanm 82:6473597d706e 583
bogdanm 82:6473597d706e 584 \param [in] faultMask Fault Mask value to set
bogdanm 82:6473597d706e 585 */
bogdanm 82:6473597d706e 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 82:6473597d706e 587 {
bogdanm 82:6473597d706e 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
bogdanm 82:6473597d706e 589 }
bogdanm 82:6473597d706e 590
bogdanm 82:6473597d706e 591 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 82:6473597d706e 592
bogdanm 82:6473597d706e 593
Kojto 110:165afa46840b 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 82:6473597d706e 595
bogdanm 82:6473597d706e 596 /** \brief Get FPSCR
bogdanm 82:6473597d706e 597
bogdanm 82:6473597d706e 598 This function returns the current value of the Floating Point Status/Control register.
bogdanm 82:6473597d706e 599
bogdanm 82:6473597d706e 600 \return Floating Point Status/Control register value
bogdanm 82:6473597d706e 601 */
bogdanm 82:6473597d706e 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 82:6473597d706e 603 {
bogdanm 82:6473597d706e 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 82:6473597d706e 605 uint32_t result;
bogdanm 82:6473597d706e 606
bogdanm 82:6473597d706e 607 /* Empty asm statement works as a scheduling barrier */
bogdanm 82:6473597d706e 608 __ASM volatile ("");
bogdanm 82:6473597d706e 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
bogdanm 82:6473597d706e 610 __ASM volatile ("");
bogdanm 82:6473597d706e 611 return(result);
bogdanm 82:6473597d706e 612 #else
bogdanm 82:6473597d706e 613 return(0);
bogdanm 82:6473597d706e 614 #endif
bogdanm 82:6473597d706e 615 }
bogdanm 82:6473597d706e 616
bogdanm 82:6473597d706e 617
bogdanm 82:6473597d706e 618 /** \brief Set FPSCR
bogdanm 82:6473597d706e 619
bogdanm 82:6473597d706e 620 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 82:6473597d706e 621
bogdanm 82:6473597d706e 622 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 82:6473597d706e 623 */
bogdanm 82:6473597d706e 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 82:6473597d706e 625 {
bogdanm 82:6473597d706e 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 82:6473597d706e 627 /* Empty asm statement works as a scheduling barrier */
bogdanm 82:6473597d706e 628 __ASM volatile ("");
bogdanm 82:6473597d706e 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
bogdanm 82:6473597d706e 630 __ASM volatile ("");
bogdanm 82:6473597d706e 631 #endif
bogdanm 82:6473597d706e 632 }
bogdanm 82:6473597d706e 633
Kojto 110:165afa46840b 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 110:165afa46840b 635
Kojto 110:165afa46840b 636
Kojto 110:165afa46840b 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 110:165afa46840b 638 /* IAR iccarm specific functions */
Kojto 110:165afa46840b 639 #include <cmsis_iar.h>
Kojto 110:165afa46840b 640
Kojto 110:165afa46840b 641
Kojto 110:165afa46840b 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 110:165afa46840b 643 /* TI CCS specific functions */
Kojto 110:165afa46840b 644 #include <cmsis_ccs.h>
bogdanm 82:6473597d706e 645
bogdanm 82:6473597d706e 646
bogdanm 82:6473597d706e 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 82:6473597d706e 648 /* TASKING carm specific functions */
bogdanm 82:6473597d706e 649 /*
bogdanm 82:6473597d706e 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 110:165afa46840b 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 82:6473597d706e 652 * Including the CMSIS ones.
bogdanm 82:6473597d706e 653 */
bogdanm 82:6473597d706e 654
Kojto 110:165afa46840b 655
Kojto 110:165afa46840b 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 110:165afa46840b 657 /* Cosmic specific functions */
Kojto 110:165afa46840b 658 #include <cmsis_csm.h>
Kojto 110:165afa46840b 659
bogdanm 82:6473597d706e 660 #endif
bogdanm 82:6473597d706e 661
bogdanm 82:6473597d706e 662 /*@} end of CMSIS_Core_RegAccFunctions */
bogdanm 82:6473597d706e 663
bogdanm 82:6473597d706e 664 #endif /* __CORE_CMFUNC_H */