The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
82:6473597d706e
Release 136 of the mbed library

Ports for Upcoming Targets


Fixes and Changes

3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432
3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181
3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626
3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628
3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629
3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632
3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642
3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664
3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655
3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657
3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658
3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685
3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692
3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621
3649: [STM32F7] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3649
3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695
3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /**************************************************************************//**
bogdanm 82:6473597d706e 2 * @file core_cm4_simd.h
bogdanm 82:6473597d706e 3 * @brief CMSIS Cortex-M4 SIMD Header File
bogdanm 82:6473597d706e 4 * @version V3.20
bogdanm 82:6473597d706e 5 * @date 25. February 2013
bogdanm 82:6473597d706e 6 *
bogdanm 82:6473597d706e 7 * @note
bogdanm 82:6473597d706e 8 *
bogdanm 82:6473597d706e 9 ******************************************************************************/
bogdanm 82:6473597d706e 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 82:6473597d706e 11
bogdanm 82:6473597d706e 12 All rights reserved.
bogdanm 82:6473597d706e 13 Redistribution and use in source and binary forms, with or without
bogdanm 82:6473597d706e 14 modification, are permitted provided that the following conditions are met:
bogdanm 82:6473597d706e 15 - Redistributions of source code must retain the above copyright
bogdanm 82:6473597d706e 16 notice, this list of conditions and the following disclaimer.
bogdanm 82:6473597d706e 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 82:6473597d706e 18 notice, this list of conditions and the following disclaimer in the
bogdanm 82:6473597d706e 19 documentation and/or other materials provided with the distribution.
bogdanm 82:6473597d706e 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 82:6473597d706e 21 to endorse or promote products derived from this software without
bogdanm 82:6473597d706e 22 specific prior written permission.
bogdanm 82:6473597d706e 23 *
bogdanm 82:6473597d706e 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 82:6473597d706e 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 82:6473597d706e 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 82:6473597d706e 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 82:6473597d706e 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 82:6473597d706e 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 82:6473597d706e 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 82:6473597d706e 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 82:6473597d706e 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 82:6473597d706e 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 82:6473597d706e 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 82:6473597d706e 35 ---------------------------------------------------------------------------*/
bogdanm 82:6473597d706e 36
bogdanm 82:6473597d706e 37
bogdanm 82:6473597d706e 38 #ifdef __cplusplus
bogdanm 82:6473597d706e 39 extern "C" {
bogdanm 82:6473597d706e 40 #endif
bogdanm 82:6473597d706e 41
bogdanm 82:6473597d706e 42 #ifndef __CORE_CM4_SIMD_H
bogdanm 82:6473597d706e 43 #define __CORE_CM4_SIMD_H
bogdanm 82:6473597d706e 44
bogdanm 82:6473597d706e 45
bogdanm 82:6473597d706e 46 /*******************************************************************************
bogdanm 82:6473597d706e 47 * Hardware Abstraction Layer
bogdanm 82:6473597d706e 48 ******************************************************************************/
bogdanm 82:6473597d706e 49
bogdanm 82:6473597d706e 50
bogdanm 82:6473597d706e 51 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 82:6473597d706e 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 82:6473597d706e 53 Access to dedicated SIMD instructions
bogdanm 82:6473597d706e 54 @{
bogdanm 82:6473597d706e 55 */
bogdanm 82:6473597d706e 56
bogdanm 82:6473597d706e 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 82:6473597d706e 58 /* ARM armcc specific functions */
bogdanm 82:6473597d706e 59
bogdanm 82:6473597d706e 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 82:6473597d706e 61 #define __SADD8 __sadd8
bogdanm 82:6473597d706e 62 #define __QADD8 __qadd8
bogdanm 82:6473597d706e 63 #define __SHADD8 __shadd8
bogdanm 82:6473597d706e 64 #define __UADD8 __uadd8
bogdanm 82:6473597d706e 65 #define __UQADD8 __uqadd8
bogdanm 82:6473597d706e 66 #define __UHADD8 __uhadd8
bogdanm 82:6473597d706e 67 #define __SSUB8 __ssub8
bogdanm 82:6473597d706e 68 #define __QSUB8 __qsub8
bogdanm 82:6473597d706e 69 #define __SHSUB8 __shsub8
bogdanm 82:6473597d706e 70 #define __USUB8 __usub8
bogdanm 82:6473597d706e 71 #define __UQSUB8 __uqsub8
bogdanm 82:6473597d706e 72 #define __UHSUB8 __uhsub8
bogdanm 82:6473597d706e 73 #define __SADD16 __sadd16
bogdanm 82:6473597d706e 74 #define __QADD16 __qadd16
bogdanm 82:6473597d706e 75 #define __SHADD16 __shadd16
bogdanm 82:6473597d706e 76 #define __UADD16 __uadd16
bogdanm 82:6473597d706e 77 #define __UQADD16 __uqadd16
bogdanm 82:6473597d706e 78 #define __UHADD16 __uhadd16
bogdanm 82:6473597d706e 79 #define __SSUB16 __ssub16
bogdanm 82:6473597d706e 80 #define __QSUB16 __qsub16
bogdanm 82:6473597d706e 81 #define __SHSUB16 __shsub16
bogdanm 82:6473597d706e 82 #define __USUB16 __usub16
bogdanm 82:6473597d706e 83 #define __UQSUB16 __uqsub16
bogdanm 82:6473597d706e 84 #define __UHSUB16 __uhsub16
bogdanm 82:6473597d706e 85 #define __SASX __sasx
bogdanm 82:6473597d706e 86 #define __QASX __qasx
bogdanm 82:6473597d706e 87 #define __SHASX __shasx
bogdanm 82:6473597d706e 88 #define __UASX __uasx
bogdanm 82:6473597d706e 89 #define __UQASX __uqasx
bogdanm 82:6473597d706e 90 #define __UHASX __uhasx
bogdanm 82:6473597d706e 91 #define __SSAX __ssax
bogdanm 82:6473597d706e 92 #define __QSAX __qsax
bogdanm 82:6473597d706e 93 #define __SHSAX __shsax
bogdanm 82:6473597d706e 94 #define __USAX __usax
bogdanm 82:6473597d706e 95 #define __UQSAX __uqsax
bogdanm 82:6473597d706e 96 #define __UHSAX __uhsax
bogdanm 82:6473597d706e 97 #define __USAD8 __usad8
bogdanm 82:6473597d706e 98 #define __USADA8 __usada8
bogdanm 82:6473597d706e 99 #define __SSAT16 __ssat16
bogdanm 82:6473597d706e 100 #define __USAT16 __usat16
bogdanm 82:6473597d706e 101 #define __UXTB16 __uxtb16
bogdanm 82:6473597d706e 102 #define __UXTAB16 __uxtab16
bogdanm 82:6473597d706e 103 #define __SXTB16 __sxtb16
bogdanm 82:6473597d706e 104 #define __SXTAB16 __sxtab16
bogdanm 82:6473597d706e 105 #define __SMUAD __smuad
bogdanm 82:6473597d706e 106 #define __SMUADX __smuadx
bogdanm 82:6473597d706e 107 #define __SMLAD __smlad
bogdanm 82:6473597d706e 108 #define __SMLADX __smladx
bogdanm 82:6473597d706e 109 #define __SMLALD __smlald
bogdanm 82:6473597d706e 110 #define __SMLALDX __smlaldx
bogdanm 82:6473597d706e 111 #define __SMUSD __smusd
bogdanm 82:6473597d706e 112 #define __SMUSDX __smusdx
bogdanm 82:6473597d706e 113 #define __SMLSD __smlsd
bogdanm 82:6473597d706e 114 #define __SMLSDX __smlsdx
bogdanm 82:6473597d706e 115 #define __SMLSLD __smlsld
bogdanm 82:6473597d706e 116 #define __SMLSLDX __smlsldx
bogdanm 82:6473597d706e 117 #define __SEL __sel
bogdanm 82:6473597d706e 118 #define __QADD __qadd
bogdanm 82:6473597d706e 119 #define __QSUB __qsub
bogdanm 82:6473597d706e 120
bogdanm 82:6473597d706e 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 82:6473597d706e 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 82:6473597d706e 123
bogdanm 82:6473597d706e 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 82:6473597d706e 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 82:6473597d706e 126
bogdanm 82:6473597d706e 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 82:6473597d706e 128 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 82:6473597d706e 129
bogdanm 82:6473597d706e 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 82:6473597d706e 131
bogdanm 82:6473597d706e 132
bogdanm 82:6473597d706e 133
bogdanm 82:6473597d706e 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 82:6473597d706e 135 /* IAR iccarm specific functions */
bogdanm 82:6473597d706e 136
bogdanm 82:6473597d706e 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 82:6473597d706e 138 #include <cmsis_iar.h>
bogdanm 82:6473597d706e 139
bogdanm 82:6473597d706e 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 82:6473597d706e 141
bogdanm 82:6473597d706e 142
bogdanm 82:6473597d706e 143
bogdanm 82:6473597d706e 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 82:6473597d706e 145 /* TI CCS specific functions */
bogdanm 82:6473597d706e 146
bogdanm 82:6473597d706e 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 82:6473597d706e 148 #include <cmsis_ccs.h>
bogdanm 82:6473597d706e 149
bogdanm 82:6473597d706e 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 82:6473597d706e 151
bogdanm 82:6473597d706e 152
bogdanm 82:6473597d706e 153
bogdanm 82:6473597d706e 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 82:6473597d706e 155 /* GNU gcc specific functions */
bogdanm 82:6473597d706e 156
bogdanm 82:6473597d706e 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 82:6473597d706e 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 159 {
bogdanm 82:6473597d706e 160 uint32_t result;
bogdanm 82:6473597d706e 161
bogdanm 82:6473597d706e 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 163 return(result);
bogdanm 82:6473597d706e 164 }
bogdanm 82:6473597d706e 165
bogdanm 82:6473597d706e 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 167 {
bogdanm 82:6473597d706e 168 uint32_t result;
bogdanm 82:6473597d706e 169
bogdanm 82:6473597d706e 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 171 return(result);
bogdanm 82:6473597d706e 172 }
bogdanm 82:6473597d706e 173
bogdanm 82:6473597d706e 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 175 {
bogdanm 82:6473597d706e 176 uint32_t result;
bogdanm 82:6473597d706e 177
bogdanm 82:6473597d706e 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 179 return(result);
bogdanm 82:6473597d706e 180 }
bogdanm 82:6473597d706e 181
bogdanm 82:6473597d706e 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 183 {
bogdanm 82:6473597d706e 184 uint32_t result;
bogdanm 82:6473597d706e 185
bogdanm 82:6473597d706e 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 187 return(result);
bogdanm 82:6473597d706e 188 }
bogdanm 82:6473597d706e 189
bogdanm 82:6473597d706e 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 191 {
bogdanm 82:6473597d706e 192 uint32_t result;
bogdanm 82:6473597d706e 193
bogdanm 82:6473597d706e 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 195 return(result);
bogdanm 82:6473597d706e 196 }
bogdanm 82:6473597d706e 197
bogdanm 82:6473597d706e 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 199 {
bogdanm 82:6473597d706e 200 uint32_t result;
bogdanm 82:6473597d706e 201
bogdanm 82:6473597d706e 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 203 return(result);
bogdanm 82:6473597d706e 204 }
bogdanm 82:6473597d706e 205
bogdanm 82:6473597d706e 206
bogdanm 82:6473597d706e 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 208 {
bogdanm 82:6473597d706e 209 uint32_t result;
bogdanm 82:6473597d706e 210
bogdanm 82:6473597d706e 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 212 return(result);
bogdanm 82:6473597d706e 213 }
bogdanm 82:6473597d706e 214
bogdanm 82:6473597d706e 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 216 {
bogdanm 82:6473597d706e 217 uint32_t result;
bogdanm 82:6473597d706e 218
bogdanm 82:6473597d706e 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 220 return(result);
bogdanm 82:6473597d706e 221 }
bogdanm 82:6473597d706e 222
bogdanm 82:6473597d706e 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 224 {
bogdanm 82:6473597d706e 225 uint32_t result;
bogdanm 82:6473597d706e 226
bogdanm 82:6473597d706e 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 228 return(result);
bogdanm 82:6473597d706e 229 }
bogdanm 82:6473597d706e 230
bogdanm 82:6473597d706e 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 232 {
bogdanm 82:6473597d706e 233 uint32_t result;
bogdanm 82:6473597d706e 234
bogdanm 82:6473597d706e 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 236 return(result);
bogdanm 82:6473597d706e 237 }
bogdanm 82:6473597d706e 238
bogdanm 82:6473597d706e 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 240 {
bogdanm 82:6473597d706e 241 uint32_t result;
bogdanm 82:6473597d706e 242
bogdanm 82:6473597d706e 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 244 return(result);
bogdanm 82:6473597d706e 245 }
bogdanm 82:6473597d706e 246
bogdanm 82:6473597d706e 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 248 {
bogdanm 82:6473597d706e 249 uint32_t result;
bogdanm 82:6473597d706e 250
bogdanm 82:6473597d706e 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 252 return(result);
bogdanm 82:6473597d706e 253 }
bogdanm 82:6473597d706e 254
bogdanm 82:6473597d706e 255
bogdanm 82:6473597d706e 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 257 {
bogdanm 82:6473597d706e 258 uint32_t result;
bogdanm 82:6473597d706e 259
bogdanm 82:6473597d706e 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 261 return(result);
bogdanm 82:6473597d706e 262 }
bogdanm 82:6473597d706e 263
bogdanm 82:6473597d706e 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 265 {
bogdanm 82:6473597d706e 266 uint32_t result;
bogdanm 82:6473597d706e 267
bogdanm 82:6473597d706e 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 269 return(result);
bogdanm 82:6473597d706e 270 }
bogdanm 82:6473597d706e 271
bogdanm 82:6473597d706e 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 273 {
bogdanm 82:6473597d706e 274 uint32_t result;
bogdanm 82:6473597d706e 275
bogdanm 82:6473597d706e 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 277 return(result);
bogdanm 82:6473597d706e 278 }
bogdanm 82:6473597d706e 279
bogdanm 82:6473597d706e 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 281 {
bogdanm 82:6473597d706e 282 uint32_t result;
bogdanm 82:6473597d706e 283
bogdanm 82:6473597d706e 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 285 return(result);
bogdanm 82:6473597d706e 286 }
bogdanm 82:6473597d706e 287
bogdanm 82:6473597d706e 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 289 {
bogdanm 82:6473597d706e 290 uint32_t result;
bogdanm 82:6473597d706e 291
bogdanm 82:6473597d706e 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 293 return(result);
bogdanm 82:6473597d706e 294 }
bogdanm 82:6473597d706e 295
bogdanm 82:6473597d706e 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 297 {
bogdanm 82:6473597d706e 298 uint32_t result;
bogdanm 82:6473597d706e 299
bogdanm 82:6473597d706e 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 301 return(result);
bogdanm 82:6473597d706e 302 }
bogdanm 82:6473597d706e 303
bogdanm 82:6473597d706e 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 305 {
bogdanm 82:6473597d706e 306 uint32_t result;
bogdanm 82:6473597d706e 307
bogdanm 82:6473597d706e 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 309 return(result);
bogdanm 82:6473597d706e 310 }
bogdanm 82:6473597d706e 311
bogdanm 82:6473597d706e 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 313 {
bogdanm 82:6473597d706e 314 uint32_t result;
bogdanm 82:6473597d706e 315
bogdanm 82:6473597d706e 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 317 return(result);
bogdanm 82:6473597d706e 318 }
bogdanm 82:6473597d706e 319
bogdanm 82:6473597d706e 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 321 {
bogdanm 82:6473597d706e 322 uint32_t result;
bogdanm 82:6473597d706e 323
bogdanm 82:6473597d706e 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 325 return(result);
bogdanm 82:6473597d706e 326 }
bogdanm 82:6473597d706e 327
bogdanm 82:6473597d706e 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 329 {
bogdanm 82:6473597d706e 330 uint32_t result;
bogdanm 82:6473597d706e 331
bogdanm 82:6473597d706e 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 333 return(result);
bogdanm 82:6473597d706e 334 }
bogdanm 82:6473597d706e 335
bogdanm 82:6473597d706e 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 337 {
bogdanm 82:6473597d706e 338 uint32_t result;
bogdanm 82:6473597d706e 339
bogdanm 82:6473597d706e 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 341 return(result);
bogdanm 82:6473597d706e 342 }
bogdanm 82:6473597d706e 343
bogdanm 82:6473597d706e 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 345 {
bogdanm 82:6473597d706e 346 uint32_t result;
bogdanm 82:6473597d706e 347
bogdanm 82:6473597d706e 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 349 return(result);
bogdanm 82:6473597d706e 350 }
bogdanm 82:6473597d706e 351
bogdanm 82:6473597d706e 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 353 {
bogdanm 82:6473597d706e 354 uint32_t result;
bogdanm 82:6473597d706e 355
bogdanm 82:6473597d706e 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 357 return(result);
bogdanm 82:6473597d706e 358 }
bogdanm 82:6473597d706e 359
bogdanm 82:6473597d706e 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 361 {
bogdanm 82:6473597d706e 362 uint32_t result;
bogdanm 82:6473597d706e 363
bogdanm 82:6473597d706e 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 365 return(result);
bogdanm 82:6473597d706e 366 }
bogdanm 82:6473597d706e 367
bogdanm 82:6473597d706e 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 369 {
bogdanm 82:6473597d706e 370 uint32_t result;
bogdanm 82:6473597d706e 371
bogdanm 82:6473597d706e 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 373 return(result);
bogdanm 82:6473597d706e 374 }
bogdanm 82:6473597d706e 375
bogdanm 82:6473597d706e 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 377 {
bogdanm 82:6473597d706e 378 uint32_t result;
bogdanm 82:6473597d706e 379
bogdanm 82:6473597d706e 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 381 return(result);
bogdanm 82:6473597d706e 382 }
bogdanm 82:6473597d706e 383
bogdanm 82:6473597d706e 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 385 {
bogdanm 82:6473597d706e 386 uint32_t result;
bogdanm 82:6473597d706e 387
bogdanm 82:6473597d706e 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 389 return(result);
bogdanm 82:6473597d706e 390 }
bogdanm 82:6473597d706e 391
bogdanm 82:6473597d706e 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 393 {
bogdanm 82:6473597d706e 394 uint32_t result;
bogdanm 82:6473597d706e 395
bogdanm 82:6473597d706e 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 397 return(result);
bogdanm 82:6473597d706e 398 }
bogdanm 82:6473597d706e 399
bogdanm 82:6473597d706e 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 401 {
bogdanm 82:6473597d706e 402 uint32_t result;
bogdanm 82:6473597d706e 403
bogdanm 82:6473597d706e 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 405 return(result);
bogdanm 82:6473597d706e 406 }
bogdanm 82:6473597d706e 407
bogdanm 82:6473597d706e 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 409 {
bogdanm 82:6473597d706e 410 uint32_t result;
bogdanm 82:6473597d706e 411
bogdanm 82:6473597d706e 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 413 return(result);
bogdanm 82:6473597d706e 414 }
bogdanm 82:6473597d706e 415
bogdanm 82:6473597d706e 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 417 {
bogdanm 82:6473597d706e 418 uint32_t result;
bogdanm 82:6473597d706e 419
bogdanm 82:6473597d706e 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 421 return(result);
bogdanm 82:6473597d706e 422 }
bogdanm 82:6473597d706e 423
bogdanm 82:6473597d706e 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 425 {
bogdanm 82:6473597d706e 426 uint32_t result;
bogdanm 82:6473597d706e 427
bogdanm 82:6473597d706e 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 429 return(result);
bogdanm 82:6473597d706e 430 }
bogdanm 82:6473597d706e 431
bogdanm 82:6473597d706e 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 433 {
bogdanm 82:6473597d706e 434 uint32_t result;
bogdanm 82:6473597d706e 435
bogdanm 82:6473597d706e 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 437 return(result);
bogdanm 82:6473597d706e 438 }
bogdanm 82:6473597d706e 439
bogdanm 82:6473597d706e 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 441 {
bogdanm 82:6473597d706e 442 uint32_t result;
bogdanm 82:6473597d706e 443
bogdanm 82:6473597d706e 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 445 return(result);
bogdanm 82:6473597d706e 446 }
bogdanm 82:6473597d706e 447
bogdanm 82:6473597d706e 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 449 {
bogdanm 82:6473597d706e 450 uint32_t result;
bogdanm 82:6473597d706e 451
bogdanm 82:6473597d706e 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 453 return(result);
bogdanm 82:6473597d706e 454 }
bogdanm 82:6473597d706e 455
bogdanm 82:6473597d706e 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 82:6473597d706e 457 {
bogdanm 82:6473597d706e 458 uint32_t result;
bogdanm 82:6473597d706e 459
bogdanm 82:6473597d706e 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 82:6473597d706e 461 return(result);
bogdanm 82:6473597d706e 462 }
bogdanm 82:6473597d706e 463
bogdanm 82:6473597d706e 464 #define __SSAT16(ARG1,ARG2) \
bogdanm 82:6473597d706e 465 ({ \
bogdanm 82:6473597d706e 466 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 82:6473597d706e 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 82:6473597d706e 468 __RES; \
bogdanm 82:6473597d706e 469 })
bogdanm 82:6473597d706e 470
bogdanm 82:6473597d706e 471 #define __USAT16(ARG1,ARG2) \
bogdanm 82:6473597d706e 472 ({ \
bogdanm 82:6473597d706e 473 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 82:6473597d706e 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 82:6473597d706e 475 __RES; \
bogdanm 82:6473597d706e 476 })
bogdanm 82:6473597d706e 477
bogdanm 82:6473597d706e 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 82:6473597d706e 479 {
bogdanm 82:6473597d706e 480 uint32_t result;
bogdanm 82:6473597d706e 481
bogdanm 82:6473597d706e 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 82:6473597d706e 483 return(result);
bogdanm 82:6473597d706e 484 }
bogdanm 82:6473597d706e 485
bogdanm 82:6473597d706e 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 487 {
bogdanm 82:6473597d706e 488 uint32_t result;
bogdanm 82:6473597d706e 489
bogdanm 82:6473597d706e 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 491 return(result);
bogdanm 82:6473597d706e 492 }
bogdanm 82:6473597d706e 493
bogdanm 82:6473597d706e 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 82:6473597d706e 495 {
bogdanm 82:6473597d706e 496 uint32_t result;
bogdanm 82:6473597d706e 497
bogdanm 82:6473597d706e 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 82:6473597d706e 499 return(result);
bogdanm 82:6473597d706e 500 }
bogdanm 82:6473597d706e 501
bogdanm 82:6473597d706e 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 503 {
bogdanm 82:6473597d706e 504 uint32_t result;
bogdanm 82:6473597d706e 505
bogdanm 82:6473597d706e 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 507 return(result);
bogdanm 82:6473597d706e 508 }
bogdanm 82:6473597d706e 509
bogdanm 82:6473597d706e 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 511 {
bogdanm 82:6473597d706e 512 uint32_t result;
bogdanm 82:6473597d706e 513
bogdanm 82:6473597d706e 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 515 return(result);
bogdanm 82:6473597d706e 516 }
bogdanm 82:6473597d706e 517
bogdanm 82:6473597d706e 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 519 {
bogdanm 82:6473597d706e 520 uint32_t result;
bogdanm 82:6473597d706e 521
bogdanm 82:6473597d706e 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 523 return(result);
bogdanm 82:6473597d706e 524 }
bogdanm 82:6473597d706e 525
bogdanm 82:6473597d706e 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 82:6473597d706e 527 {
bogdanm 82:6473597d706e 528 uint32_t result;
bogdanm 82:6473597d706e 529
bogdanm 82:6473597d706e 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 82:6473597d706e 531 return(result);
bogdanm 82:6473597d706e 532 }
bogdanm 82:6473597d706e 533
bogdanm 82:6473597d706e 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 82:6473597d706e 535 {
bogdanm 82:6473597d706e 536 uint32_t result;
bogdanm 82:6473597d706e 537
bogdanm 82:6473597d706e 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 82:6473597d706e 539 return(result);
bogdanm 82:6473597d706e 540 }
bogdanm 82:6473597d706e 541
bogdanm 82:6473597d706e 542 #define __SMLALD(ARG1,ARG2,ARG3) \
bogdanm 82:6473597d706e 543 ({ \
bogdanm 82:6473597d706e 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 82:6473597d706e 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 82:6473597d706e 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 82:6473597d706e 547 })
bogdanm 82:6473597d706e 548
bogdanm 82:6473597d706e 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
bogdanm 82:6473597d706e 550 ({ \
bogdanm 82:6473597d706e 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 82:6473597d706e 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 82:6473597d706e 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 82:6473597d706e 554 })
bogdanm 82:6473597d706e 555
bogdanm 82:6473597d706e 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 557 {
bogdanm 82:6473597d706e 558 uint32_t result;
bogdanm 82:6473597d706e 559
bogdanm 82:6473597d706e 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 561 return(result);
bogdanm 82:6473597d706e 562 }
bogdanm 82:6473597d706e 563
bogdanm 82:6473597d706e 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 565 {
bogdanm 82:6473597d706e 566 uint32_t result;
bogdanm 82:6473597d706e 567
bogdanm 82:6473597d706e 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 569 return(result);
bogdanm 82:6473597d706e 570 }
bogdanm 82:6473597d706e 571
bogdanm 82:6473597d706e 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 82:6473597d706e 573 {
bogdanm 82:6473597d706e 574 uint32_t result;
bogdanm 82:6473597d706e 575
bogdanm 82:6473597d706e 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 82:6473597d706e 577 return(result);
bogdanm 82:6473597d706e 578 }
bogdanm 82:6473597d706e 579
bogdanm 82:6473597d706e 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 82:6473597d706e 581 {
bogdanm 82:6473597d706e 582 uint32_t result;
bogdanm 82:6473597d706e 583
bogdanm 82:6473597d706e 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 82:6473597d706e 585 return(result);
bogdanm 82:6473597d706e 586 }
bogdanm 82:6473597d706e 587
bogdanm 82:6473597d706e 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
bogdanm 82:6473597d706e 589 ({ \
bogdanm 82:6473597d706e 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 82:6473597d706e 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 82:6473597d706e 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 82:6473597d706e 593 })
bogdanm 82:6473597d706e 594
bogdanm 82:6473597d706e 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
bogdanm 82:6473597d706e 596 ({ \
bogdanm 82:6473597d706e 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 82:6473597d706e 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 82:6473597d706e 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 82:6473597d706e 600 })
bogdanm 82:6473597d706e 601
bogdanm 82:6473597d706e 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 603 {
bogdanm 82:6473597d706e 604 uint32_t result;
bogdanm 82:6473597d706e 605
bogdanm 82:6473597d706e 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 607 return(result);
bogdanm 82:6473597d706e 608 }
bogdanm 82:6473597d706e 609
bogdanm 82:6473597d706e 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 611 {
bogdanm 82:6473597d706e 612 uint32_t result;
bogdanm 82:6473597d706e 613
bogdanm 82:6473597d706e 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 615 return(result);
bogdanm 82:6473597d706e 616 }
bogdanm 82:6473597d706e 617
bogdanm 82:6473597d706e 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 82:6473597d706e 619 {
bogdanm 82:6473597d706e 620 uint32_t result;
bogdanm 82:6473597d706e 621
bogdanm 82:6473597d706e 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 82:6473597d706e 623 return(result);
bogdanm 82:6473597d706e 624 }
bogdanm 82:6473597d706e 625
bogdanm 82:6473597d706e 626 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 82:6473597d706e 627 ({ \
bogdanm 82:6473597d706e 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 82:6473597d706e 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 82:6473597d706e 630 __RES; \
bogdanm 82:6473597d706e 631 })
bogdanm 82:6473597d706e 632
bogdanm 82:6473597d706e 633 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 82:6473597d706e 634 ({ \
bogdanm 82:6473597d706e 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 82:6473597d706e 636 if (ARG3 == 0) \
bogdanm 82:6473597d706e 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 82:6473597d706e 638 else \
bogdanm 82:6473597d706e 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 82:6473597d706e 640 __RES; \
bogdanm 82:6473597d706e 641 })
bogdanm 82:6473597d706e 642
bogdanm 82:6473597d706e 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 82:6473597d706e 644 {
bogdanm 82:6473597d706e 645 int32_t result;
bogdanm 82:6473597d706e 646
bogdanm 82:6473597d706e 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 82:6473597d706e 648 return(result);
bogdanm 82:6473597d706e 649 }
bogdanm 82:6473597d706e 650
bogdanm 82:6473597d706e 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 82:6473597d706e 652
bogdanm 82:6473597d706e 653
bogdanm 82:6473597d706e 654
bogdanm 82:6473597d706e 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 82:6473597d706e 656 /* TASKING carm specific functions */
bogdanm 82:6473597d706e 657
bogdanm 82:6473597d706e 658
bogdanm 82:6473597d706e 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 82:6473597d706e 660 /* not yet supported */
bogdanm 82:6473597d706e 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 82:6473597d706e 662
bogdanm 82:6473597d706e 663
bogdanm 82:6473597d706e 664 #endif
bogdanm 82:6473597d706e 665
bogdanm 82:6473597d706e 666 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 82:6473597d706e 667
bogdanm 82:6473597d706e 668
bogdanm 82:6473597d706e 669 #endif /* __CORE_CM4_SIMD_H */
bogdanm 82:6473597d706e 670
bogdanm 82:6473597d706e 671 #ifdef __cplusplus
bogdanm 82:6473597d706e 672 }
bogdanm 82:6473597d706e 673 #endif