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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F031K6/core_cmFunc.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
110:165afa46840b 
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 109:9296ab0bfc11 1 /**************************************************************************//**
Kojto 109:9296ab0bfc11 2 * @file core_cmFunc.h
Kojto 109:9296ab0bfc11 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 110:165afa46840b 4 * @version V4.10
Kojto 110:165afa46840b 5 * @date 18. March 2015
Kojto 109:9296ab0bfc11 6 *
Kojto 109:9296ab0bfc11 7 * @note
Kojto 109:9296ab0bfc11 8 *
Kojto 109:9296ab0bfc11 9 ******************************************************************************/
Kojto 110:165afa46840b 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
Kojto 109:9296ab0bfc11 11
Kojto 109:9296ab0bfc11 12 All rights reserved.
Kojto 109:9296ab0bfc11 13 Redistribution and use in source and binary forms, with or without
Kojto 109:9296ab0bfc11 14 modification, are permitted provided that the following conditions are met:
Kojto 109:9296ab0bfc11 15 - Redistributions of source code must retain the above copyright
Kojto 109:9296ab0bfc11 16 notice, this list of conditions and the following disclaimer.
Kojto 109:9296ab0bfc11 17 - Redistributions in binary form must reproduce the above copyright
Kojto 109:9296ab0bfc11 18 notice, this list of conditions and the following disclaimer in the
Kojto 109:9296ab0bfc11 19 documentation and/or other materials provided with the distribution.
Kojto 109:9296ab0bfc11 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 109:9296ab0bfc11 21 to endorse or promote products derived from this software without
Kojto 109:9296ab0bfc11 22 specific prior written permission.
Kojto 109:9296ab0bfc11 23 *
Kojto 109:9296ab0bfc11 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 109:9296ab0bfc11 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 109:9296ab0bfc11 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 109:9296ab0bfc11 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 109:9296ab0bfc11 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 109:9296ab0bfc11 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 109:9296ab0bfc11 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 109:9296ab0bfc11 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 109:9296ab0bfc11 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 109:9296ab0bfc11 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 109:9296ab0bfc11 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 109:9296ab0bfc11 35 ---------------------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 36
Kojto 109:9296ab0bfc11 37
Kojto 109:9296ab0bfc11 38 #ifndef __CORE_CMFUNC_H
Kojto 109:9296ab0bfc11 39 #define __CORE_CMFUNC_H
Kojto 109:9296ab0bfc11 40
Kojto 109:9296ab0bfc11 41
Kojto 109:9296ab0bfc11 42 /* ########################### Core Function Access ########################### */
Kojto 109:9296ab0bfc11 43 /** \ingroup CMSIS_Core_FunctionInterface
Kojto 109:9296ab0bfc11 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Kojto 109:9296ab0bfc11 45 @{
Kojto 109:9296ab0bfc11 46 */
Kojto 109:9296ab0bfc11 47
Kojto 109:9296ab0bfc11 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Kojto 109:9296ab0bfc11 49 /* ARM armcc specific functions */
Kojto 109:9296ab0bfc11 50
Kojto 109:9296ab0bfc11 51 #if (__ARMCC_VERSION < 400677)
Kojto 109:9296ab0bfc11 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Kojto 109:9296ab0bfc11 53 #endif
Kojto 109:9296ab0bfc11 54
Kojto 109:9296ab0bfc11 55 /* intrinsic void __enable_irq(); */
Kojto 109:9296ab0bfc11 56 /* intrinsic void __disable_irq(); */
Kojto 109:9296ab0bfc11 57
Kojto 109:9296ab0bfc11 58 /** \brief Get Control Register
Kojto 109:9296ab0bfc11 59
Kojto 109:9296ab0bfc11 60 This function returns the content of the Control Register.
Kojto 109:9296ab0bfc11 61
Kojto 109:9296ab0bfc11 62 \return Control Register value
Kojto 109:9296ab0bfc11 63 */
Kojto 109:9296ab0bfc11 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 109:9296ab0bfc11 65 {
Kojto 109:9296ab0bfc11 66 register uint32_t __regControl __ASM("control");
Kojto 109:9296ab0bfc11 67 return(__regControl);
Kojto 109:9296ab0bfc11 68 }
Kojto 109:9296ab0bfc11 69
Kojto 109:9296ab0bfc11 70
Kojto 109:9296ab0bfc11 71 /** \brief Set Control Register
Kojto 109:9296ab0bfc11 72
Kojto 109:9296ab0bfc11 73 This function writes the given value to the Control Register.
Kojto 109:9296ab0bfc11 74
Kojto 109:9296ab0bfc11 75 \param [in] control Control Register value to set
Kojto 109:9296ab0bfc11 76 */
Kojto 109:9296ab0bfc11 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 109:9296ab0bfc11 78 {
Kojto 109:9296ab0bfc11 79 register uint32_t __regControl __ASM("control");
Kojto 109:9296ab0bfc11 80 __regControl = control;
Kojto 109:9296ab0bfc11 81 }
Kojto 109:9296ab0bfc11 82
Kojto 109:9296ab0bfc11 83
Kojto 109:9296ab0bfc11 84 /** \brief Get IPSR Register
Kojto 109:9296ab0bfc11 85
Kojto 109:9296ab0bfc11 86 This function returns the content of the IPSR Register.
Kojto 109:9296ab0bfc11 87
Kojto 109:9296ab0bfc11 88 \return IPSR Register value
Kojto 109:9296ab0bfc11 89 */
Kojto 109:9296ab0bfc11 90 __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 109:9296ab0bfc11 91 {
Kojto 109:9296ab0bfc11 92 register uint32_t __regIPSR __ASM("ipsr");
Kojto 109:9296ab0bfc11 93 return(__regIPSR);
Kojto 109:9296ab0bfc11 94 }
Kojto 109:9296ab0bfc11 95
Kojto 109:9296ab0bfc11 96
Kojto 109:9296ab0bfc11 97 /** \brief Get APSR Register
Kojto 109:9296ab0bfc11 98
Kojto 109:9296ab0bfc11 99 This function returns the content of the APSR Register.
Kojto 109:9296ab0bfc11 100
Kojto 109:9296ab0bfc11 101 \return APSR Register value
Kojto 109:9296ab0bfc11 102 */
Kojto 109:9296ab0bfc11 103 __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 109:9296ab0bfc11 104 {
Kojto 109:9296ab0bfc11 105 register uint32_t __regAPSR __ASM("apsr");
Kojto 109:9296ab0bfc11 106 return(__regAPSR);
Kojto 109:9296ab0bfc11 107 }
Kojto 109:9296ab0bfc11 108
Kojto 109:9296ab0bfc11 109
Kojto 109:9296ab0bfc11 110 /** \brief Get xPSR Register
Kojto 109:9296ab0bfc11 111
Kojto 109:9296ab0bfc11 112 This function returns the content of the xPSR Register.
Kojto 109:9296ab0bfc11 113
Kojto 109:9296ab0bfc11 114 \return xPSR Register value
Kojto 109:9296ab0bfc11 115 */
Kojto 109:9296ab0bfc11 116 __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 109:9296ab0bfc11 117 {
Kojto 109:9296ab0bfc11 118 register uint32_t __regXPSR __ASM("xpsr");
Kojto 109:9296ab0bfc11 119 return(__regXPSR);
Kojto 109:9296ab0bfc11 120 }
Kojto 109:9296ab0bfc11 121
Kojto 109:9296ab0bfc11 122
Kojto 109:9296ab0bfc11 123 /** \brief Get Process Stack Pointer
Kojto 109:9296ab0bfc11 124
Kojto 109:9296ab0bfc11 125 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 109:9296ab0bfc11 126
Kojto 109:9296ab0bfc11 127 \return PSP Register value
Kojto 109:9296ab0bfc11 128 */
Kojto 109:9296ab0bfc11 129 __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 109:9296ab0bfc11 130 {
Kojto 109:9296ab0bfc11 131 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 109:9296ab0bfc11 132 return(__regProcessStackPointer);
Kojto 109:9296ab0bfc11 133 }
Kojto 109:9296ab0bfc11 134
Kojto 109:9296ab0bfc11 135
Kojto 109:9296ab0bfc11 136 /** \brief Set Process Stack Pointer
Kojto 109:9296ab0bfc11 137
Kojto 109:9296ab0bfc11 138 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 109:9296ab0bfc11 139
Kojto 109:9296ab0bfc11 140 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 109:9296ab0bfc11 141 */
Kojto 109:9296ab0bfc11 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 109:9296ab0bfc11 143 {
Kojto 109:9296ab0bfc11 144 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 109:9296ab0bfc11 145 __regProcessStackPointer = topOfProcStack;
Kojto 109:9296ab0bfc11 146 }
Kojto 109:9296ab0bfc11 147
Kojto 109:9296ab0bfc11 148
Kojto 109:9296ab0bfc11 149 /** \brief Get Main Stack Pointer
Kojto 109:9296ab0bfc11 150
Kojto 109:9296ab0bfc11 151 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 109:9296ab0bfc11 152
Kojto 109:9296ab0bfc11 153 \return MSP Register value
Kojto 109:9296ab0bfc11 154 */
Kojto 109:9296ab0bfc11 155 __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 109:9296ab0bfc11 156 {
Kojto 109:9296ab0bfc11 157 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 109:9296ab0bfc11 158 return(__regMainStackPointer);
Kojto 109:9296ab0bfc11 159 }
Kojto 109:9296ab0bfc11 160
Kojto 109:9296ab0bfc11 161
Kojto 109:9296ab0bfc11 162 /** \brief Set Main Stack Pointer
Kojto 109:9296ab0bfc11 163
Kojto 109:9296ab0bfc11 164 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 109:9296ab0bfc11 165
Kojto 109:9296ab0bfc11 166 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 109:9296ab0bfc11 167 */
Kojto 109:9296ab0bfc11 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 109:9296ab0bfc11 169 {
Kojto 109:9296ab0bfc11 170 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 109:9296ab0bfc11 171 __regMainStackPointer = topOfMainStack;
Kojto 109:9296ab0bfc11 172 }
Kojto 109:9296ab0bfc11 173
Kojto 109:9296ab0bfc11 174
Kojto 109:9296ab0bfc11 175 /** \brief Get Priority Mask
Kojto 109:9296ab0bfc11 176
Kojto 109:9296ab0bfc11 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 109:9296ab0bfc11 178
Kojto 109:9296ab0bfc11 179 \return Priority Mask value
Kojto 109:9296ab0bfc11 180 */
Kojto 109:9296ab0bfc11 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 109:9296ab0bfc11 182 {
Kojto 109:9296ab0bfc11 183 register uint32_t __regPriMask __ASM("primask");
Kojto 109:9296ab0bfc11 184 return(__regPriMask);
Kojto 109:9296ab0bfc11 185 }
Kojto 109:9296ab0bfc11 186
Kojto 109:9296ab0bfc11 187
Kojto 109:9296ab0bfc11 188 /** \brief Set Priority Mask
Kojto 109:9296ab0bfc11 189
Kojto 109:9296ab0bfc11 190 This function assigns the given value to the Priority Mask Register.
Kojto 109:9296ab0bfc11 191
Kojto 109:9296ab0bfc11 192 \param [in] priMask Priority Mask
Kojto 109:9296ab0bfc11 193 */
Kojto 109:9296ab0bfc11 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 109:9296ab0bfc11 195 {
Kojto 109:9296ab0bfc11 196 register uint32_t __regPriMask __ASM("primask");
Kojto 109:9296ab0bfc11 197 __regPriMask = (priMask);
Kojto 109:9296ab0bfc11 198 }
Kojto 109:9296ab0bfc11 199
Kojto 109:9296ab0bfc11 200
Kojto 110:165afa46840b 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 109:9296ab0bfc11 202
Kojto 109:9296ab0bfc11 203 /** \brief Enable FIQ
Kojto 109:9296ab0bfc11 204
Kojto 109:9296ab0bfc11 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 109:9296ab0bfc11 206 Can only be executed in Privileged modes.
Kojto 109:9296ab0bfc11 207 */
Kojto 109:9296ab0bfc11 208 #define __enable_fault_irq __enable_fiq
Kojto 109:9296ab0bfc11 209
Kojto 109:9296ab0bfc11 210
Kojto 109:9296ab0bfc11 211 /** \brief Disable FIQ
Kojto 109:9296ab0bfc11 212
Kojto 109:9296ab0bfc11 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 109:9296ab0bfc11 214 Can only be executed in Privileged modes.
Kojto 109:9296ab0bfc11 215 */
Kojto 109:9296ab0bfc11 216 #define __disable_fault_irq __disable_fiq
Kojto 109:9296ab0bfc11 217
Kojto 109:9296ab0bfc11 218
Kojto 109:9296ab0bfc11 219 /** \brief Get Base Priority
Kojto 109:9296ab0bfc11 220
Kojto 109:9296ab0bfc11 221 This function returns the current value of the Base Priority register.
Kojto 109:9296ab0bfc11 222
Kojto 109:9296ab0bfc11 223 \return Base Priority register value
Kojto 109:9296ab0bfc11 224 */
Kojto 109:9296ab0bfc11 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 109:9296ab0bfc11 226 {
Kojto 109:9296ab0bfc11 227 register uint32_t __regBasePri __ASM("basepri");
Kojto 109:9296ab0bfc11 228 return(__regBasePri);
Kojto 109:9296ab0bfc11 229 }
Kojto 109:9296ab0bfc11 230
Kojto 109:9296ab0bfc11 231
Kojto 109:9296ab0bfc11 232 /** \brief Set Base Priority
Kojto 109:9296ab0bfc11 233
Kojto 109:9296ab0bfc11 234 This function assigns the given value to the Base Priority register.
Kojto 109:9296ab0bfc11 235
Kojto 109:9296ab0bfc11 236 \param [in] basePri Base Priority value to set
Kojto 109:9296ab0bfc11 237 */
Kojto 109:9296ab0bfc11 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
Kojto 109:9296ab0bfc11 239 {
Kojto 109:9296ab0bfc11 240 register uint32_t __regBasePri __ASM("basepri");
Kojto 109:9296ab0bfc11 241 __regBasePri = (basePri & 0xff);
Kojto 109:9296ab0bfc11 242 }
Kojto 109:9296ab0bfc11 243
Kojto 109:9296ab0bfc11 244
Kojto 110:165afa46840b 245 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 246
Kojto 110:165afa46840b 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 248 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 249
Kojto 110:165afa46840b 250 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 251 */
Kojto 110:165afa46840b 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 110:165afa46840b 253 {
Kojto 110:165afa46840b 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Kojto 110:165afa46840b 255 __regBasePriMax = (basePri & 0xff);
Kojto 110:165afa46840b 256 }
Kojto 110:165afa46840b 257
Kojto 110:165afa46840b 258
Kojto 109:9296ab0bfc11 259 /** \brief Get Fault Mask
Kojto 109:9296ab0bfc11 260
Kojto 109:9296ab0bfc11 261 This function returns the current value of the Fault Mask register.
Kojto 109:9296ab0bfc11 262
Kojto 109:9296ab0bfc11 263 \return Fault Mask register value
Kojto 109:9296ab0bfc11 264 */
Kojto 109:9296ab0bfc11 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 109:9296ab0bfc11 266 {
Kojto 109:9296ab0bfc11 267 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 109:9296ab0bfc11 268 return(__regFaultMask);
Kojto 109:9296ab0bfc11 269 }
Kojto 109:9296ab0bfc11 270
Kojto 109:9296ab0bfc11 271
Kojto 109:9296ab0bfc11 272 /** \brief Set Fault Mask
Kojto 109:9296ab0bfc11 273
Kojto 109:9296ab0bfc11 274 This function assigns the given value to the Fault Mask register.
Kojto 109:9296ab0bfc11 275
Kojto 109:9296ab0bfc11 276 \param [in] faultMask Fault Mask value to set
Kojto 109:9296ab0bfc11 277 */
Kojto 109:9296ab0bfc11 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 109:9296ab0bfc11 279 {
Kojto 109:9296ab0bfc11 280 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 109:9296ab0bfc11 281 __regFaultMask = (faultMask & (uint32_t)1);
Kojto 109:9296ab0bfc11 282 }
Kojto 109:9296ab0bfc11 283
Kojto 110:165afa46840b 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Kojto 109:9296ab0bfc11 285
Kojto 109:9296ab0bfc11 286
Kojto 110:165afa46840b 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Kojto 109:9296ab0bfc11 288
Kojto 109:9296ab0bfc11 289 /** \brief Get FPSCR
Kojto 109:9296ab0bfc11 290
Kojto 109:9296ab0bfc11 291 This function returns the current value of the Floating Point Status/Control register.
Kojto 109:9296ab0bfc11 292
Kojto 109:9296ab0bfc11 293 \return Floating Point Status/Control register value
Kojto 109:9296ab0bfc11 294 */
Kojto 109:9296ab0bfc11 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 109:9296ab0bfc11 296 {
Kojto 109:9296ab0bfc11 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 109:9296ab0bfc11 298 register uint32_t __regfpscr __ASM("fpscr");
Kojto 109:9296ab0bfc11 299 return(__regfpscr);
Kojto 109:9296ab0bfc11 300 #else
Kojto 109:9296ab0bfc11 301 return(0);
Kojto 109:9296ab0bfc11 302 #endif
Kojto 109:9296ab0bfc11 303 }
Kojto 109:9296ab0bfc11 304
Kojto 109:9296ab0bfc11 305
Kojto 109:9296ab0bfc11 306 /** \brief Set FPSCR
Kojto 109:9296ab0bfc11 307
Kojto 109:9296ab0bfc11 308 This function assigns the given value to the Floating Point Status/Control register.
Kojto 109:9296ab0bfc11 309
Kojto 109:9296ab0bfc11 310 \param [in] fpscr Floating Point Status/Control value to set
Kojto 109:9296ab0bfc11 311 */
Kojto 109:9296ab0bfc11 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 109:9296ab0bfc11 313 {
Kojto 109:9296ab0bfc11 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 109:9296ab0bfc11 315 register uint32_t __regfpscr __ASM("fpscr");
Kojto 109:9296ab0bfc11 316 __regfpscr = (fpscr);
Kojto 109:9296ab0bfc11 317 #endif
Kojto 109:9296ab0bfc11 318 }
Kojto 109:9296ab0bfc11 319
Kojto 110:165afa46840b 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 109:9296ab0bfc11 321
Kojto 109:9296ab0bfc11 322
Kojto 109:9296ab0bfc11 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Kojto 109:9296ab0bfc11 324 /* GNU gcc specific functions */
Kojto 109:9296ab0bfc11 325
Kojto 109:9296ab0bfc11 326 /** \brief Enable IRQ Interrupts
Kojto 109:9296ab0bfc11 327
Kojto 109:9296ab0bfc11 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Kojto 109:9296ab0bfc11 329 Can only be executed in Privileged modes.
Kojto 109:9296ab0bfc11 330 */
Kojto 109:9296ab0bfc11 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
Kojto 109:9296ab0bfc11 332 {
Kojto 109:9296ab0bfc11 333 __ASM volatile ("cpsie i" : : : "memory");
Kojto 109:9296ab0bfc11 334 }
Kojto 109:9296ab0bfc11 335
Kojto 109:9296ab0bfc11 336
Kojto 109:9296ab0bfc11 337 /** \brief Disable IRQ Interrupts
Kojto 109:9296ab0bfc11 338
Kojto 109:9296ab0bfc11 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
Kojto 109:9296ab0bfc11 340 Can only be executed in Privileged modes.
Kojto 109:9296ab0bfc11 341 */
Kojto 109:9296ab0bfc11 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
Kojto 109:9296ab0bfc11 343 {
Kojto 109:9296ab0bfc11 344 __ASM volatile ("cpsid i" : : : "memory");
Kojto 109:9296ab0bfc11 345 }
Kojto 109:9296ab0bfc11 346
Kojto 109:9296ab0bfc11 347
Kojto 109:9296ab0bfc11 348 /** \brief Get Control Register
Kojto 109:9296ab0bfc11 349
Kojto 109:9296ab0bfc11 350 This function returns the content of the Control Register.
Kojto 109:9296ab0bfc11 351
Kojto 109:9296ab0bfc11 352 \return Control Register value
Kojto 109:9296ab0bfc11 353 */
Kojto 109:9296ab0bfc11 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 109:9296ab0bfc11 355 {
Kojto 109:9296ab0bfc11 356 uint32_t result;
Kojto 109:9296ab0bfc11 357
Kojto 109:9296ab0bfc11 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
Kojto 109:9296ab0bfc11 359 return(result);
Kojto 109:9296ab0bfc11 360 }
Kojto 109:9296ab0bfc11 361
Kojto 109:9296ab0bfc11 362
Kojto 109:9296ab0bfc11 363 /** \brief Set Control Register
Kojto 109:9296ab0bfc11 364
Kojto 109:9296ab0bfc11 365 This function writes the given value to the Control Register.
Kojto 109:9296ab0bfc11 366
Kojto 109:9296ab0bfc11 367 \param [in] control Control Register value to set
Kojto 109:9296ab0bfc11 368 */
Kojto 109:9296ab0bfc11 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 109:9296ab0bfc11 370 {
Kojto 109:9296ab0bfc11 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
Kojto 109:9296ab0bfc11 372 }
Kojto 109:9296ab0bfc11 373
Kojto 109:9296ab0bfc11 374
Kojto 109:9296ab0bfc11 375 /** \brief Get IPSR Register
Kojto 109:9296ab0bfc11 376
Kojto 109:9296ab0bfc11 377 This function returns the content of the IPSR Register.
Kojto 109:9296ab0bfc11 378
Kojto 109:9296ab0bfc11 379 \return IPSR Register value
Kojto 109:9296ab0bfc11 380 */
Kojto 109:9296ab0bfc11 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 109:9296ab0bfc11 382 {
Kojto 109:9296ab0bfc11 383 uint32_t result;
Kojto 109:9296ab0bfc11 384
Kojto 109:9296ab0bfc11 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Kojto 109:9296ab0bfc11 386 return(result);
Kojto 109:9296ab0bfc11 387 }
Kojto 109:9296ab0bfc11 388
Kojto 109:9296ab0bfc11 389
Kojto 109:9296ab0bfc11 390 /** \brief Get APSR Register
Kojto 109:9296ab0bfc11 391
Kojto 109:9296ab0bfc11 392 This function returns the content of the APSR Register.
Kojto 109:9296ab0bfc11 393
Kojto 109:9296ab0bfc11 394 \return APSR Register value
Kojto 109:9296ab0bfc11 395 */
Kojto 109:9296ab0bfc11 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 109:9296ab0bfc11 397 {
Kojto 109:9296ab0bfc11 398 uint32_t result;
Kojto 109:9296ab0bfc11 399
Kojto 109:9296ab0bfc11 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Kojto 109:9296ab0bfc11 401 return(result);
Kojto 109:9296ab0bfc11 402 }
Kojto 109:9296ab0bfc11 403
Kojto 109:9296ab0bfc11 404
Kojto 109:9296ab0bfc11 405 /** \brief Get xPSR Register
Kojto 109:9296ab0bfc11 406
Kojto 109:9296ab0bfc11 407 This function returns the content of the xPSR Register.
Kojto 109:9296ab0bfc11 408
Kojto 109:9296ab0bfc11 409 \return xPSR Register value
Kojto 109:9296ab0bfc11 410 */
Kojto 109:9296ab0bfc11 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 109:9296ab0bfc11 412 {
Kojto 109:9296ab0bfc11 413 uint32_t result;
Kojto 109:9296ab0bfc11 414
Kojto 109:9296ab0bfc11 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Kojto 109:9296ab0bfc11 416 return(result);
Kojto 109:9296ab0bfc11 417 }
Kojto 109:9296ab0bfc11 418
Kojto 109:9296ab0bfc11 419
Kojto 109:9296ab0bfc11 420 /** \brief Get Process Stack Pointer
Kojto 109:9296ab0bfc11 421
Kojto 109:9296ab0bfc11 422 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 109:9296ab0bfc11 423
Kojto 109:9296ab0bfc11 424 \return PSP Register value
Kojto 109:9296ab0bfc11 425 */
Kojto 109:9296ab0bfc11 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 109:9296ab0bfc11 427 {
Kojto 109:9296ab0bfc11 428 register uint32_t result;
Kojto 109:9296ab0bfc11 429
Kojto 109:9296ab0bfc11 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
Kojto 109:9296ab0bfc11 431 return(result);
Kojto 109:9296ab0bfc11 432 }
Kojto 109:9296ab0bfc11 433
Kojto 109:9296ab0bfc11 434
Kojto 109:9296ab0bfc11 435 /** \brief Set Process Stack Pointer
Kojto 109:9296ab0bfc11 436
Kojto 109:9296ab0bfc11 437 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 109:9296ab0bfc11 438
Kojto 109:9296ab0bfc11 439 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 109:9296ab0bfc11 440 */
Kojto 109:9296ab0bfc11 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 109:9296ab0bfc11 442 {
Kojto 109:9296ab0bfc11 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
Kojto 109:9296ab0bfc11 444 }
Kojto 109:9296ab0bfc11 445
Kojto 109:9296ab0bfc11 446
Kojto 109:9296ab0bfc11 447 /** \brief Get Main Stack Pointer
Kojto 109:9296ab0bfc11 448
Kojto 109:9296ab0bfc11 449 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 109:9296ab0bfc11 450
Kojto 109:9296ab0bfc11 451 \return MSP Register value
Kojto 109:9296ab0bfc11 452 */
Kojto 109:9296ab0bfc11 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 109:9296ab0bfc11 454 {
Kojto 109:9296ab0bfc11 455 register uint32_t result;
Kojto 109:9296ab0bfc11 456
Kojto 109:9296ab0bfc11 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
Kojto 109:9296ab0bfc11 458 return(result);
Kojto 109:9296ab0bfc11 459 }
Kojto 109:9296ab0bfc11 460
Kojto 109:9296ab0bfc11 461
Kojto 109:9296ab0bfc11 462 /** \brief Set Main Stack Pointer
Kojto 109:9296ab0bfc11 463
Kojto 109:9296ab0bfc11 464 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 109:9296ab0bfc11 465
Kojto 109:9296ab0bfc11 466 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 109:9296ab0bfc11 467 */
Kojto 109:9296ab0bfc11 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 109:9296ab0bfc11 469 {
Kojto 109:9296ab0bfc11 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
Kojto 109:9296ab0bfc11 471 }
Kojto 109:9296ab0bfc11 472
Kojto 109:9296ab0bfc11 473
Kojto 109:9296ab0bfc11 474 /** \brief Get Priority Mask
Kojto 109:9296ab0bfc11 475
Kojto 109:9296ab0bfc11 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 109:9296ab0bfc11 477
Kojto 109:9296ab0bfc11 478 \return Priority Mask value
Kojto 109:9296ab0bfc11 479 */
Kojto 109:9296ab0bfc11 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 109:9296ab0bfc11 481 {
Kojto 109:9296ab0bfc11 482 uint32_t result;
Kojto 109:9296ab0bfc11 483
Kojto 109:9296ab0bfc11 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Kojto 109:9296ab0bfc11 485 return(result);
Kojto 109:9296ab0bfc11 486 }
Kojto 109:9296ab0bfc11 487
Kojto 109:9296ab0bfc11 488
Kojto 109:9296ab0bfc11 489 /** \brief Set Priority Mask
Kojto 109:9296ab0bfc11 490
Kojto 109:9296ab0bfc11 491 This function assigns the given value to the Priority Mask Register.
Kojto 109:9296ab0bfc11 492
Kojto 109:9296ab0bfc11 493 \param [in] priMask Priority Mask
Kojto 109:9296ab0bfc11 494 */
Kojto 109:9296ab0bfc11 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 109:9296ab0bfc11 496 {
Kojto 109:9296ab0bfc11 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
Kojto 109:9296ab0bfc11 498 }
Kojto 109:9296ab0bfc11 499
Kojto 109:9296ab0bfc11 500
Kojto 109:9296ab0bfc11 501 #if (__CORTEX_M >= 0x03)
Kojto 109:9296ab0bfc11 502
Kojto 109:9296ab0bfc11 503 /** \brief Enable FIQ
Kojto 109:9296ab0bfc11 504
Kojto 109:9296ab0bfc11 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 109:9296ab0bfc11 506 Can only be executed in Privileged modes.
Kojto 109:9296ab0bfc11 507 */
Kojto 109:9296ab0bfc11 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
Kojto 109:9296ab0bfc11 509 {
Kojto 109:9296ab0bfc11 510 __ASM volatile ("cpsie f" : : : "memory");
Kojto 109:9296ab0bfc11 511 }
Kojto 109:9296ab0bfc11 512
Kojto 109:9296ab0bfc11 513
Kojto 109:9296ab0bfc11 514 /** \brief Disable FIQ
Kojto 109:9296ab0bfc11 515
Kojto 109:9296ab0bfc11 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 109:9296ab0bfc11 517 Can only be executed in Privileged modes.
Kojto 109:9296ab0bfc11 518 */
Kojto 109:9296ab0bfc11 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
Kojto 109:9296ab0bfc11 520 {
Kojto 109:9296ab0bfc11 521 __ASM volatile ("cpsid f" : : : "memory");
Kojto 109:9296ab0bfc11 522 }
Kojto 109:9296ab0bfc11 523
Kojto 109:9296ab0bfc11 524
Kojto 109:9296ab0bfc11 525 /** \brief Get Base Priority
Kojto 109:9296ab0bfc11 526
Kojto 109:9296ab0bfc11 527 This function returns the current value of the Base Priority register.
Kojto 109:9296ab0bfc11 528
Kojto 109:9296ab0bfc11 529 \return Base Priority register value
Kojto 109:9296ab0bfc11 530 */
Kojto 109:9296ab0bfc11 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 109:9296ab0bfc11 532 {
Kojto 109:9296ab0bfc11 533 uint32_t result;
Kojto 109:9296ab0bfc11 534
Kojto 110:165afa46840b 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
Kojto 109:9296ab0bfc11 536 return(result);
Kojto 109:9296ab0bfc11 537 }
Kojto 109:9296ab0bfc11 538
Kojto 109:9296ab0bfc11 539
Kojto 109:9296ab0bfc11 540 /** \brief Set Base Priority
Kojto 109:9296ab0bfc11 541
Kojto 109:9296ab0bfc11 542 This function assigns the given value to the Base Priority register.
Kojto 109:9296ab0bfc11 543
Kojto 109:9296ab0bfc11 544 \param [in] basePri Base Priority value to set
Kojto 109:9296ab0bfc11 545 */
Kojto 109:9296ab0bfc11 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
Kojto 109:9296ab0bfc11 547 {
Kojto 109:9296ab0bfc11 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
Kojto 109:9296ab0bfc11 549 }
Kojto 109:9296ab0bfc11 550
Kojto 109:9296ab0bfc11 551
Kojto 110:165afa46840b 552 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 553
Kojto 110:165afa46840b 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 555 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 556
Kojto 110:165afa46840b 557 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 558 */
Kojto 110:165afa46840b 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Kojto 110:165afa46840b 560 {
Kojto 110:165afa46840b 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Kojto 110:165afa46840b 562 }
Kojto 110:165afa46840b 563
Kojto 110:165afa46840b 564
Kojto 109:9296ab0bfc11 565 /** \brief Get Fault Mask
Kojto 109:9296ab0bfc11 566
Kojto 109:9296ab0bfc11 567 This function returns the current value of the Fault Mask register.
Kojto 109:9296ab0bfc11 568
Kojto 109:9296ab0bfc11 569 \return Fault Mask register value
Kojto 109:9296ab0bfc11 570 */
Kojto 109:9296ab0bfc11 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 109:9296ab0bfc11 572 {
Kojto 109:9296ab0bfc11 573 uint32_t result;
Kojto 109:9296ab0bfc11 574
Kojto 109:9296ab0bfc11 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Kojto 109:9296ab0bfc11 576 return(result);
Kojto 109:9296ab0bfc11 577 }
Kojto 109:9296ab0bfc11 578
Kojto 109:9296ab0bfc11 579
Kojto 109:9296ab0bfc11 580 /** \brief Set Fault Mask
Kojto 109:9296ab0bfc11 581
Kojto 109:9296ab0bfc11 582 This function assigns the given value to the Fault Mask register.
Kojto 109:9296ab0bfc11 583
Kojto 109:9296ab0bfc11 584 \param [in] faultMask Fault Mask value to set
Kojto 109:9296ab0bfc11 585 */
Kojto 109:9296ab0bfc11 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 109:9296ab0bfc11 587 {
Kojto 109:9296ab0bfc11 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
Kojto 109:9296ab0bfc11 589 }
Kojto 109:9296ab0bfc11 590
Kojto 109:9296ab0bfc11 591 #endif /* (__CORTEX_M >= 0x03) */
Kojto 109:9296ab0bfc11 592
Kojto 109:9296ab0bfc11 593
Kojto 110:165afa46840b 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Kojto 109:9296ab0bfc11 595
Kojto 109:9296ab0bfc11 596 /** \brief Get FPSCR
Kojto 109:9296ab0bfc11 597
Kojto 109:9296ab0bfc11 598 This function returns the current value of the Floating Point Status/Control register.
Kojto 109:9296ab0bfc11 599
Kojto 109:9296ab0bfc11 600 \return Floating Point Status/Control register value
Kojto 109:9296ab0bfc11 601 */
Kojto 109:9296ab0bfc11 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 109:9296ab0bfc11 603 {
Kojto 109:9296ab0bfc11 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 109:9296ab0bfc11 605 uint32_t result;
Kojto 109:9296ab0bfc11 606
Kojto 109:9296ab0bfc11 607 /* Empty asm statement works as a scheduling barrier */
Kojto 109:9296ab0bfc11 608 __ASM volatile ("");
Kojto 109:9296ab0bfc11 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
Kojto 109:9296ab0bfc11 610 __ASM volatile ("");
Kojto 109:9296ab0bfc11 611 return(result);
Kojto 109:9296ab0bfc11 612 #else
Kojto 109:9296ab0bfc11 613 return(0);
Kojto 109:9296ab0bfc11 614 #endif
Kojto 109:9296ab0bfc11 615 }
Kojto 109:9296ab0bfc11 616
Kojto 109:9296ab0bfc11 617
Kojto 109:9296ab0bfc11 618 /** \brief Set FPSCR
Kojto 109:9296ab0bfc11 619
Kojto 109:9296ab0bfc11 620 This function assigns the given value to the Floating Point Status/Control register.
Kojto 109:9296ab0bfc11 621
Kojto 109:9296ab0bfc11 622 \param [in] fpscr Floating Point Status/Control value to set
Kojto 109:9296ab0bfc11 623 */
Kojto 109:9296ab0bfc11 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 109:9296ab0bfc11 625 {
Kojto 109:9296ab0bfc11 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 109:9296ab0bfc11 627 /* Empty asm statement works as a scheduling barrier */
Kojto 109:9296ab0bfc11 628 __ASM volatile ("");
Kojto 109:9296ab0bfc11 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
Kojto 109:9296ab0bfc11 630 __ASM volatile ("");
Kojto 109:9296ab0bfc11 631 #endif
Kojto 109:9296ab0bfc11 632 }
Kojto 109:9296ab0bfc11 633
Kojto 110:165afa46840b 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 110:165afa46840b 635
Kojto 110:165afa46840b 636
Kojto 110:165afa46840b 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 110:165afa46840b 638 /* IAR iccarm specific functions */
Kojto 110:165afa46840b 639 #include <cmsis_iar.h>
Kojto 110:165afa46840b 640
Kojto 110:165afa46840b 641
Kojto 110:165afa46840b 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 110:165afa46840b 643 /* TI CCS specific functions */
Kojto 110:165afa46840b 644 #include <cmsis_ccs.h>
Kojto 109:9296ab0bfc11 645
Kojto 109:9296ab0bfc11 646
Kojto 109:9296ab0bfc11 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Kojto 109:9296ab0bfc11 648 /* TASKING carm specific functions */
Kojto 109:9296ab0bfc11 649 /*
Kojto 109:9296ab0bfc11 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 110:165afa46840b 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
Kojto 109:9296ab0bfc11 652 * Including the CMSIS ones.
Kojto 109:9296ab0bfc11 653 */
Kojto 109:9296ab0bfc11 654
Kojto 110:165afa46840b 655
Kojto 110:165afa46840b 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 110:165afa46840b 657 /* Cosmic specific functions */
Kojto 110:165afa46840b 658 #include <cmsis_csm.h>
Kojto 110:165afa46840b 659
Kojto 109:9296ab0bfc11 660 #endif
Kojto 109:9296ab0bfc11 661
Kojto 109:9296ab0bfc11 662 /*@} end of CMSIS_Core_RegAccFunctions */
Kojto 109:9296ab0bfc11 663
Kojto 109:9296ab0bfc11 664 #endif /* __CORE_CMFUNC_H */