The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
115:87f2f5183dfb
Release 136 of the mbed library

Ports for Upcoming Targets


Fixes and Changes

3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432
3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181
3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626
3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628
3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629
3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632
3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642
3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664
3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655
3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657
3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658
3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685
3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692
3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621
3649: [STM32F7] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3649
3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695
3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 109:9296ab0bfc11 1 /**************************************************************************//**
Kojto 109:9296ab0bfc11 2 * @file core_ca9.h
Kojto 109:9296ab0bfc11 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
Kojto 109:9296ab0bfc11 4 * @version
Kojto 109:9296ab0bfc11 5 * @date 25 March 2013
Kojto 109:9296ab0bfc11 6 *
Kojto 109:9296ab0bfc11 7 * @note
Kojto 109:9296ab0bfc11 8 *
Kojto 109:9296ab0bfc11 9 ******************************************************************************/
Kojto 109:9296ab0bfc11 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
Kojto 109:9296ab0bfc11 11
Kojto 109:9296ab0bfc11 12 All rights reserved.
Kojto 109:9296ab0bfc11 13 Redistribution and use in source and binary forms, with or without
Kojto 109:9296ab0bfc11 14 modification, are permitted provided that the following conditions are met:
Kojto 109:9296ab0bfc11 15 - Redistributions of source code must retain the above copyright
Kojto 109:9296ab0bfc11 16 notice, this list of conditions and the following disclaimer.
Kojto 109:9296ab0bfc11 17 - Redistributions in binary form must reproduce the above copyright
Kojto 109:9296ab0bfc11 18 notice, this list of conditions and the following disclaimer in the
Kojto 109:9296ab0bfc11 19 documentation and/or other materials provided with the distribution.
Kojto 109:9296ab0bfc11 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 109:9296ab0bfc11 21 to endorse or promote products derived from this software without
Kojto 109:9296ab0bfc11 22 specific prior written permission.
Kojto 109:9296ab0bfc11 23 *
Kojto 109:9296ab0bfc11 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 109:9296ab0bfc11 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 109:9296ab0bfc11 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 109:9296ab0bfc11 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 109:9296ab0bfc11 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 109:9296ab0bfc11 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 109:9296ab0bfc11 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 109:9296ab0bfc11 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 109:9296ab0bfc11 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 109:9296ab0bfc11 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 109:9296ab0bfc11 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 109:9296ab0bfc11 35 ---------------------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 36
Kojto 109:9296ab0bfc11 37
Kojto 109:9296ab0bfc11 38 #if defined ( __ICCARM__ )
Kojto 109:9296ab0bfc11 39 #pragma system_include /* treat file as system include file for MISRA check */
Kojto 109:9296ab0bfc11 40 #endif
Kojto 109:9296ab0bfc11 41
Kojto 109:9296ab0bfc11 42 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 43 extern "C" {
Kojto 109:9296ab0bfc11 44 #endif
Kojto 109:9296ab0bfc11 45
Kojto 109:9296ab0bfc11 46 #ifndef __CORE_CA9_H_GENERIC
Kojto 109:9296ab0bfc11 47 #define __CORE_CA9_H_GENERIC
Kojto 109:9296ab0bfc11 48
Kojto 109:9296ab0bfc11 49
Kojto 109:9296ab0bfc11 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
Kojto 109:9296ab0bfc11 51 CMSIS violates the following MISRA-C:2004 rules:
Kojto 109:9296ab0bfc11 52
Kojto 109:9296ab0bfc11 53 \li Required Rule 8.5, object/function definition in header file.<br>
Kojto 109:9296ab0bfc11 54 Function definitions in header files are used to allow 'inlining'.
Kojto 109:9296ab0bfc11 55
Kojto 109:9296ab0bfc11 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Kojto 109:9296ab0bfc11 57 Unions are used for effective representation of core registers.
Kojto 109:9296ab0bfc11 58
Kojto 109:9296ab0bfc11 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
Kojto 109:9296ab0bfc11 60 Function-like macros are used to allow more efficient code.
Kojto 109:9296ab0bfc11 61 */
Kojto 109:9296ab0bfc11 62
Kojto 109:9296ab0bfc11 63
Kojto 109:9296ab0bfc11 64 /*******************************************************************************
Kojto 109:9296ab0bfc11 65 * CMSIS definitions
Kojto 109:9296ab0bfc11 66 ******************************************************************************/
Kojto 109:9296ab0bfc11 67 /** \ingroup Cortex_A9
Kojto 109:9296ab0bfc11 68 @{
Kojto 109:9296ab0bfc11 69 */
Kojto 109:9296ab0bfc11 70
Kojto 109:9296ab0bfc11 71 /* CMSIS CA9 definitions */
Kojto 109:9296ab0bfc11 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
Kojto 109:9296ab0bfc11 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
Kojto 109:9296ab0bfc11 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
Kojto 109:9296ab0bfc11 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
Kojto 109:9296ab0bfc11 76
Kojto 109:9296ab0bfc11 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
Kojto 109:9296ab0bfc11 78
Kojto 109:9296ab0bfc11 79
Kojto 109:9296ab0bfc11 80 #if defined ( __CC_ARM )
Kojto 109:9296ab0bfc11 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
Kojto 109:9296ab0bfc11 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
Kojto 109:9296ab0bfc11 83 #define __STATIC_INLINE static __inline
Kojto 109:9296ab0bfc11 84 #define __STATIC_ASM static __asm
Kojto 109:9296ab0bfc11 85
Kojto 109:9296ab0bfc11 86 #elif defined ( __ICCARM__ )
Kojto 109:9296ab0bfc11 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
Kojto 109:9296ab0bfc11 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
Kojto 109:9296ab0bfc11 89 #define __STATIC_INLINE static inline
Kojto 109:9296ab0bfc11 90 #define __STATIC_ASM static __asm
Kojto 109:9296ab0bfc11 91
Kojto 115:87f2f5183dfb 92 #include <stdint.h>
Kojto 115:87f2f5183dfb 93 inline uint32_t __get_PSR(void) {
Kojto 115:87f2f5183dfb 94 __ASM("mrs r0, cpsr");
Kojto 115:87f2f5183dfb 95 }
Kojto 115:87f2f5183dfb 96
Kojto 109:9296ab0bfc11 97 #elif defined ( __TMS470__ )
Kojto 109:9296ab0bfc11 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
Kojto 109:9296ab0bfc11 99 #define __STATIC_INLINE static inline
Kojto 109:9296ab0bfc11 100 #define __STATIC_ASM static __asm
Kojto 109:9296ab0bfc11 101
Kojto 109:9296ab0bfc11 102 #elif defined ( __GNUC__ )
Kojto 109:9296ab0bfc11 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
Kojto 109:9296ab0bfc11 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
Kojto 109:9296ab0bfc11 105 #define __STATIC_INLINE static inline
Kojto 109:9296ab0bfc11 106 #define __STATIC_ASM static __asm
Kojto 109:9296ab0bfc11 107
Kojto 109:9296ab0bfc11 108 #elif defined ( __TASKING__ )
Kojto 109:9296ab0bfc11 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
Kojto 109:9296ab0bfc11 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
Kojto 109:9296ab0bfc11 111 #define __STATIC_INLINE static inline
Kojto 109:9296ab0bfc11 112 #define __STATIC_ASM static __asm
Kojto 109:9296ab0bfc11 113
Kojto 109:9296ab0bfc11 114 #endif
Kojto 109:9296ab0bfc11 115
Kojto 109:9296ab0bfc11 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
Kojto 109:9296ab0bfc11 117 */
Kojto 109:9296ab0bfc11 118 #if defined ( __CC_ARM )
Kojto 109:9296ab0bfc11 119 #if defined __TARGET_FPU_VFP
Kojto 109:9296ab0bfc11 120 #if (__FPU_PRESENT == 1)
Kojto 109:9296ab0bfc11 121 #define __FPU_USED 1
Kojto 109:9296ab0bfc11 122 #else
Kojto 109:9296ab0bfc11 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 109:9296ab0bfc11 124 #define __FPU_USED 0
Kojto 109:9296ab0bfc11 125 #endif
Kojto 109:9296ab0bfc11 126 #else
Kojto 109:9296ab0bfc11 127 #define __FPU_USED 0
Kojto 109:9296ab0bfc11 128 #endif
Kojto 109:9296ab0bfc11 129
Kojto 109:9296ab0bfc11 130 #elif defined ( __ICCARM__ )
Kojto 109:9296ab0bfc11 131 #if defined __ARMVFP__
Kojto 109:9296ab0bfc11 132 #if (__FPU_PRESENT == 1)
Kojto 109:9296ab0bfc11 133 #define __FPU_USED 1
Kojto 109:9296ab0bfc11 134 #else
Kojto 109:9296ab0bfc11 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 109:9296ab0bfc11 136 #define __FPU_USED 0
Kojto 109:9296ab0bfc11 137 #endif
Kojto 109:9296ab0bfc11 138 #else
Kojto 109:9296ab0bfc11 139 #define __FPU_USED 0
Kojto 109:9296ab0bfc11 140 #endif
Kojto 109:9296ab0bfc11 141
Kojto 109:9296ab0bfc11 142 #elif defined ( __TMS470__ )
Kojto 109:9296ab0bfc11 143 #if defined __TI_VFP_SUPPORT__
Kojto 109:9296ab0bfc11 144 #if (__FPU_PRESENT == 1)
Kojto 109:9296ab0bfc11 145 #define __FPU_USED 1
Kojto 109:9296ab0bfc11 146 #else
Kojto 109:9296ab0bfc11 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 109:9296ab0bfc11 148 #define __FPU_USED 0
Kojto 109:9296ab0bfc11 149 #endif
Kojto 109:9296ab0bfc11 150 #else
Kojto 109:9296ab0bfc11 151 #define __FPU_USED 0
Kojto 109:9296ab0bfc11 152 #endif
Kojto 109:9296ab0bfc11 153
Kojto 109:9296ab0bfc11 154 #elif defined ( __GNUC__ )
Kojto 109:9296ab0bfc11 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
Kojto 109:9296ab0bfc11 156 #if (__FPU_PRESENT == 1)
Kojto 109:9296ab0bfc11 157 #define __FPU_USED 1
Kojto 109:9296ab0bfc11 158 #else
Kojto 109:9296ab0bfc11 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 109:9296ab0bfc11 160 #define __FPU_USED 0
Kojto 109:9296ab0bfc11 161 #endif
Kojto 109:9296ab0bfc11 162 #else
Kojto 109:9296ab0bfc11 163 #define __FPU_USED 0
Kojto 109:9296ab0bfc11 164 #endif
Kojto 109:9296ab0bfc11 165
Kojto 109:9296ab0bfc11 166 #elif defined ( __TASKING__ )
Kojto 109:9296ab0bfc11 167 #if defined __FPU_VFP__
Kojto 109:9296ab0bfc11 168 #if (__FPU_PRESENT == 1)
Kojto 109:9296ab0bfc11 169 #define __FPU_USED 1
Kojto 109:9296ab0bfc11 170 #else
Kojto 109:9296ab0bfc11 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 109:9296ab0bfc11 172 #define __FPU_USED 0
Kojto 109:9296ab0bfc11 173 #endif
Kojto 109:9296ab0bfc11 174 #else
Kojto 109:9296ab0bfc11 175 #define __FPU_USED 0
Kojto 109:9296ab0bfc11 176 #endif
Kojto 109:9296ab0bfc11 177 #endif
Kojto 109:9296ab0bfc11 178
Kojto 109:9296ab0bfc11 179 #include <stdint.h> /*!< standard types definitions */
Kojto 109:9296ab0bfc11 180 #include "core_caInstr.h" /*!< Core Instruction Access */
Kojto 109:9296ab0bfc11 181 #include "core_caFunc.h" /*!< Core Function Access */
Kojto 109:9296ab0bfc11 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
Kojto 109:9296ab0bfc11 183
Kojto 109:9296ab0bfc11 184 #endif /* __CORE_CA9_H_GENERIC */
Kojto 109:9296ab0bfc11 185
Kojto 109:9296ab0bfc11 186 #ifndef __CMSIS_GENERIC
Kojto 109:9296ab0bfc11 187
Kojto 109:9296ab0bfc11 188 #ifndef __CORE_CA9_H_DEPENDANT
Kojto 109:9296ab0bfc11 189 #define __CORE_CA9_H_DEPENDANT
Kojto 109:9296ab0bfc11 190
Kojto 109:9296ab0bfc11 191 /* check device defines and use defaults */
Kojto 109:9296ab0bfc11 192 #if defined __CHECK_DEVICE_DEFINES
Kojto 109:9296ab0bfc11 193 #ifndef __CA9_REV
Kojto 109:9296ab0bfc11 194 #define __CA9_REV 0x0000
Kojto 109:9296ab0bfc11 195 #warning "__CA9_REV not defined in device header file; using default!"
Kojto 109:9296ab0bfc11 196 #endif
Kojto 109:9296ab0bfc11 197
Kojto 109:9296ab0bfc11 198 #ifndef __FPU_PRESENT
Kojto 109:9296ab0bfc11 199 #define __FPU_PRESENT 1
Kojto 109:9296ab0bfc11 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
Kojto 109:9296ab0bfc11 201 #endif
Kojto 109:9296ab0bfc11 202
Kojto 109:9296ab0bfc11 203 #ifndef __Vendor_SysTickConfig
Kojto 109:9296ab0bfc11 204 #define __Vendor_SysTickConfig 1
Kojto 109:9296ab0bfc11 205 #endif
Kojto 109:9296ab0bfc11 206
Kojto 109:9296ab0bfc11 207 #if __Vendor_SysTickConfig == 0
Kojto 109:9296ab0bfc11 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
Kojto 109:9296ab0bfc11 209 #endif
Kojto 109:9296ab0bfc11 210 #endif
Kojto 109:9296ab0bfc11 211
Kojto 109:9296ab0bfc11 212 /* IO definitions (access restrictions to peripheral registers) */
Kojto 109:9296ab0bfc11 213 /**
Kojto 109:9296ab0bfc11 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
Kojto 109:9296ab0bfc11 215
Kojto 109:9296ab0bfc11 216 <strong>IO Type Qualifiers</strong> are used
Kojto 109:9296ab0bfc11 217 \li to specify the access to peripheral variables.
Kojto 109:9296ab0bfc11 218 \li for automatic generation of peripheral register debug information.
Kojto 109:9296ab0bfc11 219 */
Kojto 109:9296ab0bfc11 220 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 221 #define __I volatile /*!< Defines 'read only' permissions */
Kojto 109:9296ab0bfc11 222 #else
Kojto 109:9296ab0bfc11 223 #define __I volatile const /*!< Defines 'read only' permissions */
Kojto 109:9296ab0bfc11 224 #endif
Kojto 109:9296ab0bfc11 225 #define __O volatile /*!< Defines 'write only' permissions */
Kojto 109:9296ab0bfc11 226 #define __IO volatile /*!< Defines 'read / write' permissions */
Kojto 109:9296ab0bfc11 227
Kojto 109:9296ab0bfc11 228 /*@} end of group Cortex_A9 */
Kojto 109:9296ab0bfc11 229
Kojto 109:9296ab0bfc11 230
Kojto 109:9296ab0bfc11 231 /*******************************************************************************
Kojto 109:9296ab0bfc11 232 * Register Abstraction
Kojto 109:9296ab0bfc11 233 ******************************************************************************/
Kojto 109:9296ab0bfc11 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
Kojto 109:9296ab0bfc11 235 \brief Type definitions and defines for Cortex-A processor based devices.
Kojto 109:9296ab0bfc11 236 */
Kojto 109:9296ab0bfc11 237
Kojto 109:9296ab0bfc11 238 /** \ingroup CMSIS_core_register
Kojto 109:9296ab0bfc11 239 \defgroup CMSIS_CORE Status and Control Registers
Kojto 109:9296ab0bfc11 240 \brief Core Register type definitions.
Kojto 109:9296ab0bfc11 241 @{
Kojto 109:9296ab0bfc11 242 */
Kojto 109:9296ab0bfc11 243
Kojto 109:9296ab0bfc11 244 /** \brief Union type to access the Application Program Status Register (APSR).
Kojto 109:9296ab0bfc11 245 */
Kojto 109:9296ab0bfc11 246 typedef union
Kojto 109:9296ab0bfc11 247 {
Kojto 109:9296ab0bfc11 248 struct
Kojto 109:9296ab0bfc11 249 {
Kojto 109:9296ab0bfc11 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
Kojto 109:9296ab0bfc11 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
Kojto 109:9296ab0bfc11 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
Kojto 109:9296ab0bfc11 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
Kojto 109:9296ab0bfc11 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
Kojto 109:9296ab0bfc11 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
Kojto 109:9296ab0bfc11 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
Kojto 109:9296ab0bfc11 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
Kojto 109:9296ab0bfc11 258 } b; /*!< Structure used for bit access */
Kojto 109:9296ab0bfc11 259 uint32_t w; /*!< Type used for word access */
Kojto 109:9296ab0bfc11 260 } APSR_Type;
Kojto 109:9296ab0bfc11 261
Kojto 109:9296ab0bfc11 262
Kojto 109:9296ab0bfc11 263 /*@} end of group CMSIS_CORE */
Kojto 109:9296ab0bfc11 264
Kojto 109:9296ab0bfc11 265 /*@} end of CMSIS_Core_FPUFunctions */
Kojto 109:9296ab0bfc11 266
Kojto 109:9296ab0bfc11 267
Kojto 109:9296ab0bfc11 268 #endif /* __CORE_CA9_H_GENERIC */
Kojto 109:9296ab0bfc11 269
Kojto 109:9296ab0bfc11 270 #endif /* __CMSIS_GENERIC */
Kojto 109:9296ab0bfc11 271
Kojto 109:9296ab0bfc11 272 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 273 }
Kojto 109:9296ab0bfc11 274
Kojto 109:9296ab0bfc11 275
Kojto 109:9296ab0bfc11 276 #endif