The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
115:87f2f5183dfb
Release 136 of the mbed library

Ports for Upcoming Targets


Fixes and Changes

3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432
3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181
3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626
3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628
3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629
3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632
3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642
3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664
3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655
3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657
3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658
3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685
3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692
3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621
3649: [STM32F7] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3649
3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695
3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 104:b9ad9a133dc7 1 /**************************************************************************//**
Kojto 104:b9ad9a133dc7 2 * @file core_ca9.h
Kojto 104:b9ad9a133dc7 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
Kojto 104:b9ad9a133dc7 4 * @version
Kojto 104:b9ad9a133dc7 5 * @date 25 March 2013
Kojto 104:b9ad9a133dc7 6 *
Kojto 104:b9ad9a133dc7 7 * @note
Kojto 104:b9ad9a133dc7 8 *
Kojto 104:b9ad9a133dc7 9 ******************************************************************************/
Kojto 104:b9ad9a133dc7 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
Kojto 104:b9ad9a133dc7 11
Kojto 104:b9ad9a133dc7 12 All rights reserved.
Kojto 104:b9ad9a133dc7 13 Redistribution and use in source and binary forms, with or without
Kojto 104:b9ad9a133dc7 14 modification, are permitted provided that the following conditions are met:
Kojto 104:b9ad9a133dc7 15 - Redistributions of source code must retain the above copyright
Kojto 104:b9ad9a133dc7 16 notice, this list of conditions and the following disclaimer.
Kojto 104:b9ad9a133dc7 17 - Redistributions in binary form must reproduce the above copyright
Kojto 104:b9ad9a133dc7 18 notice, this list of conditions and the following disclaimer in the
Kojto 104:b9ad9a133dc7 19 documentation and/or other materials provided with the distribution.
Kojto 104:b9ad9a133dc7 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 104:b9ad9a133dc7 21 to endorse or promote products derived from this software without
Kojto 104:b9ad9a133dc7 22 specific prior written permission.
Kojto 104:b9ad9a133dc7 23 *
Kojto 104:b9ad9a133dc7 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 104:b9ad9a133dc7 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 104:b9ad9a133dc7 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 104:b9ad9a133dc7 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 104:b9ad9a133dc7 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 104:b9ad9a133dc7 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 104:b9ad9a133dc7 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 104:b9ad9a133dc7 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 104:b9ad9a133dc7 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 104:b9ad9a133dc7 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 104:b9ad9a133dc7 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 104:b9ad9a133dc7 35 ---------------------------------------------------------------------------*/
Kojto 104:b9ad9a133dc7 36
Kojto 104:b9ad9a133dc7 37
Kojto 104:b9ad9a133dc7 38 #if defined ( __ICCARM__ )
Kojto 104:b9ad9a133dc7 39 #pragma system_include /* treat file as system include file for MISRA check */
Kojto 104:b9ad9a133dc7 40 #endif
Kojto 104:b9ad9a133dc7 41
Kojto 104:b9ad9a133dc7 42 #ifdef __cplusplus
Kojto 104:b9ad9a133dc7 43 extern "C" {
Kojto 104:b9ad9a133dc7 44 #endif
Kojto 104:b9ad9a133dc7 45
Kojto 104:b9ad9a133dc7 46 #ifndef __CORE_CA9_H_GENERIC
Kojto 104:b9ad9a133dc7 47 #define __CORE_CA9_H_GENERIC
Kojto 104:b9ad9a133dc7 48
Kojto 104:b9ad9a133dc7 49
Kojto 104:b9ad9a133dc7 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
Kojto 104:b9ad9a133dc7 51 CMSIS violates the following MISRA-C:2004 rules:
Kojto 104:b9ad9a133dc7 52
Kojto 104:b9ad9a133dc7 53 \li Required Rule 8.5, object/function definition in header file.<br>
Kojto 104:b9ad9a133dc7 54 Function definitions in header files are used to allow 'inlining'.
Kojto 104:b9ad9a133dc7 55
Kojto 104:b9ad9a133dc7 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Kojto 104:b9ad9a133dc7 57 Unions are used for effective representation of core registers.
Kojto 104:b9ad9a133dc7 58
Kojto 104:b9ad9a133dc7 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
Kojto 104:b9ad9a133dc7 60 Function-like macros are used to allow more efficient code.
Kojto 104:b9ad9a133dc7 61 */
Kojto 104:b9ad9a133dc7 62
Kojto 104:b9ad9a133dc7 63
Kojto 104:b9ad9a133dc7 64 /*******************************************************************************
Kojto 104:b9ad9a133dc7 65 * CMSIS definitions
Kojto 104:b9ad9a133dc7 66 ******************************************************************************/
Kojto 104:b9ad9a133dc7 67 /** \ingroup Cortex_A9
Kojto 104:b9ad9a133dc7 68 @{
Kojto 104:b9ad9a133dc7 69 */
Kojto 104:b9ad9a133dc7 70
Kojto 104:b9ad9a133dc7 71 /* CMSIS CA9 definitions */
Kojto 104:b9ad9a133dc7 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
Kojto 104:b9ad9a133dc7 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
Kojto 104:b9ad9a133dc7 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
Kojto 104:b9ad9a133dc7 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
Kojto 104:b9ad9a133dc7 76
Kojto 104:b9ad9a133dc7 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
Kojto 104:b9ad9a133dc7 78
Kojto 104:b9ad9a133dc7 79
Kojto 104:b9ad9a133dc7 80 #if defined ( __CC_ARM )
Kojto 104:b9ad9a133dc7 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
Kojto 104:b9ad9a133dc7 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
Kojto 104:b9ad9a133dc7 83 #define __STATIC_INLINE static __inline
Kojto 104:b9ad9a133dc7 84 #define __STATIC_ASM static __asm
Kojto 104:b9ad9a133dc7 85
Kojto 104:b9ad9a133dc7 86 #elif defined ( __ICCARM__ )
Kojto 104:b9ad9a133dc7 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
Kojto 104:b9ad9a133dc7 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
Kojto 104:b9ad9a133dc7 89 #define __STATIC_INLINE static inline
Kojto 104:b9ad9a133dc7 90 #define __STATIC_ASM static __asm
Kojto 104:b9ad9a133dc7 91
Kojto 115:87f2f5183dfb 92 #include <stdint.h>
Kojto 115:87f2f5183dfb 93 inline uint32_t __get_PSR(void) {
Kojto 115:87f2f5183dfb 94 __ASM("mrs r0, cpsr");
Kojto 115:87f2f5183dfb 95 }
Kojto 115:87f2f5183dfb 96
Kojto 104:b9ad9a133dc7 97 #elif defined ( __TMS470__ )
Kojto 104:b9ad9a133dc7 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
Kojto 104:b9ad9a133dc7 99 #define __STATIC_INLINE static inline
Kojto 104:b9ad9a133dc7 100 #define __STATIC_ASM static __asm
Kojto 104:b9ad9a133dc7 101
Kojto 104:b9ad9a133dc7 102 #elif defined ( __GNUC__ )
Kojto 104:b9ad9a133dc7 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
Kojto 104:b9ad9a133dc7 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
Kojto 104:b9ad9a133dc7 105 #define __STATIC_INLINE static inline
Kojto 104:b9ad9a133dc7 106 #define __STATIC_ASM static __asm
Kojto 104:b9ad9a133dc7 107
Kojto 104:b9ad9a133dc7 108 #elif defined ( __TASKING__ )
Kojto 104:b9ad9a133dc7 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
Kojto 104:b9ad9a133dc7 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
Kojto 104:b9ad9a133dc7 111 #define __STATIC_INLINE static inline
Kojto 104:b9ad9a133dc7 112 #define __STATIC_ASM static __asm
Kojto 104:b9ad9a133dc7 113
Kojto 104:b9ad9a133dc7 114 #endif
Kojto 104:b9ad9a133dc7 115
Kojto 104:b9ad9a133dc7 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
Kojto 104:b9ad9a133dc7 117 */
Kojto 104:b9ad9a133dc7 118 #if defined ( __CC_ARM )
Kojto 104:b9ad9a133dc7 119 #if defined __TARGET_FPU_VFP
Kojto 104:b9ad9a133dc7 120 #if (__FPU_PRESENT == 1)
Kojto 104:b9ad9a133dc7 121 #define __FPU_USED 1
Kojto 104:b9ad9a133dc7 122 #else
Kojto 104:b9ad9a133dc7 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 104:b9ad9a133dc7 124 #define __FPU_USED 0
Kojto 104:b9ad9a133dc7 125 #endif
Kojto 104:b9ad9a133dc7 126 #else
Kojto 104:b9ad9a133dc7 127 #define __FPU_USED 0
Kojto 104:b9ad9a133dc7 128 #endif
Kojto 104:b9ad9a133dc7 129
Kojto 104:b9ad9a133dc7 130 #elif defined ( __ICCARM__ )
Kojto 104:b9ad9a133dc7 131 #if defined __ARMVFP__
Kojto 104:b9ad9a133dc7 132 #if (__FPU_PRESENT == 1)
Kojto 104:b9ad9a133dc7 133 #define __FPU_USED 1
Kojto 104:b9ad9a133dc7 134 #else
Kojto 104:b9ad9a133dc7 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 104:b9ad9a133dc7 136 #define __FPU_USED 0
Kojto 104:b9ad9a133dc7 137 #endif
Kojto 104:b9ad9a133dc7 138 #else
Kojto 104:b9ad9a133dc7 139 #define __FPU_USED 0
Kojto 104:b9ad9a133dc7 140 #endif
Kojto 104:b9ad9a133dc7 141
Kojto 104:b9ad9a133dc7 142 #elif defined ( __TMS470__ )
Kojto 104:b9ad9a133dc7 143 #if defined __TI_VFP_SUPPORT__
Kojto 104:b9ad9a133dc7 144 #if (__FPU_PRESENT == 1)
Kojto 104:b9ad9a133dc7 145 #define __FPU_USED 1
Kojto 104:b9ad9a133dc7 146 #else
Kojto 104:b9ad9a133dc7 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 104:b9ad9a133dc7 148 #define __FPU_USED 0
Kojto 104:b9ad9a133dc7 149 #endif
Kojto 104:b9ad9a133dc7 150 #else
Kojto 104:b9ad9a133dc7 151 #define __FPU_USED 0
Kojto 104:b9ad9a133dc7 152 #endif
Kojto 104:b9ad9a133dc7 153
Kojto 104:b9ad9a133dc7 154 #elif defined ( __GNUC__ )
Kojto 104:b9ad9a133dc7 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
Kojto 104:b9ad9a133dc7 156 #if (__FPU_PRESENT == 1)
Kojto 104:b9ad9a133dc7 157 #define __FPU_USED 1
Kojto 104:b9ad9a133dc7 158 #else
Kojto 104:b9ad9a133dc7 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 104:b9ad9a133dc7 160 #define __FPU_USED 0
Kojto 104:b9ad9a133dc7 161 #endif
Kojto 104:b9ad9a133dc7 162 #else
Kojto 104:b9ad9a133dc7 163 #define __FPU_USED 0
Kojto 104:b9ad9a133dc7 164 #endif
Kojto 104:b9ad9a133dc7 165
Kojto 104:b9ad9a133dc7 166 #elif defined ( __TASKING__ )
Kojto 104:b9ad9a133dc7 167 #if defined __FPU_VFP__
Kojto 104:b9ad9a133dc7 168 #if (__FPU_PRESENT == 1)
Kojto 104:b9ad9a133dc7 169 #define __FPU_USED 1
Kojto 104:b9ad9a133dc7 170 #else
Kojto 104:b9ad9a133dc7 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 104:b9ad9a133dc7 172 #define __FPU_USED 0
Kojto 104:b9ad9a133dc7 173 #endif
Kojto 104:b9ad9a133dc7 174 #else
Kojto 104:b9ad9a133dc7 175 #define __FPU_USED 0
Kojto 104:b9ad9a133dc7 176 #endif
Kojto 104:b9ad9a133dc7 177 #endif
Kojto 104:b9ad9a133dc7 178
Kojto 104:b9ad9a133dc7 179 #include <stdint.h> /*!< standard types definitions */
Kojto 104:b9ad9a133dc7 180 #include "core_caInstr.h" /*!< Core Instruction Access */
Kojto 104:b9ad9a133dc7 181 #include "core_caFunc.h" /*!< Core Function Access */
Kojto 104:b9ad9a133dc7 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
Kojto 104:b9ad9a133dc7 183
Kojto 104:b9ad9a133dc7 184 #endif /* __CORE_CA9_H_GENERIC */
Kojto 104:b9ad9a133dc7 185
Kojto 104:b9ad9a133dc7 186 #ifndef __CMSIS_GENERIC
Kojto 104:b9ad9a133dc7 187
Kojto 104:b9ad9a133dc7 188 #ifndef __CORE_CA9_H_DEPENDANT
Kojto 104:b9ad9a133dc7 189 #define __CORE_CA9_H_DEPENDANT
Kojto 104:b9ad9a133dc7 190
Kojto 104:b9ad9a133dc7 191 /* check device defines and use defaults */
Kojto 104:b9ad9a133dc7 192 #if defined __CHECK_DEVICE_DEFINES
Kojto 104:b9ad9a133dc7 193 #ifndef __CA9_REV
Kojto 104:b9ad9a133dc7 194 #define __CA9_REV 0x0000
Kojto 104:b9ad9a133dc7 195 #warning "__CA9_REV not defined in device header file; using default!"
Kojto 104:b9ad9a133dc7 196 #endif
Kojto 104:b9ad9a133dc7 197
Kojto 104:b9ad9a133dc7 198 #ifndef __FPU_PRESENT
Kojto 104:b9ad9a133dc7 199 #define __FPU_PRESENT 1
Kojto 104:b9ad9a133dc7 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
Kojto 104:b9ad9a133dc7 201 #endif
Kojto 104:b9ad9a133dc7 202
Kojto 104:b9ad9a133dc7 203 #ifndef __Vendor_SysTickConfig
Kojto 104:b9ad9a133dc7 204 #define __Vendor_SysTickConfig 1
Kojto 104:b9ad9a133dc7 205 #endif
Kojto 104:b9ad9a133dc7 206
Kojto 104:b9ad9a133dc7 207 #if __Vendor_SysTickConfig == 0
Kojto 104:b9ad9a133dc7 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
Kojto 104:b9ad9a133dc7 209 #endif
Kojto 104:b9ad9a133dc7 210 #endif
Kojto 104:b9ad9a133dc7 211
Kojto 104:b9ad9a133dc7 212 /* IO definitions (access restrictions to peripheral registers) */
Kojto 104:b9ad9a133dc7 213 /**
Kojto 104:b9ad9a133dc7 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
Kojto 104:b9ad9a133dc7 215
Kojto 104:b9ad9a133dc7 216 <strong>IO Type Qualifiers</strong> are used
Kojto 104:b9ad9a133dc7 217 \li to specify the access to peripheral variables.
Kojto 104:b9ad9a133dc7 218 \li for automatic generation of peripheral register debug information.
Kojto 104:b9ad9a133dc7 219 */
Kojto 104:b9ad9a133dc7 220 #ifdef __cplusplus
Kojto 104:b9ad9a133dc7 221 #define __I volatile /*!< Defines 'read only' permissions */
Kojto 104:b9ad9a133dc7 222 #else
Kojto 104:b9ad9a133dc7 223 #define __I volatile const /*!< Defines 'read only' permissions */
Kojto 104:b9ad9a133dc7 224 #endif
Kojto 104:b9ad9a133dc7 225 #define __O volatile /*!< Defines 'write only' permissions */
Kojto 104:b9ad9a133dc7 226 #define __IO volatile /*!< Defines 'read / write' permissions */
Kojto 104:b9ad9a133dc7 227
Kojto 104:b9ad9a133dc7 228 /*@} end of group Cortex_A9 */
Kojto 104:b9ad9a133dc7 229
Kojto 104:b9ad9a133dc7 230
Kojto 104:b9ad9a133dc7 231 /*******************************************************************************
Kojto 104:b9ad9a133dc7 232 * Register Abstraction
Kojto 104:b9ad9a133dc7 233 ******************************************************************************/
Kojto 104:b9ad9a133dc7 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
Kojto 104:b9ad9a133dc7 235 \brief Type definitions and defines for Cortex-A processor based devices.
Kojto 104:b9ad9a133dc7 236 */
Kojto 104:b9ad9a133dc7 237
Kojto 104:b9ad9a133dc7 238 /** \ingroup CMSIS_core_register
Kojto 104:b9ad9a133dc7 239 \defgroup CMSIS_CORE Status and Control Registers
Kojto 104:b9ad9a133dc7 240 \brief Core Register type definitions.
Kojto 104:b9ad9a133dc7 241 @{
Kojto 104:b9ad9a133dc7 242 */
Kojto 104:b9ad9a133dc7 243
Kojto 104:b9ad9a133dc7 244 /** \brief Union type to access the Application Program Status Register (APSR).
Kojto 104:b9ad9a133dc7 245 */
Kojto 104:b9ad9a133dc7 246 typedef union
Kojto 104:b9ad9a133dc7 247 {
Kojto 104:b9ad9a133dc7 248 struct
Kojto 104:b9ad9a133dc7 249 {
Kojto 104:b9ad9a133dc7 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
Kojto 104:b9ad9a133dc7 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
Kojto 104:b9ad9a133dc7 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
Kojto 104:b9ad9a133dc7 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
Kojto 104:b9ad9a133dc7 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
Kojto 104:b9ad9a133dc7 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
Kojto 104:b9ad9a133dc7 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
Kojto 104:b9ad9a133dc7 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
Kojto 104:b9ad9a133dc7 258 } b; /*!< Structure used for bit access */
Kojto 104:b9ad9a133dc7 259 uint32_t w; /*!< Type used for word access */
Kojto 104:b9ad9a133dc7 260 } APSR_Type;
Kojto 104:b9ad9a133dc7 261
Kojto 104:b9ad9a133dc7 262
Kojto 104:b9ad9a133dc7 263 /*@} end of group CMSIS_CORE */
Kojto 104:b9ad9a133dc7 264
Kojto 104:b9ad9a133dc7 265 /*@} end of CMSIS_Core_FPUFunctions */
Kojto 104:b9ad9a133dc7 266
Kojto 104:b9ad9a133dc7 267
Kojto 104:b9ad9a133dc7 268 #endif /* __CORE_CA9_H_GENERIC */
Kojto 104:b9ad9a133dc7 269
Kojto 104:b9ad9a133dc7 270 #endif /* __CMSIS_GENERIC */
Kojto 104:b9ad9a133dc7 271
Kojto 104:b9ad9a133dc7 272 #ifdef __cplusplus
Kojto 104:b9ad9a133dc7 273 }
Kojto 104:b9ad9a133dc7 274
Kojto 104:b9ad9a133dc7 275
Kojto 104:b9ad9a133dc7 276 #endif