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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MTM_MTCONNECT04S/core_ca9.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
126:abea610beb85 
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 126:abea610beb85 1 /**************************************************************************//**
AnnaBridge 126:abea610beb85 2 * @file core_ca9.h
AnnaBridge 126:abea610beb85 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
AnnaBridge 126:abea610beb85 4 * @version
AnnaBridge 126:abea610beb85 5 * @date 25 March 2013
AnnaBridge 126:abea610beb85 6 *
AnnaBridge 126:abea610beb85 7 * @note
AnnaBridge 126:abea610beb85 8 *
AnnaBridge 126:abea610beb85 9 ******************************************************************************/
AnnaBridge 126:abea610beb85 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
AnnaBridge 126:abea610beb85 11
AnnaBridge 126:abea610beb85 12 All rights reserved.
AnnaBridge 126:abea610beb85 13 Redistribution and use in source and binary forms, with or without
AnnaBridge 126:abea610beb85 14 modification, are permitted provided that the following conditions are met:
AnnaBridge 126:abea610beb85 15 - Redistributions of source code must retain the above copyright
AnnaBridge 126:abea610beb85 16 notice, this list of conditions and the following disclaimer.
AnnaBridge 126:abea610beb85 17 - Redistributions in binary form must reproduce the above copyright
AnnaBridge 126:abea610beb85 18 notice, this list of conditions and the following disclaimer in the
AnnaBridge 126:abea610beb85 19 documentation and/or other materials provided with the distribution.
AnnaBridge 126:abea610beb85 20 - Neither the name of ARM nor the names of its contributors may be used
AnnaBridge 126:abea610beb85 21 to endorse or promote products derived from this software without
AnnaBridge 126:abea610beb85 22 specific prior written permission.
AnnaBridge 126:abea610beb85 23 *
AnnaBridge 126:abea610beb85 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 126:abea610beb85 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 126:abea610beb85 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
AnnaBridge 126:abea610beb85 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
AnnaBridge 126:abea610beb85 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
AnnaBridge 126:abea610beb85 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
AnnaBridge 126:abea610beb85 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
AnnaBridge 126:abea610beb85 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
AnnaBridge 126:abea610beb85 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
AnnaBridge 126:abea610beb85 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
AnnaBridge 126:abea610beb85 34 POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 126:abea610beb85 35 ---------------------------------------------------------------------------*/
AnnaBridge 126:abea610beb85 36
AnnaBridge 126:abea610beb85 37
AnnaBridge 126:abea610beb85 38 #if defined ( __ICCARM__ )
AnnaBridge 126:abea610beb85 39 #pragma system_include /* treat file as system include file for MISRA check */
AnnaBridge 126:abea610beb85 40 #endif
AnnaBridge 126:abea610beb85 41
AnnaBridge 126:abea610beb85 42 #ifdef __cplusplus
AnnaBridge 126:abea610beb85 43 extern "C" {
AnnaBridge 126:abea610beb85 44 #endif
AnnaBridge 126:abea610beb85 45
AnnaBridge 126:abea610beb85 46 #ifndef __CORE_CA9_H_GENERIC
AnnaBridge 126:abea610beb85 47 #define __CORE_CA9_H_GENERIC
AnnaBridge 126:abea610beb85 48
AnnaBridge 126:abea610beb85 49
AnnaBridge 126:abea610beb85 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
AnnaBridge 126:abea610beb85 51 CMSIS violates the following MISRA-C:2004 rules:
AnnaBridge 126:abea610beb85 52
AnnaBridge 126:abea610beb85 53 \li Required Rule 8.5, object/function definition in header file.<br>
AnnaBridge 126:abea610beb85 54 Function definitions in header files are used to allow 'inlining'.
AnnaBridge 126:abea610beb85 55
AnnaBridge 126:abea610beb85 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
AnnaBridge 126:abea610beb85 57 Unions are used for effective representation of core registers.
AnnaBridge 126:abea610beb85 58
AnnaBridge 126:abea610beb85 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
AnnaBridge 126:abea610beb85 60 Function-like macros are used to allow more efficient code.
AnnaBridge 126:abea610beb85 61 */
AnnaBridge 126:abea610beb85 62
AnnaBridge 126:abea610beb85 63
AnnaBridge 126:abea610beb85 64 /*******************************************************************************
AnnaBridge 126:abea610beb85 65 * CMSIS definitions
AnnaBridge 126:abea610beb85 66 ******************************************************************************/
AnnaBridge 126:abea610beb85 67 /** \ingroup Cortex_A9
AnnaBridge 126:abea610beb85 68 @{
AnnaBridge 126:abea610beb85 69 */
AnnaBridge 126:abea610beb85 70
AnnaBridge 126:abea610beb85 71 /* CMSIS CA9 definitions */
AnnaBridge 126:abea610beb85 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
AnnaBridge 126:abea610beb85 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
AnnaBridge 126:abea610beb85 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
AnnaBridge 126:abea610beb85 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
AnnaBridge 126:abea610beb85 76
AnnaBridge 126:abea610beb85 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
AnnaBridge 126:abea610beb85 78
AnnaBridge 126:abea610beb85 79
AnnaBridge 126:abea610beb85 80 #if defined ( __CC_ARM )
AnnaBridge 126:abea610beb85 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
AnnaBridge 126:abea610beb85 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
AnnaBridge 126:abea610beb85 83 #define __STATIC_INLINE static __inline
AnnaBridge 126:abea610beb85 84 #define __STATIC_ASM static __asm
AnnaBridge 126:abea610beb85 85
AnnaBridge 126:abea610beb85 86 #elif defined ( __ICCARM__ )
AnnaBridge 126:abea610beb85 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
AnnaBridge 126:abea610beb85 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
AnnaBridge 126:abea610beb85 89 #define __STATIC_INLINE static inline
AnnaBridge 126:abea610beb85 90 #define __STATIC_ASM static __asm
AnnaBridge 126:abea610beb85 91
AnnaBridge 126:abea610beb85 92 #include <stdint.h>
AnnaBridge 126:abea610beb85 93 inline uint32_t __get_PSR(void) {
AnnaBridge 126:abea610beb85 94 __ASM("mrs r0, cpsr");
AnnaBridge 126:abea610beb85 95 }
AnnaBridge 126:abea610beb85 96
AnnaBridge 126:abea610beb85 97 #elif defined ( __TMS470__ )
AnnaBridge 126:abea610beb85 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
AnnaBridge 126:abea610beb85 99 #define __STATIC_INLINE static inline
AnnaBridge 126:abea610beb85 100 #define __STATIC_ASM static __asm
AnnaBridge 126:abea610beb85 101
AnnaBridge 126:abea610beb85 102 #elif defined ( __GNUC__ )
AnnaBridge 126:abea610beb85 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
AnnaBridge 126:abea610beb85 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
AnnaBridge 126:abea610beb85 105 #define __STATIC_INLINE static inline
AnnaBridge 126:abea610beb85 106 #define __STATIC_ASM static __asm
AnnaBridge 126:abea610beb85 107
AnnaBridge 126:abea610beb85 108 #elif defined ( __TASKING__ )
AnnaBridge 126:abea610beb85 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
AnnaBridge 126:abea610beb85 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
AnnaBridge 126:abea610beb85 111 #define __STATIC_INLINE static inline
AnnaBridge 126:abea610beb85 112 #define __STATIC_ASM static __asm
AnnaBridge 126:abea610beb85 113
AnnaBridge 126:abea610beb85 114 #endif
AnnaBridge 126:abea610beb85 115
AnnaBridge 126:abea610beb85 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
AnnaBridge 126:abea610beb85 117 */
AnnaBridge 126:abea610beb85 118 #if defined ( __CC_ARM )
AnnaBridge 126:abea610beb85 119 #if defined __TARGET_FPU_VFP
AnnaBridge 126:abea610beb85 120 #if (__FPU_PRESENT == 1)
AnnaBridge 126:abea610beb85 121 #define __FPU_USED 1
AnnaBridge 126:abea610beb85 122 #else
AnnaBridge 126:abea610beb85 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
AnnaBridge 126:abea610beb85 124 #define __FPU_USED 0
AnnaBridge 126:abea610beb85 125 #endif
AnnaBridge 126:abea610beb85 126 #else
AnnaBridge 126:abea610beb85 127 #define __FPU_USED 0
AnnaBridge 126:abea610beb85 128 #endif
AnnaBridge 126:abea610beb85 129
AnnaBridge 126:abea610beb85 130 #elif defined ( __ICCARM__ )
AnnaBridge 126:abea610beb85 131 #if defined __ARMVFP__
AnnaBridge 126:abea610beb85 132 #if (__FPU_PRESENT == 1)
AnnaBridge 126:abea610beb85 133 #define __FPU_USED 1
AnnaBridge 126:abea610beb85 134 #else
AnnaBridge 126:abea610beb85 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
AnnaBridge 126:abea610beb85 136 #define __FPU_USED 0
AnnaBridge 126:abea610beb85 137 #endif
AnnaBridge 126:abea610beb85 138 #else
AnnaBridge 126:abea610beb85 139 #define __FPU_USED 0
AnnaBridge 126:abea610beb85 140 #endif
AnnaBridge 126:abea610beb85 141
AnnaBridge 126:abea610beb85 142 #elif defined ( __TMS470__ )
AnnaBridge 126:abea610beb85 143 #if defined __TI_VFP_SUPPORT__
AnnaBridge 126:abea610beb85 144 #if (__FPU_PRESENT == 1)
AnnaBridge 126:abea610beb85 145 #define __FPU_USED 1
AnnaBridge 126:abea610beb85 146 #else
AnnaBridge 126:abea610beb85 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
AnnaBridge 126:abea610beb85 148 #define __FPU_USED 0
AnnaBridge 126:abea610beb85 149 #endif
AnnaBridge 126:abea610beb85 150 #else
AnnaBridge 126:abea610beb85 151 #define __FPU_USED 0
AnnaBridge 126:abea610beb85 152 #endif
AnnaBridge 126:abea610beb85 153
AnnaBridge 126:abea610beb85 154 #elif defined ( __GNUC__ )
AnnaBridge 126:abea610beb85 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
AnnaBridge 126:abea610beb85 156 #if (__FPU_PRESENT == 1)
AnnaBridge 126:abea610beb85 157 #define __FPU_USED 1
AnnaBridge 126:abea610beb85 158 #else
AnnaBridge 126:abea610beb85 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
AnnaBridge 126:abea610beb85 160 #define __FPU_USED 0
AnnaBridge 126:abea610beb85 161 #endif
AnnaBridge 126:abea610beb85 162 #else
AnnaBridge 126:abea610beb85 163 #define __FPU_USED 0
AnnaBridge 126:abea610beb85 164 #endif
AnnaBridge 126:abea610beb85 165
AnnaBridge 126:abea610beb85 166 #elif defined ( __TASKING__ )
AnnaBridge 126:abea610beb85 167 #if defined __FPU_VFP__
AnnaBridge 126:abea610beb85 168 #if (__FPU_PRESENT == 1)
AnnaBridge 126:abea610beb85 169 #define __FPU_USED 1
AnnaBridge 126:abea610beb85 170 #else
AnnaBridge 126:abea610beb85 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
AnnaBridge 126:abea610beb85 172 #define __FPU_USED 0
AnnaBridge 126:abea610beb85 173 #endif
AnnaBridge 126:abea610beb85 174 #else
AnnaBridge 126:abea610beb85 175 #define __FPU_USED 0
AnnaBridge 126:abea610beb85 176 #endif
AnnaBridge 126:abea610beb85 177 #endif
AnnaBridge 126:abea610beb85 178
AnnaBridge 126:abea610beb85 179 #include <stdint.h> /*!< standard types definitions */
AnnaBridge 126:abea610beb85 180 #include "core_caInstr.h" /*!< Core Instruction Access */
AnnaBridge 126:abea610beb85 181 #include "core_caFunc.h" /*!< Core Function Access */
AnnaBridge 126:abea610beb85 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
AnnaBridge 126:abea610beb85 183
AnnaBridge 126:abea610beb85 184 #endif /* __CORE_CA9_H_GENERIC */
AnnaBridge 126:abea610beb85 185
AnnaBridge 126:abea610beb85 186 #ifndef __CMSIS_GENERIC
AnnaBridge 126:abea610beb85 187
AnnaBridge 126:abea610beb85 188 #ifndef __CORE_CA9_H_DEPENDANT
AnnaBridge 126:abea610beb85 189 #define __CORE_CA9_H_DEPENDANT
AnnaBridge 126:abea610beb85 190
AnnaBridge 126:abea610beb85 191 /* check device defines and use defaults */
AnnaBridge 126:abea610beb85 192 #if defined __CHECK_DEVICE_DEFINES
AnnaBridge 126:abea610beb85 193 #ifndef __CA9_REV
AnnaBridge 126:abea610beb85 194 #define __CA9_REV 0x0000
AnnaBridge 126:abea610beb85 195 #warning "__CA9_REV not defined in device header file; using default!"
AnnaBridge 126:abea610beb85 196 #endif
AnnaBridge 126:abea610beb85 197
AnnaBridge 126:abea610beb85 198 #ifndef __FPU_PRESENT
AnnaBridge 126:abea610beb85 199 #define __FPU_PRESENT 1
AnnaBridge 126:abea610beb85 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
AnnaBridge 126:abea610beb85 201 #endif
AnnaBridge 126:abea610beb85 202
AnnaBridge 126:abea610beb85 203 #ifndef __Vendor_SysTickConfig
AnnaBridge 126:abea610beb85 204 #define __Vendor_SysTickConfig 1
AnnaBridge 126:abea610beb85 205 #endif
AnnaBridge 126:abea610beb85 206
AnnaBridge 126:abea610beb85 207 #if __Vendor_SysTickConfig == 0
AnnaBridge 126:abea610beb85 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
AnnaBridge 126:abea610beb85 209 #endif
AnnaBridge 126:abea610beb85 210 #endif
AnnaBridge 126:abea610beb85 211
AnnaBridge 126:abea610beb85 212 /* IO definitions (access restrictions to peripheral registers) */
AnnaBridge 126:abea610beb85 213 /**
AnnaBridge 126:abea610beb85 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
AnnaBridge 126:abea610beb85 215
AnnaBridge 126:abea610beb85 216 <strong>IO Type Qualifiers</strong> are used
AnnaBridge 126:abea610beb85 217 \li to specify the access to peripheral variables.
AnnaBridge 126:abea610beb85 218 \li for automatic generation of peripheral register debug information.
AnnaBridge 126:abea610beb85 219 */
AnnaBridge 126:abea610beb85 220 #ifdef __cplusplus
AnnaBridge 126:abea610beb85 221 #define __I volatile /*!< Defines 'read only' permissions */
AnnaBridge 126:abea610beb85 222 #else
AnnaBridge 126:abea610beb85 223 #define __I volatile const /*!< Defines 'read only' permissions */
AnnaBridge 126:abea610beb85 224 #endif
AnnaBridge 126:abea610beb85 225 #define __O volatile /*!< Defines 'write only' permissions */
AnnaBridge 126:abea610beb85 226 #define __IO volatile /*!< Defines 'read / write' permissions */
AnnaBridge 126:abea610beb85 227
AnnaBridge 126:abea610beb85 228 /*@} end of group Cortex_A9 */
AnnaBridge 126:abea610beb85 229
AnnaBridge 126:abea610beb85 230
AnnaBridge 126:abea610beb85 231 /*******************************************************************************
AnnaBridge 126:abea610beb85 232 * Register Abstraction
AnnaBridge 126:abea610beb85 233 ******************************************************************************/
AnnaBridge 126:abea610beb85 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
AnnaBridge 126:abea610beb85 235 \brief Type definitions and defines for Cortex-A processor based devices.
AnnaBridge 126:abea610beb85 236 */
AnnaBridge 126:abea610beb85 237
AnnaBridge 126:abea610beb85 238 /** \ingroup CMSIS_core_register
AnnaBridge 126:abea610beb85 239 \defgroup CMSIS_CORE Status and Control Registers
AnnaBridge 126:abea610beb85 240 \brief Core Register type definitions.
AnnaBridge 126:abea610beb85 241 @{
AnnaBridge 126:abea610beb85 242 */
AnnaBridge 126:abea610beb85 243
AnnaBridge 126:abea610beb85 244 /** \brief Union type to access the Application Program Status Register (APSR).
AnnaBridge 126:abea610beb85 245 */
AnnaBridge 126:abea610beb85 246 typedef union
AnnaBridge 126:abea610beb85 247 {
AnnaBridge 126:abea610beb85 248 struct
AnnaBridge 126:abea610beb85 249 {
AnnaBridge 126:abea610beb85 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
AnnaBridge 126:abea610beb85 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
AnnaBridge 126:abea610beb85 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
AnnaBridge 126:abea610beb85 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
AnnaBridge 126:abea610beb85 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
AnnaBridge 126:abea610beb85 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
AnnaBridge 126:abea610beb85 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
AnnaBridge 126:abea610beb85 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
AnnaBridge 126:abea610beb85 258 } b; /*!< Structure used for bit access */
AnnaBridge 126:abea610beb85 259 uint32_t w; /*!< Type used for word access */
AnnaBridge 126:abea610beb85 260 } APSR_Type;
AnnaBridge 126:abea610beb85 261
AnnaBridge 126:abea610beb85 262
AnnaBridge 126:abea610beb85 263 /*@} end of group CMSIS_CORE */
AnnaBridge 126:abea610beb85 264
AnnaBridge 126:abea610beb85 265 /*@} end of CMSIS_Core_FPUFunctions */
AnnaBridge 126:abea610beb85 266
AnnaBridge 126:abea610beb85 267
AnnaBridge 126:abea610beb85 268 #endif /* __CORE_CA9_H_GENERIC */
AnnaBridge 126:abea610beb85 269
AnnaBridge 126:abea610beb85 270 #endif /* __CMSIS_GENERIC */
AnnaBridge 126:abea610beb85 271
AnnaBridge 126:abea610beb85 272 #ifdef __cplusplus
AnnaBridge 126:abea610beb85 273 }
AnnaBridge 126:abea610beb85 274
AnnaBridge 126:abea610beb85 275
AnnaBridge 126:abea610beb85 276 #endif