mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_K20D50M/core_cm4_simd.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Parent:
87:6213f644d804 
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 87:6213f644d804 1 /**************************************************************************//**
bogdanm 87:6213f644d804 2 * @file core_cm4_simd.h
bogdanm 87:6213f644d804 3 * @brief CMSIS Cortex-M4 SIMD Header File
bogdanm 87:6213f644d804 4 * @version V3.20
bogdanm 87:6213f644d804 5 * @date 25. February 2013
bogdanm 87:6213f644d804 6 *
bogdanm 87:6213f644d804 7 * @note
bogdanm 87:6213f644d804 8 *
bogdanm 87:6213f644d804 9 ******************************************************************************/
bogdanm 87:6213f644d804 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 87:6213f644d804 11
bogdanm 87:6213f644d804 12 All rights reserved.
bogdanm 87:6213f644d804 13 Redistribution and use in source and binary forms, with or without
bogdanm 87:6213f644d804 14 modification, are permitted provided that the following conditions are met:
bogdanm 87:6213f644d804 15 - Redistributions of source code must retain the above copyright
bogdanm 87:6213f644d804 16 notice, this list of conditions and the following disclaimer.
bogdanm 87:6213f644d804 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 87:6213f644d804 18 notice, this list of conditions and the following disclaimer in the
bogdanm 87:6213f644d804 19 documentation and/or other materials provided with the distribution.
bogdanm 87:6213f644d804 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 87:6213f644d804 21 to endorse or promote products derived from this software without
bogdanm 87:6213f644d804 22 specific prior written permission.
bogdanm 87:6213f644d804 23 *
bogdanm 87:6213f644d804 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 87:6213f644d804 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 87:6213f644d804 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 87:6213f644d804 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 87:6213f644d804 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 87:6213f644d804 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 87:6213f644d804 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 87:6213f644d804 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 87:6213f644d804 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 87:6213f644d804 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 87:6213f644d804 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 87:6213f644d804 35 ---------------------------------------------------------------------------*/
bogdanm 87:6213f644d804 36
bogdanm 87:6213f644d804 37
bogdanm 87:6213f644d804 38 #ifdef __cplusplus
bogdanm 87:6213f644d804 39 extern "C" {
bogdanm 87:6213f644d804 40 #endif
bogdanm 87:6213f644d804 41
bogdanm 87:6213f644d804 42 #ifndef __CORE_CM4_SIMD_H
bogdanm 87:6213f644d804 43 #define __CORE_CM4_SIMD_H
bogdanm 87:6213f644d804 44
bogdanm 87:6213f644d804 45
bogdanm 87:6213f644d804 46 /*******************************************************************************
bogdanm 87:6213f644d804 47 * Hardware Abstraction Layer
bogdanm 87:6213f644d804 48 ******************************************************************************/
bogdanm 87:6213f644d804 49
bogdanm 87:6213f644d804 50
bogdanm 87:6213f644d804 51 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 87:6213f644d804 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 87:6213f644d804 53 Access to dedicated SIMD instructions
bogdanm 87:6213f644d804 54 @{
bogdanm 87:6213f644d804 55 */
bogdanm 87:6213f644d804 56
bogdanm 87:6213f644d804 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 87:6213f644d804 58 /* ARM armcc specific functions */
bogdanm 87:6213f644d804 59
bogdanm 87:6213f644d804 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 87:6213f644d804 61 #define __SADD8 __sadd8
bogdanm 87:6213f644d804 62 #define __QADD8 __qadd8
bogdanm 87:6213f644d804 63 #define __SHADD8 __shadd8
bogdanm 87:6213f644d804 64 #define __UADD8 __uadd8
bogdanm 87:6213f644d804 65 #define __UQADD8 __uqadd8
bogdanm 87:6213f644d804 66 #define __UHADD8 __uhadd8
bogdanm 87:6213f644d804 67 #define __SSUB8 __ssub8
bogdanm 87:6213f644d804 68 #define __QSUB8 __qsub8
bogdanm 87:6213f644d804 69 #define __SHSUB8 __shsub8
bogdanm 87:6213f644d804 70 #define __USUB8 __usub8
bogdanm 87:6213f644d804 71 #define __UQSUB8 __uqsub8
bogdanm 87:6213f644d804 72 #define __UHSUB8 __uhsub8
bogdanm 87:6213f644d804 73 #define __SADD16 __sadd16
bogdanm 87:6213f644d804 74 #define __QADD16 __qadd16
bogdanm 87:6213f644d804 75 #define __SHADD16 __shadd16
bogdanm 87:6213f644d804 76 #define __UADD16 __uadd16
bogdanm 87:6213f644d804 77 #define __UQADD16 __uqadd16
bogdanm 87:6213f644d804 78 #define __UHADD16 __uhadd16
bogdanm 87:6213f644d804 79 #define __SSUB16 __ssub16
bogdanm 87:6213f644d804 80 #define __QSUB16 __qsub16
bogdanm 87:6213f644d804 81 #define __SHSUB16 __shsub16
bogdanm 87:6213f644d804 82 #define __USUB16 __usub16
bogdanm 87:6213f644d804 83 #define __UQSUB16 __uqsub16
bogdanm 87:6213f644d804 84 #define __UHSUB16 __uhsub16
bogdanm 87:6213f644d804 85 #define __SASX __sasx
bogdanm 87:6213f644d804 86 #define __QASX __qasx
bogdanm 87:6213f644d804 87 #define __SHASX __shasx
bogdanm 87:6213f644d804 88 #define __UASX __uasx
bogdanm 87:6213f644d804 89 #define __UQASX __uqasx
bogdanm 87:6213f644d804 90 #define __UHASX __uhasx
bogdanm 87:6213f644d804 91 #define __SSAX __ssax
bogdanm 87:6213f644d804 92 #define __QSAX __qsax
bogdanm 87:6213f644d804 93 #define __SHSAX __shsax
bogdanm 87:6213f644d804 94 #define __USAX __usax
bogdanm 87:6213f644d804 95 #define __UQSAX __uqsax
bogdanm 87:6213f644d804 96 #define __UHSAX __uhsax
bogdanm 87:6213f644d804 97 #define __USAD8 __usad8
bogdanm 87:6213f644d804 98 #define __USADA8 __usada8
bogdanm 87:6213f644d804 99 #define __SSAT16 __ssat16
bogdanm 87:6213f644d804 100 #define __USAT16 __usat16
bogdanm 87:6213f644d804 101 #define __UXTB16 __uxtb16
bogdanm 87:6213f644d804 102 #define __UXTAB16 __uxtab16
bogdanm 87:6213f644d804 103 #define __SXTB16 __sxtb16
bogdanm 87:6213f644d804 104 #define __SXTAB16 __sxtab16
bogdanm 87:6213f644d804 105 #define __SMUAD __smuad
bogdanm 87:6213f644d804 106 #define __SMUADX __smuadx
bogdanm 87:6213f644d804 107 #define __SMLAD __smlad
bogdanm 87:6213f644d804 108 #define __SMLADX __smladx
bogdanm 87:6213f644d804 109 #define __SMLALD __smlald
bogdanm 87:6213f644d804 110 #define __SMLALDX __smlaldx
bogdanm 87:6213f644d804 111 #define __SMUSD __smusd
bogdanm 87:6213f644d804 112 #define __SMUSDX __smusdx
bogdanm 87:6213f644d804 113 #define __SMLSD __smlsd
bogdanm 87:6213f644d804 114 #define __SMLSDX __smlsdx
bogdanm 87:6213f644d804 115 #define __SMLSLD __smlsld
bogdanm 87:6213f644d804 116 #define __SMLSLDX __smlsldx
bogdanm 87:6213f644d804 117 #define __SEL __sel
bogdanm 87:6213f644d804 118 #define __QADD __qadd
bogdanm 87:6213f644d804 119 #define __QSUB __qsub
bogdanm 87:6213f644d804 120
bogdanm 87:6213f644d804 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 87:6213f644d804 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 87:6213f644d804 123
bogdanm 87:6213f644d804 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 87:6213f644d804 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 87:6213f644d804 126
bogdanm 87:6213f644d804 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 87:6213f644d804 128 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 87:6213f644d804 129
bogdanm 87:6213f644d804 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 87:6213f644d804 131
bogdanm 87:6213f644d804 132
bogdanm 87:6213f644d804 133
bogdanm 87:6213f644d804 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 87:6213f644d804 135 /* IAR iccarm specific functions */
bogdanm 87:6213f644d804 136
bogdanm 87:6213f644d804 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 87:6213f644d804 138 #include <cmsis_iar.h>
bogdanm 87:6213f644d804 139
bogdanm 87:6213f644d804 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 87:6213f644d804 141
bogdanm 87:6213f644d804 142
bogdanm 87:6213f644d804 143
bogdanm 87:6213f644d804 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 87:6213f644d804 145 /* TI CCS specific functions */
bogdanm 87:6213f644d804 146
bogdanm 87:6213f644d804 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 87:6213f644d804 148 #include <cmsis_ccs.h>
bogdanm 87:6213f644d804 149
bogdanm 87:6213f644d804 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 87:6213f644d804 151
bogdanm 87:6213f644d804 152
bogdanm 87:6213f644d804 153
bogdanm 87:6213f644d804 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 87:6213f644d804 155 /* GNU gcc specific functions */
bogdanm 87:6213f644d804 156
bogdanm 87:6213f644d804 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 87:6213f644d804 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 159 {
bogdanm 87:6213f644d804 160 uint32_t result;
bogdanm 87:6213f644d804 161
bogdanm 87:6213f644d804 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 163 return(result);
bogdanm 87:6213f644d804 164 }
bogdanm 87:6213f644d804 165
bogdanm 87:6213f644d804 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 167 {
bogdanm 87:6213f644d804 168 uint32_t result;
bogdanm 87:6213f644d804 169
bogdanm 87:6213f644d804 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 171 return(result);
bogdanm 87:6213f644d804 172 }
bogdanm 87:6213f644d804 173
bogdanm 87:6213f644d804 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 175 {
bogdanm 87:6213f644d804 176 uint32_t result;
bogdanm 87:6213f644d804 177
bogdanm 87:6213f644d804 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 179 return(result);
bogdanm 87:6213f644d804 180 }
bogdanm 87:6213f644d804 181
bogdanm 87:6213f644d804 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 183 {
bogdanm 87:6213f644d804 184 uint32_t result;
bogdanm 87:6213f644d804 185
bogdanm 87:6213f644d804 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 187 return(result);
bogdanm 87:6213f644d804 188 }
bogdanm 87:6213f644d804 189
bogdanm 87:6213f644d804 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 191 {
bogdanm 87:6213f644d804 192 uint32_t result;
bogdanm 87:6213f644d804 193
bogdanm 87:6213f644d804 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 195 return(result);
bogdanm 87:6213f644d804 196 }
bogdanm 87:6213f644d804 197
bogdanm 87:6213f644d804 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 199 {
bogdanm 87:6213f644d804 200 uint32_t result;
bogdanm 87:6213f644d804 201
bogdanm 87:6213f644d804 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 203 return(result);
bogdanm 87:6213f644d804 204 }
bogdanm 87:6213f644d804 205
bogdanm 87:6213f644d804 206
bogdanm 87:6213f644d804 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 208 {
bogdanm 87:6213f644d804 209 uint32_t result;
bogdanm 87:6213f644d804 210
bogdanm 87:6213f644d804 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 212 return(result);
bogdanm 87:6213f644d804 213 }
bogdanm 87:6213f644d804 214
bogdanm 87:6213f644d804 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 216 {
bogdanm 87:6213f644d804 217 uint32_t result;
bogdanm 87:6213f644d804 218
bogdanm 87:6213f644d804 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 220 return(result);
bogdanm 87:6213f644d804 221 }
bogdanm 87:6213f644d804 222
bogdanm 87:6213f644d804 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 224 {
bogdanm 87:6213f644d804 225 uint32_t result;
bogdanm 87:6213f644d804 226
bogdanm 87:6213f644d804 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 228 return(result);
bogdanm 87:6213f644d804 229 }
bogdanm 87:6213f644d804 230
bogdanm 87:6213f644d804 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 232 {
bogdanm 87:6213f644d804 233 uint32_t result;
bogdanm 87:6213f644d804 234
bogdanm 87:6213f644d804 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 236 return(result);
bogdanm 87:6213f644d804 237 }
bogdanm 87:6213f644d804 238
bogdanm 87:6213f644d804 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 240 {
bogdanm 87:6213f644d804 241 uint32_t result;
bogdanm 87:6213f644d804 242
bogdanm 87:6213f644d804 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 244 return(result);
bogdanm 87:6213f644d804 245 }
bogdanm 87:6213f644d804 246
bogdanm 87:6213f644d804 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 248 {
bogdanm 87:6213f644d804 249 uint32_t result;
bogdanm 87:6213f644d804 250
bogdanm 87:6213f644d804 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 252 return(result);
bogdanm 87:6213f644d804 253 }
bogdanm 87:6213f644d804 254
bogdanm 87:6213f644d804 255
bogdanm 87:6213f644d804 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 257 {
bogdanm 87:6213f644d804 258 uint32_t result;
bogdanm 87:6213f644d804 259
bogdanm 87:6213f644d804 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 261 return(result);
bogdanm 87:6213f644d804 262 }
bogdanm 87:6213f644d804 263
bogdanm 87:6213f644d804 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 265 {
bogdanm 87:6213f644d804 266 uint32_t result;
bogdanm 87:6213f644d804 267
bogdanm 87:6213f644d804 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 269 return(result);
bogdanm 87:6213f644d804 270 }
bogdanm 87:6213f644d804 271
bogdanm 87:6213f644d804 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 273 {
bogdanm 87:6213f644d804 274 uint32_t result;
bogdanm 87:6213f644d804 275
bogdanm 87:6213f644d804 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 277 return(result);
bogdanm 87:6213f644d804 278 }
bogdanm 87:6213f644d804 279
bogdanm 87:6213f644d804 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 281 {
bogdanm 87:6213f644d804 282 uint32_t result;
bogdanm 87:6213f644d804 283
bogdanm 87:6213f644d804 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 285 return(result);
bogdanm 87:6213f644d804 286 }
bogdanm 87:6213f644d804 287
bogdanm 87:6213f644d804 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 289 {
bogdanm 87:6213f644d804 290 uint32_t result;
bogdanm 87:6213f644d804 291
bogdanm 87:6213f644d804 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 293 return(result);
bogdanm 87:6213f644d804 294 }
bogdanm 87:6213f644d804 295
bogdanm 87:6213f644d804 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 297 {
bogdanm 87:6213f644d804 298 uint32_t result;
bogdanm 87:6213f644d804 299
bogdanm 87:6213f644d804 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 301 return(result);
bogdanm 87:6213f644d804 302 }
bogdanm 87:6213f644d804 303
bogdanm 87:6213f644d804 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 305 {
bogdanm 87:6213f644d804 306 uint32_t result;
bogdanm 87:6213f644d804 307
bogdanm 87:6213f644d804 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 309 return(result);
bogdanm 87:6213f644d804 310 }
bogdanm 87:6213f644d804 311
bogdanm 87:6213f644d804 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 313 {
bogdanm 87:6213f644d804 314 uint32_t result;
bogdanm 87:6213f644d804 315
bogdanm 87:6213f644d804 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 317 return(result);
bogdanm 87:6213f644d804 318 }
bogdanm 87:6213f644d804 319
bogdanm 87:6213f644d804 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 321 {
bogdanm 87:6213f644d804 322 uint32_t result;
bogdanm 87:6213f644d804 323
bogdanm 87:6213f644d804 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 325 return(result);
bogdanm 87:6213f644d804 326 }
bogdanm 87:6213f644d804 327
bogdanm 87:6213f644d804 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 329 {
bogdanm 87:6213f644d804 330 uint32_t result;
bogdanm 87:6213f644d804 331
bogdanm 87:6213f644d804 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 333 return(result);
bogdanm 87:6213f644d804 334 }
bogdanm 87:6213f644d804 335
bogdanm 87:6213f644d804 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 337 {
bogdanm 87:6213f644d804 338 uint32_t result;
bogdanm 87:6213f644d804 339
bogdanm 87:6213f644d804 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 341 return(result);
bogdanm 87:6213f644d804 342 }
bogdanm 87:6213f644d804 343
bogdanm 87:6213f644d804 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 345 {
bogdanm 87:6213f644d804 346 uint32_t result;
bogdanm 87:6213f644d804 347
bogdanm 87:6213f644d804 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 349 return(result);
bogdanm 87:6213f644d804 350 }
bogdanm 87:6213f644d804 351
bogdanm 87:6213f644d804 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 353 {
bogdanm 87:6213f644d804 354 uint32_t result;
bogdanm 87:6213f644d804 355
bogdanm 87:6213f644d804 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 357 return(result);
bogdanm 87:6213f644d804 358 }
bogdanm 87:6213f644d804 359
bogdanm 87:6213f644d804 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 361 {
bogdanm 87:6213f644d804 362 uint32_t result;
bogdanm 87:6213f644d804 363
bogdanm 87:6213f644d804 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 365 return(result);
bogdanm 87:6213f644d804 366 }
bogdanm 87:6213f644d804 367
bogdanm 87:6213f644d804 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 369 {
bogdanm 87:6213f644d804 370 uint32_t result;
bogdanm 87:6213f644d804 371
bogdanm 87:6213f644d804 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 373 return(result);
bogdanm 87:6213f644d804 374 }
bogdanm 87:6213f644d804 375
bogdanm 87:6213f644d804 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 377 {
bogdanm 87:6213f644d804 378 uint32_t result;
bogdanm 87:6213f644d804 379
bogdanm 87:6213f644d804 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 381 return(result);
bogdanm 87:6213f644d804 382 }
bogdanm 87:6213f644d804 383
bogdanm 87:6213f644d804 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 385 {
bogdanm 87:6213f644d804 386 uint32_t result;
bogdanm 87:6213f644d804 387
bogdanm 87:6213f644d804 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 389 return(result);
bogdanm 87:6213f644d804 390 }
bogdanm 87:6213f644d804 391
bogdanm 87:6213f644d804 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 393 {
bogdanm 87:6213f644d804 394 uint32_t result;
bogdanm 87:6213f644d804 395
bogdanm 87:6213f644d804 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 397 return(result);
bogdanm 87:6213f644d804 398 }
bogdanm 87:6213f644d804 399
bogdanm 87:6213f644d804 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 401 {
bogdanm 87:6213f644d804 402 uint32_t result;
bogdanm 87:6213f644d804 403
bogdanm 87:6213f644d804 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 405 return(result);
bogdanm 87:6213f644d804 406 }
bogdanm 87:6213f644d804 407
bogdanm 87:6213f644d804 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 409 {
bogdanm 87:6213f644d804 410 uint32_t result;
bogdanm 87:6213f644d804 411
bogdanm 87:6213f644d804 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 413 return(result);
bogdanm 87:6213f644d804 414 }
bogdanm 87:6213f644d804 415
bogdanm 87:6213f644d804 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 417 {
bogdanm 87:6213f644d804 418 uint32_t result;
bogdanm 87:6213f644d804 419
bogdanm 87:6213f644d804 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 421 return(result);
bogdanm 87:6213f644d804 422 }
bogdanm 87:6213f644d804 423
bogdanm 87:6213f644d804 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 425 {
bogdanm 87:6213f644d804 426 uint32_t result;
bogdanm 87:6213f644d804 427
bogdanm 87:6213f644d804 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 429 return(result);
bogdanm 87:6213f644d804 430 }
bogdanm 87:6213f644d804 431
bogdanm 87:6213f644d804 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 433 {
bogdanm 87:6213f644d804 434 uint32_t result;
bogdanm 87:6213f644d804 435
bogdanm 87:6213f644d804 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 437 return(result);
bogdanm 87:6213f644d804 438 }
bogdanm 87:6213f644d804 439
bogdanm 87:6213f644d804 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 441 {
bogdanm 87:6213f644d804 442 uint32_t result;
bogdanm 87:6213f644d804 443
bogdanm 87:6213f644d804 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 445 return(result);
bogdanm 87:6213f644d804 446 }
bogdanm 87:6213f644d804 447
bogdanm 87:6213f644d804 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 449 {
bogdanm 87:6213f644d804 450 uint32_t result;
bogdanm 87:6213f644d804 451
bogdanm 87:6213f644d804 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 453 return(result);
bogdanm 87:6213f644d804 454 }
bogdanm 87:6213f644d804 455
bogdanm 87:6213f644d804 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 87:6213f644d804 457 {
bogdanm 87:6213f644d804 458 uint32_t result;
bogdanm 87:6213f644d804 459
bogdanm 87:6213f644d804 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 87:6213f644d804 461 return(result);
bogdanm 87:6213f644d804 462 }
bogdanm 87:6213f644d804 463
bogdanm 87:6213f644d804 464 #define __SSAT16(ARG1,ARG2) \
bogdanm 87:6213f644d804 465 ({ \
bogdanm 87:6213f644d804 466 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 87:6213f644d804 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 87:6213f644d804 468 __RES; \
bogdanm 87:6213f644d804 469 })
bogdanm 87:6213f644d804 470
bogdanm 87:6213f644d804 471 #define __USAT16(ARG1,ARG2) \
bogdanm 87:6213f644d804 472 ({ \
bogdanm 87:6213f644d804 473 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 87:6213f644d804 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 87:6213f644d804 475 __RES; \
bogdanm 87:6213f644d804 476 })
bogdanm 87:6213f644d804 477
bogdanm 87:6213f644d804 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 87:6213f644d804 479 {
bogdanm 87:6213f644d804 480 uint32_t result;
bogdanm 87:6213f644d804 481
bogdanm 87:6213f644d804 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 87:6213f644d804 483 return(result);
bogdanm 87:6213f644d804 484 }
bogdanm 87:6213f644d804 485
bogdanm 87:6213f644d804 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 487 {
bogdanm 87:6213f644d804 488 uint32_t result;
bogdanm 87:6213f644d804 489
bogdanm 87:6213f644d804 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 491 return(result);
bogdanm 87:6213f644d804 492 }
bogdanm 87:6213f644d804 493
bogdanm 87:6213f644d804 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 87:6213f644d804 495 {
bogdanm 87:6213f644d804 496 uint32_t result;
bogdanm 87:6213f644d804 497
bogdanm 87:6213f644d804 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 87:6213f644d804 499 return(result);
bogdanm 87:6213f644d804 500 }
bogdanm 87:6213f644d804 501
bogdanm 87:6213f644d804 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 503 {
bogdanm 87:6213f644d804 504 uint32_t result;
bogdanm 87:6213f644d804 505
bogdanm 87:6213f644d804 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 507 return(result);
bogdanm 87:6213f644d804 508 }
bogdanm 87:6213f644d804 509
bogdanm 87:6213f644d804 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 511 {
bogdanm 87:6213f644d804 512 uint32_t result;
bogdanm 87:6213f644d804 513
bogdanm 87:6213f644d804 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 515 return(result);
bogdanm 87:6213f644d804 516 }
bogdanm 87:6213f644d804 517
bogdanm 87:6213f644d804 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 519 {
bogdanm 87:6213f644d804 520 uint32_t result;
bogdanm 87:6213f644d804 521
bogdanm 87:6213f644d804 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 523 return(result);
bogdanm 87:6213f644d804 524 }
bogdanm 87:6213f644d804 525
bogdanm 87:6213f644d804 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 87:6213f644d804 527 {
bogdanm 87:6213f644d804 528 uint32_t result;
bogdanm 87:6213f644d804 529
bogdanm 87:6213f644d804 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 87:6213f644d804 531 return(result);
bogdanm 87:6213f644d804 532 }
bogdanm 87:6213f644d804 533
bogdanm 87:6213f644d804 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 87:6213f644d804 535 {
bogdanm 87:6213f644d804 536 uint32_t result;
bogdanm 87:6213f644d804 537
bogdanm 87:6213f644d804 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 87:6213f644d804 539 return(result);
bogdanm 87:6213f644d804 540 }
bogdanm 87:6213f644d804 541
bogdanm 87:6213f644d804 542 #define __SMLALD(ARG1,ARG2,ARG3) \
bogdanm 87:6213f644d804 543 ({ \
bogdanm 87:6213f644d804 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 87:6213f644d804 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 87:6213f644d804 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 87:6213f644d804 547 })
bogdanm 87:6213f644d804 548
bogdanm 87:6213f644d804 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
bogdanm 87:6213f644d804 550 ({ \
bogdanm 87:6213f644d804 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 87:6213f644d804 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 87:6213f644d804 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 87:6213f644d804 554 })
bogdanm 87:6213f644d804 555
bogdanm 87:6213f644d804 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 557 {
bogdanm 87:6213f644d804 558 uint32_t result;
bogdanm 87:6213f644d804 559
bogdanm 87:6213f644d804 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 561 return(result);
bogdanm 87:6213f644d804 562 }
bogdanm 87:6213f644d804 563
bogdanm 87:6213f644d804 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 565 {
bogdanm 87:6213f644d804 566 uint32_t result;
bogdanm 87:6213f644d804 567
bogdanm 87:6213f644d804 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 569 return(result);
bogdanm 87:6213f644d804 570 }
bogdanm 87:6213f644d804 571
bogdanm 87:6213f644d804 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 87:6213f644d804 573 {
bogdanm 87:6213f644d804 574 uint32_t result;
bogdanm 87:6213f644d804 575
bogdanm 87:6213f644d804 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 87:6213f644d804 577 return(result);
bogdanm 87:6213f644d804 578 }
bogdanm 87:6213f644d804 579
bogdanm 87:6213f644d804 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 87:6213f644d804 581 {
bogdanm 87:6213f644d804 582 uint32_t result;
bogdanm 87:6213f644d804 583
bogdanm 87:6213f644d804 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 87:6213f644d804 585 return(result);
bogdanm 87:6213f644d804 586 }
bogdanm 87:6213f644d804 587
bogdanm 87:6213f644d804 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
bogdanm 87:6213f644d804 589 ({ \
bogdanm 87:6213f644d804 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 87:6213f644d804 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 87:6213f644d804 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 87:6213f644d804 593 })
bogdanm 87:6213f644d804 594
bogdanm 87:6213f644d804 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
bogdanm 87:6213f644d804 596 ({ \
bogdanm 87:6213f644d804 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 87:6213f644d804 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 87:6213f644d804 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 87:6213f644d804 600 })
bogdanm 87:6213f644d804 601
bogdanm 87:6213f644d804 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 603 {
bogdanm 87:6213f644d804 604 uint32_t result;
bogdanm 87:6213f644d804 605
bogdanm 87:6213f644d804 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 607 return(result);
bogdanm 87:6213f644d804 608 }
bogdanm 87:6213f644d804 609
bogdanm 87:6213f644d804 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 611 {
bogdanm 87:6213f644d804 612 uint32_t result;
bogdanm 87:6213f644d804 613
bogdanm 87:6213f644d804 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 615 return(result);
bogdanm 87:6213f644d804 616 }
bogdanm 87:6213f644d804 617
bogdanm 87:6213f644d804 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 619 {
bogdanm 87:6213f644d804 620 uint32_t result;
bogdanm 87:6213f644d804 621
bogdanm 87:6213f644d804 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 87:6213f644d804 623 return(result);
bogdanm 87:6213f644d804 624 }
bogdanm 87:6213f644d804 625
bogdanm 87:6213f644d804 626 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 87:6213f644d804 627 ({ \
bogdanm 87:6213f644d804 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 87:6213f644d804 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 87:6213f644d804 630 __RES; \
bogdanm 87:6213f644d804 631 })
bogdanm 87:6213f644d804 632
bogdanm 87:6213f644d804 633 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 87:6213f644d804 634 ({ \
bogdanm 87:6213f644d804 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 87:6213f644d804 636 if (ARG3 == 0) \
bogdanm 87:6213f644d804 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 87:6213f644d804 638 else \
bogdanm 87:6213f644d804 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 87:6213f644d804 640 __RES; \
bogdanm 87:6213f644d804 641 })
bogdanm 87:6213f644d804 642
bogdanm 87:6213f644d804 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 87:6213f644d804 644 {
bogdanm 87:6213f644d804 645 int32_t result;
bogdanm 87:6213f644d804 646
bogdanm 87:6213f644d804 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 87:6213f644d804 648 return(result);
bogdanm 87:6213f644d804 649 }
bogdanm 87:6213f644d804 650
bogdanm 87:6213f644d804 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 87:6213f644d804 652
bogdanm 87:6213f644d804 653
bogdanm 87:6213f644d804 654
bogdanm 87:6213f644d804 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 87:6213f644d804 656 /* TASKING carm specific functions */
bogdanm 87:6213f644d804 657
bogdanm 87:6213f644d804 658
bogdanm 87:6213f644d804 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 87:6213f644d804 660 /* not yet supported */
bogdanm 87:6213f644d804 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 87:6213f644d804 662
bogdanm 87:6213f644d804 663
bogdanm 87:6213f644d804 664 #endif
bogdanm 87:6213f644d804 665
bogdanm 87:6213f644d804 666 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 87:6213f644d804 667
bogdanm 87:6213f644d804 668
bogdanm 87:6213f644d804 669 #endif /* __CORE_CM4_SIMD_H */
bogdanm 87:6213f644d804 670
bogdanm 87:6213f644d804 671 #ifdef __cplusplus
bogdanm 87:6213f644d804 672 }
bogdanm 87:6213f644d804 673 #endif