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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_ARM_MPS2_M7/core_cmInstr.h@102:da0ca467f8b5, 2015-07-08 (annotated)

Committer:
Kojto
Date:
Wed Jul 08 11:22:30 2015 +0100
Revision:
102:da0ca467f8b5
Child:
110:165afa46840b
Release 102 of the mbed library



Changes:

- new platform: MPS2

- K64f - mac address fix

- Freescale Kinetis - Serial NC handling fix

- Asynch constnes fixes

- startup files .s - change extension to .S

- APPNEARME_MICRONFCBOARD rename to MICRONFCBOARD

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 102:da0ca467f8b5 1 /**************************************************************************//**
Kojto 102:da0ca467f8b5 2 * @file core_cmInstr.h
Kojto 102:da0ca467f8b5 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
Kojto 102:da0ca467f8b5 4 * @version V3.20
Kojto 102:da0ca467f8b5 5 * @date 05. March 2013
Kojto 102:da0ca467f8b5 6 *
Kojto 102:da0ca467f8b5 7 * @note
Kojto 102:da0ca467f8b5 8 *
Kojto 102:da0ca467f8b5 9 ******************************************************************************/
Kojto 102:da0ca467f8b5 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
Kojto 102:da0ca467f8b5 11
Kojto 102:da0ca467f8b5 12 All rights reserved.
Kojto 102:da0ca467f8b5 13 Redistribution and use in source and binary forms, with or without
Kojto 102:da0ca467f8b5 14 modification, are permitted provided that the following conditions are met:
Kojto 102:da0ca467f8b5 15 - Redistributions of source code must retain the above copyright
Kojto 102:da0ca467f8b5 16 notice, this list of conditions and the following disclaimer.
Kojto 102:da0ca467f8b5 17 - Redistributions in binary form must reproduce the above copyright
Kojto 102:da0ca467f8b5 18 notice, this list of conditions and the following disclaimer in the
Kojto 102:da0ca467f8b5 19 documentation and/or other materials provided with the distribution.
Kojto 102:da0ca467f8b5 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 102:da0ca467f8b5 21 to endorse or promote products derived from this software without
Kojto 102:da0ca467f8b5 22 specific prior written permission.
Kojto 102:da0ca467f8b5 23 *
Kojto 102:da0ca467f8b5 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 102:da0ca467f8b5 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 102:da0ca467f8b5 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 102:da0ca467f8b5 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 102:da0ca467f8b5 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 102:da0ca467f8b5 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 102:da0ca467f8b5 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 102:da0ca467f8b5 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 102:da0ca467f8b5 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 102:da0ca467f8b5 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 102:da0ca467f8b5 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 102:da0ca467f8b5 35 ---------------------------------------------------------------------------*/
Kojto 102:da0ca467f8b5 36
Kojto 102:da0ca467f8b5 37
Kojto 102:da0ca467f8b5 38 #ifndef __CORE_CMINSTR_H
Kojto 102:da0ca467f8b5 39 #define __CORE_CMINSTR_H
Kojto 102:da0ca467f8b5 40
Kojto 102:da0ca467f8b5 41
Kojto 102:da0ca467f8b5 42 /* ########################## Core Instruction Access ######################### */
Kojto 102:da0ca467f8b5 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Kojto 102:da0ca467f8b5 44 Access to dedicated instructions
Kojto 102:da0ca467f8b5 45 @{
Kojto 102:da0ca467f8b5 46 */
Kojto 102:da0ca467f8b5 47
Kojto 102:da0ca467f8b5 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Kojto 102:da0ca467f8b5 49 /* ARM armcc specific functions */
Kojto 102:da0ca467f8b5 50
Kojto 102:da0ca467f8b5 51 #if (__ARMCC_VERSION < 400677)
Kojto 102:da0ca467f8b5 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Kojto 102:da0ca467f8b5 53 #endif
Kojto 102:da0ca467f8b5 54
Kojto 102:da0ca467f8b5 55
Kojto 102:da0ca467f8b5 56 /** \brief No Operation
Kojto 102:da0ca467f8b5 57
Kojto 102:da0ca467f8b5 58 No Operation does nothing. This instruction can be used for code alignment purposes.
Kojto 102:da0ca467f8b5 59 */
Kojto 102:da0ca467f8b5 60 #define __NOP __nop
Kojto 102:da0ca467f8b5 61
Kojto 102:da0ca467f8b5 62
Kojto 102:da0ca467f8b5 63 /** \brief Wait For Interrupt
Kojto 102:da0ca467f8b5 64
Kojto 102:da0ca467f8b5 65 Wait For Interrupt is a hint instruction that suspends execution
Kojto 102:da0ca467f8b5 66 until one of a number of events occurs.
Kojto 102:da0ca467f8b5 67 */
Kojto 102:da0ca467f8b5 68 #define __WFI __wfi
Kojto 102:da0ca467f8b5 69
Kojto 102:da0ca467f8b5 70
Kojto 102:da0ca467f8b5 71 /** \brief Wait For Event
Kojto 102:da0ca467f8b5 72
Kojto 102:da0ca467f8b5 73 Wait For Event is a hint instruction that permits the processor to enter
Kojto 102:da0ca467f8b5 74 a low-power state until one of a number of events occurs.
Kojto 102:da0ca467f8b5 75 */
Kojto 102:da0ca467f8b5 76 #define __WFE __wfe
Kojto 102:da0ca467f8b5 77
Kojto 102:da0ca467f8b5 78
Kojto 102:da0ca467f8b5 79 /** \brief Send Event
Kojto 102:da0ca467f8b5 80
Kojto 102:da0ca467f8b5 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Kojto 102:da0ca467f8b5 82 */
Kojto 102:da0ca467f8b5 83 #define __SEV __sev
Kojto 102:da0ca467f8b5 84
Kojto 102:da0ca467f8b5 85
Kojto 102:da0ca467f8b5 86 /** \brief Instruction Synchronization Barrier
Kojto 102:da0ca467f8b5 87
Kojto 102:da0ca467f8b5 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
Kojto 102:da0ca467f8b5 89 so that all instructions following the ISB are fetched from cache or
Kojto 102:da0ca467f8b5 90 memory, after the instruction has been completed.
Kojto 102:da0ca467f8b5 91 */
Kojto 102:da0ca467f8b5 92 #define __ISB() __isb(0xF)
Kojto 102:da0ca467f8b5 93
Kojto 102:da0ca467f8b5 94
Kojto 102:da0ca467f8b5 95 /** \brief Data Synchronization Barrier
Kojto 102:da0ca467f8b5 96
Kojto 102:da0ca467f8b5 97 This function acts as a special kind of Data Memory Barrier.
Kojto 102:da0ca467f8b5 98 It completes when all explicit memory accesses before this instruction complete.
Kojto 102:da0ca467f8b5 99 */
Kojto 102:da0ca467f8b5 100 #define __DSB() __dsb(0xF)
Kojto 102:da0ca467f8b5 101
Kojto 102:da0ca467f8b5 102
Kojto 102:da0ca467f8b5 103 /** \brief Data Memory Barrier
Kojto 102:da0ca467f8b5 104
Kojto 102:da0ca467f8b5 105 This function ensures the apparent order of the explicit memory operations before
Kojto 102:da0ca467f8b5 106 and after the instruction, without ensuring their completion.
Kojto 102:da0ca467f8b5 107 */
Kojto 102:da0ca467f8b5 108 #define __DMB() __dmb(0xF)
Kojto 102:da0ca467f8b5 109
Kojto 102:da0ca467f8b5 110
Kojto 102:da0ca467f8b5 111 /** \brief Reverse byte order (32 bit)
Kojto 102:da0ca467f8b5 112
Kojto 102:da0ca467f8b5 113 This function reverses the byte order in integer value.
Kojto 102:da0ca467f8b5 114
Kojto 102:da0ca467f8b5 115 \param [in] value Value to reverse
Kojto 102:da0ca467f8b5 116 \return Reversed value
Kojto 102:da0ca467f8b5 117 */
Kojto 102:da0ca467f8b5 118 #define __REV __rev
Kojto 102:da0ca467f8b5 119
Kojto 102:da0ca467f8b5 120
Kojto 102:da0ca467f8b5 121 /** \brief Reverse byte order (16 bit)
Kojto 102:da0ca467f8b5 122
Kojto 102:da0ca467f8b5 123 This function reverses the byte order in two unsigned short values.
Kojto 102:da0ca467f8b5 124
Kojto 102:da0ca467f8b5 125 \param [in] value Value to reverse
Kojto 102:da0ca467f8b5 126 \return Reversed value
Kojto 102:da0ca467f8b5 127 */
Kojto 102:da0ca467f8b5 128 #ifndef __NO_EMBEDDED_ASM
Kojto 102:da0ca467f8b5 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
Kojto 102:da0ca467f8b5 130 {
Kojto 102:da0ca467f8b5 131 rev16 r0, r0
Kojto 102:da0ca467f8b5 132 bx lr
Kojto 102:da0ca467f8b5 133 }
Kojto 102:da0ca467f8b5 134 #endif
Kojto 102:da0ca467f8b5 135
Kojto 102:da0ca467f8b5 136 /** \brief Reverse byte order in signed short value
Kojto 102:da0ca467f8b5 137
Kojto 102:da0ca467f8b5 138 This function reverses the byte order in a signed short value with sign extension to integer.
Kojto 102:da0ca467f8b5 139
Kojto 102:da0ca467f8b5 140 \param [in] value Value to reverse
Kojto 102:da0ca467f8b5 141 \return Reversed value
Kojto 102:da0ca467f8b5 142 */
Kojto 102:da0ca467f8b5 143 #ifndef __NO_EMBEDDED_ASM
Kojto 102:da0ca467f8b5 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
Kojto 102:da0ca467f8b5 145 {
Kojto 102:da0ca467f8b5 146 revsh r0, r0
Kojto 102:da0ca467f8b5 147 bx lr
Kojto 102:da0ca467f8b5 148 }
Kojto 102:da0ca467f8b5 149 #endif
Kojto 102:da0ca467f8b5 150
Kojto 102:da0ca467f8b5 151
Kojto 102:da0ca467f8b5 152 /** \brief Rotate Right in unsigned value (32 bit)
Kojto 102:da0ca467f8b5 153
Kojto 102:da0ca467f8b5 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
Kojto 102:da0ca467f8b5 155
Kojto 102:da0ca467f8b5 156 \param [in] value Value to rotate
Kojto 102:da0ca467f8b5 157 \param [in] value Number of Bits to rotate
Kojto 102:da0ca467f8b5 158 \return Rotated value
Kojto 102:da0ca467f8b5 159 */
Kojto 102:da0ca467f8b5 160 #define __ROR __ror
Kojto 102:da0ca467f8b5 161
Kojto 102:da0ca467f8b5 162
Kojto 102:da0ca467f8b5 163 /** \brief Breakpoint
Kojto 102:da0ca467f8b5 164
Kojto 102:da0ca467f8b5 165 This function causes the processor to enter Debug state.
Kojto 102:da0ca467f8b5 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
Kojto 102:da0ca467f8b5 167
Kojto 102:da0ca467f8b5 168 \param [in] value is ignored by the processor.
Kojto 102:da0ca467f8b5 169 If required, a debugger can use it to store additional information about the breakpoint.
Kojto 102:da0ca467f8b5 170 */
Kojto 102:da0ca467f8b5 171 #define __BKPT(value) __breakpoint(value)
Kojto 102:da0ca467f8b5 172
Kojto 102:da0ca467f8b5 173
Kojto 102:da0ca467f8b5 174 #if (__CORTEX_M >= 0x03)
Kojto 102:da0ca467f8b5 175
Kojto 102:da0ca467f8b5 176 /** \brief Reverse bit order of value
Kojto 102:da0ca467f8b5 177
Kojto 102:da0ca467f8b5 178 This function reverses the bit order of the given value.
Kojto 102:da0ca467f8b5 179
Kojto 102:da0ca467f8b5 180 \param [in] value Value to reverse
Kojto 102:da0ca467f8b5 181 \return Reversed value
Kojto 102:da0ca467f8b5 182 */
Kojto 102:da0ca467f8b5 183 #define __RBIT __rbit
Kojto 102:da0ca467f8b5 184
Kojto 102:da0ca467f8b5 185
Kojto 102:da0ca467f8b5 186 /** \brief LDR Exclusive (8 bit)
Kojto 102:da0ca467f8b5 187
Kojto 102:da0ca467f8b5 188 This function performs a exclusive LDR command for 8 bit value.
Kojto 102:da0ca467f8b5 189
Kojto 102:da0ca467f8b5 190 \param [in] ptr Pointer to data
Kojto 102:da0ca467f8b5 191 \return value of type uint8_t at (*ptr)
Kojto 102:da0ca467f8b5 192 */
Kojto 102:da0ca467f8b5 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
Kojto 102:da0ca467f8b5 194
Kojto 102:da0ca467f8b5 195
Kojto 102:da0ca467f8b5 196 /** \brief LDR Exclusive (16 bit)
Kojto 102:da0ca467f8b5 197
Kojto 102:da0ca467f8b5 198 This function performs a exclusive LDR command for 16 bit values.
Kojto 102:da0ca467f8b5 199
Kojto 102:da0ca467f8b5 200 \param [in] ptr Pointer to data
Kojto 102:da0ca467f8b5 201 \return value of type uint16_t at (*ptr)
Kojto 102:da0ca467f8b5 202 */
Kojto 102:da0ca467f8b5 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
Kojto 102:da0ca467f8b5 204
Kojto 102:da0ca467f8b5 205
Kojto 102:da0ca467f8b5 206 /** \brief LDR Exclusive (32 bit)
Kojto 102:da0ca467f8b5 207
Kojto 102:da0ca467f8b5 208 This function performs a exclusive LDR command for 32 bit values.
Kojto 102:da0ca467f8b5 209
Kojto 102:da0ca467f8b5 210 \param [in] ptr Pointer to data
Kojto 102:da0ca467f8b5 211 \return value of type uint32_t at (*ptr)
Kojto 102:da0ca467f8b5 212 */
Kojto 102:da0ca467f8b5 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
Kojto 102:da0ca467f8b5 214
Kojto 102:da0ca467f8b5 215
Kojto 102:da0ca467f8b5 216 /** \brief STR Exclusive (8 bit)
Kojto 102:da0ca467f8b5 217
Kojto 102:da0ca467f8b5 218 This function performs a exclusive STR command for 8 bit values.
Kojto 102:da0ca467f8b5 219
Kojto 102:da0ca467f8b5 220 \param [in] value Value to store
Kojto 102:da0ca467f8b5 221 \param [in] ptr Pointer to location
Kojto 102:da0ca467f8b5 222 \return 0 Function succeeded
Kojto 102:da0ca467f8b5 223 \return 1 Function failed
Kojto 102:da0ca467f8b5 224 */
Kojto 102:da0ca467f8b5 225 #define __STREXB(value, ptr) __strex(value, ptr)
Kojto 102:da0ca467f8b5 226
Kojto 102:da0ca467f8b5 227
Kojto 102:da0ca467f8b5 228 /** \brief STR Exclusive (16 bit)
Kojto 102:da0ca467f8b5 229
Kojto 102:da0ca467f8b5 230 This function performs a exclusive STR command for 16 bit values.
Kojto 102:da0ca467f8b5 231
Kojto 102:da0ca467f8b5 232 \param [in] value Value to store
Kojto 102:da0ca467f8b5 233 \param [in] ptr Pointer to location
Kojto 102:da0ca467f8b5 234 \return 0 Function succeeded
Kojto 102:da0ca467f8b5 235 \return 1 Function failed
Kojto 102:da0ca467f8b5 236 */
Kojto 102:da0ca467f8b5 237 #define __STREXH(value, ptr) __strex(value, ptr)
Kojto 102:da0ca467f8b5 238
Kojto 102:da0ca467f8b5 239
Kojto 102:da0ca467f8b5 240 /** \brief STR Exclusive (32 bit)
Kojto 102:da0ca467f8b5 241
Kojto 102:da0ca467f8b5 242 This function performs a exclusive STR command for 32 bit values.
Kojto 102:da0ca467f8b5 243
Kojto 102:da0ca467f8b5 244 \param [in] value Value to store
Kojto 102:da0ca467f8b5 245 \param [in] ptr Pointer to location
Kojto 102:da0ca467f8b5 246 \return 0 Function succeeded
Kojto 102:da0ca467f8b5 247 \return 1 Function failed
Kojto 102:da0ca467f8b5 248 */
Kojto 102:da0ca467f8b5 249 #define __STREXW(value, ptr) __strex(value, ptr)
Kojto 102:da0ca467f8b5 250
Kojto 102:da0ca467f8b5 251
Kojto 102:da0ca467f8b5 252 /** \brief Remove the exclusive lock
Kojto 102:da0ca467f8b5 253
Kojto 102:da0ca467f8b5 254 This function removes the exclusive lock which is created by LDREX.
Kojto 102:da0ca467f8b5 255
Kojto 102:da0ca467f8b5 256 */
Kojto 102:da0ca467f8b5 257 #define __CLREX __clrex
Kojto 102:da0ca467f8b5 258
Kojto 102:da0ca467f8b5 259
Kojto 102:da0ca467f8b5 260 /** \brief Signed Saturate
Kojto 102:da0ca467f8b5 261
Kojto 102:da0ca467f8b5 262 This function saturates a signed value.
Kojto 102:da0ca467f8b5 263
Kojto 102:da0ca467f8b5 264 \param [in] value Value to be saturated
Kojto 102:da0ca467f8b5 265 \param [in] sat Bit position to saturate to (1..32)
Kojto 102:da0ca467f8b5 266 \return Saturated value
Kojto 102:da0ca467f8b5 267 */
Kojto 102:da0ca467f8b5 268 #define __SSAT __ssat
Kojto 102:da0ca467f8b5 269
Kojto 102:da0ca467f8b5 270
Kojto 102:da0ca467f8b5 271 /** \brief Unsigned Saturate
Kojto 102:da0ca467f8b5 272
Kojto 102:da0ca467f8b5 273 This function saturates an unsigned value.
Kojto 102:da0ca467f8b5 274
Kojto 102:da0ca467f8b5 275 \param [in] value Value to be saturated
Kojto 102:da0ca467f8b5 276 \param [in] sat Bit position to saturate to (0..31)
Kojto 102:da0ca467f8b5 277 \return Saturated value
Kojto 102:da0ca467f8b5 278 */
Kojto 102:da0ca467f8b5 279 #define __USAT __usat
Kojto 102:da0ca467f8b5 280
Kojto 102:da0ca467f8b5 281
Kojto 102:da0ca467f8b5 282 /** \brief Count leading zeros
Kojto 102:da0ca467f8b5 283
Kojto 102:da0ca467f8b5 284 This function counts the number of leading zeros of a data value.
Kojto 102:da0ca467f8b5 285
Kojto 102:da0ca467f8b5 286 \param [in] value Value to count the leading zeros
Kojto 102:da0ca467f8b5 287 \return number of leading zeros in value
Kojto 102:da0ca467f8b5 288 */
Kojto 102:da0ca467f8b5 289 #define __CLZ __clz
Kojto 102:da0ca467f8b5 290
Kojto 102:da0ca467f8b5 291 #endif /* (__CORTEX_M >= 0x03) */
Kojto 102:da0ca467f8b5 292
Kojto 102:da0ca467f8b5 293
Kojto 102:da0ca467f8b5 294
Kojto 102:da0ca467f8b5 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 102:da0ca467f8b5 296 /* IAR iccarm specific functions */
Kojto 102:da0ca467f8b5 297
Kojto 102:da0ca467f8b5 298 #include <cmsis_iar.h>
Kojto 102:da0ca467f8b5 299
Kojto 102:da0ca467f8b5 300
Kojto 102:da0ca467f8b5 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 102:da0ca467f8b5 302 /* TI CCS specific functions */
Kojto 102:da0ca467f8b5 303
Kojto 102:da0ca467f8b5 304 #include <cmsis_ccs.h>
Kojto 102:da0ca467f8b5 305
Kojto 102:da0ca467f8b5 306
Kojto 102:da0ca467f8b5 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Kojto 102:da0ca467f8b5 308 /* GNU gcc specific functions */
Kojto 102:da0ca467f8b5 309
Kojto 102:da0ca467f8b5 310 /* Define macros for porting to both thumb1 and thumb2.
Kojto 102:da0ca467f8b5 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
Kojto 102:da0ca467f8b5 312 * Otherwise, use general registers, specified by constrant "r" */
Kojto 102:da0ca467f8b5 313 #if defined (__thumb__) && !defined (__thumb2__)
Kojto 102:da0ca467f8b5 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
Kojto 102:da0ca467f8b5 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
Kojto 102:da0ca467f8b5 316 #else
Kojto 102:da0ca467f8b5 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
Kojto 102:da0ca467f8b5 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
Kojto 102:da0ca467f8b5 319 #endif
Kojto 102:da0ca467f8b5 320
Kojto 102:da0ca467f8b5 321 /** \brief No Operation
Kojto 102:da0ca467f8b5 322
Kojto 102:da0ca467f8b5 323 No Operation does nothing. This instruction can be used for code alignment purposes.
Kojto 102:da0ca467f8b5 324 */
Kojto 102:da0ca467f8b5 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
Kojto 102:da0ca467f8b5 326 {
Kojto 102:da0ca467f8b5 327 __ASM volatile ("nop");
Kojto 102:da0ca467f8b5 328 }
Kojto 102:da0ca467f8b5 329
Kojto 102:da0ca467f8b5 330
Kojto 102:da0ca467f8b5 331 /** \brief Wait For Interrupt
Kojto 102:da0ca467f8b5 332
Kojto 102:da0ca467f8b5 333 Wait For Interrupt is a hint instruction that suspends execution
Kojto 102:da0ca467f8b5 334 until one of a number of events occurs.
Kojto 102:da0ca467f8b5 335 */
Kojto 102:da0ca467f8b5 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
Kojto 102:da0ca467f8b5 337 {
Kojto 102:da0ca467f8b5 338 __ASM volatile ("wfi");
Kojto 102:da0ca467f8b5 339 }
Kojto 102:da0ca467f8b5 340
Kojto 102:da0ca467f8b5 341
Kojto 102:da0ca467f8b5 342 /** \brief Wait For Event
Kojto 102:da0ca467f8b5 343
Kojto 102:da0ca467f8b5 344 Wait For Event is a hint instruction that permits the processor to enter
Kojto 102:da0ca467f8b5 345 a low-power state until one of a number of events occurs.
Kojto 102:da0ca467f8b5 346 */
Kojto 102:da0ca467f8b5 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
Kojto 102:da0ca467f8b5 348 {
Kojto 102:da0ca467f8b5 349 __ASM volatile ("wfe");
Kojto 102:da0ca467f8b5 350 }
Kojto 102:da0ca467f8b5 351
Kojto 102:da0ca467f8b5 352
Kojto 102:da0ca467f8b5 353 /** \brief Send Event
Kojto 102:da0ca467f8b5 354
Kojto 102:da0ca467f8b5 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Kojto 102:da0ca467f8b5 356 */
Kojto 102:da0ca467f8b5 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
Kojto 102:da0ca467f8b5 358 {
Kojto 102:da0ca467f8b5 359 __ASM volatile ("sev");
Kojto 102:da0ca467f8b5 360 }
Kojto 102:da0ca467f8b5 361
Kojto 102:da0ca467f8b5 362
Kojto 102:da0ca467f8b5 363 /** \brief Instruction Synchronization Barrier
Kojto 102:da0ca467f8b5 364
Kojto 102:da0ca467f8b5 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
Kojto 102:da0ca467f8b5 366 so that all instructions following the ISB are fetched from cache or
Kojto 102:da0ca467f8b5 367 memory, after the instruction has been completed.
Kojto 102:da0ca467f8b5 368 */
Kojto 102:da0ca467f8b5 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
Kojto 102:da0ca467f8b5 370 {
Kojto 102:da0ca467f8b5 371 __ASM volatile ("isb");
Kojto 102:da0ca467f8b5 372 }
Kojto 102:da0ca467f8b5 373
Kojto 102:da0ca467f8b5 374
Kojto 102:da0ca467f8b5 375 /** \brief Data Synchronization Barrier
Kojto 102:da0ca467f8b5 376
Kojto 102:da0ca467f8b5 377 This function acts as a special kind of Data Memory Barrier.
Kojto 102:da0ca467f8b5 378 It completes when all explicit memory accesses before this instruction complete.
Kojto 102:da0ca467f8b5 379 */
Kojto 102:da0ca467f8b5 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
Kojto 102:da0ca467f8b5 381 {
Kojto 102:da0ca467f8b5 382 __ASM volatile ("dsb");
Kojto 102:da0ca467f8b5 383 }
Kojto 102:da0ca467f8b5 384
Kojto 102:da0ca467f8b5 385
Kojto 102:da0ca467f8b5 386 /** \brief Data Memory Barrier
Kojto 102:da0ca467f8b5 387
Kojto 102:da0ca467f8b5 388 This function ensures the apparent order of the explicit memory operations before
Kojto 102:da0ca467f8b5 389 and after the instruction, without ensuring their completion.
Kojto 102:da0ca467f8b5 390 */
Kojto 102:da0ca467f8b5 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
Kojto 102:da0ca467f8b5 392 {
Kojto 102:da0ca467f8b5 393 __ASM volatile ("dmb");
Kojto 102:da0ca467f8b5 394 }
Kojto 102:da0ca467f8b5 395
Kojto 102:da0ca467f8b5 396
Kojto 102:da0ca467f8b5 397 /** \brief Reverse byte order (32 bit)
Kojto 102:da0ca467f8b5 398
Kojto 102:da0ca467f8b5 399 This function reverses the byte order in integer value.
Kojto 102:da0ca467f8b5 400
Kojto 102:da0ca467f8b5 401 \param [in] value Value to reverse
Kojto 102:da0ca467f8b5 402 \return Reversed value
Kojto 102:da0ca467f8b5 403 */
Kojto 102:da0ca467f8b5 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
Kojto 102:da0ca467f8b5 405 {
Kojto 102:da0ca467f8b5 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
Kojto 102:da0ca467f8b5 407 return __builtin_bswap32(value);
Kojto 102:da0ca467f8b5 408 #else
Kojto 102:da0ca467f8b5 409 uint32_t result;
Kojto 102:da0ca467f8b5 410
Kojto 102:da0ca467f8b5 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Kojto 102:da0ca467f8b5 412 return(result);
Kojto 102:da0ca467f8b5 413 #endif
Kojto 102:da0ca467f8b5 414 }
Kojto 102:da0ca467f8b5 415
Kojto 102:da0ca467f8b5 416
Kojto 102:da0ca467f8b5 417 /** \brief Reverse byte order (16 bit)
Kojto 102:da0ca467f8b5 418
Kojto 102:da0ca467f8b5 419 This function reverses the byte order in two unsigned short values.
Kojto 102:da0ca467f8b5 420
Kojto 102:da0ca467f8b5 421 \param [in] value Value to reverse
Kojto 102:da0ca467f8b5 422 \return Reversed value
Kojto 102:da0ca467f8b5 423 */
Kojto 102:da0ca467f8b5 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
Kojto 102:da0ca467f8b5 425 {
Kojto 102:da0ca467f8b5 426 uint32_t result;
Kojto 102:da0ca467f8b5 427
Kojto 102:da0ca467f8b5 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Kojto 102:da0ca467f8b5 429 return(result);
Kojto 102:da0ca467f8b5 430 }
Kojto 102:da0ca467f8b5 431
Kojto 102:da0ca467f8b5 432
Kojto 102:da0ca467f8b5 433 /** \brief Reverse byte order in signed short value
Kojto 102:da0ca467f8b5 434
Kojto 102:da0ca467f8b5 435 This function reverses the byte order in a signed short value with sign extension to integer.
Kojto 102:da0ca467f8b5 436
Kojto 102:da0ca467f8b5 437 \param [in] value Value to reverse
Kojto 102:da0ca467f8b5 438 \return Reversed value
Kojto 102:da0ca467f8b5 439 */
Kojto 102:da0ca467f8b5 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
Kojto 102:da0ca467f8b5 441 {
Kojto 102:da0ca467f8b5 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 102:da0ca467f8b5 443 return (short)__builtin_bswap16(value);
Kojto 102:da0ca467f8b5 444 #else
Kojto 102:da0ca467f8b5 445 uint32_t result;
Kojto 102:da0ca467f8b5 446
Kojto 102:da0ca467f8b5 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Kojto 102:da0ca467f8b5 448 return(result);
Kojto 102:da0ca467f8b5 449 #endif
Kojto 102:da0ca467f8b5 450 }
Kojto 102:da0ca467f8b5 451
Kojto 102:da0ca467f8b5 452
Kojto 102:da0ca467f8b5 453 /** \brief Rotate Right in unsigned value (32 bit)
Kojto 102:da0ca467f8b5 454
Kojto 102:da0ca467f8b5 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
Kojto 102:da0ca467f8b5 456
Kojto 102:da0ca467f8b5 457 \param [in] value Value to rotate
Kojto 102:da0ca467f8b5 458 \param [in] value Number of Bits to rotate
Kojto 102:da0ca467f8b5 459 \return Rotated value
Kojto 102:da0ca467f8b5 460 */
Kojto 102:da0ca467f8b5 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
Kojto 102:da0ca467f8b5 462 {
Kojto 102:da0ca467f8b5 463 return (op1 >> op2) | (op1 << (32 - op2));
Kojto 102:da0ca467f8b5 464 }
Kojto 102:da0ca467f8b5 465
Kojto 102:da0ca467f8b5 466
Kojto 102:da0ca467f8b5 467 /** \brief Breakpoint
Kojto 102:da0ca467f8b5 468
Kojto 102:da0ca467f8b5 469 This function causes the processor to enter Debug state.
Kojto 102:da0ca467f8b5 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
Kojto 102:da0ca467f8b5 471
Kojto 102:da0ca467f8b5 472 \param [in] value is ignored by the processor.
Kojto 102:da0ca467f8b5 473 If required, a debugger can use it to store additional information about the breakpoint.
Kojto 102:da0ca467f8b5 474 */
Kojto 102:da0ca467f8b5 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
Kojto 102:da0ca467f8b5 476
Kojto 102:da0ca467f8b5 477
Kojto 102:da0ca467f8b5 478 #if (__CORTEX_M >= 0x03)
Kojto 102:da0ca467f8b5 479
Kojto 102:da0ca467f8b5 480 /** \brief Reverse bit order of value
Kojto 102:da0ca467f8b5 481
Kojto 102:da0ca467f8b5 482 This function reverses the bit order of the given value.
Kojto 102:da0ca467f8b5 483
Kojto 102:da0ca467f8b5 484 \param [in] value Value to reverse
Kojto 102:da0ca467f8b5 485 \return Reversed value
Kojto 102:da0ca467f8b5 486 */
Kojto 102:da0ca467f8b5 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
Kojto 102:da0ca467f8b5 488 {
Kojto 102:da0ca467f8b5 489 uint32_t result;
Kojto 102:da0ca467f8b5 490
Kojto 102:da0ca467f8b5 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
Kojto 102:da0ca467f8b5 492 return(result);
Kojto 102:da0ca467f8b5 493 }
Kojto 102:da0ca467f8b5 494
Kojto 102:da0ca467f8b5 495
Kojto 102:da0ca467f8b5 496 /** \brief LDR Exclusive (8 bit)
Kojto 102:da0ca467f8b5 497
Kojto 102:da0ca467f8b5 498 This function performs a exclusive LDR command for 8 bit value.
Kojto 102:da0ca467f8b5 499
Kojto 102:da0ca467f8b5 500 \param [in] ptr Pointer to data
Kojto 102:da0ca467f8b5 501 \return value of type uint8_t at (*ptr)
Kojto 102:da0ca467f8b5 502 */
Kojto 102:da0ca467f8b5 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
Kojto 102:da0ca467f8b5 504 {
Kojto 102:da0ca467f8b5 505 uint32_t result;
Kojto 102:da0ca467f8b5 506
Kojto 102:da0ca467f8b5 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 102:da0ca467f8b5 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 102:da0ca467f8b5 509 #else
Kojto 102:da0ca467f8b5 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Kojto 102:da0ca467f8b5 511 accepted by assembler. So has to use following less efficient pattern.
Kojto 102:da0ca467f8b5 512 */
Kojto 102:da0ca467f8b5 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Kojto 102:da0ca467f8b5 514 #endif
Kojto 102:da0ca467f8b5 515 return(result);
Kojto 102:da0ca467f8b5 516 }
Kojto 102:da0ca467f8b5 517
Kojto 102:da0ca467f8b5 518
Kojto 102:da0ca467f8b5 519 /** \brief LDR Exclusive (16 bit)
Kojto 102:da0ca467f8b5 520
Kojto 102:da0ca467f8b5 521 This function performs a exclusive LDR command for 16 bit values.
Kojto 102:da0ca467f8b5 522
Kojto 102:da0ca467f8b5 523 \param [in] ptr Pointer to data
Kojto 102:da0ca467f8b5 524 \return value of type uint16_t at (*ptr)
Kojto 102:da0ca467f8b5 525 */
Kojto 102:da0ca467f8b5 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
Kojto 102:da0ca467f8b5 527 {
Kojto 102:da0ca467f8b5 528 uint32_t result;
Kojto 102:da0ca467f8b5 529
Kojto 102:da0ca467f8b5 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 102:da0ca467f8b5 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 102:da0ca467f8b5 532 #else
Kojto 102:da0ca467f8b5 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Kojto 102:da0ca467f8b5 534 accepted by assembler. So has to use following less efficient pattern.
Kojto 102:da0ca467f8b5 535 */
Kojto 102:da0ca467f8b5 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Kojto 102:da0ca467f8b5 537 #endif
Kojto 102:da0ca467f8b5 538 return(result);
Kojto 102:da0ca467f8b5 539 }
Kojto 102:da0ca467f8b5 540
Kojto 102:da0ca467f8b5 541
Kojto 102:da0ca467f8b5 542 /** \brief LDR Exclusive (32 bit)
Kojto 102:da0ca467f8b5 543
Kojto 102:da0ca467f8b5 544 This function performs a exclusive LDR command for 32 bit values.
Kojto 102:da0ca467f8b5 545
Kojto 102:da0ca467f8b5 546 \param [in] ptr Pointer to data
Kojto 102:da0ca467f8b5 547 \return value of type uint32_t at (*ptr)
Kojto 102:da0ca467f8b5 548 */
Kojto 102:da0ca467f8b5 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
Kojto 102:da0ca467f8b5 550 {
Kojto 102:da0ca467f8b5 551 uint32_t result;
Kojto 102:da0ca467f8b5 552
Kojto 102:da0ca467f8b5 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 102:da0ca467f8b5 554 return(result);
Kojto 102:da0ca467f8b5 555 }
Kojto 102:da0ca467f8b5 556
Kojto 102:da0ca467f8b5 557
Kojto 102:da0ca467f8b5 558 /** \brief STR Exclusive (8 bit)
Kojto 102:da0ca467f8b5 559
Kojto 102:da0ca467f8b5 560 This function performs a exclusive STR command for 8 bit values.
Kojto 102:da0ca467f8b5 561
Kojto 102:da0ca467f8b5 562 \param [in] value Value to store
Kojto 102:da0ca467f8b5 563 \param [in] ptr Pointer to location
Kojto 102:da0ca467f8b5 564 \return 0 Function succeeded
Kojto 102:da0ca467f8b5 565 \return 1 Function failed
Kojto 102:da0ca467f8b5 566 */
Kojto 102:da0ca467f8b5 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
Kojto 102:da0ca467f8b5 568 {
Kojto 102:da0ca467f8b5 569 uint32_t result;
Kojto 102:da0ca467f8b5 570
Kojto 102:da0ca467f8b5 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Kojto 102:da0ca467f8b5 572 return(result);
Kojto 102:da0ca467f8b5 573 }
Kojto 102:da0ca467f8b5 574
Kojto 102:da0ca467f8b5 575
Kojto 102:da0ca467f8b5 576 /** \brief STR Exclusive (16 bit)
Kojto 102:da0ca467f8b5 577
Kojto 102:da0ca467f8b5 578 This function performs a exclusive STR command for 16 bit values.
Kojto 102:da0ca467f8b5 579
Kojto 102:da0ca467f8b5 580 \param [in] value Value to store
Kojto 102:da0ca467f8b5 581 \param [in] ptr Pointer to location
Kojto 102:da0ca467f8b5 582 \return 0 Function succeeded
Kojto 102:da0ca467f8b5 583 \return 1 Function failed
Kojto 102:da0ca467f8b5 584 */
Kojto 102:da0ca467f8b5 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
Kojto 102:da0ca467f8b5 586 {
Kojto 102:da0ca467f8b5 587 uint32_t result;
Kojto 102:da0ca467f8b5 588
Kojto 102:da0ca467f8b5 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Kojto 102:da0ca467f8b5 590 return(result);
Kojto 102:da0ca467f8b5 591 }
Kojto 102:da0ca467f8b5 592
Kojto 102:da0ca467f8b5 593
Kojto 102:da0ca467f8b5 594 /** \brief STR Exclusive (32 bit)
Kojto 102:da0ca467f8b5 595
Kojto 102:da0ca467f8b5 596 This function performs a exclusive STR command for 32 bit values.
Kojto 102:da0ca467f8b5 597
Kojto 102:da0ca467f8b5 598 \param [in] value Value to store
Kojto 102:da0ca467f8b5 599 \param [in] ptr Pointer to location
Kojto 102:da0ca467f8b5 600 \return 0 Function succeeded
Kojto 102:da0ca467f8b5 601 \return 1 Function failed
Kojto 102:da0ca467f8b5 602 */
Kojto 102:da0ca467f8b5 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
Kojto 102:da0ca467f8b5 604 {
Kojto 102:da0ca467f8b5 605 uint32_t result;
Kojto 102:da0ca467f8b5 606
Kojto 102:da0ca467f8b5 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Kojto 102:da0ca467f8b5 608 return(result);
Kojto 102:da0ca467f8b5 609 }
Kojto 102:da0ca467f8b5 610
Kojto 102:da0ca467f8b5 611
Kojto 102:da0ca467f8b5 612 /** \brief Remove the exclusive lock
Kojto 102:da0ca467f8b5 613
Kojto 102:da0ca467f8b5 614 This function removes the exclusive lock which is created by LDREX.
Kojto 102:da0ca467f8b5 615
Kojto 102:da0ca467f8b5 616 */
Kojto 102:da0ca467f8b5 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
Kojto 102:da0ca467f8b5 618 {
Kojto 102:da0ca467f8b5 619 __ASM volatile ("clrex" ::: "memory");
Kojto 102:da0ca467f8b5 620 }
Kojto 102:da0ca467f8b5 621
Kojto 102:da0ca467f8b5 622
Kojto 102:da0ca467f8b5 623 /** \brief Signed Saturate
Kojto 102:da0ca467f8b5 624
Kojto 102:da0ca467f8b5 625 This function saturates a signed value.
Kojto 102:da0ca467f8b5 626
Kojto 102:da0ca467f8b5 627 \param [in] value Value to be saturated
Kojto 102:da0ca467f8b5 628 \param [in] sat Bit position to saturate to (1..32)
Kojto 102:da0ca467f8b5 629 \return Saturated value
Kojto 102:da0ca467f8b5 630 */
Kojto 102:da0ca467f8b5 631 #define __SSAT(ARG1,ARG2) \
Kojto 102:da0ca467f8b5 632 ({ \
Kojto 102:da0ca467f8b5 633 uint32_t __RES, __ARG1 = (ARG1); \
Kojto 102:da0ca467f8b5 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Kojto 102:da0ca467f8b5 635 __RES; \
Kojto 102:da0ca467f8b5 636 })
Kojto 102:da0ca467f8b5 637
Kojto 102:da0ca467f8b5 638
Kojto 102:da0ca467f8b5 639 /** \brief Unsigned Saturate
Kojto 102:da0ca467f8b5 640
Kojto 102:da0ca467f8b5 641 This function saturates an unsigned value.
Kojto 102:da0ca467f8b5 642
Kojto 102:da0ca467f8b5 643 \param [in] value Value to be saturated
Kojto 102:da0ca467f8b5 644 \param [in] sat Bit position to saturate to (0..31)
Kojto 102:da0ca467f8b5 645 \return Saturated value
Kojto 102:da0ca467f8b5 646 */
Kojto 102:da0ca467f8b5 647 #define __USAT(ARG1,ARG2) \
Kojto 102:da0ca467f8b5 648 ({ \
Kojto 102:da0ca467f8b5 649 uint32_t __RES, __ARG1 = (ARG1); \
Kojto 102:da0ca467f8b5 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Kojto 102:da0ca467f8b5 651 __RES; \
Kojto 102:da0ca467f8b5 652 })
Kojto 102:da0ca467f8b5 653
Kojto 102:da0ca467f8b5 654
Kojto 102:da0ca467f8b5 655 /** \brief Count leading zeros
Kojto 102:da0ca467f8b5 656
Kojto 102:da0ca467f8b5 657 This function counts the number of leading zeros of a data value.
Kojto 102:da0ca467f8b5 658
Kojto 102:da0ca467f8b5 659 \param [in] value Value to count the leading zeros
Kojto 102:da0ca467f8b5 660 \return number of leading zeros in value
Kojto 102:da0ca467f8b5 661 */
Kojto 102:da0ca467f8b5 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
Kojto 102:da0ca467f8b5 663 {
Kojto 102:da0ca467f8b5 664 uint32_t result;
Kojto 102:da0ca467f8b5 665
Kojto 102:da0ca467f8b5 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
Kojto 102:da0ca467f8b5 667 return(result);
Kojto 102:da0ca467f8b5 668 }
Kojto 102:da0ca467f8b5 669
Kojto 102:da0ca467f8b5 670 #endif /* (__CORTEX_M >= 0x03) */
Kojto 102:da0ca467f8b5 671
Kojto 102:da0ca467f8b5 672
Kojto 102:da0ca467f8b5 673
Kojto 102:da0ca467f8b5 674
Kojto 102:da0ca467f8b5 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Kojto 102:da0ca467f8b5 676 /* TASKING carm specific functions */
Kojto 102:da0ca467f8b5 677
Kojto 102:da0ca467f8b5 678 /*
Kojto 102:da0ca467f8b5 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 102:da0ca467f8b5 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
Kojto 102:da0ca467f8b5 681 * Including the CMSIS ones.
Kojto 102:da0ca467f8b5 682 */
Kojto 102:da0ca467f8b5 683
Kojto 102:da0ca467f8b5 684 #endif
Kojto 102:da0ca467f8b5 685
Kojto 102:da0ca467f8b5 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
Kojto 102:da0ca467f8b5 687
Kojto 102:da0ca467f8b5 688 #endif /* __CORE_CMINSTR_H */