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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_uart.h@104:b9ad9a133dc7, 2015-08-05 (annotated)

Committer:: Kojto
Date:: Wed Aug 05 13:16:35 2015 +0100
Revision:: 104:b9ad9a133dc7
Parent:: 90:cb3d968589d8

Release 104 of the mbed library:



Changes:

- new platforms: nrf51 microbit

- MAXxxx - fix pwm array search

- LPC8xx - usart enable fix

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	90:cb3d968589d8	1	/*
Kojto	90:cb3d968589d8	2	** ###################################################################
Kojto	90:cb3d968589d8	3	** Compilers: Keil ARM C/C++ Compiler
Kojto	90:cb3d968589d8	4	** Freescale C/C++ for Embedded ARM
Kojto	90:cb3d968589d8	5	** GNU C Compiler
Kojto	90:cb3d968589d8	6	** IAR ANSI C/C++ Compiler for ARM
Kojto	90:cb3d968589d8	7	**
Kojto	90:cb3d968589d8	8	** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
Kojto	90:cb3d968589d8	9	** Version: rev. 2.5, 2014-02-10
Kojto	90:cb3d968589d8	10	** Build: b140604
Kojto	90:cb3d968589d8	11	**
Kojto	90:cb3d968589d8	12	** Abstract:
Kojto	90:cb3d968589d8	13	** Extension to the CMSIS register access layer header.
Kojto	90:cb3d968589d8	14	**
Kojto	90:cb3d968589d8	15	** Copyright (c) 2014 Freescale Semiconductor, Inc.
Kojto	90:cb3d968589d8	16	** All rights reserved.
Kojto	90:cb3d968589d8	17	**
Kojto	90:cb3d968589d8	18	** Redistribution and use in source and binary forms, with or without modification,
Kojto	90:cb3d968589d8	19	** are permitted provided that the following conditions are met:
Kojto	90:cb3d968589d8	20	**
Kojto	90:cb3d968589d8	21	** o Redistributions of source code must retain the above copyright notice, this list
Kojto	90:cb3d968589d8	22	** of conditions and the following disclaimer.
Kojto	90:cb3d968589d8	23	**
Kojto	90:cb3d968589d8	24	** o Redistributions in binary form must reproduce the above copyright notice, this
Kojto	90:cb3d968589d8	25	** list of conditions and the following disclaimer in the documentation and/or
Kojto	90:cb3d968589d8	26	** other materials provided with the distribution.
Kojto	90:cb3d968589d8	27	**
Kojto	90:cb3d968589d8	28	** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto	90:cb3d968589d8	29	** contributors may be used to endorse or promote products derived from this
Kojto	90:cb3d968589d8	30	** software without specific prior written permission.
Kojto	90:cb3d968589d8	31	**
Kojto	90:cb3d968589d8	32	** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto	90:cb3d968589d8	33	** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto	90:cb3d968589d8	34	** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	90:cb3d968589d8	35	** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto	90:cb3d968589d8	36	** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto	90:cb3d968589d8	37	** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto	90:cb3d968589d8	38	** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto	90:cb3d968589d8	39	** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto	90:cb3d968589d8	40	** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto	90:cb3d968589d8	41	** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	90:cb3d968589d8	42	**
Kojto	90:cb3d968589d8	43	** http: www.freescale.com
Kojto	90:cb3d968589d8	44	** mail: support@freescale.com
Kojto	90:cb3d968589d8	45	**
Kojto	90:cb3d968589d8	46	** Revisions:
Kojto	90:cb3d968589d8	47	** - rev. 1.0 (2013-08-12)
Kojto	90:cb3d968589d8	48	** Initial version.
Kojto	90:cb3d968589d8	49	** - rev. 2.0 (2013-10-29)
Kojto	90:cb3d968589d8	50	** Register accessor macros added to the memory map.
Kojto	90:cb3d968589d8	51	** Symbols for Processor Expert memory map compatibility added to the memory map.
Kojto	90:cb3d968589d8	52	** Startup file for gcc has been updated according to CMSIS 3.2.
Kojto	90:cb3d968589d8	53	** System initialization updated.
Kojto	90:cb3d968589d8	54	** MCG - registers updated.
Kojto	90:cb3d968589d8	55	** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
Kojto	90:cb3d968589d8	56	** - rev. 2.1 (2013-10-30)
Kojto	90:cb3d968589d8	57	** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
Kojto	90:cb3d968589d8	58	** - rev. 2.2 (2013-12-09)
Kojto	90:cb3d968589d8	59	** DMA - EARS register removed.
Kojto	90:cb3d968589d8	60	** AIPS0, AIPS1 - MPRA register updated.
Kojto	90:cb3d968589d8	61	** - rev. 2.3 (2014-01-24)
Kojto	90:cb3d968589d8	62	** Update according to reference manual rev. 2
Kojto	90:cb3d968589d8	63	** ENET, MCG, MCM, SIM, USB - registers updated
Kojto	90:cb3d968589d8	64	** - rev. 2.4 (2014-02-10)
Kojto	90:cb3d968589d8	65	** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto	90:cb3d968589d8	66	** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto	90:cb3d968589d8	67	** - rev. 2.5 (2014-02-10)
Kojto	90:cb3d968589d8	68	** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto	90:cb3d968589d8	69	** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto	90:cb3d968589d8	70	** Module access macro module_BASES replaced by module_BASE_PTRS.
Kojto	90:cb3d968589d8	71	**
Kojto	90:cb3d968589d8	72	** ###################################################################
Kojto	90:cb3d968589d8	73	*/
Kojto	90:cb3d968589d8	74
Kojto	90:cb3d968589d8	75	/*
Kojto	90:cb3d968589d8	76	* WARNING! DO NOT EDIT THIS FILE DIRECTLY!
Kojto	90:cb3d968589d8	77	*
Kojto	90:cb3d968589d8	78	* This file was generated automatically and any changes may be lost.
Kojto	90:cb3d968589d8	79	*/
Kojto	90:cb3d968589d8	80	#ifndef __HW_UART_REGISTERS_H__
Kojto	90:cb3d968589d8	81	#define __HW_UART_REGISTERS_H__
Kojto	90:cb3d968589d8	82
Kojto	90:cb3d968589d8	83	#include "MK64F12.h"
Kojto	90:cb3d968589d8	84	#include "fsl_bitaccess.h"
Kojto	90:cb3d968589d8	85
Kojto	90:cb3d968589d8	86	/*
Kojto	90:cb3d968589d8	87	* MK64F12 UART
Kojto	90:cb3d968589d8	88	*
Kojto	90:cb3d968589d8	89	* Serial Communication Interface
Kojto	90:cb3d968589d8	90	*
Kojto	90:cb3d968589d8	91	* Registers defined in this header file:
Kojto	90:cb3d968589d8	92	* - HW_UART_BDH - UART Baud Rate Registers: High
Kojto	90:cb3d968589d8	93	* - HW_UART_BDL - UART Baud Rate Registers: Low
Kojto	90:cb3d968589d8	94	* - HW_UART_C1 - UART Control Register 1
Kojto	90:cb3d968589d8	95	* - HW_UART_C2 - UART Control Register 2
Kojto	90:cb3d968589d8	96	* - HW_UART_S1 - UART Status Register 1
Kojto	90:cb3d968589d8	97	* - HW_UART_S2 - UART Status Register 2
Kojto	90:cb3d968589d8	98	* - HW_UART_C3 - UART Control Register 3
Kojto	90:cb3d968589d8	99	* - HW_UART_D - UART Data Register
Kojto	90:cb3d968589d8	100	* - HW_UART_MA1 - UART Match Address Registers 1
Kojto	90:cb3d968589d8	101	* - HW_UART_MA2 - UART Match Address Registers 2
Kojto	90:cb3d968589d8	102	* - HW_UART_C4 - UART Control Register 4
Kojto	90:cb3d968589d8	103	* - HW_UART_C5 - UART Control Register 5
Kojto	90:cb3d968589d8	104	* - HW_UART_ED - UART Extended Data Register
Kojto	90:cb3d968589d8	105	* - HW_UART_MODEM - UART Modem Register
Kojto	90:cb3d968589d8	106	* - HW_UART_IR - UART Infrared Register
Kojto	90:cb3d968589d8	107	* - HW_UART_PFIFO - UART FIFO Parameters
Kojto	90:cb3d968589d8	108	* - HW_UART_CFIFO - UART FIFO Control Register
Kojto	90:cb3d968589d8	109	* - HW_UART_SFIFO - UART FIFO Status Register
Kojto	90:cb3d968589d8	110	* - HW_UART_TWFIFO - UART FIFO Transmit Watermark
Kojto	90:cb3d968589d8	111	* - HW_UART_TCFIFO - UART FIFO Transmit Count
Kojto	90:cb3d968589d8	112	* - HW_UART_RWFIFO - UART FIFO Receive Watermark
Kojto	90:cb3d968589d8	113	* - HW_UART_RCFIFO - UART FIFO Receive Count
Kojto	90:cb3d968589d8	114	* - HW_UART_C7816 - UART 7816 Control Register
Kojto	90:cb3d968589d8	115	* - HW_UART_IE7816 - UART 7816 Interrupt Enable Register
Kojto	90:cb3d968589d8	116	* - HW_UART_IS7816 - UART 7816 Interrupt Status Register
Kojto	90:cb3d968589d8	117	* - HW_UART_WP7816T0 - UART 7816 Wait Parameter Register
Kojto	90:cb3d968589d8	118	* - HW_UART_WP7816T1 - UART 7816 Wait Parameter Register
Kojto	90:cb3d968589d8	119	* - HW_UART_WN7816 - UART 7816 Wait N Register
Kojto	90:cb3d968589d8	120	* - HW_UART_WF7816 - UART 7816 Wait FD Register
Kojto	90:cb3d968589d8	121	* - HW_UART_ET7816 - UART 7816 Error Threshold Register
Kojto	90:cb3d968589d8	122	* - HW_UART_TL7816 - UART 7816 Transmit Length Register
Kojto	90:cb3d968589d8	123	*
Kojto	90:cb3d968589d8	124	* - hw_uart_t - Struct containing all module registers.
Kojto	90:cb3d968589d8	125	*/
Kojto	90:cb3d968589d8	126
Kojto	90:cb3d968589d8	127	#define HW_UART_INSTANCE_COUNT (6U) /!< Number of instances of the UART module. /
Kojto	90:cb3d968589d8	128	#define HW_UART0 (0U) /!< Instance number for UART0. /
Kojto	90:cb3d968589d8	129	#define HW_UART1 (1U) /!< Instance number for UART1. /
Kojto	90:cb3d968589d8	130	#define HW_UART2 (2U) /!< Instance number for UART2. /
Kojto	90:cb3d968589d8	131	#define HW_UART3 (3U) /!< Instance number for UART3. /
Kojto	90:cb3d968589d8	132	#define HW_UART4 (4U) /!< Instance number for UART4. /
Kojto	90:cb3d968589d8	133	#define HW_UART5 (5U) /!< Instance number for UART5. /
Kojto	90:cb3d968589d8	134
Kojto	90:cb3d968589d8	135	/*******************************************************************************
Kojto	90:cb3d968589d8	136	* HW_UART_BDH - UART Baud Rate Registers: High
Kojto	90:cb3d968589d8	137	******************************************************************************/
Kojto	90:cb3d968589d8	138
Kojto	90:cb3d968589d8	139	/*!
Kojto	90:cb3d968589d8	140	* @brief HW_UART_BDH - UART Baud Rate Registers: High (RW)
Kojto	90:cb3d968589d8	141	*
Kojto	90:cb3d968589d8	142	* Reset value: 0x00U
Kojto	90:cb3d968589d8	143	*
Kojto	90:cb3d968589d8	144	* This register, along with the BDL register, controls the prescale divisor for
Kojto	90:cb3d968589d8	145	* UART baud rate generation. To update the 13-bit baud rate setting
Kojto	90:cb3d968589d8	146	* (SBR[12:0]), first write to BDH to buffer the high half of the new value and then write
Kojto	90:cb3d968589d8	147	* to BDL. The working value in BDH does not change until BDL is written. BDL is
Kojto	90:cb3d968589d8	148	* reset to a nonzero value, but after reset, the baud rate generator remains
Kojto	90:cb3d968589d8	149	* disabled until the first time the receiver or transmitter is enabled, that is,
Kojto	90:cb3d968589d8	150	* when C2[RE] or C2[TE] is set.
Kojto	90:cb3d968589d8	151	*/
Kojto	90:cb3d968589d8	152	typedef union _hw_uart_bdh
Kojto	90:cb3d968589d8	153	{
Kojto	90:cb3d968589d8	154	uint8_t U;
Kojto	90:cb3d968589d8	155	struct _hw_uart_bdh_bitfields
Kojto	90:cb3d968589d8	156	{
Kojto	90:cb3d968589d8	157	uint8_t SBR : 5; /!< [4:0] UART Baud Rate Bits /
Kojto	90:cb3d968589d8	158	uint8_t SBNS : 1; /!< [5] Stop Bit Number Select /
Kojto	90:cb3d968589d8	159	uint8_t RXEDGIE : 1; /*!< [6] RxD Input Active Edge Interrupt Enable
Kojto	90:cb3d968589d8	160	* */
Kojto	90:cb3d968589d8	161	uint8_t LBKDIE : 1; /*!< [7] LIN Break Detect Interrupt or DMA
Kojto	90:cb3d968589d8	162	* Request Enable */
Kojto	90:cb3d968589d8	163	} B;
Kojto	90:cb3d968589d8	164	} hw_uart_bdh_t;
Kojto	90:cb3d968589d8	165
Kojto	90:cb3d968589d8	166	/*!
Kojto	90:cb3d968589d8	167	* @name Constants and macros for entire UART_BDH register
Kojto	90:cb3d968589d8	168	*/
Kojto	90:cb3d968589d8	169	/@{/
Kojto	90:cb3d968589d8	170	#define HW_UART_BDH_ADDR(x) ((x) + 0x0U)
Kojto	90:cb3d968589d8	171
Kojto	90:cb3d968589d8	172	#define HW_UART_BDH(x) ((__IO hw_uart_bdh_t ) HW_UART_BDH_ADDR(x))
Kojto	90:cb3d968589d8	173	#define HW_UART_BDH_RD(x) (HW_UART_BDH(x).U)
Kojto	90:cb3d968589d8	174	#define HW_UART_BDH_WR(x, v) (HW_UART_BDH(x).U = (v))
Kojto	90:cb3d968589d8	175	#define HW_UART_BDH_SET(x, v) (HW_UART_BDH_WR(x, HW_UART_BDH_RD(x) \| (v)))
Kojto	90:cb3d968589d8	176	#define HW_UART_BDH_CLR(x, v) (HW_UART_BDH_WR(x, HW_UART_BDH_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	177	#define HW_UART_BDH_TOG(x, v) (HW_UART_BDH_WR(x, HW_UART_BDH_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	178	/@}/
Kojto	90:cb3d968589d8	179
Kojto	90:cb3d968589d8	180	/*
Kojto	90:cb3d968589d8	181	* Constants & macros for individual UART_BDH bitfields
Kojto	90:cb3d968589d8	182	*/
Kojto	90:cb3d968589d8	183
Kojto	90:cb3d968589d8	184	/*!
Kojto	90:cb3d968589d8	185	* @name Register UART_BDH, field SBR[4:0] (RW)
Kojto	90:cb3d968589d8	186	*
Kojto	90:cb3d968589d8	187	* The baud rate for the UART is determined by the 13 SBR fields. See Baud rate
Kojto	90:cb3d968589d8	188	* generation for details. The baud rate generator is disabled until C2[TE] or
Kojto	90:cb3d968589d8	189	* C2[RE] is set for the first time after reset.The baud rate generator is disabled
Kojto	90:cb3d968589d8	190	* when SBR = 0. Writing to BDH has no effect without writing to BDL, because
Kojto	90:cb3d968589d8	191	* writing to BDH puts the data in a temporary location until BDL is written.
Kojto	90:cb3d968589d8	192	*/
Kojto	90:cb3d968589d8	193	/@{/
Kojto	90:cb3d968589d8	194	#define BP_UART_BDH_SBR (0U) /!< Bit position for UART_BDH_SBR. /
Kojto	90:cb3d968589d8	195	#define BM_UART_BDH_SBR (0x1FU) /!< Bit mask for UART_BDH_SBR. /
Kojto	90:cb3d968589d8	196	#define BS_UART_BDH_SBR (5U) /!< Bit field size in bits for UART_BDH_SBR. /
Kojto	90:cb3d968589d8	197
Kojto	90:cb3d968589d8	198	/! @brief Read current value of the UART_BDH_SBR field. /
Kojto	90:cb3d968589d8	199	#define BR_UART_BDH_SBR(x) (HW_UART_BDH(x).B.SBR)
Kojto	90:cb3d968589d8	200
Kojto	90:cb3d968589d8	201	/! @brief Format value for bitfield UART_BDH_SBR. /
Kojto	90:cb3d968589d8	202	#define BF_UART_BDH_SBR(v) ((uint8_t)((uint8_t)(v) << BP_UART_BDH_SBR) & BM_UART_BDH_SBR)
Kojto	90:cb3d968589d8	203
Kojto	90:cb3d968589d8	204	/! @brief Set the SBR field to a new value. /
Kojto	90:cb3d968589d8	205	#define BW_UART_BDH_SBR(x, v) (HW_UART_BDH_WR(x, (HW_UART_BDH_RD(x) & ~BM_UART_BDH_SBR) \| BF_UART_BDH_SBR(v)))
Kojto	90:cb3d968589d8	206	/@}/
Kojto	90:cb3d968589d8	207
Kojto	90:cb3d968589d8	208	/*!
Kojto	90:cb3d968589d8	209	* @name Register UART_BDH, field SBNS[5] (RW)
Kojto	90:cb3d968589d8	210	*
Kojto	90:cb3d968589d8	211	* SBNS selects the number of stop bits present in a data frame. This field
Kojto	90:cb3d968589d8	212	* valid for all 8, 9 and 10 bit data formats available. This field is not valid when
Kojto	90:cb3d968589d8	213	* C7816[ISO7816E] is enabled.
Kojto	90:cb3d968589d8	214	*
Kojto	90:cb3d968589d8	215	* Values:
Kojto	90:cb3d968589d8	216	* - 0 - Data frame consists of a single stop bit.
Kojto	90:cb3d968589d8	217	* - 1 - Data frame consists of two stop bits.
Kojto	90:cb3d968589d8	218	*/
Kojto	90:cb3d968589d8	219	/@{/
Kojto	90:cb3d968589d8	220	#define BP_UART_BDH_SBNS (5U) /!< Bit position for UART_BDH_SBNS. /
Kojto	90:cb3d968589d8	221	#define BM_UART_BDH_SBNS (0x20U) /!< Bit mask for UART_BDH_SBNS. /
Kojto	90:cb3d968589d8	222	#define BS_UART_BDH_SBNS (1U) /!< Bit field size in bits for UART_BDH_SBNS. /
Kojto	90:cb3d968589d8	223
Kojto	90:cb3d968589d8	224	/! @brief Read current value of the UART_BDH_SBNS field. /
Kojto	90:cb3d968589d8	225	#define BR_UART_BDH_SBNS(x) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_SBNS))
Kojto	90:cb3d968589d8	226
Kojto	90:cb3d968589d8	227	/! @brief Format value for bitfield UART_BDH_SBNS. /
Kojto	90:cb3d968589d8	228	#define BF_UART_BDH_SBNS(v) ((uint8_t)((uint8_t)(v) << BP_UART_BDH_SBNS) & BM_UART_BDH_SBNS)
Kojto	90:cb3d968589d8	229
Kojto	90:cb3d968589d8	230	/! @brief Set the SBNS field to a new value. /
Kojto	90:cb3d968589d8	231	#define BW_UART_BDH_SBNS(x, v) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_SBNS) = (v))
Kojto	90:cb3d968589d8	232	/@}/
Kojto	90:cb3d968589d8	233
Kojto	90:cb3d968589d8	234	/*!
Kojto	90:cb3d968589d8	235	* @name Register UART_BDH, field RXEDGIE[6] (RW)
Kojto	90:cb3d968589d8	236	*
Kojto	90:cb3d968589d8	237	* Enables the receive input active edge, RXEDGIF, to generate interrupt
Kojto	90:cb3d968589d8	238	* requests.
Kojto	90:cb3d968589d8	239	*
Kojto	90:cb3d968589d8	240	* Values:
Kojto	90:cb3d968589d8	241	* - 0 - Hardware interrupts from RXEDGIF disabled using polling.
Kojto	90:cb3d968589d8	242	* - 1 - RXEDGIF interrupt request enabled.
Kojto	90:cb3d968589d8	243	*/
Kojto	90:cb3d968589d8	244	/@{/
Kojto	90:cb3d968589d8	245	#define BP_UART_BDH_RXEDGIE (6U) /!< Bit position for UART_BDH_RXEDGIE. /
Kojto	90:cb3d968589d8	246	#define BM_UART_BDH_RXEDGIE (0x40U) /!< Bit mask for UART_BDH_RXEDGIE. /
Kojto	90:cb3d968589d8	247	#define BS_UART_BDH_RXEDGIE (1U) /!< Bit field size in bits for UART_BDH_RXEDGIE. /
Kojto	90:cb3d968589d8	248
Kojto	90:cb3d968589d8	249	/! @brief Read current value of the UART_BDH_RXEDGIE field. /
Kojto	90:cb3d968589d8	250	#define BR_UART_BDH_RXEDGIE(x) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_RXEDGIE))
Kojto	90:cb3d968589d8	251
Kojto	90:cb3d968589d8	252	/! @brief Format value for bitfield UART_BDH_RXEDGIE. /
Kojto	90:cb3d968589d8	253	#define BF_UART_BDH_RXEDGIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_BDH_RXEDGIE) & BM_UART_BDH_RXEDGIE)
Kojto	90:cb3d968589d8	254
Kojto	90:cb3d968589d8	255	/! @brief Set the RXEDGIE field to a new value. /
Kojto	90:cb3d968589d8	256	#define BW_UART_BDH_RXEDGIE(x, v) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_RXEDGIE) = (v))
Kojto	90:cb3d968589d8	257	/@}/
Kojto	90:cb3d968589d8	258
Kojto	90:cb3d968589d8	259	/*!
Kojto	90:cb3d968589d8	260	* @name Register UART_BDH, field LBKDIE[7] (RW)
Kojto	90:cb3d968589d8	261	*
Kojto	90:cb3d968589d8	262	* Enables the LIN break detect flag, LBKDIF, to generate interrupt requests
Kojto	90:cb3d968589d8	263	* based on the state of LBKDDMAS. or DMA transfer requests,
Kojto	90:cb3d968589d8	264	*
Kojto	90:cb3d968589d8	265	* Values:
Kojto	90:cb3d968589d8	266	* - 0 - LBKDIF interrupt and DMA transfer requests disabled.
Kojto	90:cb3d968589d8	267	* - 1 - LBKDIF interrupt or DMA transfer requests enabled.
Kojto	90:cb3d968589d8	268	*/
Kojto	90:cb3d968589d8	269	/@{/
Kojto	90:cb3d968589d8	270	#define BP_UART_BDH_LBKDIE (7U) /!< Bit position for UART_BDH_LBKDIE. /
Kojto	90:cb3d968589d8	271	#define BM_UART_BDH_LBKDIE (0x80U) /!< Bit mask for UART_BDH_LBKDIE. /
Kojto	90:cb3d968589d8	272	#define BS_UART_BDH_LBKDIE (1U) /!< Bit field size in bits for UART_BDH_LBKDIE. /
Kojto	90:cb3d968589d8	273
Kojto	90:cb3d968589d8	274	/! @brief Read current value of the UART_BDH_LBKDIE field. /
Kojto	90:cb3d968589d8	275	#define BR_UART_BDH_LBKDIE(x) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_LBKDIE))
Kojto	90:cb3d968589d8	276
Kojto	90:cb3d968589d8	277	/! @brief Format value for bitfield UART_BDH_LBKDIE. /
Kojto	90:cb3d968589d8	278	#define BF_UART_BDH_LBKDIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_BDH_LBKDIE) & BM_UART_BDH_LBKDIE)
Kojto	90:cb3d968589d8	279
Kojto	90:cb3d968589d8	280	/! @brief Set the LBKDIE field to a new value. /
Kojto	90:cb3d968589d8	281	#define BW_UART_BDH_LBKDIE(x, v) (BITBAND_ACCESS8(HW_UART_BDH_ADDR(x), BP_UART_BDH_LBKDIE) = (v))
Kojto	90:cb3d968589d8	282	/@}/
Kojto	90:cb3d968589d8	283
Kojto	90:cb3d968589d8	284	/*******************************************************************************
Kojto	90:cb3d968589d8	285	* HW_UART_BDL - UART Baud Rate Registers: Low
Kojto	90:cb3d968589d8	286	******************************************************************************/
Kojto	90:cb3d968589d8	287
Kojto	90:cb3d968589d8	288	/*!
Kojto	90:cb3d968589d8	289	* @brief HW_UART_BDL - UART Baud Rate Registers: Low (RW)
Kojto	90:cb3d968589d8	290	*
Kojto	90:cb3d968589d8	291	* Reset value: 0x04U
Kojto	90:cb3d968589d8	292	*
Kojto	90:cb3d968589d8	293	* This register, along with the BDH register, controls the prescale divisor for
Kojto	90:cb3d968589d8	294	* UART baud rate generation. To update the 13-bit baud rate setting, SBR[12:0],
Kojto	90:cb3d968589d8	295	* first write to BDH to buffer the high half of the new value and then write to
Kojto	90:cb3d968589d8	296	* BDL. The working value in BDH does not change until BDL is written. BDL is
Kojto	90:cb3d968589d8	297	* reset to a nonzero value, but after reset, the baud rate generator remains
Kojto	90:cb3d968589d8	298	* disabled until the first time the receiver or transmitter is enabled, that is, when
Kojto	90:cb3d968589d8	299	* C2[RE] or C2[TE] is set.
Kojto	90:cb3d968589d8	300	*/
Kojto	90:cb3d968589d8	301	typedef union _hw_uart_bdl
Kojto	90:cb3d968589d8	302	{
Kojto	90:cb3d968589d8	303	uint8_t U;
Kojto	90:cb3d968589d8	304	struct _hw_uart_bdl_bitfields
Kojto	90:cb3d968589d8	305	{
Kojto	90:cb3d968589d8	306	uint8_t SBR : 8; /!< [7:0] UART Baud Rate Bits /
Kojto	90:cb3d968589d8	307	} B;
Kojto	90:cb3d968589d8	308	} hw_uart_bdl_t;
Kojto	90:cb3d968589d8	309
Kojto	90:cb3d968589d8	310	/*!
Kojto	90:cb3d968589d8	311	* @name Constants and macros for entire UART_BDL register
Kojto	90:cb3d968589d8	312	*/
Kojto	90:cb3d968589d8	313	/@{/
Kojto	90:cb3d968589d8	314	#define HW_UART_BDL_ADDR(x) ((x) + 0x1U)
Kojto	90:cb3d968589d8	315
Kojto	90:cb3d968589d8	316	#define HW_UART_BDL(x) ((__IO hw_uart_bdl_t ) HW_UART_BDL_ADDR(x))
Kojto	90:cb3d968589d8	317	#define HW_UART_BDL_RD(x) (HW_UART_BDL(x).U)
Kojto	90:cb3d968589d8	318	#define HW_UART_BDL_WR(x, v) (HW_UART_BDL(x).U = (v))
Kojto	90:cb3d968589d8	319	#define HW_UART_BDL_SET(x, v) (HW_UART_BDL_WR(x, HW_UART_BDL_RD(x) \| (v)))
Kojto	90:cb3d968589d8	320	#define HW_UART_BDL_CLR(x, v) (HW_UART_BDL_WR(x, HW_UART_BDL_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	321	#define HW_UART_BDL_TOG(x, v) (HW_UART_BDL_WR(x, HW_UART_BDL_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	322	/@}/
Kojto	90:cb3d968589d8	323
Kojto	90:cb3d968589d8	324	/*
Kojto	90:cb3d968589d8	325	* Constants & macros for individual UART_BDL bitfields
Kojto	90:cb3d968589d8	326	*/
Kojto	90:cb3d968589d8	327
Kojto	90:cb3d968589d8	328	/*!
Kojto	90:cb3d968589d8	329	* @name Register UART_BDL, field SBR[7:0] (RW)
Kojto	90:cb3d968589d8	330	*
Kojto	90:cb3d968589d8	331	* The baud rate for the UART is determined by the 13 SBR fields. See Baud rate
Kojto	90:cb3d968589d8	332	* generation for details. The baud rate generator is disabled until C2[TE] or
Kojto	90:cb3d968589d8	333	* C2[RE] is set for the first time after reset.The baud rate generator is disabled
Kojto	90:cb3d968589d8	334	* when SBR = 0. Writing to BDH has no effect without writing to BDL, because
Kojto	90:cb3d968589d8	335	* writing to BDH puts the data in a temporary location until BDL is written. When
Kojto	90:cb3d968589d8	336	* the 1/32 narrow pulse width is selected for infrared (IrDA), the baud rate
Kojto	90:cb3d968589d8	337	* fields must be even, the least significant bit is 0. See MODEM register for more
Kojto	90:cb3d968589d8	338	* details.
Kojto	90:cb3d968589d8	339	*/
Kojto	90:cb3d968589d8	340	/@{/
Kojto	90:cb3d968589d8	341	#define BP_UART_BDL_SBR (0U) /!< Bit position for UART_BDL_SBR. /
Kojto	90:cb3d968589d8	342	#define BM_UART_BDL_SBR (0xFFU) /!< Bit mask for UART_BDL_SBR. /
Kojto	90:cb3d968589d8	343	#define BS_UART_BDL_SBR (8U) /!< Bit field size in bits for UART_BDL_SBR. /
Kojto	90:cb3d968589d8	344
Kojto	90:cb3d968589d8	345	/! @brief Read current value of the UART_BDL_SBR field. /
Kojto	90:cb3d968589d8	346	#define BR_UART_BDL_SBR(x) (HW_UART_BDL(x).U)
Kojto	90:cb3d968589d8	347
Kojto	90:cb3d968589d8	348	/! @brief Format value for bitfield UART_BDL_SBR. /
Kojto	90:cb3d968589d8	349	#define BF_UART_BDL_SBR(v) ((uint8_t)((uint8_t)(v) << BP_UART_BDL_SBR) & BM_UART_BDL_SBR)
Kojto	90:cb3d968589d8	350
Kojto	90:cb3d968589d8	351	/! @brief Set the SBR field to a new value. /
Kojto	90:cb3d968589d8	352	#define BW_UART_BDL_SBR(x, v) (HW_UART_BDL_WR(x, v))
Kojto	90:cb3d968589d8	353	/@}/
Kojto	90:cb3d968589d8	354
Kojto	90:cb3d968589d8	355	/*******************************************************************************
Kojto	90:cb3d968589d8	356	* HW_UART_C1 - UART Control Register 1
Kojto	90:cb3d968589d8	357	******************************************************************************/
Kojto	90:cb3d968589d8	358
Kojto	90:cb3d968589d8	359	/*!
Kojto	90:cb3d968589d8	360	* @brief HW_UART_C1 - UART Control Register 1 (RW)
Kojto	90:cb3d968589d8	361	*
Kojto	90:cb3d968589d8	362	* Reset value: 0x00U
Kojto	90:cb3d968589d8	363	*
Kojto	90:cb3d968589d8	364	* This read/write register controls various optional features of the UART
Kojto	90:cb3d968589d8	365	* system.
Kojto	90:cb3d968589d8	366	*/
Kojto	90:cb3d968589d8	367	typedef union _hw_uart_c1
Kojto	90:cb3d968589d8	368	{
Kojto	90:cb3d968589d8	369	uint8_t U;
Kojto	90:cb3d968589d8	370	struct _hw_uart_c1_bitfields
Kojto	90:cb3d968589d8	371	{
Kojto	90:cb3d968589d8	372	uint8_t PT : 1; /!< [0] Parity Type /
Kojto	90:cb3d968589d8	373	uint8_t PE : 1; /!< [1] Parity Enable /
Kojto	90:cb3d968589d8	374	uint8_t ILT : 1; /!< [2] Idle Line Type Select /
Kojto	90:cb3d968589d8	375	uint8_t WAKE : 1; /!< [3] Receiver Wakeup Method Select /
Kojto	90:cb3d968589d8	376	uint8_t M : 1; /!< [4] 9-bit or 8-bit Mode Select /
Kojto	90:cb3d968589d8	377	uint8_t RSRC : 1; /!< [5] Receiver Source Select /
Kojto	90:cb3d968589d8	378	uint8_t UARTSWAI : 1; /!< [6] UART Stops in Wait Mode /
Kojto	90:cb3d968589d8	379	uint8_t LOOPS : 1; /!< [7] Loop Mode Select /
Kojto	90:cb3d968589d8	380	} B;
Kojto	90:cb3d968589d8	381	} hw_uart_c1_t;
Kojto	90:cb3d968589d8	382
Kojto	90:cb3d968589d8	383	/*!
Kojto	90:cb3d968589d8	384	* @name Constants and macros for entire UART_C1 register
Kojto	90:cb3d968589d8	385	*/
Kojto	90:cb3d968589d8	386	/@{/
Kojto	90:cb3d968589d8	387	#define HW_UART_C1_ADDR(x) ((x) + 0x2U)
Kojto	90:cb3d968589d8	388
Kojto	90:cb3d968589d8	389	#define HW_UART_C1(x) ((__IO hw_uart_c1_t ) HW_UART_C1_ADDR(x))
Kojto	90:cb3d968589d8	390	#define HW_UART_C1_RD(x) (HW_UART_C1(x).U)
Kojto	90:cb3d968589d8	391	#define HW_UART_C1_WR(x, v) (HW_UART_C1(x).U = (v))
Kojto	90:cb3d968589d8	392	#define HW_UART_C1_SET(x, v) (HW_UART_C1_WR(x, HW_UART_C1_RD(x) \| (v)))
Kojto	90:cb3d968589d8	393	#define HW_UART_C1_CLR(x, v) (HW_UART_C1_WR(x, HW_UART_C1_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	394	#define HW_UART_C1_TOG(x, v) (HW_UART_C1_WR(x, HW_UART_C1_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	395	/@}/
Kojto	90:cb3d968589d8	396
Kojto	90:cb3d968589d8	397	/*
Kojto	90:cb3d968589d8	398	* Constants & macros for individual UART_C1 bitfields
Kojto	90:cb3d968589d8	399	*/
Kojto	90:cb3d968589d8	400
Kojto	90:cb3d968589d8	401	/*!
Kojto	90:cb3d968589d8	402	* @name Register UART_C1, field PT[0] (RW)
Kojto	90:cb3d968589d8	403	*
Kojto	90:cb3d968589d8	404	* Determines whether the UART generates and checks for even parity or odd
Kojto	90:cb3d968589d8	405	* parity. With even parity, an even number of 1s clears the parity bit and an odd
Kojto	90:cb3d968589d8	406	* number of 1s sets the parity bit. With odd parity, an odd number of 1s clears the
Kojto	90:cb3d968589d8	407	* parity bit and an even number of 1s sets the parity bit. This field must be
Kojto	90:cb3d968589d8	408	* cleared when C7816[ISO_7816E] is set/enabled.
Kojto	90:cb3d968589d8	409	*
Kojto	90:cb3d968589d8	410	* Values:
Kojto	90:cb3d968589d8	411	* - 0 - Even parity.
Kojto	90:cb3d968589d8	412	* - 1 - Odd parity.
Kojto	90:cb3d968589d8	413	*/
Kojto	90:cb3d968589d8	414	/@{/
Kojto	90:cb3d968589d8	415	#define BP_UART_C1_PT (0U) /!< Bit position for UART_C1_PT. /
Kojto	90:cb3d968589d8	416	#define BM_UART_C1_PT (0x01U) /!< Bit mask for UART_C1_PT. /
Kojto	90:cb3d968589d8	417	#define BS_UART_C1_PT (1U) /!< Bit field size in bits for UART_C1_PT. /
Kojto	90:cb3d968589d8	418
Kojto	90:cb3d968589d8	419	/! @brief Read current value of the UART_C1_PT field. /
Kojto	90:cb3d968589d8	420	#define BR_UART_C1_PT(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PT))
Kojto	90:cb3d968589d8	421
Kojto	90:cb3d968589d8	422	/! @brief Format value for bitfield UART_C1_PT. /
Kojto	90:cb3d968589d8	423	#define BF_UART_C1_PT(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_PT) & BM_UART_C1_PT)
Kojto	90:cb3d968589d8	424
Kojto	90:cb3d968589d8	425	/! @brief Set the PT field to a new value. /
Kojto	90:cb3d968589d8	426	#define BW_UART_C1_PT(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PT) = (v))
Kojto	90:cb3d968589d8	427	/@}/
Kojto	90:cb3d968589d8	428
Kojto	90:cb3d968589d8	429	/*!
Kojto	90:cb3d968589d8	430	* @name Register UART_C1, field PE[1] (RW)
Kojto	90:cb3d968589d8	431	*
Kojto	90:cb3d968589d8	432	* Enables the parity function. When parity is enabled, parity function inserts
Kojto	90:cb3d968589d8	433	* a parity bit in the bit position immediately preceding the stop bit. This
Kojto	90:cb3d968589d8	434	* field must be set when C7816[ISO_7816E] is set/enabled.
Kojto	90:cb3d968589d8	435	*
Kojto	90:cb3d968589d8	436	* Values:
Kojto	90:cb3d968589d8	437	* - 0 - Parity function disabled.
Kojto	90:cb3d968589d8	438	* - 1 - Parity function enabled.
Kojto	90:cb3d968589d8	439	*/
Kojto	90:cb3d968589d8	440	/@{/
Kojto	90:cb3d968589d8	441	#define BP_UART_C1_PE (1U) /!< Bit position for UART_C1_PE. /
Kojto	90:cb3d968589d8	442	#define BM_UART_C1_PE (0x02U) /!< Bit mask for UART_C1_PE. /
Kojto	90:cb3d968589d8	443	#define BS_UART_C1_PE (1U) /!< Bit field size in bits for UART_C1_PE. /
Kojto	90:cb3d968589d8	444
Kojto	90:cb3d968589d8	445	/! @brief Read current value of the UART_C1_PE field. /
Kojto	90:cb3d968589d8	446	#define BR_UART_C1_PE(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PE))
Kojto	90:cb3d968589d8	447
Kojto	90:cb3d968589d8	448	/! @brief Format value for bitfield UART_C1_PE. /
Kojto	90:cb3d968589d8	449	#define BF_UART_C1_PE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_PE) & BM_UART_C1_PE)
Kojto	90:cb3d968589d8	450
Kojto	90:cb3d968589d8	451	/! @brief Set the PE field to a new value. /
Kojto	90:cb3d968589d8	452	#define BW_UART_C1_PE(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_PE) = (v))
Kojto	90:cb3d968589d8	453	/@}/
Kojto	90:cb3d968589d8	454
Kojto	90:cb3d968589d8	455	/*!
Kojto	90:cb3d968589d8	456	* @name Register UART_C1, field ILT[2] (RW)
Kojto	90:cb3d968589d8	457	*
Kojto	90:cb3d968589d8	458	* Determines when the receiver starts counting logic 1s as idle character bits.
Kojto	90:cb3d968589d8	459	* The count begins either after a valid start bit or after the stop bit. If the
Kojto	90:cb3d968589d8	460	* count begins after the start bit, then a string of logic 1s preceding the
Kojto	90:cb3d968589d8	461	* stop bit can cause false recognition of an idle character. Beginning the count
Kojto	90:cb3d968589d8	462	* after the stop bit avoids false idle character recognition, but requires
Kojto	90:cb3d968589d8	463	* properly synchronized transmissions. In case the UART is programmed with ILT = 1, a
Kojto	90:cb3d968589d8	464	* logic of 1'b0 is automatically shifted after a received stop bit, therefore
Kojto	90:cb3d968589d8	465	* resetting the idle count. In case the UART is programmed for IDLE line wakeup
Kojto	90:cb3d968589d8	466	* (RWU = 1 and WAKE = 0), ILT has no effect on when the receiver starts counting
Kojto	90:cb3d968589d8	467	* logic 1s as idle character bits. In idle line wakeup, an idle character is
Kojto	90:cb3d968589d8	468	* recognized at anytime the receiver sees 10, 11, or 12 1s depending on the M, PE,
Kojto	90:cb3d968589d8	469	* and C4[M10] fields.
Kojto	90:cb3d968589d8	470	*
Kojto	90:cb3d968589d8	471	* Values:
Kojto	90:cb3d968589d8	472	* - 0 - Idle character bit count starts after start bit.
Kojto	90:cb3d968589d8	473	* - 1 - Idle character bit count starts after stop bit.
Kojto	90:cb3d968589d8	474	*/
Kojto	90:cb3d968589d8	475	/@{/
Kojto	90:cb3d968589d8	476	#define BP_UART_C1_ILT (2U) /!< Bit position for UART_C1_ILT. /
Kojto	90:cb3d968589d8	477	#define BM_UART_C1_ILT (0x04U) /!< Bit mask for UART_C1_ILT. /
Kojto	90:cb3d968589d8	478	#define BS_UART_C1_ILT (1U) /!< Bit field size in bits for UART_C1_ILT. /
Kojto	90:cb3d968589d8	479
Kojto	90:cb3d968589d8	480	/! @brief Read current value of the UART_C1_ILT field. /
Kojto	90:cb3d968589d8	481	#define BR_UART_C1_ILT(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_ILT))
Kojto	90:cb3d968589d8	482
Kojto	90:cb3d968589d8	483	/! @brief Format value for bitfield UART_C1_ILT. /
Kojto	90:cb3d968589d8	484	#define BF_UART_C1_ILT(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_ILT) & BM_UART_C1_ILT)
Kojto	90:cb3d968589d8	485
Kojto	90:cb3d968589d8	486	/! @brief Set the ILT field to a new value. /
Kojto	90:cb3d968589d8	487	#define BW_UART_C1_ILT(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_ILT) = (v))
Kojto	90:cb3d968589d8	488	/@}/
Kojto	90:cb3d968589d8	489
Kojto	90:cb3d968589d8	490	/*!
Kojto	90:cb3d968589d8	491	* @name Register UART_C1, field WAKE[3] (RW)
Kojto	90:cb3d968589d8	492	*
Kojto	90:cb3d968589d8	493	* Determines which condition wakes the UART: Address mark in the most
Kojto	90:cb3d968589d8	494	* significant bit position of a received data character, or An idle condition on the
Kojto	90:cb3d968589d8	495	* receive pin input signal.
Kojto	90:cb3d968589d8	496	*
Kojto	90:cb3d968589d8	497	* Values:
Kojto	90:cb3d968589d8	498	* - 0 - Idle line wakeup.
Kojto	90:cb3d968589d8	499	* - 1 - Address mark wakeup.
Kojto	90:cb3d968589d8	500	*/
Kojto	90:cb3d968589d8	501	/@{/
Kojto	90:cb3d968589d8	502	#define BP_UART_C1_WAKE (3U) /!< Bit position for UART_C1_WAKE. /
Kojto	90:cb3d968589d8	503	#define BM_UART_C1_WAKE (0x08U) /!< Bit mask for UART_C1_WAKE. /
Kojto	90:cb3d968589d8	504	#define BS_UART_C1_WAKE (1U) /!< Bit field size in bits for UART_C1_WAKE. /
Kojto	90:cb3d968589d8	505
Kojto	90:cb3d968589d8	506	/! @brief Read current value of the UART_C1_WAKE field. /
Kojto	90:cb3d968589d8	507	#define BR_UART_C1_WAKE(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_WAKE))
Kojto	90:cb3d968589d8	508
Kojto	90:cb3d968589d8	509	/! @brief Format value for bitfield UART_C1_WAKE. /
Kojto	90:cb3d968589d8	510	#define BF_UART_C1_WAKE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_WAKE) & BM_UART_C1_WAKE)
Kojto	90:cb3d968589d8	511
Kojto	90:cb3d968589d8	512	/! @brief Set the WAKE field to a new value. /
Kojto	90:cb3d968589d8	513	#define BW_UART_C1_WAKE(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_WAKE) = (v))
Kojto	90:cb3d968589d8	514	/@}/
Kojto	90:cb3d968589d8	515
Kojto	90:cb3d968589d8	516	/*!
Kojto	90:cb3d968589d8	517	* @name Register UART_C1, field M[4] (RW)
Kojto	90:cb3d968589d8	518	*
Kojto	90:cb3d968589d8	519	* This field must be set when C7816[ISO_7816E] is set/enabled.
Kojto	90:cb3d968589d8	520	*
Kojto	90:cb3d968589d8	521	* Values:
Kojto	90:cb3d968589d8	522	* - 0 - Normal-start + 8 data bits (MSB/LSB first as determined by MSBF) + stop.
Kojto	90:cb3d968589d8	523	* - 1 - Use-start + 9 data bits (MSB/LSB first as determined by MSBF) + stop.
Kojto	90:cb3d968589d8	524	*/
Kojto	90:cb3d968589d8	525	/@{/
Kojto	90:cb3d968589d8	526	#define BP_UART_C1_M (4U) /!< Bit position for UART_C1_M. /
Kojto	90:cb3d968589d8	527	#define BM_UART_C1_M (0x10U) /!< Bit mask for UART_C1_M. /
Kojto	90:cb3d968589d8	528	#define BS_UART_C1_M (1U) /!< Bit field size in bits for UART_C1_M. /
Kojto	90:cb3d968589d8	529
Kojto	90:cb3d968589d8	530	/! @brief Read current value of the UART_C1_M field. /
Kojto	90:cb3d968589d8	531	#define BR_UART_C1_M(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_M))
Kojto	90:cb3d968589d8	532
Kojto	90:cb3d968589d8	533	/! @brief Format value for bitfield UART_C1_M. /
Kojto	90:cb3d968589d8	534	#define BF_UART_C1_M(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_M) & BM_UART_C1_M)
Kojto	90:cb3d968589d8	535
Kojto	90:cb3d968589d8	536	/! @brief Set the M field to a new value. /
Kojto	90:cb3d968589d8	537	#define BW_UART_C1_M(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_M) = (v))
Kojto	90:cb3d968589d8	538	/@}/
Kojto	90:cb3d968589d8	539
Kojto	90:cb3d968589d8	540	/*!
Kojto	90:cb3d968589d8	541	* @name Register UART_C1, field RSRC[5] (RW)
Kojto	90:cb3d968589d8	542	*
Kojto	90:cb3d968589d8	543	* This field has no meaning or effect unless the LOOPS field is set. When LOOPS
Kojto	90:cb3d968589d8	544	* is set, the RSRC field determines the source for the receiver shift register
Kojto	90:cb3d968589d8	545	* input.
Kojto	90:cb3d968589d8	546	*
Kojto	90:cb3d968589d8	547	* Values:
Kojto	90:cb3d968589d8	548	* - 0 - Selects internal loop back mode. The receiver input is internally
Kojto	90:cb3d968589d8	549	* connected to transmitter output.
Kojto	90:cb3d968589d8	550	* - 1 - Single wire UART mode where the receiver input is connected to the
Kojto	90:cb3d968589d8	551	* transmit pin input signal.
Kojto	90:cb3d968589d8	552	*/
Kojto	90:cb3d968589d8	553	/@{/
Kojto	90:cb3d968589d8	554	#define BP_UART_C1_RSRC (5U) /!< Bit position for UART_C1_RSRC. /
Kojto	90:cb3d968589d8	555	#define BM_UART_C1_RSRC (0x20U) /!< Bit mask for UART_C1_RSRC. /
Kojto	90:cb3d968589d8	556	#define BS_UART_C1_RSRC (1U) /!< Bit field size in bits for UART_C1_RSRC. /
Kojto	90:cb3d968589d8	557
Kojto	90:cb3d968589d8	558	/! @brief Read current value of the UART_C1_RSRC field. /
Kojto	90:cb3d968589d8	559	#define BR_UART_C1_RSRC(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_RSRC))
Kojto	90:cb3d968589d8	560
Kojto	90:cb3d968589d8	561	/! @brief Format value for bitfield UART_C1_RSRC. /
Kojto	90:cb3d968589d8	562	#define BF_UART_C1_RSRC(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_RSRC) & BM_UART_C1_RSRC)
Kojto	90:cb3d968589d8	563
Kojto	90:cb3d968589d8	564	/! @brief Set the RSRC field to a new value. /
Kojto	90:cb3d968589d8	565	#define BW_UART_C1_RSRC(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_RSRC) = (v))
Kojto	90:cb3d968589d8	566	/@}/
Kojto	90:cb3d968589d8	567
Kojto	90:cb3d968589d8	568	/*!
Kojto	90:cb3d968589d8	569	* @name Register UART_C1, field UARTSWAI[6] (RW)
Kojto	90:cb3d968589d8	570	*
Kojto	90:cb3d968589d8	571	* Values:
Kojto	90:cb3d968589d8	572	* - 0 - UART clock continues to run in Wait mode.
Kojto	90:cb3d968589d8	573	* - 1 - UART clock freezes while CPU is in Wait mode.
Kojto	90:cb3d968589d8	574	*/
Kojto	90:cb3d968589d8	575	/@{/
Kojto	90:cb3d968589d8	576	#define BP_UART_C1_UARTSWAI (6U) /!< Bit position for UART_C1_UARTSWAI. /
Kojto	90:cb3d968589d8	577	#define BM_UART_C1_UARTSWAI (0x40U) /!< Bit mask for UART_C1_UARTSWAI. /
Kojto	90:cb3d968589d8	578	#define BS_UART_C1_UARTSWAI (1U) /!< Bit field size in bits for UART_C1_UARTSWAI. /
Kojto	90:cb3d968589d8	579
Kojto	90:cb3d968589d8	580	/! @brief Read current value of the UART_C1_UARTSWAI field. /
Kojto	90:cb3d968589d8	581	#define BR_UART_C1_UARTSWAI(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_UARTSWAI))
Kojto	90:cb3d968589d8	582
Kojto	90:cb3d968589d8	583	/! @brief Format value for bitfield UART_C1_UARTSWAI. /
Kojto	90:cb3d968589d8	584	#define BF_UART_C1_UARTSWAI(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_UARTSWAI) & BM_UART_C1_UARTSWAI)
Kojto	90:cb3d968589d8	585
Kojto	90:cb3d968589d8	586	/! @brief Set the UARTSWAI field to a new value. /
Kojto	90:cb3d968589d8	587	#define BW_UART_C1_UARTSWAI(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_UARTSWAI) = (v))
Kojto	90:cb3d968589d8	588	/@}/
Kojto	90:cb3d968589d8	589
Kojto	90:cb3d968589d8	590	/*!
Kojto	90:cb3d968589d8	591	* @name Register UART_C1, field LOOPS[7] (RW)
Kojto	90:cb3d968589d8	592	*
Kojto	90:cb3d968589d8	593	* When LOOPS is set, the RxD pin is disconnected from the UART and the
Kojto	90:cb3d968589d8	594	* transmitter output is internally connected to the receiver input. The transmitter and
Kojto	90:cb3d968589d8	595	* the receiver must be enabled to use the loop function.
Kojto	90:cb3d968589d8	596	*
Kojto	90:cb3d968589d8	597	* Values:
Kojto	90:cb3d968589d8	598	* - 0 - Normal operation.
Kojto	90:cb3d968589d8	599	* - 1 - Loop mode where transmitter output is internally connected to receiver
Kojto	90:cb3d968589d8	600	* input. The receiver input is determined by RSRC.
Kojto	90:cb3d968589d8	601	*/
Kojto	90:cb3d968589d8	602	/@{/
Kojto	90:cb3d968589d8	603	#define BP_UART_C1_LOOPS (7U) /!< Bit position for UART_C1_LOOPS. /
Kojto	90:cb3d968589d8	604	#define BM_UART_C1_LOOPS (0x80U) /!< Bit mask for UART_C1_LOOPS. /
Kojto	90:cb3d968589d8	605	#define BS_UART_C1_LOOPS (1U) /!< Bit field size in bits for UART_C1_LOOPS. /
Kojto	90:cb3d968589d8	606
Kojto	90:cb3d968589d8	607	/! @brief Read current value of the UART_C1_LOOPS field. /
Kojto	90:cb3d968589d8	608	#define BR_UART_C1_LOOPS(x) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_LOOPS))
Kojto	90:cb3d968589d8	609
Kojto	90:cb3d968589d8	610	/! @brief Format value for bitfield UART_C1_LOOPS. /
Kojto	90:cb3d968589d8	611	#define BF_UART_C1_LOOPS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C1_LOOPS) & BM_UART_C1_LOOPS)
Kojto	90:cb3d968589d8	612
Kojto	90:cb3d968589d8	613	/! @brief Set the LOOPS field to a new value. /
Kojto	90:cb3d968589d8	614	#define BW_UART_C1_LOOPS(x, v) (BITBAND_ACCESS8(HW_UART_C1_ADDR(x), BP_UART_C1_LOOPS) = (v))
Kojto	90:cb3d968589d8	615	/@}/
Kojto	90:cb3d968589d8	616
Kojto	90:cb3d968589d8	617	/*******************************************************************************
Kojto	90:cb3d968589d8	618	* HW_UART_C2 - UART Control Register 2
Kojto	90:cb3d968589d8	619	******************************************************************************/
Kojto	90:cb3d968589d8	620
Kojto	90:cb3d968589d8	621	/*!
Kojto	90:cb3d968589d8	622	* @brief HW_UART_C2 - UART Control Register 2 (RW)
Kojto	90:cb3d968589d8	623	*
Kojto	90:cb3d968589d8	624	* Reset value: 0x00U
Kojto	90:cb3d968589d8	625	*
Kojto	90:cb3d968589d8	626	* This register can be read or written at any time.
Kojto	90:cb3d968589d8	627	*/
Kojto	90:cb3d968589d8	628	typedef union _hw_uart_c2
Kojto	90:cb3d968589d8	629	{
Kojto	90:cb3d968589d8	630	uint8_t U;
Kojto	90:cb3d968589d8	631	struct _hw_uart_c2_bitfields
Kojto	90:cb3d968589d8	632	{
Kojto	90:cb3d968589d8	633	uint8_t SBK : 1; /!< [0] Send Break /
Kojto	90:cb3d968589d8	634	uint8_t RWU : 1; /!< [1] Receiver Wakeup Control /
Kojto	90:cb3d968589d8	635	uint8_t RE : 1; /!< [2] Receiver Enable /
Kojto	90:cb3d968589d8	636	uint8_t TE : 1; /!< [3] Transmitter Enable /
Kojto	90:cb3d968589d8	637	uint8_t ILIE : 1; /!< [4] Idle Line Interrupt DMA Transfer Enable /
Kojto	90:cb3d968589d8	638	uint8_t RIE : 1; /*!< [5] Receiver Full Interrupt or DMA Transfer
Kojto	90:cb3d968589d8	639	* Enable */
Kojto	90:cb3d968589d8	640	uint8_t TCIE : 1; /*!< [6] Transmission Complete Interrupt or DMA
Kojto	90:cb3d968589d8	641	* Transfer Enable */
Kojto	90:cb3d968589d8	642	uint8_t TIE : 1; /*!< [7] Transmitter Interrupt or DMA Transfer
Kojto	90:cb3d968589d8	643	* Enable. */
Kojto	90:cb3d968589d8	644	} B;
Kojto	90:cb3d968589d8	645	} hw_uart_c2_t;
Kojto	90:cb3d968589d8	646
Kojto	90:cb3d968589d8	647	/*!
Kojto	90:cb3d968589d8	648	* @name Constants and macros for entire UART_C2 register
Kojto	90:cb3d968589d8	649	*/
Kojto	90:cb3d968589d8	650	/@{/
Kojto	90:cb3d968589d8	651	#define HW_UART_C2_ADDR(x) ((x) + 0x3U)
Kojto	90:cb3d968589d8	652
Kojto	90:cb3d968589d8	653	#define HW_UART_C2(x) ((__IO hw_uart_c2_t ) HW_UART_C2_ADDR(x))
Kojto	90:cb3d968589d8	654	#define HW_UART_C2_RD(x) (HW_UART_C2(x).U)
Kojto	90:cb3d968589d8	655	#define HW_UART_C2_WR(x, v) (HW_UART_C2(x).U = (v))
Kojto	90:cb3d968589d8	656	#define HW_UART_C2_SET(x, v) (HW_UART_C2_WR(x, HW_UART_C2_RD(x) \| (v)))
Kojto	90:cb3d968589d8	657	#define HW_UART_C2_CLR(x, v) (HW_UART_C2_WR(x, HW_UART_C2_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	658	#define HW_UART_C2_TOG(x, v) (HW_UART_C2_WR(x, HW_UART_C2_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	659	/@}/
Kojto	90:cb3d968589d8	660
Kojto	90:cb3d968589d8	661	/*
Kojto	90:cb3d968589d8	662	* Constants & macros for individual UART_C2 bitfields
Kojto	90:cb3d968589d8	663	*/
Kojto	90:cb3d968589d8	664
Kojto	90:cb3d968589d8	665	/*!
Kojto	90:cb3d968589d8	666	* @name Register UART_C2, field SBK[0] (RW)
Kojto	90:cb3d968589d8	667	*
Kojto	90:cb3d968589d8	668	* Toggling SBK sends one break character from the following: See Transmitting
Kojto	90:cb3d968589d8	669	* break characters for the number of logic 0s for the different configurations.
Kojto	90:cb3d968589d8	670	* Toggling implies clearing the SBK field before the break character has finished
Kojto	90:cb3d968589d8	671	* transmitting. As long as SBK is set, the transmitter continues to send
Kojto	90:cb3d968589d8	672	* complete break characters (10, 11, or 12 bits, or 13 or 14 bits, or 15 or 16 bits).
Kojto	90:cb3d968589d8	673	* Ensure that C2[TE] is asserted atleast 1 clock before assertion of this bit.
Kojto	90:cb3d968589d8	674	* 10, 11, or 12 logic 0s if S2[BRK13] is cleared 13 or 14 logic 0s if S2[BRK13]
Kojto	90:cb3d968589d8	675	* is set. 15 or 16 logic 0s if BDH[SBNS] is set. This field must be cleared when
Kojto	90:cb3d968589d8	676	* C7816[ISO_7816E] is set.
Kojto	90:cb3d968589d8	677	*
Kojto	90:cb3d968589d8	678	* Values:
Kojto	90:cb3d968589d8	679	* - 0 - Normal transmitter operation.
Kojto	90:cb3d968589d8	680	* - 1 - Queue break characters to be sent.
Kojto	90:cb3d968589d8	681	*/
Kojto	90:cb3d968589d8	682	/@{/
Kojto	90:cb3d968589d8	683	#define BP_UART_C2_SBK (0U) /!< Bit position for UART_C2_SBK. /
Kojto	90:cb3d968589d8	684	#define BM_UART_C2_SBK (0x01U) /!< Bit mask for UART_C2_SBK. /
Kojto	90:cb3d968589d8	685	#define BS_UART_C2_SBK (1U) /!< Bit field size in bits for UART_C2_SBK. /
Kojto	90:cb3d968589d8	686
Kojto	90:cb3d968589d8	687	/! @brief Read current value of the UART_C2_SBK field. /
Kojto	90:cb3d968589d8	688	#define BR_UART_C2_SBK(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_SBK))
Kojto	90:cb3d968589d8	689
Kojto	90:cb3d968589d8	690	/! @brief Format value for bitfield UART_C2_SBK. /
Kojto	90:cb3d968589d8	691	#define BF_UART_C2_SBK(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_SBK) & BM_UART_C2_SBK)
Kojto	90:cb3d968589d8	692
Kojto	90:cb3d968589d8	693	/! @brief Set the SBK field to a new value. /
Kojto	90:cb3d968589d8	694	#define BW_UART_C2_SBK(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_SBK) = (v))
Kojto	90:cb3d968589d8	695	/@}/
Kojto	90:cb3d968589d8	696
Kojto	90:cb3d968589d8	697	/*!
Kojto	90:cb3d968589d8	698	* @name Register UART_C2, field RWU[1] (RW)
Kojto	90:cb3d968589d8	699	*
Kojto	90:cb3d968589d8	700	* This field can be set to place the UART receiver in a standby state. RWU
Kojto	90:cb3d968589d8	701	* automatically clears when an RWU event occurs, that is, an IDLE event when
Kojto	90:cb3d968589d8	702	* C1[WAKE] is clear or an address match when C1[WAKE] is set. This field must be
Kojto	90:cb3d968589d8	703	* cleared when C7816[ISO_7816E] is set. RWU must be set only with C1[WAKE] = 0 (wakeup
Kojto	90:cb3d968589d8	704	* on idle) if the channel is currently not idle. This can be determined by
Kojto	90:cb3d968589d8	705	* S2[RAF]. If the flag is set to wake up an IDLE event and the channel is already
Kojto	90:cb3d968589d8	706	* idle, it is possible that the UART will discard data. This is because the data
Kojto	90:cb3d968589d8	707	* must be received or a LIN break detected after an IDLE is detected before IDLE
Kojto	90:cb3d968589d8	708	* is allowed to reasserted.
Kojto	90:cb3d968589d8	709	*
Kojto	90:cb3d968589d8	710	* Values:
Kojto	90:cb3d968589d8	711	* - 0 - Normal operation.
Kojto	90:cb3d968589d8	712	* - 1 - RWU enables the wakeup function and inhibits further receiver interrupt
Kojto	90:cb3d968589d8	713	* requests. Normally, hardware wakes the receiver by automatically clearing
Kojto	90:cb3d968589d8	714	* RWU.
Kojto	90:cb3d968589d8	715	*/
Kojto	90:cb3d968589d8	716	/@{/
Kojto	90:cb3d968589d8	717	#define BP_UART_C2_RWU (1U) /!< Bit position for UART_C2_RWU. /
Kojto	90:cb3d968589d8	718	#define BM_UART_C2_RWU (0x02U) /!< Bit mask for UART_C2_RWU. /
Kojto	90:cb3d968589d8	719	#define BS_UART_C2_RWU (1U) /!< Bit field size in bits for UART_C2_RWU. /
Kojto	90:cb3d968589d8	720
Kojto	90:cb3d968589d8	721	/! @brief Read current value of the UART_C2_RWU field. /
Kojto	90:cb3d968589d8	722	#define BR_UART_C2_RWU(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RWU))
Kojto	90:cb3d968589d8	723
Kojto	90:cb3d968589d8	724	/! @brief Format value for bitfield UART_C2_RWU. /
Kojto	90:cb3d968589d8	725	#define BF_UART_C2_RWU(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_RWU) & BM_UART_C2_RWU)
Kojto	90:cb3d968589d8	726
Kojto	90:cb3d968589d8	727	/! @brief Set the RWU field to a new value. /
Kojto	90:cb3d968589d8	728	#define BW_UART_C2_RWU(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RWU) = (v))
Kojto	90:cb3d968589d8	729	/@}/
Kojto	90:cb3d968589d8	730
Kojto	90:cb3d968589d8	731	/*!
Kojto	90:cb3d968589d8	732	* @name Register UART_C2, field RE[2] (RW)
Kojto	90:cb3d968589d8	733	*
Kojto	90:cb3d968589d8	734	* Enables the UART receiver.
Kojto	90:cb3d968589d8	735	*
Kojto	90:cb3d968589d8	736	* Values:
Kojto	90:cb3d968589d8	737	* - 0 - Receiver off.
Kojto	90:cb3d968589d8	738	* - 1 - Receiver on.
Kojto	90:cb3d968589d8	739	*/
Kojto	90:cb3d968589d8	740	/@{/
Kojto	90:cb3d968589d8	741	#define BP_UART_C2_RE (2U) /!< Bit position for UART_C2_RE. /
Kojto	90:cb3d968589d8	742	#define BM_UART_C2_RE (0x04U) /!< Bit mask for UART_C2_RE. /
Kojto	90:cb3d968589d8	743	#define BS_UART_C2_RE (1U) /!< Bit field size in bits for UART_C2_RE. /
Kojto	90:cb3d968589d8	744
Kojto	90:cb3d968589d8	745	/! @brief Read current value of the UART_C2_RE field. /
Kojto	90:cb3d968589d8	746	#define BR_UART_C2_RE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RE))
Kojto	90:cb3d968589d8	747
Kojto	90:cb3d968589d8	748	/! @brief Format value for bitfield UART_C2_RE. /
Kojto	90:cb3d968589d8	749	#define BF_UART_C2_RE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_RE) & BM_UART_C2_RE)
Kojto	90:cb3d968589d8	750
Kojto	90:cb3d968589d8	751	/! @brief Set the RE field to a new value. /
Kojto	90:cb3d968589d8	752	#define BW_UART_C2_RE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RE) = (v))
Kojto	90:cb3d968589d8	753	/@}/
Kojto	90:cb3d968589d8	754
Kojto	90:cb3d968589d8	755	/*!
Kojto	90:cb3d968589d8	756	* @name Register UART_C2, field TE[3] (RW)
Kojto	90:cb3d968589d8	757	*
Kojto	90:cb3d968589d8	758	* Enables the UART transmitter. TE can be used to queue an idle preamble by
Kojto	90:cb3d968589d8	759	* clearing and then setting TE. When C7816[ISO_7816E] is set/enabled and
Kojto	90:cb3d968589d8	760	* C7816[TTYPE] = 1, this field is automatically cleared after the requested block has been
Kojto	90:cb3d968589d8	761	* transmitted. This condition is detected when TL7816[TLEN] = 0 and four
Kojto	90:cb3d968589d8	762	* additional characters are transmitted.
Kojto	90:cb3d968589d8	763	*
Kojto	90:cb3d968589d8	764	* Values:
Kojto	90:cb3d968589d8	765	* - 0 - Transmitter off.
Kojto	90:cb3d968589d8	766	* - 1 - Transmitter on.
Kojto	90:cb3d968589d8	767	*/
Kojto	90:cb3d968589d8	768	/@{/
Kojto	90:cb3d968589d8	769	#define BP_UART_C2_TE (3U) /!< Bit position for UART_C2_TE. /
Kojto	90:cb3d968589d8	770	#define BM_UART_C2_TE (0x08U) /!< Bit mask for UART_C2_TE. /
Kojto	90:cb3d968589d8	771	#define BS_UART_C2_TE (1U) /!< Bit field size in bits for UART_C2_TE. /
Kojto	90:cb3d968589d8	772
Kojto	90:cb3d968589d8	773	/! @brief Read current value of the UART_C2_TE field. /
Kojto	90:cb3d968589d8	774	#define BR_UART_C2_TE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TE))
Kojto	90:cb3d968589d8	775
Kojto	90:cb3d968589d8	776	/! @brief Format value for bitfield UART_C2_TE. /
Kojto	90:cb3d968589d8	777	#define BF_UART_C2_TE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_TE) & BM_UART_C2_TE)
Kojto	90:cb3d968589d8	778
Kojto	90:cb3d968589d8	779	/! @brief Set the TE field to a new value. /
Kojto	90:cb3d968589d8	780	#define BW_UART_C2_TE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TE) = (v))
Kojto	90:cb3d968589d8	781	/@}/
Kojto	90:cb3d968589d8	782
Kojto	90:cb3d968589d8	783	/*!
Kojto	90:cb3d968589d8	784	* @name Register UART_C2, field ILIE[4] (RW)
Kojto	90:cb3d968589d8	785	*
Kojto	90:cb3d968589d8	786	* Enables the idle line flag, S1[IDLE], to generate interrupt requestsor DMA
Kojto	90:cb3d968589d8	787	* transfer requests based on the state of C5[ILDMAS].
Kojto	90:cb3d968589d8	788	*
Kojto	90:cb3d968589d8	789	* Values:
Kojto	90:cb3d968589d8	790	* - 0 - IDLE interrupt requests disabled. and DMA transfer
Kojto	90:cb3d968589d8	791	* - 1 - IDLE interrupt requests enabled. or DMA transfer
Kojto	90:cb3d968589d8	792	*/
Kojto	90:cb3d968589d8	793	/@{/
Kojto	90:cb3d968589d8	794	#define BP_UART_C2_ILIE (4U) /!< Bit position for UART_C2_ILIE. /
Kojto	90:cb3d968589d8	795	#define BM_UART_C2_ILIE (0x10U) /!< Bit mask for UART_C2_ILIE. /
Kojto	90:cb3d968589d8	796	#define BS_UART_C2_ILIE (1U) /!< Bit field size in bits for UART_C2_ILIE. /
Kojto	90:cb3d968589d8	797
Kojto	90:cb3d968589d8	798	/! @brief Read current value of the UART_C2_ILIE field. /
Kojto	90:cb3d968589d8	799	#define BR_UART_C2_ILIE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_ILIE))
Kojto	90:cb3d968589d8	800
Kojto	90:cb3d968589d8	801	/! @brief Format value for bitfield UART_C2_ILIE. /
Kojto	90:cb3d968589d8	802	#define BF_UART_C2_ILIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_ILIE) & BM_UART_C2_ILIE)
Kojto	90:cb3d968589d8	803
Kojto	90:cb3d968589d8	804	/! @brief Set the ILIE field to a new value. /
Kojto	90:cb3d968589d8	805	#define BW_UART_C2_ILIE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_ILIE) = (v))
Kojto	90:cb3d968589d8	806	/@}/
Kojto	90:cb3d968589d8	807
Kojto	90:cb3d968589d8	808	/*!
Kojto	90:cb3d968589d8	809	* @name Register UART_C2, field RIE[5] (RW)
Kojto	90:cb3d968589d8	810	*
Kojto	90:cb3d968589d8	811	* Enables S1[RDRF] to generate interrupt requests or DMA transfer requests,
Kojto	90:cb3d968589d8	812	* based on the state of C5[RDMAS].
Kojto	90:cb3d968589d8	813	*
Kojto	90:cb3d968589d8	814	* Values:
Kojto	90:cb3d968589d8	815	* - 0 - RDRF interrupt and DMA transfer requests disabled.
Kojto	90:cb3d968589d8	816	* - 1 - RDRF interrupt or DMA transfer requests enabled.
Kojto	90:cb3d968589d8	817	*/
Kojto	90:cb3d968589d8	818	/@{/
Kojto	90:cb3d968589d8	819	#define BP_UART_C2_RIE (5U) /!< Bit position for UART_C2_RIE. /
Kojto	90:cb3d968589d8	820	#define BM_UART_C2_RIE (0x20U) /!< Bit mask for UART_C2_RIE. /
Kojto	90:cb3d968589d8	821	#define BS_UART_C2_RIE (1U) /!< Bit field size in bits for UART_C2_RIE. /
Kojto	90:cb3d968589d8	822
Kojto	90:cb3d968589d8	823	/! @brief Read current value of the UART_C2_RIE field. /
Kojto	90:cb3d968589d8	824	#define BR_UART_C2_RIE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RIE))
Kojto	90:cb3d968589d8	825
Kojto	90:cb3d968589d8	826	/! @brief Format value for bitfield UART_C2_RIE. /
Kojto	90:cb3d968589d8	827	#define BF_UART_C2_RIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_RIE) & BM_UART_C2_RIE)
Kojto	90:cb3d968589d8	828
Kojto	90:cb3d968589d8	829	/! @brief Set the RIE field to a new value. /
Kojto	90:cb3d968589d8	830	#define BW_UART_C2_RIE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_RIE) = (v))
Kojto	90:cb3d968589d8	831	/@}/
Kojto	90:cb3d968589d8	832
Kojto	90:cb3d968589d8	833	/*!
Kojto	90:cb3d968589d8	834	* @name Register UART_C2, field TCIE[6] (RW)
Kojto	90:cb3d968589d8	835	*
Kojto	90:cb3d968589d8	836	* Enables the transmission complete flag, S1[TC], to generate interrupt
Kojto	90:cb3d968589d8	837	* requests . or DMA transfer requests based on the state of C5[TCDMAS] If C2[TCIE] and
Kojto	90:cb3d968589d8	838	* C5[TCDMAS] are both set, then TIE must be cleared, and D[D] must not be
Kojto	90:cb3d968589d8	839	* written unless servicing a DMA request.
Kojto	90:cb3d968589d8	840	*
Kojto	90:cb3d968589d8	841	* Values:
Kojto	90:cb3d968589d8	842	* - 0 - TC interrupt and DMA transfer requests disabled.
Kojto	90:cb3d968589d8	843	* - 1 - TC interrupt or DMA transfer requests enabled.
Kojto	90:cb3d968589d8	844	*/
Kojto	90:cb3d968589d8	845	/@{/
Kojto	90:cb3d968589d8	846	#define BP_UART_C2_TCIE (6U) /!< Bit position for UART_C2_TCIE. /
Kojto	90:cb3d968589d8	847	#define BM_UART_C2_TCIE (0x40U) /!< Bit mask for UART_C2_TCIE. /
Kojto	90:cb3d968589d8	848	#define BS_UART_C2_TCIE (1U) /!< Bit field size in bits for UART_C2_TCIE. /
Kojto	90:cb3d968589d8	849
Kojto	90:cb3d968589d8	850	/! @brief Read current value of the UART_C2_TCIE field. /
Kojto	90:cb3d968589d8	851	#define BR_UART_C2_TCIE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TCIE))
Kojto	90:cb3d968589d8	852
Kojto	90:cb3d968589d8	853	/! @brief Format value for bitfield UART_C2_TCIE. /
Kojto	90:cb3d968589d8	854	#define BF_UART_C2_TCIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_TCIE) & BM_UART_C2_TCIE)
Kojto	90:cb3d968589d8	855
Kojto	90:cb3d968589d8	856	/! @brief Set the TCIE field to a new value. /
Kojto	90:cb3d968589d8	857	#define BW_UART_C2_TCIE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TCIE) = (v))
Kojto	90:cb3d968589d8	858	/@}/
Kojto	90:cb3d968589d8	859
Kojto	90:cb3d968589d8	860	/*!
Kojto	90:cb3d968589d8	861	* @name Register UART_C2, field TIE[7] (RW)
Kojto	90:cb3d968589d8	862	*
Kojto	90:cb3d968589d8	863	* Enables S1[TDRE] to generate interrupt requests or DMA transfer requests,
Kojto	90:cb3d968589d8	864	* based on the state of C5[TDMAS]. If C2[TIE] and C5[TDMAS] are both set, then TCIE
Kojto	90:cb3d968589d8	865	* must be cleared, and D[D] must not be written unless servicing a DMA request.
Kojto	90:cb3d968589d8	866	*
Kojto	90:cb3d968589d8	867	* Values:
Kojto	90:cb3d968589d8	868	* - 0 - TDRE interrupt and DMA transfer requests disabled.
Kojto	90:cb3d968589d8	869	* - 1 - TDRE interrupt or DMA transfer requests enabled.
Kojto	90:cb3d968589d8	870	*/
Kojto	90:cb3d968589d8	871	/@{/
Kojto	90:cb3d968589d8	872	#define BP_UART_C2_TIE (7U) /!< Bit position for UART_C2_TIE. /
Kojto	90:cb3d968589d8	873	#define BM_UART_C2_TIE (0x80U) /!< Bit mask for UART_C2_TIE. /
Kojto	90:cb3d968589d8	874	#define BS_UART_C2_TIE (1U) /!< Bit field size in bits for UART_C2_TIE. /
Kojto	90:cb3d968589d8	875
Kojto	90:cb3d968589d8	876	/! @brief Read current value of the UART_C2_TIE field. /
Kojto	90:cb3d968589d8	877	#define BR_UART_C2_TIE(x) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TIE))
Kojto	90:cb3d968589d8	878
Kojto	90:cb3d968589d8	879	/! @brief Format value for bitfield UART_C2_TIE. /
Kojto	90:cb3d968589d8	880	#define BF_UART_C2_TIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C2_TIE) & BM_UART_C2_TIE)
Kojto	90:cb3d968589d8	881
Kojto	90:cb3d968589d8	882	/! @brief Set the TIE field to a new value. /
Kojto	90:cb3d968589d8	883	#define BW_UART_C2_TIE(x, v) (BITBAND_ACCESS8(HW_UART_C2_ADDR(x), BP_UART_C2_TIE) = (v))
Kojto	90:cb3d968589d8	884	/@}/
Kojto	90:cb3d968589d8	885
Kojto	90:cb3d968589d8	886	/*******************************************************************************
Kojto	90:cb3d968589d8	887	* HW_UART_S1 - UART Status Register 1
Kojto	90:cb3d968589d8	888	******************************************************************************/
Kojto	90:cb3d968589d8	889
Kojto	90:cb3d968589d8	890	/*!
Kojto	90:cb3d968589d8	891	* @brief HW_UART_S1 - UART Status Register 1 (RO)
Kojto	90:cb3d968589d8	892	*
Kojto	90:cb3d968589d8	893	* Reset value: 0xC0U
Kojto	90:cb3d968589d8	894	*
Kojto	90:cb3d968589d8	895	* The S1 register provides inputs to the MCU for generation of UART interrupts
Kojto	90:cb3d968589d8	896	* or DMA requests. This register can also be polled by the MCU to check the
Kojto	90:cb3d968589d8	897	* status of its fields. To clear a flag, the status register should be read followed
Kojto	90:cb3d968589d8	898	* by a read or write to D register, depending on the interrupt flag type. Other
Kojto	90:cb3d968589d8	899	* instructions can be executed between the two steps as long the handling of
Kojto	90:cb3d968589d8	900	* I/O is not compromised, but the order of operations is important for flag
Kojto	90:cb3d968589d8	901	* clearing. When a flag is configured to trigger a DMA request, assertion of the
Kojto	90:cb3d968589d8	902	* associated DMA done signal from the DMA controller clears the flag. If the
Kojto	90:cb3d968589d8	903	* condition that results in the assertion of the flag, interrupt, or DMA request is not
Kojto	90:cb3d968589d8	904	* resolved prior to clearing the flag, the flag, and interrupt/DMA request,
Kojto	90:cb3d968589d8	905	* reasserts. For example, if the DMA or interrupt service routine fails to write
Kojto	90:cb3d968589d8	906	* sufficient data to the transmit buffer to raise it above the watermark level, the
Kojto	90:cb3d968589d8	907	* flag reasserts and generates another interrupt or DMA request. Reading an
Kojto	90:cb3d968589d8	908	* empty data register to clear one of the flags of the S1 register causes the FIFO
Kojto	90:cb3d968589d8	909	* pointers to become misaligned. A receive FIFO flush reinitializes the
Kojto	90:cb3d968589d8	910	* pointers. A better way to prevent this situation is to always leave one byte in FIFO
Kojto	90:cb3d968589d8	911	* and this byte will be read eventually in clearing the flag bit.
Kojto	90:cb3d968589d8	912	*/
Kojto	90:cb3d968589d8	913	typedef union _hw_uart_s1
Kojto	90:cb3d968589d8	914	{
Kojto	90:cb3d968589d8	915	uint8_t U;
Kojto	90:cb3d968589d8	916	struct _hw_uart_s1_bitfields
Kojto	90:cb3d968589d8	917	{
Kojto	90:cb3d968589d8	918	uint8_t PF : 1; /!< [0] Parity Error Flag /
Kojto	90:cb3d968589d8	919	uint8_t FE : 1; /!< [1] Framing Error Flag /
Kojto	90:cb3d968589d8	920	uint8_t NF : 1; /!< [2] Noise Flag /
Kojto	90:cb3d968589d8	921	uint8_t OR : 1; /!< [3] Receiver Overrun Flag /
Kojto	90:cb3d968589d8	922	uint8_t IDLE : 1; /!< [4] Idle Line Flag /
Kojto	90:cb3d968589d8	923	uint8_t RDRF : 1; /!< [5] Receive Data Register Full Flag /
Kojto	90:cb3d968589d8	924	uint8_t TC : 1; /!< [6] Transmit Complete Flag /
Kojto	90:cb3d968589d8	925	uint8_t TDRE : 1; /!< [7] Transmit Data Register Empty Flag /
Kojto	90:cb3d968589d8	926	} B;
Kojto	90:cb3d968589d8	927	} hw_uart_s1_t;
Kojto	90:cb3d968589d8	928
Kojto	90:cb3d968589d8	929	/*!
Kojto	90:cb3d968589d8	930	* @name Constants and macros for entire UART_S1 register
Kojto	90:cb3d968589d8	931	*/
Kojto	90:cb3d968589d8	932	/@{/
Kojto	90:cb3d968589d8	933	#define HW_UART_S1_ADDR(x) ((x) + 0x4U)
Kojto	90:cb3d968589d8	934
Kojto	90:cb3d968589d8	935	#define HW_UART_S1(x) ((__I hw_uart_s1_t ) HW_UART_S1_ADDR(x))
Kojto	90:cb3d968589d8	936	#define HW_UART_S1_RD(x) (HW_UART_S1(x).U)
Kojto	90:cb3d968589d8	937	/@}/
Kojto	90:cb3d968589d8	938
Kojto	90:cb3d968589d8	939	/*
Kojto	90:cb3d968589d8	940	* Constants & macros for individual UART_S1 bitfields
Kojto	90:cb3d968589d8	941	*/
Kojto	90:cb3d968589d8	942
Kojto	90:cb3d968589d8	943	/*!
Kojto	90:cb3d968589d8	944	* @name Register UART_S1, field PF[0] (RO)
Kojto	90:cb3d968589d8	945	*
Kojto	90:cb3d968589d8	946	* PF is set when PE is set and the parity of the received data does not match
Kojto	90:cb3d968589d8	947	* its parity bit. The PF is not set in the case of an overrun condition. When PF
Kojto	90:cb3d968589d8	948	* is set, it indicates only that a dataword was received with parity error since
Kojto	90:cb3d968589d8	949	* the last time it was cleared. There is no guarantee that the first dataword
Kojto	90:cb3d968589d8	950	* read from the receive buffer has a parity error or that there is only one
Kojto	90:cb3d968589d8	951	* dataword in the buffer that was received with a parity error, unless the receive
Kojto	90:cb3d968589d8	952	* buffer has a depth of one. To clear PF, read S1 and then read D., S2[LBKDE] is
Kojto	90:cb3d968589d8	953	* disabled, Within the receive buffer structure the received dataword is tagged
Kojto	90:cb3d968589d8	954	* if it is received with a parity error. This information is available by reading
Kojto	90:cb3d968589d8	955	* the ED register prior to reading the D register.
Kojto	90:cb3d968589d8	956	*
Kojto	90:cb3d968589d8	957	* Values:
Kojto	90:cb3d968589d8	958	* - 0 - No parity error detected since the last time this flag was cleared. If
Kojto	90:cb3d968589d8	959	* the receive buffer has a depth greater than 1, then there may be data in
Kojto	90:cb3d968589d8	960	* the receive buffer what was received with a parity error.
Kojto	90:cb3d968589d8	961	* - 1 - At least one dataword was received with a parity error since the last
Kojto	90:cb3d968589d8	962	* time this flag was cleared.
Kojto	90:cb3d968589d8	963	*/
Kojto	90:cb3d968589d8	964	/@{/
Kojto	90:cb3d968589d8	965	#define BP_UART_S1_PF (0U) /!< Bit position for UART_S1_PF. /
Kojto	90:cb3d968589d8	966	#define BM_UART_S1_PF (0x01U) /!< Bit mask for UART_S1_PF. /
Kojto	90:cb3d968589d8	967	#define BS_UART_S1_PF (1U) /!< Bit field size in bits for UART_S1_PF. /
Kojto	90:cb3d968589d8	968
Kojto	90:cb3d968589d8	969	/! @brief Read current value of the UART_S1_PF field. /
Kojto	90:cb3d968589d8	970	#define BR_UART_S1_PF(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_PF))
Kojto	90:cb3d968589d8	971	/@}/
Kojto	90:cb3d968589d8	972
Kojto	90:cb3d968589d8	973	/*!
Kojto	90:cb3d968589d8	974	* @name Register UART_S1, field FE[1] (RO)
Kojto	90:cb3d968589d8	975	*
Kojto	90:cb3d968589d8	976	* FE is set when a logic 0 is accepted as the stop bit. When BDH[SBNS] is set,
Kojto	90:cb3d968589d8	977	* then FE will set when a logic 0 is accepted for either of the two stop bits.
Kojto	90:cb3d968589d8	978	* FE does not set in the case of an overrun or while the LIN break detect feature
Kojto	90:cb3d968589d8	979	* is enabled (S2[LBKDE] = 1). FE inhibits further data reception until it is
Kojto	90:cb3d968589d8	980	* cleared. To clear FE, read S1 with FE set and then read D. The last data in the
Kojto	90:cb3d968589d8	981	* receive buffer represents the data that was received with the frame error
Kojto	90:cb3d968589d8	982	* enabled. Framing errors are not supported when 7816E is set/enabled. However, if
Kojto	90:cb3d968589d8	983	* this flag is set, data is still not received in 7816 mode.
Kojto	90:cb3d968589d8	984	*
Kojto	90:cb3d968589d8	985	* Values:
Kojto	90:cb3d968589d8	986	* - 0 - No framing error detected.
Kojto	90:cb3d968589d8	987	* - 1 - Framing error.
Kojto	90:cb3d968589d8	988	*/
Kojto	90:cb3d968589d8	989	/@{/
Kojto	90:cb3d968589d8	990	#define BP_UART_S1_FE (1U) /!< Bit position for UART_S1_FE. /
Kojto	90:cb3d968589d8	991	#define BM_UART_S1_FE (0x02U) /!< Bit mask for UART_S1_FE. /
Kojto	90:cb3d968589d8	992	#define BS_UART_S1_FE (1U) /!< Bit field size in bits for UART_S1_FE. /
Kojto	90:cb3d968589d8	993
Kojto	90:cb3d968589d8	994	/! @brief Read current value of the UART_S1_FE field. /
Kojto	90:cb3d968589d8	995	#define BR_UART_S1_FE(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_FE))
Kojto	90:cb3d968589d8	996	/@}/
Kojto	90:cb3d968589d8	997
Kojto	90:cb3d968589d8	998	/*!
Kojto	90:cb3d968589d8	999	* @name Register UART_S1, field NF[2] (RO)
Kojto	90:cb3d968589d8	1000	*
Kojto	90:cb3d968589d8	1001	* NF is set when the UART detects noise on the receiver input. NF does not
Kojto	90:cb3d968589d8	1002	* become set in the case of an overrun or while the LIN break detect feature is
Kojto	90:cb3d968589d8	1003	* enabled (S2[LBKDE] = 1). When NF is set, it indicates only that a dataword has
Kojto	90:cb3d968589d8	1004	* been received with noise since the last time it was cleared. There is no
Kojto	90:cb3d968589d8	1005	* guarantee that the first dataword read from the receive buffer has noise or that there
Kojto	90:cb3d968589d8	1006	* is only one dataword in the buffer that was received with noise unless the
Kojto	90:cb3d968589d8	1007	* receive buffer has a depth of one. To clear NF, read S1 and then read D.
Kojto	90:cb3d968589d8	1008	*
Kojto	90:cb3d968589d8	1009	* Values:
Kojto	90:cb3d968589d8	1010	* - 0 - No noise detected since the last time this flag was cleared. If the
Kojto	90:cb3d968589d8	1011	* receive buffer has a depth greater than 1 then there may be data in the
Kojto	90:cb3d968589d8	1012	* receiver buffer that was received with noise.
Kojto	90:cb3d968589d8	1013	* - 1 - At least one dataword was received with noise detected since the last
Kojto	90:cb3d968589d8	1014	* time the flag was cleared.
Kojto	90:cb3d968589d8	1015	*/
Kojto	90:cb3d968589d8	1016	/@{/
Kojto	90:cb3d968589d8	1017	#define BP_UART_S1_NF (2U) /!< Bit position for UART_S1_NF. /
Kojto	90:cb3d968589d8	1018	#define BM_UART_S1_NF (0x04U) /!< Bit mask for UART_S1_NF. /
Kojto	90:cb3d968589d8	1019	#define BS_UART_S1_NF (1U) /!< Bit field size in bits for UART_S1_NF. /
Kojto	90:cb3d968589d8	1020
Kojto	90:cb3d968589d8	1021	/! @brief Read current value of the UART_S1_NF field. /
Kojto	90:cb3d968589d8	1022	#define BR_UART_S1_NF(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_NF))
Kojto	90:cb3d968589d8	1023	/@}/
Kojto	90:cb3d968589d8	1024
Kojto	90:cb3d968589d8	1025	/*!
Kojto	90:cb3d968589d8	1026	* @name Register UART_S1, field OR[3] (RO)
Kojto	90:cb3d968589d8	1027	*
Kojto	90:cb3d968589d8	1028	* OR is set when software fails to prevent the receive data register from
Kojto	90:cb3d968589d8	1029	* overflowing with data. The OR bit is set immediately after the stop bit has been
Kojto	90:cb3d968589d8	1030	* completely received for the dataword that overflows the buffer and all the other
Kojto	90:cb3d968589d8	1031	* error flags (FE, NF, and PF) are prevented from setting. The data in the
Kojto	90:cb3d968589d8	1032	* shift register is lost, but the data already in the UART data registers is not
Kojto	90:cb3d968589d8	1033	* affected. If the OR flag is set, no data is stored in the data buffer even if
Kojto	90:cb3d968589d8	1034	* sufficient room exists. Additionally, while the OR flag is set, the RDRF and IDLE
Kojto	90:cb3d968589d8	1035	* flags are blocked from asserting, that is, transition from an inactive to an
Kojto	90:cb3d968589d8	1036	* active state. To clear OR, read S1 when OR is set and then read D. See
Kojto	90:cb3d968589d8	1037	* functional description for more details regarding the operation of the OR bit.If
Kojto	90:cb3d968589d8	1038	* LBKDE is enabled and a LIN Break is detected, the OR field asserts if S2[LBKDIF]
Kojto	90:cb3d968589d8	1039	* is not cleared before the next data character is received. In 7816 mode, it is
Kojto	90:cb3d968589d8	1040	* possible to configure a NACK to be returned by programing C7816[ONACK].
Kojto	90:cb3d968589d8	1041	*
Kojto	90:cb3d968589d8	1042	* Values:
Kojto	90:cb3d968589d8	1043	* - 0 - No overrun has occurred since the last time the flag was cleared.
Kojto	90:cb3d968589d8	1044	* - 1 - Overrun has occurred or the overrun flag has not been cleared since the
Kojto	90:cb3d968589d8	1045	* last overrun occured.
Kojto	90:cb3d968589d8	1046	*/
Kojto	90:cb3d968589d8	1047	/@{/
Kojto	90:cb3d968589d8	1048	#define BP_UART_S1_OR (3U) /!< Bit position for UART_S1_OR. /
Kojto	90:cb3d968589d8	1049	#define BM_UART_S1_OR (0x08U) /!< Bit mask for UART_S1_OR. /
Kojto	90:cb3d968589d8	1050	#define BS_UART_S1_OR (1U) /!< Bit field size in bits for UART_S1_OR. /
Kojto	90:cb3d968589d8	1051
Kojto	90:cb3d968589d8	1052	/! @brief Read current value of the UART_S1_OR field. /
Kojto	90:cb3d968589d8	1053	#define BR_UART_S1_OR(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_OR))
Kojto	90:cb3d968589d8	1054	/@}/
Kojto	90:cb3d968589d8	1055
Kojto	90:cb3d968589d8	1056	/*!
Kojto	90:cb3d968589d8	1057	* @name Register UART_S1, field IDLE[4] (RO)
Kojto	90:cb3d968589d8	1058	*
Kojto	90:cb3d968589d8	1059	* After the IDLE flag is cleared, a frame must be received (although not
Kojto	90:cb3d968589d8	1060	* necessarily stored in the data buffer, for example if C2[RWU] is set), or a LIN
Kojto	90:cb3d968589d8	1061	* break character must set the S2[LBKDIF] flag before an idle condition can set the
Kojto	90:cb3d968589d8	1062	* IDLE flag. To clear IDLE, read UART status S1 with IDLE set and then read D.
Kojto	90:cb3d968589d8	1063	* IDLE is set when either of the following appear on the receiver input: 10
Kojto	90:cb3d968589d8	1064	* consecutive logic 1s if C1[M] = 0 11 consecutive logic 1s if C1[M] = 1 and C4[M10]
Kojto	90:cb3d968589d8	1065	* = 0 12 consecutive logic 1s if C1[M] = 1, C4[M10] = 1, and C1[PE] = 1 Idle
Kojto	90:cb3d968589d8	1066	* detection is not supported when 7816E is set/enabled and hence this flag is
Kojto	90:cb3d968589d8	1067	* ignored. When RWU is set and WAKE is cleared, an idle line condition sets the IDLE
Kojto	90:cb3d968589d8	1068	* flag if RWUID is set, else the IDLE flag does not become set.
Kojto	90:cb3d968589d8	1069	*
Kojto	90:cb3d968589d8	1070	* Values:
Kojto	90:cb3d968589d8	1071	* - 0 - Receiver input is either active now or has never become active since
Kojto	90:cb3d968589d8	1072	* the IDLE flag was last cleared.
Kojto	90:cb3d968589d8	1073	* - 1 - Receiver input has become idle or the flag has not been cleared since
Kojto	90:cb3d968589d8	1074	* it last asserted.
Kojto	90:cb3d968589d8	1075	*/
Kojto	90:cb3d968589d8	1076	/@{/
Kojto	90:cb3d968589d8	1077	#define BP_UART_S1_IDLE (4U) /!< Bit position for UART_S1_IDLE. /
Kojto	90:cb3d968589d8	1078	#define BM_UART_S1_IDLE (0x10U) /!< Bit mask for UART_S1_IDLE. /
Kojto	90:cb3d968589d8	1079	#define BS_UART_S1_IDLE (1U) /!< Bit field size in bits for UART_S1_IDLE. /
Kojto	90:cb3d968589d8	1080
Kojto	90:cb3d968589d8	1081	/! @brief Read current value of the UART_S1_IDLE field. /
Kojto	90:cb3d968589d8	1082	#define BR_UART_S1_IDLE(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_IDLE))
Kojto	90:cb3d968589d8	1083	/@}/
Kojto	90:cb3d968589d8	1084
Kojto	90:cb3d968589d8	1085	/*!
Kojto	90:cb3d968589d8	1086	* @name Register UART_S1, field RDRF[5] (RO)
Kojto	90:cb3d968589d8	1087	*
Kojto	90:cb3d968589d8	1088	* RDRF is set when the number of datawords in the receive buffer is equal to or
Kojto	90:cb3d968589d8	1089	* more than the number indicated by RWFIFO[RXWATER]. A dataword that is in the
Kojto	90:cb3d968589d8	1090	* process of being received is not included in the count. To clear RDRF, read S1
Kojto	90:cb3d968589d8	1091	* when RDRF is set and then read D. For more efficient interrupt and DMA
Kojto	90:cb3d968589d8	1092	* operation, read all data except the final value from the buffer, using D/C3[T8]/ED.
Kojto	90:cb3d968589d8	1093	* Then read S1 and the final data value, resulting in the clearing of the RDRF
Kojto	90:cb3d968589d8	1094	* flag. Even if RDRF is set, data will continue to be received until an overrun
Kojto	90:cb3d968589d8	1095	* condition occurs.RDRF is prevented from setting while S2[LBKDE] is set.
Kojto	90:cb3d968589d8	1096	* Additionally, when S2[LBKDE] is set, the received datawords are stored in the receive
Kojto	90:cb3d968589d8	1097	* buffer but over-write each other.
Kojto	90:cb3d968589d8	1098	*
Kojto	90:cb3d968589d8	1099	* Values:
Kojto	90:cb3d968589d8	1100	* - 0 - The number of datawords in the receive buffer is less than the number
Kojto	90:cb3d968589d8	1101	* indicated by RXWATER.
Kojto	90:cb3d968589d8	1102	* - 1 - The number of datawords in the receive buffer is equal to or greater
Kojto	90:cb3d968589d8	1103	* than the number indicated by RXWATER at some point in time since this flag
Kojto	90:cb3d968589d8	1104	* was last cleared.
Kojto	90:cb3d968589d8	1105	*/
Kojto	90:cb3d968589d8	1106	/@{/
Kojto	90:cb3d968589d8	1107	#define BP_UART_S1_RDRF (5U) /!< Bit position for UART_S1_RDRF. /
Kojto	90:cb3d968589d8	1108	#define BM_UART_S1_RDRF (0x20U) /!< Bit mask for UART_S1_RDRF. /
Kojto	90:cb3d968589d8	1109	#define BS_UART_S1_RDRF (1U) /!< Bit field size in bits for UART_S1_RDRF. /
Kojto	90:cb3d968589d8	1110
Kojto	90:cb3d968589d8	1111	/! @brief Read current value of the UART_S1_RDRF field. /
Kojto	90:cb3d968589d8	1112	#define BR_UART_S1_RDRF(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_RDRF))
Kojto	90:cb3d968589d8	1113	/@}/
Kojto	90:cb3d968589d8	1114
Kojto	90:cb3d968589d8	1115	/*!
Kojto	90:cb3d968589d8	1116	* @name Register UART_S1, field TC[6] (RO)
Kojto	90:cb3d968589d8	1117	*
Kojto	90:cb3d968589d8	1118	* TC is set when the transmit buffer is empty and no data, preamble, or break
Kojto	90:cb3d968589d8	1119	* character is being transmitted. When TC is set, the transmit data output signal
Kojto	90:cb3d968589d8	1120	* becomes idle (logic 1). TC is cleared by reading S1 with TC set and then
Kojto	90:cb3d968589d8	1121	* doing one of the following: When C7816[ISO_7816E] is set/enabled, this field is
Kojto	90:cb3d968589d8	1122	* set after any NACK signal has been received, but prior to any corresponding
Kojto	90:cb3d968589d8	1123	* guard times expiring. Writing to D to transmit new data. Queuing a preamble by
Kojto	90:cb3d968589d8	1124	* clearing and then setting C2[TE]. Queuing a break character by writing 1 to SBK
Kojto	90:cb3d968589d8	1125	* in C2.
Kojto	90:cb3d968589d8	1126	*
Kojto	90:cb3d968589d8	1127	* Values:
Kojto	90:cb3d968589d8	1128	* - 0 - Transmitter active (sending data, a preamble, or a break).
Kojto	90:cb3d968589d8	1129	* - 1 - Transmitter idle (transmission activity complete).
Kojto	90:cb3d968589d8	1130	*/
Kojto	90:cb3d968589d8	1131	/@{/
Kojto	90:cb3d968589d8	1132	#define BP_UART_S1_TC (6U) /!< Bit position for UART_S1_TC. /
Kojto	90:cb3d968589d8	1133	#define BM_UART_S1_TC (0x40U) /!< Bit mask for UART_S1_TC. /
Kojto	90:cb3d968589d8	1134	#define BS_UART_S1_TC (1U) /!< Bit field size in bits for UART_S1_TC. /
Kojto	90:cb3d968589d8	1135
Kojto	90:cb3d968589d8	1136	/! @brief Read current value of the UART_S1_TC field. /
Kojto	90:cb3d968589d8	1137	#define BR_UART_S1_TC(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_TC))
Kojto	90:cb3d968589d8	1138	/@}/
Kojto	90:cb3d968589d8	1139
Kojto	90:cb3d968589d8	1140	/*!
Kojto	90:cb3d968589d8	1141	* @name Register UART_S1, field TDRE[7] (RO)
Kojto	90:cb3d968589d8	1142	*
Kojto	90:cb3d968589d8	1143	* TDRE will set when the number of datawords in the transmit buffer (D and
Kojto	90:cb3d968589d8	1144	* C3[T8])is equal to or less than the number indicated by TWFIFO[TXWATER]. A
Kojto	90:cb3d968589d8	1145	* character that is in the process of being transmitted is not included in the count.
Kojto	90:cb3d968589d8	1146	* To clear TDRE, read S1 when TDRE is set and then write to the UART data
Kojto	90:cb3d968589d8	1147	* register (D). For more efficient interrupt servicing, all data except the final value
Kojto	90:cb3d968589d8	1148	* to be written to the buffer must be written to D/C3[T8]. Then S1 can be read
Kojto	90:cb3d968589d8	1149	* before writing the final data value, resulting in the clearing of the TRDE
Kojto	90:cb3d968589d8	1150	* flag. This is more efficient because the TDRE reasserts until the watermark has
Kojto	90:cb3d968589d8	1151	* been exceeded. So, attempting to clear the TDRE with every write will be
Kojto	90:cb3d968589d8	1152	* ineffective until sufficient data has been written.
Kojto	90:cb3d968589d8	1153	*
Kojto	90:cb3d968589d8	1154	* Values:
Kojto	90:cb3d968589d8	1155	* - 0 - The amount of data in the transmit buffer is greater than the value
Kojto	90:cb3d968589d8	1156	* indicated by TWFIFO[TXWATER].
Kojto	90:cb3d968589d8	1157	* - 1 - The amount of data in the transmit buffer is less than or equal to the
Kojto	90:cb3d968589d8	1158	* value indicated by TWFIFO[TXWATER] at some point in time since the flag
Kojto	90:cb3d968589d8	1159	* has been cleared.
Kojto	90:cb3d968589d8	1160	*/
Kojto	90:cb3d968589d8	1161	/@{/
Kojto	90:cb3d968589d8	1162	#define BP_UART_S1_TDRE (7U) /!< Bit position for UART_S1_TDRE. /
Kojto	90:cb3d968589d8	1163	#define BM_UART_S1_TDRE (0x80U) /!< Bit mask for UART_S1_TDRE. /
Kojto	90:cb3d968589d8	1164	#define BS_UART_S1_TDRE (1U) /!< Bit field size in bits for UART_S1_TDRE. /
Kojto	90:cb3d968589d8	1165
Kojto	90:cb3d968589d8	1166	/! @brief Read current value of the UART_S1_TDRE field. /
Kojto	90:cb3d968589d8	1167	#define BR_UART_S1_TDRE(x) (BITBAND_ACCESS8(HW_UART_S1_ADDR(x), BP_UART_S1_TDRE))
Kojto	90:cb3d968589d8	1168	/@}/
Kojto	90:cb3d968589d8	1169
Kojto	90:cb3d968589d8	1170	/*******************************************************************************
Kojto	90:cb3d968589d8	1171	* HW_UART_S2 - UART Status Register 2
Kojto	90:cb3d968589d8	1172	******************************************************************************/
Kojto	90:cb3d968589d8	1173
Kojto	90:cb3d968589d8	1174	/*!
Kojto	90:cb3d968589d8	1175	* @brief HW_UART_S2 - UART Status Register 2 (RW)
Kojto	90:cb3d968589d8	1176	*
Kojto	90:cb3d968589d8	1177	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1178	*
Kojto	90:cb3d968589d8	1179	* The S2 register provides inputs to the MCU for generation of UART interrupts
Kojto	90:cb3d968589d8	1180	* or DMA requests. Also, this register can be polled by the MCU to check the
Kojto	90:cb3d968589d8	1181	* status of these bits. This register can be read or written at any time, with the
Kojto	90:cb3d968589d8	1182	* exception of the MSBF and RXINV bits, which should be changed by the user only
Kojto	90:cb3d968589d8	1183	* between transmit and receive packets.
Kojto	90:cb3d968589d8	1184	*/
Kojto	90:cb3d968589d8	1185	typedef union _hw_uart_s2
Kojto	90:cb3d968589d8	1186	{
Kojto	90:cb3d968589d8	1187	uint8_t U;
Kojto	90:cb3d968589d8	1188	struct _hw_uart_s2_bitfields
Kojto	90:cb3d968589d8	1189	{
Kojto	90:cb3d968589d8	1190	uint8_t RAF : 1; /!< [0] Receiver Active Flag /
Kojto	90:cb3d968589d8	1191	uint8_t LBKDE : 1; /!< [1] LIN Break Detection Enable /
Kojto	90:cb3d968589d8	1192	uint8_t BRK13 : 1; /!< [2] Break Transmit Character Length /
Kojto	90:cb3d968589d8	1193	uint8_t RWUID : 1; /!< [3] Receive Wakeup Idle Detect /
Kojto	90:cb3d968589d8	1194	uint8_t RXINV : 1; /!< [4] Receive Data Inversion /
Kojto	90:cb3d968589d8	1195	uint8_t MSBF : 1; /!< [5] Most Significant Bit First /
Kojto	90:cb3d968589d8	1196	uint8_t RXEDGIF : 1; /!< [6] RxD Pin Active Edge Interrupt Flag /
Kojto	90:cb3d968589d8	1197	uint8_t LBKDIF : 1; /!< [7] LIN Break Detect Interrupt Flag /
Kojto	90:cb3d968589d8	1198	} B;
Kojto	90:cb3d968589d8	1199	} hw_uart_s2_t;
Kojto	90:cb3d968589d8	1200
Kojto	90:cb3d968589d8	1201	/*!
Kojto	90:cb3d968589d8	1202	* @name Constants and macros for entire UART_S2 register
Kojto	90:cb3d968589d8	1203	*/
Kojto	90:cb3d968589d8	1204	/@{/
Kojto	90:cb3d968589d8	1205	#define HW_UART_S2_ADDR(x) ((x) + 0x5U)
Kojto	90:cb3d968589d8	1206
Kojto	90:cb3d968589d8	1207	#define HW_UART_S2(x) ((__IO hw_uart_s2_t ) HW_UART_S2_ADDR(x))
Kojto	90:cb3d968589d8	1208	#define HW_UART_S2_RD(x) (HW_UART_S2(x).U)
Kojto	90:cb3d968589d8	1209	#define HW_UART_S2_WR(x, v) (HW_UART_S2(x).U = (v))
Kojto	90:cb3d968589d8	1210	#define HW_UART_S2_SET(x, v) (HW_UART_S2_WR(x, HW_UART_S2_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1211	#define HW_UART_S2_CLR(x, v) (HW_UART_S2_WR(x, HW_UART_S2_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1212	#define HW_UART_S2_TOG(x, v) (HW_UART_S2_WR(x, HW_UART_S2_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1213	/@}/
Kojto	90:cb3d968589d8	1214
Kojto	90:cb3d968589d8	1215	/*
Kojto	90:cb3d968589d8	1216	* Constants & macros for individual UART_S2 bitfields
Kojto	90:cb3d968589d8	1217	*/
Kojto	90:cb3d968589d8	1218
Kojto	90:cb3d968589d8	1219	/*!
Kojto	90:cb3d968589d8	1220	* @name Register UART_S2, field RAF[0] (RO)
Kojto	90:cb3d968589d8	1221	*
Kojto	90:cb3d968589d8	1222	* RAF is set when the UART receiver detects a logic 0 during the RT1 time
Kojto	90:cb3d968589d8	1223	* period of the start bit search. RAF is cleared when the receiver detects an idle
Kojto	90:cb3d968589d8	1224	* character when C7816[ISO7816E] is cleared/disabled. When C7816[ISO7816E] is
Kojto	90:cb3d968589d8	1225	* enabled, the RAF is cleared if the C7816[TTYPE] = 0 expires or the C7816[TTYPE] =
Kojto	90:cb3d968589d8	1226	* 1 expires.In case C7816[ISO7816E] is set and C7816[TTYPE] = 0, it is possible
Kojto	90:cb3d968589d8	1227	* to configure the guard time to 12. However, if a NACK is required to be
Kojto	90:cb3d968589d8	1228	* transmitted, the data transfer actually takes 13 ETU with the 13th ETU slot being a
Kojto	90:cb3d968589d8	1229	* inactive buffer. Therefore, in this situation, the RAF may deassert one ETU
Kojto	90:cb3d968589d8	1230	* prior to actually being inactive.
Kojto	90:cb3d968589d8	1231	*
Kojto	90:cb3d968589d8	1232	* Values:
Kojto	90:cb3d968589d8	1233	* - 0 - UART receiver idle/inactive waiting for a start bit.
Kojto	90:cb3d968589d8	1234	* - 1 - UART receiver active, RxD input not idle.
Kojto	90:cb3d968589d8	1235	*/
Kojto	90:cb3d968589d8	1236	/@{/
Kojto	90:cb3d968589d8	1237	#define BP_UART_S2_RAF (0U) /!< Bit position for UART_S2_RAF. /
Kojto	90:cb3d968589d8	1238	#define BM_UART_S2_RAF (0x01U) /!< Bit mask for UART_S2_RAF. /
Kojto	90:cb3d968589d8	1239	#define BS_UART_S2_RAF (1U) /!< Bit field size in bits for UART_S2_RAF. /
Kojto	90:cb3d968589d8	1240
Kojto	90:cb3d968589d8	1241	/! @brief Read current value of the UART_S2_RAF field. /
Kojto	90:cb3d968589d8	1242	#define BR_UART_S2_RAF(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RAF))
Kojto	90:cb3d968589d8	1243	/@}/
Kojto	90:cb3d968589d8	1244
Kojto	90:cb3d968589d8	1245	/*!
Kojto	90:cb3d968589d8	1246	* @name Register UART_S2, field LBKDE[1] (RW)
Kojto	90:cb3d968589d8	1247	*
Kojto	90:cb3d968589d8	1248	* Enables the LIN Break detection feature. While LBKDE is set, S1[RDRF],
Kojto	90:cb3d968589d8	1249	* S1[NF], S1[FE], and S1[PF] are prevented from setting. When LBKDE is set, see .
Kojto	90:cb3d968589d8	1250	* Overrun operation LBKDE must be cleared when C7816[ISO7816E] is set.
Kojto	90:cb3d968589d8	1251	*
Kojto	90:cb3d968589d8	1252	* Values:
Kojto	90:cb3d968589d8	1253	* - 0 - Break character detection is disabled.
Kojto	90:cb3d968589d8	1254	* - 1 - Break character is detected at length of 11 bit times if C1[M] = 0 or
Kojto	90:cb3d968589d8	1255	* 12 bits time if C1[M] = 1.
Kojto	90:cb3d968589d8	1256	*/
Kojto	90:cb3d968589d8	1257	/@{/
Kojto	90:cb3d968589d8	1258	#define BP_UART_S2_LBKDE (1U) /!< Bit position for UART_S2_LBKDE. /
Kojto	90:cb3d968589d8	1259	#define BM_UART_S2_LBKDE (0x02U) /!< Bit mask for UART_S2_LBKDE. /
Kojto	90:cb3d968589d8	1260	#define BS_UART_S2_LBKDE (1U) /!< Bit field size in bits for UART_S2_LBKDE. /
Kojto	90:cb3d968589d8	1261
Kojto	90:cb3d968589d8	1262	/! @brief Read current value of the UART_S2_LBKDE field. /
Kojto	90:cb3d968589d8	1263	#define BR_UART_S2_LBKDE(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDE))
Kojto	90:cb3d968589d8	1264
Kojto	90:cb3d968589d8	1265	/! @brief Format value for bitfield UART_S2_LBKDE. /
Kojto	90:cb3d968589d8	1266	#define BF_UART_S2_LBKDE(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_LBKDE) & BM_UART_S2_LBKDE)
Kojto	90:cb3d968589d8	1267
Kojto	90:cb3d968589d8	1268	/! @brief Set the LBKDE field to a new value. /
Kojto	90:cb3d968589d8	1269	#define BW_UART_S2_LBKDE(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDE) = (v))
Kojto	90:cb3d968589d8	1270	/@}/
Kojto	90:cb3d968589d8	1271
Kojto	90:cb3d968589d8	1272	/*!
Kojto	90:cb3d968589d8	1273	* @name Register UART_S2, field BRK13[2] (RW)
Kojto	90:cb3d968589d8	1274	*
Kojto	90:cb3d968589d8	1275	* Determines whether the transmit break character is 10, 11, or 12 bits long,
Kojto	90:cb3d968589d8	1276	* or 13 or 14 bits long. See for the length of the break character for the
Kojto	90:cb3d968589d8	1277	* different configurations. The detection of a framing error is not affected by this
Kojto	90:cb3d968589d8	1278	* field. Transmitting break characters
Kojto	90:cb3d968589d8	1279	*
Kojto	90:cb3d968589d8	1280	* Values:
Kojto	90:cb3d968589d8	1281	* - 0 - Break character is 10, 11, or 12 bits long.
Kojto	90:cb3d968589d8	1282	* - 1 - Break character is 13 or 14 bits long.
Kojto	90:cb3d968589d8	1283	*/
Kojto	90:cb3d968589d8	1284	/@{/
Kojto	90:cb3d968589d8	1285	#define BP_UART_S2_BRK13 (2U) /!< Bit position for UART_S2_BRK13. /
Kojto	90:cb3d968589d8	1286	#define BM_UART_S2_BRK13 (0x04U) /!< Bit mask for UART_S2_BRK13. /
Kojto	90:cb3d968589d8	1287	#define BS_UART_S2_BRK13 (1U) /!< Bit field size in bits for UART_S2_BRK13. /
Kojto	90:cb3d968589d8	1288
Kojto	90:cb3d968589d8	1289	/! @brief Read current value of the UART_S2_BRK13 field. /
Kojto	90:cb3d968589d8	1290	#define BR_UART_S2_BRK13(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_BRK13))
Kojto	90:cb3d968589d8	1291
Kojto	90:cb3d968589d8	1292	/! @brief Format value for bitfield UART_S2_BRK13. /
Kojto	90:cb3d968589d8	1293	#define BF_UART_S2_BRK13(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_BRK13) & BM_UART_S2_BRK13)
Kojto	90:cb3d968589d8	1294
Kojto	90:cb3d968589d8	1295	/! @brief Set the BRK13 field to a new value. /
Kojto	90:cb3d968589d8	1296	#define BW_UART_S2_BRK13(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_BRK13) = (v))
Kojto	90:cb3d968589d8	1297	/@}/
Kojto	90:cb3d968589d8	1298
Kojto	90:cb3d968589d8	1299	/*!
Kojto	90:cb3d968589d8	1300	* @name Register UART_S2, field RWUID[3] (RW)
Kojto	90:cb3d968589d8	1301	*
Kojto	90:cb3d968589d8	1302	* When RWU is set and WAKE is cleared, this field controls whether the idle
Kojto	90:cb3d968589d8	1303	* character that wakes the receiver sets S1[IDLE]. This field must be cleared when
Kojto	90:cb3d968589d8	1304	* C7816[ISO7816E] is set/enabled.
Kojto	90:cb3d968589d8	1305	*
Kojto	90:cb3d968589d8	1306	* Values:
Kojto	90:cb3d968589d8	1307	* - 0 - S1[IDLE] is not set upon detection of an idle character.
Kojto	90:cb3d968589d8	1308	* - 1 - S1[IDLE] is set upon detection of an idle character.
Kojto	90:cb3d968589d8	1309	*/
Kojto	90:cb3d968589d8	1310	/@{/
Kojto	90:cb3d968589d8	1311	#define BP_UART_S2_RWUID (3U) /!< Bit position for UART_S2_RWUID. /
Kojto	90:cb3d968589d8	1312	#define BM_UART_S2_RWUID (0x08U) /!< Bit mask for UART_S2_RWUID. /
Kojto	90:cb3d968589d8	1313	#define BS_UART_S2_RWUID (1U) /!< Bit field size in bits for UART_S2_RWUID. /
Kojto	90:cb3d968589d8	1314
Kojto	90:cb3d968589d8	1315	/! @brief Read current value of the UART_S2_RWUID field. /
Kojto	90:cb3d968589d8	1316	#define BR_UART_S2_RWUID(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RWUID))
Kojto	90:cb3d968589d8	1317
Kojto	90:cb3d968589d8	1318	/! @brief Format value for bitfield UART_S2_RWUID. /
Kojto	90:cb3d968589d8	1319	#define BF_UART_S2_RWUID(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_RWUID) & BM_UART_S2_RWUID)
Kojto	90:cb3d968589d8	1320
Kojto	90:cb3d968589d8	1321	/! @brief Set the RWUID field to a new value. /
Kojto	90:cb3d968589d8	1322	#define BW_UART_S2_RWUID(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RWUID) = (v))
Kojto	90:cb3d968589d8	1323	/@}/
Kojto	90:cb3d968589d8	1324
Kojto	90:cb3d968589d8	1325	/*!
Kojto	90:cb3d968589d8	1326	* @name Register UART_S2, field RXINV[4] (RW)
Kojto	90:cb3d968589d8	1327	*
Kojto	90:cb3d968589d8	1328	* Setting this field reverses the polarity of the received data input. In NRZ
Kojto	90:cb3d968589d8	1329	* format, a one is represented by a mark and a zero is represented by a space for
Kojto	90:cb3d968589d8	1330	* normal polarity, and the opposite for inverted polarity. In IrDA format, a
Kojto	90:cb3d968589d8	1331	* zero is represented by short high pulse in the middle of a bit time remaining
Kojto	90:cb3d968589d8	1332	* idle low for a one for normal polarity. A zero is represented by a short low
Kojto	90:cb3d968589d8	1333	* pulse in the middle of a bit time remaining idle high for a one for inverted
Kojto	90:cb3d968589d8	1334	* polarity. This field is automatically set when C7816[INIT] and C7816[ISO7816E] are
Kojto	90:cb3d968589d8	1335	* enabled and an initial character is detected in T = 0 protocol mode. Setting
Kojto	90:cb3d968589d8	1336	* RXINV inverts the RxD input for data bits, start and stop bits, break, and
Kojto	90:cb3d968589d8	1337	* idle. When C7816[ISO7816E] is set/enabled, only the data bits and the parity bit
Kojto	90:cb3d968589d8	1338	* are inverted.
Kojto	90:cb3d968589d8	1339	*
Kojto	90:cb3d968589d8	1340	* Values:
Kojto	90:cb3d968589d8	1341	* - 0 - Receive data is not inverted.
Kojto	90:cb3d968589d8	1342	* - 1 - Receive data is inverted.
Kojto	90:cb3d968589d8	1343	*/
Kojto	90:cb3d968589d8	1344	/@{/
Kojto	90:cb3d968589d8	1345	#define BP_UART_S2_RXINV (4U) /!< Bit position for UART_S2_RXINV. /
Kojto	90:cb3d968589d8	1346	#define BM_UART_S2_RXINV (0x10U) /!< Bit mask for UART_S2_RXINV. /
Kojto	90:cb3d968589d8	1347	#define BS_UART_S2_RXINV (1U) /!< Bit field size in bits for UART_S2_RXINV. /
Kojto	90:cb3d968589d8	1348
Kojto	90:cb3d968589d8	1349	/! @brief Read current value of the UART_S2_RXINV field. /
Kojto	90:cb3d968589d8	1350	#define BR_UART_S2_RXINV(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXINV))
Kojto	90:cb3d968589d8	1351
Kojto	90:cb3d968589d8	1352	/! @brief Format value for bitfield UART_S2_RXINV. /
Kojto	90:cb3d968589d8	1353	#define BF_UART_S2_RXINV(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_RXINV) & BM_UART_S2_RXINV)
Kojto	90:cb3d968589d8	1354
Kojto	90:cb3d968589d8	1355	/! @brief Set the RXINV field to a new value. /
Kojto	90:cb3d968589d8	1356	#define BW_UART_S2_RXINV(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXINV) = (v))
Kojto	90:cb3d968589d8	1357	/@}/
Kojto	90:cb3d968589d8	1358
Kojto	90:cb3d968589d8	1359	/*!
Kojto	90:cb3d968589d8	1360	* @name Register UART_S2, field MSBF[5] (RW)
Kojto	90:cb3d968589d8	1361	*
Kojto	90:cb3d968589d8	1362	* Setting this field reverses the order of the bits that are transmitted and
Kojto	90:cb3d968589d8	1363	* received on the wire. This field does not affect the polarity of the bits, the
Kojto	90:cb3d968589d8	1364	* location of the parity bit, or the location of the start or stop bits. This
Kojto	90:cb3d968589d8	1365	* field is automatically set when C7816[INIT] and C7816[ISO7816E] are enabled and
Kojto	90:cb3d968589d8	1366	* an initial character is detected in T = 0 protocol mode.
Kojto	90:cb3d968589d8	1367	*
Kojto	90:cb3d968589d8	1368	* Values:
Kojto	90:cb3d968589d8	1369	* - 0 - LSB (bit0) is the first bit that is transmitted following the start
Kojto	90:cb3d968589d8	1370	* bit. Further, the first bit received after the start bit is identified as
Kojto	90:cb3d968589d8	1371	* bit0.
Kojto	90:cb3d968589d8	1372	* - 1 - MSB (bit8, bit7 or bit6) is the first bit that is transmitted following
Kojto	90:cb3d968589d8	1373	* the start bit, depending on the setting of C1[M] and C1[PE]. Further, the
Kojto	90:cb3d968589d8	1374	* first bit received after the start bit is identified as bit8, bit7, or
Kojto	90:cb3d968589d8	1375	* bit6, depending on the setting of C1[M] and C1[PE].
Kojto	90:cb3d968589d8	1376	*/
Kojto	90:cb3d968589d8	1377	/@{/
Kojto	90:cb3d968589d8	1378	#define BP_UART_S2_MSBF (5U) /!< Bit position for UART_S2_MSBF. /
Kojto	90:cb3d968589d8	1379	#define BM_UART_S2_MSBF (0x20U) /!< Bit mask for UART_S2_MSBF. /
Kojto	90:cb3d968589d8	1380	#define BS_UART_S2_MSBF (1U) /!< Bit field size in bits for UART_S2_MSBF. /
Kojto	90:cb3d968589d8	1381
Kojto	90:cb3d968589d8	1382	/! @brief Read current value of the UART_S2_MSBF field. /
Kojto	90:cb3d968589d8	1383	#define BR_UART_S2_MSBF(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_MSBF))
Kojto	90:cb3d968589d8	1384
Kojto	90:cb3d968589d8	1385	/! @brief Format value for bitfield UART_S2_MSBF. /
Kojto	90:cb3d968589d8	1386	#define BF_UART_S2_MSBF(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_MSBF) & BM_UART_S2_MSBF)
Kojto	90:cb3d968589d8	1387
Kojto	90:cb3d968589d8	1388	/! @brief Set the MSBF field to a new value. /
Kojto	90:cb3d968589d8	1389	#define BW_UART_S2_MSBF(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_MSBF) = (v))
Kojto	90:cb3d968589d8	1390	/@}/
Kojto	90:cb3d968589d8	1391
Kojto	90:cb3d968589d8	1392	/*!
Kojto	90:cb3d968589d8	1393	* @name Register UART_S2, field RXEDGIF[6] (W1C)
Kojto	90:cb3d968589d8	1394	*
Kojto	90:cb3d968589d8	1395	* RXEDGIF is set when an active edge occurs on the RxD pin. The active edge is
Kojto	90:cb3d968589d8	1396	* falling if RXINV = 0, and rising if RXINV=1. RXEDGIF is cleared by writing a 1
Kojto	90:cb3d968589d8	1397	* to it. See for additional details. RXEDGIF description The active edge is
Kojto	90:cb3d968589d8	1398	* detected only in two wire mode and on receiving data coming from the RxD pin.
Kojto	90:cb3d968589d8	1399	*
Kojto	90:cb3d968589d8	1400	* Values:
Kojto	90:cb3d968589d8	1401	* - 0 - No active edge on the receive pin has occurred.
Kojto	90:cb3d968589d8	1402	* - 1 - An active edge on the receive pin has occurred.
Kojto	90:cb3d968589d8	1403	*/
Kojto	90:cb3d968589d8	1404	/@{/
Kojto	90:cb3d968589d8	1405	#define BP_UART_S2_RXEDGIF (6U) /!< Bit position for UART_S2_RXEDGIF. /
Kojto	90:cb3d968589d8	1406	#define BM_UART_S2_RXEDGIF (0x40U) /!< Bit mask for UART_S2_RXEDGIF. /
Kojto	90:cb3d968589d8	1407	#define BS_UART_S2_RXEDGIF (1U) /!< Bit field size in bits for UART_S2_RXEDGIF. /
Kojto	90:cb3d968589d8	1408
Kojto	90:cb3d968589d8	1409	/! @brief Read current value of the UART_S2_RXEDGIF field. /
Kojto	90:cb3d968589d8	1410	#define BR_UART_S2_RXEDGIF(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXEDGIF))
Kojto	90:cb3d968589d8	1411
Kojto	90:cb3d968589d8	1412	/! @brief Format value for bitfield UART_S2_RXEDGIF. /
Kojto	90:cb3d968589d8	1413	#define BF_UART_S2_RXEDGIF(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_RXEDGIF) & BM_UART_S2_RXEDGIF)
Kojto	90:cb3d968589d8	1414
Kojto	90:cb3d968589d8	1415	/! @brief Set the RXEDGIF field to a new value. /
Kojto	90:cb3d968589d8	1416	#define BW_UART_S2_RXEDGIF(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_RXEDGIF) = (v))
Kojto	90:cb3d968589d8	1417	/@}/
Kojto	90:cb3d968589d8	1418
Kojto	90:cb3d968589d8	1419	/*!
Kojto	90:cb3d968589d8	1420	* @name Register UART_S2, field LBKDIF[7] (W1C)
Kojto	90:cb3d968589d8	1421	*
Kojto	90:cb3d968589d8	1422	* LBKDIF is set when LBKDE is set and a LIN break character is detected on the
Kojto	90:cb3d968589d8	1423	* receiver input. The LIN break characters are 11 consecutive logic 0s if C1[M]
Kojto	90:cb3d968589d8	1424	* = 0 or 12 consecutive logic 0s if C1[M] = 1. LBKDIF is set after receiving the
Kojto	90:cb3d968589d8	1425	* last LIN break character. LBKDIF is cleared by writing a 1 to it.
Kojto	90:cb3d968589d8	1426	*
Kojto	90:cb3d968589d8	1427	* Values:
Kojto	90:cb3d968589d8	1428	* - 0 - No LIN break character detected.
Kojto	90:cb3d968589d8	1429	* - 1 - LIN break character detected.
Kojto	90:cb3d968589d8	1430	*/
Kojto	90:cb3d968589d8	1431	/@{/
Kojto	90:cb3d968589d8	1432	#define BP_UART_S2_LBKDIF (7U) /!< Bit position for UART_S2_LBKDIF. /
Kojto	90:cb3d968589d8	1433	#define BM_UART_S2_LBKDIF (0x80U) /!< Bit mask for UART_S2_LBKDIF. /
Kojto	90:cb3d968589d8	1434	#define BS_UART_S2_LBKDIF (1U) /!< Bit field size in bits for UART_S2_LBKDIF. /
Kojto	90:cb3d968589d8	1435
Kojto	90:cb3d968589d8	1436	/! @brief Read current value of the UART_S2_LBKDIF field. /
Kojto	90:cb3d968589d8	1437	#define BR_UART_S2_LBKDIF(x) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDIF))
Kojto	90:cb3d968589d8	1438
Kojto	90:cb3d968589d8	1439	/! @brief Format value for bitfield UART_S2_LBKDIF. /
Kojto	90:cb3d968589d8	1440	#define BF_UART_S2_LBKDIF(v) ((uint8_t)((uint8_t)(v) << BP_UART_S2_LBKDIF) & BM_UART_S2_LBKDIF)
Kojto	90:cb3d968589d8	1441
Kojto	90:cb3d968589d8	1442	/! @brief Set the LBKDIF field to a new value. /
Kojto	90:cb3d968589d8	1443	#define BW_UART_S2_LBKDIF(x, v) (BITBAND_ACCESS8(HW_UART_S2_ADDR(x), BP_UART_S2_LBKDIF) = (v))
Kojto	90:cb3d968589d8	1444	/@}/
Kojto	90:cb3d968589d8	1445
Kojto	90:cb3d968589d8	1446	/*******************************************************************************
Kojto	90:cb3d968589d8	1447	* HW_UART_C3 - UART Control Register 3
Kojto	90:cb3d968589d8	1448	******************************************************************************/
Kojto	90:cb3d968589d8	1449
Kojto	90:cb3d968589d8	1450	/*!
Kojto	90:cb3d968589d8	1451	* @brief HW_UART_C3 - UART Control Register 3 (RW)
Kojto	90:cb3d968589d8	1452	*
Kojto	90:cb3d968589d8	1453	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1454	*
Kojto	90:cb3d968589d8	1455	* Writing R8 does not have any effect. TXDIR and TXINV can be changed only
Kojto	90:cb3d968589d8	1456	* between transmit and receive packets.
Kojto	90:cb3d968589d8	1457	*/
Kojto	90:cb3d968589d8	1458	typedef union _hw_uart_c3
Kojto	90:cb3d968589d8	1459	{
Kojto	90:cb3d968589d8	1460	uint8_t U;
Kojto	90:cb3d968589d8	1461	struct _hw_uart_c3_bitfields
Kojto	90:cb3d968589d8	1462	{
Kojto	90:cb3d968589d8	1463	uint8_t PEIE : 1; /!< [0] Parity Error Interrupt Enable /
Kojto	90:cb3d968589d8	1464	uint8_t FEIE : 1; /!< [1] Framing Error Interrupt Enable /
Kojto	90:cb3d968589d8	1465	uint8_t NEIE : 1; /!< [2] Noise Error Interrupt Enable /
Kojto	90:cb3d968589d8	1466	uint8_t ORIE : 1; /!< [3] Overrun Error Interrupt Enable /
Kojto	90:cb3d968589d8	1467	uint8_t TXINV : 1; /!< [4] Transmit Data Inversion. /
Kojto	90:cb3d968589d8	1468	uint8_t TXDIR : 1; /*!< [5] Transmitter Pin Data Direction in
Kojto	90:cb3d968589d8	1469	* Single-Wire mode */
Kojto	90:cb3d968589d8	1470	uint8_t T8 : 1; /!< [6] Transmit Bit 8 /
Kojto	90:cb3d968589d8	1471	uint8_t R8 : 1; /!< [7] Received Bit 8 /
Kojto	90:cb3d968589d8	1472	} B;
Kojto	90:cb3d968589d8	1473	} hw_uart_c3_t;
Kojto	90:cb3d968589d8	1474
Kojto	90:cb3d968589d8	1475	/*!
Kojto	90:cb3d968589d8	1476	* @name Constants and macros for entire UART_C3 register
Kojto	90:cb3d968589d8	1477	*/
Kojto	90:cb3d968589d8	1478	/@{/
Kojto	90:cb3d968589d8	1479	#define HW_UART_C3_ADDR(x) ((x) + 0x6U)
Kojto	90:cb3d968589d8	1480
Kojto	90:cb3d968589d8	1481	#define HW_UART_C3(x) ((__IO hw_uart_c3_t ) HW_UART_C3_ADDR(x))
Kojto	90:cb3d968589d8	1482	#define HW_UART_C3_RD(x) (HW_UART_C3(x).U)
Kojto	90:cb3d968589d8	1483	#define HW_UART_C3_WR(x, v) (HW_UART_C3(x).U = (v))
Kojto	90:cb3d968589d8	1484	#define HW_UART_C3_SET(x, v) (HW_UART_C3_WR(x, HW_UART_C3_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1485	#define HW_UART_C3_CLR(x, v) (HW_UART_C3_WR(x, HW_UART_C3_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1486	#define HW_UART_C3_TOG(x, v) (HW_UART_C3_WR(x, HW_UART_C3_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1487	/@}/
Kojto	90:cb3d968589d8	1488
Kojto	90:cb3d968589d8	1489	/*
Kojto	90:cb3d968589d8	1490	* Constants & macros for individual UART_C3 bitfields
Kojto	90:cb3d968589d8	1491	*/
Kojto	90:cb3d968589d8	1492
Kojto	90:cb3d968589d8	1493	/*!
Kojto	90:cb3d968589d8	1494	* @name Register UART_C3, field PEIE[0] (RW)
Kojto	90:cb3d968589d8	1495	*
Kojto	90:cb3d968589d8	1496	* Enables the parity error flag, S1[PF], to generate interrupt requests.
Kojto	90:cb3d968589d8	1497	*
Kojto	90:cb3d968589d8	1498	* Values:
Kojto	90:cb3d968589d8	1499	* - 0 - PF interrupt requests are disabled.
Kojto	90:cb3d968589d8	1500	* - 1 - PF interrupt requests are enabled.
Kojto	90:cb3d968589d8	1501	*/
Kojto	90:cb3d968589d8	1502	/@{/
Kojto	90:cb3d968589d8	1503	#define BP_UART_C3_PEIE (0U) /!< Bit position for UART_C3_PEIE. /
Kojto	90:cb3d968589d8	1504	#define BM_UART_C3_PEIE (0x01U) /!< Bit mask for UART_C3_PEIE. /
Kojto	90:cb3d968589d8	1505	#define BS_UART_C3_PEIE (1U) /!< Bit field size in bits for UART_C3_PEIE. /
Kojto	90:cb3d968589d8	1506
Kojto	90:cb3d968589d8	1507	/! @brief Read current value of the UART_C3_PEIE field. /
Kojto	90:cb3d968589d8	1508	#define BR_UART_C3_PEIE(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_PEIE))
Kojto	90:cb3d968589d8	1509
Kojto	90:cb3d968589d8	1510	/! @brief Format value for bitfield UART_C3_PEIE. /
Kojto	90:cb3d968589d8	1511	#define BF_UART_C3_PEIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_PEIE) & BM_UART_C3_PEIE)
Kojto	90:cb3d968589d8	1512
Kojto	90:cb3d968589d8	1513	/! @brief Set the PEIE field to a new value. /
Kojto	90:cb3d968589d8	1514	#define BW_UART_C3_PEIE(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_PEIE) = (v))
Kojto	90:cb3d968589d8	1515	/@}/
Kojto	90:cb3d968589d8	1516
Kojto	90:cb3d968589d8	1517	/*!
Kojto	90:cb3d968589d8	1518	* @name Register UART_C3, field FEIE[1] (RW)
Kojto	90:cb3d968589d8	1519	*
Kojto	90:cb3d968589d8	1520	* Enables the framing error flag, S1[FE], to generate interrupt requests.
Kojto	90:cb3d968589d8	1521	*
Kojto	90:cb3d968589d8	1522	* Values:
Kojto	90:cb3d968589d8	1523	* - 0 - FE interrupt requests are disabled.
Kojto	90:cb3d968589d8	1524	* - 1 - FE interrupt requests are enabled.
Kojto	90:cb3d968589d8	1525	*/
Kojto	90:cb3d968589d8	1526	/@{/
Kojto	90:cb3d968589d8	1527	#define BP_UART_C3_FEIE (1U) /!< Bit position for UART_C3_FEIE. /
Kojto	90:cb3d968589d8	1528	#define BM_UART_C3_FEIE (0x02U) /!< Bit mask for UART_C3_FEIE. /
Kojto	90:cb3d968589d8	1529	#define BS_UART_C3_FEIE (1U) /!< Bit field size in bits for UART_C3_FEIE. /
Kojto	90:cb3d968589d8	1530
Kojto	90:cb3d968589d8	1531	/! @brief Read current value of the UART_C3_FEIE field. /
Kojto	90:cb3d968589d8	1532	#define BR_UART_C3_FEIE(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_FEIE))
Kojto	90:cb3d968589d8	1533
Kojto	90:cb3d968589d8	1534	/! @brief Format value for bitfield UART_C3_FEIE. /
Kojto	90:cb3d968589d8	1535	#define BF_UART_C3_FEIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_FEIE) & BM_UART_C3_FEIE)
Kojto	90:cb3d968589d8	1536
Kojto	90:cb3d968589d8	1537	/! @brief Set the FEIE field to a new value. /
Kojto	90:cb3d968589d8	1538	#define BW_UART_C3_FEIE(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_FEIE) = (v))
Kojto	90:cb3d968589d8	1539	/@}/
Kojto	90:cb3d968589d8	1540
Kojto	90:cb3d968589d8	1541	/*!
Kojto	90:cb3d968589d8	1542	* @name Register UART_C3, field NEIE[2] (RW)
Kojto	90:cb3d968589d8	1543	*
Kojto	90:cb3d968589d8	1544	* Enables the noise flag, S1[NF], to generate interrupt requests.
Kojto	90:cb3d968589d8	1545	*
Kojto	90:cb3d968589d8	1546	* Values:
Kojto	90:cb3d968589d8	1547	* - 0 - NF interrupt requests are disabled.
Kojto	90:cb3d968589d8	1548	* - 1 - NF interrupt requests are enabled.
Kojto	90:cb3d968589d8	1549	*/
Kojto	90:cb3d968589d8	1550	/@{/
Kojto	90:cb3d968589d8	1551	#define BP_UART_C3_NEIE (2U) /!< Bit position for UART_C3_NEIE. /
Kojto	90:cb3d968589d8	1552	#define BM_UART_C3_NEIE (0x04U) /!< Bit mask for UART_C3_NEIE. /
Kojto	90:cb3d968589d8	1553	#define BS_UART_C3_NEIE (1U) /!< Bit field size in bits for UART_C3_NEIE. /
Kojto	90:cb3d968589d8	1554
Kojto	90:cb3d968589d8	1555	/! @brief Read current value of the UART_C3_NEIE field. /
Kojto	90:cb3d968589d8	1556	#define BR_UART_C3_NEIE(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_NEIE))
Kojto	90:cb3d968589d8	1557
Kojto	90:cb3d968589d8	1558	/! @brief Format value for bitfield UART_C3_NEIE. /
Kojto	90:cb3d968589d8	1559	#define BF_UART_C3_NEIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_NEIE) & BM_UART_C3_NEIE)
Kojto	90:cb3d968589d8	1560
Kojto	90:cb3d968589d8	1561	/! @brief Set the NEIE field to a new value. /
Kojto	90:cb3d968589d8	1562	#define BW_UART_C3_NEIE(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_NEIE) = (v))
Kojto	90:cb3d968589d8	1563	/@}/
Kojto	90:cb3d968589d8	1564
Kojto	90:cb3d968589d8	1565	/*!
Kojto	90:cb3d968589d8	1566	* @name Register UART_C3, field ORIE[3] (RW)
Kojto	90:cb3d968589d8	1567	*
Kojto	90:cb3d968589d8	1568	* Enables the overrun error flag, S1[OR], to generate interrupt requests.
Kojto	90:cb3d968589d8	1569	*
Kojto	90:cb3d968589d8	1570	* Values:
Kojto	90:cb3d968589d8	1571	* - 0 - OR interrupts are disabled.
Kojto	90:cb3d968589d8	1572	* - 1 - OR interrupt requests are enabled.
Kojto	90:cb3d968589d8	1573	*/
Kojto	90:cb3d968589d8	1574	/@{/
Kojto	90:cb3d968589d8	1575	#define BP_UART_C3_ORIE (3U) /!< Bit position for UART_C3_ORIE. /
Kojto	90:cb3d968589d8	1576	#define BM_UART_C3_ORIE (0x08U) /!< Bit mask for UART_C3_ORIE. /
Kojto	90:cb3d968589d8	1577	#define BS_UART_C3_ORIE (1U) /!< Bit field size in bits for UART_C3_ORIE. /
Kojto	90:cb3d968589d8	1578
Kojto	90:cb3d968589d8	1579	/! @brief Read current value of the UART_C3_ORIE field. /
Kojto	90:cb3d968589d8	1580	#define BR_UART_C3_ORIE(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_ORIE))
Kojto	90:cb3d968589d8	1581
Kojto	90:cb3d968589d8	1582	/! @brief Format value for bitfield UART_C3_ORIE. /
Kojto	90:cb3d968589d8	1583	#define BF_UART_C3_ORIE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_ORIE) & BM_UART_C3_ORIE)
Kojto	90:cb3d968589d8	1584
Kojto	90:cb3d968589d8	1585	/! @brief Set the ORIE field to a new value. /
Kojto	90:cb3d968589d8	1586	#define BW_UART_C3_ORIE(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_ORIE) = (v))
Kojto	90:cb3d968589d8	1587	/@}/
Kojto	90:cb3d968589d8	1588
Kojto	90:cb3d968589d8	1589	/*!
Kojto	90:cb3d968589d8	1590	* @name Register UART_C3, field TXINV[4] (RW)
Kojto	90:cb3d968589d8	1591	*
Kojto	90:cb3d968589d8	1592	* Setting this field reverses the polarity of the transmitted data output. In
Kojto	90:cb3d968589d8	1593	* NRZ format, a one is represented by a mark and a zero is represented by a space
Kojto	90:cb3d968589d8	1594	* for normal polarity, and the opposite for inverted polarity. In IrDA format,
Kojto	90:cb3d968589d8	1595	* a zero is represented by short high pulse in the middle of a bit time
Kojto	90:cb3d968589d8	1596	* remaining idle low for a one for normal polarity, and a zero is represented by short
Kojto	90:cb3d968589d8	1597	* low pulse in the middle of a bit time remaining idle high for a one for
Kojto	90:cb3d968589d8	1598	* inverted polarity. This field is automatically set when C7816[INIT] and
Kojto	90:cb3d968589d8	1599	* C7816[ISO7816E] are enabled and an initial character is detected in T = 0 protocol mode.
Kojto	90:cb3d968589d8	1600	* Setting TXINV inverts all transmitted values, including idle, break, start, and
Kojto	90:cb3d968589d8	1601	* stop bits. In loop mode, if TXINV is set, the receiver gets the transmit
Kojto	90:cb3d968589d8	1602	* inversion bit when RXINV is disabled. When C7816[ISO7816E] is set/enabled then only
Kojto	90:cb3d968589d8	1603	* the transmitted data bits and parity bit are inverted.
Kojto	90:cb3d968589d8	1604	*
Kojto	90:cb3d968589d8	1605	* Values:
Kojto	90:cb3d968589d8	1606	* - 0 - Transmit data is not inverted.
Kojto	90:cb3d968589d8	1607	* - 1 - Transmit data is inverted.
Kojto	90:cb3d968589d8	1608	*/
Kojto	90:cb3d968589d8	1609	/@{/
Kojto	90:cb3d968589d8	1610	#define BP_UART_C3_TXINV (4U) /!< Bit position for UART_C3_TXINV. /
Kojto	90:cb3d968589d8	1611	#define BM_UART_C3_TXINV (0x10U) /!< Bit mask for UART_C3_TXINV. /
Kojto	90:cb3d968589d8	1612	#define BS_UART_C3_TXINV (1U) /!< Bit field size in bits for UART_C3_TXINV. /
Kojto	90:cb3d968589d8	1613
Kojto	90:cb3d968589d8	1614	/! @brief Read current value of the UART_C3_TXINV field. /
Kojto	90:cb3d968589d8	1615	#define BR_UART_C3_TXINV(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXINV))
Kojto	90:cb3d968589d8	1616
Kojto	90:cb3d968589d8	1617	/! @brief Format value for bitfield UART_C3_TXINV. /
Kojto	90:cb3d968589d8	1618	#define BF_UART_C3_TXINV(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_TXINV) & BM_UART_C3_TXINV)
Kojto	90:cb3d968589d8	1619
Kojto	90:cb3d968589d8	1620	/! @brief Set the TXINV field to a new value. /
Kojto	90:cb3d968589d8	1621	#define BW_UART_C3_TXINV(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXINV) = (v))
Kojto	90:cb3d968589d8	1622	/@}/
Kojto	90:cb3d968589d8	1623
Kojto	90:cb3d968589d8	1624	/*!
Kojto	90:cb3d968589d8	1625	* @name Register UART_C3, field TXDIR[5] (RW)
Kojto	90:cb3d968589d8	1626	*
Kojto	90:cb3d968589d8	1627	* Determines whether the TXD pin is used as an input or output in the
Kojto	90:cb3d968589d8	1628	* single-wire mode of operation. This field is relevant only to the single wire mode.
Kojto	90:cb3d968589d8	1629	* When C7816[ISO7816E] is set/enabled and C7816[TTYPE] = 1, this field is
Kojto	90:cb3d968589d8	1630	* automatically cleared after the requested block is transmitted. This condition is
Kojto	90:cb3d968589d8	1631	* detected when TL7816[TLEN] = 0 and 4 additional characters are transmitted.
Kojto	90:cb3d968589d8	1632	* Additionally, if C7816[ISO7816E] is set/enabled and C7816[TTYPE] = 0 and a NACK is
Kojto	90:cb3d968589d8	1633	* being transmitted, the hardware automatically overrides this field as needed. In
Kojto	90:cb3d968589d8	1634	* this situation, TXDIR does not reflect the temporary state associated with
Kojto	90:cb3d968589d8	1635	* the NACK.
Kojto	90:cb3d968589d8	1636	*
Kojto	90:cb3d968589d8	1637	* Values:
Kojto	90:cb3d968589d8	1638	* - 0 - TXD pin is an input in single wire mode.
Kojto	90:cb3d968589d8	1639	* - 1 - TXD pin is an output in single wire mode.
Kojto	90:cb3d968589d8	1640	*/
Kojto	90:cb3d968589d8	1641	/@{/
Kojto	90:cb3d968589d8	1642	#define BP_UART_C3_TXDIR (5U) /!< Bit position for UART_C3_TXDIR. /
Kojto	90:cb3d968589d8	1643	#define BM_UART_C3_TXDIR (0x20U) /!< Bit mask for UART_C3_TXDIR. /
Kojto	90:cb3d968589d8	1644	#define BS_UART_C3_TXDIR (1U) /!< Bit field size in bits for UART_C3_TXDIR. /
Kojto	90:cb3d968589d8	1645
Kojto	90:cb3d968589d8	1646	/! @brief Read current value of the UART_C3_TXDIR field. /
Kojto	90:cb3d968589d8	1647	#define BR_UART_C3_TXDIR(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXDIR))
Kojto	90:cb3d968589d8	1648
Kojto	90:cb3d968589d8	1649	/! @brief Format value for bitfield UART_C3_TXDIR. /
Kojto	90:cb3d968589d8	1650	#define BF_UART_C3_TXDIR(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_TXDIR) & BM_UART_C3_TXDIR)
Kojto	90:cb3d968589d8	1651
Kojto	90:cb3d968589d8	1652	/! @brief Set the TXDIR field to a new value. /
Kojto	90:cb3d968589d8	1653	#define BW_UART_C3_TXDIR(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_TXDIR) = (v))
Kojto	90:cb3d968589d8	1654	/@}/
Kojto	90:cb3d968589d8	1655
Kojto	90:cb3d968589d8	1656	/*!
Kojto	90:cb3d968589d8	1657	* @name Register UART_C3, field T8[6] (RW)
Kojto	90:cb3d968589d8	1658	*
Kojto	90:cb3d968589d8	1659	* T8 is the ninth data bit transmitted when the UART is configured for 9-bit
Kojto	90:cb3d968589d8	1660	* data format, that is, if C1[M] = 1 or C4[M10] = 1. If the value of T8 is the
Kojto	90:cb3d968589d8	1661	* same as in the previous transmission, T8 does not have to be rewritten. The same
Kojto	90:cb3d968589d8	1662	* value is transmitted until T8 is rewritten. To correctly transmit the 9th bit,
Kojto	90:cb3d968589d8	1663	* write UARTx_C3[T8] to the desired value, then write the UARTx_D register with
Kojto	90:cb3d968589d8	1664	* the remaining data.
Kojto	90:cb3d968589d8	1665	*/
Kojto	90:cb3d968589d8	1666	/@{/
Kojto	90:cb3d968589d8	1667	#define BP_UART_C3_T8 (6U) /!< Bit position for UART_C3_T8. /
Kojto	90:cb3d968589d8	1668	#define BM_UART_C3_T8 (0x40U) /!< Bit mask for UART_C3_T8. /
Kojto	90:cb3d968589d8	1669	#define BS_UART_C3_T8 (1U) /!< Bit field size in bits for UART_C3_T8. /
Kojto	90:cb3d968589d8	1670
Kojto	90:cb3d968589d8	1671	/! @brief Read current value of the UART_C3_T8 field. /
Kojto	90:cb3d968589d8	1672	#define BR_UART_C3_T8(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_T8))
Kojto	90:cb3d968589d8	1673
Kojto	90:cb3d968589d8	1674	/! @brief Format value for bitfield UART_C3_T8. /
Kojto	90:cb3d968589d8	1675	#define BF_UART_C3_T8(v) ((uint8_t)((uint8_t)(v) << BP_UART_C3_T8) & BM_UART_C3_T8)
Kojto	90:cb3d968589d8	1676
Kojto	90:cb3d968589d8	1677	/! @brief Set the T8 field to a new value. /
Kojto	90:cb3d968589d8	1678	#define BW_UART_C3_T8(x, v) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_T8) = (v))
Kojto	90:cb3d968589d8	1679	/@}/
Kojto	90:cb3d968589d8	1680
Kojto	90:cb3d968589d8	1681	/*!
Kojto	90:cb3d968589d8	1682	* @name Register UART_C3, field R8[7] (RO)
Kojto	90:cb3d968589d8	1683	*
Kojto	90:cb3d968589d8	1684	* R8 is the ninth data bit received when the UART is configured for 9-bit data
Kojto	90:cb3d968589d8	1685	* format, that is, if C1[M] = 1 or C4[M10] = 1. The R8 value corresponds to the
Kojto	90:cb3d968589d8	1686	* current data value in the UARTx_D register. To read the 9th bit, read the
Kojto	90:cb3d968589d8	1687	* value of UARTx_C3[R8], then read the UARTx_D register.
Kojto	90:cb3d968589d8	1688	*/
Kojto	90:cb3d968589d8	1689	/@{/
Kojto	90:cb3d968589d8	1690	#define BP_UART_C3_R8 (7U) /!< Bit position for UART_C3_R8. /
Kojto	90:cb3d968589d8	1691	#define BM_UART_C3_R8 (0x80U) /!< Bit mask for UART_C3_R8. /
Kojto	90:cb3d968589d8	1692	#define BS_UART_C3_R8 (1U) /!< Bit field size in bits for UART_C3_R8. /
Kojto	90:cb3d968589d8	1693
Kojto	90:cb3d968589d8	1694	/! @brief Read current value of the UART_C3_R8 field. /
Kojto	90:cb3d968589d8	1695	#define BR_UART_C3_R8(x) (BITBAND_ACCESS8(HW_UART_C3_ADDR(x), BP_UART_C3_R8))
Kojto	90:cb3d968589d8	1696	/@}/
Kojto	90:cb3d968589d8	1697
Kojto	90:cb3d968589d8	1698	/*******************************************************************************
Kojto	90:cb3d968589d8	1699	* HW_UART_D - UART Data Register
Kojto	90:cb3d968589d8	1700	******************************************************************************/
Kojto	90:cb3d968589d8	1701
Kojto	90:cb3d968589d8	1702	/*!
Kojto	90:cb3d968589d8	1703	* @brief HW_UART_D - UART Data Register (RW)
Kojto	90:cb3d968589d8	1704	*
Kojto	90:cb3d968589d8	1705	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1706	*
Kojto	90:cb3d968589d8	1707	* This register is actually two separate registers. Reads return the contents
Kojto	90:cb3d968589d8	1708	* of the read-only receive data register and writes go to the write-only transmit
Kojto	90:cb3d968589d8	1709	* data register. In 8-bit or 9-bit data format, only UART data register (D)
Kojto	90:cb3d968589d8	1710	* needs to be accessed to clear the S1[RDRF] bit (assuming receiver buffer level is
Kojto	90:cb3d968589d8	1711	* less than RWFIFO[RXWATER]). The C3 register needs to be read, prior to the D
Kojto	90:cb3d968589d8	1712	* register, only if the ninth bit of data needs to be captured. Similarly, the
Kojto	90:cb3d968589d8	1713	* ED register needs to be read, prior to the D register, only if the additional
Kojto	90:cb3d968589d8	1714	* flag data for the dataword needs to be captured. In the normal 8-bit mode (M
Kojto	90:cb3d968589d8	1715	* bit cleared) if the parity is enabled, you get seven data bits and one parity
Kojto	90:cb3d968589d8	1716	* bit. That one parity bit is loaded into the D register. So, for the data bits,
Kojto	90:cb3d968589d8	1717	* mask off the parity bit from the value you read out of this register. When
Kojto	90:cb3d968589d8	1718	* transmitting in 9-bit data format and using 8-bit write instructions, write first
Kojto	90:cb3d968589d8	1719	* to transmit bit 8 in UART control register 3 (C3[T8]), then D. A write to
Kojto	90:cb3d968589d8	1720	* C3[T8] stores the data in a temporary register. If D register is written first,
Kojto	90:cb3d968589d8	1721	* and then the new data on data bus is stored in D, the temporary value written by
Kojto	90:cb3d968589d8	1722	* the last write to C3[T8] gets stored in the C3[T8] register.
Kojto	90:cb3d968589d8	1723	*/
Kojto	90:cb3d968589d8	1724	typedef union _hw_uart_d
Kojto	90:cb3d968589d8	1725	{
Kojto	90:cb3d968589d8	1726	uint8_t U;
Kojto	90:cb3d968589d8	1727	struct _hw_uart_d_bitfields
Kojto	90:cb3d968589d8	1728	{
Kojto	90:cb3d968589d8	1729	uint8_t RT : 8; /!< [7:0] /
Kojto	90:cb3d968589d8	1730	} B;
Kojto	90:cb3d968589d8	1731	} hw_uart_d_t;
Kojto	90:cb3d968589d8	1732
Kojto	90:cb3d968589d8	1733	/*!
Kojto	90:cb3d968589d8	1734	* @name Constants and macros for entire UART_D register
Kojto	90:cb3d968589d8	1735	*/
Kojto	90:cb3d968589d8	1736	/@{/
Kojto	90:cb3d968589d8	1737	#define HW_UART_D_ADDR(x) ((x) + 0x7U)
Kojto	90:cb3d968589d8	1738
Kojto	90:cb3d968589d8	1739	#define HW_UART_D(x) ((__IO hw_uart_d_t ) HW_UART_D_ADDR(x))
Kojto	90:cb3d968589d8	1740	#define HW_UART_D_RD(x) (HW_UART_D(x).U)
Kojto	90:cb3d968589d8	1741	#define HW_UART_D_WR(x, v) (HW_UART_D(x).U = (v))
Kojto	90:cb3d968589d8	1742	#define HW_UART_D_SET(x, v) (HW_UART_D_WR(x, HW_UART_D_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1743	#define HW_UART_D_CLR(x, v) (HW_UART_D_WR(x, HW_UART_D_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1744	#define HW_UART_D_TOG(x, v) (HW_UART_D_WR(x, HW_UART_D_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1745	/@}/
Kojto	90:cb3d968589d8	1746
Kojto	90:cb3d968589d8	1747	/*
Kojto	90:cb3d968589d8	1748	* Constants & macros for individual UART_D bitfields
Kojto	90:cb3d968589d8	1749	*/
Kojto	90:cb3d968589d8	1750
Kojto	90:cb3d968589d8	1751	/*!
Kojto	90:cb3d968589d8	1752	* @name Register UART_D, field RT[7:0] (RW)
Kojto	90:cb3d968589d8	1753	*
Kojto	90:cb3d968589d8	1754	* Reads return the contents of the read-only receive data register and writes
Kojto	90:cb3d968589d8	1755	* go to the write-only transmit data register.
Kojto	90:cb3d968589d8	1756	*/
Kojto	90:cb3d968589d8	1757	/@{/
Kojto	90:cb3d968589d8	1758	#define BP_UART_D_RT (0U) /!< Bit position for UART_D_RT. /
Kojto	90:cb3d968589d8	1759	#define BM_UART_D_RT (0xFFU) /!< Bit mask for UART_D_RT. /
Kojto	90:cb3d968589d8	1760	#define BS_UART_D_RT (8U) /!< Bit field size in bits for UART_D_RT. /
Kojto	90:cb3d968589d8	1761
Kojto	90:cb3d968589d8	1762	/! @brief Read current value of the UART_D_RT field. /
Kojto	90:cb3d968589d8	1763	#define BR_UART_D_RT(x) (HW_UART_D(x).U)
Kojto	90:cb3d968589d8	1764
Kojto	90:cb3d968589d8	1765	/! @brief Format value for bitfield UART_D_RT. /
Kojto	90:cb3d968589d8	1766	#define BF_UART_D_RT(v) ((uint8_t)((uint8_t)(v) << BP_UART_D_RT) & BM_UART_D_RT)
Kojto	90:cb3d968589d8	1767
Kojto	90:cb3d968589d8	1768	/! @brief Set the RT field to a new value. /
Kojto	90:cb3d968589d8	1769	#define BW_UART_D_RT(x, v) (HW_UART_D_WR(x, v))
Kojto	90:cb3d968589d8	1770	/@}/
Kojto	90:cb3d968589d8	1771
Kojto	90:cb3d968589d8	1772	/*******************************************************************************
Kojto	90:cb3d968589d8	1773	* HW_UART_MA1 - UART Match Address Registers 1
Kojto	90:cb3d968589d8	1774	******************************************************************************/
Kojto	90:cb3d968589d8	1775
Kojto	90:cb3d968589d8	1776	/*!
Kojto	90:cb3d968589d8	1777	* @brief HW_UART_MA1 - UART Match Address Registers 1 (RW)
Kojto	90:cb3d968589d8	1778	*
Kojto	90:cb3d968589d8	1779	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1780	*
Kojto	90:cb3d968589d8	1781	* The MA1 and MA2 registers are compared to input data addresses when the most
Kojto	90:cb3d968589d8	1782	* significant bit is set and the associated C4[MAEN] field is set. If a match
Kojto	90:cb3d968589d8	1783	* occurs, the following data is transferred to the data register. If a match
Kojto	90:cb3d968589d8	1784	* fails, the following data is discarded. These registers can be read and written at
Kojto	90:cb3d968589d8	1785	* anytime.
Kojto	90:cb3d968589d8	1786	*/
Kojto	90:cb3d968589d8	1787	typedef union _hw_uart_ma1
Kojto	90:cb3d968589d8	1788	{
Kojto	90:cb3d968589d8	1789	uint8_t U;
Kojto	90:cb3d968589d8	1790	struct _hw_uart_ma1_bitfields
Kojto	90:cb3d968589d8	1791	{
Kojto	90:cb3d968589d8	1792	uint8_t MA : 8; /!< [7:0] Match Address /
Kojto	90:cb3d968589d8	1793	} B;
Kojto	90:cb3d968589d8	1794	} hw_uart_ma1_t;
Kojto	90:cb3d968589d8	1795
Kojto	90:cb3d968589d8	1796	/*!
Kojto	90:cb3d968589d8	1797	* @name Constants and macros for entire UART_MA1 register
Kojto	90:cb3d968589d8	1798	*/
Kojto	90:cb3d968589d8	1799	/@{/
Kojto	90:cb3d968589d8	1800	#define HW_UART_MA1_ADDR(x) ((x) + 0x8U)
Kojto	90:cb3d968589d8	1801
Kojto	90:cb3d968589d8	1802	#define HW_UART_MA1(x) ((__IO hw_uart_ma1_t ) HW_UART_MA1_ADDR(x))
Kojto	90:cb3d968589d8	1803	#define HW_UART_MA1_RD(x) (HW_UART_MA1(x).U)
Kojto	90:cb3d968589d8	1804	#define HW_UART_MA1_WR(x, v) (HW_UART_MA1(x).U = (v))
Kojto	90:cb3d968589d8	1805	#define HW_UART_MA1_SET(x, v) (HW_UART_MA1_WR(x, HW_UART_MA1_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1806	#define HW_UART_MA1_CLR(x, v) (HW_UART_MA1_WR(x, HW_UART_MA1_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1807	#define HW_UART_MA1_TOG(x, v) (HW_UART_MA1_WR(x, HW_UART_MA1_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1808	/@}/
Kojto	90:cb3d968589d8	1809
Kojto	90:cb3d968589d8	1810	/*
Kojto	90:cb3d968589d8	1811	* Constants & macros for individual UART_MA1 bitfields
Kojto	90:cb3d968589d8	1812	*/
Kojto	90:cb3d968589d8	1813
Kojto	90:cb3d968589d8	1814	/*!
Kojto	90:cb3d968589d8	1815	* @name Register UART_MA1, field MA[7:0] (RW)
Kojto	90:cb3d968589d8	1816	*/
Kojto	90:cb3d968589d8	1817	/@{/
Kojto	90:cb3d968589d8	1818	#define BP_UART_MA1_MA (0U) /!< Bit position for UART_MA1_MA. /
Kojto	90:cb3d968589d8	1819	#define BM_UART_MA1_MA (0xFFU) /!< Bit mask for UART_MA1_MA. /
Kojto	90:cb3d968589d8	1820	#define BS_UART_MA1_MA (8U) /!< Bit field size in bits for UART_MA1_MA. /
Kojto	90:cb3d968589d8	1821
Kojto	90:cb3d968589d8	1822	/! @brief Read current value of the UART_MA1_MA field. /
Kojto	90:cb3d968589d8	1823	#define BR_UART_MA1_MA(x) (HW_UART_MA1(x).U)
Kojto	90:cb3d968589d8	1824
Kojto	90:cb3d968589d8	1825	/! @brief Format value for bitfield UART_MA1_MA. /
Kojto	90:cb3d968589d8	1826	#define BF_UART_MA1_MA(v) ((uint8_t)((uint8_t)(v) << BP_UART_MA1_MA) & BM_UART_MA1_MA)
Kojto	90:cb3d968589d8	1827
Kojto	90:cb3d968589d8	1828	/! @brief Set the MA field to a new value. /
Kojto	90:cb3d968589d8	1829	#define BW_UART_MA1_MA(x, v) (HW_UART_MA1_WR(x, v))
Kojto	90:cb3d968589d8	1830	/@}/
Kojto	90:cb3d968589d8	1831
Kojto	90:cb3d968589d8	1832	/*******************************************************************************
Kojto	90:cb3d968589d8	1833	* HW_UART_MA2 - UART Match Address Registers 2
Kojto	90:cb3d968589d8	1834	******************************************************************************/
Kojto	90:cb3d968589d8	1835
Kojto	90:cb3d968589d8	1836	/*!
Kojto	90:cb3d968589d8	1837	* @brief HW_UART_MA2 - UART Match Address Registers 2 (RW)
Kojto	90:cb3d968589d8	1838	*
Kojto	90:cb3d968589d8	1839	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1840	*
Kojto	90:cb3d968589d8	1841	* These registers can be read and written at anytime. The MA1 and MA2 registers
Kojto	90:cb3d968589d8	1842	* are compared to input data addresses when the most significant bit is set and
Kojto	90:cb3d968589d8	1843	* the associated C4[MAEN] field is set. If a match occurs, the following data
Kojto	90:cb3d968589d8	1844	* is transferred to the data register. If a match fails, the following data is
Kojto	90:cb3d968589d8	1845	* discarded.
Kojto	90:cb3d968589d8	1846	*/
Kojto	90:cb3d968589d8	1847	typedef union _hw_uart_ma2
Kojto	90:cb3d968589d8	1848	{
Kojto	90:cb3d968589d8	1849	uint8_t U;
Kojto	90:cb3d968589d8	1850	struct _hw_uart_ma2_bitfields
Kojto	90:cb3d968589d8	1851	{
Kojto	90:cb3d968589d8	1852	uint8_t MA : 8; /!< [7:0] Match Address /
Kojto	90:cb3d968589d8	1853	} B;
Kojto	90:cb3d968589d8	1854	} hw_uart_ma2_t;
Kojto	90:cb3d968589d8	1855
Kojto	90:cb3d968589d8	1856	/*!
Kojto	90:cb3d968589d8	1857	* @name Constants and macros for entire UART_MA2 register
Kojto	90:cb3d968589d8	1858	*/
Kojto	90:cb3d968589d8	1859	/@{/
Kojto	90:cb3d968589d8	1860	#define HW_UART_MA2_ADDR(x) ((x) + 0x9U)
Kojto	90:cb3d968589d8	1861
Kojto	90:cb3d968589d8	1862	#define HW_UART_MA2(x) ((__IO hw_uart_ma2_t ) HW_UART_MA2_ADDR(x))
Kojto	90:cb3d968589d8	1863	#define HW_UART_MA2_RD(x) (HW_UART_MA2(x).U)
Kojto	90:cb3d968589d8	1864	#define HW_UART_MA2_WR(x, v) (HW_UART_MA2(x).U = (v))
Kojto	90:cb3d968589d8	1865	#define HW_UART_MA2_SET(x, v) (HW_UART_MA2_WR(x, HW_UART_MA2_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1866	#define HW_UART_MA2_CLR(x, v) (HW_UART_MA2_WR(x, HW_UART_MA2_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1867	#define HW_UART_MA2_TOG(x, v) (HW_UART_MA2_WR(x, HW_UART_MA2_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1868	/@}/
Kojto	90:cb3d968589d8	1869
Kojto	90:cb3d968589d8	1870	/*
Kojto	90:cb3d968589d8	1871	* Constants & macros for individual UART_MA2 bitfields
Kojto	90:cb3d968589d8	1872	*/
Kojto	90:cb3d968589d8	1873
Kojto	90:cb3d968589d8	1874	/*!
Kojto	90:cb3d968589d8	1875	* @name Register UART_MA2, field MA[7:0] (RW)
Kojto	90:cb3d968589d8	1876	*/
Kojto	90:cb3d968589d8	1877	/@{/
Kojto	90:cb3d968589d8	1878	#define BP_UART_MA2_MA (0U) /!< Bit position for UART_MA2_MA. /
Kojto	90:cb3d968589d8	1879	#define BM_UART_MA2_MA (0xFFU) /!< Bit mask for UART_MA2_MA. /
Kojto	90:cb3d968589d8	1880	#define BS_UART_MA2_MA (8U) /!< Bit field size in bits for UART_MA2_MA. /
Kojto	90:cb3d968589d8	1881
Kojto	90:cb3d968589d8	1882	/! @brief Read current value of the UART_MA2_MA field. /
Kojto	90:cb3d968589d8	1883	#define BR_UART_MA2_MA(x) (HW_UART_MA2(x).U)
Kojto	90:cb3d968589d8	1884
Kojto	90:cb3d968589d8	1885	/! @brief Format value for bitfield UART_MA2_MA. /
Kojto	90:cb3d968589d8	1886	#define BF_UART_MA2_MA(v) ((uint8_t)((uint8_t)(v) << BP_UART_MA2_MA) & BM_UART_MA2_MA)
Kojto	90:cb3d968589d8	1887
Kojto	90:cb3d968589d8	1888	/! @brief Set the MA field to a new value. /
Kojto	90:cb3d968589d8	1889	#define BW_UART_MA2_MA(x, v) (HW_UART_MA2_WR(x, v))
Kojto	90:cb3d968589d8	1890	/@}/
Kojto	90:cb3d968589d8	1891
Kojto	90:cb3d968589d8	1892	/*******************************************************************************
Kojto	90:cb3d968589d8	1893	* HW_UART_C4 - UART Control Register 4
Kojto	90:cb3d968589d8	1894	******************************************************************************/
Kojto	90:cb3d968589d8	1895
Kojto	90:cb3d968589d8	1896	/*!
Kojto	90:cb3d968589d8	1897	* @brief HW_UART_C4 - UART Control Register 4 (RW)
Kojto	90:cb3d968589d8	1898	*
Kojto	90:cb3d968589d8	1899	* Reset value: 0x00U
Kojto	90:cb3d968589d8	1900	*/
Kojto	90:cb3d968589d8	1901	typedef union _hw_uart_c4
Kojto	90:cb3d968589d8	1902	{
Kojto	90:cb3d968589d8	1903	uint8_t U;
Kojto	90:cb3d968589d8	1904	struct _hw_uart_c4_bitfields
Kojto	90:cb3d968589d8	1905	{
Kojto	90:cb3d968589d8	1906	uint8_t BRFA : 5; /!< [4:0] Baud Rate Fine Adjust /
Kojto	90:cb3d968589d8	1907	uint8_t M10 : 1; /!< [5] 10-bit Mode select /
Kojto	90:cb3d968589d8	1908	uint8_t MAEN2 : 1; /!< [6] Match Address Mode Enable 2 /
Kojto	90:cb3d968589d8	1909	uint8_t MAEN1 : 1; /!< [7] Match Address Mode Enable 1 /
Kojto	90:cb3d968589d8	1910	} B;
Kojto	90:cb3d968589d8	1911	} hw_uart_c4_t;
Kojto	90:cb3d968589d8	1912
Kojto	90:cb3d968589d8	1913	/*!
Kojto	90:cb3d968589d8	1914	* @name Constants and macros for entire UART_C4 register
Kojto	90:cb3d968589d8	1915	*/
Kojto	90:cb3d968589d8	1916	/@{/
Kojto	90:cb3d968589d8	1917	#define HW_UART_C4_ADDR(x) ((x) + 0xAU)
Kojto	90:cb3d968589d8	1918
Kojto	90:cb3d968589d8	1919	#define HW_UART_C4(x) ((__IO hw_uart_c4_t ) HW_UART_C4_ADDR(x))
Kojto	90:cb3d968589d8	1920	#define HW_UART_C4_RD(x) (HW_UART_C4(x).U)
Kojto	90:cb3d968589d8	1921	#define HW_UART_C4_WR(x, v) (HW_UART_C4(x).U = (v))
Kojto	90:cb3d968589d8	1922	#define HW_UART_C4_SET(x, v) (HW_UART_C4_WR(x, HW_UART_C4_RD(x) \| (v)))
Kojto	90:cb3d968589d8	1923	#define HW_UART_C4_CLR(x, v) (HW_UART_C4_WR(x, HW_UART_C4_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	1924	#define HW_UART_C4_TOG(x, v) (HW_UART_C4_WR(x, HW_UART_C4_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	1925	/@}/
Kojto	90:cb3d968589d8	1926
Kojto	90:cb3d968589d8	1927	/*
Kojto	90:cb3d968589d8	1928	* Constants & macros for individual UART_C4 bitfields
Kojto	90:cb3d968589d8	1929	*/
Kojto	90:cb3d968589d8	1930
Kojto	90:cb3d968589d8	1931	/*!
Kojto	90:cb3d968589d8	1932	* @name Register UART_C4, field BRFA[4:0] (RW)
Kojto	90:cb3d968589d8	1933	*
Kojto	90:cb3d968589d8	1934	* This bit field is used to add more timing resolution to the average baud
Kojto	90:cb3d968589d8	1935	* frequency, in increments of 1/32. See Baud rate generation for more information.
Kojto	90:cb3d968589d8	1936	*/
Kojto	90:cb3d968589d8	1937	/@{/
Kojto	90:cb3d968589d8	1938	#define BP_UART_C4_BRFA (0U) /!< Bit position for UART_C4_BRFA. /
Kojto	90:cb3d968589d8	1939	#define BM_UART_C4_BRFA (0x1FU) /!< Bit mask for UART_C4_BRFA. /
Kojto	90:cb3d968589d8	1940	#define BS_UART_C4_BRFA (5U) /!< Bit field size in bits for UART_C4_BRFA. /
Kojto	90:cb3d968589d8	1941
Kojto	90:cb3d968589d8	1942	/! @brief Read current value of the UART_C4_BRFA field. /
Kojto	90:cb3d968589d8	1943	#define BR_UART_C4_BRFA(x) (HW_UART_C4(x).B.BRFA)
Kojto	90:cb3d968589d8	1944
Kojto	90:cb3d968589d8	1945	/! @brief Format value for bitfield UART_C4_BRFA. /
Kojto	90:cb3d968589d8	1946	#define BF_UART_C4_BRFA(v) ((uint8_t)((uint8_t)(v) << BP_UART_C4_BRFA) & BM_UART_C4_BRFA)
Kojto	90:cb3d968589d8	1947
Kojto	90:cb3d968589d8	1948	/! @brief Set the BRFA field to a new value. /
Kojto	90:cb3d968589d8	1949	#define BW_UART_C4_BRFA(x, v) (HW_UART_C4_WR(x, (HW_UART_C4_RD(x) & ~BM_UART_C4_BRFA) \| BF_UART_C4_BRFA(v)))
Kojto	90:cb3d968589d8	1950	/@}/
Kojto	90:cb3d968589d8	1951
Kojto	90:cb3d968589d8	1952	/*!
Kojto	90:cb3d968589d8	1953	* @name Register UART_C4, field M10[5] (RW)
Kojto	90:cb3d968589d8	1954	*
Kojto	90:cb3d968589d8	1955	* Causes a tenth, non-memory mapped bit to be part of the serial transmission.
Kojto	90:cb3d968589d8	1956	* This tenth bit is generated and interpreted as a parity bit. The M10 field
Kojto	90:cb3d968589d8	1957	* does not affect the LIN send or detect break behavior. If M10 is set, then both
Kojto	90:cb3d968589d8	1958	* C1[M] and C1[PE] must also be set. This field must be cleared when
Kojto	90:cb3d968589d8	1959	* C7816[ISO7816E] is set/enabled. See Data format (non ISO-7816) for more information.
Kojto	90:cb3d968589d8	1960	*
Kojto	90:cb3d968589d8	1961	* Values:
Kojto	90:cb3d968589d8	1962	* - 0 - The parity bit is the ninth bit in the serial transmission.
Kojto	90:cb3d968589d8	1963	* - 1 - The parity bit is the tenth bit in the serial transmission.
Kojto	90:cb3d968589d8	1964	*/
Kojto	90:cb3d968589d8	1965	/@{/
Kojto	90:cb3d968589d8	1966	#define BP_UART_C4_M10 (5U) /!< Bit position for UART_C4_M10. /
Kojto	90:cb3d968589d8	1967	#define BM_UART_C4_M10 (0x20U) /!< Bit mask for UART_C4_M10. /
Kojto	90:cb3d968589d8	1968	#define BS_UART_C4_M10 (1U) /!< Bit field size in bits for UART_C4_M10. /
Kojto	90:cb3d968589d8	1969
Kojto	90:cb3d968589d8	1970	/! @brief Read current value of the UART_C4_M10 field. /
Kojto	90:cb3d968589d8	1971	#define BR_UART_C4_M10(x) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_M10))
Kojto	90:cb3d968589d8	1972
Kojto	90:cb3d968589d8	1973	/! @brief Format value for bitfield UART_C4_M10. /
Kojto	90:cb3d968589d8	1974	#define BF_UART_C4_M10(v) ((uint8_t)((uint8_t)(v) << BP_UART_C4_M10) & BM_UART_C4_M10)
Kojto	90:cb3d968589d8	1975
Kojto	90:cb3d968589d8	1976	/! @brief Set the M10 field to a new value. /
Kojto	90:cb3d968589d8	1977	#define BW_UART_C4_M10(x, v) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_M10) = (v))
Kojto	90:cb3d968589d8	1978	/@}/
Kojto	90:cb3d968589d8	1979
Kojto	90:cb3d968589d8	1980	/*!
Kojto	90:cb3d968589d8	1981	* @name Register UART_C4, field MAEN2[6] (RW)
Kojto	90:cb3d968589d8	1982	*
Kojto	90:cb3d968589d8	1983	* See Match address operation for more information.
Kojto	90:cb3d968589d8	1984	*
Kojto	90:cb3d968589d8	1985	* Values:
Kojto	90:cb3d968589d8	1986	* - 0 - All data received is transferred to the data buffer if MAEN1 is cleared.
Kojto	90:cb3d968589d8	1987	* - 1 - All data received with the most significant bit cleared, is discarded.
Kojto	90:cb3d968589d8	1988	* All data received with the most significant bit set, is compared with
Kojto	90:cb3d968589d8	1989	* contents of MA2 register. If no match occurs, the data is discarded. If a
Kojto	90:cb3d968589d8	1990	* match occurs, data is transferred to the data buffer. This field must be
Kojto	90:cb3d968589d8	1991	* cleared when C7816[ISO7816E] is set/enabled.
Kojto	90:cb3d968589d8	1992	*/
Kojto	90:cb3d968589d8	1993	/@{/
Kojto	90:cb3d968589d8	1994	#define BP_UART_C4_MAEN2 (6U) /!< Bit position for UART_C4_MAEN2. /
Kojto	90:cb3d968589d8	1995	#define BM_UART_C4_MAEN2 (0x40U) /!< Bit mask for UART_C4_MAEN2. /
Kojto	90:cb3d968589d8	1996	#define BS_UART_C4_MAEN2 (1U) /!< Bit field size in bits for UART_C4_MAEN2. /
Kojto	90:cb3d968589d8	1997
Kojto	90:cb3d968589d8	1998	/! @brief Read current value of the UART_C4_MAEN2 field. /
Kojto	90:cb3d968589d8	1999	#define BR_UART_C4_MAEN2(x) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN2))
Kojto	90:cb3d968589d8	2000
Kojto	90:cb3d968589d8	2001	/! @brief Format value for bitfield UART_C4_MAEN2. /
Kojto	90:cb3d968589d8	2002	#define BF_UART_C4_MAEN2(v) ((uint8_t)((uint8_t)(v) << BP_UART_C4_MAEN2) & BM_UART_C4_MAEN2)
Kojto	90:cb3d968589d8	2003
Kojto	90:cb3d968589d8	2004	/! @brief Set the MAEN2 field to a new value. /
Kojto	90:cb3d968589d8	2005	#define BW_UART_C4_MAEN2(x, v) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN2) = (v))
Kojto	90:cb3d968589d8	2006	/@}/
Kojto	90:cb3d968589d8	2007
Kojto	90:cb3d968589d8	2008	/*!
Kojto	90:cb3d968589d8	2009	* @name Register UART_C4, field MAEN1[7] (RW)
Kojto	90:cb3d968589d8	2010	*
Kojto	90:cb3d968589d8	2011	* See Match address operation for more information.
Kojto	90:cb3d968589d8	2012	*
Kojto	90:cb3d968589d8	2013	* Values:
Kojto	90:cb3d968589d8	2014	* - 0 - All data received is transferred to the data buffer if MAEN2 is cleared.
Kojto	90:cb3d968589d8	2015	* - 1 - All data received with the most significant bit cleared, is discarded.
Kojto	90:cb3d968589d8	2016	* All data received with the most significant bit set, is compared with
Kojto	90:cb3d968589d8	2017	* contents of MA1 register. If no match occurs, the data is discarded. If match
Kojto	90:cb3d968589d8	2018	* occurs, data is transferred to the data buffer. This field must be cleared
Kojto	90:cb3d968589d8	2019	* when C7816[ISO7816E] is set/enabled.
Kojto	90:cb3d968589d8	2020	*/
Kojto	90:cb3d968589d8	2021	/@{/
Kojto	90:cb3d968589d8	2022	#define BP_UART_C4_MAEN1 (7U) /!< Bit position for UART_C4_MAEN1. /
Kojto	90:cb3d968589d8	2023	#define BM_UART_C4_MAEN1 (0x80U) /!< Bit mask for UART_C4_MAEN1. /
Kojto	90:cb3d968589d8	2024	#define BS_UART_C4_MAEN1 (1U) /!< Bit field size in bits for UART_C4_MAEN1. /
Kojto	90:cb3d968589d8	2025
Kojto	90:cb3d968589d8	2026	/! @brief Read current value of the UART_C4_MAEN1 field. /
Kojto	90:cb3d968589d8	2027	#define BR_UART_C4_MAEN1(x) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN1))
Kojto	90:cb3d968589d8	2028
Kojto	90:cb3d968589d8	2029	/! @brief Format value for bitfield UART_C4_MAEN1. /
Kojto	90:cb3d968589d8	2030	#define BF_UART_C4_MAEN1(v) ((uint8_t)((uint8_t)(v) << BP_UART_C4_MAEN1) & BM_UART_C4_MAEN1)
Kojto	90:cb3d968589d8	2031
Kojto	90:cb3d968589d8	2032	/! @brief Set the MAEN1 field to a new value. /
Kojto	90:cb3d968589d8	2033	#define BW_UART_C4_MAEN1(x, v) (BITBAND_ACCESS8(HW_UART_C4_ADDR(x), BP_UART_C4_MAEN1) = (v))
Kojto	90:cb3d968589d8	2034	/@}/
Kojto	90:cb3d968589d8	2035
Kojto	90:cb3d968589d8	2036	/*******************************************************************************
Kojto	90:cb3d968589d8	2037	* HW_UART_C5 - UART Control Register 5
Kojto	90:cb3d968589d8	2038	******************************************************************************/
Kojto	90:cb3d968589d8	2039
Kojto	90:cb3d968589d8	2040	/*!
Kojto	90:cb3d968589d8	2041	* @brief HW_UART_C5 - UART Control Register 5 (RW)
Kojto	90:cb3d968589d8	2042	*
Kojto	90:cb3d968589d8	2043	* Reset value: 0x00U
Kojto	90:cb3d968589d8	2044	*/
Kojto	90:cb3d968589d8	2045	typedef union _hw_uart_c5
Kojto	90:cb3d968589d8	2046	{
Kojto	90:cb3d968589d8	2047	uint8_t U;
Kojto	90:cb3d968589d8	2048	struct _hw_uart_c5_bitfields
Kojto	90:cb3d968589d8	2049	{
Kojto	90:cb3d968589d8	2050	uint8_t RESERVED0 : 3; /!< [2:0] /
Kojto	90:cb3d968589d8	2051	uint8_t LBKDDMAS : 1; /!< [3] LIN Break Detect DMA Select Bit /
Kojto	90:cb3d968589d8	2052	uint8_t ILDMAS : 1; /!< [4] Idle Line DMA Select /
Kojto	90:cb3d968589d8	2053	uint8_t RDMAS : 1; /!< [5] Receiver Full DMA Select /
Kojto	90:cb3d968589d8	2054	uint8_t TCDMAS : 1; /!< [6] Transmission Complete DMA Select /
Kojto	90:cb3d968589d8	2055	uint8_t TDMAS : 1; /!< [7] Transmitter DMA Select /
Kojto	90:cb3d968589d8	2056	} B;
Kojto	90:cb3d968589d8	2057	} hw_uart_c5_t;
Kojto	90:cb3d968589d8	2058
Kojto	90:cb3d968589d8	2059	/*!
Kojto	90:cb3d968589d8	2060	* @name Constants and macros for entire UART_C5 register
Kojto	90:cb3d968589d8	2061	*/
Kojto	90:cb3d968589d8	2062	/@{/
Kojto	90:cb3d968589d8	2063	#define HW_UART_C5_ADDR(x) ((x) + 0xBU)
Kojto	90:cb3d968589d8	2064
Kojto	90:cb3d968589d8	2065	#define HW_UART_C5(x) ((__IO hw_uart_c5_t ) HW_UART_C5_ADDR(x))
Kojto	90:cb3d968589d8	2066	#define HW_UART_C5_RD(x) (HW_UART_C5(x).U)
Kojto	90:cb3d968589d8	2067	#define HW_UART_C5_WR(x, v) (HW_UART_C5(x).U = (v))
Kojto	90:cb3d968589d8	2068	#define HW_UART_C5_SET(x, v) (HW_UART_C5_WR(x, HW_UART_C5_RD(x) \| (v)))
Kojto	90:cb3d968589d8	2069	#define HW_UART_C5_CLR(x, v) (HW_UART_C5_WR(x, HW_UART_C5_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	2070	#define HW_UART_C5_TOG(x, v) (HW_UART_C5_WR(x, HW_UART_C5_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	2071	/@}/
Kojto	90:cb3d968589d8	2072
Kojto	90:cb3d968589d8	2073	/*
Kojto	90:cb3d968589d8	2074	* Constants & macros for individual UART_C5 bitfields
Kojto	90:cb3d968589d8	2075	*/
Kojto	90:cb3d968589d8	2076
Kojto	90:cb3d968589d8	2077	/*!
Kojto	90:cb3d968589d8	2078	* @name Register UART_C5, field LBKDDMAS[3] (RW)
Kojto	90:cb3d968589d8	2079	*
Kojto	90:cb3d968589d8	2080	* Configures the LIN break detect flag, S2[LBKDIF], to generate interrupt or
Kojto	90:cb3d968589d8	2081	* DMA requests if BDH[LBKDIE] is set. If BDH[LBKDIE] is cleared, and S2[LBKDIF] is
Kojto	90:cb3d968589d8	2082	* set, the LBKDIF DMA and LBKDIF interrupt signals are not asserted, regardless
Kojto	90:cb3d968589d8	2083	* of the state of LBKDDMAS.
Kojto	90:cb3d968589d8	2084	*
Kojto	90:cb3d968589d8	2085	* Values:
Kojto	90:cb3d968589d8	2086	* - 0 - If BDH[LBKDIE] and S2[LBKDIF] are set, the LBKDIF interrupt signal is
Kojto	90:cb3d968589d8	2087	* asserted to request an interrupt service.
Kojto	90:cb3d968589d8	2088	* - 1 - If BDH[LBKDIE] and S2[LBKDIF] are set, the LBKDIF DMA request signal is
Kojto	90:cb3d968589d8	2089	* asserted to request a DMA transfer.
Kojto	90:cb3d968589d8	2090	*/
Kojto	90:cb3d968589d8	2091	/@{/
Kojto	90:cb3d968589d8	2092	#define BP_UART_C5_LBKDDMAS (3U) /!< Bit position for UART_C5_LBKDDMAS. /
Kojto	90:cb3d968589d8	2093	#define BM_UART_C5_LBKDDMAS (0x08U) /!< Bit mask for UART_C5_LBKDDMAS. /
Kojto	90:cb3d968589d8	2094	#define BS_UART_C5_LBKDDMAS (1U) /!< Bit field size in bits for UART_C5_LBKDDMAS. /
Kojto	90:cb3d968589d8	2095
Kojto	90:cb3d968589d8	2096	/! @brief Read current value of the UART_C5_LBKDDMAS field. /
Kojto	90:cb3d968589d8	2097	#define BR_UART_C5_LBKDDMAS(x) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_LBKDDMAS))
Kojto	90:cb3d968589d8	2098
Kojto	90:cb3d968589d8	2099	/! @brief Format value for bitfield UART_C5_LBKDDMAS. /
Kojto	90:cb3d968589d8	2100	#define BF_UART_C5_LBKDDMAS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C5_LBKDDMAS) & BM_UART_C5_LBKDDMAS)
Kojto	90:cb3d968589d8	2101
Kojto	90:cb3d968589d8	2102	/! @brief Set the LBKDDMAS field to a new value. /
Kojto	90:cb3d968589d8	2103	#define BW_UART_C5_LBKDDMAS(x, v) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_LBKDDMAS) = (v))
Kojto	90:cb3d968589d8	2104	/@}/
Kojto	90:cb3d968589d8	2105
Kojto	90:cb3d968589d8	2106	/*!
Kojto	90:cb3d968589d8	2107	* @name Register UART_C5, field ILDMAS[4] (RW)
Kojto	90:cb3d968589d8	2108	*
Kojto	90:cb3d968589d8	2109	* Configures the idle line flag, S1[IDLE], to generate interrupt or DMA
Kojto	90:cb3d968589d8	2110	* requests if C2[ILIE] is set. If C2[ILIE] is cleared, and S1[IDLE] is set, the IDLE
Kojto	90:cb3d968589d8	2111	* DMA and IDLE interrupt request signals are not asserted, regardless of the state
Kojto	90:cb3d968589d8	2112	* of ILDMAS.
Kojto	90:cb3d968589d8	2113	*
Kojto	90:cb3d968589d8	2114	* Values:
Kojto	90:cb3d968589d8	2115	* - 0 - If C2[ILIE] and S1[IDLE] are set, the IDLE interrupt request signal is
Kojto	90:cb3d968589d8	2116	* asserted to request an interrupt service.
Kojto	90:cb3d968589d8	2117	* - 1 - If C2[ILIE] and S1[IDLE] are set, the IDLE DMA request signal is
Kojto	90:cb3d968589d8	2118	* asserted to request a DMA transfer.
Kojto	90:cb3d968589d8	2119	*/
Kojto	90:cb3d968589d8	2120	/@{/
Kojto	90:cb3d968589d8	2121	#define BP_UART_C5_ILDMAS (4U) /!< Bit position for UART_C5_ILDMAS. /
Kojto	90:cb3d968589d8	2122	#define BM_UART_C5_ILDMAS (0x10U) /!< Bit mask for UART_C5_ILDMAS. /
Kojto	90:cb3d968589d8	2123	#define BS_UART_C5_ILDMAS (1U) /!< Bit field size in bits for UART_C5_ILDMAS. /
Kojto	90:cb3d968589d8	2124
Kojto	90:cb3d968589d8	2125	/! @brief Read current value of the UART_C5_ILDMAS field. /
Kojto	90:cb3d968589d8	2126	#define BR_UART_C5_ILDMAS(x) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_ILDMAS))
Kojto	90:cb3d968589d8	2127
Kojto	90:cb3d968589d8	2128	/! @brief Format value for bitfield UART_C5_ILDMAS. /
Kojto	90:cb3d968589d8	2129	#define BF_UART_C5_ILDMAS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C5_ILDMAS) & BM_UART_C5_ILDMAS)
Kojto	90:cb3d968589d8	2130
Kojto	90:cb3d968589d8	2131	/! @brief Set the ILDMAS field to a new value. /
Kojto	90:cb3d968589d8	2132	#define BW_UART_C5_ILDMAS(x, v) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_ILDMAS) = (v))
Kojto	90:cb3d968589d8	2133	/@}/
Kojto	90:cb3d968589d8	2134
Kojto	90:cb3d968589d8	2135	/*!
Kojto	90:cb3d968589d8	2136	* @name Register UART_C5, field RDMAS[5] (RW)
Kojto	90:cb3d968589d8	2137	*
Kojto	90:cb3d968589d8	2138	* Configures the receiver data register full flag, S1[RDRF], to generate
Kojto	90:cb3d968589d8	2139	* interrupt or DMA requests if C2[RIE] is set. If C2[RIE] is cleared, and S1[RDRF] is
Kojto	90:cb3d968589d8	2140	* set, the RDRF DMA and RDFR interrupt request signals are not asserted,
Kojto	90:cb3d968589d8	2141	* regardless of the state of RDMAS.
Kojto	90:cb3d968589d8	2142	*
Kojto	90:cb3d968589d8	2143	* Values:
Kojto	90:cb3d968589d8	2144	* - 0 - If C2[RIE] and S1[RDRF] are set, the RDFR interrupt request signal is
Kojto	90:cb3d968589d8	2145	* asserted to request an interrupt service.
Kojto	90:cb3d968589d8	2146	* - 1 - If C2[RIE] and S1[RDRF] are set, the RDRF DMA request signal is
Kojto	90:cb3d968589d8	2147	* asserted to request a DMA transfer.
Kojto	90:cb3d968589d8	2148	*/
Kojto	90:cb3d968589d8	2149	/@{/
Kojto	90:cb3d968589d8	2150	#define BP_UART_C5_RDMAS (5U) /!< Bit position for UART_C5_RDMAS. /
Kojto	90:cb3d968589d8	2151	#define BM_UART_C5_RDMAS (0x20U) /!< Bit mask for UART_C5_RDMAS. /
Kojto	90:cb3d968589d8	2152	#define BS_UART_C5_RDMAS (1U) /!< Bit field size in bits for UART_C5_RDMAS. /
Kojto	90:cb3d968589d8	2153
Kojto	90:cb3d968589d8	2154	/! @brief Read current value of the UART_C5_RDMAS field. /
Kojto	90:cb3d968589d8	2155	#define BR_UART_C5_RDMAS(x) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_RDMAS))
Kojto	90:cb3d968589d8	2156
Kojto	90:cb3d968589d8	2157	/! @brief Format value for bitfield UART_C5_RDMAS. /
Kojto	90:cb3d968589d8	2158	#define BF_UART_C5_RDMAS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C5_RDMAS) & BM_UART_C5_RDMAS)
Kojto	90:cb3d968589d8	2159
Kojto	90:cb3d968589d8	2160	/! @brief Set the RDMAS field to a new value. /
Kojto	90:cb3d968589d8	2161	#define BW_UART_C5_RDMAS(x, v) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_RDMAS) = (v))
Kojto	90:cb3d968589d8	2162	/@}/
Kojto	90:cb3d968589d8	2163
Kojto	90:cb3d968589d8	2164	/*!
Kojto	90:cb3d968589d8	2165	* @name Register UART_C5, field TCDMAS[6] (RW)
Kojto	90:cb3d968589d8	2166	*
Kojto	90:cb3d968589d8	2167	* Configures the transmission complete flag, S1[TC], to generate interrupt or
Kojto	90:cb3d968589d8	2168	* DMA requests if C2[TCIE] is set. If C2[TCIE] is cleared, the TC DMA and TC
Kojto	90:cb3d968589d8	2169	* interrupt request signals are not asserted when the S1[TC] flag is set, regardless
Kojto	90:cb3d968589d8	2170	* of the state of TCDMAS. If C2[TCIE] and TCDMAS are both set, then C2[TIE]
Kojto	90:cb3d968589d8	2171	* must be cleared, and D must not be written unless a DMA request is being serviced.
Kojto	90:cb3d968589d8	2172	*
Kojto	90:cb3d968589d8	2173	* Values:
Kojto	90:cb3d968589d8	2174	* - 0 - If C2[TCIE] is set and the S1[TC] flag is set, the TC interrupt request
Kojto	90:cb3d968589d8	2175	* signal is asserted to request an interrupt service.
Kojto	90:cb3d968589d8	2176	* - 1 - If C2[TCIE] is set and the S1[TC] flag is set, the TC DMA request
Kojto	90:cb3d968589d8	2177	* signal is asserted to request a DMA transfer.
Kojto	90:cb3d968589d8	2178	*/
Kojto	90:cb3d968589d8	2179	/@{/
Kojto	90:cb3d968589d8	2180	#define BP_UART_C5_TCDMAS (6U) /!< Bit position for UART_C5_TCDMAS. /
Kojto	90:cb3d968589d8	2181	#define BM_UART_C5_TCDMAS (0x40U) /!< Bit mask for UART_C5_TCDMAS. /
Kojto	90:cb3d968589d8	2182	#define BS_UART_C5_TCDMAS (1U) /!< Bit field size in bits for UART_C5_TCDMAS. /
Kojto	90:cb3d968589d8	2183
Kojto	90:cb3d968589d8	2184	/! @brief Read current value of the UART_C5_TCDMAS field. /
Kojto	90:cb3d968589d8	2185	#define BR_UART_C5_TCDMAS(x) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TCDMAS))
Kojto	90:cb3d968589d8	2186
Kojto	90:cb3d968589d8	2187	/! @brief Format value for bitfield UART_C5_TCDMAS. /
Kojto	90:cb3d968589d8	2188	#define BF_UART_C5_TCDMAS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C5_TCDMAS) & BM_UART_C5_TCDMAS)
Kojto	90:cb3d968589d8	2189
Kojto	90:cb3d968589d8	2190	/! @brief Set the TCDMAS field to a new value. /
Kojto	90:cb3d968589d8	2191	#define BW_UART_C5_TCDMAS(x, v) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TCDMAS) = (v))
Kojto	90:cb3d968589d8	2192	/@}/
Kojto	90:cb3d968589d8	2193
Kojto	90:cb3d968589d8	2194	/*!
Kojto	90:cb3d968589d8	2195	* @name Register UART_C5, field TDMAS[7] (RW)
Kojto	90:cb3d968589d8	2196	*
Kojto	90:cb3d968589d8	2197	* Configures the transmit data register empty flag, S1[TDRE], to generate
Kojto	90:cb3d968589d8	2198	* interrupt or DMA requests if C2[TIE] is set. If C2[TIE] is cleared, TDRE DMA and
Kojto	90:cb3d968589d8	2199	* TDRE interrupt request signals are not asserted when the TDRE flag is set,
Kojto	90:cb3d968589d8	2200	* regardless of the state of TDMAS. If C2[TIE] and TDMAS are both set, then C2[TCIE]
Kojto	90:cb3d968589d8	2201	* must be cleared, and D must not be written unless a DMA request is being
Kojto	90:cb3d968589d8	2202	* serviced.
Kojto	90:cb3d968589d8	2203	*
Kojto	90:cb3d968589d8	2204	* Values:
Kojto	90:cb3d968589d8	2205	* - 0 - If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE interrupt
Kojto	90:cb3d968589d8	2206	* request signal is asserted to request interrupt service.
Kojto	90:cb3d968589d8	2207	* - 1 - If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE DMA request
Kojto	90:cb3d968589d8	2208	* signal is asserted to request a DMA transfer.
Kojto	90:cb3d968589d8	2209	*/
Kojto	90:cb3d968589d8	2210	/@{/
Kojto	90:cb3d968589d8	2211	#define BP_UART_C5_TDMAS (7U) /!< Bit position for UART_C5_TDMAS. /
Kojto	90:cb3d968589d8	2212	#define BM_UART_C5_TDMAS (0x80U) /!< Bit mask for UART_C5_TDMAS. /
Kojto	90:cb3d968589d8	2213	#define BS_UART_C5_TDMAS (1U) /!< Bit field size in bits for UART_C5_TDMAS. /
Kojto	90:cb3d968589d8	2214
Kojto	90:cb3d968589d8	2215	/! @brief Read current value of the UART_C5_TDMAS field. /
Kojto	90:cb3d968589d8	2216	#define BR_UART_C5_TDMAS(x) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TDMAS))
Kojto	90:cb3d968589d8	2217
Kojto	90:cb3d968589d8	2218	/! @brief Format value for bitfield UART_C5_TDMAS. /
Kojto	90:cb3d968589d8	2219	#define BF_UART_C5_TDMAS(v) ((uint8_t)((uint8_t)(v) << BP_UART_C5_TDMAS) & BM_UART_C5_TDMAS)
Kojto	90:cb3d968589d8	2220
Kojto	90:cb3d968589d8	2221	/! @brief Set the TDMAS field to a new value. /
Kojto	90:cb3d968589d8	2222	#define BW_UART_C5_TDMAS(x, v) (BITBAND_ACCESS8(HW_UART_C5_ADDR(x), BP_UART_C5_TDMAS) = (v))
Kojto	90:cb3d968589d8	2223	/@}/
Kojto	90:cb3d968589d8	2224
Kojto	90:cb3d968589d8	2225	/*******************************************************************************
Kojto	90:cb3d968589d8	2226	* HW_UART_ED - UART Extended Data Register
Kojto	90:cb3d968589d8	2227	******************************************************************************/
Kojto	90:cb3d968589d8	2228
Kojto	90:cb3d968589d8	2229	/*!
Kojto	90:cb3d968589d8	2230	* @brief HW_UART_ED - UART Extended Data Register (RO)
Kojto	90:cb3d968589d8	2231	*
Kojto	90:cb3d968589d8	2232	* Reset value: 0x00U
Kojto	90:cb3d968589d8	2233	*
Kojto	90:cb3d968589d8	2234	* This register contains additional information flags that are stored with a
Kojto	90:cb3d968589d8	2235	* received dataword. This register may be read at any time but contains valid data
Kojto	90:cb3d968589d8	2236	* only if there is a dataword in the receive FIFO. The data contained in this
Kojto	90:cb3d968589d8	2237	* register represents additional information regarding the conditions on which a
Kojto	90:cb3d968589d8	2238	* dataword was received. The importance of this data varies with the
Kojto	90:cb3d968589d8	2239	* application, and in some cases maybe completely optional. These fields automatically
Kojto	90:cb3d968589d8	2240	* update to reflect the conditions of the next dataword whenever D is read. If
Kojto	90:cb3d968589d8	2241	* S1[NF] and S1[PF] have not been set since the last time the receive buffer was
Kojto	90:cb3d968589d8	2242	* empty, the NOISY and PARITYE fields will be zero.
Kojto	90:cb3d968589d8	2243	*/
Kojto	90:cb3d968589d8	2244	typedef union _hw_uart_ed
Kojto	90:cb3d968589d8	2245	{
Kojto	90:cb3d968589d8	2246	uint8_t U;
Kojto	90:cb3d968589d8	2247	struct _hw_uart_ed_bitfields
Kojto	90:cb3d968589d8	2248	{
Kojto	90:cb3d968589d8	2249	uint8_t RESERVED0 : 6; /!< [5:0] /
Kojto	90:cb3d968589d8	2250	uint8_t PARITYE : 1; /!< [6] /
Kojto	90:cb3d968589d8	2251	uint8_t NOISY : 1; /!< [7] /
Kojto	90:cb3d968589d8	2252	} B;
Kojto	90:cb3d968589d8	2253	} hw_uart_ed_t;
Kojto	90:cb3d968589d8	2254
Kojto	90:cb3d968589d8	2255	/*!
Kojto	90:cb3d968589d8	2256	* @name Constants and macros for entire UART_ED register
Kojto	90:cb3d968589d8	2257	*/
Kojto	90:cb3d968589d8	2258	/@{/
Kojto	90:cb3d968589d8	2259	#define HW_UART_ED_ADDR(x) ((x) + 0xCU)
Kojto	90:cb3d968589d8	2260
Kojto	90:cb3d968589d8	2261	#define HW_UART_ED(x) ((__I hw_uart_ed_t ) HW_UART_ED_ADDR(x))
Kojto	90:cb3d968589d8	2262	#define HW_UART_ED_RD(x) (HW_UART_ED(x).U)
Kojto	90:cb3d968589d8	2263	/@}/
Kojto	90:cb3d968589d8	2264
Kojto	90:cb3d968589d8	2265	/*
Kojto	90:cb3d968589d8	2266	* Constants & macros for individual UART_ED bitfields
Kojto	90:cb3d968589d8	2267	*/
Kojto	90:cb3d968589d8	2268
Kojto	90:cb3d968589d8	2269	/*!
Kojto	90:cb3d968589d8	2270	* @name Register UART_ED, field PARITYE[6] (RO)
Kojto	90:cb3d968589d8	2271	*
Kojto	90:cb3d968589d8	2272	* The current received dataword contained in D and C3[R8] was received with a
Kojto	90:cb3d968589d8	2273	* parity error.
Kojto	90:cb3d968589d8	2274	*
Kojto	90:cb3d968589d8	2275	* Values:
Kojto	90:cb3d968589d8	2276	* - 0 - The dataword was received without a parity error.
Kojto	90:cb3d968589d8	2277	* - 1 - The dataword was received with a parity error.
Kojto	90:cb3d968589d8	2278	*/
Kojto	90:cb3d968589d8	2279	/@{/
Kojto	90:cb3d968589d8	2280	#define BP_UART_ED_PARITYE (6U) /!< Bit position for UART_ED_PARITYE. /
Kojto	90:cb3d968589d8	2281	#define BM_UART_ED_PARITYE (0x40U) /!< Bit mask for UART_ED_PARITYE. /
Kojto	90:cb3d968589d8	2282	#define BS_UART_ED_PARITYE (1U) /!< Bit field size in bits for UART_ED_PARITYE. /
Kojto	90:cb3d968589d8	2283
Kojto	90:cb3d968589d8	2284	/! @brief Read current value of the UART_ED_PARITYE field. /
Kojto	90:cb3d968589d8	2285	#define BR_UART_ED_PARITYE(x) (BITBAND_ACCESS8(HW_UART_ED_ADDR(x), BP_UART_ED_PARITYE))
Kojto	90:cb3d968589d8	2286	/@}/
Kojto	90:cb3d968589d8	2287
Kojto	90:cb3d968589d8	2288	/*!
Kojto	90:cb3d968589d8	2289	* @name Register UART_ED, field NOISY[7] (RO)
Kojto	90:cb3d968589d8	2290	*
Kojto	90:cb3d968589d8	2291	* The current received dataword contained in D and C3[R8] was received with
Kojto	90:cb3d968589d8	2292	* noise.
Kojto	90:cb3d968589d8	2293	*
Kojto	90:cb3d968589d8	2294	* Values:
Kojto	90:cb3d968589d8	2295	* - 0 - The dataword was received without noise.
Kojto	90:cb3d968589d8	2296	* - 1 - The data was received with noise.
Kojto	90:cb3d968589d8	2297	*/
Kojto	90:cb3d968589d8	2298	/@{/
Kojto	90:cb3d968589d8	2299	#define BP_UART_ED_NOISY (7U) /!< Bit position for UART_ED_NOISY. /
Kojto	90:cb3d968589d8	2300	#define BM_UART_ED_NOISY (0x80U) /!< Bit mask for UART_ED_NOISY. /
Kojto	90:cb3d968589d8	2301	#define BS_UART_ED_NOISY (1U) /!< Bit field size in bits for UART_ED_NOISY. /
Kojto	90:cb3d968589d8	2302
Kojto	90:cb3d968589d8	2303	/! @brief Read current value of the UART_ED_NOISY field. /
Kojto	90:cb3d968589d8	2304	#define BR_UART_ED_NOISY(x) (BITBAND_ACCESS8(HW_UART_ED_ADDR(x), BP_UART_ED_NOISY))
Kojto	90:cb3d968589d8	2305	/@}/
Kojto	90:cb3d968589d8	2306
Kojto	90:cb3d968589d8	2307	/*******************************************************************************
Kojto	90:cb3d968589d8	2308	* HW_UART_MODEM - UART Modem Register
Kojto	90:cb3d968589d8	2309	******************************************************************************/
Kojto	90:cb3d968589d8	2310
Kojto	90:cb3d968589d8	2311	/*!
Kojto	90:cb3d968589d8	2312	* @brief HW_UART_MODEM - UART Modem Register (RW)
Kojto	90:cb3d968589d8	2313	*
Kojto	90:cb3d968589d8	2314	* Reset value: 0x00U
Kojto	90:cb3d968589d8	2315	*
Kojto	90:cb3d968589d8	2316	* The MODEM register controls options for setting the modem configuration.
Kojto	90:cb3d968589d8	2317	* RXRTSE, TXRTSPOL, TXRTSE, and TXCTSE must all be cleared when C7816[ISO7816EN] is
Kojto	90:cb3d968589d8	2318	* enabled. This will cause the RTS to deassert during ISO-7816 wait times. The
Kojto	90:cb3d968589d8	2319	* ISO-7816 protocol does not use the RTS and CTS signals.
Kojto	90:cb3d968589d8	2320	*/
Kojto	90:cb3d968589d8	2321	typedef union _hw_uart_modem
Kojto	90:cb3d968589d8	2322	{
Kojto	90:cb3d968589d8	2323	uint8_t U;
Kojto	90:cb3d968589d8	2324	struct _hw_uart_modem_bitfields
Kojto	90:cb3d968589d8	2325	{
Kojto	90:cb3d968589d8	2326	uint8_t TXCTSE : 1; /!< [0] Transmitter clear-to-send enable /
Kojto	90:cb3d968589d8	2327	uint8_t TXRTSE : 1; /!< [1] Transmitter request-to-send enable /
Kojto	90:cb3d968589d8	2328	uint8_t TXRTSPOL : 1; /!< [2] Transmitter request-to-send polarity /
Kojto	90:cb3d968589d8	2329	uint8_t RXRTSE : 1; /!< [3] Receiver request-to-send enable /
Kojto	90:cb3d968589d8	2330	uint8_t RESERVED0 : 4; /!< [7:4] /
Kojto	90:cb3d968589d8	2331	} B;
Kojto	90:cb3d968589d8	2332	} hw_uart_modem_t;
Kojto	90:cb3d968589d8	2333
Kojto	90:cb3d968589d8	2334	/*!
Kojto	90:cb3d968589d8	2335	* @name Constants and macros for entire UART_MODEM register
Kojto	90:cb3d968589d8	2336	*/
Kojto	90:cb3d968589d8	2337	/@{/
Kojto	90:cb3d968589d8	2338	#define HW_UART_MODEM_ADDR(x) ((x) + 0xDU)
Kojto	90:cb3d968589d8	2339
Kojto	90:cb3d968589d8	2340	#define HW_UART_MODEM(x) ((__IO hw_uart_modem_t ) HW_UART_MODEM_ADDR(x))
Kojto	90:cb3d968589d8	2341	#define HW_UART_MODEM_RD(x) (HW_UART_MODEM(x).U)
Kojto	90:cb3d968589d8	2342	#define HW_UART_MODEM_WR(x, v) (HW_UART_MODEM(x).U = (v))
Kojto	90:cb3d968589d8	2343	#define HW_UART_MODEM_SET(x, v) (HW_UART_MODEM_WR(x, HW_UART_MODEM_RD(x) \| (v)))
Kojto	90:cb3d968589d8	2344	#define HW_UART_MODEM_CLR(x, v) (HW_UART_MODEM_WR(x, HW_UART_MODEM_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	2345	#define HW_UART_MODEM_TOG(x, v) (HW_UART_MODEM_WR(x, HW_UART_MODEM_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	2346	/@}/
Kojto	90:cb3d968589d8	2347
Kojto	90:cb3d968589d8	2348	/*
Kojto	90:cb3d968589d8	2349	* Constants & macros for individual UART_MODEM bitfields
Kojto	90:cb3d968589d8	2350	*/
Kojto	90:cb3d968589d8	2351
Kojto	90:cb3d968589d8	2352	/*!
Kojto	90:cb3d968589d8	2353	* @name Register UART_MODEM, field TXCTSE[0] (RW)
Kojto	90:cb3d968589d8	2354	*
Kojto	90:cb3d968589d8	2355	* TXCTSE controls the operation of the transmitter. TXCTSE can be set
Kojto	90:cb3d968589d8	2356	* independently from the state of TXRTSE and RXRTSE.
Kojto	90:cb3d968589d8	2357	*
Kojto	90:cb3d968589d8	2358	* Values:
Kojto	90:cb3d968589d8	2359	* - 0 - CTS has no effect on the transmitter.
Kojto	90:cb3d968589d8	2360	* - 1 - Enables clear-to-send operation. The transmitter checks the state of
Kojto	90:cb3d968589d8	2361	* CTS each time it is ready to send a character. If CTS is asserted, the
Kojto	90:cb3d968589d8	2362	* character is sent. If CTS is deasserted, the signal TXD remains in the mark
Kojto	90:cb3d968589d8	2363	* state and transmission is delayed until CTS is asserted. Changes in CTS as a
Kojto	90:cb3d968589d8	2364	* character is being sent do not affect its transmission.
Kojto	90:cb3d968589d8	2365	*/
Kojto	90:cb3d968589d8	2366	/@{/
Kojto	90:cb3d968589d8	2367	#define BP_UART_MODEM_TXCTSE (0U) /!< Bit position for UART_MODEM_TXCTSE. /
Kojto	90:cb3d968589d8	2368	#define BM_UART_MODEM_TXCTSE (0x01U) /!< Bit mask for UART_MODEM_TXCTSE. /
Kojto	90:cb3d968589d8	2369	#define BS_UART_MODEM_TXCTSE (1U) /!< Bit field size in bits for UART_MODEM_TXCTSE. /
Kojto	90:cb3d968589d8	2370
Kojto	90:cb3d968589d8	2371	/! @brief Read current value of the UART_MODEM_TXCTSE field. /
Kojto	90:cb3d968589d8	2372	#define BR_UART_MODEM_TXCTSE(x) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXCTSE))
Kojto	90:cb3d968589d8	2373
Kojto	90:cb3d968589d8	2374	/! @brief Format value for bitfield UART_MODEM_TXCTSE. /
Kojto	90:cb3d968589d8	2375	#define BF_UART_MODEM_TXCTSE(v) ((uint8_t)((uint8_t)(v) << BP_UART_MODEM_TXCTSE) & BM_UART_MODEM_TXCTSE)
Kojto	90:cb3d968589d8	2376
Kojto	90:cb3d968589d8	2377	/! @brief Set the TXCTSE field to a new value. /
Kojto	90:cb3d968589d8	2378	#define BW_UART_MODEM_TXCTSE(x, v) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXCTSE) = (v))
Kojto	90:cb3d968589d8	2379	/@}/
Kojto	90:cb3d968589d8	2380
Kojto	90:cb3d968589d8	2381	/*!
Kojto	90:cb3d968589d8	2382	* @name Register UART_MODEM, field TXRTSE[1] (RW)
Kojto	90:cb3d968589d8	2383	*
Kojto	90:cb3d968589d8	2384	* Controls RTS before and after a transmission.
Kojto	90:cb3d968589d8	2385	*
Kojto	90:cb3d968589d8	2386	* Values:
Kojto	90:cb3d968589d8	2387	* - 0 - The transmitter has no effect on RTS.
Kojto	90:cb3d968589d8	2388	* - 1 - When a character is placed into an empty transmitter data buffer , RTS
Kojto	90:cb3d968589d8	2389	* asserts one bit time before the start bit is transmitted. RTS deasserts
Kojto	90:cb3d968589d8	2390	* one bit time after all characters in the transmitter data buffer and shift
Kojto	90:cb3d968589d8	2391	* register are completely sent, including the last stop bit. (FIFO) (FIFO)
Kojto	90:cb3d968589d8	2392	*/
Kojto	90:cb3d968589d8	2393	/@{/
Kojto	90:cb3d968589d8	2394	#define BP_UART_MODEM_TXRTSE (1U) /!< Bit position for UART_MODEM_TXRTSE. /
Kojto	90:cb3d968589d8	2395	#define BM_UART_MODEM_TXRTSE (0x02U) /!< Bit mask for UART_MODEM_TXRTSE. /
Kojto	90:cb3d968589d8	2396	#define BS_UART_MODEM_TXRTSE (1U) /!< Bit field size in bits for UART_MODEM_TXRTSE. /
Kojto	90:cb3d968589d8	2397
Kojto	90:cb3d968589d8	2398	/! @brief Read current value of the UART_MODEM_TXRTSE field. /
Kojto	90:cb3d968589d8	2399	#define BR_UART_MODEM_TXRTSE(x) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSE))
Kojto	90:cb3d968589d8	2400
Kojto	90:cb3d968589d8	2401	/! @brief Format value for bitfield UART_MODEM_TXRTSE. /
Kojto	90:cb3d968589d8	2402	#define BF_UART_MODEM_TXRTSE(v) ((uint8_t)((uint8_t)(v) << BP_UART_MODEM_TXRTSE) & BM_UART_MODEM_TXRTSE)
Kojto	90:cb3d968589d8	2403
Kojto	90:cb3d968589d8	2404	/! @brief Set the TXRTSE field to a new value. /
Kojto	90:cb3d968589d8	2405	#define BW_UART_MODEM_TXRTSE(x, v) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSE) = (v))
Kojto	90:cb3d968589d8	2406	/@}/
Kojto	90:cb3d968589d8	2407
Kojto	90:cb3d968589d8	2408	/*!
Kojto	90:cb3d968589d8	2409	* @name Register UART_MODEM, field TXRTSPOL[2] (RW)
Kojto	90:cb3d968589d8	2410	*
Kojto	90:cb3d968589d8	2411	* Controls the polarity of the transmitter RTS. TXRTSPOL does not affect the
Kojto	90:cb3d968589d8	2412	* polarity of the receiver RTS. RTS will remain negated in the active low state
Kojto	90:cb3d968589d8	2413	* unless TXRTSE is set.
Kojto	90:cb3d968589d8	2414	*
Kojto	90:cb3d968589d8	2415	* Values:
Kojto	90:cb3d968589d8	2416	* - 0 - Transmitter RTS is active low.
Kojto	90:cb3d968589d8	2417	* - 1 - Transmitter RTS is active high.
Kojto	90:cb3d968589d8	2418	*/
Kojto	90:cb3d968589d8	2419	/@{/
Kojto	90:cb3d968589d8	2420	#define BP_UART_MODEM_TXRTSPOL (2U) /!< Bit position for UART_MODEM_TXRTSPOL. /
Kojto	90:cb3d968589d8	2421	#define BM_UART_MODEM_TXRTSPOL (0x04U) /!< Bit mask for UART_MODEM_TXRTSPOL. /
Kojto	90:cb3d968589d8	2422	#define BS_UART_MODEM_TXRTSPOL (1U) /!< Bit field size in bits for UART_MODEM_TXRTSPOL. /
Kojto	90:cb3d968589d8	2423
Kojto	90:cb3d968589d8	2424	/! @brief Read current value of the UART_MODEM_TXRTSPOL field. /
Kojto	90:cb3d968589d8	2425	#define BR_UART_MODEM_TXRTSPOL(x) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSPOL))
Kojto	90:cb3d968589d8	2426
Kojto	90:cb3d968589d8	2427	/! @brief Format value for bitfield UART_MODEM_TXRTSPOL. /
Kojto	90:cb3d968589d8	2428	#define BF_UART_MODEM_TXRTSPOL(v) ((uint8_t)((uint8_t)(v) << BP_UART_MODEM_TXRTSPOL) & BM_UART_MODEM_TXRTSPOL)
Kojto	90:cb3d968589d8	2429
Kojto	90:cb3d968589d8	2430	/! @brief Set the TXRTSPOL field to a new value. /
Kojto	90:cb3d968589d8	2431	#define BW_UART_MODEM_TXRTSPOL(x, v) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_TXRTSPOL) = (v))
Kojto	90:cb3d968589d8	2432	/@}/
Kojto	90:cb3d968589d8	2433
Kojto	90:cb3d968589d8	2434	/*!
Kojto	90:cb3d968589d8	2435	* @name Register UART_MODEM, field RXRTSE[3] (RW)
Kojto	90:cb3d968589d8	2436	*
Kojto	90:cb3d968589d8	2437	* Allows the RTS output to control the CTS input of the transmitting device to
Kojto	90:cb3d968589d8	2438	* prevent receiver overrun. Do not set both RXRTSE and TXRTSE.
Kojto	90:cb3d968589d8	2439	*
Kojto	90:cb3d968589d8	2440	* Values:
Kojto	90:cb3d968589d8	2441	* - 0 - The receiver has no effect on RTS.
Kojto	90:cb3d968589d8	2442	* - 1 - RTS is deasserted if the number of characters in the receiver data
Kojto	90:cb3d968589d8	2443	* register (FIFO) is equal to or greater than RWFIFO[RXWATER]. RTS is asserted
Kojto	90:cb3d968589d8	2444	* when the number of characters in the receiver data register (FIFO) is less
Kojto	90:cb3d968589d8	2445	* than RWFIFO[RXWATER].
Kojto	90:cb3d968589d8	2446	*/
Kojto	90:cb3d968589d8	2447	/@{/
Kojto	90:cb3d968589d8	2448	#define BP_UART_MODEM_RXRTSE (3U) /!< Bit position for UART_MODEM_RXRTSE. /
Kojto	90:cb3d968589d8	2449	#define BM_UART_MODEM_RXRTSE (0x08U) /!< Bit mask for UART_MODEM_RXRTSE. /
Kojto	90:cb3d968589d8	2450	#define BS_UART_MODEM_RXRTSE (1U) /!< Bit field size in bits for UART_MODEM_RXRTSE. /
Kojto	90:cb3d968589d8	2451
Kojto	90:cb3d968589d8	2452	/! @brief Read current value of the UART_MODEM_RXRTSE field. /
Kojto	90:cb3d968589d8	2453	#define BR_UART_MODEM_RXRTSE(x) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_RXRTSE))
Kojto	90:cb3d968589d8	2454
Kojto	90:cb3d968589d8	2455	/! @brief Format value for bitfield UART_MODEM_RXRTSE. /
Kojto	90:cb3d968589d8	2456	#define BF_UART_MODEM_RXRTSE(v) ((uint8_t)((uint8_t)(v) << BP_UART_MODEM_RXRTSE) & BM_UART_MODEM_RXRTSE)
Kojto	90:cb3d968589d8	2457
Kojto	90:cb3d968589d8	2458	/! @brief Set the RXRTSE field to a new value. /
Kojto	90:cb3d968589d8	2459	#define BW_UART_MODEM_RXRTSE(x, v) (BITBAND_ACCESS8(HW_UART_MODEM_ADDR(x), BP_UART_MODEM_RXRTSE) = (v))
Kojto	90:cb3d968589d8	2460	/@}/
Kojto	90:cb3d968589d8	2461
Kojto	90:cb3d968589d8	2462	/*******************************************************************************
Kojto	90:cb3d968589d8	2463	* HW_UART_IR - UART Infrared Register
Kojto	90:cb3d968589d8	2464	******************************************************************************/
Kojto	90:cb3d968589d8	2465
Kojto	90:cb3d968589d8	2466	/*!
Kojto	90:cb3d968589d8	2467	* @brief HW_UART_IR - UART Infrared Register (RW)
Kojto	90:cb3d968589d8	2468	*
Kojto	90:cb3d968589d8	2469	* Reset value: 0x00U
Kojto	90:cb3d968589d8	2470	*
Kojto	90:cb3d968589d8	2471	* The IR register controls options for setting the infrared configuration.
Kojto	90:cb3d968589d8	2472	*/
Kojto	90:cb3d968589d8	2473	typedef union _hw_uart_ir
Kojto	90:cb3d968589d8	2474	{
Kojto	90:cb3d968589d8	2475	uint8_t U;
Kojto	90:cb3d968589d8	2476	struct _hw_uart_ir_bitfields
Kojto	90:cb3d968589d8	2477	{
Kojto	90:cb3d968589d8	2478	uint8_t TNP : 2; /!< [1:0] Transmitter narrow pulse /
Kojto	90:cb3d968589d8	2479	uint8_t IREN : 1; /!< [2] Infrared enable /
Kojto	90:cb3d968589d8	2480	uint8_t RESERVED0 : 5; /!< [7:3] /
Kojto	90:cb3d968589d8	2481	} B;
Kojto	90:cb3d968589d8	2482	} hw_uart_ir_t;
Kojto	90:cb3d968589d8	2483
Kojto	90:cb3d968589d8	2484	/*!
Kojto	90:cb3d968589d8	2485	* @name Constants and macros for entire UART_IR register
Kojto	90:cb3d968589d8	2486	*/
Kojto	90:cb3d968589d8	2487	/@{/
Kojto	90:cb3d968589d8	2488	#define HW_UART_IR_ADDR(x) ((x) + 0xEU)
Kojto	90:cb3d968589d8	2489
Kojto	90:cb3d968589d8	2490	#define HW_UART_IR(x) ((__IO hw_uart_ir_t ) HW_UART_IR_ADDR(x))
Kojto	90:cb3d968589d8	2491	#define HW_UART_IR_RD(x) (HW_UART_IR(x).U)
Kojto	90:cb3d968589d8	2492	#define HW_UART_IR_WR(x, v) (HW_UART_IR(x).U = (v))
Kojto	90:cb3d968589d8	2493	#define HW_UART_IR_SET(x, v) (HW_UART_IR_WR(x, HW_UART_IR_RD(x) \| (v)))
Kojto	90:cb3d968589d8	2494	#define HW_UART_IR_CLR(x, v) (HW_UART_IR_WR(x, HW_UART_IR_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	2495	#define HW_UART_IR_TOG(x, v) (HW_UART_IR_WR(x, HW_UART_IR_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	2496	/@}/
Kojto	90:cb3d968589d8	2497
Kojto	90:cb3d968589d8	2498	/*
Kojto	90:cb3d968589d8	2499	* Constants & macros for individual UART_IR bitfields
Kojto	90:cb3d968589d8	2500	*/
Kojto	90:cb3d968589d8	2501
Kojto	90:cb3d968589d8	2502	/*!
Kojto	90:cb3d968589d8	2503	* @name Register UART_IR, field TNP[1:0] (RW)
Kojto	90:cb3d968589d8	2504	*
Kojto	90:cb3d968589d8	2505	* Enables whether the UART transmits a 1/16, 3/16, 1/32, or 1/4 narrow pulse.
Kojto	90:cb3d968589d8	2506	*
Kojto	90:cb3d968589d8	2507	* Values:
Kojto	90:cb3d968589d8	2508	* - 00 - 3/16.
Kojto	90:cb3d968589d8	2509	* - 01 - 1/16.
Kojto	90:cb3d968589d8	2510	* - 10 - 1/32.
Kojto	90:cb3d968589d8	2511	* - 11 - 1/4.
Kojto	90:cb3d968589d8	2512	*/
Kojto	90:cb3d968589d8	2513	/@{/
Kojto	90:cb3d968589d8	2514	#define BP_UART_IR_TNP (0U) /!< Bit position for UART_IR_TNP. /
Kojto	90:cb3d968589d8	2515	#define BM_UART_IR_TNP (0x03U) /!< Bit mask for UART_IR_TNP. /
Kojto	90:cb3d968589d8	2516	#define BS_UART_IR_TNP (2U) /!< Bit field size in bits for UART_IR_TNP. /
Kojto	90:cb3d968589d8	2517
Kojto	90:cb3d968589d8	2518	/! @brief Read current value of the UART_IR_TNP field. /
Kojto	90:cb3d968589d8	2519	#define BR_UART_IR_TNP(x) (HW_UART_IR(x).B.TNP)
Kojto	90:cb3d968589d8	2520
Kojto	90:cb3d968589d8	2521	/! @brief Format value for bitfield UART_IR_TNP. /
Kojto	90:cb3d968589d8	2522	#define BF_UART_IR_TNP(v) ((uint8_t)((uint8_t)(v) << BP_UART_IR_TNP) & BM_UART_IR_TNP)
Kojto	90:cb3d968589d8	2523
Kojto	90:cb3d968589d8	2524	/! @brief Set the TNP field to a new value. /
Kojto	90:cb3d968589d8	2525	#define BW_UART_IR_TNP(x, v) (HW_UART_IR_WR(x, (HW_UART_IR_RD(x) & ~BM_UART_IR_TNP) \| BF_UART_IR_TNP(v)))
Kojto	90:cb3d968589d8	2526	/@}/
Kojto	90:cb3d968589d8	2527
Kojto	90:cb3d968589d8	2528	/*!
Kojto	90:cb3d968589d8	2529	* @name Register UART_IR, field IREN[2] (RW)
Kojto	90:cb3d968589d8	2530	*
Kojto	90:cb3d968589d8	2531	* Enables/disables the infrared modulation/demodulation.
Kojto	90:cb3d968589d8	2532	*
Kojto	90:cb3d968589d8	2533	* Values:
Kojto	90:cb3d968589d8	2534	* - 0 - IR disabled.
Kojto	90:cb3d968589d8	2535	* - 1 - IR enabled.
Kojto	90:cb3d968589d8	2536	*/
Kojto	90:cb3d968589d8	2537	/@{/
Kojto	90:cb3d968589d8	2538	#define BP_UART_IR_IREN (2U) /!< Bit position for UART_IR_IREN. /
Kojto	90:cb3d968589d8	2539	#define BM_UART_IR_IREN (0x04U) /!< Bit mask for UART_IR_IREN. /
Kojto	90:cb3d968589d8	2540	#define BS_UART_IR_IREN (1U) /!< Bit field size in bits for UART_IR_IREN. /
Kojto	90:cb3d968589d8	2541
Kojto	90:cb3d968589d8	2542	/! @brief Read current value of the UART_IR_IREN field. /
Kojto	90:cb3d968589d8	2543	#define BR_UART_IR_IREN(x) (BITBAND_ACCESS8(HW_UART_IR_ADDR(x), BP_UART_IR_IREN))
Kojto	90:cb3d968589d8	2544
Kojto	90:cb3d968589d8	2545	/! @brief Format value for bitfield UART_IR_IREN. /
Kojto	90:cb3d968589d8	2546	#define BF_UART_IR_IREN(v) ((uint8_t)((uint8_t)(v) << BP_UART_IR_IREN) & BM_UART_IR_IREN)
Kojto	90:cb3d968589d8	2547
Kojto	90:cb3d968589d8	2548	/! @brief Set the IREN field to a new value. /
Kojto	90:cb3d968589d8	2549	#define BW_UART_IR_IREN(x, v) (BITBAND_ACCESS8(HW_UART_IR_ADDR(x), BP_UART_IR_IREN) = (v))
Kojto	90:cb3d968589d8	2550	/@}/
Kojto	90:cb3d968589d8	2551
Kojto	90:cb3d968589d8	2552	/*******************************************************************************
Kojto	90:cb3d968589d8	2553	* HW_UART_PFIFO - UART FIFO Parameters
Kojto	90:cb3d968589d8	2554	******************************************************************************/
Kojto	90:cb3d968589d8	2555
Kojto	90:cb3d968589d8	2556	/*!
Kojto	90:cb3d968589d8	2557	* @brief HW_UART_PFIFO - UART FIFO Parameters (RW)
Kojto	90:cb3d968589d8	2558	*
Kojto	90:cb3d968589d8	2559	* Reset value: 0x00U
Kojto	90:cb3d968589d8	2560	*
Kojto	90:cb3d968589d8	2561	* This register provides the ability for the programmer to turn on and off FIFO
Kojto	90:cb3d968589d8	2562	* functionality. It also provides the size of the FIFO that has been
Kojto	90:cb3d968589d8	2563	* implemented. This register may be read at any time. This register must be written only
Kojto	90:cb3d968589d8	2564	* when C2[RE] and C2[TE] are cleared/not set and when the data buffer/FIFO is
Kojto	90:cb3d968589d8	2565	* empty.
Kojto	90:cb3d968589d8	2566	*/
Kojto	90:cb3d968589d8	2567	typedef union _hw_uart_pfifo
Kojto	90:cb3d968589d8	2568	{
Kojto	90:cb3d968589d8	2569	uint8_t U;
Kojto	90:cb3d968589d8	2570	struct _hw_uart_pfifo_bitfields
Kojto	90:cb3d968589d8	2571	{
Kojto	90:cb3d968589d8	2572	uint8_t RXFIFOSIZE : 3; /!< [2:0] Receive FIFO. Buffer Depth /
Kojto	90:cb3d968589d8	2573	uint8_t RXFE : 1; /!< [3] Receive FIFO Enable /
Kojto	90:cb3d968589d8	2574	uint8_t TXFIFOSIZE : 3; /!< [6:4] Transmit FIFO. Buffer Depth /
Kojto	90:cb3d968589d8	2575	uint8_t TXFE : 1; /!< [7] Transmit FIFO Enable /
Kojto	90:cb3d968589d8	2576	} B;
Kojto	90:cb3d968589d8	2577	} hw_uart_pfifo_t;
Kojto	90:cb3d968589d8	2578
Kojto	90:cb3d968589d8	2579	/*!
Kojto	90:cb3d968589d8	2580	* @name Constants and macros for entire UART_PFIFO register
Kojto	90:cb3d968589d8	2581	*/
Kojto	90:cb3d968589d8	2582	/@{/
Kojto	90:cb3d968589d8	2583	#define HW_UART_PFIFO_ADDR(x) ((x) + 0x10U)
Kojto	90:cb3d968589d8	2584
Kojto	90:cb3d968589d8	2585	#define HW_UART_PFIFO(x) ((__IO hw_uart_pfifo_t ) HW_UART_PFIFO_ADDR(x))
Kojto	90:cb3d968589d8	2586	#define HW_UART_PFIFO_RD(x) (HW_UART_PFIFO(x).U)
Kojto	90:cb3d968589d8	2587	#define HW_UART_PFIFO_WR(x, v) (HW_UART_PFIFO(x).U = (v))
Kojto	90:cb3d968589d8	2588	#define HW_UART_PFIFO_SET(x, v) (HW_UART_PFIFO_WR(x, HW_UART_PFIFO_RD(x) \| (v)))
Kojto	90:cb3d968589d8	2589	#define HW_UART_PFIFO_CLR(x, v) (HW_UART_PFIFO_WR(x, HW_UART_PFIFO_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	2590	#define HW_UART_PFIFO_TOG(x, v) (HW_UART_PFIFO_WR(x, HW_UART_PFIFO_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	2591	/@}/
Kojto	90:cb3d968589d8	2592
Kojto	90:cb3d968589d8	2593	/*
Kojto	90:cb3d968589d8	2594	* Constants & macros for individual UART_PFIFO bitfields
Kojto	90:cb3d968589d8	2595	*/
Kojto	90:cb3d968589d8	2596
Kojto	90:cb3d968589d8	2597	/*!
Kojto	90:cb3d968589d8	2598	* @name Register UART_PFIFO, field RXFIFOSIZE[2:0] (RO)
Kojto	90:cb3d968589d8	2599	*
Kojto	90:cb3d968589d8	2600	* The maximum number of receive datawords that can be stored in the receive
Kojto	90:cb3d968589d8	2601	* buffer before an overrun occurs. This field is read only.
Kojto	90:cb3d968589d8	2602	*
Kojto	90:cb3d968589d8	2603	* Values:
Kojto	90:cb3d968589d8	2604	* - 000 - Receive FIFO/Buffer depth = 1 dataword.
Kojto	90:cb3d968589d8	2605	* - 001 - Receive FIFO/Buffer depth = 4 datawords.
Kojto	90:cb3d968589d8	2606	* - 010 - Receive FIFO/Buffer depth = 8 datawords.
Kojto	90:cb3d968589d8	2607	* - 011 - Receive FIFO/Buffer depth = 16 datawords.
Kojto	90:cb3d968589d8	2608	* - 100 - Receive FIFO/Buffer depth = 32 datawords.
Kojto	90:cb3d968589d8	2609	* - 101 - Receive FIFO/Buffer depth = 64 datawords.
Kojto	90:cb3d968589d8	2610	* - 110 - Receive FIFO/Buffer depth = 128 datawords.
Kojto	90:cb3d968589d8	2611	* - 111 - Reserved.
Kojto	90:cb3d968589d8	2612	*/
Kojto	90:cb3d968589d8	2613	/@{/
Kojto	90:cb3d968589d8	2614	#define BP_UART_PFIFO_RXFIFOSIZE (0U) /!< Bit position for UART_PFIFO_RXFIFOSIZE. /
Kojto	90:cb3d968589d8	2615	#define BM_UART_PFIFO_RXFIFOSIZE (0x07U) /!< Bit mask for UART_PFIFO_RXFIFOSIZE. /
Kojto	90:cb3d968589d8	2616	#define BS_UART_PFIFO_RXFIFOSIZE (3U) /!< Bit field size in bits for UART_PFIFO_RXFIFOSIZE. /
Kojto	90:cb3d968589d8	2617
Kojto	90:cb3d968589d8	2618	/! @brief Read current value of the UART_PFIFO_RXFIFOSIZE field. /
Kojto	90:cb3d968589d8	2619	#define BR_UART_PFIFO_RXFIFOSIZE(x) (HW_UART_PFIFO(x).B.RXFIFOSIZE)
Kojto	90:cb3d968589d8	2620	/@}/
Kojto	90:cb3d968589d8	2621
Kojto	90:cb3d968589d8	2622	/*!
Kojto	90:cb3d968589d8	2623	* @name Register UART_PFIFO, field RXFE[3] (RW)
Kojto	90:cb3d968589d8	2624	*
Kojto	90:cb3d968589d8	2625	* When this field is set, the built in FIFO structure for the receive buffer is
Kojto	90:cb3d968589d8	2626	* enabled. The size of the FIFO structure is indicated by the RXFIFOSIZE field.
Kojto	90:cb3d968589d8	2627	* If this field is not set, the receive buffer operates as a FIFO of depth one
Kojto	90:cb3d968589d8	2628	* dataword regardless of the value in RXFIFOSIZE. Both C2[TE] and C2[RE] must be
Kojto	90:cb3d968589d8	2629	* cleared prior to changing this field. Additionally, TXFLUSH and RXFLUSH
Kojto	90:cb3d968589d8	2630	* commands must be issued immediately after changing this field.
Kojto	90:cb3d968589d8	2631	*
Kojto	90:cb3d968589d8	2632	* Values:
Kojto	90:cb3d968589d8	2633	* - 0 - Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)
Kojto	90:cb3d968589d8	2634	* - 1 - Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.
Kojto	90:cb3d968589d8	2635	*/
Kojto	90:cb3d968589d8	2636	/@{/
Kojto	90:cb3d968589d8	2637	#define BP_UART_PFIFO_RXFE (3U) /!< Bit position for UART_PFIFO_RXFE. /
Kojto	90:cb3d968589d8	2638	#define BM_UART_PFIFO_RXFE (0x08U) /!< Bit mask for UART_PFIFO_RXFE. /
Kojto	90:cb3d968589d8	2639	#define BS_UART_PFIFO_RXFE (1U) /!< Bit field size in bits for UART_PFIFO_RXFE. /
Kojto	90:cb3d968589d8	2640
Kojto	90:cb3d968589d8	2641	/! @brief Read current value of the UART_PFIFO_RXFE field. /
Kojto	90:cb3d968589d8	2642	#define BR_UART_PFIFO_RXFE(x) (BITBAND_ACCESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_RXFE))
Kojto	90:cb3d968589d8	2643
Kojto	90:cb3d968589d8	2644	/! @brief Format value for bitfield UART_PFIFO_RXFE. /
Kojto	90:cb3d968589d8	2645	#define BF_UART_PFIFO_RXFE(v) ((uint8_t)((uint8_t)(v) << BP_UART_PFIFO_RXFE) & BM_UART_PFIFO_RXFE)
Kojto	90:cb3d968589d8	2646
Kojto	90:cb3d968589d8	2647	/! @brief Set the RXFE field to a new value. /
Kojto	90:cb3d968589d8	2648	#define BW_UART_PFIFO_RXFE(x, v) (BITBAND_ACCESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_RXFE) = (v))
Kojto	90:cb3d968589d8	2649	/@}/
Kojto	90:cb3d968589d8	2650
Kojto	90:cb3d968589d8	2651	/*!
Kojto	90:cb3d968589d8	2652	* @name Register UART_PFIFO, field TXFIFOSIZE[6:4] (RO)
Kojto	90:cb3d968589d8	2653	*
Kojto	90:cb3d968589d8	2654	* The maximum number of transmit datawords that can be stored in the transmit
Kojto	90:cb3d968589d8	2655	* buffer. This field is read only.
Kojto	90:cb3d968589d8	2656	*
Kojto	90:cb3d968589d8	2657	* Values:
Kojto	90:cb3d968589d8	2658	* - 000 - Transmit FIFO/Buffer depth = 1 dataword.
Kojto	90:cb3d968589d8	2659	* - 001 - Transmit FIFO/Buffer depth = 4 datawords.
Kojto	90:cb3d968589d8	2660	* - 010 - Transmit FIFO/Buffer depth = 8 datawords.
Kojto	90:cb3d968589d8	2661	* - 011 - Transmit FIFO/Buffer depth = 16 datawords.
Kojto	90:cb3d968589d8	2662	* - 100 - Transmit FIFO/Buffer depth = 32 datawords.
Kojto	90:cb3d968589d8	2663	* - 101 - Transmit FIFO/Buffer depth = 64 datawords.
Kojto	90:cb3d968589d8	2664	* - 110 - Transmit FIFO/Buffer depth = 128 datawords.
Kojto	90:cb3d968589d8	2665	* - 111 - Reserved.
Kojto	90:cb3d968589d8	2666	*/
Kojto	90:cb3d968589d8	2667	/@{/
Kojto	90:cb3d968589d8	2668	#define BP_UART_PFIFO_TXFIFOSIZE (4U) /!< Bit position for UART_PFIFO_TXFIFOSIZE. /
Kojto	90:cb3d968589d8	2669	#define BM_UART_PFIFO_TXFIFOSIZE (0x70U) /!< Bit mask for UART_PFIFO_TXFIFOSIZE. /
Kojto	90:cb3d968589d8	2670	#define BS_UART_PFIFO_TXFIFOSIZE (3U) /!< Bit field size in bits for UART_PFIFO_TXFIFOSIZE. /
Kojto	90:cb3d968589d8	2671
Kojto	90:cb3d968589d8	2672	/! @brief Read current value of the UART_PFIFO_TXFIFOSIZE field. /
Kojto	90:cb3d968589d8	2673	#define BR_UART_PFIFO_TXFIFOSIZE(x) (HW_UART_PFIFO(x).B.TXFIFOSIZE)
Kojto	90:cb3d968589d8	2674	/@}/
Kojto	90:cb3d968589d8	2675
Kojto	90:cb3d968589d8	2676	/*!
Kojto	90:cb3d968589d8	2677	* @name Register UART_PFIFO, field TXFE[7] (RW)
Kojto	90:cb3d968589d8	2678	*
Kojto	90:cb3d968589d8	2679	* When this field is set, the built in FIFO structure for the transmit buffer
Kojto	90:cb3d968589d8	2680	* is enabled. The size of the FIFO structure is indicated by TXFIFOSIZE. If this
Kojto	90:cb3d968589d8	2681	* field is not set, the transmit buffer operates as a FIFO of depth one dataword
Kojto	90:cb3d968589d8	2682	* regardless of the value in TXFIFOSIZE. Both C2[TE] and C2[RE] must be cleared
Kojto	90:cb3d968589d8	2683	* prior to changing this field. Additionally, TXFLUSH and RXFLUSH commands must
Kojto	90:cb3d968589d8	2684	* be issued immediately after changing this field.
Kojto	90:cb3d968589d8	2685	*
Kojto	90:cb3d968589d8	2686	* Values:
Kojto	90:cb3d968589d8	2687	* - 0 - Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support).
Kojto	90:cb3d968589d8	2688	* - 1 - Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.
Kojto	90:cb3d968589d8	2689	*/
Kojto	90:cb3d968589d8	2690	/@{/
Kojto	90:cb3d968589d8	2691	#define BP_UART_PFIFO_TXFE (7U) /!< Bit position for UART_PFIFO_TXFE. /
Kojto	90:cb3d968589d8	2692	#define BM_UART_PFIFO_TXFE (0x80U) /!< Bit mask for UART_PFIFO_TXFE. /
Kojto	90:cb3d968589d8	2693	#define BS_UART_PFIFO_TXFE (1U) /!< Bit field size in bits for UART_PFIFO_TXFE. /
Kojto	90:cb3d968589d8	2694
Kojto	90:cb3d968589d8	2695	/! @brief Read current value of the UART_PFIFO_TXFE field. /
Kojto	90:cb3d968589d8	2696	#define BR_UART_PFIFO_TXFE(x) (BITBAND_ACCESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_TXFE))
Kojto	90:cb3d968589d8	2697
Kojto	90:cb3d968589d8	2698	/! @brief Format value for bitfield UART_PFIFO_TXFE. /
Kojto	90:cb3d968589d8	2699	#define BF_UART_PFIFO_TXFE(v) ((uint8_t)((uint8_t)(v) << BP_UART_PFIFO_TXFE) & BM_UART_PFIFO_TXFE)
Kojto	90:cb3d968589d8	2700
Kojto	90:cb3d968589d8	2701	/! @brief Set the TXFE field to a new value. /
Kojto	90:cb3d968589d8	2702	#define BW_UART_PFIFO_TXFE(x, v) (BITBAND_ACCESS8(HW_UART_PFIFO_ADDR(x), BP_UART_PFIFO_TXFE) = (v))
Kojto	90:cb3d968589d8	2703	/@}/
Kojto	90:cb3d968589d8	2704
Kojto	90:cb3d968589d8	2705	/*******************************************************************************
Kojto	90:cb3d968589d8	2706	* HW_UART_CFIFO - UART FIFO Control Register
Kojto	90:cb3d968589d8	2707	******************************************************************************/
Kojto	90:cb3d968589d8	2708
Kojto	90:cb3d968589d8	2709	/*!
Kojto	90:cb3d968589d8	2710	* @brief HW_UART_CFIFO - UART FIFO Control Register (RW)
Kojto	90:cb3d968589d8	2711	*
Kojto	90:cb3d968589d8	2712	* Reset value: 0x00U
Kojto	90:cb3d968589d8	2713	*
Kojto	90:cb3d968589d8	2714	* This register provides the ability to program various control fields for FIFO
Kojto	90:cb3d968589d8	2715	* operation. This register may be read or written at any time. Note that
Kojto	90:cb3d968589d8	2716	* writing to TXFLUSH and RXFLUSH may result in data loss and requires careful action
Kojto	90:cb3d968589d8	2717	* to prevent unintended/unpredictable behavior. Therefore, it is recommended that
Kojto	90:cb3d968589d8	2718	* TE and RE be cleared prior to flushing the corresponding FIFO.
Kojto	90:cb3d968589d8	2719	*/
Kojto	90:cb3d968589d8	2720	typedef union _hw_uart_cfifo
Kojto	90:cb3d968589d8	2721	{
Kojto	90:cb3d968589d8	2722	uint8_t U;
Kojto	90:cb3d968589d8	2723	struct _hw_uart_cfifo_bitfields
Kojto	90:cb3d968589d8	2724	{
Kojto	90:cb3d968589d8	2725	uint8_t RXUFE : 1; /!< [0] Receive FIFO Underflow Interrupt Enable /
Kojto	90:cb3d968589d8	2726	uint8_t TXOFE : 1; /!< [1] Transmit FIFO Overflow Interrupt Enable /
Kojto	90:cb3d968589d8	2727	uint8_t RXOFE : 1; /!< [2] Receive FIFO Overflow Interrupt Enable /
Kojto	90:cb3d968589d8	2728	uint8_t RESERVED0 : 3; /!< [5:3] /
Kojto	90:cb3d968589d8	2729	uint8_t RXFLUSH : 1; /!< [6] Receive FIFO/Buffer Flush /
Kojto	90:cb3d968589d8	2730	uint8_t TXFLUSH : 1; /!< [7] Transmit FIFO/Buffer Flush /
Kojto	90:cb3d968589d8	2731	} B;
Kojto	90:cb3d968589d8	2732	} hw_uart_cfifo_t;
Kojto	90:cb3d968589d8	2733
Kojto	90:cb3d968589d8	2734	/*!
Kojto	90:cb3d968589d8	2735	* @name Constants and macros for entire UART_CFIFO register
Kojto	90:cb3d968589d8	2736	*/
Kojto	90:cb3d968589d8	2737	/@{/
Kojto	90:cb3d968589d8	2738	#define HW_UART_CFIFO_ADDR(x) ((x) + 0x11U)
Kojto	90:cb3d968589d8	2739
Kojto	90:cb3d968589d8	2740	#define HW_UART_CFIFO(x) ((__IO hw_uart_cfifo_t ) HW_UART_CFIFO_ADDR(x))
Kojto	90:cb3d968589d8	2741	#define HW_UART_CFIFO_RD(x) (HW_UART_CFIFO(x).U)
Kojto	90:cb3d968589d8	2742	#define HW_UART_CFIFO_WR(x, v) (HW_UART_CFIFO(x).U = (v))
Kojto	90:cb3d968589d8	2743	#define HW_UART_CFIFO_SET(x, v) (HW_UART_CFIFO_WR(x, HW_UART_CFIFO_RD(x) \| (v)))
Kojto	90:cb3d968589d8	2744	#define HW_UART_CFIFO_CLR(x, v) (HW_UART_CFIFO_WR(x, HW_UART_CFIFO_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	2745	#define HW_UART_CFIFO_TOG(x, v) (HW_UART_CFIFO_WR(x, HW_UART_CFIFO_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	2746	/@}/
Kojto	90:cb3d968589d8	2747
Kojto	90:cb3d968589d8	2748	/*
Kojto	90:cb3d968589d8	2749	* Constants & macros for individual UART_CFIFO bitfields
Kojto	90:cb3d968589d8	2750	*/
Kojto	90:cb3d968589d8	2751
Kojto	90:cb3d968589d8	2752	/*!
Kojto	90:cb3d968589d8	2753	* @name Register UART_CFIFO, field RXUFE[0] (RW)
Kojto	90:cb3d968589d8	2754	*
Kojto	90:cb3d968589d8	2755	* When this field is set, the RXUF flag generates an interrupt to the host.
Kojto	90:cb3d968589d8	2756	*
Kojto	90:cb3d968589d8	2757	* Values:
Kojto	90:cb3d968589d8	2758	* - 0 - RXUF flag does not generate an interrupt to the host.
Kojto	90:cb3d968589d8	2759	* - 1 - RXUF flag generates an interrupt to the host.
Kojto	90:cb3d968589d8	2760	*/
Kojto	90:cb3d968589d8	2761	/@{/
Kojto	90:cb3d968589d8	2762	#define BP_UART_CFIFO_RXUFE (0U) /!< Bit position for UART_CFIFO_RXUFE. /
Kojto	90:cb3d968589d8	2763	#define BM_UART_CFIFO_RXUFE (0x01U) /!< Bit mask for UART_CFIFO_RXUFE. /
Kojto	90:cb3d968589d8	2764	#define BS_UART_CFIFO_RXUFE (1U) /!< Bit field size in bits for UART_CFIFO_RXUFE. /
Kojto	90:cb3d968589d8	2765
Kojto	90:cb3d968589d8	2766	/! @brief Read current value of the UART_CFIFO_RXUFE field. /
Kojto	90:cb3d968589d8	2767	#define BR_UART_CFIFO_RXUFE(x) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXUFE))
Kojto	90:cb3d968589d8	2768
Kojto	90:cb3d968589d8	2769	/! @brief Format value for bitfield UART_CFIFO_RXUFE. /
Kojto	90:cb3d968589d8	2770	#define BF_UART_CFIFO_RXUFE(v) ((uint8_t)((uint8_t)(v) << BP_UART_CFIFO_RXUFE) & BM_UART_CFIFO_RXUFE)
Kojto	90:cb3d968589d8	2771
Kojto	90:cb3d968589d8	2772	/! @brief Set the RXUFE field to a new value. /
Kojto	90:cb3d968589d8	2773	#define BW_UART_CFIFO_RXUFE(x, v) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXUFE) = (v))
Kojto	90:cb3d968589d8	2774	/@}/
Kojto	90:cb3d968589d8	2775
Kojto	90:cb3d968589d8	2776	/*!
Kojto	90:cb3d968589d8	2777	* @name Register UART_CFIFO, field TXOFE[1] (RW)
Kojto	90:cb3d968589d8	2778	*
Kojto	90:cb3d968589d8	2779	* When this field is set, the TXOF flag generates an interrupt to the host.
Kojto	90:cb3d968589d8	2780	*
Kojto	90:cb3d968589d8	2781	* Values:
Kojto	90:cb3d968589d8	2782	* - 0 - TXOF flag does not generate an interrupt to the host.
Kojto	90:cb3d968589d8	2783	* - 1 - TXOF flag generates an interrupt to the host.
Kojto	90:cb3d968589d8	2784	*/
Kojto	90:cb3d968589d8	2785	/@{/
Kojto	90:cb3d968589d8	2786	#define BP_UART_CFIFO_TXOFE (1U) /!< Bit position for UART_CFIFO_TXOFE. /
Kojto	90:cb3d968589d8	2787	#define BM_UART_CFIFO_TXOFE (0x02U) /!< Bit mask for UART_CFIFO_TXOFE. /
Kojto	90:cb3d968589d8	2788	#define BS_UART_CFIFO_TXOFE (1U) /!< Bit field size in bits for UART_CFIFO_TXOFE. /
Kojto	90:cb3d968589d8	2789
Kojto	90:cb3d968589d8	2790	/! @brief Read current value of the UART_CFIFO_TXOFE field. /
Kojto	90:cb3d968589d8	2791	#define BR_UART_CFIFO_TXOFE(x) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_TXOFE))
Kojto	90:cb3d968589d8	2792
Kojto	90:cb3d968589d8	2793	/! @brief Format value for bitfield UART_CFIFO_TXOFE. /
Kojto	90:cb3d968589d8	2794	#define BF_UART_CFIFO_TXOFE(v) ((uint8_t)((uint8_t)(v) << BP_UART_CFIFO_TXOFE) & BM_UART_CFIFO_TXOFE)
Kojto	90:cb3d968589d8	2795
Kojto	90:cb3d968589d8	2796	/! @brief Set the TXOFE field to a new value. /
Kojto	90:cb3d968589d8	2797	#define BW_UART_CFIFO_TXOFE(x, v) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_TXOFE) = (v))
Kojto	90:cb3d968589d8	2798	/@}/
Kojto	90:cb3d968589d8	2799
Kojto	90:cb3d968589d8	2800	/*!
Kojto	90:cb3d968589d8	2801	* @name Register UART_CFIFO, field RXOFE[2] (RW)
Kojto	90:cb3d968589d8	2802	*
Kojto	90:cb3d968589d8	2803	* When this field is set, the RXOF flag generates an interrupt to the host.
Kojto	90:cb3d968589d8	2804	*
Kojto	90:cb3d968589d8	2805	* Values:
Kojto	90:cb3d968589d8	2806	* - 0 - RXOF flag does not generate an interrupt to the host.
Kojto	90:cb3d968589d8	2807	* - 1 - RXOF flag generates an interrupt to the host.
Kojto	90:cb3d968589d8	2808	*/
Kojto	90:cb3d968589d8	2809	/@{/
Kojto	90:cb3d968589d8	2810	#define BP_UART_CFIFO_RXOFE (2U) /!< Bit position for UART_CFIFO_RXOFE. /
Kojto	90:cb3d968589d8	2811	#define BM_UART_CFIFO_RXOFE (0x04U) /!< Bit mask for UART_CFIFO_RXOFE. /
Kojto	90:cb3d968589d8	2812	#define BS_UART_CFIFO_RXOFE (1U) /!< Bit field size in bits for UART_CFIFO_RXOFE. /
Kojto	90:cb3d968589d8	2813
Kojto	90:cb3d968589d8	2814	/! @brief Read current value of the UART_CFIFO_RXOFE field. /
Kojto	90:cb3d968589d8	2815	#define BR_UART_CFIFO_RXOFE(x) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXOFE))
Kojto	90:cb3d968589d8	2816
Kojto	90:cb3d968589d8	2817	/! @brief Format value for bitfield UART_CFIFO_RXOFE. /
Kojto	90:cb3d968589d8	2818	#define BF_UART_CFIFO_RXOFE(v) ((uint8_t)((uint8_t)(v) << BP_UART_CFIFO_RXOFE) & BM_UART_CFIFO_RXOFE)
Kojto	90:cb3d968589d8	2819
Kojto	90:cb3d968589d8	2820	/! @brief Set the RXOFE field to a new value. /
Kojto	90:cb3d968589d8	2821	#define BW_UART_CFIFO_RXOFE(x, v) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXOFE) = (v))
Kojto	90:cb3d968589d8	2822	/@}/
Kojto	90:cb3d968589d8	2823
Kojto	90:cb3d968589d8	2824	/*!
Kojto	90:cb3d968589d8	2825	* @name Register UART_CFIFO, field RXFLUSH[6] (WORZ)
Kojto	90:cb3d968589d8	2826	*
Kojto	90:cb3d968589d8	2827	* Writing to this field causes all data that is stored in the receive
Kojto	90:cb3d968589d8	2828	* FIFO/buffer to be flushed. This does not affect data that is in the receive shift
Kojto	90:cb3d968589d8	2829	* register.
Kojto	90:cb3d968589d8	2830	*
Kojto	90:cb3d968589d8	2831	* Values:
Kojto	90:cb3d968589d8	2832	* - 0 - No flush operation occurs.
Kojto	90:cb3d968589d8	2833	* - 1 - All data in the receive FIFO/buffer is cleared out.
Kojto	90:cb3d968589d8	2834	*/
Kojto	90:cb3d968589d8	2835	/@{/
Kojto	90:cb3d968589d8	2836	#define BP_UART_CFIFO_RXFLUSH (6U) /!< Bit position for UART_CFIFO_RXFLUSH. /
Kojto	90:cb3d968589d8	2837	#define BM_UART_CFIFO_RXFLUSH (0x40U) /!< Bit mask for UART_CFIFO_RXFLUSH. /
Kojto	90:cb3d968589d8	2838	#define BS_UART_CFIFO_RXFLUSH (1U) /!< Bit field size in bits for UART_CFIFO_RXFLUSH. /
Kojto	90:cb3d968589d8	2839
Kojto	90:cb3d968589d8	2840	/! @brief Format value for bitfield UART_CFIFO_RXFLUSH. /
Kojto	90:cb3d968589d8	2841	#define BF_UART_CFIFO_RXFLUSH(v) ((uint8_t)((uint8_t)(v) << BP_UART_CFIFO_RXFLUSH) & BM_UART_CFIFO_RXFLUSH)
Kojto	90:cb3d968589d8	2842
Kojto	90:cb3d968589d8	2843	/! @brief Set the RXFLUSH field to a new value. /
Kojto	90:cb3d968589d8	2844	#define BW_UART_CFIFO_RXFLUSH(x, v) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_RXFLUSH) = (v))
Kojto	90:cb3d968589d8	2845	/@}/
Kojto	90:cb3d968589d8	2846
Kojto	90:cb3d968589d8	2847	/*!
Kojto	90:cb3d968589d8	2848	* @name Register UART_CFIFO, field TXFLUSH[7] (WORZ)
Kojto	90:cb3d968589d8	2849	*
Kojto	90:cb3d968589d8	2850	* Writing to this field causes all data that is stored in the transmit
Kojto	90:cb3d968589d8	2851	* FIFO/buffer to be flushed. This does not affect data that is in the transmit shift
Kojto	90:cb3d968589d8	2852	* register.
Kojto	90:cb3d968589d8	2853	*
Kojto	90:cb3d968589d8	2854	* Values:
Kojto	90:cb3d968589d8	2855	* - 0 - No flush operation occurs.
Kojto	90:cb3d968589d8	2856	* - 1 - All data in the transmit FIFO/Buffer is cleared out.
Kojto	90:cb3d968589d8	2857	*/
Kojto	90:cb3d968589d8	2858	/@{/
Kojto	90:cb3d968589d8	2859	#define BP_UART_CFIFO_TXFLUSH (7U) /!< Bit position for UART_CFIFO_TXFLUSH. /
Kojto	90:cb3d968589d8	2860	#define BM_UART_CFIFO_TXFLUSH (0x80U) /!< Bit mask for UART_CFIFO_TXFLUSH. /
Kojto	90:cb3d968589d8	2861	#define BS_UART_CFIFO_TXFLUSH (1U) /!< Bit field size in bits for UART_CFIFO_TXFLUSH. /
Kojto	90:cb3d968589d8	2862
Kojto	90:cb3d968589d8	2863	/! @brief Format value for bitfield UART_CFIFO_TXFLUSH. /
Kojto	90:cb3d968589d8	2864	#define BF_UART_CFIFO_TXFLUSH(v) ((uint8_t)((uint8_t)(v) << BP_UART_CFIFO_TXFLUSH) & BM_UART_CFIFO_TXFLUSH)
Kojto	90:cb3d968589d8	2865
Kojto	90:cb3d968589d8	2866	/! @brief Set the TXFLUSH field to a new value. /
Kojto	90:cb3d968589d8	2867	#define BW_UART_CFIFO_TXFLUSH(x, v) (BITBAND_ACCESS8(HW_UART_CFIFO_ADDR(x), BP_UART_CFIFO_TXFLUSH) = (v))
Kojto	90:cb3d968589d8	2868	/@}/
Kojto	90:cb3d968589d8	2869
Kojto	90:cb3d968589d8	2870	/*******************************************************************************
Kojto	90:cb3d968589d8	2871	* HW_UART_SFIFO - UART FIFO Status Register
Kojto	90:cb3d968589d8	2872	******************************************************************************/
Kojto	90:cb3d968589d8	2873
Kojto	90:cb3d968589d8	2874	/*!
Kojto	90:cb3d968589d8	2875	* @brief HW_UART_SFIFO - UART FIFO Status Register (RW)
Kojto	90:cb3d968589d8	2876	*
Kojto	90:cb3d968589d8	2877	* Reset value: 0xC0U
Kojto	90:cb3d968589d8	2878	*
Kojto	90:cb3d968589d8	2879	* This register provides status information regarding the transmit and receiver
Kojto	90:cb3d968589d8	2880	* buffers/FIFOs, including interrupt information. This register may be written
Kojto	90:cb3d968589d8	2881	* to or read at any time.
Kojto	90:cb3d968589d8	2882	*/
Kojto	90:cb3d968589d8	2883	typedef union _hw_uart_sfifo
Kojto	90:cb3d968589d8	2884	{
Kojto	90:cb3d968589d8	2885	uint8_t U;
Kojto	90:cb3d968589d8	2886	struct _hw_uart_sfifo_bitfields
Kojto	90:cb3d968589d8	2887	{
Kojto	90:cb3d968589d8	2888	uint8_t RXUF : 1; /!< [0] Receiver Buffer Underflow Flag /
Kojto	90:cb3d968589d8	2889	uint8_t TXOF : 1; /!< [1] Transmitter Buffer Overflow Flag /
Kojto	90:cb3d968589d8	2890	uint8_t RXOF : 1; /!< [2] Receiver Buffer Overflow Flag /
Kojto	90:cb3d968589d8	2891	uint8_t RESERVED0 : 3; /!< [5:3] /
Kojto	90:cb3d968589d8	2892	uint8_t RXEMPT : 1; /!< [6] Receive Buffer/FIFO Empty /
Kojto	90:cb3d968589d8	2893	uint8_t TXEMPT : 1; /!< [7] Transmit Buffer/FIFO Empty /
Kojto	90:cb3d968589d8	2894	} B;
Kojto	90:cb3d968589d8	2895	} hw_uart_sfifo_t;
Kojto	90:cb3d968589d8	2896
Kojto	90:cb3d968589d8	2897	/*!
Kojto	90:cb3d968589d8	2898	* @name Constants and macros for entire UART_SFIFO register
Kojto	90:cb3d968589d8	2899	*/
Kojto	90:cb3d968589d8	2900	/@{/
Kojto	90:cb3d968589d8	2901	#define HW_UART_SFIFO_ADDR(x) ((x) + 0x12U)
Kojto	90:cb3d968589d8	2902
Kojto	90:cb3d968589d8	2903	#define HW_UART_SFIFO(x) ((__IO hw_uart_sfifo_t ) HW_UART_SFIFO_ADDR(x))
Kojto	90:cb3d968589d8	2904	#define HW_UART_SFIFO_RD(x) (HW_UART_SFIFO(x).U)
Kojto	90:cb3d968589d8	2905	#define HW_UART_SFIFO_WR(x, v) (HW_UART_SFIFO(x).U = (v))
Kojto	90:cb3d968589d8	2906	#define HW_UART_SFIFO_SET(x, v) (HW_UART_SFIFO_WR(x, HW_UART_SFIFO_RD(x) \| (v)))
Kojto	90:cb3d968589d8	2907	#define HW_UART_SFIFO_CLR(x, v) (HW_UART_SFIFO_WR(x, HW_UART_SFIFO_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	2908	#define HW_UART_SFIFO_TOG(x, v) (HW_UART_SFIFO_WR(x, HW_UART_SFIFO_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	2909	/@}/
Kojto	90:cb3d968589d8	2910
Kojto	90:cb3d968589d8	2911	/*
Kojto	90:cb3d968589d8	2912	* Constants & macros for individual UART_SFIFO bitfields
Kojto	90:cb3d968589d8	2913	*/
Kojto	90:cb3d968589d8	2914
Kojto	90:cb3d968589d8	2915	/*!
Kojto	90:cb3d968589d8	2916	* @name Register UART_SFIFO, field RXUF[0] (W1C)
Kojto	90:cb3d968589d8	2917	*
Kojto	90:cb3d968589d8	2918	* Indicates that more data has been read from the receive buffer than was
Kojto	90:cb3d968589d8	2919	* present. This field will assert regardless of the value of CFIFO[RXUFE]. However,
Kojto	90:cb3d968589d8	2920	* an interrupt will be issued to the host only if CFIFO[RXUFE] is set. This flag
Kojto	90:cb3d968589d8	2921	* is cleared by writing a 1.
Kojto	90:cb3d968589d8	2922	*
Kojto	90:cb3d968589d8	2923	* Values:
Kojto	90:cb3d968589d8	2924	* - 0 - No receive buffer underflow has occurred since the last time the flag
Kojto	90:cb3d968589d8	2925	* was cleared.
Kojto	90:cb3d968589d8	2926	* - 1 - At least one receive buffer underflow has occurred since the last time
Kojto	90:cb3d968589d8	2927	* the flag was cleared.
Kojto	90:cb3d968589d8	2928	*/
Kojto	90:cb3d968589d8	2929	/@{/
Kojto	90:cb3d968589d8	2930	#define BP_UART_SFIFO_RXUF (0U) /!< Bit position for UART_SFIFO_RXUF. /
Kojto	90:cb3d968589d8	2931	#define BM_UART_SFIFO_RXUF (0x01U) /!< Bit mask for UART_SFIFO_RXUF. /
Kojto	90:cb3d968589d8	2932	#define BS_UART_SFIFO_RXUF (1U) /!< Bit field size in bits for UART_SFIFO_RXUF. /
Kojto	90:cb3d968589d8	2933
Kojto	90:cb3d968589d8	2934	/! @brief Read current value of the UART_SFIFO_RXUF field. /
Kojto	90:cb3d968589d8	2935	#define BR_UART_SFIFO_RXUF(x) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXUF))
Kojto	90:cb3d968589d8	2936
Kojto	90:cb3d968589d8	2937	/! @brief Format value for bitfield UART_SFIFO_RXUF. /
Kojto	90:cb3d968589d8	2938	#define BF_UART_SFIFO_RXUF(v) ((uint8_t)((uint8_t)(v) << BP_UART_SFIFO_RXUF) & BM_UART_SFIFO_RXUF)
Kojto	90:cb3d968589d8	2939
Kojto	90:cb3d968589d8	2940	/! @brief Set the RXUF field to a new value. /
Kojto	90:cb3d968589d8	2941	#define BW_UART_SFIFO_RXUF(x, v) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXUF) = (v))
Kojto	90:cb3d968589d8	2942	/@}/
Kojto	90:cb3d968589d8	2943
Kojto	90:cb3d968589d8	2944	/*!
Kojto	90:cb3d968589d8	2945	* @name Register UART_SFIFO, field TXOF[1] (W1C)
Kojto	90:cb3d968589d8	2946	*
Kojto	90:cb3d968589d8	2947	* Indicates that more data has been written to the transmit buffer than it can
Kojto	90:cb3d968589d8	2948	* hold. This field will assert regardless of the value of CFIFO[TXOFE]. However,
Kojto	90:cb3d968589d8	2949	* an interrupt will be issued to the host only if CFIFO[TXOFE] is set. This
Kojto	90:cb3d968589d8	2950	* flag is cleared by writing a 1.
Kojto	90:cb3d968589d8	2951	*
Kojto	90:cb3d968589d8	2952	* Values:
Kojto	90:cb3d968589d8	2953	* - 0 - No transmit buffer overflow has occurred since the last time the flag
Kojto	90:cb3d968589d8	2954	* was cleared.
Kojto	90:cb3d968589d8	2955	* - 1 - At least one transmit buffer overflow has occurred since the last time
Kojto	90:cb3d968589d8	2956	* the flag was cleared.
Kojto	90:cb3d968589d8	2957	*/
Kojto	90:cb3d968589d8	2958	/@{/
Kojto	90:cb3d968589d8	2959	#define BP_UART_SFIFO_TXOF (1U) /!< Bit position for UART_SFIFO_TXOF. /
Kojto	90:cb3d968589d8	2960	#define BM_UART_SFIFO_TXOF (0x02U) /!< Bit mask for UART_SFIFO_TXOF. /
Kojto	90:cb3d968589d8	2961	#define BS_UART_SFIFO_TXOF (1U) /!< Bit field size in bits for UART_SFIFO_TXOF. /
Kojto	90:cb3d968589d8	2962
Kojto	90:cb3d968589d8	2963	/! @brief Read current value of the UART_SFIFO_TXOF field. /
Kojto	90:cb3d968589d8	2964	#define BR_UART_SFIFO_TXOF(x) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_TXOF))
Kojto	90:cb3d968589d8	2965
Kojto	90:cb3d968589d8	2966	/! @brief Format value for bitfield UART_SFIFO_TXOF. /
Kojto	90:cb3d968589d8	2967	#define BF_UART_SFIFO_TXOF(v) ((uint8_t)((uint8_t)(v) << BP_UART_SFIFO_TXOF) & BM_UART_SFIFO_TXOF)
Kojto	90:cb3d968589d8	2968
Kojto	90:cb3d968589d8	2969	/! @brief Set the TXOF field to a new value. /
Kojto	90:cb3d968589d8	2970	#define BW_UART_SFIFO_TXOF(x, v) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_TXOF) = (v))
Kojto	90:cb3d968589d8	2971	/@}/
Kojto	90:cb3d968589d8	2972
Kojto	90:cb3d968589d8	2973	/*!
Kojto	90:cb3d968589d8	2974	* @name Register UART_SFIFO, field RXOF[2] (W1C)
Kojto	90:cb3d968589d8	2975	*
Kojto	90:cb3d968589d8	2976	* Indicates that more data has been written to the receive buffer than it can
Kojto	90:cb3d968589d8	2977	* hold. This field will assert regardless of the value of CFIFO[RXOFE]. However,
Kojto	90:cb3d968589d8	2978	* an interrupt will be issued to the host only if CFIFO[RXOFE] is set. This flag
Kojto	90:cb3d968589d8	2979	* is cleared by writing a 1.
Kojto	90:cb3d968589d8	2980	*
Kojto	90:cb3d968589d8	2981	* Values:
Kojto	90:cb3d968589d8	2982	* - 0 - No receive buffer overflow has occurred since the last time the flag
Kojto	90:cb3d968589d8	2983	* was cleared.
Kojto	90:cb3d968589d8	2984	* - 1 - At least one receive buffer overflow has occurred since the last time
Kojto	90:cb3d968589d8	2985	* the flag was cleared.
Kojto	90:cb3d968589d8	2986	*/
Kojto	90:cb3d968589d8	2987	/@{/
Kojto	90:cb3d968589d8	2988	#define BP_UART_SFIFO_RXOF (2U) /!< Bit position for UART_SFIFO_RXOF. /
Kojto	90:cb3d968589d8	2989	#define BM_UART_SFIFO_RXOF (0x04U) /!< Bit mask for UART_SFIFO_RXOF. /
Kojto	90:cb3d968589d8	2990	#define BS_UART_SFIFO_RXOF (1U) /!< Bit field size in bits for UART_SFIFO_RXOF. /
Kojto	90:cb3d968589d8	2991
Kojto	90:cb3d968589d8	2992	/! @brief Read current value of the UART_SFIFO_RXOF field. /
Kojto	90:cb3d968589d8	2993	#define BR_UART_SFIFO_RXOF(x) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXOF))
Kojto	90:cb3d968589d8	2994
Kojto	90:cb3d968589d8	2995	/! @brief Format value for bitfield UART_SFIFO_RXOF. /
Kojto	90:cb3d968589d8	2996	#define BF_UART_SFIFO_RXOF(v) ((uint8_t)((uint8_t)(v) << BP_UART_SFIFO_RXOF) & BM_UART_SFIFO_RXOF)
Kojto	90:cb3d968589d8	2997
Kojto	90:cb3d968589d8	2998	/! @brief Set the RXOF field to a new value. /
Kojto	90:cb3d968589d8	2999	#define BW_UART_SFIFO_RXOF(x, v) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXOF) = (v))
Kojto	90:cb3d968589d8	3000	/@}/
Kojto	90:cb3d968589d8	3001
Kojto	90:cb3d968589d8	3002	/*!
Kojto	90:cb3d968589d8	3003	* @name Register UART_SFIFO, field RXEMPT[6] (RO)
Kojto	90:cb3d968589d8	3004	*
Kojto	90:cb3d968589d8	3005	* Asserts when there is no data in the receive FIFO/Buffer. This field does not
Kojto	90:cb3d968589d8	3006	* take into account data that is in the receive shift register.
Kojto	90:cb3d968589d8	3007	*
Kojto	90:cb3d968589d8	3008	* Values:
Kojto	90:cb3d968589d8	3009	* - 0 - Receive buffer is not empty.
Kojto	90:cb3d968589d8	3010	* - 1 - Receive buffer is empty.
Kojto	90:cb3d968589d8	3011	*/
Kojto	90:cb3d968589d8	3012	/@{/
Kojto	90:cb3d968589d8	3013	#define BP_UART_SFIFO_RXEMPT (6U) /!< Bit position for UART_SFIFO_RXEMPT. /
Kojto	90:cb3d968589d8	3014	#define BM_UART_SFIFO_RXEMPT (0x40U) /!< Bit mask for UART_SFIFO_RXEMPT. /
Kojto	90:cb3d968589d8	3015	#define BS_UART_SFIFO_RXEMPT (1U) /!< Bit field size in bits for UART_SFIFO_RXEMPT. /
Kojto	90:cb3d968589d8	3016
Kojto	90:cb3d968589d8	3017	/! @brief Read current value of the UART_SFIFO_RXEMPT field. /
Kojto	90:cb3d968589d8	3018	#define BR_UART_SFIFO_RXEMPT(x) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_RXEMPT))
Kojto	90:cb3d968589d8	3019	/@}/
Kojto	90:cb3d968589d8	3020
Kojto	90:cb3d968589d8	3021	/*!
Kojto	90:cb3d968589d8	3022	* @name Register UART_SFIFO, field TXEMPT[7] (RO)
Kojto	90:cb3d968589d8	3023	*
Kojto	90:cb3d968589d8	3024	* Asserts when there is no data in the Transmit FIFO/buffer. This field does
Kojto	90:cb3d968589d8	3025	* not take into account data that is in the transmit shift register.
Kojto	90:cb3d968589d8	3026	*
Kojto	90:cb3d968589d8	3027	* Values:
Kojto	90:cb3d968589d8	3028	* - 0 - Transmit buffer is not empty.
Kojto	90:cb3d968589d8	3029	* - 1 - Transmit buffer is empty.
Kojto	90:cb3d968589d8	3030	*/
Kojto	90:cb3d968589d8	3031	/@{/
Kojto	90:cb3d968589d8	3032	#define BP_UART_SFIFO_TXEMPT (7U) /!< Bit position for UART_SFIFO_TXEMPT. /
Kojto	90:cb3d968589d8	3033	#define BM_UART_SFIFO_TXEMPT (0x80U) /!< Bit mask for UART_SFIFO_TXEMPT. /
Kojto	90:cb3d968589d8	3034	#define BS_UART_SFIFO_TXEMPT (1U) /!< Bit field size in bits for UART_SFIFO_TXEMPT. /
Kojto	90:cb3d968589d8	3035
Kojto	90:cb3d968589d8	3036	/! @brief Read current value of the UART_SFIFO_TXEMPT field. /
Kojto	90:cb3d968589d8	3037	#define BR_UART_SFIFO_TXEMPT(x) (BITBAND_ACCESS8(HW_UART_SFIFO_ADDR(x), BP_UART_SFIFO_TXEMPT))
Kojto	90:cb3d968589d8	3038	/@}/
Kojto	90:cb3d968589d8	3039
Kojto	90:cb3d968589d8	3040	/*******************************************************************************
Kojto	90:cb3d968589d8	3041	* HW_UART_TWFIFO - UART FIFO Transmit Watermark
Kojto	90:cb3d968589d8	3042	******************************************************************************/
Kojto	90:cb3d968589d8	3043
Kojto	90:cb3d968589d8	3044	/*!
Kojto	90:cb3d968589d8	3045	* @brief HW_UART_TWFIFO - UART FIFO Transmit Watermark (RW)
Kojto	90:cb3d968589d8	3046	*
Kojto	90:cb3d968589d8	3047	* Reset value: 0x00U
Kojto	90:cb3d968589d8	3048	*
Kojto	90:cb3d968589d8	3049	* This register provides the ability to set a programmable threshold for
Kojto	90:cb3d968589d8	3050	* notification of needing additional transmit data. This register may be read at any
Kojto	90:cb3d968589d8	3051	* time but must be written only when C2[TE] is not set. Changing the value of the
Kojto	90:cb3d968589d8	3052	* watermark will not clear the S1[TDRE] flag.
Kojto	90:cb3d968589d8	3053	*/
Kojto	90:cb3d968589d8	3054	typedef union _hw_uart_twfifo
Kojto	90:cb3d968589d8	3055	{
Kojto	90:cb3d968589d8	3056	uint8_t U;
Kojto	90:cb3d968589d8	3057	struct _hw_uart_twfifo_bitfields
Kojto	90:cb3d968589d8	3058	{
Kojto	90:cb3d968589d8	3059	uint8_t TXWATER : 8; /!< [7:0] Transmit Watermark /
Kojto	90:cb3d968589d8	3060	} B;
Kojto	90:cb3d968589d8	3061	} hw_uart_twfifo_t;
Kojto	90:cb3d968589d8	3062
Kojto	90:cb3d968589d8	3063	/*!
Kojto	90:cb3d968589d8	3064	* @name Constants and macros for entire UART_TWFIFO register
Kojto	90:cb3d968589d8	3065	*/
Kojto	90:cb3d968589d8	3066	/@{/
Kojto	90:cb3d968589d8	3067	#define HW_UART_TWFIFO_ADDR(x) ((x) + 0x13U)
Kojto	90:cb3d968589d8	3068
Kojto	90:cb3d968589d8	3069	#define HW_UART_TWFIFO(x) ((__IO hw_uart_twfifo_t ) HW_UART_TWFIFO_ADDR(x))
Kojto	90:cb3d968589d8	3070	#define HW_UART_TWFIFO_RD(x) (HW_UART_TWFIFO(x).U)
Kojto	90:cb3d968589d8	3071	#define HW_UART_TWFIFO_WR(x, v) (HW_UART_TWFIFO(x).U = (v))
Kojto	90:cb3d968589d8	3072	#define HW_UART_TWFIFO_SET(x, v) (HW_UART_TWFIFO_WR(x, HW_UART_TWFIFO_RD(x) \| (v)))
Kojto	90:cb3d968589d8	3073	#define HW_UART_TWFIFO_CLR(x, v) (HW_UART_TWFIFO_WR(x, HW_UART_TWFIFO_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	3074	#define HW_UART_TWFIFO_TOG(x, v) (HW_UART_TWFIFO_WR(x, HW_UART_TWFIFO_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	3075	/@}/
Kojto	90:cb3d968589d8	3076
Kojto	90:cb3d968589d8	3077	/*
Kojto	90:cb3d968589d8	3078	* Constants & macros for individual UART_TWFIFO bitfields
Kojto	90:cb3d968589d8	3079	*/
Kojto	90:cb3d968589d8	3080
Kojto	90:cb3d968589d8	3081	/*!
Kojto	90:cb3d968589d8	3082	* @name Register UART_TWFIFO, field TXWATER[7:0] (RW)
Kojto	90:cb3d968589d8	3083	*
Kojto	90:cb3d968589d8	3084	* When the number of datawords in the transmit FIFO/buffer is equal to or less
Kojto	90:cb3d968589d8	3085	* than the value in this register field, an interrupt via S1[TDRE] or a DMA
Kojto	90:cb3d968589d8	3086	* request via C5[TDMAS] is generated as determined by C5[TDMAS] and C2[TIE]. For
Kojto	90:cb3d968589d8	3087	* proper operation, the value in TXWATER must be set to be less than the size of
Kojto	90:cb3d968589d8	3088	* the transmit buffer/FIFO size as indicated by PFIFO[TXFIFOSIZE] and PFIFO[TXFE].
Kojto	90:cb3d968589d8	3089	*/
Kojto	90:cb3d968589d8	3090	/@{/
Kojto	90:cb3d968589d8	3091	#define BP_UART_TWFIFO_TXWATER (0U) /!< Bit position for UART_TWFIFO_TXWATER. /
Kojto	90:cb3d968589d8	3092	#define BM_UART_TWFIFO_TXWATER (0xFFU) /!< Bit mask for UART_TWFIFO_TXWATER. /
Kojto	90:cb3d968589d8	3093	#define BS_UART_TWFIFO_TXWATER (8U) /!< Bit field size in bits for UART_TWFIFO_TXWATER. /
Kojto	90:cb3d968589d8	3094
Kojto	90:cb3d968589d8	3095	/! @brief Read current value of the UART_TWFIFO_TXWATER field. /
Kojto	90:cb3d968589d8	3096	#define BR_UART_TWFIFO_TXWATER(x) (HW_UART_TWFIFO(x).U)
Kojto	90:cb3d968589d8	3097
Kojto	90:cb3d968589d8	3098	/! @brief Format value for bitfield UART_TWFIFO_TXWATER. /
Kojto	90:cb3d968589d8	3099	#define BF_UART_TWFIFO_TXWATER(v) ((uint8_t)((uint8_t)(v) << BP_UART_TWFIFO_TXWATER) & BM_UART_TWFIFO_TXWATER)
Kojto	90:cb3d968589d8	3100
Kojto	90:cb3d968589d8	3101	/! @brief Set the TXWATER field to a new value. /
Kojto	90:cb3d968589d8	3102	#define BW_UART_TWFIFO_TXWATER(x, v) (HW_UART_TWFIFO_WR(x, v))
Kojto	90:cb3d968589d8	3103	/@}/
Kojto	90:cb3d968589d8	3104
Kojto	90:cb3d968589d8	3105	/*******************************************************************************
Kojto	90:cb3d968589d8	3106	* HW_UART_TCFIFO - UART FIFO Transmit Count
Kojto	90:cb3d968589d8	3107	******************************************************************************/
Kojto	90:cb3d968589d8	3108
Kojto	90:cb3d968589d8	3109	/*!
Kojto	90:cb3d968589d8	3110	* @brief HW_UART_TCFIFO - UART FIFO Transmit Count (RO)
Kojto	90:cb3d968589d8	3111	*
Kojto	90:cb3d968589d8	3112	* Reset value: 0x00U
Kojto	90:cb3d968589d8	3113	*
Kojto	90:cb3d968589d8	3114	* This is a read only register that indicates how many datawords are currently
Kojto	90:cb3d968589d8	3115	* in the transmit buffer/FIFO. It may be read at any time.
Kojto	90:cb3d968589d8	3116	*/
Kojto	90:cb3d968589d8	3117	typedef union _hw_uart_tcfifo
Kojto	90:cb3d968589d8	3118	{
Kojto	90:cb3d968589d8	3119	uint8_t U;
Kojto	90:cb3d968589d8	3120	struct _hw_uart_tcfifo_bitfields
Kojto	90:cb3d968589d8	3121	{
Kojto	90:cb3d968589d8	3122	uint8_t TXCOUNT : 8; /!< [7:0] Transmit Counter /
Kojto	90:cb3d968589d8	3123	} B;
Kojto	90:cb3d968589d8	3124	} hw_uart_tcfifo_t;
Kojto	90:cb3d968589d8	3125
Kojto	90:cb3d968589d8	3126	/*!
Kojto	90:cb3d968589d8	3127	* @name Constants and macros for entire UART_TCFIFO register
Kojto	90:cb3d968589d8	3128	*/
Kojto	90:cb3d968589d8	3129	/@{/
Kojto	90:cb3d968589d8	3130	#define HW_UART_TCFIFO_ADDR(x) ((x) + 0x14U)
Kojto	90:cb3d968589d8	3131
Kojto	90:cb3d968589d8	3132	#define HW_UART_TCFIFO(x) ((__I hw_uart_tcfifo_t ) HW_UART_TCFIFO_ADDR(x))
Kojto	90:cb3d968589d8	3133	#define HW_UART_TCFIFO_RD(x) (HW_UART_TCFIFO(x).U)
Kojto	90:cb3d968589d8	3134	/@}/
Kojto	90:cb3d968589d8	3135
Kojto	90:cb3d968589d8	3136	/*
Kojto	90:cb3d968589d8	3137	* Constants & macros for individual UART_TCFIFO bitfields
Kojto	90:cb3d968589d8	3138	*/
Kojto	90:cb3d968589d8	3139
Kojto	90:cb3d968589d8	3140	/*!
Kojto	90:cb3d968589d8	3141	* @name Register UART_TCFIFO, field TXCOUNT[7:0] (RO)
Kojto	90:cb3d968589d8	3142	*
Kojto	90:cb3d968589d8	3143	* The value in this register indicates the number of datawords that are in the
Kojto	90:cb3d968589d8	3144	* transmit FIFO/buffer. If a dataword is being transmitted, that is, in the
Kojto	90:cb3d968589d8	3145	* transmit shift register, it is not included in the count. This value may be used
Kojto	90:cb3d968589d8	3146	* in conjunction with PFIFO[TXFIFOSIZE] to calculate how much room is left in the
Kojto	90:cb3d968589d8	3147	* transmit FIFO/buffer.
Kojto	90:cb3d968589d8	3148	*/
Kojto	90:cb3d968589d8	3149	/@{/
Kojto	90:cb3d968589d8	3150	#define BP_UART_TCFIFO_TXCOUNT (0U) /!< Bit position for UART_TCFIFO_TXCOUNT. /
Kojto	90:cb3d968589d8	3151	#define BM_UART_TCFIFO_TXCOUNT (0xFFU) /!< Bit mask for UART_TCFIFO_TXCOUNT. /
Kojto	90:cb3d968589d8	3152	#define BS_UART_TCFIFO_TXCOUNT (8U) /!< Bit field size in bits for UART_TCFIFO_TXCOUNT. /
Kojto	90:cb3d968589d8	3153
Kojto	90:cb3d968589d8	3154	/! @brief Read current value of the UART_TCFIFO_TXCOUNT field. /
Kojto	90:cb3d968589d8	3155	#define BR_UART_TCFIFO_TXCOUNT(x) (HW_UART_TCFIFO(x).U)
Kojto	90:cb3d968589d8	3156	/@}/
Kojto	90:cb3d968589d8	3157
Kojto	90:cb3d968589d8	3158	/*******************************************************************************
Kojto	90:cb3d968589d8	3159	* HW_UART_RWFIFO - UART FIFO Receive Watermark
Kojto	90:cb3d968589d8	3160	******************************************************************************/
Kojto	90:cb3d968589d8	3161
Kojto	90:cb3d968589d8	3162	/*!
Kojto	90:cb3d968589d8	3163	* @brief HW_UART_RWFIFO - UART FIFO Receive Watermark (RW)
Kojto	90:cb3d968589d8	3164	*
Kojto	90:cb3d968589d8	3165	* Reset value: 0x01U
Kojto	90:cb3d968589d8	3166	*
Kojto	90:cb3d968589d8	3167	* This register provides the ability to set a programmable threshold for
Kojto	90:cb3d968589d8	3168	* notification of the need to remove data from the receiver FIFO/buffer. This register
Kojto	90:cb3d968589d8	3169	* may be read at any time but must be written only when C2[RE] is not asserted.
Kojto	90:cb3d968589d8	3170	* Changing the value in this register will not clear S1[RDRF].
Kojto	90:cb3d968589d8	3171	*/
Kojto	90:cb3d968589d8	3172	typedef union _hw_uart_rwfifo
Kojto	90:cb3d968589d8	3173	{
Kojto	90:cb3d968589d8	3174	uint8_t U;
Kojto	90:cb3d968589d8	3175	struct _hw_uart_rwfifo_bitfields
Kojto	90:cb3d968589d8	3176	{
Kojto	90:cb3d968589d8	3177	uint8_t RXWATER : 8; /!< [7:0] Receive Watermark /
Kojto	90:cb3d968589d8	3178	} B;
Kojto	90:cb3d968589d8	3179	} hw_uart_rwfifo_t;
Kojto	90:cb3d968589d8	3180
Kojto	90:cb3d968589d8	3181	/*!
Kojto	90:cb3d968589d8	3182	* @name Constants and macros for entire UART_RWFIFO register
Kojto	90:cb3d968589d8	3183	*/
Kojto	90:cb3d968589d8	3184	/@{/
Kojto	90:cb3d968589d8	3185	#define HW_UART_RWFIFO_ADDR(x) ((x) + 0x15U)
Kojto	90:cb3d968589d8	3186
Kojto	90:cb3d968589d8	3187	#define HW_UART_RWFIFO(x) ((__IO hw_uart_rwfifo_t ) HW_UART_RWFIFO_ADDR(x))
Kojto	90:cb3d968589d8	3188	#define HW_UART_RWFIFO_RD(x) (HW_UART_RWFIFO(x).U)
Kojto	90:cb3d968589d8	3189	#define HW_UART_RWFIFO_WR(x, v) (HW_UART_RWFIFO(x).U = (v))
Kojto	90:cb3d968589d8	3190	#define HW_UART_RWFIFO_SET(x, v) (HW_UART_RWFIFO_WR(x, HW_UART_RWFIFO_RD(x) \| (v)))
Kojto	90:cb3d968589d8	3191	#define HW_UART_RWFIFO_CLR(x, v) (HW_UART_RWFIFO_WR(x, HW_UART_RWFIFO_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	3192	#define HW_UART_RWFIFO_TOG(x, v) (HW_UART_RWFIFO_WR(x, HW_UART_RWFIFO_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	3193	/@}/
Kojto	90:cb3d968589d8	3194
Kojto	90:cb3d968589d8	3195	/*
Kojto	90:cb3d968589d8	3196	* Constants & macros for individual UART_RWFIFO bitfields
Kojto	90:cb3d968589d8	3197	*/
Kojto	90:cb3d968589d8	3198
Kojto	90:cb3d968589d8	3199	/*!
Kojto	90:cb3d968589d8	3200	* @name Register UART_RWFIFO, field RXWATER[7:0] (RW)
Kojto	90:cb3d968589d8	3201	*
Kojto	90:cb3d968589d8	3202	* When the number of datawords in the receive FIFO/buffer is equal to or
Kojto	90:cb3d968589d8	3203	* greater than the value in this register field, an interrupt via S1[RDRF] or a DMA
Kojto	90:cb3d968589d8	3204	* request via C5[RDMAS] is generated as determined by C5[RDMAS] and C2[RIE]. For
Kojto	90:cb3d968589d8	3205	* proper operation, the value in RXWATER must be set to be less than the receive
Kojto	90:cb3d968589d8	3206	* FIFO/buffer size as indicated by PFIFO[RXFIFOSIZE] and PFIFO[RXFE] and must be
Kojto	90:cb3d968589d8	3207	* greater than 0.
Kojto	90:cb3d968589d8	3208	*/
Kojto	90:cb3d968589d8	3209	/@{/
Kojto	90:cb3d968589d8	3210	#define BP_UART_RWFIFO_RXWATER (0U) /!< Bit position for UART_RWFIFO_RXWATER. /
Kojto	90:cb3d968589d8	3211	#define BM_UART_RWFIFO_RXWATER (0xFFU) /!< Bit mask for UART_RWFIFO_RXWATER. /
Kojto	90:cb3d968589d8	3212	#define BS_UART_RWFIFO_RXWATER (8U) /!< Bit field size in bits for UART_RWFIFO_RXWATER. /
Kojto	90:cb3d968589d8	3213
Kojto	90:cb3d968589d8	3214	/! @brief Read current value of the UART_RWFIFO_RXWATER field. /
Kojto	90:cb3d968589d8	3215	#define BR_UART_RWFIFO_RXWATER(x) (HW_UART_RWFIFO(x).U)
Kojto	90:cb3d968589d8	3216
Kojto	90:cb3d968589d8	3217	/! @brief Format value for bitfield UART_RWFIFO_RXWATER. /
Kojto	90:cb3d968589d8	3218	#define BF_UART_RWFIFO_RXWATER(v) ((uint8_t)((uint8_t)(v) << BP_UART_RWFIFO_RXWATER) & BM_UART_RWFIFO_RXWATER)
Kojto	90:cb3d968589d8	3219
Kojto	90:cb3d968589d8	3220	/! @brief Set the RXWATER field to a new value. /
Kojto	90:cb3d968589d8	3221	#define BW_UART_RWFIFO_RXWATER(x, v) (HW_UART_RWFIFO_WR(x, v))
Kojto	90:cb3d968589d8	3222	/@}/
Kojto	90:cb3d968589d8	3223
Kojto	90:cb3d968589d8	3224	/*******************************************************************************
Kojto	90:cb3d968589d8	3225	* HW_UART_RCFIFO - UART FIFO Receive Count
Kojto	90:cb3d968589d8	3226	******************************************************************************/
Kojto	90:cb3d968589d8	3227
Kojto	90:cb3d968589d8	3228	/*!
Kojto	90:cb3d968589d8	3229	* @brief HW_UART_RCFIFO - UART FIFO Receive Count (RO)
Kojto	90:cb3d968589d8	3230	*
Kojto	90:cb3d968589d8	3231	* Reset value: 0x00U
Kojto	90:cb3d968589d8	3232	*
Kojto	90:cb3d968589d8	3233	* This is a read only register that indicates how many datawords are currently
Kojto	90:cb3d968589d8	3234	* in the receive FIFO/buffer. It may be read at any time.
Kojto	90:cb3d968589d8	3235	*/
Kojto	90:cb3d968589d8	3236	typedef union _hw_uart_rcfifo
Kojto	90:cb3d968589d8	3237	{
Kojto	90:cb3d968589d8	3238	uint8_t U;
Kojto	90:cb3d968589d8	3239	struct _hw_uart_rcfifo_bitfields
Kojto	90:cb3d968589d8	3240	{
Kojto	90:cb3d968589d8	3241	uint8_t RXCOUNT : 8; /!< [7:0] Receive Counter /
Kojto	90:cb3d968589d8	3242	} B;
Kojto	90:cb3d968589d8	3243	} hw_uart_rcfifo_t;
Kojto	90:cb3d968589d8	3244
Kojto	90:cb3d968589d8	3245	/*!
Kojto	90:cb3d968589d8	3246	* @name Constants and macros for entire UART_RCFIFO register
Kojto	90:cb3d968589d8	3247	*/
Kojto	90:cb3d968589d8	3248	/@{/
Kojto	90:cb3d968589d8	3249	#define HW_UART_RCFIFO_ADDR(x) ((x) + 0x16U)
Kojto	90:cb3d968589d8	3250
Kojto	90:cb3d968589d8	3251	#define HW_UART_RCFIFO(x) ((__I hw_uart_rcfifo_t ) HW_UART_RCFIFO_ADDR(x))
Kojto	90:cb3d968589d8	3252	#define HW_UART_RCFIFO_RD(x) (HW_UART_RCFIFO(x).U)
Kojto	90:cb3d968589d8	3253	/@}/
Kojto	90:cb3d968589d8	3254
Kojto	90:cb3d968589d8	3255	/*
Kojto	90:cb3d968589d8	3256	* Constants & macros for individual UART_RCFIFO bitfields
Kojto	90:cb3d968589d8	3257	*/
Kojto	90:cb3d968589d8	3258
Kojto	90:cb3d968589d8	3259	/*!
Kojto	90:cb3d968589d8	3260	* @name Register UART_RCFIFO, field RXCOUNT[7:0] (RO)
Kojto	90:cb3d968589d8	3261	*
Kojto	90:cb3d968589d8	3262	* The value in this register indicates the number of datawords that are in the
Kojto	90:cb3d968589d8	3263	* receive FIFO/buffer. If a dataword is being received, that is, in the receive
Kojto	90:cb3d968589d8	3264	* shift register, it is not included in the count. This value may be used in
Kojto	90:cb3d968589d8	3265	* conjunction with PFIFO[RXFIFOSIZE] to calculate how much room is left in the
Kojto	90:cb3d968589d8	3266	* receive FIFO/buffer.
Kojto	90:cb3d968589d8	3267	*/
Kojto	90:cb3d968589d8	3268	/@{/
Kojto	90:cb3d968589d8	3269	#define BP_UART_RCFIFO_RXCOUNT (0U) /!< Bit position for UART_RCFIFO_RXCOUNT. /
Kojto	90:cb3d968589d8	3270	#define BM_UART_RCFIFO_RXCOUNT (0xFFU) /!< Bit mask for UART_RCFIFO_RXCOUNT. /
Kojto	90:cb3d968589d8	3271	#define BS_UART_RCFIFO_RXCOUNT (8U) /!< Bit field size in bits for UART_RCFIFO_RXCOUNT. /
Kojto	90:cb3d968589d8	3272
Kojto	90:cb3d968589d8	3273	/! @brief Read current value of the UART_RCFIFO_RXCOUNT field. /
Kojto	90:cb3d968589d8	3274	#define BR_UART_RCFIFO_RXCOUNT(x) (HW_UART_RCFIFO(x).U)
Kojto	90:cb3d968589d8	3275	/@}/
Kojto	90:cb3d968589d8	3276
Kojto	90:cb3d968589d8	3277	/*******************************************************************************
Kojto	90:cb3d968589d8	3278	* HW_UART_C7816 - UART 7816 Control Register
Kojto	90:cb3d968589d8	3279	******************************************************************************/
Kojto	90:cb3d968589d8	3280
Kojto	90:cb3d968589d8	3281	/*!
Kojto	90:cb3d968589d8	3282	* @brief HW_UART_C7816 - UART 7816 Control Register (RW)
Kojto	90:cb3d968589d8	3283	*
Kojto	90:cb3d968589d8	3284	* Reset value: 0x00U
Kojto	90:cb3d968589d8	3285	*
Kojto	90:cb3d968589d8	3286	* The C7816 register is the primary control register for ISO-7816 specific
Kojto	90:cb3d968589d8	3287	* functionality. This register is specific to 7816 functionality and the values in
Kojto	90:cb3d968589d8	3288	* this register have no effect on UART operation and should be ignored if
Kojto	90:cb3d968589d8	3289	* ISO_7816E is not set/enabled. This register may be read at any time but values must
Kojto	90:cb3d968589d8	3290	* be changed only when ISO_7816E is not set.
Kojto	90:cb3d968589d8	3291	*/
Kojto	90:cb3d968589d8	3292	typedef union _hw_uart_c7816
Kojto	90:cb3d968589d8	3293	{
Kojto	90:cb3d968589d8	3294	uint8_t U;
Kojto	90:cb3d968589d8	3295	struct _hw_uart_c7816_bitfields
Kojto	90:cb3d968589d8	3296	{
Kojto	90:cb3d968589d8	3297	uint8_t ISO_7816E : 1; /!< [0] ISO-7816 Functionality Enabled /
Kojto	90:cb3d968589d8	3298	uint8_t TTYPE : 1; /!< [1] Transfer Type /
Kojto	90:cb3d968589d8	3299	uint8_t INIT : 1; /!< [2] Detect Initial Character /
Kojto	90:cb3d968589d8	3300	uint8_t ANACK : 1; /!< [3] Generate NACK on Error /
Kojto	90:cb3d968589d8	3301	uint8_t ONACK : 1; /!< [4] Generate NACK on Overflow /
Kojto	90:cb3d968589d8	3302	uint8_t RESERVED0 : 3; /!< [7:5] /
Kojto	90:cb3d968589d8	3303	} B;
Kojto	90:cb3d968589d8	3304	} hw_uart_c7816_t;
Kojto	90:cb3d968589d8	3305
Kojto	90:cb3d968589d8	3306	/*!
Kojto	90:cb3d968589d8	3307	* @name Constants and macros for entire UART_C7816 register
Kojto	90:cb3d968589d8	3308	*/
Kojto	90:cb3d968589d8	3309	/@{/
Kojto	90:cb3d968589d8	3310	#define HW_UART_C7816_ADDR(x) ((x) + 0x18U)
Kojto	90:cb3d968589d8	3311
Kojto	90:cb3d968589d8	3312	#define HW_UART_C7816(x) ((__IO hw_uart_c7816_t ) HW_UART_C7816_ADDR(x))
Kojto	90:cb3d968589d8	3313	#define HW_UART_C7816_RD(x) (HW_UART_C7816(x).U)
Kojto	90:cb3d968589d8	3314	#define HW_UART_C7816_WR(x, v) (HW_UART_C7816(x).U = (v))
Kojto	90:cb3d968589d8	3315	#define HW_UART_C7816_SET(x, v) (HW_UART_C7816_WR(x, HW_UART_C7816_RD(x) \| (v)))
Kojto	90:cb3d968589d8	3316	#define HW_UART_C7816_CLR(x, v) (HW_UART_C7816_WR(x, HW_UART_C7816_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	3317	#define HW_UART_C7816_TOG(x, v) (HW_UART_C7816_WR(x, HW_UART_C7816_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	3318	/@}/
Kojto	90:cb3d968589d8	3319
Kojto	90:cb3d968589d8	3320	/*
Kojto	90:cb3d968589d8	3321	* Constants & macros for individual UART_C7816 bitfields
Kojto	90:cb3d968589d8	3322	*/
Kojto	90:cb3d968589d8	3323
Kojto	90:cb3d968589d8	3324	/*!
Kojto	90:cb3d968589d8	3325	* @name Register UART_C7816, field ISO_7816E[0] (RW)
Kojto	90:cb3d968589d8	3326	*
Kojto	90:cb3d968589d8	3327	* Indicates that the UART is operating according to the ISO-7816 protocol. This
Kojto	90:cb3d968589d8	3328	* field must be modified only when no transmit or receive is occurring. If this
Kojto	90:cb3d968589d8	3329	* field is changed during a data transfer, the data being transmitted or
Kojto	90:cb3d968589d8	3330	* received may be transferred incorrectly.
Kojto	90:cb3d968589d8	3331	*
Kojto	90:cb3d968589d8	3332	* Values:
Kojto	90:cb3d968589d8	3333	* - 0 - ISO-7816 functionality is turned off/not enabled.
Kojto	90:cb3d968589d8	3334	* - 1 - ISO-7816 functionality is turned on/enabled.
Kojto	90:cb3d968589d8	3335	*/
Kojto	90:cb3d968589d8	3336	/@{/
Kojto	90:cb3d968589d8	3337	#define BP_UART_C7816_ISO_7816E (0U) /!< Bit position for UART_C7816_ISO_7816E. /
Kojto	90:cb3d968589d8	3338	#define BM_UART_C7816_ISO_7816E (0x01U) /!< Bit mask for UART_C7816_ISO_7816E. /
Kojto	90:cb3d968589d8	3339	#define BS_UART_C7816_ISO_7816E (1U) /!< Bit field size in bits for UART_C7816_ISO_7816E. /
Kojto	90:cb3d968589d8	3340
Kojto	90:cb3d968589d8	3341	/! @brief Read current value of the UART_C7816_ISO_7816E field. /
Kojto	90:cb3d968589d8	3342	#define BR_UART_C7816_ISO_7816E(x) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ISO_7816E))
Kojto	90:cb3d968589d8	3343
Kojto	90:cb3d968589d8	3344	/! @brief Format value for bitfield UART_C7816_ISO_7816E. /
Kojto	90:cb3d968589d8	3345	#define BF_UART_C7816_ISO_7816E(v) ((uint8_t)((uint8_t)(v) << BP_UART_C7816_ISO_7816E) & BM_UART_C7816_ISO_7816E)
Kojto	90:cb3d968589d8	3346
Kojto	90:cb3d968589d8	3347	/! @brief Set the ISO_7816E field to a new value. /
Kojto	90:cb3d968589d8	3348	#define BW_UART_C7816_ISO_7816E(x, v) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ISO_7816E) = (v))
Kojto	90:cb3d968589d8	3349	/@}/
Kojto	90:cb3d968589d8	3350
Kojto	90:cb3d968589d8	3351	/*!
Kojto	90:cb3d968589d8	3352	* @name Register UART_C7816, field TTYPE[1] (RW)
Kojto	90:cb3d968589d8	3353	*
Kojto	90:cb3d968589d8	3354	* Indicates the transfer protocol being used. See ISO-7816 / smartcard support
Kojto	90:cb3d968589d8	3355	* for more details.
Kojto	90:cb3d968589d8	3356	*
Kojto	90:cb3d968589d8	3357	* Values:
Kojto	90:cb3d968589d8	3358	* - 0 - T = 0 per the ISO-7816 specification.
Kojto	90:cb3d968589d8	3359	* - 1 - T = 1 per the ISO-7816 specification.
Kojto	90:cb3d968589d8	3360	*/
Kojto	90:cb3d968589d8	3361	/@{/
Kojto	90:cb3d968589d8	3362	#define BP_UART_C7816_TTYPE (1U) /!< Bit position for UART_C7816_TTYPE. /
Kojto	90:cb3d968589d8	3363	#define BM_UART_C7816_TTYPE (0x02U) /!< Bit mask for UART_C7816_TTYPE. /
Kojto	90:cb3d968589d8	3364	#define BS_UART_C7816_TTYPE (1U) /!< Bit field size in bits for UART_C7816_TTYPE. /
Kojto	90:cb3d968589d8	3365
Kojto	90:cb3d968589d8	3366	/! @brief Read current value of the UART_C7816_TTYPE field. /
Kojto	90:cb3d968589d8	3367	#define BR_UART_C7816_TTYPE(x) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_TTYPE))
Kojto	90:cb3d968589d8	3368
Kojto	90:cb3d968589d8	3369	/! @brief Format value for bitfield UART_C7816_TTYPE. /
Kojto	90:cb3d968589d8	3370	#define BF_UART_C7816_TTYPE(v) ((uint8_t)((uint8_t)(v) << BP_UART_C7816_TTYPE) & BM_UART_C7816_TTYPE)
Kojto	90:cb3d968589d8	3371
Kojto	90:cb3d968589d8	3372	/! @brief Set the TTYPE field to a new value. /
Kojto	90:cb3d968589d8	3373	#define BW_UART_C7816_TTYPE(x, v) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_TTYPE) = (v))
Kojto	90:cb3d968589d8	3374	/@}/
Kojto	90:cb3d968589d8	3375
Kojto	90:cb3d968589d8	3376	/*!
Kojto	90:cb3d968589d8	3377	* @name Register UART_C7816, field INIT[2] (RW)
Kojto	90:cb3d968589d8	3378	*
Kojto	90:cb3d968589d8	3379	* When this field is set, all received characters are searched for a valid
Kojto	90:cb3d968589d8	3380	* initial character. If an invalid initial character is identified, and ANACK is
Kojto	90:cb3d968589d8	3381	* set, a NACK is sent. All received data is discarded and error flags blocked
Kojto	90:cb3d968589d8	3382	* (S1[NF], S1[OR], S1[FE], S1[PF], IS7816[WT], IS7816[CWT], IS7816[BWT], IS7816[GTV])
Kojto	90:cb3d968589d8	3383	* until a valid initial character is detected. Upon detecting a valid initial
Kojto	90:cb3d968589d8	3384	* character, the configuration values S2[MSBF], C3[TXINV], and S2[RXINV] are
Kojto	90:cb3d968589d8	3385	* automatically updated to reflect the initial character that was received. The
Kojto	90:cb3d968589d8	3386	* actual INIT data value is not stored in the receive buffer. Additionally, upon
Kojto	90:cb3d968589d8	3387	* detection of a valid initial character, IS7816[INITD] is set and an interrupt
Kojto	90:cb3d968589d8	3388	* issued as programmed by IE7816[INITDE]. When a valid initial character is
Kojto	90:cb3d968589d8	3389	* detected, INIT is automatically cleared. This Initial Character Detect feature is
Kojto	90:cb3d968589d8	3390	* supported only in T = 0 protocol mode.
Kojto	90:cb3d968589d8	3391	*
Kojto	90:cb3d968589d8	3392	* Values:
Kojto	90:cb3d968589d8	3393	* - 0 - Normal operating mode. Receiver does not seek to identify initial
Kojto	90:cb3d968589d8	3394	* character.
Kojto	90:cb3d968589d8	3395	* - 1 - Receiver searches for initial character.
Kojto	90:cb3d968589d8	3396	*/
Kojto	90:cb3d968589d8	3397	/@{/
Kojto	90:cb3d968589d8	3398	#define BP_UART_C7816_INIT (2U) /!< Bit position for UART_C7816_INIT. /
Kojto	90:cb3d968589d8	3399	#define BM_UART_C7816_INIT (0x04U) /!< Bit mask for UART_C7816_INIT. /
Kojto	90:cb3d968589d8	3400	#define BS_UART_C7816_INIT (1U) /!< Bit field size in bits for UART_C7816_INIT. /
Kojto	90:cb3d968589d8	3401
Kojto	90:cb3d968589d8	3402	/! @brief Read current value of the UART_C7816_INIT field. /
Kojto	90:cb3d968589d8	3403	#define BR_UART_C7816_INIT(x) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_INIT))
Kojto	90:cb3d968589d8	3404
Kojto	90:cb3d968589d8	3405	/! @brief Format value for bitfield UART_C7816_INIT. /
Kojto	90:cb3d968589d8	3406	#define BF_UART_C7816_INIT(v) ((uint8_t)((uint8_t)(v) << BP_UART_C7816_INIT) & BM_UART_C7816_INIT)
Kojto	90:cb3d968589d8	3407
Kojto	90:cb3d968589d8	3408	/! @brief Set the INIT field to a new value. /
Kojto	90:cb3d968589d8	3409	#define BW_UART_C7816_INIT(x, v) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_INIT) = (v))
Kojto	90:cb3d968589d8	3410	/@}/
Kojto	90:cb3d968589d8	3411
Kojto	90:cb3d968589d8	3412	/*!
Kojto	90:cb3d968589d8	3413	* @name Register UART_C7816, field ANACK[3] (RW)
Kojto	90:cb3d968589d8	3414	*
Kojto	90:cb3d968589d8	3415	* When this field is set, the receiver automatically generates a NACK response
Kojto	90:cb3d968589d8	3416	* if a parity error occurs or if INIT is set and an invalid initial character is
Kojto	90:cb3d968589d8	3417	* detected. A NACK is generated only if TTYPE = 0. If ANACK is set, the UART
Kojto	90:cb3d968589d8	3418	* attempts to retransmit the data indefinitely. To stop retransmission attempts,
Kojto	90:cb3d968589d8	3419	* clear C2[TE] or ISO_7816E and do not set until S1[TC] sets C2[TE] again.
Kojto	90:cb3d968589d8	3420	*
Kojto	90:cb3d968589d8	3421	* Values:
Kojto	90:cb3d968589d8	3422	* - 0 - No NACK is automatically generated.
Kojto	90:cb3d968589d8	3423	* - 1 - A NACK is automatically generated if a parity error is detected or if
Kojto	90:cb3d968589d8	3424	* an invalid initial character is detected.
Kojto	90:cb3d968589d8	3425	*/
Kojto	90:cb3d968589d8	3426	/@{/
Kojto	90:cb3d968589d8	3427	#define BP_UART_C7816_ANACK (3U) /!< Bit position for UART_C7816_ANACK. /
Kojto	90:cb3d968589d8	3428	#define BM_UART_C7816_ANACK (0x08U) /!< Bit mask for UART_C7816_ANACK. /
Kojto	90:cb3d968589d8	3429	#define BS_UART_C7816_ANACK (1U) /!< Bit field size in bits for UART_C7816_ANACK. /
Kojto	90:cb3d968589d8	3430
Kojto	90:cb3d968589d8	3431	/! @brief Read current value of the UART_C7816_ANACK field. /
Kojto	90:cb3d968589d8	3432	#define BR_UART_C7816_ANACK(x) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ANACK))
Kojto	90:cb3d968589d8	3433
Kojto	90:cb3d968589d8	3434	/! @brief Format value for bitfield UART_C7816_ANACK. /
Kojto	90:cb3d968589d8	3435	#define BF_UART_C7816_ANACK(v) ((uint8_t)((uint8_t)(v) << BP_UART_C7816_ANACK) & BM_UART_C7816_ANACK)
Kojto	90:cb3d968589d8	3436
Kojto	90:cb3d968589d8	3437	/! @brief Set the ANACK field to a new value. /
Kojto	90:cb3d968589d8	3438	#define BW_UART_C7816_ANACK(x, v) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ANACK) = (v))
Kojto	90:cb3d968589d8	3439	/@}/
Kojto	90:cb3d968589d8	3440
Kojto	90:cb3d968589d8	3441	/*!
Kojto	90:cb3d968589d8	3442	* @name Register UART_C7816, field ONACK[4] (RW)
Kojto	90:cb3d968589d8	3443	*
Kojto	90:cb3d968589d8	3444	* When this field is set, the receiver automatically generates a NACK response
Kojto	90:cb3d968589d8	3445	* if a receive buffer overrun occurs, as indicated by S1[OR]. In many systems,
Kojto	90:cb3d968589d8	3446	* this results in the transmitter resending the packet that overflowed until the
Kojto	90:cb3d968589d8	3447	* retransmit threshold for that transmitter is reached. A NACK is generated only
Kojto	90:cb3d968589d8	3448	* if TTYPE=0. This field operates independently of ANACK. See . Overrun NACK
Kojto	90:cb3d968589d8	3449	* considerations
Kojto	90:cb3d968589d8	3450	*
Kojto	90:cb3d968589d8	3451	* Values:
Kojto	90:cb3d968589d8	3452	* - 0 - The received data does not generate a NACK when the receipt of the data
Kojto	90:cb3d968589d8	3453	* results in an overflow event.
Kojto	90:cb3d968589d8	3454	* - 1 - If the receiver buffer overflows, a NACK is automatically sent on a
Kojto	90:cb3d968589d8	3455	* received character.
Kojto	90:cb3d968589d8	3456	*/
Kojto	90:cb3d968589d8	3457	/@{/
Kojto	90:cb3d968589d8	3458	#define BP_UART_C7816_ONACK (4U) /!< Bit position for UART_C7816_ONACK. /
Kojto	90:cb3d968589d8	3459	#define BM_UART_C7816_ONACK (0x10U) /!< Bit mask for UART_C7816_ONACK. /
Kojto	90:cb3d968589d8	3460	#define BS_UART_C7816_ONACK (1U) /!< Bit field size in bits for UART_C7816_ONACK. /
Kojto	90:cb3d968589d8	3461
Kojto	90:cb3d968589d8	3462	/! @brief Read current value of the UART_C7816_ONACK field. /
Kojto	90:cb3d968589d8	3463	#define BR_UART_C7816_ONACK(x) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ONACK))
Kojto	90:cb3d968589d8	3464
Kojto	90:cb3d968589d8	3465	/! @brief Format value for bitfield UART_C7816_ONACK. /
Kojto	90:cb3d968589d8	3466	#define BF_UART_C7816_ONACK(v) ((uint8_t)((uint8_t)(v) << BP_UART_C7816_ONACK) & BM_UART_C7816_ONACK)
Kojto	90:cb3d968589d8	3467
Kojto	90:cb3d968589d8	3468	/! @brief Set the ONACK field to a new value. /
Kojto	90:cb3d968589d8	3469	#define BW_UART_C7816_ONACK(x, v) (BITBAND_ACCESS8(HW_UART_C7816_ADDR(x), BP_UART_C7816_ONACK) = (v))
Kojto	90:cb3d968589d8	3470	/@}/
Kojto	90:cb3d968589d8	3471
Kojto	90:cb3d968589d8	3472	/*******************************************************************************
Kojto	90:cb3d968589d8	3473	* HW_UART_IE7816 - UART 7816 Interrupt Enable Register
Kojto	90:cb3d968589d8	3474	******************************************************************************/
Kojto	90:cb3d968589d8	3475
Kojto	90:cb3d968589d8	3476	/*!
Kojto	90:cb3d968589d8	3477	* @brief HW_UART_IE7816 - UART 7816 Interrupt Enable Register (RW)
Kojto	90:cb3d968589d8	3478	*
Kojto	90:cb3d968589d8	3479	* Reset value: 0x00U
Kojto	90:cb3d968589d8	3480	*
Kojto	90:cb3d968589d8	3481	* The IE7816 register controls which flags result in an interrupt being issued.
Kojto	90:cb3d968589d8	3482	* This register is specific to 7816 functionality, the corresponding flags that
Kojto	90:cb3d968589d8	3483	* drive the interrupts are not asserted when 7816E is not set/enabled. However,
Kojto	90:cb3d968589d8	3484	* these flags may remain set if they are asserted while 7816E was set and not
Kojto	90:cb3d968589d8	3485	* subsequently cleared. This register may be read or written to at any time.
Kojto	90:cb3d968589d8	3486	*/
Kojto	90:cb3d968589d8	3487	typedef union _hw_uart_ie7816
Kojto	90:cb3d968589d8	3488	{
Kojto	90:cb3d968589d8	3489	uint8_t U;
Kojto	90:cb3d968589d8	3490	struct _hw_uart_ie7816_bitfields
Kojto	90:cb3d968589d8	3491	{
Kojto	90:cb3d968589d8	3492	uint8_t RXTE : 1; /*!< [0] Receive Threshold Exceeded Interrupt
Kojto	90:cb3d968589d8	3493	* Enable */
Kojto	90:cb3d968589d8	3494	uint8_t TXTE : 1; /*!< [1] Transmit Threshold Exceeded Interrupt
Kojto	90:cb3d968589d8	3495	* Enable */
Kojto	90:cb3d968589d8	3496	uint8_t GTVE : 1; /!< [2] Guard Timer Violated Interrupt Enable /
Kojto	90:cb3d968589d8	3497	uint8_t RESERVED0 : 1; /!< [3] /
Kojto	90:cb3d968589d8	3498	uint8_t INITDE : 1; /*!< [4] Initial Character Detected Interrupt
Kojto	90:cb3d968589d8	3499	* Enable */
Kojto	90:cb3d968589d8	3500	uint8_t BWTE : 1; /!< [5] Block Wait Timer Interrupt Enable /
Kojto	90:cb3d968589d8	3501	uint8_t CWTE : 1; /!< [6] Character Wait Timer Interrupt Enable /
Kojto	90:cb3d968589d8	3502	uint8_t WTE : 1; /!< [7] Wait Timer Interrupt Enable /
Kojto	90:cb3d968589d8	3503	} B;
Kojto	90:cb3d968589d8	3504	} hw_uart_ie7816_t;
Kojto	90:cb3d968589d8	3505
Kojto	90:cb3d968589d8	3506	/*!
Kojto	90:cb3d968589d8	3507	* @name Constants and macros for entire UART_IE7816 register
Kojto	90:cb3d968589d8	3508	*/
Kojto	90:cb3d968589d8	3509	/@{/
Kojto	90:cb3d968589d8	3510	#define HW_UART_IE7816_ADDR(x) ((x) + 0x19U)
Kojto	90:cb3d968589d8	3511
Kojto	90:cb3d968589d8	3512	#define HW_UART_IE7816(x) ((__IO hw_uart_ie7816_t ) HW_UART_IE7816_ADDR(x))
Kojto	90:cb3d968589d8	3513	#define HW_UART_IE7816_RD(x) (HW_UART_IE7816(x).U)
Kojto	90:cb3d968589d8	3514	#define HW_UART_IE7816_WR(x, v) (HW_UART_IE7816(x).U = (v))
Kojto	90:cb3d968589d8	3515	#define HW_UART_IE7816_SET(x, v) (HW_UART_IE7816_WR(x, HW_UART_IE7816_RD(x) \| (v)))
Kojto	90:cb3d968589d8	3516	#define HW_UART_IE7816_CLR(x, v) (HW_UART_IE7816_WR(x, HW_UART_IE7816_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	3517	#define HW_UART_IE7816_TOG(x, v) (HW_UART_IE7816_WR(x, HW_UART_IE7816_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	3518	/@}/
Kojto	90:cb3d968589d8	3519
Kojto	90:cb3d968589d8	3520	/*
Kojto	90:cb3d968589d8	3521	* Constants & macros for individual UART_IE7816 bitfields
Kojto	90:cb3d968589d8	3522	*/
Kojto	90:cb3d968589d8	3523
Kojto	90:cb3d968589d8	3524	/*!
Kojto	90:cb3d968589d8	3525	* @name Register UART_IE7816, field RXTE[0] (RW)
Kojto	90:cb3d968589d8	3526	*
Kojto	90:cb3d968589d8	3527	* Values:
Kojto	90:cb3d968589d8	3528	* - 0 - The assertion of IS7816[RXT] does not result in the generation of an
Kojto	90:cb3d968589d8	3529	* interrupt.
Kojto	90:cb3d968589d8	3530	* - 1 - The assertion of IS7816[RXT] results in the generation of an interrupt.
Kojto	90:cb3d968589d8	3531	*/
Kojto	90:cb3d968589d8	3532	/@{/
Kojto	90:cb3d968589d8	3533	#define BP_UART_IE7816_RXTE (0U) /!< Bit position for UART_IE7816_RXTE. /
Kojto	90:cb3d968589d8	3534	#define BM_UART_IE7816_RXTE (0x01U) /!< Bit mask for UART_IE7816_RXTE. /
Kojto	90:cb3d968589d8	3535	#define BS_UART_IE7816_RXTE (1U) /!< Bit field size in bits for UART_IE7816_RXTE. /
Kojto	90:cb3d968589d8	3536
Kojto	90:cb3d968589d8	3537	/! @brief Read current value of the UART_IE7816_RXTE field. /
Kojto	90:cb3d968589d8	3538	#define BR_UART_IE7816_RXTE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_RXTE))
Kojto	90:cb3d968589d8	3539
Kojto	90:cb3d968589d8	3540	/! @brief Format value for bitfield UART_IE7816_RXTE. /
Kojto	90:cb3d968589d8	3541	#define BF_UART_IE7816_RXTE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_RXTE) & BM_UART_IE7816_RXTE)
Kojto	90:cb3d968589d8	3542
Kojto	90:cb3d968589d8	3543	/! @brief Set the RXTE field to a new value. /
Kojto	90:cb3d968589d8	3544	#define BW_UART_IE7816_RXTE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_RXTE) = (v))
Kojto	90:cb3d968589d8	3545	/@}/
Kojto	90:cb3d968589d8	3546
Kojto	90:cb3d968589d8	3547	/*!
Kojto	90:cb3d968589d8	3548	* @name Register UART_IE7816, field TXTE[1] (RW)
Kojto	90:cb3d968589d8	3549	*
Kojto	90:cb3d968589d8	3550	* Values:
Kojto	90:cb3d968589d8	3551	* - 0 - The assertion of IS7816[TXT] does not result in the generation of an
Kojto	90:cb3d968589d8	3552	* interrupt.
Kojto	90:cb3d968589d8	3553	* - 1 - The assertion of IS7816[TXT] results in the generation of an interrupt.
Kojto	90:cb3d968589d8	3554	*/
Kojto	90:cb3d968589d8	3555	/@{/
Kojto	90:cb3d968589d8	3556	#define BP_UART_IE7816_TXTE (1U) /!< Bit position for UART_IE7816_TXTE. /
Kojto	90:cb3d968589d8	3557	#define BM_UART_IE7816_TXTE (0x02U) /!< Bit mask for UART_IE7816_TXTE. /
Kojto	90:cb3d968589d8	3558	#define BS_UART_IE7816_TXTE (1U) /!< Bit field size in bits for UART_IE7816_TXTE. /
Kojto	90:cb3d968589d8	3559
Kojto	90:cb3d968589d8	3560	/! @brief Read current value of the UART_IE7816_TXTE field. /
Kojto	90:cb3d968589d8	3561	#define BR_UART_IE7816_TXTE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_TXTE))
Kojto	90:cb3d968589d8	3562
Kojto	90:cb3d968589d8	3563	/! @brief Format value for bitfield UART_IE7816_TXTE. /
Kojto	90:cb3d968589d8	3564	#define BF_UART_IE7816_TXTE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_TXTE) & BM_UART_IE7816_TXTE)
Kojto	90:cb3d968589d8	3565
Kojto	90:cb3d968589d8	3566	/! @brief Set the TXTE field to a new value. /
Kojto	90:cb3d968589d8	3567	#define BW_UART_IE7816_TXTE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_TXTE) = (v))
Kojto	90:cb3d968589d8	3568	/@}/
Kojto	90:cb3d968589d8	3569
Kojto	90:cb3d968589d8	3570	/*!
Kojto	90:cb3d968589d8	3571	* @name Register UART_IE7816, field GTVE[2] (RW)
Kojto	90:cb3d968589d8	3572	*
Kojto	90:cb3d968589d8	3573	* Values:
Kojto	90:cb3d968589d8	3574	* - 0 - The assertion of IS7816[GTV] does not result in the generation of an
Kojto	90:cb3d968589d8	3575	* interrupt.
Kojto	90:cb3d968589d8	3576	* - 1 - The assertion of IS7816[GTV] results in the generation of an interrupt.
Kojto	90:cb3d968589d8	3577	*/
Kojto	90:cb3d968589d8	3578	/@{/
Kojto	90:cb3d968589d8	3579	#define BP_UART_IE7816_GTVE (2U) /!< Bit position for UART_IE7816_GTVE. /
Kojto	90:cb3d968589d8	3580	#define BM_UART_IE7816_GTVE (0x04U) /!< Bit mask for UART_IE7816_GTVE. /
Kojto	90:cb3d968589d8	3581	#define BS_UART_IE7816_GTVE (1U) /!< Bit field size in bits for UART_IE7816_GTVE. /
Kojto	90:cb3d968589d8	3582
Kojto	90:cb3d968589d8	3583	/! @brief Read current value of the UART_IE7816_GTVE field. /
Kojto	90:cb3d968589d8	3584	#define BR_UART_IE7816_GTVE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_GTVE))
Kojto	90:cb3d968589d8	3585
Kojto	90:cb3d968589d8	3586	/! @brief Format value for bitfield UART_IE7816_GTVE. /
Kojto	90:cb3d968589d8	3587	#define BF_UART_IE7816_GTVE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_GTVE) & BM_UART_IE7816_GTVE)
Kojto	90:cb3d968589d8	3588
Kojto	90:cb3d968589d8	3589	/! @brief Set the GTVE field to a new value. /
Kojto	90:cb3d968589d8	3590	#define BW_UART_IE7816_GTVE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_GTVE) = (v))
Kojto	90:cb3d968589d8	3591	/@}/
Kojto	90:cb3d968589d8	3592
Kojto	90:cb3d968589d8	3593	/*!
Kojto	90:cb3d968589d8	3594	* @name Register UART_IE7816, field INITDE[4] (RW)
Kojto	90:cb3d968589d8	3595	*
Kojto	90:cb3d968589d8	3596	* Values:
Kojto	90:cb3d968589d8	3597	* - 0 - The assertion of IS7816[INITD] does not result in the generation of an
Kojto	90:cb3d968589d8	3598	* interrupt.
Kojto	90:cb3d968589d8	3599	* - 1 - The assertion of IS7816[INITD] results in the generation of an
Kojto	90:cb3d968589d8	3600	* interrupt.
Kojto	90:cb3d968589d8	3601	*/
Kojto	90:cb3d968589d8	3602	/@{/
Kojto	90:cb3d968589d8	3603	#define BP_UART_IE7816_INITDE (4U) /!< Bit position for UART_IE7816_INITDE. /
Kojto	90:cb3d968589d8	3604	#define BM_UART_IE7816_INITDE (0x10U) /!< Bit mask for UART_IE7816_INITDE. /
Kojto	90:cb3d968589d8	3605	#define BS_UART_IE7816_INITDE (1U) /!< Bit field size in bits for UART_IE7816_INITDE. /
Kojto	90:cb3d968589d8	3606
Kojto	90:cb3d968589d8	3607	/! @brief Read current value of the UART_IE7816_INITDE field. /
Kojto	90:cb3d968589d8	3608	#define BR_UART_IE7816_INITDE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_INITDE))
Kojto	90:cb3d968589d8	3609
Kojto	90:cb3d968589d8	3610	/! @brief Format value for bitfield UART_IE7816_INITDE. /
Kojto	90:cb3d968589d8	3611	#define BF_UART_IE7816_INITDE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_INITDE) & BM_UART_IE7816_INITDE)
Kojto	90:cb3d968589d8	3612
Kojto	90:cb3d968589d8	3613	/! @brief Set the INITDE field to a new value. /
Kojto	90:cb3d968589d8	3614	#define BW_UART_IE7816_INITDE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_INITDE) = (v))
Kojto	90:cb3d968589d8	3615	/@}/
Kojto	90:cb3d968589d8	3616
Kojto	90:cb3d968589d8	3617	/*!
Kojto	90:cb3d968589d8	3618	* @name Register UART_IE7816, field BWTE[5] (RW)
Kojto	90:cb3d968589d8	3619	*
Kojto	90:cb3d968589d8	3620	* Values:
Kojto	90:cb3d968589d8	3621	* - 0 - The assertion of IS7816[BWT] does not result in the generation of an
Kojto	90:cb3d968589d8	3622	* interrupt.
Kojto	90:cb3d968589d8	3623	* - 1 - The assertion of IS7816[BWT] results in the generation of an interrupt.
Kojto	90:cb3d968589d8	3624	*/
Kojto	90:cb3d968589d8	3625	/@{/
Kojto	90:cb3d968589d8	3626	#define BP_UART_IE7816_BWTE (5U) /!< Bit position for UART_IE7816_BWTE. /
Kojto	90:cb3d968589d8	3627	#define BM_UART_IE7816_BWTE (0x20U) /!< Bit mask for UART_IE7816_BWTE. /
Kojto	90:cb3d968589d8	3628	#define BS_UART_IE7816_BWTE (1U) /!< Bit field size in bits for UART_IE7816_BWTE. /
Kojto	90:cb3d968589d8	3629
Kojto	90:cb3d968589d8	3630	/! @brief Read current value of the UART_IE7816_BWTE field. /
Kojto	90:cb3d968589d8	3631	#define BR_UART_IE7816_BWTE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_BWTE))
Kojto	90:cb3d968589d8	3632
Kojto	90:cb3d968589d8	3633	/! @brief Format value for bitfield UART_IE7816_BWTE. /
Kojto	90:cb3d968589d8	3634	#define BF_UART_IE7816_BWTE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_BWTE) & BM_UART_IE7816_BWTE)
Kojto	90:cb3d968589d8	3635
Kojto	90:cb3d968589d8	3636	/! @brief Set the BWTE field to a new value. /
Kojto	90:cb3d968589d8	3637	#define BW_UART_IE7816_BWTE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_BWTE) = (v))
Kojto	90:cb3d968589d8	3638	/@}/
Kojto	90:cb3d968589d8	3639
Kojto	90:cb3d968589d8	3640	/*!
Kojto	90:cb3d968589d8	3641	* @name Register UART_IE7816, field CWTE[6] (RW)
Kojto	90:cb3d968589d8	3642	*
Kojto	90:cb3d968589d8	3643	* Values:
Kojto	90:cb3d968589d8	3644	* - 0 - The assertion of IS7816[CWT] does not result in the generation of an
Kojto	90:cb3d968589d8	3645	* interrupt.
Kojto	90:cb3d968589d8	3646	* - 1 - The assertion of IS7816[CWT] results in the generation of an interrupt.
Kojto	90:cb3d968589d8	3647	*/
Kojto	90:cb3d968589d8	3648	/@{/
Kojto	90:cb3d968589d8	3649	#define BP_UART_IE7816_CWTE (6U) /!< Bit position for UART_IE7816_CWTE. /
Kojto	90:cb3d968589d8	3650	#define BM_UART_IE7816_CWTE (0x40U) /!< Bit mask for UART_IE7816_CWTE. /
Kojto	90:cb3d968589d8	3651	#define BS_UART_IE7816_CWTE (1U) /!< Bit field size in bits for UART_IE7816_CWTE. /
Kojto	90:cb3d968589d8	3652
Kojto	90:cb3d968589d8	3653	/! @brief Read current value of the UART_IE7816_CWTE field. /
Kojto	90:cb3d968589d8	3654	#define BR_UART_IE7816_CWTE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_CWTE))
Kojto	90:cb3d968589d8	3655
Kojto	90:cb3d968589d8	3656	/! @brief Format value for bitfield UART_IE7816_CWTE. /
Kojto	90:cb3d968589d8	3657	#define BF_UART_IE7816_CWTE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_CWTE) & BM_UART_IE7816_CWTE)
Kojto	90:cb3d968589d8	3658
Kojto	90:cb3d968589d8	3659	/! @brief Set the CWTE field to a new value. /
Kojto	90:cb3d968589d8	3660	#define BW_UART_IE7816_CWTE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_CWTE) = (v))
Kojto	90:cb3d968589d8	3661	/@}/
Kojto	90:cb3d968589d8	3662
Kojto	90:cb3d968589d8	3663	/*!
Kojto	90:cb3d968589d8	3664	* @name Register UART_IE7816, field WTE[7] (RW)
Kojto	90:cb3d968589d8	3665	*
Kojto	90:cb3d968589d8	3666	* Values:
Kojto	90:cb3d968589d8	3667	* - 0 - The assertion of IS7816[WT] does not result in the generation of an
Kojto	90:cb3d968589d8	3668	* interrupt.
Kojto	90:cb3d968589d8	3669	* - 1 - The assertion of IS7816[WT] results in the generation of an interrupt.
Kojto	90:cb3d968589d8	3670	*/
Kojto	90:cb3d968589d8	3671	/@{/
Kojto	90:cb3d968589d8	3672	#define BP_UART_IE7816_WTE (7U) /!< Bit position for UART_IE7816_WTE. /
Kojto	90:cb3d968589d8	3673	#define BM_UART_IE7816_WTE (0x80U) /!< Bit mask for UART_IE7816_WTE. /
Kojto	90:cb3d968589d8	3674	#define BS_UART_IE7816_WTE (1U) /!< Bit field size in bits for UART_IE7816_WTE. /
Kojto	90:cb3d968589d8	3675
Kojto	90:cb3d968589d8	3676	/! @brief Read current value of the UART_IE7816_WTE field. /
Kojto	90:cb3d968589d8	3677	#define BR_UART_IE7816_WTE(x) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_WTE))
Kojto	90:cb3d968589d8	3678
Kojto	90:cb3d968589d8	3679	/! @brief Format value for bitfield UART_IE7816_WTE. /
Kojto	90:cb3d968589d8	3680	#define BF_UART_IE7816_WTE(v) ((uint8_t)((uint8_t)(v) << BP_UART_IE7816_WTE) & BM_UART_IE7816_WTE)
Kojto	90:cb3d968589d8	3681
Kojto	90:cb3d968589d8	3682	/! @brief Set the WTE field to a new value. /
Kojto	90:cb3d968589d8	3683	#define BW_UART_IE7816_WTE(x, v) (BITBAND_ACCESS8(HW_UART_IE7816_ADDR(x), BP_UART_IE7816_WTE) = (v))
Kojto	90:cb3d968589d8	3684	/@}/
Kojto	90:cb3d968589d8	3685
Kojto	90:cb3d968589d8	3686	/*******************************************************************************
Kojto	90:cb3d968589d8	3687	* HW_UART_IS7816 - UART 7816 Interrupt Status Register
Kojto	90:cb3d968589d8	3688	******************************************************************************/
Kojto	90:cb3d968589d8	3689
Kojto	90:cb3d968589d8	3690	/*!
Kojto	90:cb3d968589d8	3691	* @brief HW_UART_IS7816 - UART 7816 Interrupt Status Register (RW)
Kojto	90:cb3d968589d8	3692	*
Kojto	90:cb3d968589d8	3693	* Reset value: 0x00U
Kojto	90:cb3d968589d8	3694	*
Kojto	90:cb3d968589d8	3695	* The IS7816 register provides a mechanism to read and clear the interrupt
Kojto	90:cb3d968589d8	3696	* flags. All flags/interrupts are cleared by writing a 1 to the field location.
Kojto	90:cb3d968589d8	3697	* Writing a 0 has no effect. All bits are "sticky", meaning they indicate that only
Kojto	90:cb3d968589d8	3698	* the flag condition that occurred since the last time the bit was cleared, not
Kojto	90:cb3d968589d8	3699	* that the condition currently exists. The status flags are set regardless of
Kojto	90:cb3d968589d8	3700	* whether the corresponding field in the IE7816 is set or cleared. The IE7816
Kojto	90:cb3d968589d8	3701	* controls only if an interrupt is issued to the host processor. This register is
Kojto	90:cb3d968589d8	3702	* specific to 7816 functionality and the values in this register have no affect on
Kojto	90:cb3d968589d8	3703	* UART operation and should be ignored if 7816E is not set/enabled. This
Kojto	90:cb3d968589d8	3704	* register may be read or written at anytime.
Kojto	90:cb3d968589d8	3705	*/
Kojto	90:cb3d968589d8	3706	typedef union _hw_uart_is7816
Kojto	90:cb3d968589d8	3707	{
Kojto	90:cb3d968589d8	3708	uint8_t U;
Kojto	90:cb3d968589d8	3709	struct _hw_uart_is7816_bitfields
Kojto	90:cb3d968589d8	3710	{
Kojto	90:cb3d968589d8	3711	uint8_t RXT : 1; /!< [0] Receive Threshold Exceeded Interrupt /
Kojto	90:cb3d968589d8	3712	uint8_t TXT : 1; /!< [1] Transmit Threshold Exceeded Interrupt /
Kojto	90:cb3d968589d8	3713	uint8_t GTV : 1; /!< [2] Guard Timer Violated Interrupt /
Kojto	90:cb3d968589d8	3714	uint8_t RESERVED0 : 1; /!< [3] /
Kojto	90:cb3d968589d8	3715	uint8_t INITD : 1; /!< [4] Initial Character Detected Interrupt /
Kojto	90:cb3d968589d8	3716	uint8_t BWT : 1; /!< [5] Block Wait Timer Interrupt /
Kojto	90:cb3d968589d8	3717	uint8_t CWT : 1; /!< [6] Character Wait Timer Interrupt /
Kojto	90:cb3d968589d8	3718	uint8_t WT : 1; /!< [7] Wait Timer Interrupt /
Kojto	90:cb3d968589d8	3719	} B;
Kojto	90:cb3d968589d8	3720	} hw_uart_is7816_t;
Kojto	90:cb3d968589d8	3721
Kojto	90:cb3d968589d8	3722	/*!
Kojto	90:cb3d968589d8	3723	* @name Constants and macros for entire UART_IS7816 register
Kojto	90:cb3d968589d8	3724	*/
Kojto	90:cb3d968589d8	3725	/@{/
Kojto	90:cb3d968589d8	3726	#define HW_UART_IS7816_ADDR(x) ((x) + 0x1AU)
Kojto	90:cb3d968589d8	3727
Kojto	90:cb3d968589d8	3728	#define HW_UART_IS7816(x) ((__IO hw_uart_is7816_t ) HW_UART_IS7816_ADDR(x))
Kojto	90:cb3d968589d8	3729	#define HW_UART_IS7816_RD(x) (HW_UART_IS7816(x).U)
Kojto	90:cb3d968589d8	3730	#define HW_UART_IS7816_WR(x, v) (HW_UART_IS7816(x).U = (v))
Kojto	90:cb3d968589d8	3731	#define HW_UART_IS7816_SET(x, v) (HW_UART_IS7816_WR(x, HW_UART_IS7816_RD(x) \| (v)))
Kojto	90:cb3d968589d8	3732	#define HW_UART_IS7816_CLR(x, v) (HW_UART_IS7816_WR(x, HW_UART_IS7816_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	3733	#define HW_UART_IS7816_TOG(x, v) (HW_UART_IS7816_WR(x, HW_UART_IS7816_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	3734	/@}/
Kojto	90:cb3d968589d8	3735
Kojto	90:cb3d968589d8	3736	/*
Kojto	90:cb3d968589d8	3737	* Constants & macros for individual UART_IS7816 bitfields
Kojto	90:cb3d968589d8	3738	*/
Kojto	90:cb3d968589d8	3739
Kojto	90:cb3d968589d8	3740	/*!
Kojto	90:cb3d968589d8	3741	* @name Register UART_IS7816, field RXT[0] (W1C)
Kojto	90:cb3d968589d8	3742	*
Kojto	90:cb3d968589d8	3743	* Indicates that there are more than ET7816[RXTHRESHOLD] consecutive NACKS
Kojto	90:cb3d968589d8	3744	* generated in response to parity errors on received data. This flag requires ANACK
Kojto	90:cb3d968589d8	3745	* to be set. Additionally, this flag asserts only when C7816[TTYPE] = 0.
Kojto	90:cb3d968589d8	3746	* Clearing this field also resets the counter keeping track of consecutive NACKS. The
Kojto	90:cb3d968589d8	3747	* UART will continue to attempt to receive data regardless of whether this flag
Kojto	90:cb3d968589d8	3748	* is set. If 7816E is cleared/disabled, RE is cleared/disabled, C7816[TTYPE] = 1,
Kojto	90:cb3d968589d8	3749	* or packet is received without needing to issue a NACK, the internal NACK
Kojto	90:cb3d968589d8	3750	* detection counter is cleared and the count restarts from zero on the next
Kojto	90:cb3d968589d8	3751	* transmitted NACK. This interrupt is cleared by writing 1.
Kojto	90:cb3d968589d8	3752	*
Kojto	90:cb3d968589d8	3753	* Values:
Kojto	90:cb3d968589d8	3754	* - 0 - The number of consecutive NACKS generated as a result of parity errors
Kojto	90:cb3d968589d8	3755	* and buffer overruns is less than or equal to the value in
Kojto	90:cb3d968589d8	3756	* ET7816[RXTHRESHOLD].
Kojto	90:cb3d968589d8	3757	* - 1 - The number of consecutive NACKS generated as a result of parity errors
Kojto	90:cb3d968589d8	3758	* and buffer overruns is greater than the value in ET7816[RXTHRESHOLD].
Kojto	90:cb3d968589d8	3759	*/
Kojto	90:cb3d968589d8	3760	/@{/
Kojto	90:cb3d968589d8	3761	#define BP_UART_IS7816_RXT (0U) /!< Bit position for UART_IS7816_RXT. /
Kojto	90:cb3d968589d8	3762	#define BM_UART_IS7816_RXT (0x01U) /!< Bit mask for UART_IS7816_RXT. /
Kojto	90:cb3d968589d8	3763	#define BS_UART_IS7816_RXT (1U) /!< Bit field size in bits for UART_IS7816_RXT. /
Kojto	90:cb3d968589d8	3764
Kojto	90:cb3d968589d8	3765	/! @brief Read current value of the UART_IS7816_RXT field. /
Kojto	90:cb3d968589d8	3766	#define BR_UART_IS7816_RXT(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_RXT))
Kojto	90:cb3d968589d8	3767
Kojto	90:cb3d968589d8	3768	/! @brief Format value for bitfield UART_IS7816_RXT. /
Kojto	90:cb3d968589d8	3769	#define BF_UART_IS7816_RXT(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_RXT) & BM_UART_IS7816_RXT)
Kojto	90:cb3d968589d8	3770
Kojto	90:cb3d968589d8	3771	/! @brief Set the RXT field to a new value. /
Kojto	90:cb3d968589d8	3772	#define BW_UART_IS7816_RXT(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_RXT) = (v))
Kojto	90:cb3d968589d8	3773	/@}/
Kojto	90:cb3d968589d8	3774
Kojto	90:cb3d968589d8	3775	/*!
Kojto	90:cb3d968589d8	3776	* @name Register UART_IS7816, field TXT[1] (W1C)
Kojto	90:cb3d968589d8	3777	*
Kojto	90:cb3d968589d8	3778	* Indicates that the transmit NACK threshold has been exceeded as indicated by
Kojto	90:cb3d968589d8	3779	* ET7816[TXTHRESHOLD]. Regardless of whether this flag is set, the UART
Kojto	90:cb3d968589d8	3780	* continues to retransmit indefinitely. This flag asserts only when C7816[TTYPE] = 0. If
Kojto	90:cb3d968589d8	3781	* 7816E is cleared/disabled, ANACK is cleared/disabled, C2[TE] is
Kojto	90:cb3d968589d8	3782	* cleared/disabled, C7816[TTYPE] = 1, or packet is transferred without receiving a NACK, the
Kojto	90:cb3d968589d8	3783	* internal NACK detection counter is cleared and the count restarts from zero on
Kojto	90:cb3d968589d8	3784	* the next received NACK. This interrupt is cleared by writing 1.
Kojto	90:cb3d968589d8	3785	*
Kojto	90:cb3d968589d8	3786	* Values:
Kojto	90:cb3d968589d8	3787	* - 0 - The number of retries and corresponding NACKS does not exceed the value
Kojto	90:cb3d968589d8	3788	* in ET7816[TXTHRESHOLD].
Kojto	90:cb3d968589d8	3789	* - 1 - The number of retries and corresponding NACKS exceeds the value in
Kojto	90:cb3d968589d8	3790	* ET7816[TXTHRESHOLD].
Kojto	90:cb3d968589d8	3791	*/
Kojto	90:cb3d968589d8	3792	/@{/
Kojto	90:cb3d968589d8	3793	#define BP_UART_IS7816_TXT (1U) /!< Bit position for UART_IS7816_TXT. /
Kojto	90:cb3d968589d8	3794	#define BM_UART_IS7816_TXT (0x02U) /!< Bit mask for UART_IS7816_TXT. /
Kojto	90:cb3d968589d8	3795	#define BS_UART_IS7816_TXT (1U) /!< Bit field size in bits for UART_IS7816_TXT. /
Kojto	90:cb3d968589d8	3796
Kojto	90:cb3d968589d8	3797	/! @brief Read current value of the UART_IS7816_TXT field. /
Kojto	90:cb3d968589d8	3798	#define BR_UART_IS7816_TXT(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_TXT))
Kojto	90:cb3d968589d8	3799
Kojto	90:cb3d968589d8	3800	/! @brief Format value for bitfield UART_IS7816_TXT. /
Kojto	90:cb3d968589d8	3801	#define BF_UART_IS7816_TXT(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_TXT) & BM_UART_IS7816_TXT)
Kojto	90:cb3d968589d8	3802
Kojto	90:cb3d968589d8	3803	/! @brief Set the TXT field to a new value. /
Kojto	90:cb3d968589d8	3804	#define BW_UART_IS7816_TXT(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_TXT) = (v))
Kojto	90:cb3d968589d8	3805	/@}/
Kojto	90:cb3d968589d8	3806
Kojto	90:cb3d968589d8	3807	/*!
Kojto	90:cb3d968589d8	3808	* @name Register UART_IS7816, field GTV[2] (W1C)
Kojto	90:cb3d968589d8	3809	*
Kojto	90:cb3d968589d8	3810	* Indicates that one or more of the character guard time, block guard time, or
Kojto	90:cb3d968589d8	3811	* guard time are violated. This interrupt is cleared by writing 1.
Kojto	90:cb3d968589d8	3812	*
Kojto	90:cb3d968589d8	3813	* Values:
Kojto	90:cb3d968589d8	3814	* - 0 - A guard time (GT, CGT, or BGT) has not been violated.
Kojto	90:cb3d968589d8	3815	* - 1 - A guard time (GT, CGT, or BGT) has been violated.
Kojto	90:cb3d968589d8	3816	*/
Kojto	90:cb3d968589d8	3817	/@{/
Kojto	90:cb3d968589d8	3818	#define BP_UART_IS7816_GTV (2U) /!< Bit position for UART_IS7816_GTV. /
Kojto	90:cb3d968589d8	3819	#define BM_UART_IS7816_GTV (0x04U) /!< Bit mask for UART_IS7816_GTV. /
Kojto	90:cb3d968589d8	3820	#define BS_UART_IS7816_GTV (1U) /!< Bit field size in bits for UART_IS7816_GTV. /
Kojto	90:cb3d968589d8	3821
Kojto	90:cb3d968589d8	3822	/! @brief Read current value of the UART_IS7816_GTV field. /
Kojto	90:cb3d968589d8	3823	#define BR_UART_IS7816_GTV(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_GTV))
Kojto	90:cb3d968589d8	3824
Kojto	90:cb3d968589d8	3825	/! @brief Format value for bitfield UART_IS7816_GTV. /
Kojto	90:cb3d968589d8	3826	#define BF_UART_IS7816_GTV(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_GTV) & BM_UART_IS7816_GTV)
Kojto	90:cb3d968589d8	3827
Kojto	90:cb3d968589d8	3828	/! @brief Set the GTV field to a new value. /
Kojto	90:cb3d968589d8	3829	#define BW_UART_IS7816_GTV(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_GTV) = (v))
Kojto	90:cb3d968589d8	3830	/@}/
Kojto	90:cb3d968589d8	3831
Kojto	90:cb3d968589d8	3832	/*!
Kojto	90:cb3d968589d8	3833	* @name Register UART_IS7816, field INITD[4] (W1C)
Kojto	90:cb3d968589d8	3834	*
Kojto	90:cb3d968589d8	3835	* Indicates that a valid initial character is received. This interrupt is
Kojto	90:cb3d968589d8	3836	* cleared by writing 1.
Kojto	90:cb3d968589d8	3837	*
Kojto	90:cb3d968589d8	3838	* Values:
Kojto	90:cb3d968589d8	3839	* - 0 - A valid initial character has not been received.
Kojto	90:cb3d968589d8	3840	* - 1 - A valid initial character has been received.
Kojto	90:cb3d968589d8	3841	*/
Kojto	90:cb3d968589d8	3842	/@{/
Kojto	90:cb3d968589d8	3843	#define BP_UART_IS7816_INITD (4U) /!< Bit position for UART_IS7816_INITD. /
Kojto	90:cb3d968589d8	3844	#define BM_UART_IS7816_INITD (0x10U) /!< Bit mask for UART_IS7816_INITD. /
Kojto	90:cb3d968589d8	3845	#define BS_UART_IS7816_INITD (1U) /!< Bit field size in bits for UART_IS7816_INITD. /
Kojto	90:cb3d968589d8	3846
Kojto	90:cb3d968589d8	3847	/! @brief Read current value of the UART_IS7816_INITD field. /
Kojto	90:cb3d968589d8	3848	#define BR_UART_IS7816_INITD(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_INITD))
Kojto	90:cb3d968589d8	3849
Kojto	90:cb3d968589d8	3850	/! @brief Format value for bitfield UART_IS7816_INITD. /
Kojto	90:cb3d968589d8	3851	#define BF_UART_IS7816_INITD(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_INITD) & BM_UART_IS7816_INITD)
Kojto	90:cb3d968589d8	3852
Kojto	90:cb3d968589d8	3853	/! @brief Set the INITD field to a new value. /
Kojto	90:cb3d968589d8	3854	#define BW_UART_IS7816_INITD(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_INITD) = (v))
Kojto	90:cb3d968589d8	3855	/@}/
Kojto	90:cb3d968589d8	3856
Kojto	90:cb3d968589d8	3857	/*!
Kojto	90:cb3d968589d8	3858	* @name Register UART_IS7816, field BWT[5] (W1C)
Kojto	90:cb3d968589d8	3859	*
Kojto	90:cb3d968589d8	3860	* Indicates that the block wait time, the time between the leading edge of
Kojto	90:cb3d968589d8	3861	* first received character of a block and the leading edge of the last character the
Kojto	90:cb3d968589d8	3862	* previously transmitted block, has exceeded the programmed value. This flag
Kojto	90:cb3d968589d8	3863	* asserts only when C7816[TTYPE] = 1.This interrupt is cleared by writing 1.
Kojto	90:cb3d968589d8	3864	*
Kojto	90:cb3d968589d8	3865	* Values:
Kojto	90:cb3d968589d8	3866	* - 0 - Block wait time (BWT) has not been violated.
Kojto	90:cb3d968589d8	3867	* - 1 - Block wait time (BWT) has been violated.
Kojto	90:cb3d968589d8	3868	*/
Kojto	90:cb3d968589d8	3869	/@{/
Kojto	90:cb3d968589d8	3870	#define BP_UART_IS7816_BWT (5U) /!< Bit position for UART_IS7816_BWT. /
Kojto	90:cb3d968589d8	3871	#define BM_UART_IS7816_BWT (0x20U) /!< Bit mask for UART_IS7816_BWT. /
Kojto	90:cb3d968589d8	3872	#define BS_UART_IS7816_BWT (1U) /!< Bit field size in bits for UART_IS7816_BWT. /
Kojto	90:cb3d968589d8	3873
Kojto	90:cb3d968589d8	3874	/! @brief Read current value of the UART_IS7816_BWT field. /
Kojto	90:cb3d968589d8	3875	#define BR_UART_IS7816_BWT(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_BWT))
Kojto	90:cb3d968589d8	3876
Kojto	90:cb3d968589d8	3877	/! @brief Format value for bitfield UART_IS7816_BWT. /
Kojto	90:cb3d968589d8	3878	#define BF_UART_IS7816_BWT(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_BWT) & BM_UART_IS7816_BWT)
Kojto	90:cb3d968589d8	3879
Kojto	90:cb3d968589d8	3880	/! @brief Set the BWT field to a new value. /
Kojto	90:cb3d968589d8	3881	#define BW_UART_IS7816_BWT(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_BWT) = (v))
Kojto	90:cb3d968589d8	3882	/@}/
Kojto	90:cb3d968589d8	3883
Kojto	90:cb3d968589d8	3884	/*!
Kojto	90:cb3d968589d8	3885	* @name Register UART_IS7816, field CWT[6] (W1C)
Kojto	90:cb3d968589d8	3886	*
Kojto	90:cb3d968589d8	3887	* Indicates that the character wait time, the time between the leading edges of
Kojto	90:cb3d968589d8	3888	* two consecutive characters in a block, has exceeded the programmed value.
Kojto	90:cb3d968589d8	3889	* This flag asserts only when C7816[TTYPE] = 1. This interrupt is cleared by
Kojto	90:cb3d968589d8	3890	* writing 1.
Kojto	90:cb3d968589d8	3891	*
Kojto	90:cb3d968589d8	3892	* Values:
Kojto	90:cb3d968589d8	3893	* - 0 - Character wait time (CWT) has not been violated.
Kojto	90:cb3d968589d8	3894	* - 1 - Character wait time (CWT) has been violated.
Kojto	90:cb3d968589d8	3895	*/
Kojto	90:cb3d968589d8	3896	/@{/
Kojto	90:cb3d968589d8	3897	#define BP_UART_IS7816_CWT (6U) /!< Bit position for UART_IS7816_CWT. /
Kojto	90:cb3d968589d8	3898	#define BM_UART_IS7816_CWT (0x40U) /!< Bit mask for UART_IS7816_CWT. /
Kojto	90:cb3d968589d8	3899	#define BS_UART_IS7816_CWT (1U) /!< Bit field size in bits for UART_IS7816_CWT. /
Kojto	90:cb3d968589d8	3900
Kojto	90:cb3d968589d8	3901	/! @brief Read current value of the UART_IS7816_CWT field. /
Kojto	90:cb3d968589d8	3902	#define BR_UART_IS7816_CWT(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_CWT))
Kojto	90:cb3d968589d8	3903
Kojto	90:cb3d968589d8	3904	/! @brief Format value for bitfield UART_IS7816_CWT. /
Kojto	90:cb3d968589d8	3905	#define BF_UART_IS7816_CWT(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_CWT) & BM_UART_IS7816_CWT)
Kojto	90:cb3d968589d8	3906
Kojto	90:cb3d968589d8	3907	/! @brief Set the CWT field to a new value. /
Kojto	90:cb3d968589d8	3908	#define BW_UART_IS7816_CWT(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_CWT) = (v))
Kojto	90:cb3d968589d8	3909	/@}/
Kojto	90:cb3d968589d8	3910
Kojto	90:cb3d968589d8	3911	/*!
Kojto	90:cb3d968589d8	3912	* @name Register UART_IS7816, field WT[7] (W1C)
Kojto	90:cb3d968589d8	3913	*
Kojto	90:cb3d968589d8	3914	* Indicates that the wait time, the time between the leading edge of a
Kojto	90:cb3d968589d8	3915	* character being transmitted and the leading edge of the next response character, has
Kojto	90:cb3d968589d8	3916	* exceeded the programmed value. This flag asserts only when C7816[TTYPE] = 0.
Kojto	90:cb3d968589d8	3917	* This interrupt is cleared by writing 1.
Kojto	90:cb3d968589d8	3918	*
Kojto	90:cb3d968589d8	3919	* Values:
Kojto	90:cb3d968589d8	3920	* - 0 - Wait time (WT) has not been violated.
Kojto	90:cb3d968589d8	3921	* - 1 - Wait time (WT) has been violated.
Kojto	90:cb3d968589d8	3922	*/
Kojto	90:cb3d968589d8	3923	/@{/
Kojto	90:cb3d968589d8	3924	#define BP_UART_IS7816_WT (7U) /!< Bit position for UART_IS7816_WT. /
Kojto	90:cb3d968589d8	3925	#define BM_UART_IS7816_WT (0x80U) /!< Bit mask for UART_IS7816_WT. /
Kojto	90:cb3d968589d8	3926	#define BS_UART_IS7816_WT (1U) /!< Bit field size in bits for UART_IS7816_WT. /
Kojto	90:cb3d968589d8	3927
Kojto	90:cb3d968589d8	3928	/! @brief Read current value of the UART_IS7816_WT field. /
Kojto	90:cb3d968589d8	3929	#define BR_UART_IS7816_WT(x) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_WT))
Kojto	90:cb3d968589d8	3930
Kojto	90:cb3d968589d8	3931	/! @brief Format value for bitfield UART_IS7816_WT. /
Kojto	90:cb3d968589d8	3932	#define BF_UART_IS7816_WT(v) ((uint8_t)((uint8_t)(v) << BP_UART_IS7816_WT) & BM_UART_IS7816_WT)
Kojto	90:cb3d968589d8	3933
Kojto	90:cb3d968589d8	3934	/! @brief Set the WT field to a new value. /
Kojto	90:cb3d968589d8	3935	#define BW_UART_IS7816_WT(x, v) (BITBAND_ACCESS8(HW_UART_IS7816_ADDR(x), BP_UART_IS7816_WT) = (v))
Kojto	90:cb3d968589d8	3936	/@}/
Kojto	90:cb3d968589d8	3937
Kojto	90:cb3d968589d8	3938	/*******************************************************************************
Kojto	90:cb3d968589d8	3939	* HW_UART_WP7816T0 - UART 7816 Wait Parameter Register
Kojto	90:cb3d968589d8	3940	******************************************************************************/
Kojto	90:cb3d968589d8	3941
Kojto	90:cb3d968589d8	3942	/*!
Kojto	90:cb3d968589d8	3943	* @brief HW_UART_WP7816T0 - UART 7816 Wait Parameter Register (RW)
Kojto	90:cb3d968589d8	3944	*
Kojto	90:cb3d968589d8	3945	* Reset value: 0x0AU
Kojto	90:cb3d968589d8	3946	*
Kojto	90:cb3d968589d8	3947	* The WP7816 register contains constants used in the generation of various wait
Kojto	90:cb3d968589d8	3948	* timer counters. To save register space, this register is used differently
Kojto	90:cb3d968589d8	3949	* when C7816[TTYPE] = 0 and C7816[TTYPE] = 1. This register may be read at any
Kojto	90:cb3d968589d8	3950	* time. This register must be written to only when C7816[ISO_7816E] is not set.
Kojto	90:cb3d968589d8	3951	*/
Kojto	90:cb3d968589d8	3952	typedef union _hw_uart_wp7816t0
Kojto	90:cb3d968589d8	3953	{
Kojto	90:cb3d968589d8	3954	uint8_t U;
Kojto	90:cb3d968589d8	3955	struct _hw_uart_wp7816t0_bitfields
Kojto	90:cb3d968589d8	3956	{
Kojto	90:cb3d968589d8	3957	uint8_t WI : 8; /!< [7:0] Wait Time Integer (C7816[TTYPE] = 0) /
Kojto	90:cb3d968589d8	3958	} B;
Kojto	90:cb3d968589d8	3959	} hw_uart_wp7816t0_t;
Kojto	90:cb3d968589d8	3960
Kojto	90:cb3d968589d8	3961	/*!
Kojto	90:cb3d968589d8	3962	* @name Constants and macros for entire UART_WP7816T0 register
Kojto	90:cb3d968589d8	3963	*/
Kojto	90:cb3d968589d8	3964	/@{/
Kojto	90:cb3d968589d8	3965	#define HW_UART_WP7816T0_ADDR(x) ((x) + 0x1BU)
Kojto	90:cb3d968589d8	3966
Kojto	90:cb3d968589d8	3967	#define HW_UART_WP7816T0(x) ((__IO hw_uart_wp7816t0_t ) HW_UART_WP7816T0_ADDR(x))
Kojto	90:cb3d968589d8	3968	#define HW_UART_WP7816T0_RD(x) (HW_UART_WP7816T0(x).U)
Kojto	90:cb3d968589d8	3969	#define HW_UART_WP7816T0_WR(x, v) (HW_UART_WP7816T0(x).U = (v))
Kojto	90:cb3d968589d8	3970	#define HW_UART_WP7816T0_SET(x, v) (HW_UART_WP7816T0_WR(x, HW_UART_WP7816T0_RD(x) \| (v)))
Kojto	90:cb3d968589d8	3971	#define HW_UART_WP7816T0_CLR(x, v) (HW_UART_WP7816T0_WR(x, HW_UART_WP7816T0_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	3972	#define HW_UART_WP7816T0_TOG(x, v) (HW_UART_WP7816T0_WR(x, HW_UART_WP7816T0_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	3973	/@}/
Kojto	90:cb3d968589d8	3974
Kojto	90:cb3d968589d8	3975	/*
Kojto	90:cb3d968589d8	3976	* Constants & macros for individual UART_WP7816T0 bitfields
Kojto	90:cb3d968589d8	3977	*/
Kojto	90:cb3d968589d8	3978
Kojto	90:cb3d968589d8	3979	/*!
Kojto	90:cb3d968589d8	3980	* @name Register UART_WP7816T0, field WI[7:0] (RW)
Kojto	90:cb3d968589d8	3981	*
Kojto	90:cb3d968589d8	3982	* Used to calculate the value used for the WT counter. It represents a value
Kojto	90:cb3d968589d8	3983	* between 1 and 255. The value of zero is not valid. This value is used only when
Kojto	90:cb3d968589d8	3984	* C7816[TTYPE] = 0. See Wait time and guard time parameters.
Kojto	90:cb3d968589d8	3985	*/
Kojto	90:cb3d968589d8	3986	/@{/
Kojto	90:cb3d968589d8	3987	#define BP_UART_WP7816T0_WI (0U) /!< Bit position for UART_WP7816T0_WI. /
Kojto	90:cb3d968589d8	3988	#define BM_UART_WP7816T0_WI (0xFFU) /!< Bit mask for UART_WP7816T0_WI. /
Kojto	90:cb3d968589d8	3989	#define BS_UART_WP7816T0_WI (8U) /!< Bit field size in bits for UART_WP7816T0_WI. /
Kojto	90:cb3d968589d8	3990
Kojto	90:cb3d968589d8	3991	/! @brief Read current value of the UART_WP7816T0_WI field. /
Kojto	90:cb3d968589d8	3992	#define BR_UART_WP7816T0_WI(x) (HW_UART_WP7816T0(x).U)
Kojto	90:cb3d968589d8	3993
Kojto	90:cb3d968589d8	3994	/! @brief Format value for bitfield UART_WP7816T0_WI. /
Kojto	90:cb3d968589d8	3995	#define BF_UART_WP7816T0_WI(v) ((uint8_t)((uint8_t)(v) << BP_UART_WP7816T0_WI) & BM_UART_WP7816T0_WI)
Kojto	90:cb3d968589d8	3996
Kojto	90:cb3d968589d8	3997	/! @brief Set the WI field to a new value. /
Kojto	90:cb3d968589d8	3998	#define BW_UART_WP7816T0_WI(x, v) (HW_UART_WP7816T0_WR(x, v))
Kojto	90:cb3d968589d8	3999	/@}/
Kojto	90:cb3d968589d8	4000	/*******************************************************************************
Kojto	90:cb3d968589d8	4001	* HW_UART_WP7816T1 - UART 7816 Wait Parameter Register
Kojto	90:cb3d968589d8	4002	******************************************************************************/
Kojto	90:cb3d968589d8	4003
Kojto	90:cb3d968589d8	4004	/*!
Kojto	90:cb3d968589d8	4005	* @brief HW_UART_WP7816T1 - UART 7816 Wait Parameter Register (RW)
Kojto	90:cb3d968589d8	4006	*
Kojto	90:cb3d968589d8	4007	* Reset value: 0x0AU
Kojto	90:cb3d968589d8	4008	*
Kojto	90:cb3d968589d8	4009	* The WP7816 register contains constants used in the generation of various wait
Kojto	90:cb3d968589d8	4010	* timer counters. To save register space, this register is used differently
Kojto	90:cb3d968589d8	4011	* when C7816[TTYPE] = 0 and C7816[TTYPE] = 1. This register may be read at any
Kojto	90:cb3d968589d8	4012	* time. This register must be written to only when C7816[ISO_7816E] is not set.
Kojto	90:cb3d968589d8	4013	*/
Kojto	90:cb3d968589d8	4014	typedef union _hw_uart_wp7816t1
Kojto	90:cb3d968589d8	4015	{
Kojto	90:cb3d968589d8	4016	uint8_t U;
Kojto	90:cb3d968589d8	4017	struct _hw_uart_wp7816t1_bitfields
Kojto	90:cb3d968589d8	4018	{
Kojto	90:cb3d968589d8	4019	uint8_t BWI : 4; /*!< [3:0] Block Wait Time Integer(C7816[TTYPE] = 1)
Kojto	90:cb3d968589d8	4020	* */
Kojto	90:cb3d968589d8	4021	uint8_t CWI : 4; /*!< [7:4] Character Wait Time Integer (C7816[TTYPE]
Kojto	90:cb3d968589d8	4022	* = 1) */
Kojto	90:cb3d968589d8	4023	} B;
Kojto	90:cb3d968589d8	4024	} hw_uart_wp7816t1_t;
Kojto	90:cb3d968589d8	4025
Kojto	90:cb3d968589d8	4026	/*!
Kojto	90:cb3d968589d8	4027	* @name Constants and macros for entire UART_WP7816T1 register
Kojto	90:cb3d968589d8	4028	*/
Kojto	90:cb3d968589d8	4029	/@{/
Kojto	90:cb3d968589d8	4030	#define HW_UART_WP7816T1_ADDR(x) ((x) + 0x1BU)
Kojto	90:cb3d968589d8	4031
Kojto	90:cb3d968589d8	4032	#define HW_UART_WP7816T1(x) ((__IO hw_uart_wp7816t1_t ) HW_UART_WP7816T1_ADDR(x))
Kojto	90:cb3d968589d8	4033	#define HW_UART_WP7816T1_RD(x) (HW_UART_WP7816T1(x).U)
Kojto	90:cb3d968589d8	4034	#define HW_UART_WP7816T1_WR(x, v) (HW_UART_WP7816T1(x).U = (v))
Kojto	90:cb3d968589d8	4035	#define HW_UART_WP7816T1_SET(x, v) (HW_UART_WP7816T1_WR(x, HW_UART_WP7816T1_RD(x) \| (v)))
Kojto	90:cb3d968589d8	4036	#define HW_UART_WP7816T1_CLR(x, v) (HW_UART_WP7816T1_WR(x, HW_UART_WP7816T1_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	4037	#define HW_UART_WP7816T1_TOG(x, v) (HW_UART_WP7816T1_WR(x, HW_UART_WP7816T1_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	4038	/@}/
Kojto	90:cb3d968589d8	4039
Kojto	90:cb3d968589d8	4040	/*
Kojto	90:cb3d968589d8	4041	* Constants & macros for individual UART_WP7816T1 bitfields
Kojto	90:cb3d968589d8	4042	*/
Kojto	90:cb3d968589d8	4043
Kojto	90:cb3d968589d8	4044	/*!
Kojto	90:cb3d968589d8	4045	* @name Register UART_WP7816T1, field BWI[3:0] (RW)
Kojto	90:cb3d968589d8	4046	*
Kojto	90:cb3d968589d8	4047	* Used to calculate the value used for the BWT counter. It represent a value
Kojto	90:cb3d968589d8	4048	* between 0 and 15. This value is used only when C7816[TTYPE] = 1. See Wait time
Kojto	90:cb3d968589d8	4049	* and guard time parameters .
Kojto	90:cb3d968589d8	4050	*/
Kojto	90:cb3d968589d8	4051	/@{/
Kojto	90:cb3d968589d8	4052	#define BP_UART_WP7816T1_BWI (0U) /!< Bit position for UART_WP7816T1_BWI. /
Kojto	90:cb3d968589d8	4053	#define BM_UART_WP7816T1_BWI (0x0FU) /!< Bit mask for UART_WP7816T1_BWI. /
Kojto	90:cb3d968589d8	4054	#define BS_UART_WP7816T1_BWI (4U) /!< Bit field size in bits for UART_WP7816T1_BWI. /
Kojto	90:cb3d968589d8	4055
Kojto	90:cb3d968589d8	4056	/! @brief Read current value of the UART_WP7816T1_BWI field. /
Kojto	90:cb3d968589d8	4057	#define BR_UART_WP7816T1_BWI(x) (HW_UART_WP7816T1(x).B.BWI)
Kojto	90:cb3d968589d8	4058
Kojto	90:cb3d968589d8	4059	/! @brief Format value for bitfield UART_WP7816T1_BWI. /
Kojto	90:cb3d968589d8	4060	#define BF_UART_WP7816T1_BWI(v) ((uint8_t)((uint8_t)(v) << BP_UART_WP7816T1_BWI) & BM_UART_WP7816T1_BWI)
Kojto	90:cb3d968589d8	4061
Kojto	90:cb3d968589d8	4062	/! @brief Set the BWI field to a new value. /
Kojto	90:cb3d968589d8	4063	#define BW_UART_WP7816T1_BWI(x, v) (HW_UART_WP7816T1_WR(x, (HW_UART_WP7816T1_RD(x) & ~BM_UART_WP7816T1_BWI) \| BF_UART_WP7816T1_BWI(v)))
Kojto	90:cb3d968589d8	4064	/@}/
Kojto	90:cb3d968589d8	4065
Kojto	90:cb3d968589d8	4066	/*!
Kojto	90:cb3d968589d8	4067	* @name Register UART_WP7816T1, field CWI[7:4] (RW)
Kojto	90:cb3d968589d8	4068	*
Kojto	90:cb3d968589d8	4069	* Used to calculate the value used for the CWT counter. It represents a value
Kojto	90:cb3d968589d8	4070	* between 0 and 15. This value is used only when C7816[TTYPE] = 1. See Wait time
Kojto	90:cb3d968589d8	4071	* and guard time parameters .
Kojto	90:cb3d968589d8	4072	*/
Kojto	90:cb3d968589d8	4073	/@{/
Kojto	90:cb3d968589d8	4074	#define BP_UART_WP7816T1_CWI (4U) /!< Bit position for UART_WP7816T1_CWI. /
Kojto	90:cb3d968589d8	4075	#define BM_UART_WP7816T1_CWI (0xF0U) /!< Bit mask for UART_WP7816T1_CWI. /
Kojto	90:cb3d968589d8	4076	#define BS_UART_WP7816T1_CWI (4U) /!< Bit field size in bits for UART_WP7816T1_CWI. /
Kojto	90:cb3d968589d8	4077
Kojto	90:cb3d968589d8	4078	/! @brief Read current value of the UART_WP7816T1_CWI field. /
Kojto	90:cb3d968589d8	4079	#define BR_UART_WP7816T1_CWI(x) (HW_UART_WP7816T1(x).B.CWI)
Kojto	90:cb3d968589d8	4080
Kojto	90:cb3d968589d8	4081	/! @brief Format value for bitfield UART_WP7816T1_CWI. /
Kojto	90:cb3d968589d8	4082	#define BF_UART_WP7816T1_CWI(v) ((uint8_t)((uint8_t)(v) << BP_UART_WP7816T1_CWI) & BM_UART_WP7816T1_CWI)
Kojto	90:cb3d968589d8	4083
Kojto	90:cb3d968589d8	4084	/! @brief Set the CWI field to a new value. /
Kojto	90:cb3d968589d8	4085	#define BW_UART_WP7816T1_CWI(x, v) (HW_UART_WP7816T1_WR(x, (HW_UART_WP7816T1_RD(x) & ~BM_UART_WP7816T1_CWI) \| BF_UART_WP7816T1_CWI(v)))
Kojto	90:cb3d968589d8	4086	/@}/
Kojto	90:cb3d968589d8	4087
Kojto	90:cb3d968589d8	4088	/*******************************************************************************
Kojto	90:cb3d968589d8	4089	* HW_UART_WN7816 - UART 7816 Wait N Register
Kojto	90:cb3d968589d8	4090	******************************************************************************/
Kojto	90:cb3d968589d8	4091
Kojto	90:cb3d968589d8	4092	/*!
Kojto	90:cb3d968589d8	4093	* @brief HW_UART_WN7816 - UART 7816 Wait N Register (RW)
Kojto	90:cb3d968589d8	4094	*
Kojto	90:cb3d968589d8	4095	* Reset value: 0x00U
Kojto	90:cb3d968589d8	4096	*
Kojto	90:cb3d968589d8	4097	* The WN7816 register contains a parameter that is used in the calculation of
Kojto	90:cb3d968589d8	4098	* the guard time counter. This register may be read at any time. This register
Kojto	90:cb3d968589d8	4099	* must be written to only when C7816[ISO_7816E] is not set.
Kojto	90:cb3d968589d8	4100	*/
Kojto	90:cb3d968589d8	4101	typedef union _hw_uart_wn7816
Kojto	90:cb3d968589d8	4102	{
Kojto	90:cb3d968589d8	4103	uint8_t U;
Kojto	90:cb3d968589d8	4104	struct _hw_uart_wn7816_bitfields
Kojto	90:cb3d968589d8	4105	{
Kojto	90:cb3d968589d8	4106	uint8_t GTN : 8; /!< [7:0] Guard Band N /
Kojto	90:cb3d968589d8	4107	} B;
Kojto	90:cb3d968589d8	4108	} hw_uart_wn7816_t;
Kojto	90:cb3d968589d8	4109
Kojto	90:cb3d968589d8	4110	/*!
Kojto	90:cb3d968589d8	4111	* @name Constants and macros for entire UART_WN7816 register
Kojto	90:cb3d968589d8	4112	*/
Kojto	90:cb3d968589d8	4113	/@{/
Kojto	90:cb3d968589d8	4114	#define HW_UART_WN7816_ADDR(x) ((x) + 0x1CU)
Kojto	90:cb3d968589d8	4115
Kojto	90:cb3d968589d8	4116	#define HW_UART_WN7816(x) ((__IO hw_uart_wn7816_t ) HW_UART_WN7816_ADDR(x))
Kojto	90:cb3d968589d8	4117	#define HW_UART_WN7816_RD(x) (HW_UART_WN7816(x).U)
Kojto	90:cb3d968589d8	4118	#define HW_UART_WN7816_WR(x, v) (HW_UART_WN7816(x).U = (v))
Kojto	90:cb3d968589d8	4119	#define HW_UART_WN7816_SET(x, v) (HW_UART_WN7816_WR(x, HW_UART_WN7816_RD(x) \| (v)))
Kojto	90:cb3d968589d8	4120	#define HW_UART_WN7816_CLR(x, v) (HW_UART_WN7816_WR(x, HW_UART_WN7816_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	4121	#define HW_UART_WN7816_TOG(x, v) (HW_UART_WN7816_WR(x, HW_UART_WN7816_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	4122	/@}/
Kojto	90:cb3d968589d8	4123
Kojto	90:cb3d968589d8	4124	/*
Kojto	90:cb3d968589d8	4125	* Constants & macros for individual UART_WN7816 bitfields
Kojto	90:cb3d968589d8	4126	*/
Kojto	90:cb3d968589d8	4127
Kojto	90:cb3d968589d8	4128	/*!
Kojto	90:cb3d968589d8	4129	* @name Register UART_WN7816, field GTN[7:0] (RW)
Kojto	90:cb3d968589d8	4130	*
Kojto	90:cb3d968589d8	4131	* Defines a parameter used in the calculation of GT, CGT, and BGT counters. The
Kojto	90:cb3d968589d8	4132	* value represents an integer number between 0 and 255. See Wait time and guard
Kojto	90:cb3d968589d8	4133	* time parameters .
Kojto	90:cb3d968589d8	4134	*/
Kojto	90:cb3d968589d8	4135	/@{/
Kojto	90:cb3d968589d8	4136	#define BP_UART_WN7816_GTN (0U) /!< Bit position for UART_WN7816_GTN. /
Kojto	90:cb3d968589d8	4137	#define BM_UART_WN7816_GTN (0xFFU) /!< Bit mask for UART_WN7816_GTN. /
Kojto	90:cb3d968589d8	4138	#define BS_UART_WN7816_GTN (8U) /!< Bit field size in bits for UART_WN7816_GTN. /
Kojto	90:cb3d968589d8	4139
Kojto	90:cb3d968589d8	4140	/! @brief Read current value of the UART_WN7816_GTN field. /
Kojto	90:cb3d968589d8	4141	#define BR_UART_WN7816_GTN(x) (HW_UART_WN7816(x).U)
Kojto	90:cb3d968589d8	4142
Kojto	90:cb3d968589d8	4143	/! @brief Format value for bitfield UART_WN7816_GTN. /
Kojto	90:cb3d968589d8	4144	#define BF_UART_WN7816_GTN(v) ((uint8_t)((uint8_t)(v) << BP_UART_WN7816_GTN) & BM_UART_WN7816_GTN)
Kojto	90:cb3d968589d8	4145
Kojto	90:cb3d968589d8	4146	/! @brief Set the GTN field to a new value. /
Kojto	90:cb3d968589d8	4147	#define BW_UART_WN7816_GTN(x, v) (HW_UART_WN7816_WR(x, v))
Kojto	90:cb3d968589d8	4148	/@}/
Kojto	90:cb3d968589d8	4149
Kojto	90:cb3d968589d8	4150	/*******************************************************************************
Kojto	90:cb3d968589d8	4151	* HW_UART_WF7816 - UART 7816 Wait FD Register
Kojto	90:cb3d968589d8	4152	******************************************************************************/
Kojto	90:cb3d968589d8	4153
Kojto	90:cb3d968589d8	4154	/*!
Kojto	90:cb3d968589d8	4155	* @brief HW_UART_WF7816 - UART 7816 Wait FD Register (RW)
Kojto	90:cb3d968589d8	4156	*
Kojto	90:cb3d968589d8	4157	* Reset value: 0x01U
Kojto	90:cb3d968589d8	4158	*
Kojto	90:cb3d968589d8	4159	* The WF7816 contains parameters that are used in the generation of various
Kojto	90:cb3d968589d8	4160	* counters including GT, CGT, BGT, WT, and BWT. This register may be read at any
Kojto	90:cb3d968589d8	4161	* time. This register must be written to only when C7816[ISO_7816E] is not set.
Kojto	90:cb3d968589d8	4162	*/
Kojto	90:cb3d968589d8	4163	typedef union _hw_uart_wf7816
Kojto	90:cb3d968589d8	4164	{
Kojto	90:cb3d968589d8	4165	uint8_t U;
Kojto	90:cb3d968589d8	4166	struct _hw_uart_wf7816_bitfields
Kojto	90:cb3d968589d8	4167	{
Kojto	90:cb3d968589d8	4168	uint8_t GTFD : 8; /!< [7:0] FD Multiplier /
Kojto	90:cb3d968589d8	4169	} B;
Kojto	90:cb3d968589d8	4170	} hw_uart_wf7816_t;
Kojto	90:cb3d968589d8	4171
Kojto	90:cb3d968589d8	4172	/*!
Kojto	90:cb3d968589d8	4173	* @name Constants and macros for entire UART_WF7816 register
Kojto	90:cb3d968589d8	4174	*/
Kojto	90:cb3d968589d8	4175	/@{/
Kojto	90:cb3d968589d8	4176	#define HW_UART_WF7816_ADDR(x) ((x) + 0x1DU)
Kojto	90:cb3d968589d8	4177
Kojto	90:cb3d968589d8	4178	#define HW_UART_WF7816(x) ((__IO hw_uart_wf7816_t ) HW_UART_WF7816_ADDR(x))
Kojto	90:cb3d968589d8	4179	#define HW_UART_WF7816_RD(x) (HW_UART_WF7816(x).U)
Kojto	90:cb3d968589d8	4180	#define HW_UART_WF7816_WR(x, v) (HW_UART_WF7816(x).U = (v))
Kojto	90:cb3d968589d8	4181	#define HW_UART_WF7816_SET(x, v) (HW_UART_WF7816_WR(x, HW_UART_WF7816_RD(x) \| (v)))
Kojto	90:cb3d968589d8	4182	#define HW_UART_WF7816_CLR(x, v) (HW_UART_WF7816_WR(x, HW_UART_WF7816_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	4183	#define HW_UART_WF7816_TOG(x, v) (HW_UART_WF7816_WR(x, HW_UART_WF7816_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	4184	/@}/
Kojto	90:cb3d968589d8	4185
Kojto	90:cb3d968589d8	4186	/*
Kojto	90:cb3d968589d8	4187	* Constants & macros for individual UART_WF7816 bitfields
Kojto	90:cb3d968589d8	4188	*/
Kojto	90:cb3d968589d8	4189
Kojto	90:cb3d968589d8	4190	/*!
Kojto	90:cb3d968589d8	4191	* @name Register UART_WF7816, field GTFD[7:0] (RW)
Kojto	90:cb3d968589d8	4192	*
Kojto	90:cb3d968589d8	4193	* Used as another multiplier in the calculation of WT and BWT. This value
Kojto	90:cb3d968589d8	4194	* represents a number between 1 and 255. The value of 0 is invalid. This value is not
Kojto	90:cb3d968589d8	4195	* used in baud rate generation. See Wait time and guard time parameters and
Kojto	90:cb3d968589d8	4196	* Baud rate generation .
Kojto	90:cb3d968589d8	4197	*/
Kojto	90:cb3d968589d8	4198	/@{/
Kojto	90:cb3d968589d8	4199	#define BP_UART_WF7816_GTFD (0U) /!< Bit position for UART_WF7816_GTFD. /
Kojto	90:cb3d968589d8	4200	#define BM_UART_WF7816_GTFD (0xFFU) /!< Bit mask for UART_WF7816_GTFD. /
Kojto	90:cb3d968589d8	4201	#define BS_UART_WF7816_GTFD (8U) /!< Bit field size in bits for UART_WF7816_GTFD. /
Kojto	90:cb3d968589d8	4202
Kojto	90:cb3d968589d8	4203	/! @brief Read current value of the UART_WF7816_GTFD field. /
Kojto	90:cb3d968589d8	4204	#define BR_UART_WF7816_GTFD(x) (HW_UART_WF7816(x).U)
Kojto	90:cb3d968589d8	4205
Kojto	90:cb3d968589d8	4206	/! @brief Format value for bitfield UART_WF7816_GTFD. /
Kojto	90:cb3d968589d8	4207	#define BF_UART_WF7816_GTFD(v) ((uint8_t)((uint8_t)(v) << BP_UART_WF7816_GTFD) & BM_UART_WF7816_GTFD)
Kojto	90:cb3d968589d8	4208
Kojto	90:cb3d968589d8	4209	/! @brief Set the GTFD field to a new value. /
Kojto	90:cb3d968589d8	4210	#define BW_UART_WF7816_GTFD(x, v) (HW_UART_WF7816_WR(x, v))
Kojto	90:cb3d968589d8	4211	/@}/
Kojto	90:cb3d968589d8	4212
Kojto	90:cb3d968589d8	4213	/*******************************************************************************
Kojto	90:cb3d968589d8	4214	* HW_UART_ET7816 - UART 7816 Error Threshold Register
Kojto	90:cb3d968589d8	4215	******************************************************************************/
Kojto	90:cb3d968589d8	4216
Kojto	90:cb3d968589d8	4217	/*!
Kojto	90:cb3d968589d8	4218	* @brief HW_UART_ET7816 - UART 7816 Error Threshold Register (RW)
Kojto	90:cb3d968589d8	4219	*
Kojto	90:cb3d968589d8	4220	* Reset value: 0x00U
Kojto	90:cb3d968589d8	4221	*
Kojto	90:cb3d968589d8	4222	* The ET7816 register contains fields that determine the number of NACKs that
Kojto	90:cb3d968589d8	4223	* must be received or transmitted before the host processor is notified. This
Kojto	90:cb3d968589d8	4224	* register may be read at anytime. This register must be written to only when
Kojto	90:cb3d968589d8	4225	* C7816[ISO_7816E] is not set.
Kojto	90:cb3d968589d8	4226	*/
Kojto	90:cb3d968589d8	4227	typedef union _hw_uart_et7816
Kojto	90:cb3d968589d8	4228	{
Kojto	90:cb3d968589d8	4229	uint8_t U;
Kojto	90:cb3d968589d8	4230	struct _hw_uart_et7816_bitfields
Kojto	90:cb3d968589d8	4231	{
Kojto	90:cb3d968589d8	4232	uint8_t RXTHRESHOLD : 4; /!< [3:0] Receive NACK Threshold /
Kojto	90:cb3d968589d8	4233	uint8_t TXTHRESHOLD : 4; /!< [7:4] Transmit NACK Threshold /
Kojto	90:cb3d968589d8	4234	} B;
Kojto	90:cb3d968589d8	4235	} hw_uart_et7816_t;
Kojto	90:cb3d968589d8	4236
Kojto	90:cb3d968589d8	4237	/*!
Kojto	90:cb3d968589d8	4238	* @name Constants and macros for entire UART_ET7816 register
Kojto	90:cb3d968589d8	4239	*/
Kojto	90:cb3d968589d8	4240	/@{/
Kojto	90:cb3d968589d8	4241	#define HW_UART_ET7816_ADDR(x) ((x) + 0x1EU)
Kojto	90:cb3d968589d8	4242
Kojto	90:cb3d968589d8	4243	#define HW_UART_ET7816(x) ((__IO hw_uart_et7816_t ) HW_UART_ET7816_ADDR(x))
Kojto	90:cb3d968589d8	4244	#define HW_UART_ET7816_RD(x) (HW_UART_ET7816(x).U)
Kojto	90:cb3d968589d8	4245	#define HW_UART_ET7816_WR(x, v) (HW_UART_ET7816(x).U = (v))
Kojto	90:cb3d968589d8	4246	#define HW_UART_ET7816_SET(x, v) (HW_UART_ET7816_WR(x, HW_UART_ET7816_RD(x) \| (v)))
Kojto	90:cb3d968589d8	4247	#define HW_UART_ET7816_CLR(x, v) (HW_UART_ET7816_WR(x, HW_UART_ET7816_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	4248	#define HW_UART_ET7816_TOG(x, v) (HW_UART_ET7816_WR(x, HW_UART_ET7816_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	4249	/@}/
Kojto	90:cb3d968589d8	4250
Kojto	90:cb3d968589d8	4251	/*
Kojto	90:cb3d968589d8	4252	* Constants & macros for individual UART_ET7816 bitfields
Kojto	90:cb3d968589d8	4253	*/
Kojto	90:cb3d968589d8	4254
Kojto	90:cb3d968589d8	4255	/*!
Kojto	90:cb3d968589d8	4256	* @name Register UART_ET7816, field RXTHRESHOLD[3:0] (RW)
Kojto	90:cb3d968589d8	4257	*
Kojto	90:cb3d968589d8	4258	* The value written to this field indicates the maximum number of consecutive
Kojto	90:cb3d968589d8	4259	* NACKs generated as a result of a parity error or receiver buffer overruns
Kojto	90:cb3d968589d8	4260	* before the host processor is notified. After the counter exceeds that value in the
Kojto	90:cb3d968589d8	4261	* field, the IS7816[RXT] is asserted. This field is meaningful only when
Kojto	90:cb3d968589d8	4262	* C7816[TTYPE] = 0. The value read from this field represents the number of consecutive
Kojto	90:cb3d968589d8	4263	* NACKs that have been transmitted since the last successful reception. This
Kojto	90:cb3d968589d8	4264	* counter saturates at 4'hF and does not wrap around. Regardless of the number of
Kojto	90:cb3d968589d8	4265	* NACKs sent, the UART continues to receive valid packets indefinitely. For
Kojto	90:cb3d968589d8	4266	* additional information, see IS7816[RXT] field description.
Kojto	90:cb3d968589d8	4267	*/
Kojto	90:cb3d968589d8	4268	/@{/
Kojto	90:cb3d968589d8	4269	#define BP_UART_ET7816_RXTHRESHOLD (0U) /!< Bit position for UART_ET7816_RXTHRESHOLD. /
Kojto	90:cb3d968589d8	4270	#define BM_UART_ET7816_RXTHRESHOLD (0x0FU) /!< Bit mask for UART_ET7816_RXTHRESHOLD. /
Kojto	90:cb3d968589d8	4271	#define BS_UART_ET7816_RXTHRESHOLD (4U) /!< Bit field size in bits for UART_ET7816_RXTHRESHOLD. /
Kojto	90:cb3d968589d8	4272
Kojto	90:cb3d968589d8	4273	/! @brief Read current value of the UART_ET7816_RXTHRESHOLD field. /
Kojto	90:cb3d968589d8	4274	#define BR_UART_ET7816_RXTHRESHOLD(x) (HW_UART_ET7816(x).B.RXTHRESHOLD)
Kojto	90:cb3d968589d8	4275
Kojto	90:cb3d968589d8	4276	/! @brief Format value for bitfield UART_ET7816_RXTHRESHOLD. /
Kojto	90:cb3d968589d8	4277	#define BF_UART_ET7816_RXTHRESHOLD(v) ((uint8_t)((uint8_t)(v) << BP_UART_ET7816_RXTHRESHOLD) & BM_UART_ET7816_RXTHRESHOLD)
Kojto	90:cb3d968589d8	4278
Kojto	90:cb3d968589d8	4279	/! @brief Set the RXTHRESHOLD field to a new value. /
Kojto	90:cb3d968589d8	4280	#define BW_UART_ET7816_RXTHRESHOLD(x, v) (HW_UART_ET7816_WR(x, (HW_UART_ET7816_RD(x) & ~BM_UART_ET7816_RXTHRESHOLD) \| BF_UART_ET7816_RXTHRESHOLD(v)))
Kojto	90:cb3d968589d8	4281	/@}/
Kojto	90:cb3d968589d8	4282
Kojto	90:cb3d968589d8	4283	/*!
Kojto	90:cb3d968589d8	4284	* @name Register UART_ET7816, field TXTHRESHOLD[7:4] (RW)
Kojto	90:cb3d968589d8	4285	*
Kojto	90:cb3d968589d8	4286	* The value written to this field indicates the maximum number of failed
Kojto	90:cb3d968589d8	4287	* attempts (NACKs) a transmitted character can have before the host processor is
Kojto	90:cb3d968589d8	4288	* notified. This field is meaningful only when C7816[TTYPE] = 0 and C7816[ANACK] = 1.
Kojto	90:cb3d968589d8	4289	* The value read from this field represents the number of consecutive NACKs
Kojto	90:cb3d968589d8	4290	* that have been received since the last successful transmission. This counter
Kojto	90:cb3d968589d8	4291	* saturates at 4'hF and does not wrap around. Regardless of how many NACKs that are
Kojto	90:cb3d968589d8	4292	* received, the UART continues to retransmit indefinitely. This flag only
Kojto	90:cb3d968589d8	4293	* asserts when C7816[TTYPE] = 0. For additional information see the IS7816[TXT] field
Kojto	90:cb3d968589d8	4294	* description.
Kojto	90:cb3d968589d8	4295	*
Kojto	90:cb3d968589d8	4296	* Values:
Kojto	90:cb3d968589d8	4297	* - 0 - TXT asserts on the first NACK that is received.
Kojto	90:cb3d968589d8	4298	* - 1 - TXT asserts on the second NACK that is received.
Kojto	90:cb3d968589d8	4299	*/
Kojto	90:cb3d968589d8	4300	/@{/
Kojto	90:cb3d968589d8	4301	#define BP_UART_ET7816_TXTHRESHOLD (4U) /!< Bit position for UART_ET7816_TXTHRESHOLD. /
Kojto	90:cb3d968589d8	4302	#define BM_UART_ET7816_TXTHRESHOLD (0xF0U) /!< Bit mask for UART_ET7816_TXTHRESHOLD. /
Kojto	90:cb3d968589d8	4303	#define BS_UART_ET7816_TXTHRESHOLD (4U) /!< Bit field size in bits for UART_ET7816_TXTHRESHOLD. /
Kojto	90:cb3d968589d8	4304
Kojto	90:cb3d968589d8	4305	/! @brief Read current value of the UART_ET7816_TXTHRESHOLD field. /
Kojto	90:cb3d968589d8	4306	#define BR_UART_ET7816_TXTHRESHOLD(x) (HW_UART_ET7816(x).B.TXTHRESHOLD)
Kojto	90:cb3d968589d8	4307
Kojto	90:cb3d968589d8	4308	/! @brief Format value for bitfield UART_ET7816_TXTHRESHOLD. /
Kojto	90:cb3d968589d8	4309	#define BF_UART_ET7816_TXTHRESHOLD(v) ((uint8_t)((uint8_t)(v) << BP_UART_ET7816_TXTHRESHOLD) & BM_UART_ET7816_TXTHRESHOLD)
Kojto	90:cb3d968589d8	4310
Kojto	90:cb3d968589d8	4311	/! @brief Set the TXTHRESHOLD field to a new value. /
Kojto	90:cb3d968589d8	4312	#define BW_UART_ET7816_TXTHRESHOLD(x, v) (HW_UART_ET7816_WR(x, (HW_UART_ET7816_RD(x) & ~BM_UART_ET7816_TXTHRESHOLD) \| BF_UART_ET7816_TXTHRESHOLD(v)))
Kojto	90:cb3d968589d8	4313	/@}/
Kojto	90:cb3d968589d8	4314
Kojto	90:cb3d968589d8	4315	/*******************************************************************************
Kojto	90:cb3d968589d8	4316	* HW_UART_TL7816 - UART 7816 Transmit Length Register
Kojto	90:cb3d968589d8	4317	******************************************************************************/
Kojto	90:cb3d968589d8	4318
Kojto	90:cb3d968589d8	4319	/*!
Kojto	90:cb3d968589d8	4320	* @brief HW_UART_TL7816 - UART 7816 Transmit Length Register (RW)
Kojto	90:cb3d968589d8	4321	*
Kojto	90:cb3d968589d8	4322	* Reset value: 0x00U
Kojto	90:cb3d968589d8	4323	*
Kojto	90:cb3d968589d8	4324	* The TL7816 register is used to indicate the number of characters contained in
Kojto	90:cb3d968589d8	4325	* the block being transmitted. This register is used only when C7816[TTYPE] =
Kojto	90:cb3d968589d8	4326	* 1. This register may be read at anytime. This register must be written only
Kojto	90:cb3d968589d8	4327	* when C2[TE] is not enabled.
Kojto	90:cb3d968589d8	4328	*/
Kojto	90:cb3d968589d8	4329	typedef union _hw_uart_tl7816
Kojto	90:cb3d968589d8	4330	{
Kojto	90:cb3d968589d8	4331	uint8_t U;
Kojto	90:cb3d968589d8	4332	struct _hw_uart_tl7816_bitfields
Kojto	90:cb3d968589d8	4333	{
Kojto	90:cb3d968589d8	4334	uint8_t TLEN : 8; /!< [7:0] Transmit Length /
Kojto	90:cb3d968589d8	4335	} B;
Kojto	90:cb3d968589d8	4336	} hw_uart_tl7816_t;
Kojto	90:cb3d968589d8	4337
Kojto	90:cb3d968589d8	4338	/*!
Kojto	90:cb3d968589d8	4339	* @name Constants and macros for entire UART_TL7816 register
Kojto	90:cb3d968589d8	4340	*/
Kojto	90:cb3d968589d8	4341	/@{/
Kojto	90:cb3d968589d8	4342	#define HW_UART_TL7816_ADDR(x) ((x) + 0x1FU)
Kojto	90:cb3d968589d8	4343
Kojto	90:cb3d968589d8	4344	#define HW_UART_TL7816(x) ((__IO hw_uart_tl7816_t ) HW_UART_TL7816_ADDR(x))
Kojto	90:cb3d968589d8	4345	#define HW_UART_TL7816_RD(x) (HW_UART_TL7816(x).U)
Kojto	90:cb3d968589d8	4346	#define HW_UART_TL7816_WR(x, v) (HW_UART_TL7816(x).U = (v))
Kojto	90:cb3d968589d8	4347	#define HW_UART_TL7816_SET(x, v) (HW_UART_TL7816_WR(x, HW_UART_TL7816_RD(x) \| (v)))
Kojto	90:cb3d968589d8	4348	#define HW_UART_TL7816_CLR(x, v) (HW_UART_TL7816_WR(x, HW_UART_TL7816_RD(x) & ~(v)))
Kojto	90:cb3d968589d8	4349	#define HW_UART_TL7816_TOG(x, v) (HW_UART_TL7816_WR(x, HW_UART_TL7816_RD(x) ^ (v)))
Kojto	90:cb3d968589d8	4350	/@}/
Kojto	90:cb3d968589d8	4351
Kojto	90:cb3d968589d8	4352	/*
Kojto	90:cb3d968589d8	4353	* Constants & macros for individual UART_TL7816 bitfields
Kojto	90:cb3d968589d8	4354	*/
Kojto	90:cb3d968589d8	4355
Kojto	90:cb3d968589d8	4356	/*!
Kojto	90:cb3d968589d8	4357	* @name Register UART_TL7816, field TLEN[7:0] (RW)
Kojto	90:cb3d968589d8	4358	*
Kojto	90:cb3d968589d8	4359	* This value plus four indicates the number of characters contained in the
Kojto	90:cb3d968589d8	4360	* block being transmitted. This register is automatically decremented by 1 for each
Kojto	90:cb3d968589d8	4361	* character in the information field portion of the block. Additionally, this
Kojto	90:cb3d968589d8	4362	* register is automatically decremented by 1 for the first character of a CRC in
Kojto	90:cb3d968589d8	4363	* the epilogue field. Therefore, this register must be programmed with the number
Kojto	90:cb3d968589d8	4364	* of bytes in the data packet if an LRC is being transmitted, and the number of
Kojto	90:cb3d968589d8	4365	* bytes + 1 if a CRC is being transmitted. This register is not decremented for
Kojto	90:cb3d968589d8	4366	* characters that are assumed to be part of the Prologue field, that is, the
Kojto	90:cb3d968589d8	4367	* first three characters transmitted in a block, or the LRC or last CRC character
Kojto	90:cb3d968589d8	4368	* in the Epilogue field, that is, the last character transmitted. This field
Kojto	90:cb3d968589d8	4369	* must be programed or adjusted only when C2[TE] is cleared.
Kojto	90:cb3d968589d8	4370	*/
Kojto	90:cb3d968589d8	4371	/@{/
Kojto	90:cb3d968589d8	4372	#define BP_UART_TL7816_TLEN (0U) /!< Bit position for UART_TL7816_TLEN. /
Kojto	90:cb3d968589d8	4373	#define BM_UART_TL7816_TLEN (0xFFU) /!< Bit mask for UART_TL7816_TLEN. /
Kojto	90:cb3d968589d8	4374	#define BS_UART_TL7816_TLEN (8U) /!< Bit field size in bits for UART_TL7816_TLEN. /
Kojto	90:cb3d968589d8	4375
Kojto	90:cb3d968589d8	4376	/! @brief Read current value of the UART_TL7816_TLEN field. /
Kojto	90:cb3d968589d8	4377	#define BR_UART_TL7816_TLEN(x) (HW_UART_TL7816(x).U)
Kojto	90:cb3d968589d8	4378
Kojto	90:cb3d968589d8	4379	/! @brief Format value for bitfield UART_TL7816_TLEN. /
Kojto	90:cb3d968589d8	4380	#define BF_UART_TL7816_TLEN(v) ((uint8_t)((uint8_t)(v) << BP_UART_TL7816_TLEN) & BM_UART_TL7816_TLEN)
Kojto	90:cb3d968589d8	4381
Kojto	90:cb3d968589d8	4382	/! @brief Set the TLEN field to a new value. /
Kojto	90:cb3d968589d8	4383	#define BW_UART_TL7816_TLEN(x, v) (HW_UART_TL7816_WR(x, v))
Kojto	90:cb3d968589d8	4384	/@}/
Kojto	90:cb3d968589d8	4385
Kojto	90:cb3d968589d8	4386	/*
Kojto	90:cb3d968589d8	4387	** Start of section using anonymous unions
Kojto	90:cb3d968589d8	4388	*/
Kojto	90:cb3d968589d8	4389
Kojto	90:cb3d968589d8	4390	#if defined(__ARMCC_VERSION)
Kojto	90:cb3d968589d8	4391	#pragma push
Kojto	90:cb3d968589d8	4392	#pragma anon_unions
Kojto	90:cb3d968589d8	4393	#elif defined(__CWCC__)
Kojto	90:cb3d968589d8	4394	#pragma push
Kojto	90:cb3d968589d8	4395	#pragma cpp_extensions on
Kojto	90:cb3d968589d8	4396	#elif defined(__GNUC__)
Kojto	90:cb3d968589d8	4397	/* anonymous unions are enabled by default */
Kojto	90:cb3d968589d8	4398	#elif defined(__IAR_SYSTEMS_ICC__)
Kojto	90:cb3d968589d8	4399	#pragma language=extended
Kojto	90:cb3d968589d8	4400	#else
Kojto	90:cb3d968589d8	4401	#error Not supported compiler type
Kojto	90:cb3d968589d8	4402	#endif
Kojto	90:cb3d968589d8	4403
Kojto	90:cb3d968589d8	4404	/*******************************************************************************
Kojto	90:cb3d968589d8	4405	* hw_uart_t - module struct
Kojto	90:cb3d968589d8	4406	******************************************************************************/
Kojto	90:cb3d968589d8	4407	/*!
Kojto	90:cb3d968589d8	4408	* @brief All UART module registers.
Kojto	90:cb3d968589d8	4409	*/
Kojto	90:cb3d968589d8	4410	#pragma pack(1)
Kojto	90:cb3d968589d8	4411	typedef struct _hw_uart
Kojto	90:cb3d968589d8	4412	{
Kojto	90:cb3d968589d8	4413	__IO hw_uart_bdh_t BDH; /!< [0x0] UART Baud Rate Registers: High /
Kojto	90:cb3d968589d8	4414	__IO hw_uart_bdl_t BDL; /!< [0x1] UART Baud Rate Registers: Low /
Kojto	90:cb3d968589d8	4415	__IO hw_uart_c1_t C1; /!< [0x2] UART Control Register 1 /
Kojto	90:cb3d968589d8	4416	__IO hw_uart_c2_t C2; /!< [0x3] UART Control Register 2 /
Kojto	90:cb3d968589d8	4417	__I hw_uart_s1_t S1; /!< [0x4] UART Status Register 1 /
Kojto	90:cb3d968589d8	4418	__IO hw_uart_s2_t S2; /!< [0x5] UART Status Register 2 /
Kojto	90:cb3d968589d8	4419	__IO hw_uart_c3_t C3; /!< [0x6] UART Control Register 3 /
Kojto	90:cb3d968589d8	4420	__IO hw_uart_d_t D; /!< [0x7] UART Data Register /
Kojto	90:cb3d968589d8	4421	__IO hw_uart_ma1_t MA1; /!< [0x8] UART Match Address Registers 1 /
Kojto	90:cb3d968589d8	4422	__IO hw_uart_ma2_t MA2; /!< [0x9] UART Match Address Registers 2 /
Kojto	90:cb3d968589d8	4423	__IO hw_uart_c4_t C4; /!< [0xA] UART Control Register 4 /
Kojto	90:cb3d968589d8	4424	__IO hw_uart_c5_t C5; /!< [0xB] UART Control Register 5 /
Kojto	90:cb3d968589d8	4425	__I hw_uart_ed_t ED; /!< [0xC] UART Extended Data Register /
Kojto	90:cb3d968589d8	4426	__IO hw_uart_modem_t MODEM; /!< [0xD] UART Modem Register /
Kojto	90:cb3d968589d8	4427	__IO hw_uart_ir_t IR; /!< [0xE] UART Infrared Register /
Kojto	90:cb3d968589d8	4428	uint8_t _reserved0[1];
Kojto	90:cb3d968589d8	4429	__IO hw_uart_pfifo_t PFIFO; /!< [0x10] UART FIFO Parameters /
Kojto	90:cb3d968589d8	4430	__IO hw_uart_cfifo_t CFIFO; /!< [0x11] UART FIFO Control Register /
Kojto	90:cb3d968589d8	4431	__IO hw_uart_sfifo_t SFIFO; /!< [0x12] UART FIFO Status Register /
Kojto	90:cb3d968589d8	4432	__IO hw_uart_twfifo_t TWFIFO; /!< [0x13] UART FIFO Transmit Watermark /
Kojto	90:cb3d968589d8	4433	__I hw_uart_tcfifo_t TCFIFO; /!< [0x14] UART FIFO Transmit Count /
Kojto	90:cb3d968589d8	4434	__IO hw_uart_rwfifo_t RWFIFO; /!< [0x15] UART FIFO Receive Watermark /
Kojto	90:cb3d968589d8	4435	__I hw_uart_rcfifo_t RCFIFO; /!< [0x16] UART FIFO Receive Count /
Kojto	90:cb3d968589d8	4436	uint8_t _reserved1[1];
Kojto	90:cb3d968589d8	4437	__IO hw_uart_c7816_t C7816; /!< [0x18] UART 7816 Control Register /
Kojto	90:cb3d968589d8	4438	__IO hw_uart_ie7816_t IE7816; /!< [0x19] UART 7816 Interrupt Enable Register /
Kojto	90:cb3d968589d8	4439	__IO hw_uart_is7816_t IS7816; /!< [0x1A] UART 7816 Interrupt Status Register /
Kojto	90:cb3d968589d8	4440	union {
Kojto	90:cb3d968589d8	4441	__IO hw_uart_wp7816t0_t WP7816T0; /!< [0x1B] UART 7816 Wait Parameter Register /
Kojto	90:cb3d968589d8	4442	__IO hw_uart_wp7816t1_t WP7816T1; /!< [0x1B] UART 7816 Wait Parameter Register /
Kojto	90:cb3d968589d8	4443	};
Kojto	90:cb3d968589d8	4444	__IO hw_uart_wn7816_t WN7816; /!< [0x1C] UART 7816 Wait N Register /
Kojto	90:cb3d968589d8	4445	__IO hw_uart_wf7816_t WF7816; /!< [0x1D] UART 7816 Wait FD Register /
Kojto	90:cb3d968589d8	4446	__IO hw_uart_et7816_t ET7816; /!< [0x1E] UART 7816 Error Threshold Register /
Kojto	90:cb3d968589d8	4447	__IO hw_uart_tl7816_t TL7816; /!< [0x1F] UART 7816 Transmit Length Register /
Kojto	90:cb3d968589d8	4448	} hw_uart_t;
Kojto	90:cb3d968589d8	4449	#pragma pack()
Kojto	90:cb3d968589d8	4450
Kojto	90:cb3d968589d8	4451	/! @brief Macro to access all UART registers. /
Kojto	90:cb3d968589d8	4452	/! @param x UART module instance base address. /
Kojto	90:cb3d968589d8	4453	/*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
Kojto	90:cb3d968589d8	4454	* use the '&' operator, like <code>&HW_UART(UART0_BASE)</code>. */
Kojto	90:cb3d968589d8	4455	#define HW_UART(x) ((hw_uart_t )(x))
Kojto	90:cb3d968589d8	4456
Kojto	90:cb3d968589d8	4457	/*
Kojto	90:cb3d968589d8	4458	** End of section using anonymous unions
Kojto	90:cb3d968589d8	4459	*/
Kojto	90:cb3d968589d8	4460
Kojto	90:cb3d968589d8	4461	#if defined(__ARMCC_VERSION)
Kojto	90:cb3d968589d8	4462	#pragma pop
Kojto	90:cb3d968589d8	4463	#elif defined(__CWCC__)
Kojto	90:cb3d968589d8	4464	#pragma pop
Kojto	90:cb3d968589d8	4465	#elif defined(__GNUC__)
Kojto	90:cb3d968589d8	4466	/* leave anonymous unions enabled */
Kojto	90:cb3d968589d8	4467	#elif defined(__IAR_SYSTEMS_ICC__)
Kojto	90:cb3d968589d8	4468	#pragma language=default
Kojto	90:cb3d968589d8	4469	#else
Kojto	90:cb3d968589d8	4470	#error Not supported compiler type
Kojto	90:cb3d968589d8	4471	#endif
Kojto	90:cb3d968589d8	4472
Kojto	90:cb3d968589d8	4473	#endif /* __HW_UART_REGISTERS_H__ */
Kojto	90:cb3d968589d8	4474	/* EOF */