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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_aips.h@104:b9ad9a133dc7, 2015-08-05 (annotated)

Committer:
Kojto
Date:
Wed Aug 05 13:16:35 2015 +0100
Revision:
104:b9ad9a133dc7
Parent:
90:cb3d968589d8 
Release 104 of the mbed library:



Changes:

- new platforms: nrf51 microbit

- MAXxxx - fix pwm array search

- LPC8xx - usart enable fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 90:cb3d968589d8 1 /*
Kojto 90:cb3d968589d8 2 ** ###################################################################
Kojto 90:cb3d968589d8 3 ** Compilers: Keil ARM C/C++ Compiler
Kojto 90:cb3d968589d8 4 ** Freescale C/C++ for Embedded ARM
Kojto 90:cb3d968589d8 5 ** GNU C Compiler
Kojto 90:cb3d968589d8 6 ** IAR ANSI C/C++ Compiler for ARM
Kojto 90:cb3d968589d8 7 **
Kojto 90:cb3d968589d8 8 ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
Kojto 90:cb3d968589d8 9 ** Version: rev. 2.5, 2014-02-10
Kojto 90:cb3d968589d8 10 ** Build: b140604
Kojto 90:cb3d968589d8 11 **
Kojto 90:cb3d968589d8 12 ** Abstract:
Kojto 90:cb3d968589d8 13 ** Extension to the CMSIS register access layer header.
Kojto 90:cb3d968589d8 14 **
Kojto 90:cb3d968589d8 15 ** Copyright (c) 2014 Freescale Semiconductor, Inc.
Kojto 90:cb3d968589d8 16 ** All rights reserved.
Kojto 90:cb3d968589d8 17 **
Kojto 90:cb3d968589d8 18 ** Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 19 ** are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 20 **
Kojto 90:cb3d968589d8 21 ** o Redistributions of source code must retain the above copyright notice, this list
Kojto 90:cb3d968589d8 22 ** of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 23 **
Kojto 90:cb3d968589d8 24 ** o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 90:cb3d968589d8 25 ** list of conditions and the following disclaimer in the documentation and/or
Kojto 90:cb3d968589d8 26 ** other materials provided with the distribution.
Kojto 90:cb3d968589d8 27 **
Kojto 90:cb3d968589d8 28 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 90:cb3d968589d8 29 ** contributors may be used to endorse or promote products derived from this
Kojto 90:cb3d968589d8 30 ** software without specific prior written permission.
Kojto 90:cb3d968589d8 31 **
Kojto 90:cb3d968589d8 32 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 90:cb3d968589d8 33 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 90:cb3d968589d8 34 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 35 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 90:cb3d968589d8 36 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 90:cb3d968589d8 37 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 90:cb3d968589d8 38 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 90:cb3d968589d8 39 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 90:cb3d968589d8 40 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 90:cb3d968589d8 41 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 42 **
Kojto 90:cb3d968589d8 43 ** http: www.freescale.com
Kojto 90:cb3d968589d8 44 ** mail: support@freescale.com
Kojto 90:cb3d968589d8 45 **
Kojto 90:cb3d968589d8 46 ** Revisions:
Kojto 90:cb3d968589d8 47 ** - rev. 1.0 (2013-08-12)
Kojto 90:cb3d968589d8 48 ** Initial version.
Kojto 90:cb3d968589d8 49 ** - rev. 2.0 (2013-10-29)
Kojto 90:cb3d968589d8 50 ** Register accessor macros added to the memory map.
Kojto 90:cb3d968589d8 51 ** Symbols for Processor Expert memory map compatibility added to the memory map.
Kojto 90:cb3d968589d8 52 ** Startup file for gcc has been updated according to CMSIS 3.2.
Kojto 90:cb3d968589d8 53 ** System initialization updated.
Kojto 90:cb3d968589d8 54 ** MCG - registers updated.
Kojto 90:cb3d968589d8 55 ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
Kojto 90:cb3d968589d8 56 ** - rev. 2.1 (2013-10-30)
Kojto 90:cb3d968589d8 57 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
Kojto 90:cb3d968589d8 58 ** - rev. 2.2 (2013-12-09)
Kojto 90:cb3d968589d8 59 ** DMA - EARS register removed.
Kojto 90:cb3d968589d8 60 ** AIPS0, AIPS1 - MPRA register updated.
Kojto 90:cb3d968589d8 61 ** - rev. 2.3 (2014-01-24)
Kojto 90:cb3d968589d8 62 ** Update according to reference manual rev. 2
Kojto 90:cb3d968589d8 63 ** ENET, MCG, MCM, SIM, USB - registers updated
Kojto 90:cb3d968589d8 64 ** - rev. 2.4 (2014-02-10)
Kojto 90:cb3d968589d8 65 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto 90:cb3d968589d8 66 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto 90:cb3d968589d8 67 ** - rev. 2.5 (2014-02-10)
Kojto 90:cb3d968589d8 68 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto 90:cb3d968589d8 69 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto 90:cb3d968589d8 70 ** Module access macro module_BASES replaced by module_BASE_PTRS.
Kojto 90:cb3d968589d8 71 **
Kojto 90:cb3d968589d8 72 ** ###################################################################
Kojto 90:cb3d968589d8 73 */
Kojto 90:cb3d968589d8 74
Kojto 90:cb3d968589d8 75 /*
Kojto 90:cb3d968589d8 76 * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
Kojto 90:cb3d968589d8 77 *
Kojto 90:cb3d968589d8 78 * This file was generated automatically and any changes may be lost.
Kojto 90:cb3d968589d8 79 */
Kojto 90:cb3d968589d8 80 #ifndef __HW_AIPS_REGISTERS_H__
Kojto 90:cb3d968589d8 81 #define __HW_AIPS_REGISTERS_H__
Kojto 90:cb3d968589d8 82
Kojto 90:cb3d968589d8 83 #include "MK64F12.h"
Kojto 90:cb3d968589d8 84 #include "fsl_bitaccess.h"
Kojto 90:cb3d968589d8 85
Kojto 90:cb3d968589d8 86 /*
Kojto 90:cb3d968589d8 87 * MK64F12 AIPS
Kojto 90:cb3d968589d8 88 *
Kojto 90:cb3d968589d8 89 * AIPS-Lite Bridge
Kojto 90:cb3d968589d8 90 *
Kojto 90:cb3d968589d8 91 * Registers defined in this header file:
Kojto 90:cb3d968589d8 92 * - HW_AIPS_MPRA - Master Privilege Register A
Kojto 90:cb3d968589d8 93 * - HW_AIPS_PACRA - Peripheral Access Control Register
Kojto 90:cb3d968589d8 94 * - HW_AIPS_PACRB - Peripheral Access Control Register
Kojto 90:cb3d968589d8 95 * - HW_AIPS_PACRC - Peripheral Access Control Register
Kojto 90:cb3d968589d8 96 * - HW_AIPS_PACRD - Peripheral Access Control Register
Kojto 90:cb3d968589d8 97 * - HW_AIPS_PACRE - Peripheral Access Control Register
Kojto 90:cb3d968589d8 98 * - HW_AIPS_PACRF - Peripheral Access Control Register
Kojto 90:cb3d968589d8 99 * - HW_AIPS_PACRG - Peripheral Access Control Register
Kojto 90:cb3d968589d8 100 * - HW_AIPS_PACRH - Peripheral Access Control Register
Kojto 90:cb3d968589d8 101 * - HW_AIPS_PACRI - Peripheral Access Control Register
Kojto 90:cb3d968589d8 102 * - HW_AIPS_PACRJ - Peripheral Access Control Register
Kojto 90:cb3d968589d8 103 * - HW_AIPS_PACRK - Peripheral Access Control Register
Kojto 90:cb3d968589d8 104 * - HW_AIPS_PACRL - Peripheral Access Control Register
Kojto 90:cb3d968589d8 105 * - HW_AIPS_PACRM - Peripheral Access Control Register
Kojto 90:cb3d968589d8 106 * - HW_AIPS_PACRN - Peripheral Access Control Register
Kojto 90:cb3d968589d8 107 * - HW_AIPS_PACRO - Peripheral Access Control Register
Kojto 90:cb3d968589d8 108 * - HW_AIPS_PACRP - Peripheral Access Control Register
Kojto 90:cb3d968589d8 109 * - HW_AIPS_PACRU - Peripheral Access Control Register
Kojto 90:cb3d968589d8 110 *
Kojto 90:cb3d968589d8 111 * - hw_aips_t - Struct containing all module registers.
Kojto 90:cb3d968589d8 112 */
Kojto 90:cb3d968589d8 113
Kojto 90:cb3d968589d8 114 #define HW_AIPS_INSTANCE_COUNT (2U) /*!< Number of instances of the AIPS module. */
Kojto 90:cb3d968589d8 115 #define HW_AIPS0 (0U) /*!< Instance number for AIPS0. */
Kojto 90:cb3d968589d8 116 #define HW_AIPS1 (1U) /*!< Instance number for AIPS1. */
Kojto 90:cb3d968589d8 117
Kojto 90:cb3d968589d8 118 /*******************************************************************************
Kojto 90:cb3d968589d8 119 * HW_AIPS_MPRA - Master Privilege Register A
Kojto 90:cb3d968589d8 120 ******************************************************************************/
Kojto 90:cb3d968589d8 121
Kojto 90:cb3d968589d8 122 /*!
Kojto 90:cb3d968589d8 123 * @brief HW_AIPS_MPRA - Master Privilege Register A (RW)
Kojto 90:cb3d968589d8 124 *
Kojto 90:cb3d968589d8 125 * Reset value: 0x77700000U
Kojto 90:cb3d968589d8 126 *
Kojto 90:cb3d968589d8 127 * The MPRA specifies identical 4-bit fields defining the access-privilege level
Kojto 90:cb3d968589d8 128 * associated with a bus master to various peripherals on the chip. The register
Kojto 90:cb3d968589d8 129 * provides one field per bus master. At reset, the default value loaded into
Kojto 90:cb3d968589d8 130 * the MPRA fields is chip-specific. See the chip configuration details for the
Kojto 90:cb3d968589d8 131 * value of a particular device. A register field that maps to an unimplemented
Kojto 90:cb3d968589d8 132 * master or peripheral behaves as read-only-zero. Each master is assigned a logical
Kojto 90:cb3d968589d8 133 * ID from 0 to 15. See the master logical ID assignment table in the
Kojto 90:cb3d968589d8 134 * chip-specific AIPS information.
Kojto 90:cb3d968589d8 135 */
Kojto 90:cb3d968589d8 136 typedef union _hw_aips_mpra
Kojto 90:cb3d968589d8 137 {
Kojto 90:cb3d968589d8 138 uint32_t U;
Kojto 90:cb3d968589d8 139 struct _hw_aips_mpra_bitfields
Kojto 90:cb3d968589d8 140 {
Kojto 90:cb3d968589d8 141 uint32_t RESERVED0 : 8; /*!< [7:0] */
Kojto 90:cb3d968589d8 142 uint32_t MPL5 : 1; /*!< [8] Master 5 Privilege Level */
Kojto 90:cb3d968589d8 143 uint32_t MTW5 : 1; /*!< [9] Master 5 Trusted For Writes */
Kojto 90:cb3d968589d8 144 uint32_t MTR5 : 1; /*!< [10] Master 5 Trusted For Read */
Kojto 90:cb3d968589d8 145 uint32_t RESERVED1 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 146 uint32_t MPL4 : 1; /*!< [12] Master 4 Privilege Level */
Kojto 90:cb3d968589d8 147 uint32_t MTW4 : 1; /*!< [13] Master 4 Trusted For Writes */
Kojto 90:cb3d968589d8 148 uint32_t MTR4 : 1; /*!< [14] Master 4 Trusted For Read */
Kojto 90:cb3d968589d8 149 uint32_t RESERVED2 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 150 uint32_t MPL3 : 1; /*!< [16] Master 3 Privilege Level */
Kojto 90:cb3d968589d8 151 uint32_t MTW3 : 1; /*!< [17] Master 3 Trusted For Writes */
Kojto 90:cb3d968589d8 152 uint32_t MTR3 : 1; /*!< [18] Master 3 Trusted For Read */
Kojto 90:cb3d968589d8 153 uint32_t RESERVED3 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 154 uint32_t MPL2 : 1; /*!< [20] Master 2 Privilege Level */
Kojto 90:cb3d968589d8 155 uint32_t MTW2 : 1; /*!< [21] Master 2 Trusted For Writes */
Kojto 90:cb3d968589d8 156 uint32_t MTR2 : 1; /*!< [22] Master 2 Trusted For Read */
Kojto 90:cb3d968589d8 157 uint32_t RESERVED4 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 158 uint32_t MPL1 : 1; /*!< [24] Master 1 Privilege Level */
Kojto 90:cb3d968589d8 159 uint32_t MTW1 : 1; /*!< [25] Master 1 Trusted for Writes */
Kojto 90:cb3d968589d8 160 uint32_t MTR1 : 1; /*!< [26] Master 1 Trusted for Read */
Kojto 90:cb3d968589d8 161 uint32_t RESERVED5 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 162 uint32_t MPL0 : 1; /*!< [28] Master 0 Privilege Level */
Kojto 90:cb3d968589d8 163 uint32_t MTW0 : 1; /*!< [29] Master 0 Trusted For Writes */
Kojto 90:cb3d968589d8 164 uint32_t MTR0 : 1; /*!< [30] Master 0 Trusted For Read */
Kojto 90:cb3d968589d8 165 uint32_t RESERVED6 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 166 } B;
Kojto 90:cb3d968589d8 167 } hw_aips_mpra_t;
Kojto 90:cb3d968589d8 168
Kojto 90:cb3d968589d8 169 /*!
Kojto 90:cb3d968589d8 170 * @name Constants and macros for entire AIPS_MPRA register
Kojto 90:cb3d968589d8 171 */
Kojto 90:cb3d968589d8 172 /*@{*/
Kojto 90:cb3d968589d8 173 #define HW_AIPS_MPRA_ADDR(x) ((x) + 0x0U)
Kojto 90:cb3d968589d8 174
Kojto 90:cb3d968589d8 175 #define HW_AIPS_MPRA(x) (*(__IO hw_aips_mpra_t *) HW_AIPS_MPRA_ADDR(x))
Kojto 90:cb3d968589d8 176 #define HW_AIPS_MPRA_RD(x) (HW_AIPS_MPRA(x).U)
Kojto 90:cb3d968589d8 177 #define HW_AIPS_MPRA_WR(x, v) (HW_AIPS_MPRA(x).U = (v))
Kojto 90:cb3d968589d8 178 #define HW_AIPS_MPRA_SET(x, v) (HW_AIPS_MPRA_WR(x, HW_AIPS_MPRA_RD(x) | (v)))
Kojto 90:cb3d968589d8 179 #define HW_AIPS_MPRA_CLR(x, v) (HW_AIPS_MPRA_WR(x, HW_AIPS_MPRA_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 180 #define HW_AIPS_MPRA_TOG(x, v) (HW_AIPS_MPRA_WR(x, HW_AIPS_MPRA_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 181 /*@}*/
Kojto 90:cb3d968589d8 182
Kojto 90:cb3d968589d8 183 /*
Kojto 90:cb3d968589d8 184 * Constants & macros for individual AIPS_MPRA bitfields
Kojto 90:cb3d968589d8 185 */
Kojto 90:cb3d968589d8 186
Kojto 90:cb3d968589d8 187 /*!
Kojto 90:cb3d968589d8 188 * @name Register AIPS_MPRA, field MPL5[8] (RW)
Kojto 90:cb3d968589d8 189 *
Kojto 90:cb3d968589d8 190 * Specifies how the privilege level of the master is determined.
Kojto 90:cb3d968589d8 191 *
Kojto 90:cb3d968589d8 192 * Values:
Kojto 90:cb3d968589d8 193 * - 0 - Accesses from this master are forced to user-mode.
Kojto 90:cb3d968589d8 194 * - 1 - Accesses from this master are not forced to user-mode.
Kojto 90:cb3d968589d8 195 */
Kojto 90:cb3d968589d8 196 /*@{*/
Kojto 90:cb3d968589d8 197 #define BP_AIPS_MPRA_MPL5 (8U) /*!< Bit position for AIPS_MPRA_MPL5. */
Kojto 90:cb3d968589d8 198 #define BM_AIPS_MPRA_MPL5 (0x00000100U) /*!< Bit mask for AIPS_MPRA_MPL5. */
Kojto 90:cb3d968589d8 199 #define BS_AIPS_MPRA_MPL5 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL5. */
Kojto 90:cb3d968589d8 200
Kojto 90:cb3d968589d8 201 /*! @brief Read current value of the AIPS_MPRA_MPL5 field. */
Kojto 90:cb3d968589d8 202 #define BR_AIPS_MPRA_MPL5(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL5))
Kojto 90:cb3d968589d8 203
Kojto 90:cb3d968589d8 204 /*! @brief Format value for bitfield AIPS_MPRA_MPL5. */
Kojto 90:cb3d968589d8 205 #define BF_AIPS_MPRA_MPL5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL5) & BM_AIPS_MPRA_MPL5)
Kojto 90:cb3d968589d8 206
Kojto 90:cb3d968589d8 207 /*! @brief Set the MPL5 field to a new value. */
Kojto 90:cb3d968589d8 208 #define BW_AIPS_MPRA_MPL5(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL5) = (v))
Kojto 90:cb3d968589d8 209 /*@}*/
Kojto 90:cb3d968589d8 210
Kojto 90:cb3d968589d8 211 /*!
Kojto 90:cb3d968589d8 212 * @name Register AIPS_MPRA, field MTW5[9] (RW)
Kojto 90:cb3d968589d8 213 *
Kojto 90:cb3d968589d8 214 * Determines whether the master is trusted for write accesses.
Kojto 90:cb3d968589d8 215 *
Kojto 90:cb3d968589d8 216 * Values:
Kojto 90:cb3d968589d8 217 * - 0 - This master is not trusted for write accesses.
Kojto 90:cb3d968589d8 218 * - 1 - This master is trusted for write accesses.
Kojto 90:cb3d968589d8 219 */
Kojto 90:cb3d968589d8 220 /*@{*/
Kojto 90:cb3d968589d8 221 #define BP_AIPS_MPRA_MTW5 (9U) /*!< Bit position for AIPS_MPRA_MTW5. */
Kojto 90:cb3d968589d8 222 #define BM_AIPS_MPRA_MTW5 (0x00000200U) /*!< Bit mask for AIPS_MPRA_MTW5. */
Kojto 90:cb3d968589d8 223 #define BS_AIPS_MPRA_MTW5 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW5. */
Kojto 90:cb3d968589d8 224
Kojto 90:cb3d968589d8 225 /*! @brief Read current value of the AIPS_MPRA_MTW5 field. */
Kojto 90:cb3d968589d8 226 #define BR_AIPS_MPRA_MTW5(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW5))
Kojto 90:cb3d968589d8 227
Kojto 90:cb3d968589d8 228 /*! @brief Format value for bitfield AIPS_MPRA_MTW5. */
Kojto 90:cb3d968589d8 229 #define BF_AIPS_MPRA_MTW5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW5) & BM_AIPS_MPRA_MTW5)
Kojto 90:cb3d968589d8 230
Kojto 90:cb3d968589d8 231 /*! @brief Set the MTW5 field to a new value. */
Kojto 90:cb3d968589d8 232 #define BW_AIPS_MPRA_MTW5(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW5) = (v))
Kojto 90:cb3d968589d8 233 /*@}*/
Kojto 90:cb3d968589d8 234
Kojto 90:cb3d968589d8 235 /*!
Kojto 90:cb3d968589d8 236 * @name Register AIPS_MPRA, field MTR5[10] (RW)
Kojto 90:cb3d968589d8 237 *
Kojto 90:cb3d968589d8 238 * Determines whether the master is trusted for read accesses.
Kojto 90:cb3d968589d8 239 *
Kojto 90:cb3d968589d8 240 * Values:
Kojto 90:cb3d968589d8 241 * - 0 - This master is not trusted for read accesses.
Kojto 90:cb3d968589d8 242 * - 1 - This master is trusted for read accesses.
Kojto 90:cb3d968589d8 243 */
Kojto 90:cb3d968589d8 244 /*@{*/
Kojto 90:cb3d968589d8 245 #define BP_AIPS_MPRA_MTR5 (10U) /*!< Bit position for AIPS_MPRA_MTR5. */
Kojto 90:cb3d968589d8 246 #define BM_AIPS_MPRA_MTR5 (0x00000400U) /*!< Bit mask for AIPS_MPRA_MTR5. */
Kojto 90:cb3d968589d8 247 #define BS_AIPS_MPRA_MTR5 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR5. */
Kojto 90:cb3d968589d8 248
Kojto 90:cb3d968589d8 249 /*! @brief Read current value of the AIPS_MPRA_MTR5 field. */
Kojto 90:cb3d968589d8 250 #define BR_AIPS_MPRA_MTR5(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR5))
Kojto 90:cb3d968589d8 251
Kojto 90:cb3d968589d8 252 /*! @brief Format value for bitfield AIPS_MPRA_MTR5. */
Kojto 90:cb3d968589d8 253 #define BF_AIPS_MPRA_MTR5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR5) & BM_AIPS_MPRA_MTR5)
Kojto 90:cb3d968589d8 254
Kojto 90:cb3d968589d8 255 /*! @brief Set the MTR5 field to a new value. */
Kojto 90:cb3d968589d8 256 #define BW_AIPS_MPRA_MTR5(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR5) = (v))
Kojto 90:cb3d968589d8 257 /*@}*/
Kojto 90:cb3d968589d8 258
Kojto 90:cb3d968589d8 259 /*!
Kojto 90:cb3d968589d8 260 * @name Register AIPS_MPRA, field MPL4[12] (RW)
Kojto 90:cb3d968589d8 261 *
Kojto 90:cb3d968589d8 262 * Specifies how the privilege level of the master is determined.
Kojto 90:cb3d968589d8 263 *
Kojto 90:cb3d968589d8 264 * Values:
Kojto 90:cb3d968589d8 265 * - 0 - Accesses from this master are forced to user-mode.
Kojto 90:cb3d968589d8 266 * - 1 - Accesses from this master are not forced to user-mode.
Kojto 90:cb3d968589d8 267 */
Kojto 90:cb3d968589d8 268 /*@{*/
Kojto 90:cb3d968589d8 269 #define BP_AIPS_MPRA_MPL4 (12U) /*!< Bit position for AIPS_MPRA_MPL4. */
Kojto 90:cb3d968589d8 270 #define BM_AIPS_MPRA_MPL4 (0x00001000U) /*!< Bit mask for AIPS_MPRA_MPL4. */
Kojto 90:cb3d968589d8 271 #define BS_AIPS_MPRA_MPL4 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL4. */
Kojto 90:cb3d968589d8 272
Kojto 90:cb3d968589d8 273 /*! @brief Read current value of the AIPS_MPRA_MPL4 field. */
Kojto 90:cb3d968589d8 274 #define BR_AIPS_MPRA_MPL4(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL4))
Kojto 90:cb3d968589d8 275
Kojto 90:cb3d968589d8 276 /*! @brief Format value for bitfield AIPS_MPRA_MPL4. */
Kojto 90:cb3d968589d8 277 #define BF_AIPS_MPRA_MPL4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL4) & BM_AIPS_MPRA_MPL4)
Kojto 90:cb3d968589d8 278
Kojto 90:cb3d968589d8 279 /*! @brief Set the MPL4 field to a new value. */
Kojto 90:cb3d968589d8 280 #define BW_AIPS_MPRA_MPL4(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL4) = (v))
Kojto 90:cb3d968589d8 281 /*@}*/
Kojto 90:cb3d968589d8 282
Kojto 90:cb3d968589d8 283 /*!
Kojto 90:cb3d968589d8 284 * @name Register AIPS_MPRA, field MTW4[13] (RW)
Kojto 90:cb3d968589d8 285 *
Kojto 90:cb3d968589d8 286 * Determines whether the master is trusted for write accesses.
Kojto 90:cb3d968589d8 287 *
Kojto 90:cb3d968589d8 288 * Values:
Kojto 90:cb3d968589d8 289 * - 0 - This master is not trusted for write accesses.
Kojto 90:cb3d968589d8 290 * - 1 - This master is trusted for write accesses.
Kojto 90:cb3d968589d8 291 */
Kojto 90:cb3d968589d8 292 /*@{*/
Kojto 90:cb3d968589d8 293 #define BP_AIPS_MPRA_MTW4 (13U) /*!< Bit position for AIPS_MPRA_MTW4. */
Kojto 90:cb3d968589d8 294 #define BM_AIPS_MPRA_MTW4 (0x00002000U) /*!< Bit mask for AIPS_MPRA_MTW4. */
Kojto 90:cb3d968589d8 295 #define BS_AIPS_MPRA_MTW4 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW4. */
Kojto 90:cb3d968589d8 296
Kojto 90:cb3d968589d8 297 /*! @brief Read current value of the AIPS_MPRA_MTW4 field. */
Kojto 90:cb3d968589d8 298 #define BR_AIPS_MPRA_MTW4(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW4))
Kojto 90:cb3d968589d8 299
Kojto 90:cb3d968589d8 300 /*! @brief Format value for bitfield AIPS_MPRA_MTW4. */
Kojto 90:cb3d968589d8 301 #define BF_AIPS_MPRA_MTW4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW4) & BM_AIPS_MPRA_MTW4)
Kojto 90:cb3d968589d8 302
Kojto 90:cb3d968589d8 303 /*! @brief Set the MTW4 field to a new value. */
Kojto 90:cb3d968589d8 304 #define BW_AIPS_MPRA_MTW4(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW4) = (v))
Kojto 90:cb3d968589d8 305 /*@}*/
Kojto 90:cb3d968589d8 306
Kojto 90:cb3d968589d8 307 /*!
Kojto 90:cb3d968589d8 308 * @name Register AIPS_MPRA, field MTR4[14] (RW)
Kojto 90:cb3d968589d8 309 *
Kojto 90:cb3d968589d8 310 * Determines whether the master is trusted for read accesses.
Kojto 90:cb3d968589d8 311 *
Kojto 90:cb3d968589d8 312 * Values:
Kojto 90:cb3d968589d8 313 * - 0 - This master is not trusted for read accesses.
Kojto 90:cb3d968589d8 314 * - 1 - This master is trusted for read accesses.
Kojto 90:cb3d968589d8 315 */
Kojto 90:cb3d968589d8 316 /*@{*/
Kojto 90:cb3d968589d8 317 #define BP_AIPS_MPRA_MTR4 (14U) /*!< Bit position for AIPS_MPRA_MTR4. */
Kojto 90:cb3d968589d8 318 #define BM_AIPS_MPRA_MTR4 (0x00004000U) /*!< Bit mask for AIPS_MPRA_MTR4. */
Kojto 90:cb3d968589d8 319 #define BS_AIPS_MPRA_MTR4 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR4. */
Kojto 90:cb3d968589d8 320
Kojto 90:cb3d968589d8 321 /*! @brief Read current value of the AIPS_MPRA_MTR4 field. */
Kojto 90:cb3d968589d8 322 #define BR_AIPS_MPRA_MTR4(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR4))
Kojto 90:cb3d968589d8 323
Kojto 90:cb3d968589d8 324 /*! @brief Format value for bitfield AIPS_MPRA_MTR4. */
Kojto 90:cb3d968589d8 325 #define BF_AIPS_MPRA_MTR4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR4) & BM_AIPS_MPRA_MTR4)
Kojto 90:cb3d968589d8 326
Kojto 90:cb3d968589d8 327 /*! @brief Set the MTR4 field to a new value. */
Kojto 90:cb3d968589d8 328 #define BW_AIPS_MPRA_MTR4(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR4) = (v))
Kojto 90:cb3d968589d8 329 /*@}*/
Kojto 90:cb3d968589d8 330
Kojto 90:cb3d968589d8 331 /*!
Kojto 90:cb3d968589d8 332 * @name Register AIPS_MPRA, field MPL3[16] (RW)
Kojto 90:cb3d968589d8 333 *
Kojto 90:cb3d968589d8 334 * Specifies how the privilege level of the master is determined.
Kojto 90:cb3d968589d8 335 *
Kojto 90:cb3d968589d8 336 * Values:
Kojto 90:cb3d968589d8 337 * - 0 - Accesses from this master are forced to user-mode.
Kojto 90:cb3d968589d8 338 * - 1 - Accesses from this master are not forced to user-mode.
Kojto 90:cb3d968589d8 339 */
Kojto 90:cb3d968589d8 340 /*@{*/
Kojto 90:cb3d968589d8 341 #define BP_AIPS_MPRA_MPL3 (16U) /*!< Bit position for AIPS_MPRA_MPL3. */
Kojto 90:cb3d968589d8 342 #define BM_AIPS_MPRA_MPL3 (0x00010000U) /*!< Bit mask for AIPS_MPRA_MPL3. */
Kojto 90:cb3d968589d8 343 #define BS_AIPS_MPRA_MPL3 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL3. */
Kojto 90:cb3d968589d8 344
Kojto 90:cb3d968589d8 345 /*! @brief Read current value of the AIPS_MPRA_MPL3 field. */
Kojto 90:cb3d968589d8 346 #define BR_AIPS_MPRA_MPL3(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL3))
Kojto 90:cb3d968589d8 347
Kojto 90:cb3d968589d8 348 /*! @brief Format value for bitfield AIPS_MPRA_MPL3. */
Kojto 90:cb3d968589d8 349 #define BF_AIPS_MPRA_MPL3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL3) & BM_AIPS_MPRA_MPL3)
Kojto 90:cb3d968589d8 350
Kojto 90:cb3d968589d8 351 /*! @brief Set the MPL3 field to a new value. */
Kojto 90:cb3d968589d8 352 #define BW_AIPS_MPRA_MPL3(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL3) = (v))
Kojto 90:cb3d968589d8 353 /*@}*/
Kojto 90:cb3d968589d8 354
Kojto 90:cb3d968589d8 355 /*!
Kojto 90:cb3d968589d8 356 * @name Register AIPS_MPRA, field MTW3[17] (RW)
Kojto 90:cb3d968589d8 357 *
Kojto 90:cb3d968589d8 358 * Determines whether the master is trusted for write accesses.
Kojto 90:cb3d968589d8 359 *
Kojto 90:cb3d968589d8 360 * Values:
Kojto 90:cb3d968589d8 361 * - 0 - This master is not trusted for write accesses.
Kojto 90:cb3d968589d8 362 * - 1 - This master is trusted for write accesses.
Kojto 90:cb3d968589d8 363 */
Kojto 90:cb3d968589d8 364 /*@{*/
Kojto 90:cb3d968589d8 365 #define BP_AIPS_MPRA_MTW3 (17U) /*!< Bit position for AIPS_MPRA_MTW3. */
Kojto 90:cb3d968589d8 366 #define BM_AIPS_MPRA_MTW3 (0x00020000U) /*!< Bit mask for AIPS_MPRA_MTW3. */
Kojto 90:cb3d968589d8 367 #define BS_AIPS_MPRA_MTW3 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW3. */
Kojto 90:cb3d968589d8 368
Kojto 90:cb3d968589d8 369 /*! @brief Read current value of the AIPS_MPRA_MTW3 field. */
Kojto 90:cb3d968589d8 370 #define BR_AIPS_MPRA_MTW3(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW3))
Kojto 90:cb3d968589d8 371
Kojto 90:cb3d968589d8 372 /*! @brief Format value for bitfield AIPS_MPRA_MTW3. */
Kojto 90:cb3d968589d8 373 #define BF_AIPS_MPRA_MTW3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW3) & BM_AIPS_MPRA_MTW3)
Kojto 90:cb3d968589d8 374
Kojto 90:cb3d968589d8 375 /*! @brief Set the MTW3 field to a new value. */
Kojto 90:cb3d968589d8 376 #define BW_AIPS_MPRA_MTW3(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW3) = (v))
Kojto 90:cb3d968589d8 377 /*@}*/
Kojto 90:cb3d968589d8 378
Kojto 90:cb3d968589d8 379 /*!
Kojto 90:cb3d968589d8 380 * @name Register AIPS_MPRA, field MTR3[18] (RW)
Kojto 90:cb3d968589d8 381 *
Kojto 90:cb3d968589d8 382 * Determines whether the master is trusted for read accesses.
Kojto 90:cb3d968589d8 383 *
Kojto 90:cb3d968589d8 384 * Values:
Kojto 90:cb3d968589d8 385 * - 0 - This master is not trusted for read accesses.
Kojto 90:cb3d968589d8 386 * - 1 - This master is trusted for read accesses.
Kojto 90:cb3d968589d8 387 */
Kojto 90:cb3d968589d8 388 /*@{*/
Kojto 90:cb3d968589d8 389 #define BP_AIPS_MPRA_MTR3 (18U) /*!< Bit position for AIPS_MPRA_MTR3. */
Kojto 90:cb3d968589d8 390 #define BM_AIPS_MPRA_MTR3 (0x00040000U) /*!< Bit mask for AIPS_MPRA_MTR3. */
Kojto 90:cb3d968589d8 391 #define BS_AIPS_MPRA_MTR3 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR3. */
Kojto 90:cb3d968589d8 392
Kojto 90:cb3d968589d8 393 /*! @brief Read current value of the AIPS_MPRA_MTR3 field. */
Kojto 90:cb3d968589d8 394 #define BR_AIPS_MPRA_MTR3(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR3))
Kojto 90:cb3d968589d8 395
Kojto 90:cb3d968589d8 396 /*! @brief Format value for bitfield AIPS_MPRA_MTR3. */
Kojto 90:cb3d968589d8 397 #define BF_AIPS_MPRA_MTR3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR3) & BM_AIPS_MPRA_MTR3)
Kojto 90:cb3d968589d8 398
Kojto 90:cb3d968589d8 399 /*! @brief Set the MTR3 field to a new value. */
Kojto 90:cb3d968589d8 400 #define BW_AIPS_MPRA_MTR3(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR3) = (v))
Kojto 90:cb3d968589d8 401 /*@}*/
Kojto 90:cb3d968589d8 402
Kojto 90:cb3d968589d8 403 /*!
Kojto 90:cb3d968589d8 404 * @name Register AIPS_MPRA, field MPL2[20] (RW)
Kojto 90:cb3d968589d8 405 *
Kojto 90:cb3d968589d8 406 * Specifies how the privilege level of the master is determined.
Kojto 90:cb3d968589d8 407 *
Kojto 90:cb3d968589d8 408 * Values:
Kojto 90:cb3d968589d8 409 * - 0 - Accesses from this master are forced to user-mode.
Kojto 90:cb3d968589d8 410 * - 1 - Accesses from this master are not forced to user-mode.
Kojto 90:cb3d968589d8 411 */
Kojto 90:cb3d968589d8 412 /*@{*/
Kojto 90:cb3d968589d8 413 #define BP_AIPS_MPRA_MPL2 (20U) /*!< Bit position for AIPS_MPRA_MPL2. */
Kojto 90:cb3d968589d8 414 #define BM_AIPS_MPRA_MPL2 (0x00100000U) /*!< Bit mask for AIPS_MPRA_MPL2. */
Kojto 90:cb3d968589d8 415 #define BS_AIPS_MPRA_MPL2 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL2. */
Kojto 90:cb3d968589d8 416
Kojto 90:cb3d968589d8 417 /*! @brief Read current value of the AIPS_MPRA_MPL2 field. */
Kojto 90:cb3d968589d8 418 #define BR_AIPS_MPRA_MPL2(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL2))
Kojto 90:cb3d968589d8 419
Kojto 90:cb3d968589d8 420 /*! @brief Format value for bitfield AIPS_MPRA_MPL2. */
Kojto 90:cb3d968589d8 421 #define BF_AIPS_MPRA_MPL2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL2) & BM_AIPS_MPRA_MPL2)
Kojto 90:cb3d968589d8 422
Kojto 90:cb3d968589d8 423 /*! @brief Set the MPL2 field to a new value. */
Kojto 90:cb3d968589d8 424 #define BW_AIPS_MPRA_MPL2(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL2) = (v))
Kojto 90:cb3d968589d8 425 /*@}*/
Kojto 90:cb3d968589d8 426
Kojto 90:cb3d968589d8 427 /*!
Kojto 90:cb3d968589d8 428 * @name Register AIPS_MPRA, field MTW2[21] (RW)
Kojto 90:cb3d968589d8 429 *
Kojto 90:cb3d968589d8 430 * Determines whether the master is trusted for write accesses.
Kojto 90:cb3d968589d8 431 *
Kojto 90:cb3d968589d8 432 * Values:
Kojto 90:cb3d968589d8 433 * - 0 - This master is not trusted for write accesses.
Kojto 90:cb3d968589d8 434 * - 1 - This master is trusted for write accesses.
Kojto 90:cb3d968589d8 435 */
Kojto 90:cb3d968589d8 436 /*@{*/
Kojto 90:cb3d968589d8 437 #define BP_AIPS_MPRA_MTW2 (21U) /*!< Bit position for AIPS_MPRA_MTW2. */
Kojto 90:cb3d968589d8 438 #define BM_AIPS_MPRA_MTW2 (0x00200000U) /*!< Bit mask for AIPS_MPRA_MTW2. */
Kojto 90:cb3d968589d8 439 #define BS_AIPS_MPRA_MTW2 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW2. */
Kojto 90:cb3d968589d8 440
Kojto 90:cb3d968589d8 441 /*! @brief Read current value of the AIPS_MPRA_MTW2 field. */
Kojto 90:cb3d968589d8 442 #define BR_AIPS_MPRA_MTW2(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW2))
Kojto 90:cb3d968589d8 443
Kojto 90:cb3d968589d8 444 /*! @brief Format value for bitfield AIPS_MPRA_MTW2. */
Kojto 90:cb3d968589d8 445 #define BF_AIPS_MPRA_MTW2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW2) & BM_AIPS_MPRA_MTW2)
Kojto 90:cb3d968589d8 446
Kojto 90:cb3d968589d8 447 /*! @brief Set the MTW2 field to a new value. */
Kojto 90:cb3d968589d8 448 #define BW_AIPS_MPRA_MTW2(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW2) = (v))
Kojto 90:cb3d968589d8 449 /*@}*/
Kojto 90:cb3d968589d8 450
Kojto 90:cb3d968589d8 451 /*!
Kojto 90:cb3d968589d8 452 * @name Register AIPS_MPRA, field MTR2[22] (RW)
Kojto 90:cb3d968589d8 453 *
Kojto 90:cb3d968589d8 454 * Determines whether the master is trusted for read accesses.
Kojto 90:cb3d968589d8 455 *
Kojto 90:cb3d968589d8 456 * Values:
Kojto 90:cb3d968589d8 457 * - 0 - This master is not trusted for read accesses.
Kojto 90:cb3d968589d8 458 * - 1 - This master is trusted for read accesses.
Kojto 90:cb3d968589d8 459 */
Kojto 90:cb3d968589d8 460 /*@{*/
Kojto 90:cb3d968589d8 461 #define BP_AIPS_MPRA_MTR2 (22U) /*!< Bit position for AIPS_MPRA_MTR2. */
Kojto 90:cb3d968589d8 462 #define BM_AIPS_MPRA_MTR2 (0x00400000U) /*!< Bit mask for AIPS_MPRA_MTR2. */
Kojto 90:cb3d968589d8 463 #define BS_AIPS_MPRA_MTR2 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR2. */
Kojto 90:cb3d968589d8 464
Kojto 90:cb3d968589d8 465 /*! @brief Read current value of the AIPS_MPRA_MTR2 field. */
Kojto 90:cb3d968589d8 466 #define BR_AIPS_MPRA_MTR2(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR2))
Kojto 90:cb3d968589d8 467
Kojto 90:cb3d968589d8 468 /*! @brief Format value for bitfield AIPS_MPRA_MTR2. */
Kojto 90:cb3d968589d8 469 #define BF_AIPS_MPRA_MTR2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR2) & BM_AIPS_MPRA_MTR2)
Kojto 90:cb3d968589d8 470
Kojto 90:cb3d968589d8 471 /*! @brief Set the MTR2 field to a new value. */
Kojto 90:cb3d968589d8 472 #define BW_AIPS_MPRA_MTR2(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR2) = (v))
Kojto 90:cb3d968589d8 473 /*@}*/
Kojto 90:cb3d968589d8 474
Kojto 90:cb3d968589d8 475 /*!
Kojto 90:cb3d968589d8 476 * @name Register AIPS_MPRA, field MPL1[24] (RW)
Kojto 90:cb3d968589d8 477 *
Kojto 90:cb3d968589d8 478 * Specifies how the privilege level of the master is determined.
Kojto 90:cb3d968589d8 479 *
Kojto 90:cb3d968589d8 480 * Values:
Kojto 90:cb3d968589d8 481 * - 0 - Accesses from this master are forced to user-mode.
Kojto 90:cb3d968589d8 482 * - 1 - Accesses from this master are not forced to user-mode.
Kojto 90:cb3d968589d8 483 */
Kojto 90:cb3d968589d8 484 /*@{*/
Kojto 90:cb3d968589d8 485 #define BP_AIPS_MPRA_MPL1 (24U) /*!< Bit position for AIPS_MPRA_MPL1. */
Kojto 90:cb3d968589d8 486 #define BM_AIPS_MPRA_MPL1 (0x01000000U) /*!< Bit mask for AIPS_MPRA_MPL1. */
Kojto 90:cb3d968589d8 487 #define BS_AIPS_MPRA_MPL1 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL1. */
Kojto 90:cb3d968589d8 488
Kojto 90:cb3d968589d8 489 /*! @brief Read current value of the AIPS_MPRA_MPL1 field. */
Kojto 90:cb3d968589d8 490 #define BR_AIPS_MPRA_MPL1(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL1))
Kojto 90:cb3d968589d8 491
Kojto 90:cb3d968589d8 492 /*! @brief Format value for bitfield AIPS_MPRA_MPL1. */
Kojto 90:cb3d968589d8 493 #define BF_AIPS_MPRA_MPL1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL1) & BM_AIPS_MPRA_MPL1)
Kojto 90:cb3d968589d8 494
Kojto 90:cb3d968589d8 495 /*! @brief Set the MPL1 field to a new value. */
Kojto 90:cb3d968589d8 496 #define BW_AIPS_MPRA_MPL1(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL1) = (v))
Kojto 90:cb3d968589d8 497 /*@}*/
Kojto 90:cb3d968589d8 498
Kojto 90:cb3d968589d8 499 /*!
Kojto 90:cb3d968589d8 500 * @name Register AIPS_MPRA, field MTW1[25] (RW)
Kojto 90:cb3d968589d8 501 *
Kojto 90:cb3d968589d8 502 * Determines whether the master is trusted for write accesses.
Kojto 90:cb3d968589d8 503 *
Kojto 90:cb3d968589d8 504 * Values:
Kojto 90:cb3d968589d8 505 * - 0 - This master is not trusted for write accesses.
Kojto 90:cb3d968589d8 506 * - 1 - This master is trusted for write accesses.
Kojto 90:cb3d968589d8 507 */
Kojto 90:cb3d968589d8 508 /*@{*/
Kojto 90:cb3d968589d8 509 #define BP_AIPS_MPRA_MTW1 (25U) /*!< Bit position for AIPS_MPRA_MTW1. */
Kojto 90:cb3d968589d8 510 #define BM_AIPS_MPRA_MTW1 (0x02000000U) /*!< Bit mask for AIPS_MPRA_MTW1. */
Kojto 90:cb3d968589d8 511 #define BS_AIPS_MPRA_MTW1 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW1. */
Kojto 90:cb3d968589d8 512
Kojto 90:cb3d968589d8 513 /*! @brief Read current value of the AIPS_MPRA_MTW1 field. */
Kojto 90:cb3d968589d8 514 #define BR_AIPS_MPRA_MTW1(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW1))
Kojto 90:cb3d968589d8 515
Kojto 90:cb3d968589d8 516 /*! @brief Format value for bitfield AIPS_MPRA_MTW1. */
Kojto 90:cb3d968589d8 517 #define BF_AIPS_MPRA_MTW1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW1) & BM_AIPS_MPRA_MTW1)
Kojto 90:cb3d968589d8 518
Kojto 90:cb3d968589d8 519 /*! @brief Set the MTW1 field to a new value. */
Kojto 90:cb3d968589d8 520 #define BW_AIPS_MPRA_MTW1(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW1) = (v))
Kojto 90:cb3d968589d8 521 /*@}*/
Kojto 90:cb3d968589d8 522
Kojto 90:cb3d968589d8 523 /*!
Kojto 90:cb3d968589d8 524 * @name Register AIPS_MPRA, field MTR1[26] (RW)
Kojto 90:cb3d968589d8 525 *
Kojto 90:cb3d968589d8 526 * Determines whether the master is trusted for read accesses.
Kojto 90:cb3d968589d8 527 *
Kojto 90:cb3d968589d8 528 * Values:
Kojto 90:cb3d968589d8 529 * - 0 - This master is not trusted for read accesses.
Kojto 90:cb3d968589d8 530 * - 1 - This master is trusted for read accesses.
Kojto 90:cb3d968589d8 531 */
Kojto 90:cb3d968589d8 532 /*@{*/
Kojto 90:cb3d968589d8 533 #define BP_AIPS_MPRA_MTR1 (26U) /*!< Bit position for AIPS_MPRA_MTR1. */
Kojto 90:cb3d968589d8 534 #define BM_AIPS_MPRA_MTR1 (0x04000000U) /*!< Bit mask for AIPS_MPRA_MTR1. */
Kojto 90:cb3d968589d8 535 #define BS_AIPS_MPRA_MTR1 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR1. */
Kojto 90:cb3d968589d8 536
Kojto 90:cb3d968589d8 537 /*! @brief Read current value of the AIPS_MPRA_MTR1 field. */
Kojto 90:cb3d968589d8 538 #define BR_AIPS_MPRA_MTR1(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR1))
Kojto 90:cb3d968589d8 539
Kojto 90:cb3d968589d8 540 /*! @brief Format value for bitfield AIPS_MPRA_MTR1. */
Kojto 90:cb3d968589d8 541 #define BF_AIPS_MPRA_MTR1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR1) & BM_AIPS_MPRA_MTR1)
Kojto 90:cb3d968589d8 542
Kojto 90:cb3d968589d8 543 /*! @brief Set the MTR1 field to a new value. */
Kojto 90:cb3d968589d8 544 #define BW_AIPS_MPRA_MTR1(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR1) = (v))
Kojto 90:cb3d968589d8 545 /*@}*/
Kojto 90:cb3d968589d8 546
Kojto 90:cb3d968589d8 547 /*!
Kojto 90:cb3d968589d8 548 * @name Register AIPS_MPRA, field MPL0[28] (RW)
Kojto 90:cb3d968589d8 549 *
Kojto 90:cb3d968589d8 550 * Specifies how the privilege level of the master is determined.
Kojto 90:cb3d968589d8 551 *
Kojto 90:cb3d968589d8 552 * Values:
Kojto 90:cb3d968589d8 553 * - 0 - Accesses from this master are forced to user-mode.
Kojto 90:cb3d968589d8 554 * - 1 - Accesses from this master are not forced to user-mode.
Kojto 90:cb3d968589d8 555 */
Kojto 90:cb3d968589d8 556 /*@{*/
Kojto 90:cb3d968589d8 557 #define BP_AIPS_MPRA_MPL0 (28U) /*!< Bit position for AIPS_MPRA_MPL0. */
Kojto 90:cb3d968589d8 558 #define BM_AIPS_MPRA_MPL0 (0x10000000U) /*!< Bit mask for AIPS_MPRA_MPL0. */
Kojto 90:cb3d968589d8 559 #define BS_AIPS_MPRA_MPL0 (1U) /*!< Bit field size in bits for AIPS_MPRA_MPL0. */
Kojto 90:cb3d968589d8 560
Kojto 90:cb3d968589d8 561 /*! @brief Read current value of the AIPS_MPRA_MPL0 field. */
Kojto 90:cb3d968589d8 562 #define BR_AIPS_MPRA_MPL0(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL0))
Kojto 90:cb3d968589d8 563
Kojto 90:cb3d968589d8 564 /*! @brief Format value for bitfield AIPS_MPRA_MPL0. */
Kojto 90:cb3d968589d8 565 #define BF_AIPS_MPRA_MPL0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MPL0) & BM_AIPS_MPRA_MPL0)
Kojto 90:cb3d968589d8 566
Kojto 90:cb3d968589d8 567 /*! @brief Set the MPL0 field to a new value. */
Kojto 90:cb3d968589d8 568 #define BW_AIPS_MPRA_MPL0(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL0) = (v))
Kojto 90:cb3d968589d8 569 /*@}*/
Kojto 90:cb3d968589d8 570
Kojto 90:cb3d968589d8 571 /*!
Kojto 90:cb3d968589d8 572 * @name Register AIPS_MPRA, field MTW0[29] (RW)
Kojto 90:cb3d968589d8 573 *
Kojto 90:cb3d968589d8 574 * Determines whether the master is trusted for write accesses.
Kojto 90:cb3d968589d8 575 *
Kojto 90:cb3d968589d8 576 * Values:
Kojto 90:cb3d968589d8 577 * - 0 - This master is not trusted for write accesses.
Kojto 90:cb3d968589d8 578 * - 1 - This master is trusted for write accesses.
Kojto 90:cb3d968589d8 579 */
Kojto 90:cb3d968589d8 580 /*@{*/
Kojto 90:cb3d968589d8 581 #define BP_AIPS_MPRA_MTW0 (29U) /*!< Bit position for AIPS_MPRA_MTW0. */
Kojto 90:cb3d968589d8 582 #define BM_AIPS_MPRA_MTW0 (0x20000000U) /*!< Bit mask for AIPS_MPRA_MTW0. */
Kojto 90:cb3d968589d8 583 #define BS_AIPS_MPRA_MTW0 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTW0. */
Kojto 90:cb3d968589d8 584
Kojto 90:cb3d968589d8 585 /*! @brief Read current value of the AIPS_MPRA_MTW0 field. */
Kojto 90:cb3d968589d8 586 #define BR_AIPS_MPRA_MTW0(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW0))
Kojto 90:cb3d968589d8 587
Kojto 90:cb3d968589d8 588 /*! @brief Format value for bitfield AIPS_MPRA_MTW0. */
Kojto 90:cb3d968589d8 589 #define BF_AIPS_MPRA_MTW0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTW0) & BM_AIPS_MPRA_MTW0)
Kojto 90:cb3d968589d8 590
Kojto 90:cb3d968589d8 591 /*! @brief Set the MTW0 field to a new value. */
Kojto 90:cb3d968589d8 592 #define BW_AIPS_MPRA_MTW0(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW0) = (v))
Kojto 90:cb3d968589d8 593 /*@}*/
Kojto 90:cb3d968589d8 594
Kojto 90:cb3d968589d8 595 /*!
Kojto 90:cb3d968589d8 596 * @name Register AIPS_MPRA, field MTR0[30] (RW)
Kojto 90:cb3d968589d8 597 *
Kojto 90:cb3d968589d8 598 * Determines whether the master is trusted for read accesses.
Kojto 90:cb3d968589d8 599 *
Kojto 90:cb3d968589d8 600 * Values:
Kojto 90:cb3d968589d8 601 * - 0 - This master is not trusted for read accesses.
Kojto 90:cb3d968589d8 602 * - 1 - This master is trusted for read accesses.
Kojto 90:cb3d968589d8 603 */
Kojto 90:cb3d968589d8 604 /*@{*/
Kojto 90:cb3d968589d8 605 #define BP_AIPS_MPRA_MTR0 (30U) /*!< Bit position for AIPS_MPRA_MTR0. */
Kojto 90:cb3d968589d8 606 #define BM_AIPS_MPRA_MTR0 (0x40000000U) /*!< Bit mask for AIPS_MPRA_MTR0. */
Kojto 90:cb3d968589d8 607 #define BS_AIPS_MPRA_MTR0 (1U) /*!< Bit field size in bits for AIPS_MPRA_MTR0. */
Kojto 90:cb3d968589d8 608
Kojto 90:cb3d968589d8 609 /*! @brief Read current value of the AIPS_MPRA_MTR0 field. */
Kojto 90:cb3d968589d8 610 #define BR_AIPS_MPRA_MTR0(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR0))
Kojto 90:cb3d968589d8 611
Kojto 90:cb3d968589d8 612 /*! @brief Format value for bitfield AIPS_MPRA_MTR0. */
Kojto 90:cb3d968589d8 613 #define BF_AIPS_MPRA_MTR0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_MPRA_MTR0) & BM_AIPS_MPRA_MTR0)
Kojto 90:cb3d968589d8 614
Kojto 90:cb3d968589d8 615 /*! @brief Set the MTR0 field to a new value. */
Kojto 90:cb3d968589d8 616 #define BW_AIPS_MPRA_MTR0(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR0) = (v))
Kojto 90:cb3d968589d8 617 /*@}*/
Kojto 90:cb3d968589d8 618
Kojto 90:cb3d968589d8 619 /*******************************************************************************
Kojto 90:cb3d968589d8 620 * HW_AIPS_PACRA - Peripheral Access Control Register
Kojto 90:cb3d968589d8 621 ******************************************************************************/
Kojto 90:cb3d968589d8 622
Kojto 90:cb3d968589d8 623 /*!
Kojto 90:cb3d968589d8 624 * @brief HW_AIPS_PACRA - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 625 *
Kojto 90:cb3d968589d8 626 * Reset value: 0x50004000U
Kojto 90:cb3d968589d8 627 *
Kojto 90:cb3d968589d8 628 * Each PACR register consists of eight 4-bit PACR fields. Each PACR field
Kojto 90:cb3d968589d8 629 * defines the access levels for a particular peripheral. The mapping between a
Kojto 90:cb3d968589d8 630 * peripheral and its PACR field is shown in the table below. The peripheral assignment
Kojto 90:cb3d968589d8 631 * to each PACR is defined by the memory map slot that the peripheral is
Kojto 90:cb3d968589d8 632 * assigned to. See this chip's memory map for the assignment of a particular
Kojto 90:cb3d968589d8 633 * peripheral. The following table shows the location of each peripheral slot's PACR field
Kojto 90:cb3d968589d8 634 * in the PACR registers. Offset Register [31:28] [27:24] [23:20] [19:16] [15:12]
Kojto 90:cb3d968589d8 635 * [11:8] [7:4] [3:0] 0x20 PACRA PACR0 PACR1 PACR2 PACR3 PACR4 PACR5 PACR6 PACR7
Kojto 90:cb3d968589d8 636 * 0x24 PACRB PACR8 PACR9 PACR10 PACR11 PACR12 PACR13 PACR14 PACR15 0x28 PACRC
Kojto 90:cb3d968589d8 637 * PACR16 PACR17 PACR18 PACR19 PACR20 PACR21 PACR22 PACR23 0x2C PACRD PACR24
Kojto 90:cb3d968589d8 638 * PACR25 PACR26 PACR27 PACR28 PACR29 PACR30 PACR31 0x30 Reserved 0x34 Reserved 0x38
Kojto 90:cb3d968589d8 639 * Reserved 0x3C Reserved 0x40 PACRE PACR32 PACR33 PACR34 PACR35 PACR36 PACR37
Kojto 90:cb3d968589d8 640 * PACR38 PACR39 0x44 PACRF PACR40 PACR41 PACR42 PACR43 PACR44 PACR45 PACR46 PACR47
Kojto 90:cb3d968589d8 641 * 0x48 PACRG PACR48 PACR49 PACR50 PACR51 PACR52 PACR53 PACR54 PACR55 0x4C PACRH
Kojto 90:cb3d968589d8 642 * PACR56 PACR57 PACR58 PACR59 PACR60 PACR61 PACR62 PACR63 0x50 PACRI PACR64
Kojto 90:cb3d968589d8 643 * PACR65 PACR66 PACR67 PACR68 PACR69 PACR70 PACR71 0x54 PACRJ PACR72 PACR73 PACR74
Kojto 90:cb3d968589d8 644 * PACR75 PACR76 PACR77 PACR78 PACR79 0x58 PACRK PACR80 PACR81 PACR82 PACR83
Kojto 90:cb3d968589d8 645 * PACR84 PACR85 PACR86 PACR87 0x5C PACRL PACR88 PACR89 PACR90 PACR91 PACR92 PACR93
Kojto 90:cb3d968589d8 646 * PACR94 PACR95 0x60 PACRM PACR96 PACR97 PACR98 PACR99 PACR100 PACR101 PACR102
Kojto 90:cb3d968589d8 647 * PACR103 0x64 PACRN PACR104 PACR105 PACR106 PACR107 PACR108 PACR109 PACR110
Kojto 90:cb3d968589d8 648 * PACR111 0x68 PACRO PACR112 PACR113 PACR114 PACR115 PACR116 PACR117 PACR118 PACR119
Kojto 90:cb3d968589d8 649 * 0x6C PACRP PACR120 PACR121 PACR122 PACR123 PACR124 PACR125 PACR126 PACR127 0x80
Kojto 90:cb3d968589d8 650 * PACRU PACR GBL0 PACR GBL1 Reserved The register field descriptions for PACR
Kojto 90:cb3d968589d8 651 * A-D, which control peripheral slots 0-31, are shown below. The following
Kojto 90:cb3d968589d8 652 * section, PACRPeripheral Access Control Register , shows the register field
Kojto 90:cb3d968589d8 653 * descriptions for PACR E-P. All PACR registers are identical. They are divided into two
Kojto 90:cb3d968589d8 654 * sections because they occupy two non-contiguous address spaces.
Kojto 90:cb3d968589d8 655 */
Kojto 90:cb3d968589d8 656 typedef union _hw_aips_pacra
Kojto 90:cb3d968589d8 657 {
Kojto 90:cb3d968589d8 658 uint32_t U;
Kojto 90:cb3d968589d8 659 struct _hw_aips_pacra_bitfields
Kojto 90:cb3d968589d8 660 {
Kojto 90:cb3d968589d8 661 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 662 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 663 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 664 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 665 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 666 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 667 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 668 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 669 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 670 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 671 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 672 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 673 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 674 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 675 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 676 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 677 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 678 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 679 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 680 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 681 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 682 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 683 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 684 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 685 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 686 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 687 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 688 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 689 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 690 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 691 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 692 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 693 } B;
Kojto 90:cb3d968589d8 694 } hw_aips_pacra_t;
Kojto 90:cb3d968589d8 695
Kojto 90:cb3d968589d8 696 /*!
Kojto 90:cb3d968589d8 697 * @name Constants and macros for entire AIPS_PACRA register
Kojto 90:cb3d968589d8 698 */
Kojto 90:cb3d968589d8 699 /*@{*/
Kojto 90:cb3d968589d8 700 #define HW_AIPS_PACRA_ADDR(x) ((x) + 0x20U)
Kojto 90:cb3d968589d8 701
Kojto 90:cb3d968589d8 702 #define HW_AIPS_PACRA(x) (*(__IO hw_aips_pacra_t *) HW_AIPS_PACRA_ADDR(x))
Kojto 90:cb3d968589d8 703 #define HW_AIPS_PACRA_RD(x) (HW_AIPS_PACRA(x).U)
Kojto 90:cb3d968589d8 704 #define HW_AIPS_PACRA_WR(x, v) (HW_AIPS_PACRA(x).U = (v))
Kojto 90:cb3d968589d8 705 #define HW_AIPS_PACRA_SET(x, v) (HW_AIPS_PACRA_WR(x, HW_AIPS_PACRA_RD(x) | (v)))
Kojto 90:cb3d968589d8 706 #define HW_AIPS_PACRA_CLR(x, v) (HW_AIPS_PACRA_WR(x, HW_AIPS_PACRA_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 707 #define HW_AIPS_PACRA_TOG(x, v) (HW_AIPS_PACRA_WR(x, HW_AIPS_PACRA_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 708 /*@}*/
Kojto 90:cb3d968589d8 709
Kojto 90:cb3d968589d8 710 /*
Kojto 90:cb3d968589d8 711 * Constants & macros for individual AIPS_PACRA bitfields
Kojto 90:cb3d968589d8 712 */
Kojto 90:cb3d968589d8 713
Kojto 90:cb3d968589d8 714 /*!
Kojto 90:cb3d968589d8 715 * @name Register AIPS_PACRA, field TP7[0] (RW)
Kojto 90:cb3d968589d8 716 *
Kojto 90:cb3d968589d8 717 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 718 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 719 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 720 *
Kojto 90:cb3d968589d8 721 * Values:
Kojto 90:cb3d968589d8 722 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 723 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 724 */
Kojto 90:cb3d968589d8 725 /*@{*/
Kojto 90:cb3d968589d8 726 #define BP_AIPS_PACRA_TP7 (0U) /*!< Bit position for AIPS_PACRA_TP7. */
Kojto 90:cb3d968589d8 727 #define BM_AIPS_PACRA_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRA_TP7. */
Kojto 90:cb3d968589d8 728 #define BS_AIPS_PACRA_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP7. */
Kojto 90:cb3d968589d8 729
Kojto 90:cb3d968589d8 730 /*! @brief Read current value of the AIPS_PACRA_TP7 field. */
Kojto 90:cb3d968589d8 731 #define BR_AIPS_PACRA_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP7))
Kojto 90:cb3d968589d8 732
Kojto 90:cb3d968589d8 733 /*! @brief Format value for bitfield AIPS_PACRA_TP7. */
Kojto 90:cb3d968589d8 734 #define BF_AIPS_PACRA_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP7) & BM_AIPS_PACRA_TP7)
Kojto 90:cb3d968589d8 735
Kojto 90:cb3d968589d8 736 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 737 #define BW_AIPS_PACRA_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP7) = (v))
Kojto 90:cb3d968589d8 738 /*@}*/
Kojto 90:cb3d968589d8 739
Kojto 90:cb3d968589d8 740 /*!
Kojto 90:cb3d968589d8 741 * @name Register AIPS_PACRA, field WP7[1] (RW)
Kojto 90:cb3d968589d8 742 *
Kojto 90:cb3d968589d8 743 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 744 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 745 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 746 *
Kojto 90:cb3d968589d8 747 * Values:
Kojto 90:cb3d968589d8 748 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 749 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 750 */
Kojto 90:cb3d968589d8 751 /*@{*/
Kojto 90:cb3d968589d8 752 #define BP_AIPS_PACRA_WP7 (1U) /*!< Bit position for AIPS_PACRA_WP7. */
Kojto 90:cb3d968589d8 753 #define BM_AIPS_PACRA_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRA_WP7. */
Kojto 90:cb3d968589d8 754 #define BS_AIPS_PACRA_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP7. */
Kojto 90:cb3d968589d8 755
Kojto 90:cb3d968589d8 756 /*! @brief Read current value of the AIPS_PACRA_WP7 field. */
Kojto 90:cb3d968589d8 757 #define BR_AIPS_PACRA_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP7))
Kojto 90:cb3d968589d8 758
Kojto 90:cb3d968589d8 759 /*! @brief Format value for bitfield AIPS_PACRA_WP7. */
Kojto 90:cb3d968589d8 760 #define BF_AIPS_PACRA_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP7) & BM_AIPS_PACRA_WP7)
Kojto 90:cb3d968589d8 761
Kojto 90:cb3d968589d8 762 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 763 #define BW_AIPS_PACRA_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP7) = (v))
Kojto 90:cb3d968589d8 764 /*@}*/
Kojto 90:cb3d968589d8 765
Kojto 90:cb3d968589d8 766 /*!
Kojto 90:cb3d968589d8 767 * @name Register AIPS_PACRA, field SP7[2] (RW)
Kojto 90:cb3d968589d8 768 *
Kojto 90:cb3d968589d8 769 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 770 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 771 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 772 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 773 * access initiates.
Kojto 90:cb3d968589d8 774 *
Kojto 90:cb3d968589d8 775 * Values:
Kojto 90:cb3d968589d8 776 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 777 * accesses.
Kojto 90:cb3d968589d8 778 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 779 */
Kojto 90:cb3d968589d8 780 /*@{*/
Kojto 90:cb3d968589d8 781 #define BP_AIPS_PACRA_SP7 (2U) /*!< Bit position for AIPS_PACRA_SP7. */
Kojto 90:cb3d968589d8 782 #define BM_AIPS_PACRA_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRA_SP7. */
Kojto 90:cb3d968589d8 783 #define BS_AIPS_PACRA_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP7. */
Kojto 90:cb3d968589d8 784
Kojto 90:cb3d968589d8 785 /*! @brief Read current value of the AIPS_PACRA_SP7 field. */
Kojto 90:cb3d968589d8 786 #define BR_AIPS_PACRA_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP7))
Kojto 90:cb3d968589d8 787
Kojto 90:cb3d968589d8 788 /*! @brief Format value for bitfield AIPS_PACRA_SP7. */
Kojto 90:cb3d968589d8 789 #define BF_AIPS_PACRA_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP7) & BM_AIPS_PACRA_SP7)
Kojto 90:cb3d968589d8 790
Kojto 90:cb3d968589d8 791 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 792 #define BW_AIPS_PACRA_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP7) = (v))
Kojto 90:cb3d968589d8 793 /*@}*/
Kojto 90:cb3d968589d8 794
Kojto 90:cb3d968589d8 795 /*!
Kojto 90:cb3d968589d8 796 * @name Register AIPS_PACRA, field TP6[4] (RW)
Kojto 90:cb3d968589d8 797 *
Kojto 90:cb3d968589d8 798 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 799 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 800 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 801 *
Kojto 90:cb3d968589d8 802 * Values:
Kojto 90:cb3d968589d8 803 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 804 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 805 */
Kojto 90:cb3d968589d8 806 /*@{*/
Kojto 90:cb3d968589d8 807 #define BP_AIPS_PACRA_TP6 (4U) /*!< Bit position for AIPS_PACRA_TP6. */
Kojto 90:cb3d968589d8 808 #define BM_AIPS_PACRA_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRA_TP6. */
Kojto 90:cb3d968589d8 809 #define BS_AIPS_PACRA_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP6. */
Kojto 90:cb3d968589d8 810
Kojto 90:cb3d968589d8 811 /*! @brief Read current value of the AIPS_PACRA_TP6 field. */
Kojto 90:cb3d968589d8 812 #define BR_AIPS_PACRA_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP6))
Kojto 90:cb3d968589d8 813
Kojto 90:cb3d968589d8 814 /*! @brief Format value for bitfield AIPS_PACRA_TP6. */
Kojto 90:cb3d968589d8 815 #define BF_AIPS_PACRA_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP6) & BM_AIPS_PACRA_TP6)
Kojto 90:cb3d968589d8 816
Kojto 90:cb3d968589d8 817 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 818 #define BW_AIPS_PACRA_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP6) = (v))
Kojto 90:cb3d968589d8 819 /*@}*/
Kojto 90:cb3d968589d8 820
Kojto 90:cb3d968589d8 821 /*!
Kojto 90:cb3d968589d8 822 * @name Register AIPS_PACRA, field WP6[5] (RW)
Kojto 90:cb3d968589d8 823 *
Kojto 90:cb3d968589d8 824 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 825 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 826 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 827 *
Kojto 90:cb3d968589d8 828 * Values:
Kojto 90:cb3d968589d8 829 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 830 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 831 */
Kojto 90:cb3d968589d8 832 /*@{*/
Kojto 90:cb3d968589d8 833 #define BP_AIPS_PACRA_WP6 (5U) /*!< Bit position for AIPS_PACRA_WP6. */
Kojto 90:cb3d968589d8 834 #define BM_AIPS_PACRA_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRA_WP6. */
Kojto 90:cb3d968589d8 835 #define BS_AIPS_PACRA_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP6. */
Kojto 90:cb3d968589d8 836
Kojto 90:cb3d968589d8 837 /*! @brief Read current value of the AIPS_PACRA_WP6 field. */
Kojto 90:cb3d968589d8 838 #define BR_AIPS_PACRA_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP6))
Kojto 90:cb3d968589d8 839
Kojto 90:cb3d968589d8 840 /*! @brief Format value for bitfield AIPS_PACRA_WP6. */
Kojto 90:cb3d968589d8 841 #define BF_AIPS_PACRA_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP6) & BM_AIPS_PACRA_WP6)
Kojto 90:cb3d968589d8 842
Kojto 90:cb3d968589d8 843 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 844 #define BW_AIPS_PACRA_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP6) = (v))
Kojto 90:cb3d968589d8 845 /*@}*/
Kojto 90:cb3d968589d8 846
Kojto 90:cb3d968589d8 847 /*!
Kojto 90:cb3d968589d8 848 * @name Register AIPS_PACRA, field SP6[6] (RW)
Kojto 90:cb3d968589d8 849 *
Kojto 90:cb3d968589d8 850 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 851 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 852 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 853 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 854 * access initiates.
Kojto 90:cb3d968589d8 855 *
Kojto 90:cb3d968589d8 856 * Values:
Kojto 90:cb3d968589d8 857 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 858 * accesses.
Kojto 90:cb3d968589d8 859 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 860 */
Kojto 90:cb3d968589d8 861 /*@{*/
Kojto 90:cb3d968589d8 862 #define BP_AIPS_PACRA_SP6 (6U) /*!< Bit position for AIPS_PACRA_SP6. */
Kojto 90:cb3d968589d8 863 #define BM_AIPS_PACRA_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRA_SP6. */
Kojto 90:cb3d968589d8 864 #define BS_AIPS_PACRA_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP6. */
Kojto 90:cb3d968589d8 865
Kojto 90:cb3d968589d8 866 /*! @brief Read current value of the AIPS_PACRA_SP6 field. */
Kojto 90:cb3d968589d8 867 #define BR_AIPS_PACRA_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP6))
Kojto 90:cb3d968589d8 868
Kojto 90:cb3d968589d8 869 /*! @brief Format value for bitfield AIPS_PACRA_SP6. */
Kojto 90:cb3d968589d8 870 #define BF_AIPS_PACRA_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP6) & BM_AIPS_PACRA_SP6)
Kojto 90:cb3d968589d8 871
Kojto 90:cb3d968589d8 872 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 873 #define BW_AIPS_PACRA_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP6) = (v))
Kojto 90:cb3d968589d8 874 /*@}*/
Kojto 90:cb3d968589d8 875
Kojto 90:cb3d968589d8 876 /*!
Kojto 90:cb3d968589d8 877 * @name Register AIPS_PACRA, field TP5[8] (RW)
Kojto 90:cb3d968589d8 878 *
Kojto 90:cb3d968589d8 879 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 880 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 881 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 882 *
Kojto 90:cb3d968589d8 883 * Values:
Kojto 90:cb3d968589d8 884 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 885 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 886 */
Kojto 90:cb3d968589d8 887 /*@{*/
Kojto 90:cb3d968589d8 888 #define BP_AIPS_PACRA_TP5 (8U) /*!< Bit position for AIPS_PACRA_TP5. */
Kojto 90:cb3d968589d8 889 #define BM_AIPS_PACRA_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRA_TP5. */
Kojto 90:cb3d968589d8 890 #define BS_AIPS_PACRA_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP5. */
Kojto 90:cb3d968589d8 891
Kojto 90:cb3d968589d8 892 /*! @brief Read current value of the AIPS_PACRA_TP5 field. */
Kojto 90:cb3d968589d8 893 #define BR_AIPS_PACRA_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP5))
Kojto 90:cb3d968589d8 894
Kojto 90:cb3d968589d8 895 /*! @brief Format value for bitfield AIPS_PACRA_TP5. */
Kojto 90:cb3d968589d8 896 #define BF_AIPS_PACRA_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP5) & BM_AIPS_PACRA_TP5)
Kojto 90:cb3d968589d8 897
Kojto 90:cb3d968589d8 898 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 899 #define BW_AIPS_PACRA_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP5) = (v))
Kojto 90:cb3d968589d8 900 /*@}*/
Kojto 90:cb3d968589d8 901
Kojto 90:cb3d968589d8 902 /*!
Kojto 90:cb3d968589d8 903 * @name Register AIPS_PACRA, field WP5[9] (RW)
Kojto 90:cb3d968589d8 904 *
Kojto 90:cb3d968589d8 905 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 906 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 907 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 908 *
Kojto 90:cb3d968589d8 909 * Values:
Kojto 90:cb3d968589d8 910 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 911 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 912 */
Kojto 90:cb3d968589d8 913 /*@{*/
Kojto 90:cb3d968589d8 914 #define BP_AIPS_PACRA_WP5 (9U) /*!< Bit position for AIPS_PACRA_WP5. */
Kojto 90:cb3d968589d8 915 #define BM_AIPS_PACRA_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRA_WP5. */
Kojto 90:cb3d968589d8 916 #define BS_AIPS_PACRA_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP5. */
Kojto 90:cb3d968589d8 917
Kojto 90:cb3d968589d8 918 /*! @brief Read current value of the AIPS_PACRA_WP5 field. */
Kojto 90:cb3d968589d8 919 #define BR_AIPS_PACRA_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP5))
Kojto 90:cb3d968589d8 920
Kojto 90:cb3d968589d8 921 /*! @brief Format value for bitfield AIPS_PACRA_WP5. */
Kojto 90:cb3d968589d8 922 #define BF_AIPS_PACRA_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP5) & BM_AIPS_PACRA_WP5)
Kojto 90:cb3d968589d8 923
Kojto 90:cb3d968589d8 924 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 925 #define BW_AIPS_PACRA_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP5) = (v))
Kojto 90:cb3d968589d8 926 /*@}*/
Kojto 90:cb3d968589d8 927
Kojto 90:cb3d968589d8 928 /*!
Kojto 90:cb3d968589d8 929 * @name Register AIPS_PACRA, field SP5[10] (RW)
Kojto 90:cb3d968589d8 930 *
Kojto 90:cb3d968589d8 931 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 932 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 933 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 934 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 935 * access initiates.
Kojto 90:cb3d968589d8 936 *
Kojto 90:cb3d968589d8 937 * Values:
Kojto 90:cb3d968589d8 938 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 939 * accesses.
Kojto 90:cb3d968589d8 940 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 941 */
Kojto 90:cb3d968589d8 942 /*@{*/
Kojto 90:cb3d968589d8 943 #define BP_AIPS_PACRA_SP5 (10U) /*!< Bit position for AIPS_PACRA_SP5. */
Kojto 90:cb3d968589d8 944 #define BM_AIPS_PACRA_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRA_SP5. */
Kojto 90:cb3d968589d8 945 #define BS_AIPS_PACRA_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP5. */
Kojto 90:cb3d968589d8 946
Kojto 90:cb3d968589d8 947 /*! @brief Read current value of the AIPS_PACRA_SP5 field. */
Kojto 90:cb3d968589d8 948 #define BR_AIPS_PACRA_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP5))
Kojto 90:cb3d968589d8 949
Kojto 90:cb3d968589d8 950 /*! @brief Format value for bitfield AIPS_PACRA_SP5. */
Kojto 90:cb3d968589d8 951 #define BF_AIPS_PACRA_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP5) & BM_AIPS_PACRA_SP5)
Kojto 90:cb3d968589d8 952
Kojto 90:cb3d968589d8 953 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 954 #define BW_AIPS_PACRA_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP5) = (v))
Kojto 90:cb3d968589d8 955 /*@}*/
Kojto 90:cb3d968589d8 956
Kojto 90:cb3d968589d8 957 /*!
Kojto 90:cb3d968589d8 958 * @name Register AIPS_PACRA, field TP4[12] (RW)
Kojto 90:cb3d968589d8 959 *
Kojto 90:cb3d968589d8 960 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 961 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 962 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 963 *
Kojto 90:cb3d968589d8 964 * Values:
Kojto 90:cb3d968589d8 965 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 966 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 967 */
Kojto 90:cb3d968589d8 968 /*@{*/
Kojto 90:cb3d968589d8 969 #define BP_AIPS_PACRA_TP4 (12U) /*!< Bit position for AIPS_PACRA_TP4. */
Kojto 90:cb3d968589d8 970 #define BM_AIPS_PACRA_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRA_TP4. */
Kojto 90:cb3d968589d8 971 #define BS_AIPS_PACRA_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP4. */
Kojto 90:cb3d968589d8 972
Kojto 90:cb3d968589d8 973 /*! @brief Read current value of the AIPS_PACRA_TP4 field. */
Kojto 90:cb3d968589d8 974 #define BR_AIPS_PACRA_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP4))
Kojto 90:cb3d968589d8 975
Kojto 90:cb3d968589d8 976 /*! @brief Format value for bitfield AIPS_PACRA_TP4. */
Kojto 90:cb3d968589d8 977 #define BF_AIPS_PACRA_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP4) & BM_AIPS_PACRA_TP4)
Kojto 90:cb3d968589d8 978
Kojto 90:cb3d968589d8 979 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 980 #define BW_AIPS_PACRA_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP4) = (v))
Kojto 90:cb3d968589d8 981 /*@}*/
Kojto 90:cb3d968589d8 982
Kojto 90:cb3d968589d8 983 /*!
Kojto 90:cb3d968589d8 984 * @name Register AIPS_PACRA, field WP4[13] (RW)
Kojto 90:cb3d968589d8 985 *
Kojto 90:cb3d968589d8 986 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 987 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 988 * no peripheral access initiates.
Kojto 90:cb3d968589d8 989 *
Kojto 90:cb3d968589d8 990 * Values:
Kojto 90:cb3d968589d8 991 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 992 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 993 */
Kojto 90:cb3d968589d8 994 /*@{*/
Kojto 90:cb3d968589d8 995 #define BP_AIPS_PACRA_WP4 (13U) /*!< Bit position for AIPS_PACRA_WP4. */
Kojto 90:cb3d968589d8 996 #define BM_AIPS_PACRA_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRA_WP4. */
Kojto 90:cb3d968589d8 997 #define BS_AIPS_PACRA_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP4. */
Kojto 90:cb3d968589d8 998
Kojto 90:cb3d968589d8 999 /*! @brief Read current value of the AIPS_PACRA_WP4 field. */
Kojto 90:cb3d968589d8 1000 #define BR_AIPS_PACRA_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP4))
Kojto 90:cb3d968589d8 1001
Kojto 90:cb3d968589d8 1002 /*! @brief Format value for bitfield AIPS_PACRA_WP4. */
Kojto 90:cb3d968589d8 1003 #define BF_AIPS_PACRA_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP4) & BM_AIPS_PACRA_WP4)
Kojto 90:cb3d968589d8 1004
Kojto 90:cb3d968589d8 1005 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 1006 #define BW_AIPS_PACRA_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP4) = (v))
Kojto 90:cb3d968589d8 1007 /*@}*/
Kojto 90:cb3d968589d8 1008
Kojto 90:cb3d968589d8 1009 /*!
Kojto 90:cb3d968589d8 1010 * @name Register AIPS_PACRA, field SP4[14] (RW)
Kojto 90:cb3d968589d8 1011 *
Kojto 90:cb3d968589d8 1012 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1013 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1014 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 1015 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 1016 * access initiates.
Kojto 90:cb3d968589d8 1017 *
Kojto 90:cb3d968589d8 1018 * Values:
Kojto 90:cb3d968589d8 1019 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1020 * accesses.
Kojto 90:cb3d968589d8 1021 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1022 */
Kojto 90:cb3d968589d8 1023 /*@{*/
Kojto 90:cb3d968589d8 1024 #define BP_AIPS_PACRA_SP4 (14U) /*!< Bit position for AIPS_PACRA_SP4. */
Kojto 90:cb3d968589d8 1025 #define BM_AIPS_PACRA_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRA_SP4. */
Kojto 90:cb3d968589d8 1026 #define BS_AIPS_PACRA_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP4. */
Kojto 90:cb3d968589d8 1027
Kojto 90:cb3d968589d8 1028 /*! @brief Read current value of the AIPS_PACRA_SP4 field. */
Kojto 90:cb3d968589d8 1029 #define BR_AIPS_PACRA_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP4))
Kojto 90:cb3d968589d8 1030
Kojto 90:cb3d968589d8 1031 /*! @brief Format value for bitfield AIPS_PACRA_SP4. */
Kojto 90:cb3d968589d8 1032 #define BF_AIPS_PACRA_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP4) & BM_AIPS_PACRA_SP4)
Kojto 90:cb3d968589d8 1033
Kojto 90:cb3d968589d8 1034 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 1035 #define BW_AIPS_PACRA_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP4) = (v))
Kojto 90:cb3d968589d8 1036 /*@}*/
Kojto 90:cb3d968589d8 1037
Kojto 90:cb3d968589d8 1038 /*!
Kojto 90:cb3d968589d8 1039 * @name Register AIPS_PACRA, field TP3[16] (RW)
Kojto 90:cb3d968589d8 1040 *
Kojto 90:cb3d968589d8 1041 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1042 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1043 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1044 *
Kojto 90:cb3d968589d8 1045 * Values:
Kojto 90:cb3d968589d8 1046 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1047 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1048 */
Kojto 90:cb3d968589d8 1049 /*@{*/
Kojto 90:cb3d968589d8 1050 #define BP_AIPS_PACRA_TP3 (16U) /*!< Bit position for AIPS_PACRA_TP3. */
Kojto 90:cb3d968589d8 1051 #define BM_AIPS_PACRA_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRA_TP3. */
Kojto 90:cb3d968589d8 1052 #define BS_AIPS_PACRA_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP3. */
Kojto 90:cb3d968589d8 1053
Kojto 90:cb3d968589d8 1054 /*! @brief Read current value of the AIPS_PACRA_TP3 field. */
Kojto 90:cb3d968589d8 1055 #define BR_AIPS_PACRA_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP3))
Kojto 90:cb3d968589d8 1056
Kojto 90:cb3d968589d8 1057 /*! @brief Format value for bitfield AIPS_PACRA_TP3. */
Kojto 90:cb3d968589d8 1058 #define BF_AIPS_PACRA_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP3) & BM_AIPS_PACRA_TP3)
Kojto 90:cb3d968589d8 1059
Kojto 90:cb3d968589d8 1060 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 1061 #define BW_AIPS_PACRA_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP3) = (v))
Kojto 90:cb3d968589d8 1062 /*@}*/
Kojto 90:cb3d968589d8 1063
Kojto 90:cb3d968589d8 1064 /*!
Kojto 90:cb3d968589d8 1065 * @name Register AIPS_PACRA, field WP3[17] (RW)
Kojto 90:cb3d968589d8 1066 *
Kojto 90:cb3d968589d8 1067 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 1068 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 1069 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 1070 *
Kojto 90:cb3d968589d8 1071 * Values:
Kojto 90:cb3d968589d8 1072 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1073 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1074 */
Kojto 90:cb3d968589d8 1075 /*@{*/
Kojto 90:cb3d968589d8 1076 #define BP_AIPS_PACRA_WP3 (17U) /*!< Bit position for AIPS_PACRA_WP3. */
Kojto 90:cb3d968589d8 1077 #define BM_AIPS_PACRA_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRA_WP3. */
Kojto 90:cb3d968589d8 1078 #define BS_AIPS_PACRA_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP3. */
Kojto 90:cb3d968589d8 1079
Kojto 90:cb3d968589d8 1080 /*! @brief Read current value of the AIPS_PACRA_WP3 field. */
Kojto 90:cb3d968589d8 1081 #define BR_AIPS_PACRA_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP3))
Kojto 90:cb3d968589d8 1082
Kojto 90:cb3d968589d8 1083 /*! @brief Format value for bitfield AIPS_PACRA_WP3. */
Kojto 90:cb3d968589d8 1084 #define BF_AIPS_PACRA_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP3) & BM_AIPS_PACRA_WP3)
Kojto 90:cb3d968589d8 1085
Kojto 90:cb3d968589d8 1086 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 1087 #define BW_AIPS_PACRA_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP3) = (v))
Kojto 90:cb3d968589d8 1088 /*@}*/
Kojto 90:cb3d968589d8 1089
Kojto 90:cb3d968589d8 1090 /*!
Kojto 90:cb3d968589d8 1091 * @name Register AIPS_PACRA, field SP3[18] (RW)
Kojto 90:cb3d968589d8 1092 *
Kojto 90:cb3d968589d8 1093 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1094 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1095 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 1096 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 1097 * initiates.
Kojto 90:cb3d968589d8 1098 *
Kojto 90:cb3d968589d8 1099 * Values:
Kojto 90:cb3d968589d8 1100 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1101 * accesses.
Kojto 90:cb3d968589d8 1102 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1103 */
Kojto 90:cb3d968589d8 1104 /*@{*/
Kojto 90:cb3d968589d8 1105 #define BP_AIPS_PACRA_SP3 (18U) /*!< Bit position for AIPS_PACRA_SP3. */
Kojto 90:cb3d968589d8 1106 #define BM_AIPS_PACRA_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRA_SP3. */
Kojto 90:cb3d968589d8 1107 #define BS_AIPS_PACRA_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP3. */
Kojto 90:cb3d968589d8 1108
Kojto 90:cb3d968589d8 1109 /*! @brief Read current value of the AIPS_PACRA_SP3 field. */
Kojto 90:cb3d968589d8 1110 #define BR_AIPS_PACRA_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP3))
Kojto 90:cb3d968589d8 1111
Kojto 90:cb3d968589d8 1112 /*! @brief Format value for bitfield AIPS_PACRA_SP3. */
Kojto 90:cb3d968589d8 1113 #define BF_AIPS_PACRA_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP3) & BM_AIPS_PACRA_SP3)
Kojto 90:cb3d968589d8 1114
Kojto 90:cb3d968589d8 1115 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 1116 #define BW_AIPS_PACRA_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP3) = (v))
Kojto 90:cb3d968589d8 1117 /*@}*/
Kojto 90:cb3d968589d8 1118
Kojto 90:cb3d968589d8 1119 /*!
Kojto 90:cb3d968589d8 1120 * @name Register AIPS_PACRA, field TP2[20] (RW)
Kojto 90:cb3d968589d8 1121 *
Kojto 90:cb3d968589d8 1122 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1123 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1124 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1125 *
Kojto 90:cb3d968589d8 1126 * Values:
Kojto 90:cb3d968589d8 1127 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1128 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1129 */
Kojto 90:cb3d968589d8 1130 /*@{*/
Kojto 90:cb3d968589d8 1131 #define BP_AIPS_PACRA_TP2 (20U) /*!< Bit position for AIPS_PACRA_TP2. */
Kojto 90:cb3d968589d8 1132 #define BM_AIPS_PACRA_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRA_TP2. */
Kojto 90:cb3d968589d8 1133 #define BS_AIPS_PACRA_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP2. */
Kojto 90:cb3d968589d8 1134
Kojto 90:cb3d968589d8 1135 /*! @brief Read current value of the AIPS_PACRA_TP2 field. */
Kojto 90:cb3d968589d8 1136 #define BR_AIPS_PACRA_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP2))
Kojto 90:cb3d968589d8 1137
Kojto 90:cb3d968589d8 1138 /*! @brief Format value for bitfield AIPS_PACRA_TP2. */
Kojto 90:cb3d968589d8 1139 #define BF_AIPS_PACRA_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP2) & BM_AIPS_PACRA_TP2)
Kojto 90:cb3d968589d8 1140
Kojto 90:cb3d968589d8 1141 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 1142 #define BW_AIPS_PACRA_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP2) = (v))
Kojto 90:cb3d968589d8 1143 /*@}*/
Kojto 90:cb3d968589d8 1144
Kojto 90:cb3d968589d8 1145 /*!
Kojto 90:cb3d968589d8 1146 * @name Register AIPS_PACRA, field WP2[21] (RW)
Kojto 90:cb3d968589d8 1147 *
Kojto 90:cb3d968589d8 1148 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 1149 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 1150 * no peripheral access initiates.
Kojto 90:cb3d968589d8 1151 *
Kojto 90:cb3d968589d8 1152 * Values:
Kojto 90:cb3d968589d8 1153 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1154 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1155 */
Kojto 90:cb3d968589d8 1156 /*@{*/
Kojto 90:cb3d968589d8 1157 #define BP_AIPS_PACRA_WP2 (21U) /*!< Bit position for AIPS_PACRA_WP2. */
Kojto 90:cb3d968589d8 1158 #define BM_AIPS_PACRA_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRA_WP2. */
Kojto 90:cb3d968589d8 1159 #define BS_AIPS_PACRA_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP2. */
Kojto 90:cb3d968589d8 1160
Kojto 90:cb3d968589d8 1161 /*! @brief Read current value of the AIPS_PACRA_WP2 field. */
Kojto 90:cb3d968589d8 1162 #define BR_AIPS_PACRA_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP2))
Kojto 90:cb3d968589d8 1163
Kojto 90:cb3d968589d8 1164 /*! @brief Format value for bitfield AIPS_PACRA_WP2. */
Kojto 90:cb3d968589d8 1165 #define BF_AIPS_PACRA_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP2) & BM_AIPS_PACRA_WP2)
Kojto 90:cb3d968589d8 1166
Kojto 90:cb3d968589d8 1167 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 1168 #define BW_AIPS_PACRA_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP2) = (v))
Kojto 90:cb3d968589d8 1169 /*@}*/
Kojto 90:cb3d968589d8 1170
Kojto 90:cb3d968589d8 1171 /*!
Kojto 90:cb3d968589d8 1172 * @name Register AIPS_PACRA, field SP2[22] (RW)
Kojto 90:cb3d968589d8 1173 *
Kojto 90:cb3d968589d8 1174 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1175 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1176 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 1177 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 1178 * access initiates.
Kojto 90:cb3d968589d8 1179 *
Kojto 90:cb3d968589d8 1180 * Values:
Kojto 90:cb3d968589d8 1181 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1182 * accesses.
Kojto 90:cb3d968589d8 1183 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1184 */
Kojto 90:cb3d968589d8 1185 /*@{*/
Kojto 90:cb3d968589d8 1186 #define BP_AIPS_PACRA_SP2 (22U) /*!< Bit position for AIPS_PACRA_SP2. */
Kojto 90:cb3d968589d8 1187 #define BM_AIPS_PACRA_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRA_SP2. */
Kojto 90:cb3d968589d8 1188 #define BS_AIPS_PACRA_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP2. */
Kojto 90:cb3d968589d8 1189
Kojto 90:cb3d968589d8 1190 /*! @brief Read current value of the AIPS_PACRA_SP2 field. */
Kojto 90:cb3d968589d8 1191 #define BR_AIPS_PACRA_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP2))
Kojto 90:cb3d968589d8 1192
Kojto 90:cb3d968589d8 1193 /*! @brief Format value for bitfield AIPS_PACRA_SP2. */
Kojto 90:cb3d968589d8 1194 #define BF_AIPS_PACRA_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP2) & BM_AIPS_PACRA_SP2)
Kojto 90:cb3d968589d8 1195
Kojto 90:cb3d968589d8 1196 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 1197 #define BW_AIPS_PACRA_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP2) = (v))
Kojto 90:cb3d968589d8 1198 /*@}*/
Kojto 90:cb3d968589d8 1199
Kojto 90:cb3d968589d8 1200 /*!
Kojto 90:cb3d968589d8 1201 * @name Register AIPS_PACRA, field TP1[24] (RW)
Kojto 90:cb3d968589d8 1202 *
Kojto 90:cb3d968589d8 1203 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1204 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1205 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1206 *
Kojto 90:cb3d968589d8 1207 * Values:
Kojto 90:cb3d968589d8 1208 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1209 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1210 */
Kojto 90:cb3d968589d8 1211 /*@{*/
Kojto 90:cb3d968589d8 1212 #define BP_AIPS_PACRA_TP1 (24U) /*!< Bit position for AIPS_PACRA_TP1. */
Kojto 90:cb3d968589d8 1213 #define BM_AIPS_PACRA_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRA_TP1. */
Kojto 90:cb3d968589d8 1214 #define BS_AIPS_PACRA_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP1. */
Kojto 90:cb3d968589d8 1215
Kojto 90:cb3d968589d8 1216 /*! @brief Read current value of the AIPS_PACRA_TP1 field. */
Kojto 90:cb3d968589d8 1217 #define BR_AIPS_PACRA_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP1))
Kojto 90:cb3d968589d8 1218
Kojto 90:cb3d968589d8 1219 /*! @brief Format value for bitfield AIPS_PACRA_TP1. */
Kojto 90:cb3d968589d8 1220 #define BF_AIPS_PACRA_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP1) & BM_AIPS_PACRA_TP1)
Kojto 90:cb3d968589d8 1221
Kojto 90:cb3d968589d8 1222 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 1223 #define BW_AIPS_PACRA_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP1) = (v))
Kojto 90:cb3d968589d8 1224 /*@}*/
Kojto 90:cb3d968589d8 1225
Kojto 90:cb3d968589d8 1226 /*!
Kojto 90:cb3d968589d8 1227 * @name Register AIPS_PACRA, field WP1[25] (RW)
Kojto 90:cb3d968589d8 1228 *
Kojto 90:cb3d968589d8 1229 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 1230 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 1231 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 1232 *
Kojto 90:cb3d968589d8 1233 * Values:
Kojto 90:cb3d968589d8 1234 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1235 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1236 */
Kojto 90:cb3d968589d8 1237 /*@{*/
Kojto 90:cb3d968589d8 1238 #define BP_AIPS_PACRA_WP1 (25U) /*!< Bit position for AIPS_PACRA_WP1. */
Kojto 90:cb3d968589d8 1239 #define BM_AIPS_PACRA_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRA_WP1. */
Kojto 90:cb3d968589d8 1240 #define BS_AIPS_PACRA_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP1. */
Kojto 90:cb3d968589d8 1241
Kojto 90:cb3d968589d8 1242 /*! @brief Read current value of the AIPS_PACRA_WP1 field. */
Kojto 90:cb3d968589d8 1243 #define BR_AIPS_PACRA_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP1))
Kojto 90:cb3d968589d8 1244
Kojto 90:cb3d968589d8 1245 /*! @brief Format value for bitfield AIPS_PACRA_WP1. */
Kojto 90:cb3d968589d8 1246 #define BF_AIPS_PACRA_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP1) & BM_AIPS_PACRA_WP1)
Kojto 90:cb3d968589d8 1247
Kojto 90:cb3d968589d8 1248 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 1249 #define BW_AIPS_PACRA_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP1) = (v))
Kojto 90:cb3d968589d8 1250 /*@}*/
Kojto 90:cb3d968589d8 1251
Kojto 90:cb3d968589d8 1252 /*!
Kojto 90:cb3d968589d8 1253 * @name Register AIPS_PACRA, field SP1[26] (RW)
Kojto 90:cb3d968589d8 1254 *
Kojto 90:cb3d968589d8 1255 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1256 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1257 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 1258 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 1259 * access initiates.
Kojto 90:cb3d968589d8 1260 *
Kojto 90:cb3d968589d8 1261 * Values:
Kojto 90:cb3d968589d8 1262 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1263 * accesses.
Kojto 90:cb3d968589d8 1264 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1265 */
Kojto 90:cb3d968589d8 1266 /*@{*/
Kojto 90:cb3d968589d8 1267 #define BP_AIPS_PACRA_SP1 (26U) /*!< Bit position for AIPS_PACRA_SP1. */
Kojto 90:cb3d968589d8 1268 #define BM_AIPS_PACRA_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRA_SP1. */
Kojto 90:cb3d968589d8 1269 #define BS_AIPS_PACRA_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP1. */
Kojto 90:cb3d968589d8 1270
Kojto 90:cb3d968589d8 1271 /*! @brief Read current value of the AIPS_PACRA_SP1 field. */
Kojto 90:cb3d968589d8 1272 #define BR_AIPS_PACRA_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP1))
Kojto 90:cb3d968589d8 1273
Kojto 90:cb3d968589d8 1274 /*! @brief Format value for bitfield AIPS_PACRA_SP1. */
Kojto 90:cb3d968589d8 1275 #define BF_AIPS_PACRA_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP1) & BM_AIPS_PACRA_SP1)
Kojto 90:cb3d968589d8 1276
Kojto 90:cb3d968589d8 1277 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 1278 #define BW_AIPS_PACRA_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP1) = (v))
Kojto 90:cb3d968589d8 1279 /*@}*/
Kojto 90:cb3d968589d8 1280
Kojto 90:cb3d968589d8 1281 /*!
Kojto 90:cb3d968589d8 1282 * @name Register AIPS_PACRA, field TP0[28] (RW)
Kojto 90:cb3d968589d8 1283 *
Kojto 90:cb3d968589d8 1284 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1285 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1286 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1287 *
Kojto 90:cb3d968589d8 1288 * Values:
Kojto 90:cb3d968589d8 1289 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1290 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1291 */
Kojto 90:cb3d968589d8 1292 /*@{*/
Kojto 90:cb3d968589d8 1293 #define BP_AIPS_PACRA_TP0 (28U) /*!< Bit position for AIPS_PACRA_TP0. */
Kojto 90:cb3d968589d8 1294 #define BM_AIPS_PACRA_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRA_TP0. */
Kojto 90:cb3d968589d8 1295 #define BS_AIPS_PACRA_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRA_TP0. */
Kojto 90:cb3d968589d8 1296
Kojto 90:cb3d968589d8 1297 /*! @brief Read current value of the AIPS_PACRA_TP0 field. */
Kojto 90:cb3d968589d8 1298 #define BR_AIPS_PACRA_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP0))
Kojto 90:cb3d968589d8 1299
Kojto 90:cb3d968589d8 1300 /*! @brief Format value for bitfield AIPS_PACRA_TP0. */
Kojto 90:cb3d968589d8 1301 #define BF_AIPS_PACRA_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_TP0) & BM_AIPS_PACRA_TP0)
Kojto 90:cb3d968589d8 1302
Kojto 90:cb3d968589d8 1303 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 1304 #define BW_AIPS_PACRA_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP0) = (v))
Kojto 90:cb3d968589d8 1305 /*@}*/
Kojto 90:cb3d968589d8 1306
Kojto 90:cb3d968589d8 1307 /*!
Kojto 90:cb3d968589d8 1308 * @name Register AIPS_PACRA, field WP0[29] (RW)
Kojto 90:cb3d968589d8 1309 *
Kojto 90:cb3d968589d8 1310 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 1311 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 1312 * no peripheral access initiates.
Kojto 90:cb3d968589d8 1313 *
Kojto 90:cb3d968589d8 1314 * Values:
Kojto 90:cb3d968589d8 1315 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1316 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1317 */
Kojto 90:cb3d968589d8 1318 /*@{*/
Kojto 90:cb3d968589d8 1319 #define BP_AIPS_PACRA_WP0 (29U) /*!< Bit position for AIPS_PACRA_WP0. */
Kojto 90:cb3d968589d8 1320 #define BM_AIPS_PACRA_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRA_WP0. */
Kojto 90:cb3d968589d8 1321 #define BS_AIPS_PACRA_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRA_WP0. */
Kojto 90:cb3d968589d8 1322
Kojto 90:cb3d968589d8 1323 /*! @brief Read current value of the AIPS_PACRA_WP0 field. */
Kojto 90:cb3d968589d8 1324 #define BR_AIPS_PACRA_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP0))
Kojto 90:cb3d968589d8 1325
Kojto 90:cb3d968589d8 1326 /*! @brief Format value for bitfield AIPS_PACRA_WP0. */
Kojto 90:cb3d968589d8 1327 #define BF_AIPS_PACRA_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_WP0) & BM_AIPS_PACRA_WP0)
Kojto 90:cb3d968589d8 1328
Kojto 90:cb3d968589d8 1329 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 1330 #define BW_AIPS_PACRA_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP0) = (v))
Kojto 90:cb3d968589d8 1331 /*@}*/
Kojto 90:cb3d968589d8 1332
Kojto 90:cb3d968589d8 1333 /*!
Kojto 90:cb3d968589d8 1334 * @name Register AIPS_PACRA, field SP0[30] (RW)
Kojto 90:cb3d968589d8 1335 *
Kojto 90:cb3d968589d8 1336 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1337 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1338 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 1339 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 1340 * access initiates.
Kojto 90:cb3d968589d8 1341 *
Kojto 90:cb3d968589d8 1342 * Values:
Kojto 90:cb3d968589d8 1343 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1344 * accesses.
Kojto 90:cb3d968589d8 1345 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1346 */
Kojto 90:cb3d968589d8 1347 /*@{*/
Kojto 90:cb3d968589d8 1348 #define BP_AIPS_PACRA_SP0 (30U) /*!< Bit position for AIPS_PACRA_SP0. */
Kojto 90:cb3d968589d8 1349 #define BM_AIPS_PACRA_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRA_SP0. */
Kojto 90:cb3d968589d8 1350 #define BS_AIPS_PACRA_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRA_SP0. */
Kojto 90:cb3d968589d8 1351
Kojto 90:cb3d968589d8 1352 /*! @brief Read current value of the AIPS_PACRA_SP0 field. */
Kojto 90:cb3d968589d8 1353 #define BR_AIPS_PACRA_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP0))
Kojto 90:cb3d968589d8 1354
Kojto 90:cb3d968589d8 1355 /*! @brief Format value for bitfield AIPS_PACRA_SP0. */
Kojto 90:cb3d968589d8 1356 #define BF_AIPS_PACRA_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRA_SP0) & BM_AIPS_PACRA_SP0)
Kojto 90:cb3d968589d8 1357
Kojto 90:cb3d968589d8 1358 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 1359 #define BW_AIPS_PACRA_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP0) = (v))
Kojto 90:cb3d968589d8 1360 /*@}*/
Kojto 90:cb3d968589d8 1361
Kojto 90:cb3d968589d8 1362 /*******************************************************************************
Kojto 90:cb3d968589d8 1363 * HW_AIPS_PACRB - Peripheral Access Control Register
Kojto 90:cb3d968589d8 1364 ******************************************************************************/
Kojto 90:cb3d968589d8 1365
Kojto 90:cb3d968589d8 1366 /*!
Kojto 90:cb3d968589d8 1367 * @brief HW_AIPS_PACRB - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 1368 *
Kojto 90:cb3d968589d8 1369 * Reset value: 0x44004400U
Kojto 90:cb3d968589d8 1370 *
Kojto 90:cb3d968589d8 1371 * Each PACR register consists of eight 4-bit PACR fields. Each PACR field
Kojto 90:cb3d968589d8 1372 * defines the access levels for a particular peripheral. The mapping between a
Kojto 90:cb3d968589d8 1373 * peripheral and its PACR field is shown in the table below. The peripheral assignment
Kojto 90:cb3d968589d8 1374 * to each PACR is defined by the memory map slot that the peripheral is
Kojto 90:cb3d968589d8 1375 * assigned to. See this chip's memory map for the assignment of a particular
Kojto 90:cb3d968589d8 1376 * peripheral. The following table shows the location of each peripheral slot's PACR field
Kojto 90:cb3d968589d8 1377 * in the PACR registers. Offset Register [31:28] [27:24] [23:20] [19:16] [15:12]
Kojto 90:cb3d968589d8 1378 * [11:8] [7:4] [3:0] 0x20 PACRA PACR0 PACR1 PACR2 PACR3 PACR4 PACR5 PACR6 PACR7
Kojto 90:cb3d968589d8 1379 * 0x24 PACRB PACR8 PACR9 PACR10 PACR11 PACR12 PACR13 PACR14 PACR15 0x28 PACRC
Kojto 90:cb3d968589d8 1380 * PACR16 PACR17 PACR18 PACR19 PACR20 PACR21 PACR22 PACR23 0x2C PACRD PACR24
Kojto 90:cb3d968589d8 1381 * PACR25 PACR26 PACR27 PACR28 PACR29 PACR30 PACR31 0x30 Reserved 0x34 Reserved 0x38
Kojto 90:cb3d968589d8 1382 * Reserved 0x3C Reserved 0x40 PACRE PACR32 PACR33 PACR34 PACR35 PACR36 PACR37
Kojto 90:cb3d968589d8 1383 * PACR38 PACR39 0x44 PACRF PACR40 PACR41 PACR42 PACR43 PACR44 PACR45 PACR46 PACR47
Kojto 90:cb3d968589d8 1384 * 0x48 PACRG PACR48 PACR49 PACR50 PACR51 PACR52 PACR53 PACR54 PACR55 0x4C PACRH
Kojto 90:cb3d968589d8 1385 * PACR56 PACR57 PACR58 PACR59 PACR60 PACR61 PACR62 PACR63 0x50 PACRI PACR64
Kojto 90:cb3d968589d8 1386 * PACR65 PACR66 PACR67 PACR68 PACR69 PACR70 PACR71 0x54 PACRJ PACR72 PACR73 PACR74
Kojto 90:cb3d968589d8 1387 * PACR75 PACR76 PACR77 PACR78 PACR79 0x58 PACRK PACR80 PACR81 PACR82 PACR83
Kojto 90:cb3d968589d8 1388 * PACR84 PACR85 PACR86 PACR87 0x5C PACRL PACR88 PACR89 PACR90 PACR91 PACR92 PACR93
Kojto 90:cb3d968589d8 1389 * PACR94 PACR95 0x60 PACRM PACR96 PACR97 PACR98 PACR99 PACR100 PACR101 PACR102
Kojto 90:cb3d968589d8 1390 * PACR103 0x64 PACRN PACR104 PACR105 PACR106 PACR107 PACR108 PACR109 PACR110
Kojto 90:cb3d968589d8 1391 * PACR111 0x68 PACRO PACR112 PACR113 PACR114 PACR115 PACR116 PACR117 PACR118 PACR119
Kojto 90:cb3d968589d8 1392 * 0x6C PACRP PACR120 PACR121 PACR122 PACR123 PACR124 PACR125 PACR126 PACR127 0x80
Kojto 90:cb3d968589d8 1393 * PACRU PACR GBL0 PACR GBL1 Reserved The register field descriptions for PACR
Kojto 90:cb3d968589d8 1394 * A-D, which control peripheral slots 0-31, are shown below. The following
Kojto 90:cb3d968589d8 1395 * section, PACRPeripheral Access Control Register , shows the register field
Kojto 90:cb3d968589d8 1396 * descriptions for PACR E-P. All PACR registers are identical. They are divided into two
Kojto 90:cb3d968589d8 1397 * sections because they occupy two non-contiguous address spaces.
Kojto 90:cb3d968589d8 1398 */
Kojto 90:cb3d968589d8 1399 typedef union _hw_aips_pacrb
Kojto 90:cb3d968589d8 1400 {
Kojto 90:cb3d968589d8 1401 uint32_t U;
Kojto 90:cb3d968589d8 1402 struct _hw_aips_pacrb_bitfields
Kojto 90:cb3d968589d8 1403 {
Kojto 90:cb3d968589d8 1404 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 1405 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 1406 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 1407 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 1408 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 1409 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 1410 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 1411 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 1412 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 1413 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 1414 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 1415 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 1416 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 1417 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 1418 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 1419 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 1420 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 1421 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 1422 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 1423 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 1424 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 1425 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 1426 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 1427 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 1428 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 1429 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 1430 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 1431 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 1432 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 1433 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 1434 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 1435 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 1436 } B;
Kojto 90:cb3d968589d8 1437 } hw_aips_pacrb_t;
Kojto 90:cb3d968589d8 1438
Kojto 90:cb3d968589d8 1439 /*!
Kojto 90:cb3d968589d8 1440 * @name Constants and macros for entire AIPS_PACRB register
Kojto 90:cb3d968589d8 1441 */
Kojto 90:cb3d968589d8 1442 /*@{*/
Kojto 90:cb3d968589d8 1443 #define HW_AIPS_PACRB_ADDR(x) ((x) + 0x24U)
Kojto 90:cb3d968589d8 1444
Kojto 90:cb3d968589d8 1445 #define HW_AIPS_PACRB(x) (*(__IO hw_aips_pacrb_t *) HW_AIPS_PACRB_ADDR(x))
Kojto 90:cb3d968589d8 1446 #define HW_AIPS_PACRB_RD(x) (HW_AIPS_PACRB(x).U)
Kojto 90:cb3d968589d8 1447 #define HW_AIPS_PACRB_WR(x, v) (HW_AIPS_PACRB(x).U = (v))
Kojto 90:cb3d968589d8 1448 #define HW_AIPS_PACRB_SET(x, v) (HW_AIPS_PACRB_WR(x, HW_AIPS_PACRB_RD(x) | (v)))
Kojto 90:cb3d968589d8 1449 #define HW_AIPS_PACRB_CLR(x, v) (HW_AIPS_PACRB_WR(x, HW_AIPS_PACRB_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 1450 #define HW_AIPS_PACRB_TOG(x, v) (HW_AIPS_PACRB_WR(x, HW_AIPS_PACRB_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 1451 /*@}*/
Kojto 90:cb3d968589d8 1452
Kojto 90:cb3d968589d8 1453 /*
Kojto 90:cb3d968589d8 1454 * Constants & macros for individual AIPS_PACRB bitfields
Kojto 90:cb3d968589d8 1455 */
Kojto 90:cb3d968589d8 1456
Kojto 90:cb3d968589d8 1457 /*!
Kojto 90:cb3d968589d8 1458 * @name Register AIPS_PACRB, field TP7[0] (RW)
Kojto 90:cb3d968589d8 1459 *
Kojto 90:cb3d968589d8 1460 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1461 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1462 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1463 *
Kojto 90:cb3d968589d8 1464 * Values:
Kojto 90:cb3d968589d8 1465 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1466 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1467 */
Kojto 90:cb3d968589d8 1468 /*@{*/
Kojto 90:cb3d968589d8 1469 #define BP_AIPS_PACRB_TP7 (0U) /*!< Bit position for AIPS_PACRB_TP7. */
Kojto 90:cb3d968589d8 1470 #define BM_AIPS_PACRB_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRB_TP7. */
Kojto 90:cb3d968589d8 1471 #define BS_AIPS_PACRB_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP7. */
Kojto 90:cb3d968589d8 1472
Kojto 90:cb3d968589d8 1473 /*! @brief Read current value of the AIPS_PACRB_TP7 field. */
Kojto 90:cb3d968589d8 1474 #define BR_AIPS_PACRB_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP7))
Kojto 90:cb3d968589d8 1475
Kojto 90:cb3d968589d8 1476 /*! @brief Format value for bitfield AIPS_PACRB_TP7. */
Kojto 90:cb3d968589d8 1477 #define BF_AIPS_PACRB_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP7) & BM_AIPS_PACRB_TP7)
Kojto 90:cb3d968589d8 1478
Kojto 90:cb3d968589d8 1479 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 1480 #define BW_AIPS_PACRB_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP7) = (v))
Kojto 90:cb3d968589d8 1481 /*@}*/
Kojto 90:cb3d968589d8 1482
Kojto 90:cb3d968589d8 1483 /*!
Kojto 90:cb3d968589d8 1484 * @name Register AIPS_PACRB, field WP7[1] (RW)
Kojto 90:cb3d968589d8 1485 *
Kojto 90:cb3d968589d8 1486 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 1487 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 1488 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 1489 *
Kojto 90:cb3d968589d8 1490 * Values:
Kojto 90:cb3d968589d8 1491 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1492 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1493 */
Kojto 90:cb3d968589d8 1494 /*@{*/
Kojto 90:cb3d968589d8 1495 #define BP_AIPS_PACRB_WP7 (1U) /*!< Bit position for AIPS_PACRB_WP7. */
Kojto 90:cb3d968589d8 1496 #define BM_AIPS_PACRB_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRB_WP7. */
Kojto 90:cb3d968589d8 1497 #define BS_AIPS_PACRB_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP7. */
Kojto 90:cb3d968589d8 1498
Kojto 90:cb3d968589d8 1499 /*! @brief Read current value of the AIPS_PACRB_WP7 field. */
Kojto 90:cb3d968589d8 1500 #define BR_AIPS_PACRB_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP7))
Kojto 90:cb3d968589d8 1501
Kojto 90:cb3d968589d8 1502 /*! @brief Format value for bitfield AIPS_PACRB_WP7. */
Kojto 90:cb3d968589d8 1503 #define BF_AIPS_PACRB_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP7) & BM_AIPS_PACRB_WP7)
Kojto 90:cb3d968589d8 1504
Kojto 90:cb3d968589d8 1505 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 1506 #define BW_AIPS_PACRB_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP7) = (v))
Kojto 90:cb3d968589d8 1507 /*@}*/
Kojto 90:cb3d968589d8 1508
Kojto 90:cb3d968589d8 1509 /*!
Kojto 90:cb3d968589d8 1510 * @name Register AIPS_PACRB, field SP7[2] (RW)
Kojto 90:cb3d968589d8 1511 *
Kojto 90:cb3d968589d8 1512 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1513 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1514 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 1515 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 1516 * access initiates.
Kojto 90:cb3d968589d8 1517 *
Kojto 90:cb3d968589d8 1518 * Values:
Kojto 90:cb3d968589d8 1519 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1520 * accesses.
Kojto 90:cb3d968589d8 1521 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1522 */
Kojto 90:cb3d968589d8 1523 /*@{*/
Kojto 90:cb3d968589d8 1524 #define BP_AIPS_PACRB_SP7 (2U) /*!< Bit position for AIPS_PACRB_SP7. */
Kojto 90:cb3d968589d8 1525 #define BM_AIPS_PACRB_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRB_SP7. */
Kojto 90:cb3d968589d8 1526 #define BS_AIPS_PACRB_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP7. */
Kojto 90:cb3d968589d8 1527
Kojto 90:cb3d968589d8 1528 /*! @brief Read current value of the AIPS_PACRB_SP7 field. */
Kojto 90:cb3d968589d8 1529 #define BR_AIPS_PACRB_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP7))
Kojto 90:cb3d968589d8 1530
Kojto 90:cb3d968589d8 1531 /*! @brief Format value for bitfield AIPS_PACRB_SP7. */
Kojto 90:cb3d968589d8 1532 #define BF_AIPS_PACRB_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP7) & BM_AIPS_PACRB_SP7)
Kojto 90:cb3d968589d8 1533
Kojto 90:cb3d968589d8 1534 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 1535 #define BW_AIPS_PACRB_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP7) = (v))
Kojto 90:cb3d968589d8 1536 /*@}*/
Kojto 90:cb3d968589d8 1537
Kojto 90:cb3d968589d8 1538 /*!
Kojto 90:cb3d968589d8 1539 * @name Register AIPS_PACRB, field TP6[4] (RW)
Kojto 90:cb3d968589d8 1540 *
Kojto 90:cb3d968589d8 1541 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1542 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1543 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1544 *
Kojto 90:cb3d968589d8 1545 * Values:
Kojto 90:cb3d968589d8 1546 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1547 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1548 */
Kojto 90:cb3d968589d8 1549 /*@{*/
Kojto 90:cb3d968589d8 1550 #define BP_AIPS_PACRB_TP6 (4U) /*!< Bit position for AIPS_PACRB_TP6. */
Kojto 90:cb3d968589d8 1551 #define BM_AIPS_PACRB_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRB_TP6. */
Kojto 90:cb3d968589d8 1552 #define BS_AIPS_PACRB_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP6. */
Kojto 90:cb3d968589d8 1553
Kojto 90:cb3d968589d8 1554 /*! @brief Read current value of the AIPS_PACRB_TP6 field. */
Kojto 90:cb3d968589d8 1555 #define BR_AIPS_PACRB_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP6))
Kojto 90:cb3d968589d8 1556
Kojto 90:cb3d968589d8 1557 /*! @brief Format value for bitfield AIPS_PACRB_TP6. */
Kojto 90:cb3d968589d8 1558 #define BF_AIPS_PACRB_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP6) & BM_AIPS_PACRB_TP6)
Kojto 90:cb3d968589d8 1559
Kojto 90:cb3d968589d8 1560 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 1561 #define BW_AIPS_PACRB_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP6) = (v))
Kojto 90:cb3d968589d8 1562 /*@}*/
Kojto 90:cb3d968589d8 1563
Kojto 90:cb3d968589d8 1564 /*!
Kojto 90:cb3d968589d8 1565 * @name Register AIPS_PACRB, field WP6[5] (RW)
Kojto 90:cb3d968589d8 1566 *
Kojto 90:cb3d968589d8 1567 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 1568 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 1569 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 1570 *
Kojto 90:cb3d968589d8 1571 * Values:
Kojto 90:cb3d968589d8 1572 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1573 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1574 */
Kojto 90:cb3d968589d8 1575 /*@{*/
Kojto 90:cb3d968589d8 1576 #define BP_AIPS_PACRB_WP6 (5U) /*!< Bit position for AIPS_PACRB_WP6. */
Kojto 90:cb3d968589d8 1577 #define BM_AIPS_PACRB_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRB_WP6. */
Kojto 90:cb3d968589d8 1578 #define BS_AIPS_PACRB_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP6. */
Kojto 90:cb3d968589d8 1579
Kojto 90:cb3d968589d8 1580 /*! @brief Read current value of the AIPS_PACRB_WP6 field. */
Kojto 90:cb3d968589d8 1581 #define BR_AIPS_PACRB_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP6))
Kojto 90:cb3d968589d8 1582
Kojto 90:cb3d968589d8 1583 /*! @brief Format value for bitfield AIPS_PACRB_WP6. */
Kojto 90:cb3d968589d8 1584 #define BF_AIPS_PACRB_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP6) & BM_AIPS_PACRB_WP6)
Kojto 90:cb3d968589d8 1585
Kojto 90:cb3d968589d8 1586 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 1587 #define BW_AIPS_PACRB_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP6) = (v))
Kojto 90:cb3d968589d8 1588 /*@}*/
Kojto 90:cb3d968589d8 1589
Kojto 90:cb3d968589d8 1590 /*!
Kojto 90:cb3d968589d8 1591 * @name Register AIPS_PACRB, field SP6[6] (RW)
Kojto 90:cb3d968589d8 1592 *
Kojto 90:cb3d968589d8 1593 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1594 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1595 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 1596 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 1597 * access initiates.
Kojto 90:cb3d968589d8 1598 *
Kojto 90:cb3d968589d8 1599 * Values:
Kojto 90:cb3d968589d8 1600 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1601 * accesses.
Kojto 90:cb3d968589d8 1602 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1603 */
Kojto 90:cb3d968589d8 1604 /*@{*/
Kojto 90:cb3d968589d8 1605 #define BP_AIPS_PACRB_SP6 (6U) /*!< Bit position for AIPS_PACRB_SP6. */
Kojto 90:cb3d968589d8 1606 #define BM_AIPS_PACRB_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRB_SP6. */
Kojto 90:cb3d968589d8 1607 #define BS_AIPS_PACRB_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP6. */
Kojto 90:cb3d968589d8 1608
Kojto 90:cb3d968589d8 1609 /*! @brief Read current value of the AIPS_PACRB_SP6 field. */
Kojto 90:cb3d968589d8 1610 #define BR_AIPS_PACRB_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP6))
Kojto 90:cb3d968589d8 1611
Kojto 90:cb3d968589d8 1612 /*! @brief Format value for bitfield AIPS_PACRB_SP6. */
Kojto 90:cb3d968589d8 1613 #define BF_AIPS_PACRB_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP6) & BM_AIPS_PACRB_SP6)
Kojto 90:cb3d968589d8 1614
Kojto 90:cb3d968589d8 1615 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 1616 #define BW_AIPS_PACRB_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP6) = (v))
Kojto 90:cb3d968589d8 1617 /*@}*/
Kojto 90:cb3d968589d8 1618
Kojto 90:cb3d968589d8 1619 /*!
Kojto 90:cb3d968589d8 1620 * @name Register AIPS_PACRB, field TP5[8] (RW)
Kojto 90:cb3d968589d8 1621 *
Kojto 90:cb3d968589d8 1622 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1623 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1624 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1625 *
Kojto 90:cb3d968589d8 1626 * Values:
Kojto 90:cb3d968589d8 1627 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1628 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1629 */
Kojto 90:cb3d968589d8 1630 /*@{*/
Kojto 90:cb3d968589d8 1631 #define BP_AIPS_PACRB_TP5 (8U) /*!< Bit position for AIPS_PACRB_TP5. */
Kojto 90:cb3d968589d8 1632 #define BM_AIPS_PACRB_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRB_TP5. */
Kojto 90:cb3d968589d8 1633 #define BS_AIPS_PACRB_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP5. */
Kojto 90:cb3d968589d8 1634
Kojto 90:cb3d968589d8 1635 /*! @brief Read current value of the AIPS_PACRB_TP5 field. */
Kojto 90:cb3d968589d8 1636 #define BR_AIPS_PACRB_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP5))
Kojto 90:cb3d968589d8 1637
Kojto 90:cb3d968589d8 1638 /*! @brief Format value for bitfield AIPS_PACRB_TP5. */
Kojto 90:cb3d968589d8 1639 #define BF_AIPS_PACRB_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP5) & BM_AIPS_PACRB_TP5)
Kojto 90:cb3d968589d8 1640
Kojto 90:cb3d968589d8 1641 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 1642 #define BW_AIPS_PACRB_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP5) = (v))
Kojto 90:cb3d968589d8 1643 /*@}*/
Kojto 90:cb3d968589d8 1644
Kojto 90:cb3d968589d8 1645 /*!
Kojto 90:cb3d968589d8 1646 * @name Register AIPS_PACRB, field WP5[9] (RW)
Kojto 90:cb3d968589d8 1647 *
Kojto 90:cb3d968589d8 1648 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 1649 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 1650 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 1651 *
Kojto 90:cb3d968589d8 1652 * Values:
Kojto 90:cb3d968589d8 1653 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1654 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1655 */
Kojto 90:cb3d968589d8 1656 /*@{*/
Kojto 90:cb3d968589d8 1657 #define BP_AIPS_PACRB_WP5 (9U) /*!< Bit position for AIPS_PACRB_WP5. */
Kojto 90:cb3d968589d8 1658 #define BM_AIPS_PACRB_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRB_WP5. */
Kojto 90:cb3d968589d8 1659 #define BS_AIPS_PACRB_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP5. */
Kojto 90:cb3d968589d8 1660
Kojto 90:cb3d968589d8 1661 /*! @brief Read current value of the AIPS_PACRB_WP5 field. */
Kojto 90:cb3d968589d8 1662 #define BR_AIPS_PACRB_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP5))
Kojto 90:cb3d968589d8 1663
Kojto 90:cb3d968589d8 1664 /*! @brief Format value for bitfield AIPS_PACRB_WP5. */
Kojto 90:cb3d968589d8 1665 #define BF_AIPS_PACRB_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP5) & BM_AIPS_PACRB_WP5)
Kojto 90:cb3d968589d8 1666
Kojto 90:cb3d968589d8 1667 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 1668 #define BW_AIPS_PACRB_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP5) = (v))
Kojto 90:cb3d968589d8 1669 /*@}*/
Kojto 90:cb3d968589d8 1670
Kojto 90:cb3d968589d8 1671 /*!
Kojto 90:cb3d968589d8 1672 * @name Register AIPS_PACRB, field SP5[10] (RW)
Kojto 90:cb3d968589d8 1673 *
Kojto 90:cb3d968589d8 1674 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1675 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1676 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 1677 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 1678 * access initiates.
Kojto 90:cb3d968589d8 1679 *
Kojto 90:cb3d968589d8 1680 * Values:
Kojto 90:cb3d968589d8 1681 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1682 * accesses.
Kojto 90:cb3d968589d8 1683 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1684 */
Kojto 90:cb3d968589d8 1685 /*@{*/
Kojto 90:cb3d968589d8 1686 #define BP_AIPS_PACRB_SP5 (10U) /*!< Bit position for AIPS_PACRB_SP5. */
Kojto 90:cb3d968589d8 1687 #define BM_AIPS_PACRB_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRB_SP5. */
Kojto 90:cb3d968589d8 1688 #define BS_AIPS_PACRB_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP5. */
Kojto 90:cb3d968589d8 1689
Kojto 90:cb3d968589d8 1690 /*! @brief Read current value of the AIPS_PACRB_SP5 field. */
Kojto 90:cb3d968589d8 1691 #define BR_AIPS_PACRB_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP5))
Kojto 90:cb3d968589d8 1692
Kojto 90:cb3d968589d8 1693 /*! @brief Format value for bitfield AIPS_PACRB_SP5. */
Kojto 90:cb3d968589d8 1694 #define BF_AIPS_PACRB_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP5) & BM_AIPS_PACRB_SP5)
Kojto 90:cb3d968589d8 1695
Kojto 90:cb3d968589d8 1696 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 1697 #define BW_AIPS_PACRB_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP5) = (v))
Kojto 90:cb3d968589d8 1698 /*@}*/
Kojto 90:cb3d968589d8 1699
Kojto 90:cb3d968589d8 1700 /*!
Kojto 90:cb3d968589d8 1701 * @name Register AIPS_PACRB, field TP4[12] (RW)
Kojto 90:cb3d968589d8 1702 *
Kojto 90:cb3d968589d8 1703 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1704 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1705 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1706 *
Kojto 90:cb3d968589d8 1707 * Values:
Kojto 90:cb3d968589d8 1708 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1709 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1710 */
Kojto 90:cb3d968589d8 1711 /*@{*/
Kojto 90:cb3d968589d8 1712 #define BP_AIPS_PACRB_TP4 (12U) /*!< Bit position for AIPS_PACRB_TP4. */
Kojto 90:cb3d968589d8 1713 #define BM_AIPS_PACRB_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRB_TP4. */
Kojto 90:cb3d968589d8 1714 #define BS_AIPS_PACRB_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP4. */
Kojto 90:cb3d968589d8 1715
Kojto 90:cb3d968589d8 1716 /*! @brief Read current value of the AIPS_PACRB_TP4 field. */
Kojto 90:cb3d968589d8 1717 #define BR_AIPS_PACRB_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP4))
Kojto 90:cb3d968589d8 1718
Kojto 90:cb3d968589d8 1719 /*! @brief Format value for bitfield AIPS_PACRB_TP4. */
Kojto 90:cb3d968589d8 1720 #define BF_AIPS_PACRB_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP4) & BM_AIPS_PACRB_TP4)
Kojto 90:cb3d968589d8 1721
Kojto 90:cb3d968589d8 1722 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 1723 #define BW_AIPS_PACRB_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP4) = (v))
Kojto 90:cb3d968589d8 1724 /*@}*/
Kojto 90:cb3d968589d8 1725
Kojto 90:cb3d968589d8 1726 /*!
Kojto 90:cb3d968589d8 1727 * @name Register AIPS_PACRB, field WP4[13] (RW)
Kojto 90:cb3d968589d8 1728 *
Kojto 90:cb3d968589d8 1729 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 1730 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 1731 * no peripheral access initiates.
Kojto 90:cb3d968589d8 1732 *
Kojto 90:cb3d968589d8 1733 * Values:
Kojto 90:cb3d968589d8 1734 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1735 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1736 */
Kojto 90:cb3d968589d8 1737 /*@{*/
Kojto 90:cb3d968589d8 1738 #define BP_AIPS_PACRB_WP4 (13U) /*!< Bit position for AIPS_PACRB_WP4. */
Kojto 90:cb3d968589d8 1739 #define BM_AIPS_PACRB_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRB_WP4. */
Kojto 90:cb3d968589d8 1740 #define BS_AIPS_PACRB_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP4. */
Kojto 90:cb3d968589d8 1741
Kojto 90:cb3d968589d8 1742 /*! @brief Read current value of the AIPS_PACRB_WP4 field. */
Kojto 90:cb3d968589d8 1743 #define BR_AIPS_PACRB_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP4))
Kojto 90:cb3d968589d8 1744
Kojto 90:cb3d968589d8 1745 /*! @brief Format value for bitfield AIPS_PACRB_WP4. */
Kojto 90:cb3d968589d8 1746 #define BF_AIPS_PACRB_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP4) & BM_AIPS_PACRB_WP4)
Kojto 90:cb3d968589d8 1747
Kojto 90:cb3d968589d8 1748 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 1749 #define BW_AIPS_PACRB_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP4) = (v))
Kojto 90:cb3d968589d8 1750 /*@}*/
Kojto 90:cb3d968589d8 1751
Kojto 90:cb3d968589d8 1752 /*!
Kojto 90:cb3d968589d8 1753 * @name Register AIPS_PACRB, field SP4[14] (RW)
Kojto 90:cb3d968589d8 1754 *
Kojto 90:cb3d968589d8 1755 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1756 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1757 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 1758 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 1759 * access initiates.
Kojto 90:cb3d968589d8 1760 *
Kojto 90:cb3d968589d8 1761 * Values:
Kojto 90:cb3d968589d8 1762 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1763 * accesses.
Kojto 90:cb3d968589d8 1764 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1765 */
Kojto 90:cb3d968589d8 1766 /*@{*/
Kojto 90:cb3d968589d8 1767 #define BP_AIPS_PACRB_SP4 (14U) /*!< Bit position for AIPS_PACRB_SP4. */
Kojto 90:cb3d968589d8 1768 #define BM_AIPS_PACRB_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRB_SP4. */
Kojto 90:cb3d968589d8 1769 #define BS_AIPS_PACRB_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP4. */
Kojto 90:cb3d968589d8 1770
Kojto 90:cb3d968589d8 1771 /*! @brief Read current value of the AIPS_PACRB_SP4 field. */
Kojto 90:cb3d968589d8 1772 #define BR_AIPS_PACRB_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP4))
Kojto 90:cb3d968589d8 1773
Kojto 90:cb3d968589d8 1774 /*! @brief Format value for bitfield AIPS_PACRB_SP4. */
Kojto 90:cb3d968589d8 1775 #define BF_AIPS_PACRB_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP4) & BM_AIPS_PACRB_SP4)
Kojto 90:cb3d968589d8 1776
Kojto 90:cb3d968589d8 1777 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 1778 #define BW_AIPS_PACRB_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP4) = (v))
Kojto 90:cb3d968589d8 1779 /*@}*/
Kojto 90:cb3d968589d8 1780
Kojto 90:cb3d968589d8 1781 /*!
Kojto 90:cb3d968589d8 1782 * @name Register AIPS_PACRB, field TP3[16] (RW)
Kojto 90:cb3d968589d8 1783 *
Kojto 90:cb3d968589d8 1784 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1785 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1786 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1787 *
Kojto 90:cb3d968589d8 1788 * Values:
Kojto 90:cb3d968589d8 1789 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1790 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1791 */
Kojto 90:cb3d968589d8 1792 /*@{*/
Kojto 90:cb3d968589d8 1793 #define BP_AIPS_PACRB_TP3 (16U) /*!< Bit position for AIPS_PACRB_TP3. */
Kojto 90:cb3d968589d8 1794 #define BM_AIPS_PACRB_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRB_TP3. */
Kojto 90:cb3d968589d8 1795 #define BS_AIPS_PACRB_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP3. */
Kojto 90:cb3d968589d8 1796
Kojto 90:cb3d968589d8 1797 /*! @brief Read current value of the AIPS_PACRB_TP3 field. */
Kojto 90:cb3d968589d8 1798 #define BR_AIPS_PACRB_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP3))
Kojto 90:cb3d968589d8 1799
Kojto 90:cb3d968589d8 1800 /*! @brief Format value for bitfield AIPS_PACRB_TP3. */
Kojto 90:cb3d968589d8 1801 #define BF_AIPS_PACRB_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP3) & BM_AIPS_PACRB_TP3)
Kojto 90:cb3d968589d8 1802
Kojto 90:cb3d968589d8 1803 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 1804 #define BW_AIPS_PACRB_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP3) = (v))
Kojto 90:cb3d968589d8 1805 /*@}*/
Kojto 90:cb3d968589d8 1806
Kojto 90:cb3d968589d8 1807 /*!
Kojto 90:cb3d968589d8 1808 * @name Register AIPS_PACRB, field WP3[17] (RW)
Kojto 90:cb3d968589d8 1809 *
Kojto 90:cb3d968589d8 1810 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 1811 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 1812 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 1813 *
Kojto 90:cb3d968589d8 1814 * Values:
Kojto 90:cb3d968589d8 1815 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1816 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1817 */
Kojto 90:cb3d968589d8 1818 /*@{*/
Kojto 90:cb3d968589d8 1819 #define BP_AIPS_PACRB_WP3 (17U) /*!< Bit position for AIPS_PACRB_WP3. */
Kojto 90:cb3d968589d8 1820 #define BM_AIPS_PACRB_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRB_WP3. */
Kojto 90:cb3d968589d8 1821 #define BS_AIPS_PACRB_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP3. */
Kojto 90:cb3d968589d8 1822
Kojto 90:cb3d968589d8 1823 /*! @brief Read current value of the AIPS_PACRB_WP3 field. */
Kojto 90:cb3d968589d8 1824 #define BR_AIPS_PACRB_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP3))
Kojto 90:cb3d968589d8 1825
Kojto 90:cb3d968589d8 1826 /*! @brief Format value for bitfield AIPS_PACRB_WP3. */
Kojto 90:cb3d968589d8 1827 #define BF_AIPS_PACRB_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP3) & BM_AIPS_PACRB_WP3)
Kojto 90:cb3d968589d8 1828
Kojto 90:cb3d968589d8 1829 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 1830 #define BW_AIPS_PACRB_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP3) = (v))
Kojto 90:cb3d968589d8 1831 /*@}*/
Kojto 90:cb3d968589d8 1832
Kojto 90:cb3d968589d8 1833 /*!
Kojto 90:cb3d968589d8 1834 * @name Register AIPS_PACRB, field SP3[18] (RW)
Kojto 90:cb3d968589d8 1835 *
Kojto 90:cb3d968589d8 1836 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1837 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1838 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 1839 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 1840 * initiates.
Kojto 90:cb3d968589d8 1841 *
Kojto 90:cb3d968589d8 1842 * Values:
Kojto 90:cb3d968589d8 1843 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1844 * accesses.
Kojto 90:cb3d968589d8 1845 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1846 */
Kojto 90:cb3d968589d8 1847 /*@{*/
Kojto 90:cb3d968589d8 1848 #define BP_AIPS_PACRB_SP3 (18U) /*!< Bit position for AIPS_PACRB_SP3. */
Kojto 90:cb3d968589d8 1849 #define BM_AIPS_PACRB_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRB_SP3. */
Kojto 90:cb3d968589d8 1850 #define BS_AIPS_PACRB_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP3. */
Kojto 90:cb3d968589d8 1851
Kojto 90:cb3d968589d8 1852 /*! @brief Read current value of the AIPS_PACRB_SP3 field. */
Kojto 90:cb3d968589d8 1853 #define BR_AIPS_PACRB_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP3))
Kojto 90:cb3d968589d8 1854
Kojto 90:cb3d968589d8 1855 /*! @brief Format value for bitfield AIPS_PACRB_SP3. */
Kojto 90:cb3d968589d8 1856 #define BF_AIPS_PACRB_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP3) & BM_AIPS_PACRB_SP3)
Kojto 90:cb3d968589d8 1857
Kojto 90:cb3d968589d8 1858 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 1859 #define BW_AIPS_PACRB_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP3) = (v))
Kojto 90:cb3d968589d8 1860 /*@}*/
Kojto 90:cb3d968589d8 1861
Kojto 90:cb3d968589d8 1862 /*!
Kojto 90:cb3d968589d8 1863 * @name Register AIPS_PACRB, field TP2[20] (RW)
Kojto 90:cb3d968589d8 1864 *
Kojto 90:cb3d968589d8 1865 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1866 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1867 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1868 *
Kojto 90:cb3d968589d8 1869 * Values:
Kojto 90:cb3d968589d8 1870 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1871 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1872 */
Kojto 90:cb3d968589d8 1873 /*@{*/
Kojto 90:cb3d968589d8 1874 #define BP_AIPS_PACRB_TP2 (20U) /*!< Bit position for AIPS_PACRB_TP2. */
Kojto 90:cb3d968589d8 1875 #define BM_AIPS_PACRB_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRB_TP2. */
Kojto 90:cb3d968589d8 1876 #define BS_AIPS_PACRB_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP2. */
Kojto 90:cb3d968589d8 1877
Kojto 90:cb3d968589d8 1878 /*! @brief Read current value of the AIPS_PACRB_TP2 field. */
Kojto 90:cb3d968589d8 1879 #define BR_AIPS_PACRB_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP2))
Kojto 90:cb3d968589d8 1880
Kojto 90:cb3d968589d8 1881 /*! @brief Format value for bitfield AIPS_PACRB_TP2. */
Kojto 90:cb3d968589d8 1882 #define BF_AIPS_PACRB_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP2) & BM_AIPS_PACRB_TP2)
Kojto 90:cb3d968589d8 1883
Kojto 90:cb3d968589d8 1884 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 1885 #define BW_AIPS_PACRB_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP2) = (v))
Kojto 90:cb3d968589d8 1886 /*@}*/
Kojto 90:cb3d968589d8 1887
Kojto 90:cb3d968589d8 1888 /*!
Kojto 90:cb3d968589d8 1889 * @name Register AIPS_PACRB, field WP2[21] (RW)
Kojto 90:cb3d968589d8 1890 *
Kojto 90:cb3d968589d8 1891 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 1892 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 1893 * no peripheral access initiates.
Kojto 90:cb3d968589d8 1894 *
Kojto 90:cb3d968589d8 1895 * Values:
Kojto 90:cb3d968589d8 1896 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1897 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1898 */
Kojto 90:cb3d968589d8 1899 /*@{*/
Kojto 90:cb3d968589d8 1900 #define BP_AIPS_PACRB_WP2 (21U) /*!< Bit position for AIPS_PACRB_WP2. */
Kojto 90:cb3d968589d8 1901 #define BM_AIPS_PACRB_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRB_WP2. */
Kojto 90:cb3d968589d8 1902 #define BS_AIPS_PACRB_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP2. */
Kojto 90:cb3d968589d8 1903
Kojto 90:cb3d968589d8 1904 /*! @brief Read current value of the AIPS_PACRB_WP2 field. */
Kojto 90:cb3d968589d8 1905 #define BR_AIPS_PACRB_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP2))
Kojto 90:cb3d968589d8 1906
Kojto 90:cb3d968589d8 1907 /*! @brief Format value for bitfield AIPS_PACRB_WP2. */
Kojto 90:cb3d968589d8 1908 #define BF_AIPS_PACRB_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP2) & BM_AIPS_PACRB_WP2)
Kojto 90:cb3d968589d8 1909
Kojto 90:cb3d968589d8 1910 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 1911 #define BW_AIPS_PACRB_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP2) = (v))
Kojto 90:cb3d968589d8 1912 /*@}*/
Kojto 90:cb3d968589d8 1913
Kojto 90:cb3d968589d8 1914 /*!
Kojto 90:cb3d968589d8 1915 * @name Register AIPS_PACRB, field SP2[22] (RW)
Kojto 90:cb3d968589d8 1916 *
Kojto 90:cb3d968589d8 1917 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1918 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 1919 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 1920 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 1921 * access initiates.
Kojto 90:cb3d968589d8 1922 *
Kojto 90:cb3d968589d8 1923 * Values:
Kojto 90:cb3d968589d8 1924 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 1925 * accesses.
Kojto 90:cb3d968589d8 1926 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 1927 */
Kojto 90:cb3d968589d8 1928 /*@{*/
Kojto 90:cb3d968589d8 1929 #define BP_AIPS_PACRB_SP2 (22U) /*!< Bit position for AIPS_PACRB_SP2. */
Kojto 90:cb3d968589d8 1930 #define BM_AIPS_PACRB_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRB_SP2. */
Kojto 90:cb3d968589d8 1931 #define BS_AIPS_PACRB_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP2. */
Kojto 90:cb3d968589d8 1932
Kojto 90:cb3d968589d8 1933 /*! @brief Read current value of the AIPS_PACRB_SP2 field. */
Kojto 90:cb3d968589d8 1934 #define BR_AIPS_PACRB_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP2))
Kojto 90:cb3d968589d8 1935
Kojto 90:cb3d968589d8 1936 /*! @brief Format value for bitfield AIPS_PACRB_SP2. */
Kojto 90:cb3d968589d8 1937 #define BF_AIPS_PACRB_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP2) & BM_AIPS_PACRB_SP2)
Kojto 90:cb3d968589d8 1938
Kojto 90:cb3d968589d8 1939 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 1940 #define BW_AIPS_PACRB_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP2) = (v))
Kojto 90:cb3d968589d8 1941 /*@}*/
Kojto 90:cb3d968589d8 1942
Kojto 90:cb3d968589d8 1943 /*!
Kojto 90:cb3d968589d8 1944 * @name Register AIPS_PACRB, field TP1[24] (RW)
Kojto 90:cb3d968589d8 1945 *
Kojto 90:cb3d968589d8 1946 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 1947 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 1948 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 1949 *
Kojto 90:cb3d968589d8 1950 * Values:
Kojto 90:cb3d968589d8 1951 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 1952 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 1953 */
Kojto 90:cb3d968589d8 1954 /*@{*/
Kojto 90:cb3d968589d8 1955 #define BP_AIPS_PACRB_TP1 (24U) /*!< Bit position for AIPS_PACRB_TP1. */
Kojto 90:cb3d968589d8 1956 #define BM_AIPS_PACRB_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRB_TP1. */
Kojto 90:cb3d968589d8 1957 #define BS_AIPS_PACRB_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP1. */
Kojto 90:cb3d968589d8 1958
Kojto 90:cb3d968589d8 1959 /*! @brief Read current value of the AIPS_PACRB_TP1 field. */
Kojto 90:cb3d968589d8 1960 #define BR_AIPS_PACRB_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP1))
Kojto 90:cb3d968589d8 1961
Kojto 90:cb3d968589d8 1962 /*! @brief Format value for bitfield AIPS_PACRB_TP1. */
Kojto 90:cb3d968589d8 1963 #define BF_AIPS_PACRB_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP1) & BM_AIPS_PACRB_TP1)
Kojto 90:cb3d968589d8 1964
Kojto 90:cb3d968589d8 1965 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 1966 #define BW_AIPS_PACRB_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP1) = (v))
Kojto 90:cb3d968589d8 1967 /*@}*/
Kojto 90:cb3d968589d8 1968
Kojto 90:cb3d968589d8 1969 /*!
Kojto 90:cb3d968589d8 1970 * @name Register AIPS_PACRB, field WP1[25] (RW)
Kojto 90:cb3d968589d8 1971 *
Kojto 90:cb3d968589d8 1972 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 1973 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 1974 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 1975 *
Kojto 90:cb3d968589d8 1976 * Values:
Kojto 90:cb3d968589d8 1977 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 1978 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 1979 */
Kojto 90:cb3d968589d8 1980 /*@{*/
Kojto 90:cb3d968589d8 1981 #define BP_AIPS_PACRB_WP1 (25U) /*!< Bit position for AIPS_PACRB_WP1. */
Kojto 90:cb3d968589d8 1982 #define BM_AIPS_PACRB_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRB_WP1. */
Kojto 90:cb3d968589d8 1983 #define BS_AIPS_PACRB_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP1. */
Kojto 90:cb3d968589d8 1984
Kojto 90:cb3d968589d8 1985 /*! @brief Read current value of the AIPS_PACRB_WP1 field. */
Kojto 90:cb3d968589d8 1986 #define BR_AIPS_PACRB_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP1))
Kojto 90:cb3d968589d8 1987
Kojto 90:cb3d968589d8 1988 /*! @brief Format value for bitfield AIPS_PACRB_WP1. */
Kojto 90:cb3d968589d8 1989 #define BF_AIPS_PACRB_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP1) & BM_AIPS_PACRB_WP1)
Kojto 90:cb3d968589d8 1990
Kojto 90:cb3d968589d8 1991 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 1992 #define BW_AIPS_PACRB_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP1) = (v))
Kojto 90:cb3d968589d8 1993 /*@}*/
Kojto 90:cb3d968589d8 1994
Kojto 90:cb3d968589d8 1995 /*!
Kojto 90:cb3d968589d8 1996 * @name Register AIPS_PACRB, field SP1[26] (RW)
Kojto 90:cb3d968589d8 1997 *
Kojto 90:cb3d968589d8 1998 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 1999 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 2000 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 2001 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 2002 * access initiates.
Kojto 90:cb3d968589d8 2003 *
Kojto 90:cb3d968589d8 2004 * Values:
Kojto 90:cb3d968589d8 2005 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 2006 * accesses.
Kojto 90:cb3d968589d8 2007 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 2008 */
Kojto 90:cb3d968589d8 2009 /*@{*/
Kojto 90:cb3d968589d8 2010 #define BP_AIPS_PACRB_SP1 (26U) /*!< Bit position for AIPS_PACRB_SP1. */
Kojto 90:cb3d968589d8 2011 #define BM_AIPS_PACRB_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRB_SP1. */
Kojto 90:cb3d968589d8 2012 #define BS_AIPS_PACRB_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP1. */
Kojto 90:cb3d968589d8 2013
Kojto 90:cb3d968589d8 2014 /*! @brief Read current value of the AIPS_PACRB_SP1 field. */
Kojto 90:cb3d968589d8 2015 #define BR_AIPS_PACRB_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP1))
Kojto 90:cb3d968589d8 2016
Kojto 90:cb3d968589d8 2017 /*! @brief Format value for bitfield AIPS_PACRB_SP1. */
Kojto 90:cb3d968589d8 2018 #define BF_AIPS_PACRB_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP1) & BM_AIPS_PACRB_SP1)
Kojto 90:cb3d968589d8 2019
Kojto 90:cb3d968589d8 2020 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 2021 #define BW_AIPS_PACRB_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP1) = (v))
Kojto 90:cb3d968589d8 2022 /*@}*/
Kojto 90:cb3d968589d8 2023
Kojto 90:cb3d968589d8 2024 /*!
Kojto 90:cb3d968589d8 2025 * @name Register AIPS_PACRB, field TP0[28] (RW)
Kojto 90:cb3d968589d8 2026 *
Kojto 90:cb3d968589d8 2027 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 2028 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 2029 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 2030 *
Kojto 90:cb3d968589d8 2031 * Values:
Kojto 90:cb3d968589d8 2032 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 2033 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 2034 */
Kojto 90:cb3d968589d8 2035 /*@{*/
Kojto 90:cb3d968589d8 2036 #define BP_AIPS_PACRB_TP0 (28U) /*!< Bit position for AIPS_PACRB_TP0. */
Kojto 90:cb3d968589d8 2037 #define BM_AIPS_PACRB_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRB_TP0. */
Kojto 90:cb3d968589d8 2038 #define BS_AIPS_PACRB_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRB_TP0. */
Kojto 90:cb3d968589d8 2039
Kojto 90:cb3d968589d8 2040 /*! @brief Read current value of the AIPS_PACRB_TP0 field. */
Kojto 90:cb3d968589d8 2041 #define BR_AIPS_PACRB_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP0))
Kojto 90:cb3d968589d8 2042
Kojto 90:cb3d968589d8 2043 /*! @brief Format value for bitfield AIPS_PACRB_TP0. */
Kojto 90:cb3d968589d8 2044 #define BF_AIPS_PACRB_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_TP0) & BM_AIPS_PACRB_TP0)
Kojto 90:cb3d968589d8 2045
Kojto 90:cb3d968589d8 2046 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 2047 #define BW_AIPS_PACRB_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP0) = (v))
Kojto 90:cb3d968589d8 2048 /*@}*/
Kojto 90:cb3d968589d8 2049
Kojto 90:cb3d968589d8 2050 /*!
Kojto 90:cb3d968589d8 2051 * @name Register AIPS_PACRB, field WP0[29] (RW)
Kojto 90:cb3d968589d8 2052 *
Kojto 90:cb3d968589d8 2053 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 2054 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 2055 * no peripheral access initiates.
Kojto 90:cb3d968589d8 2056 *
Kojto 90:cb3d968589d8 2057 * Values:
Kojto 90:cb3d968589d8 2058 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 2059 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 2060 */
Kojto 90:cb3d968589d8 2061 /*@{*/
Kojto 90:cb3d968589d8 2062 #define BP_AIPS_PACRB_WP0 (29U) /*!< Bit position for AIPS_PACRB_WP0. */
Kojto 90:cb3d968589d8 2063 #define BM_AIPS_PACRB_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRB_WP0. */
Kojto 90:cb3d968589d8 2064 #define BS_AIPS_PACRB_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRB_WP0. */
Kojto 90:cb3d968589d8 2065
Kojto 90:cb3d968589d8 2066 /*! @brief Read current value of the AIPS_PACRB_WP0 field. */
Kojto 90:cb3d968589d8 2067 #define BR_AIPS_PACRB_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP0))
Kojto 90:cb3d968589d8 2068
Kojto 90:cb3d968589d8 2069 /*! @brief Format value for bitfield AIPS_PACRB_WP0. */
Kojto 90:cb3d968589d8 2070 #define BF_AIPS_PACRB_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_WP0) & BM_AIPS_PACRB_WP0)
Kojto 90:cb3d968589d8 2071
Kojto 90:cb3d968589d8 2072 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 2073 #define BW_AIPS_PACRB_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP0) = (v))
Kojto 90:cb3d968589d8 2074 /*@}*/
Kojto 90:cb3d968589d8 2075
Kojto 90:cb3d968589d8 2076 /*!
Kojto 90:cb3d968589d8 2077 * @name Register AIPS_PACRB, field SP0[30] (RW)
Kojto 90:cb3d968589d8 2078 *
Kojto 90:cb3d968589d8 2079 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 2080 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 2081 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 2082 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 2083 * access initiates.
Kojto 90:cb3d968589d8 2084 *
Kojto 90:cb3d968589d8 2085 * Values:
Kojto 90:cb3d968589d8 2086 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 2087 * accesses.
Kojto 90:cb3d968589d8 2088 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 2089 */
Kojto 90:cb3d968589d8 2090 /*@{*/
Kojto 90:cb3d968589d8 2091 #define BP_AIPS_PACRB_SP0 (30U) /*!< Bit position for AIPS_PACRB_SP0. */
Kojto 90:cb3d968589d8 2092 #define BM_AIPS_PACRB_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRB_SP0. */
Kojto 90:cb3d968589d8 2093 #define BS_AIPS_PACRB_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRB_SP0. */
Kojto 90:cb3d968589d8 2094
Kojto 90:cb3d968589d8 2095 /*! @brief Read current value of the AIPS_PACRB_SP0 field. */
Kojto 90:cb3d968589d8 2096 #define BR_AIPS_PACRB_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP0))
Kojto 90:cb3d968589d8 2097
Kojto 90:cb3d968589d8 2098 /*! @brief Format value for bitfield AIPS_PACRB_SP0. */
Kojto 90:cb3d968589d8 2099 #define BF_AIPS_PACRB_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRB_SP0) & BM_AIPS_PACRB_SP0)
Kojto 90:cb3d968589d8 2100
Kojto 90:cb3d968589d8 2101 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 2102 #define BW_AIPS_PACRB_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP0) = (v))
Kojto 90:cb3d968589d8 2103 /*@}*/
Kojto 90:cb3d968589d8 2104
Kojto 90:cb3d968589d8 2105 /*******************************************************************************
Kojto 90:cb3d968589d8 2106 * HW_AIPS_PACRC - Peripheral Access Control Register
Kojto 90:cb3d968589d8 2107 ******************************************************************************/
Kojto 90:cb3d968589d8 2108
Kojto 90:cb3d968589d8 2109 /*!
Kojto 90:cb3d968589d8 2110 * @brief HW_AIPS_PACRC - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 2111 *
Kojto 90:cb3d968589d8 2112 * Reset value: 0x00000000U
Kojto 90:cb3d968589d8 2113 *
Kojto 90:cb3d968589d8 2114 * Each PACR register consists of eight 4-bit PACR fields. Each PACR field
Kojto 90:cb3d968589d8 2115 * defines the access levels for a particular peripheral. The mapping between a
Kojto 90:cb3d968589d8 2116 * peripheral and its PACR field is shown in the table below. The peripheral assignment
Kojto 90:cb3d968589d8 2117 * to each PACR is defined by the memory map slot that the peripheral is
Kojto 90:cb3d968589d8 2118 * assigned to. See this chip's memory map for the assignment of a particular
Kojto 90:cb3d968589d8 2119 * peripheral. The following table shows the location of each peripheral slot's PACR field
Kojto 90:cb3d968589d8 2120 * in the PACR registers. Offset Register [31:28] [27:24] [23:20] [19:16] [15:12]
Kojto 90:cb3d968589d8 2121 * [11:8] [7:4] [3:0] 0x20 PACRA PACR0 PACR1 PACR2 PACR3 PACR4 PACR5 PACR6 PACR7
Kojto 90:cb3d968589d8 2122 * 0x24 PACRB PACR8 PACR9 PACR10 PACR11 PACR12 PACR13 PACR14 PACR15 0x28 PACRC
Kojto 90:cb3d968589d8 2123 * PACR16 PACR17 PACR18 PACR19 PACR20 PACR21 PACR22 PACR23 0x2C PACRD PACR24
Kojto 90:cb3d968589d8 2124 * PACR25 PACR26 PACR27 PACR28 PACR29 PACR30 PACR31 0x30 Reserved 0x34 Reserved 0x38
Kojto 90:cb3d968589d8 2125 * Reserved 0x3C Reserved 0x40 PACRE PACR32 PACR33 PACR34 PACR35 PACR36 PACR37
Kojto 90:cb3d968589d8 2126 * PACR38 PACR39 0x44 PACRF PACR40 PACR41 PACR42 PACR43 PACR44 PACR45 PACR46 PACR47
Kojto 90:cb3d968589d8 2127 * 0x48 PACRG PACR48 PACR49 PACR50 PACR51 PACR52 PACR53 PACR54 PACR55 0x4C PACRH
Kojto 90:cb3d968589d8 2128 * PACR56 PACR57 PACR58 PACR59 PACR60 PACR61 PACR62 PACR63 0x50 PACRI PACR64
Kojto 90:cb3d968589d8 2129 * PACR65 PACR66 PACR67 PACR68 PACR69 PACR70 PACR71 0x54 PACRJ PACR72 PACR73 PACR74
Kojto 90:cb3d968589d8 2130 * PACR75 PACR76 PACR77 PACR78 PACR79 0x58 PACRK PACR80 PACR81 PACR82 PACR83
Kojto 90:cb3d968589d8 2131 * PACR84 PACR85 PACR86 PACR87 0x5C PACRL PACR88 PACR89 PACR90 PACR91 PACR92 PACR93
Kojto 90:cb3d968589d8 2132 * PACR94 PACR95 0x60 PACRM PACR96 PACR97 PACR98 PACR99 PACR100 PACR101 PACR102
Kojto 90:cb3d968589d8 2133 * PACR103 0x64 PACRN PACR104 PACR105 PACR106 PACR107 PACR108 PACR109 PACR110
Kojto 90:cb3d968589d8 2134 * PACR111 0x68 PACRO PACR112 PACR113 PACR114 PACR115 PACR116 PACR117 PACR118 PACR119
Kojto 90:cb3d968589d8 2135 * 0x6C PACRP PACR120 PACR121 PACR122 PACR123 PACR124 PACR125 PACR126 PACR127 0x80
Kojto 90:cb3d968589d8 2136 * PACRU PACR GBL0 PACR GBL1 Reserved The register field descriptions for PACR
Kojto 90:cb3d968589d8 2137 * A-D, which control peripheral slots 0-31, are shown below. The following
Kojto 90:cb3d968589d8 2138 * section, PACRPeripheral Access Control Register , shows the register field
Kojto 90:cb3d968589d8 2139 * descriptions for PACR E-P. All PACR registers are identical. They are divided into two
Kojto 90:cb3d968589d8 2140 * sections because they occupy two non-contiguous address spaces.
Kojto 90:cb3d968589d8 2141 */
Kojto 90:cb3d968589d8 2142 typedef union _hw_aips_pacrc
Kojto 90:cb3d968589d8 2143 {
Kojto 90:cb3d968589d8 2144 uint32_t U;
Kojto 90:cb3d968589d8 2145 struct _hw_aips_pacrc_bitfields
Kojto 90:cb3d968589d8 2146 {
Kojto 90:cb3d968589d8 2147 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 2148 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 2149 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 2150 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 2151 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 2152 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 2153 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 2154 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 2155 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 2156 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 2157 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 2158 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 2159 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 2160 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 2161 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 2162 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 2163 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 2164 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 2165 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 2166 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 2167 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 2168 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 2169 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 2170 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 2171 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 2172 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 2173 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 2174 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 2175 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 2176 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 2177 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 2178 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 2179 } B;
Kojto 90:cb3d968589d8 2180 } hw_aips_pacrc_t;
Kojto 90:cb3d968589d8 2181
Kojto 90:cb3d968589d8 2182 /*!
Kojto 90:cb3d968589d8 2183 * @name Constants and macros for entire AIPS_PACRC register
Kojto 90:cb3d968589d8 2184 */
Kojto 90:cb3d968589d8 2185 /*@{*/
Kojto 90:cb3d968589d8 2186 #define HW_AIPS_PACRC_ADDR(x) ((x) + 0x28U)
Kojto 90:cb3d968589d8 2187
Kojto 90:cb3d968589d8 2188 #define HW_AIPS_PACRC(x) (*(__IO hw_aips_pacrc_t *) HW_AIPS_PACRC_ADDR(x))
Kojto 90:cb3d968589d8 2189 #define HW_AIPS_PACRC_RD(x) (HW_AIPS_PACRC(x).U)
Kojto 90:cb3d968589d8 2190 #define HW_AIPS_PACRC_WR(x, v) (HW_AIPS_PACRC(x).U = (v))
Kojto 90:cb3d968589d8 2191 #define HW_AIPS_PACRC_SET(x, v) (HW_AIPS_PACRC_WR(x, HW_AIPS_PACRC_RD(x) | (v)))
Kojto 90:cb3d968589d8 2192 #define HW_AIPS_PACRC_CLR(x, v) (HW_AIPS_PACRC_WR(x, HW_AIPS_PACRC_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 2193 #define HW_AIPS_PACRC_TOG(x, v) (HW_AIPS_PACRC_WR(x, HW_AIPS_PACRC_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 2194 /*@}*/
Kojto 90:cb3d968589d8 2195
Kojto 90:cb3d968589d8 2196 /*
Kojto 90:cb3d968589d8 2197 * Constants & macros for individual AIPS_PACRC bitfields
Kojto 90:cb3d968589d8 2198 */
Kojto 90:cb3d968589d8 2199
Kojto 90:cb3d968589d8 2200 /*!
Kojto 90:cb3d968589d8 2201 * @name Register AIPS_PACRC, field TP7[0] (RW)
Kojto 90:cb3d968589d8 2202 *
Kojto 90:cb3d968589d8 2203 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 2204 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 2205 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 2206 *
Kojto 90:cb3d968589d8 2207 * Values:
Kojto 90:cb3d968589d8 2208 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 2209 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 2210 */
Kojto 90:cb3d968589d8 2211 /*@{*/
Kojto 90:cb3d968589d8 2212 #define BP_AIPS_PACRC_TP7 (0U) /*!< Bit position for AIPS_PACRC_TP7. */
Kojto 90:cb3d968589d8 2213 #define BM_AIPS_PACRC_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRC_TP7. */
Kojto 90:cb3d968589d8 2214 #define BS_AIPS_PACRC_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP7. */
Kojto 90:cb3d968589d8 2215
Kojto 90:cb3d968589d8 2216 /*! @brief Read current value of the AIPS_PACRC_TP7 field. */
Kojto 90:cb3d968589d8 2217 #define BR_AIPS_PACRC_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP7))
Kojto 90:cb3d968589d8 2218
Kojto 90:cb3d968589d8 2219 /*! @brief Format value for bitfield AIPS_PACRC_TP7. */
Kojto 90:cb3d968589d8 2220 #define BF_AIPS_PACRC_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP7) & BM_AIPS_PACRC_TP7)
Kojto 90:cb3d968589d8 2221
Kojto 90:cb3d968589d8 2222 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 2223 #define BW_AIPS_PACRC_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP7) = (v))
Kojto 90:cb3d968589d8 2224 /*@}*/
Kojto 90:cb3d968589d8 2225
Kojto 90:cb3d968589d8 2226 /*!
Kojto 90:cb3d968589d8 2227 * @name Register AIPS_PACRC, field WP7[1] (RW)
Kojto 90:cb3d968589d8 2228 *
Kojto 90:cb3d968589d8 2229 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 2230 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 2231 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 2232 *
Kojto 90:cb3d968589d8 2233 * Values:
Kojto 90:cb3d968589d8 2234 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 2235 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 2236 */
Kojto 90:cb3d968589d8 2237 /*@{*/
Kojto 90:cb3d968589d8 2238 #define BP_AIPS_PACRC_WP7 (1U) /*!< Bit position for AIPS_PACRC_WP7. */
Kojto 90:cb3d968589d8 2239 #define BM_AIPS_PACRC_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRC_WP7. */
Kojto 90:cb3d968589d8 2240 #define BS_AIPS_PACRC_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP7. */
Kojto 90:cb3d968589d8 2241
Kojto 90:cb3d968589d8 2242 /*! @brief Read current value of the AIPS_PACRC_WP7 field. */
Kojto 90:cb3d968589d8 2243 #define BR_AIPS_PACRC_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP7))
Kojto 90:cb3d968589d8 2244
Kojto 90:cb3d968589d8 2245 /*! @brief Format value for bitfield AIPS_PACRC_WP7. */
Kojto 90:cb3d968589d8 2246 #define BF_AIPS_PACRC_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP7) & BM_AIPS_PACRC_WP7)
Kojto 90:cb3d968589d8 2247
Kojto 90:cb3d968589d8 2248 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 2249 #define BW_AIPS_PACRC_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP7) = (v))
Kojto 90:cb3d968589d8 2250 /*@}*/
Kojto 90:cb3d968589d8 2251
Kojto 90:cb3d968589d8 2252 /*!
Kojto 90:cb3d968589d8 2253 * @name Register AIPS_PACRC, field SP7[2] (RW)
Kojto 90:cb3d968589d8 2254 *
Kojto 90:cb3d968589d8 2255 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 2256 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 2257 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 2258 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 2259 * access initiates.
Kojto 90:cb3d968589d8 2260 *
Kojto 90:cb3d968589d8 2261 * Values:
Kojto 90:cb3d968589d8 2262 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 2263 * accesses.
Kojto 90:cb3d968589d8 2264 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 2265 */
Kojto 90:cb3d968589d8 2266 /*@{*/
Kojto 90:cb3d968589d8 2267 #define BP_AIPS_PACRC_SP7 (2U) /*!< Bit position for AIPS_PACRC_SP7. */
Kojto 90:cb3d968589d8 2268 #define BM_AIPS_PACRC_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRC_SP7. */
Kojto 90:cb3d968589d8 2269 #define BS_AIPS_PACRC_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP7. */
Kojto 90:cb3d968589d8 2270
Kojto 90:cb3d968589d8 2271 /*! @brief Read current value of the AIPS_PACRC_SP7 field. */
Kojto 90:cb3d968589d8 2272 #define BR_AIPS_PACRC_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP7))
Kojto 90:cb3d968589d8 2273
Kojto 90:cb3d968589d8 2274 /*! @brief Format value for bitfield AIPS_PACRC_SP7. */
Kojto 90:cb3d968589d8 2275 #define BF_AIPS_PACRC_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP7) & BM_AIPS_PACRC_SP7)
Kojto 90:cb3d968589d8 2276
Kojto 90:cb3d968589d8 2277 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 2278 #define BW_AIPS_PACRC_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP7) = (v))
Kojto 90:cb3d968589d8 2279 /*@}*/
Kojto 90:cb3d968589d8 2280
Kojto 90:cb3d968589d8 2281 /*!
Kojto 90:cb3d968589d8 2282 * @name Register AIPS_PACRC, field TP6[4] (RW)
Kojto 90:cb3d968589d8 2283 *
Kojto 90:cb3d968589d8 2284 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 2285 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 2286 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 2287 *
Kojto 90:cb3d968589d8 2288 * Values:
Kojto 90:cb3d968589d8 2289 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 2290 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 2291 */
Kojto 90:cb3d968589d8 2292 /*@{*/
Kojto 90:cb3d968589d8 2293 #define BP_AIPS_PACRC_TP6 (4U) /*!< Bit position for AIPS_PACRC_TP6. */
Kojto 90:cb3d968589d8 2294 #define BM_AIPS_PACRC_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRC_TP6. */
Kojto 90:cb3d968589d8 2295 #define BS_AIPS_PACRC_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP6. */
Kojto 90:cb3d968589d8 2296
Kojto 90:cb3d968589d8 2297 /*! @brief Read current value of the AIPS_PACRC_TP6 field. */
Kojto 90:cb3d968589d8 2298 #define BR_AIPS_PACRC_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP6))
Kojto 90:cb3d968589d8 2299
Kojto 90:cb3d968589d8 2300 /*! @brief Format value for bitfield AIPS_PACRC_TP6. */
Kojto 90:cb3d968589d8 2301 #define BF_AIPS_PACRC_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP6) & BM_AIPS_PACRC_TP6)
Kojto 90:cb3d968589d8 2302
Kojto 90:cb3d968589d8 2303 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 2304 #define BW_AIPS_PACRC_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP6) = (v))
Kojto 90:cb3d968589d8 2305 /*@}*/
Kojto 90:cb3d968589d8 2306
Kojto 90:cb3d968589d8 2307 /*!
Kojto 90:cb3d968589d8 2308 * @name Register AIPS_PACRC, field WP6[5] (RW)
Kojto 90:cb3d968589d8 2309 *
Kojto 90:cb3d968589d8 2310 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 2311 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 2312 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 2313 *
Kojto 90:cb3d968589d8 2314 * Values:
Kojto 90:cb3d968589d8 2315 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 2316 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 2317 */
Kojto 90:cb3d968589d8 2318 /*@{*/
Kojto 90:cb3d968589d8 2319 #define BP_AIPS_PACRC_WP6 (5U) /*!< Bit position for AIPS_PACRC_WP6. */
Kojto 90:cb3d968589d8 2320 #define BM_AIPS_PACRC_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRC_WP6. */
Kojto 90:cb3d968589d8 2321 #define BS_AIPS_PACRC_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP6. */
Kojto 90:cb3d968589d8 2322
Kojto 90:cb3d968589d8 2323 /*! @brief Read current value of the AIPS_PACRC_WP6 field. */
Kojto 90:cb3d968589d8 2324 #define BR_AIPS_PACRC_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP6))
Kojto 90:cb3d968589d8 2325
Kojto 90:cb3d968589d8 2326 /*! @brief Format value for bitfield AIPS_PACRC_WP6. */
Kojto 90:cb3d968589d8 2327 #define BF_AIPS_PACRC_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP6) & BM_AIPS_PACRC_WP6)
Kojto 90:cb3d968589d8 2328
Kojto 90:cb3d968589d8 2329 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 2330 #define BW_AIPS_PACRC_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP6) = (v))
Kojto 90:cb3d968589d8 2331 /*@}*/
Kojto 90:cb3d968589d8 2332
Kojto 90:cb3d968589d8 2333 /*!
Kojto 90:cb3d968589d8 2334 * @name Register AIPS_PACRC, field SP6[6] (RW)
Kojto 90:cb3d968589d8 2335 *
Kojto 90:cb3d968589d8 2336 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 2337 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 2338 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 2339 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 2340 * access initiates.
Kojto 90:cb3d968589d8 2341 *
Kojto 90:cb3d968589d8 2342 * Values:
Kojto 90:cb3d968589d8 2343 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 2344 * accesses.
Kojto 90:cb3d968589d8 2345 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 2346 */
Kojto 90:cb3d968589d8 2347 /*@{*/
Kojto 90:cb3d968589d8 2348 #define BP_AIPS_PACRC_SP6 (6U) /*!< Bit position for AIPS_PACRC_SP6. */
Kojto 90:cb3d968589d8 2349 #define BM_AIPS_PACRC_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRC_SP6. */
Kojto 90:cb3d968589d8 2350 #define BS_AIPS_PACRC_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP6. */
Kojto 90:cb3d968589d8 2351
Kojto 90:cb3d968589d8 2352 /*! @brief Read current value of the AIPS_PACRC_SP6 field. */
Kojto 90:cb3d968589d8 2353 #define BR_AIPS_PACRC_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP6))
Kojto 90:cb3d968589d8 2354
Kojto 90:cb3d968589d8 2355 /*! @brief Format value for bitfield AIPS_PACRC_SP6. */
Kojto 90:cb3d968589d8 2356 #define BF_AIPS_PACRC_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP6) & BM_AIPS_PACRC_SP6)
Kojto 90:cb3d968589d8 2357
Kojto 90:cb3d968589d8 2358 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 2359 #define BW_AIPS_PACRC_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP6) = (v))
Kojto 90:cb3d968589d8 2360 /*@}*/
Kojto 90:cb3d968589d8 2361
Kojto 90:cb3d968589d8 2362 /*!
Kojto 90:cb3d968589d8 2363 * @name Register AIPS_PACRC, field TP5[8] (RW)
Kojto 90:cb3d968589d8 2364 *
Kojto 90:cb3d968589d8 2365 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 2366 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 2367 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 2368 *
Kojto 90:cb3d968589d8 2369 * Values:
Kojto 90:cb3d968589d8 2370 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 2371 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 2372 */
Kojto 90:cb3d968589d8 2373 /*@{*/
Kojto 90:cb3d968589d8 2374 #define BP_AIPS_PACRC_TP5 (8U) /*!< Bit position for AIPS_PACRC_TP5. */
Kojto 90:cb3d968589d8 2375 #define BM_AIPS_PACRC_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRC_TP5. */
Kojto 90:cb3d968589d8 2376 #define BS_AIPS_PACRC_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP5. */
Kojto 90:cb3d968589d8 2377
Kojto 90:cb3d968589d8 2378 /*! @brief Read current value of the AIPS_PACRC_TP5 field. */
Kojto 90:cb3d968589d8 2379 #define BR_AIPS_PACRC_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP5))
Kojto 90:cb3d968589d8 2380
Kojto 90:cb3d968589d8 2381 /*! @brief Format value for bitfield AIPS_PACRC_TP5. */
Kojto 90:cb3d968589d8 2382 #define BF_AIPS_PACRC_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP5) & BM_AIPS_PACRC_TP5)
Kojto 90:cb3d968589d8 2383
Kojto 90:cb3d968589d8 2384 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 2385 #define BW_AIPS_PACRC_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP5) = (v))
Kojto 90:cb3d968589d8 2386 /*@}*/
Kojto 90:cb3d968589d8 2387
Kojto 90:cb3d968589d8 2388 /*!
Kojto 90:cb3d968589d8 2389 * @name Register AIPS_PACRC, field WP5[9] (RW)
Kojto 90:cb3d968589d8 2390 *
Kojto 90:cb3d968589d8 2391 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 2392 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 2393 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 2394 *
Kojto 90:cb3d968589d8 2395 * Values:
Kojto 90:cb3d968589d8 2396 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 2397 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 2398 */
Kojto 90:cb3d968589d8 2399 /*@{*/
Kojto 90:cb3d968589d8 2400 #define BP_AIPS_PACRC_WP5 (9U) /*!< Bit position for AIPS_PACRC_WP5. */
Kojto 90:cb3d968589d8 2401 #define BM_AIPS_PACRC_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRC_WP5. */
Kojto 90:cb3d968589d8 2402 #define BS_AIPS_PACRC_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP5. */
Kojto 90:cb3d968589d8 2403
Kojto 90:cb3d968589d8 2404 /*! @brief Read current value of the AIPS_PACRC_WP5 field. */
Kojto 90:cb3d968589d8 2405 #define BR_AIPS_PACRC_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP5))
Kojto 90:cb3d968589d8 2406
Kojto 90:cb3d968589d8 2407 /*! @brief Format value for bitfield AIPS_PACRC_WP5. */
Kojto 90:cb3d968589d8 2408 #define BF_AIPS_PACRC_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP5) & BM_AIPS_PACRC_WP5)
Kojto 90:cb3d968589d8 2409
Kojto 90:cb3d968589d8 2410 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 2411 #define BW_AIPS_PACRC_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP5) = (v))
Kojto 90:cb3d968589d8 2412 /*@}*/
Kojto 90:cb3d968589d8 2413
Kojto 90:cb3d968589d8 2414 /*!
Kojto 90:cb3d968589d8 2415 * @name Register AIPS_PACRC, field SP5[10] (RW)
Kojto 90:cb3d968589d8 2416 *
Kojto 90:cb3d968589d8 2417 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 2418 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 2419 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 2420 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 2421 * access initiates.
Kojto 90:cb3d968589d8 2422 *
Kojto 90:cb3d968589d8 2423 * Values:
Kojto 90:cb3d968589d8 2424 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 2425 * accesses.
Kojto 90:cb3d968589d8 2426 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 2427 */
Kojto 90:cb3d968589d8 2428 /*@{*/
Kojto 90:cb3d968589d8 2429 #define BP_AIPS_PACRC_SP5 (10U) /*!< Bit position for AIPS_PACRC_SP5. */
Kojto 90:cb3d968589d8 2430 #define BM_AIPS_PACRC_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRC_SP5. */
Kojto 90:cb3d968589d8 2431 #define BS_AIPS_PACRC_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP5. */
Kojto 90:cb3d968589d8 2432
Kojto 90:cb3d968589d8 2433 /*! @brief Read current value of the AIPS_PACRC_SP5 field. */
Kojto 90:cb3d968589d8 2434 #define BR_AIPS_PACRC_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP5))
Kojto 90:cb3d968589d8 2435
Kojto 90:cb3d968589d8 2436 /*! @brief Format value for bitfield AIPS_PACRC_SP5. */
Kojto 90:cb3d968589d8 2437 #define BF_AIPS_PACRC_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP5) & BM_AIPS_PACRC_SP5)
Kojto 90:cb3d968589d8 2438
Kojto 90:cb3d968589d8 2439 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 2440 #define BW_AIPS_PACRC_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP5) = (v))
Kojto 90:cb3d968589d8 2441 /*@}*/
Kojto 90:cb3d968589d8 2442
Kojto 90:cb3d968589d8 2443 /*!
Kojto 90:cb3d968589d8 2444 * @name Register AIPS_PACRC, field TP4[12] (RW)
Kojto 90:cb3d968589d8 2445 *
Kojto 90:cb3d968589d8 2446 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 2447 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 2448 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 2449 *
Kojto 90:cb3d968589d8 2450 * Values:
Kojto 90:cb3d968589d8 2451 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 2452 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 2453 */
Kojto 90:cb3d968589d8 2454 /*@{*/
Kojto 90:cb3d968589d8 2455 #define BP_AIPS_PACRC_TP4 (12U) /*!< Bit position for AIPS_PACRC_TP4. */
Kojto 90:cb3d968589d8 2456 #define BM_AIPS_PACRC_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRC_TP4. */
Kojto 90:cb3d968589d8 2457 #define BS_AIPS_PACRC_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP4. */
Kojto 90:cb3d968589d8 2458
Kojto 90:cb3d968589d8 2459 /*! @brief Read current value of the AIPS_PACRC_TP4 field. */
Kojto 90:cb3d968589d8 2460 #define BR_AIPS_PACRC_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP4))
Kojto 90:cb3d968589d8 2461
Kojto 90:cb3d968589d8 2462 /*! @brief Format value for bitfield AIPS_PACRC_TP4. */
Kojto 90:cb3d968589d8 2463 #define BF_AIPS_PACRC_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP4) & BM_AIPS_PACRC_TP4)
Kojto 90:cb3d968589d8 2464
Kojto 90:cb3d968589d8 2465 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 2466 #define BW_AIPS_PACRC_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP4) = (v))
Kojto 90:cb3d968589d8 2467 /*@}*/
Kojto 90:cb3d968589d8 2468
Kojto 90:cb3d968589d8 2469 /*!
Kojto 90:cb3d968589d8 2470 * @name Register AIPS_PACRC, field WP4[13] (RW)
Kojto 90:cb3d968589d8 2471 *
Kojto 90:cb3d968589d8 2472 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 2473 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 2474 * no peripheral access initiates.
Kojto 90:cb3d968589d8 2475 *
Kojto 90:cb3d968589d8 2476 * Values:
Kojto 90:cb3d968589d8 2477 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 2478 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 2479 */
Kojto 90:cb3d968589d8 2480 /*@{*/
Kojto 90:cb3d968589d8 2481 #define BP_AIPS_PACRC_WP4 (13U) /*!< Bit position for AIPS_PACRC_WP4. */
Kojto 90:cb3d968589d8 2482 #define BM_AIPS_PACRC_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRC_WP4. */
Kojto 90:cb3d968589d8 2483 #define BS_AIPS_PACRC_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP4. */
Kojto 90:cb3d968589d8 2484
Kojto 90:cb3d968589d8 2485 /*! @brief Read current value of the AIPS_PACRC_WP4 field. */
Kojto 90:cb3d968589d8 2486 #define BR_AIPS_PACRC_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP4))
Kojto 90:cb3d968589d8 2487
Kojto 90:cb3d968589d8 2488 /*! @brief Format value for bitfield AIPS_PACRC_WP4. */
Kojto 90:cb3d968589d8 2489 #define BF_AIPS_PACRC_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP4) & BM_AIPS_PACRC_WP4)
Kojto 90:cb3d968589d8 2490
Kojto 90:cb3d968589d8 2491 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 2492 #define BW_AIPS_PACRC_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP4) = (v))
Kojto 90:cb3d968589d8 2493 /*@}*/
Kojto 90:cb3d968589d8 2494
Kojto 90:cb3d968589d8 2495 /*!
Kojto 90:cb3d968589d8 2496 * @name Register AIPS_PACRC, field SP4[14] (RW)
Kojto 90:cb3d968589d8 2497 *
Kojto 90:cb3d968589d8 2498 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 2499 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 2500 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 2501 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 2502 * access initiates.
Kojto 90:cb3d968589d8 2503 *
Kojto 90:cb3d968589d8 2504 * Values:
Kojto 90:cb3d968589d8 2505 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 2506 * accesses.
Kojto 90:cb3d968589d8 2507 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 2508 */
Kojto 90:cb3d968589d8 2509 /*@{*/
Kojto 90:cb3d968589d8 2510 #define BP_AIPS_PACRC_SP4 (14U) /*!< Bit position for AIPS_PACRC_SP4. */
Kojto 90:cb3d968589d8 2511 #define BM_AIPS_PACRC_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRC_SP4. */
Kojto 90:cb3d968589d8 2512 #define BS_AIPS_PACRC_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP4. */
Kojto 90:cb3d968589d8 2513
Kojto 90:cb3d968589d8 2514 /*! @brief Read current value of the AIPS_PACRC_SP4 field. */
Kojto 90:cb3d968589d8 2515 #define BR_AIPS_PACRC_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP4))
Kojto 90:cb3d968589d8 2516
Kojto 90:cb3d968589d8 2517 /*! @brief Format value for bitfield AIPS_PACRC_SP4. */
Kojto 90:cb3d968589d8 2518 #define BF_AIPS_PACRC_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP4) & BM_AIPS_PACRC_SP4)
Kojto 90:cb3d968589d8 2519
Kojto 90:cb3d968589d8 2520 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 2521 #define BW_AIPS_PACRC_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP4) = (v))
Kojto 90:cb3d968589d8 2522 /*@}*/
Kojto 90:cb3d968589d8 2523
Kojto 90:cb3d968589d8 2524 /*!
Kojto 90:cb3d968589d8 2525 * @name Register AIPS_PACRC, field TP3[16] (RW)
Kojto 90:cb3d968589d8 2526 *
Kojto 90:cb3d968589d8 2527 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 2528 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 2529 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 2530 *
Kojto 90:cb3d968589d8 2531 * Values:
Kojto 90:cb3d968589d8 2532 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 2533 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 2534 */
Kojto 90:cb3d968589d8 2535 /*@{*/
Kojto 90:cb3d968589d8 2536 #define BP_AIPS_PACRC_TP3 (16U) /*!< Bit position for AIPS_PACRC_TP3. */
Kojto 90:cb3d968589d8 2537 #define BM_AIPS_PACRC_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRC_TP3. */
Kojto 90:cb3d968589d8 2538 #define BS_AIPS_PACRC_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP3. */
Kojto 90:cb3d968589d8 2539
Kojto 90:cb3d968589d8 2540 /*! @brief Read current value of the AIPS_PACRC_TP3 field. */
Kojto 90:cb3d968589d8 2541 #define BR_AIPS_PACRC_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP3))
Kojto 90:cb3d968589d8 2542
Kojto 90:cb3d968589d8 2543 /*! @brief Format value for bitfield AIPS_PACRC_TP3. */
Kojto 90:cb3d968589d8 2544 #define BF_AIPS_PACRC_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP3) & BM_AIPS_PACRC_TP3)
Kojto 90:cb3d968589d8 2545
Kojto 90:cb3d968589d8 2546 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 2547 #define BW_AIPS_PACRC_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP3) = (v))
Kojto 90:cb3d968589d8 2548 /*@}*/
Kojto 90:cb3d968589d8 2549
Kojto 90:cb3d968589d8 2550 /*!
Kojto 90:cb3d968589d8 2551 * @name Register AIPS_PACRC, field WP3[17] (RW)
Kojto 90:cb3d968589d8 2552 *
Kojto 90:cb3d968589d8 2553 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 2554 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 2555 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 2556 *
Kojto 90:cb3d968589d8 2557 * Values:
Kojto 90:cb3d968589d8 2558 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 2559 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 2560 */
Kojto 90:cb3d968589d8 2561 /*@{*/
Kojto 90:cb3d968589d8 2562 #define BP_AIPS_PACRC_WP3 (17U) /*!< Bit position for AIPS_PACRC_WP3. */
Kojto 90:cb3d968589d8 2563 #define BM_AIPS_PACRC_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRC_WP3. */
Kojto 90:cb3d968589d8 2564 #define BS_AIPS_PACRC_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP3. */
Kojto 90:cb3d968589d8 2565
Kojto 90:cb3d968589d8 2566 /*! @brief Read current value of the AIPS_PACRC_WP3 field. */
Kojto 90:cb3d968589d8 2567 #define BR_AIPS_PACRC_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP3))
Kojto 90:cb3d968589d8 2568
Kojto 90:cb3d968589d8 2569 /*! @brief Format value for bitfield AIPS_PACRC_WP3. */
Kojto 90:cb3d968589d8 2570 #define BF_AIPS_PACRC_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP3) & BM_AIPS_PACRC_WP3)
Kojto 90:cb3d968589d8 2571
Kojto 90:cb3d968589d8 2572 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 2573 #define BW_AIPS_PACRC_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP3) = (v))
Kojto 90:cb3d968589d8 2574 /*@}*/
Kojto 90:cb3d968589d8 2575
Kojto 90:cb3d968589d8 2576 /*!
Kojto 90:cb3d968589d8 2577 * @name Register AIPS_PACRC, field SP3[18] (RW)
Kojto 90:cb3d968589d8 2578 *
Kojto 90:cb3d968589d8 2579 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 2580 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 2581 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 2582 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 2583 * initiates.
Kojto 90:cb3d968589d8 2584 *
Kojto 90:cb3d968589d8 2585 * Values:
Kojto 90:cb3d968589d8 2586 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 2587 * accesses.
Kojto 90:cb3d968589d8 2588 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 2589 */
Kojto 90:cb3d968589d8 2590 /*@{*/
Kojto 90:cb3d968589d8 2591 #define BP_AIPS_PACRC_SP3 (18U) /*!< Bit position for AIPS_PACRC_SP3. */
Kojto 90:cb3d968589d8 2592 #define BM_AIPS_PACRC_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRC_SP3. */
Kojto 90:cb3d968589d8 2593 #define BS_AIPS_PACRC_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP3. */
Kojto 90:cb3d968589d8 2594
Kojto 90:cb3d968589d8 2595 /*! @brief Read current value of the AIPS_PACRC_SP3 field. */
Kojto 90:cb3d968589d8 2596 #define BR_AIPS_PACRC_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP3))
Kojto 90:cb3d968589d8 2597
Kojto 90:cb3d968589d8 2598 /*! @brief Format value for bitfield AIPS_PACRC_SP3. */
Kojto 90:cb3d968589d8 2599 #define BF_AIPS_PACRC_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP3) & BM_AIPS_PACRC_SP3)
Kojto 90:cb3d968589d8 2600
Kojto 90:cb3d968589d8 2601 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 2602 #define BW_AIPS_PACRC_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP3) = (v))
Kojto 90:cb3d968589d8 2603 /*@}*/
Kojto 90:cb3d968589d8 2604
Kojto 90:cb3d968589d8 2605 /*!
Kojto 90:cb3d968589d8 2606 * @name Register AIPS_PACRC, field TP2[20] (RW)
Kojto 90:cb3d968589d8 2607 *
Kojto 90:cb3d968589d8 2608 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 2609 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 2610 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 2611 *
Kojto 90:cb3d968589d8 2612 * Values:
Kojto 90:cb3d968589d8 2613 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 2614 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 2615 */
Kojto 90:cb3d968589d8 2616 /*@{*/
Kojto 90:cb3d968589d8 2617 #define BP_AIPS_PACRC_TP2 (20U) /*!< Bit position for AIPS_PACRC_TP2. */
Kojto 90:cb3d968589d8 2618 #define BM_AIPS_PACRC_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRC_TP2. */
Kojto 90:cb3d968589d8 2619 #define BS_AIPS_PACRC_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP2. */
Kojto 90:cb3d968589d8 2620
Kojto 90:cb3d968589d8 2621 /*! @brief Read current value of the AIPS_PACRC_TP2 field. */
Kojto 90:cb3d968589d8 2622 #define BR_AIPS_PACRC_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP2))
Kojto 90:cb3d968589d8 2623
Kojto 90:cb3d968589d8 2624 /*! @brief Format value for bitfield AIPS_PACRC_TP2. */
Kojto 90:cb3d968589d8 2625 #define BF_AIPS_PACRC_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP2) & BM_AIPS_PACRC_TP2)
Kojto 90:cb3d968589d8 2626
Kojto 90:cb3d968589d8 2627 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 2628 #define BW_AIPS_PACRC_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP2) = (v))
Kojto 90:cb3d968589d8 2629 /*@}*/
Kojto 90:cb3d968589d8 2630
Kojto 90:cb3d968589d8 2631 /*!
Kojto 90:cb3d968589d8 2632 * @name Register AIPS_PACRC, field WP2[21] (RW)
Kojto 90:cb3d968589d8 2633 *
Kojto 90:cb3d968589d8 2634 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 2635 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 2636 * no peripheral access initiates.
Kojto 90:cb3d968589d8 2637 *
Kojto 90:cb3d968589d8 2638 * Values:
Kojto 90:cb3d968589d8 2639 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 2640 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 2641 */
Kojto 90:cb3d968589d8 2642 /*@{*/
Kojto 90:cb3d968589d8 2643 #define BP_AIPS_PACRC_WP2 (21U) /*!< Bit position for AIPS_PACRC_WP2. */
Kojto 90:cb3d968589d8 2644 #define BM_AIPS_PACRC_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRC_WP2. */
Kojto 90:cb3d968589d8 2645 #define BS_AIPS_PACRC_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP2. */
Kojto 90:cb3d968589d8 2646
Kojto 90:cb3d968589d8 2647 /*! @brief Read current value of the AIPS_PACRC_WP2 field. */
Kojto 90:cb3d968589d8 2648 #define BR_AIPS_PACRC_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP2))
Kojto 90:cb3d968589d8 2649
Kojto 90:cb3d968589d8 2650 /*! @brief Format value for bitfield AIPS_PACRC_WP2. */
Kojto 90:cb3d968589d8 2651 #define BF_AIPS_PACRC_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP2) & BM_AIPS_PACRC_WP2)
Kojto 90:cb3d968589d8 2652
Kojto 90:cb3d968589d8 2653 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 2654 #define BW_AIPS_PACRC_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP2) = (v))
Kojto 90:cb3d968589d8 2655 /*@}*/
Kojto 90:cb3d968589d8 2656
Kojto 90:cb3d968589d8 2657 /*!
Kojto 90:cb3d968589d8 2658 * @name Register AIPS_PACRC, field SP2[22] (RW)
Kojto 90:cb3d968589d8 2659 *
Kojto 90:cb3d968589d8 2660 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 2661 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 2662 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 2663 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 2664 * access initiates.
Kojto 90:cb3d968589d8 2665 *
Kojto 90:cb3d968589d8 2666 * Values:
Kojto 90:cb3d968589d8 2667 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 2668 * accesses.
Kojto 90:cb3d968589d8 2669 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 2670 */
Kojto 90:cb3d968589d8 2671 /*@{*/
Kojto 90:cb3d968589d8 2672 #define BP_AIPS_PACRC_SP2 (22U) /*!< Bit position for AIPS_PACRC_SP2. */
Kojto 90:cb3d968589d8 2673 #define BM_AIPS_PACRC_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRC_SP2. */
Kojto 90:cb3d968589d8 2674 #define BS_AIPS_PACRC_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP2. */
Kojto 90:cb3d968589d8 2675
Kojto 90:cb3d968589d8 2676 /*! @brief Read current value of the AIPS_PACRC_SP2 field. */
Kojto 90:cb3d968589d8 2677 #define BR_AIPS_PACRC_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP2))
Kojto 90:cb3d968589d8 2678
Kojto 90:cb3d968589d8 2679 /*! @brief Format value for bitfield AIPS_PACRC_SP2. */
Kojto 90:cb3d968589d8 2680 #define BF_AIPS_PACRC_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP2) & BM_AIPS_PACRC_SP2)
Kojto 90:cb3d968589d8 2681
Kojto 90:cb3d968589d8 2682 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 2683 #define BW_AIPS_PACRC_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP2) = (v))
Kojto 90:cb3d968589d8 2684 /*@}*/
Kojto 90:cb3d968589d8 2685
Kojto 90:cb3d968589d8 2686 /*!
Kojto 90:cb3d968589d8 2687 * @name Register AIPS_PACRC, field TP1[24] (RW)
Kojto 90:cb3d968589d8 2688 *
Kojto 90:cb3d968589d8 2689 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 2690 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 2691 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 2692 *
Kojto 90:cb3d968589d8 2693 * Values:
Kojto 90:cb3d968589d8 2694 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 2695 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 2696 */
Kojto 90:cb3d968589d8 2697 /*@{*/
Kojto 90:cb3d968589d8 2698 #define BP_AIPS_PACRC_TP1 (24U) /*!< Bit position for AIPS_PACRC_TP1. */
Kojto 90:cb3d968589d8 2699 #define BM_AIPS_PACRC_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRC_TP1. */
Kojto 90:cb3d968589d8 2700 #define BS_AIPS_PACRC_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP1. */
Kojto 90:cb3d968589d8 2701
Kojto 90:cb3d968589d8 2702 /*! @brief Read current value of the AIPS_PACRC_TP1 field. */
Kojto 90:cb3d968589d8 2703 #define BR_AIPS_PACRC_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP1))
Kojto 90:cb3d968589d8 2704
Kojto 90:cb3d968589d8 2705 /*! @brief Format value for bitfield AIPS_PACRC_TP1. */
Kojto 90:cb3d968589d8 2706 #define BF_AIPS_PACRC_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP1) & BM_AIPS_PACRC_TP1)
Kojto 90:cb3d968589d8 2707
Kojto 90:cb3d968589d8 2708 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 2709 #define BW_AIPS_PACRC_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP1) = (v))
Kojto 90:cb3d968589d8 2710 /*@}*/
Kojto 90:cb3d968589d8 2711
Kojto 90:cb3d968589d8 2712 /*!
Kojto 90:cb3d968589d8 2713 * @name Register AIPS_PACRC, field WP1[25] (RW)
Kojto 90:cb3d968589d8 2714 *
Kojto 90:cb3d968589d8 2715 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 2716 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 2717 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 2718 *
Kojto 90:cb3d968589d8 2719 * Values:
Kojto 90:cb3d968589d8 2720 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 2721 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 2722 */
Kojto 90:cb3d968589d8 2723 /*@{*/
Kojto 90:cb3d968589d8 2724 #define BP_AIPS_PACRC_WP1 (25U) /*!< Bit position for AIPS_PACRC_WP1. */
Kojto 90:cb3d968589d8 2725 #define BM_AIPS_PACRC_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRC_WP1. */
Kojto 90:cb3d968589d8 2726 #define BS_AIPS_PACRC_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP1. */
Kojto 90:cb3d968589d8 2727
Kojto 90:cb3d968589d8 2728 /*! @brief Read current value of the AIPS_PACRC_WP1 field. */
Kojto 90:cb3d968589d8 2729 #define BR_AIPS_PACRC_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP1))
Kojto 90:cb3d968589d8 2730
Kojto 90:cb3d968589d8 2731 /*! @brief Format value for bitfield AIPS_PACRC_WP1. */
Kojto 90:cb3d968589d8 2732 #define BF_AIPS_PACRC_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP1) & BM_AIPS_PACRC_WP1)
Kojto 90:cb3d968589d8 2733
Kojto 90:cb3d968589d8 2734 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 2735 #define BW_AIPS_PACRC_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP1) = (v))
Kojto 90:cb3d968589d8 2736 /*@}*/
Kojto 90:cb3d968589d8 2737
Kojto 90:cb3d968589d8 2738 /*!
Kojto 90:cb3d968589d8 2739 * @name Register AIPS_PACRC, field SP1[26] (RW)
Kojto 90:cb3d968589d8 2740 *
Kojto 90:cb3d968589d8 2741 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 2742 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 2743 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 2744 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 2745 * access initiates.
Kojto 90:cb3d968589d8 2746 *
Kojto 90:cb3d968589d8 2747 * Values:
Kojto 90:cb3d968589d8 2748 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 2749 * accesses.
Kojto 90:cb3d968589d8 2750 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 2751 */
Kojto 90:cb3d968589d8 2752 /*@{*/
Kojto 90:cb3d968589d8 2753 #define BP_AIPS_PACRC_SP1 (26U) /*!< Bit position for AIPS_PACRC_SP1. */
Kojto 90:cb3d968589d8 2754 #define BM_AIPS_PACRC_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRC_SP1. */
Kojto 90:cb3d968589d8 2755 #define BS_AIPS_PACRC_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP1. */
Kojto 90:cb3d968589d8 2756
Kojto 90:cb3d968589d8 2757 /*! @brief Read current value of the AIPS_PACRC_SP1 field. */
Kojto 90:cb3d968589d8 2758 #define BR_AIPS_PACRC_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP1))
Kojto 90:cb3d968589d8 2759
Kojto 90:cb3d968589d8 2760 /*! @brief Format value for bitfield AIPS_PACRC_SP1. */
Kojto 90:cb3d968589d8 2761 #define BF_AIPS_PACRC_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP1) & BM_AIPS_PACRC_SP1)
Kojto 90:cb3d968589d8 2762
Kojto 90:cb3d968589d8 2763 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 2764 #define BW_AIPS_PACRC_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP1) = (v))
Kojto 90:cb3d968589d8 2765 /*@}*/
Kojto 90:cb3d968589d8 2766
Kojto 90:cb3d968589d8 2767 /*!
Kojto 90:cb3d968589d8 2768 * @name Register AIPS_PACRC, field TP0[28] (RW)
Kojto 90:cb3d968589d8 2769 *
Kojto 90:cb3d968589d8 2770 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 2771 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 2772 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 2773 *
Kojto 90:cb3d968589d8 2774 * Values:
Kojto 90:cb3d968589d8 2775 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 2776 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 2777 */
Kojto 90:cb3d968589d8 2778 /*@{*/
Kojto 90:cb3d968589d8 2779 #define BP_AIPS_PACRC_TP0 (28U) /*!< Bit position for AIPS_PACRC_TP0. */
Kojto 90:cb3d968589d8 2780 #define BM_AIPS_PACRC_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRC_TP0. */
Kojto 90:cb3d968589d8 2781 #define BS_AIPS_PACRC_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRC_TP0. */
Kojto 90:cb3d968589d8 2782
Kojto 90:cb3d968589d8 2783 /*! @brief Read current value of the AIPS_PACRC_TP0 field. */
Kojto 90:cb3d968589d8 2784 #define BR_AIPS_PACRC_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP0))
Kojto 90:cb3d968589d8 2785
Kojto 90:cb3d968589d8 2786 /*! @brief Format value for bitfield AIPS_PACRC_TP0. */
Kojto 90:cb3d968589d8 2787 #define BF_AIPS_PACRC_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_TP0) & BM_AIPS_PACRC_TP0)
Kojto 90:cb3d968589d8 2788
Kojto 90:cb3d968589d8 2789 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 2790 #define BW_AIPS_PACRC_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP0) = (v))
Kojto 90:cb3d968589d8 2791 /*@}*/
Kojto 90:cb3d968589d8 2792
Kojto 90:cb3d968589d8 2793 /*!
Kojto 90:cb3d968589d8 2794 * @name Register AIPS_PACRC, field WP0[29] (RW)
Kojto 90:cb3d968589d8 2795 *
Kojto 90:cb3d968589d8 2796 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 2797 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 2798 * no peripheral access initiates.
Kojto 90:cb3d968589d8 2799 *
Kojto 90:cb3d968589d8 2800 * Values:
Kojto 90:cb3d968589d8 2801 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 2802 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 2803 */
Kojto 90:cb3d968589d8 2804 /*@{*/
Kojto 90:cb3d968589d8 2805 #define BP_AIPS_PACRC_WP0 (29U) /*!< Bit position for AIPS_PACRC_WP0. */
Kojto 90:cb3d968589d8 2806 #define BM_AIPS_PACRC_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRC_WP0. */
Kojto 90:cb3d968589d8 2807 #define BS_AIPS_PACRC_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRC_WP0. */
Kojto 90:cb3d968589d8 2808
Kojto 90:cb3d968589d8 2809 /*! @brief Read current value of the AIPS_PACRC_WP0 field. */
Kojto 90:cb3d968589d8 2810 #define BR_AIPS_PACRC_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP0))
Kojto 90:cb3d968589d8 2811
Kojto 90:cb3d968589d8 2812 /*! @brief Format value for bitfield AIPS_PACRC_WP0. */
Kojto 90:cb3d968589d8 2813 #define BF_AIPS_PACRC_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_WP0) & BM_AIPS_PACRC_WP0)
Kojto 90:cb3d968589d8 2814
Kojto 90:cb3d968589d8 2815 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 2816 #define BW_AIPS_PACRC_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP0) = (v))
Kojto 90:cb3d968589d8 2817 /*@}*/
Kojto 90:cb3d968589d8 2818
Kojto 90:cb3d968589d8 2819 /*!
Kojto 90:cb3d968589d8 2820 * @name Register AIPS_PACRC, field SP0[30] (RW)
Kojto 90:cb3d968589d8 2821 *
Kojto 90:cb3d968589d8 2822 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 2823 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 2824 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 2825 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 2826 * access initiates.
Kojto 90:cb3d968589d8 2827 *
Kojto 90:cb3d968589d8 2828 * Values:
Kojto 90:cb3d968589d8 2829 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 2830 * accesses.
Kojto 90:cb3d968589d8 2831 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 2832 */
Kojto 90:cb3d968589d8 2833 /*@{*/
Kojto 90:cb3d968589d8 2834 #define BP_AIPS_PACRC_SP0 (30U) /*!< Bit position for AIPS_PACRC_SP0. */
Kojto 90:cb3d968589d8 2835 #define BM_AIPS_PACRC_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRC_SP0. */
Kojto 90:cb3d968589d8 2836 #define BS_AIPS_PACRC_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRC_SP0. */
Kojto 90:cb3d968589d8 2837
Kojto 90:cb3d968589d8 2838 /*! @brief Read current value of the AIPS_PACRC_SP0 field. */
Kojto 90:cb3d968589d8 2839 #define BR_AIPS_PACRC_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP0))
Kojto 90:cb3d968589d8 2840
Kojto 90:cb3d968589d8 2841 /*! @brief Format value for bitfield AIPS_PACRC_SP0. */
Kojto 90:cb3d968589d8 2842 #define BF_AIPS_PACRC_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRC_SP0) & BM_AIPS_PACRC_SP0)
Kojto 90:cb3d968589d8 2843
Kojto 90:cb3d968589d8 2844 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 2845 #define BW_AIPS_PACRC_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP0) = (v))
Kojto 90:cb3d968589d8 2846 /*@}*/
Kojto 90:cb3d968589d8 2847
Kojto 90:cb3d968589d8 2848 /*******************************************************************************
Kojto 90:cb3d968589d8 2849 * HW_AIPS_PACRD - Peripheral Access Control Register
Kojto 90:cb3d968589d8 2850 ******************************************************************************/
Kojto 90:cb3d968589d8 2851
Kojto 90:cb3d968589d8 2852 /*!
Kojto 90:cb3d968589d8 2853 * @brief HW_AIPS_PACRD - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 2854 *
Kojto 90:cb3d968589d8 2855 * Reset value: 0x00000004U
Kojto 90:cb3d968589d8 2856 *
Kojto 90:cb3d968589d8 2857 * Each PACR register consists of eight 4-bit PACR fields. Each PACR field
Kojto 90:cb3d968589d8 2858 * defines the access levels for a particular peripheral. The mapping between a
Kojto 90:cb3d968589d8 2859 * peripheral and its PACR field is shown in the table below. The peripheral assignment
Kojto 90:cb3d968589d8 2860 * to each PACR is defined by the memory map slot that the peripheral is
Kojto 90:cb3d968589d8 2861 * assigned to. See this chip's memory map for the assignment of a particular
Kojto 90:cb3d968589d8 2862 * peripheral. The following table shows the location of each peripheral slot's PACR field
Kojto 90:cb3d968589d8 2863 * in the PACR registers. Offset Register [31:28] [27:24] [23:20] [19:16] [15:12]
Kojto 90:cb3d968589d8 2864 * [11:8] [7:4] [3:0] 0x20 PACRA PACR0 PACR1 PACR2 PACR3 PACR4 PACR5 PACR6 PACR7
Kojto 90:cb3d968589d8 2865 * 0x24 PACRB PACR8 PACR9 PACR10 PACR11 PACR12 PACR13 PACR14 PACR15 0x28 PACRC
Kojto 90:cb3d968589d8 2866 * PACR16 PACR17 PACR18 PACR19 PACR20 PACR21 PACR22 PACR23 0x2C PACRD PACR24
Kojto 90:cb3d968589d8 2867 * PACR25 PACR26 PACR27 PACR28 PACR29 PACR30 PACR31 0x30 Reserved 0x34 Reserved 0x38
Kojto 90:cb3d968589d8 2868 * Reserved 0x3C Reserved 0x40 PACRE PACR32 PACR33 PACR34 PACR35 PACR36 PACR37
Kojto 90:cb3d968589d8 2869 * PACR38 PACR39 0x44 PACRF PACR40 PACR41 PACR42 PACR43 PACR44 PACR45 PACR46 PACR47
Kojto 90:cb3d968589d8 2870 * 0x48 PACRG PACR48 PACR49 PACR50 PACR51 PACR52 PACR53 PACR54 PACR55 0x4C PACRH
Kojto 90:cb3d968589d8 2871 * PACR56 PACR57 PACR58 PACR59 PACR60 PACR61 PACR62 PACR63 0x50 PACRI PACR64
Kojto 90:cb3d968589d8 2872 * PACR65 PACR66 PACR67 PACR68 PACR69 PACR70 PACR71 0x54 PACRJ PACR72 PACR73 PACR74
Kojto 90:cb3d968589d8 2873 * PACR75 PACR76 PACR77 PACR78 PACR79 0x58 PACRK PACR80 PACR81 PACR82 PACR83
Kojto 90:cb3d968589d8 2874 * PACR84 PACR85 PACR86 PACR87 0x5C PACRL PACR88 PACR89 PACR90 PACR91 PACR92 PACR93
Kojto 90:cb3d968589d8 2875 * PACR94 PACR95 0x60 PACRM PACR96 PACR97 PACR98 PACR99 PACR100 PACR101 PACR102
Kojto 90:cb3d968589d8 2876 * PACR103 0x64 PACRN PACR104 PACR105 PACR106 PACR107 PACR108 PACR109 PACR110
Kojto 90:cb3d968589d8 2877 * PACR111 0x68 PACRO PACR112 PACR113 PACR114 PACR115 PACR116 PACR117 PACR118 PACR119
Kojto 90:cb3d968589d8 2878 * 0x6C PACRP PACR120 PACR121 PACR122 PACR123 PACR124 PACR125 PACR126 PACR127 0x80
Kojto 90:cb3d968589d8 2879 * PACRU PACR GBL0 PACR GBL1 Reserved The register field descriptions for PACR
Kojto 90:cb3d968589d8 2880 * A-D, which control peripheral slots 0-31, are shown below. The following
Kojto 90:cb3d968589d8 2881 * section, PACRPeripheral Access Control Register , shows the register field
Kojto 90:cb3d968589d8 2882 * descriptions for PACR E-P. All PACR registers are identical. They are divided into two
Kojto 90:cb3d968589d8 2883 * sections because they occupy two non-contiguous address spaces.
Kojto 90:cb3d968589d8 2884 */
Kojto 90:cb3d968589d8 2885 typedef union _hw_aips_pacrd
Kojto 90:cb3d968589d8 2886 {
Kojto 90:cb3d968589d8 2887 uint32_t U;
Kojto 90:cb3d968589d8 2888 struct _hw_aips_pacrd_bitfields
Kojto 90:cb3d968589d8 2889 {
Kojto 90:cb3d968589d8 2890 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 2891 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 2892 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 2893 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 2894 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 2895 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 2896 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 2897 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 2898 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 2899 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 2900 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 2901 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 2902 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 2903 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 2904 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 2905 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 2906 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 2907 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 2908 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 2909 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 2910 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 2911 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 2912 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 2913 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 2914 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 2915 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 2916 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 2917 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 2918 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 2919 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 2920 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 2921 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 2922 } B;
Kojto 90:cb3d968589d8 2923 } hw_aips_pacrd_t;
Kojto 90:cb3d968589d8 2924
Kojto 90:cb3d968589d8 2925 /*!
Kojto 90:cb3d968589d8 2926 * @name Constants and macros for entire AIPS_PACRD register
Kojto 90:cb3d968589d8 2927 */
Kojto 90:cb3d968589d8 2928 /*@{*/
Kojto 90:cb3d968589d8 2929 #define HW_AIPS_PACRD_ADDR(x) ((x) + 0x2CU)
Kojto 90:cb3d968589d8 2930
Kojto 90:cb3d968589d8 2931 #define HW_AIPS_PACRD(x) (*(__IO hw_aips_pacrd_t *) HW_AIPS_PACRD_ADDR(x))
Kojto 90:cb3d968589d8 2932 #define HW_AIPS_PACRD_RD(x) (HW_AIPS_PACRD(x).U)
Kojto 90:cb3d968589d8 2933 #define HW_AIPS_PACRD_WR(x, v) (HW_AIPS_PACRD(x).U = (v))
Kojto 90:cb3d968589d8 2934 #define HW_AIPS_PACRD_SET(x, v) (HW_AIPS_PACRD_WR(x, HW_AIPS_PACRD_RD(x) | (v)))
Kojto 90:cb3d968589d8 2935 #define HW_AIPS_PACRD_CLR(x, v) (HW_AIPS_PACRD_WR(x, HW_AIPS_PACRD_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 2936 #define HW_AIPS_PACRD_TOG(x, v) (HW_AIPS_PACRD_WR(x, HW_AIPS_PACRD_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 2937 /*@}*/
Kojto 90:cb3d968589d8 2938
Kojto 90:cb3d968589d8 2939 /*
Kojto 90:cb3d968589d8 2940 * Constants & macros for individual AIPS_PACRD bitfields
Kojto 90:cb3d968589d8 2941 */
Kojto 90:cb3d968589d8 2942
Kojto 90:cb3d968589d8 2943 /*!
Kojto 90:cb3d968589d8 2944 * @name Register AIPS_PACRD, field TP7[0] (RW)
Kojto 90:cb3d968589d8 2945 *
Kojto 90:cb3d968589d8 2946 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 2947 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 2948 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 2949 *
Kojto 90:cb3d968589d8 2950 * Values:
Kojto 90:cb3d968589d8 2951 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 2952 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 2953 */
Kojto 90:cb3d968589d8 2954 /*@{*/
Kojto 90:cb3d968589d8 2955 #define BP_AIPS_PACRD_TP7 (0U) /*!< Bit position for AIPS_PACRD_TP7. */
Kojto 90:cb3d968589d8 2956 #define BM_AIPS_PACRD_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRD_TP7. */
Kojto 90:cb3d968589d8 2957 #define BS_AIPS_PACRD_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP7. */
Kojto 90:cb3d968589d8 2958
Kojto 90:cb3d968589d8 2959 /*! @brief Read current value of the AIPS_PACRD_TP7 field. */
Kojto 90:cb3d968589d8 2960 #define BR_AIPS_PACRD_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP7))
Kojto 90:cb3d968589d8 2961
Kojto 90:cb3d968589d8 2962 /*! @brief Format value for bitfield AIPS_PACRD_TP7. */
Kojto 90:cb3d968589d8 2963 #define BF_AIPS_PACRD_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP7) & BM_AIPS_PACRD_TP7)
Kojto 90:cb3d968589d8 2964
Kojto 90:cb3d968589d8 2965 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 2966 #define BW_AIPS_PACRD_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP7) = (v))
Kojto 90:cb3d968589d8 2967 /*@}*/
Kojto 90:cb3d968589d8 2968
Kojto 90:cb3d968589d8 2969 /*!
Kojto 90:cb3d968589d8 2970 * @name Register AIPS_PACRD, field WP7[1] (RW)
Kojto 90:cb3d968589d8 2971 *
Kojto 90:cb3d968589d8 2972 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 2973 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 2974 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 2975 *
Kojto 90:cb3d968589d8 2976 * Values:
Kojto 90:cb3d968589d8 2977 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 2978 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 2979 */
Kojto 90:cb3d968589d8 2980 /*@{*/
Kojto 90:cb3d968589d8 2981 #define BP_AIPS_PACRD_WP7 (1U) /*!< Bit position for AIPS_PACRD_WP7. */
Kojto 90:cb3d968589d8 2982 #define BM_AIPS_PACRD_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRD_WP7. */
Kojto 90:cb3d968589d8 2983 #define BS_AIPS_PACRD_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP7. */
Kojto 90:cb3d968589d8 2984
Kojto 90:cb3d968589d8 2985 /*! @brief Read current value of the AIPS_PACRD_WP7 field. */
Kojto 90:cb3d968589d8 2986 #define BR_AIPS_PACRD_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP7))
Kojto 90:cb3d968589d8 2987
Kojto 90:cb3d968589d8 2988 /*! @brief Format value for bitfield AIPS_PACRD_WP7. */
Kojto 90:cb3d968589d8 2989 #define BF_AIPS_PACRD_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP7) & BM_AIPS_PACRD_WP7)
Kojto 90:cb3d968589d8 2990
Kojto 90:cb3d968589d8 2991 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 2992 #define BW_AIPS_PACRD_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP7) = (v))
Kojto 90:cb3d968589d8 2993 /*@}*/
Kojto 90:cb3d968589d8 2994
Kojto 90:cb3d968589d8 2995 /*!
Kojto 90:cb3d968589d8 2996 * @name Register AIPS_PACRD, field SP7[2] (RW)
Kojto 90:cb3d968589d8 2997 *
Kojto 90:cb3d968589d8 2998 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 2999 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3000 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 3001 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 3002 * access initiates.
Kojto 90:cb3d968589d8 3003 *
Kojto 90:cb3d968589d8 3004 * Values:
Kojto 90:cb3d968589d8 3005 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3006 * accesses.
Kojto 90:cb3d968589d8 3007 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3008 */
Kojto 90:cb3d968589d8 3009 /*@{*/
Kojto 90:cb3d968589d8 3010 #define BP_AIPS_PACRD_SP7 (2U) /*!< Bit position for AIPS_PACRD_SP7. */
Kojto 90:cb3d968589d8 3011 #define BM_AIPS_PACRD_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRD_SP7. */
Kojto 90:cb3d968589d8 3012 #define BS_AIPS_PACRD_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP7. */
Kojto 90:cb3d968589d8 3013
Kojto 90:cb3d968589d8 3014 /*! @brief Read current value of the AIPS_PACRD_SP7 field. */
Kojto 90:cb3d968589d8 3015 #define BR_AIPS_PACRD_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP7))
Kojto 90:cb3d968589d8 3016
Kojto 90:cb3d968589d8 3017 /*! @brief Format value for bitfield AIPS_PACRD_SP7. */
Kojto 90:cb3d968589d8 3018 #define BF_AIPS_PACRD_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP7) & BM_AIPS_PACRD_SP7)
Kojto 90:cb3d968589d8 3019
Kojto 90:cb3d968589d8 3020 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 3021 #define BW_AIPS_PACRD_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP7) = (v))
Kojto 90:cb3d968589d8 3022 /*@}*/
Kojto 90:cb3d968589d8 3023
Kojto 90:cb3d968589d8 3024 /*!
Kojto 90:cb3d968589d8 3025 * @name Register AIPS_PACRD, field TP6[4] (RW)
Kojto 90:cb3d968589d8 3026 *
Kojto 90:cb3d968589d8 3027 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3028 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3029 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3030 *
Kojto 90:cb3d968589d8 3031 * Values:
Kojto 90:cb3d968589d8 3032 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3033 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3034 */
Kojto 90:cb3d968589d8 3035 /*@{*/
Kojto 90:cb3d968589d8 3036 #define BP_AIPS_PACRD_TP6 (4U) /*!< Bit position for AIPS_PACRD_TP6. */
Kojto 90:cb3d968589d8 3037 #define BM_AIPS_PACRD_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRD_TP6. */
Kojto 90:cb3d968589d8 3038 #define BS_AIPS_PACRD_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP6. */
Kojto 90:cb3d968589d8 3039
Kojto 90:cb3d968589d8 3040 /*! @brief Read current value of the AIPS_PACRD_TP6 field. */
Kojto 90:cb3d968589d8 3041 #define BR_AIPS_PACRD_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP6))
Kojto 90:cb3d968589d8 3042
Kojto 90:cb3d968589d8 3043 /*! @brief Format value for bitfield AIPS_PACRD_TP6. */
Kojto 90:cb3d968589d8 3044 #define BF_AIPS_PACRD_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP6) & BM_AIPS_PACRD_TP6)
Kojto 90:cb3d968589d8 3045
Kojto 90:cb3d968589d8 3046 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 3047 #define BW_AIPS_PACRD_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP6) = (v))
Kojto 90:cb3d968589d8 3048 /*@}*/
Kojto 90:cb3d968589d8 3049
Kojto 90:cb3d968589d8 3050 /*!
Kojto 90:cb3d968589d8 3051 * @name Register AIPS_PACRD, field WP6[5] (RW)
Kojto 90:cb3d968589d8 3052 *
Kojto 90:cb3d968589d8 3053 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 3054 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 3055 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 3056 *
Kojto 90:cb3d968589d8 3057 * Values:
Kojto 90:cb3d968589d8 3058 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3059 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3060 */
Kojto 90:cb3d968589d8 3061 /*@{*/
Kojto 90:cb3d968589d8 3062 #define BP_AIPS_PACRD_WP6 (5U) /*!< Bit position for AIPS_PACRD_WP6. */
Kojto 90:cb3d968589d8 3063 #define BM_AIPS_PACRD_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRD_WP6. */
Kojto 90:cb3d968589d8 3064 #define BS_AIPS_PACRD_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP6. */
Kojto 90:cb3d968589d8 3065
Kojto 90:cb3d968589d8 3066 /*! @brief Read current value of the AIPS_PACRD_WP6 field. */
Kojto 90:cb3d968589d8 3067 #define BR_AIPS_PACRD_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP6))
Kojto 90:cb3d968589d8 3068
Kojto 90:cb3d968589d8 3069 /*! @brief Format value for bitfield AIPS_PACRD_WP6. */
Kojto 90:cb3d968589d8 3070 #define BF_AIPS_PACRD_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP6) & BM_AIPS_PACRD_WP6)
Kojto 90:cb3d968589d8 3071
Kojto 90:cb3d968589d8 3072 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 3073 #define BW_AIPS_PACRD_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP6) = (v))
Kojto 90:cb3d968589d8 3074 /*@}*/
Kojto 90:cb3d968589d8 3075
Kojto 90:cb3d968589d8 3076 /*!
Kojto 90:cb3d968589d8 3077 * @name Register AIPS_PACRD, field SP6[6] (RW)
Kojto 90:cb3d968589d8 3078 *
Kojto 90:cb3d968589d8 3079 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3080 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3081 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 3082 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 3083 * access initiates.
Kojto 90:cb3d968589d8 3084 *
Kojto 90:cb3d968589d8 3085 * Values:
Kojto 90:cb3d968589d8 3086 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3087 * accesses.
Kojto 90:cb3d968589d8 3088 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3089 */
Kojto 90:cb3d968589d8 3090 /*@{*/
Kojto 90:cb3d968589d8 3091 #define BP_AIPS_PACRD_SP6 (6U) /*!< Bit position for AIPS_PACRD_SP6. */
Kojto 90:cb3d968589d8 3092 #define BM_AIPS_PACRD_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRD_SP6. */
Kojto 90:cb3d968589d8 3093 #define BS_AIPS_PACRD_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP6. */
Kojto 90:cb3d968589d8 3094
Kojto 90:cb3d968589d8 3095 /*! @brief Read current value of the AIPS_PACRD_SP6 field. */
Kojto 90:cb3d968589d8 3096 #define BR_AIPS_PACRD_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP6))
Kojto 90:cb3d968589d8 3097
Kojto 90:cb3d968589d8 3098 /*! @brief Format value for bitfield AIPS_PACRD_SP6. */
Kojto 90:cb3d968589d8 3099 #define BF_AIPS_PACRD_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP6) & BM_AIPS_PACRD_SP6)
Kojto 90:cb3d968589d8 3100
Kojto 90:cb3d968589d8 3101 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 3102 #define BW_AIPS_PACRD_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP6) = (v))
Kojto 90:cb3d968589d8 3103 /*@}*/
Kojto 90:cb3d968589d8 3104
Kojto 90:cb3d968589d8 3105 /*!
Kojto 90:cb3d968589d8 3106 * @name Register AIPS_PACRD, field TP5[8] (RW)
Kojto 90:cb3d968589d8 3107 *
Kojto 90:cb3d968589d8 3108 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3109 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3110 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3111 *
Kojto 90:cb3d968589d8 3112 * Values:
Kojto 90:cb3d968589d8 3113 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3114 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3115 */
Kojto 90:cb3d968589d8 3116 /*@{*/
Kojto 90:cb3d968589d8 3117 #define BP_AIPS_PACRD_TP5 (8U) /*!< Bit position for AIPS_PACRD_TP5. */
Kojto 90:cb3d968589d8 3118 #define BM_AIPS_PACRD_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRD_TP5. */
Kojto 90:cb3d968589d8 3119 #define BS_AIPS_PACRD_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP5. */
Kojto 90:cb3d968589d8 3120
Kojto 90:cb3d968589d8 3121 /*! @brief Read current value of the AIPS_PACRD_TP5 field. */
Kojto 90:cb3d968589d8 3122 #define BR_AIPS_PACRD_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP5))
Kojto 90:cb3d968589d8 3123
Kojto 90:cb3d968589d8 3124 /*! @brief Format value for bitfield AIPS_PACRD_TP5. */
Kojto 90:cb3d968589d8 3125 #define BF_AIPS_PACRD_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP5) & BM_AIPS_PACRD_TP5)
Kojto 90:cb3d968589d8 3126
Kojto 90:cb3d968589d8 3127 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 3128 #define BW_AIPS_PACRD_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP5) = (v))
Kojto 90:cb3d968589d8 3129 /*@}*/
Kojto 90:cb3d968589d8 3130
Kojto 90:cb3d968589d8 3131 /*!
Kojto 90:cb3d968589d8 3132 * @name Register AIPS_PACRD, field WP5[9] (RW)
Kojto 90:cb3d968589d8 3133 *
Kojto 90:cb3d968589d8 3134 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 3135 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 3136 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 3137 *
Kojto 90:cb3d968589d8 3138 * Values:
Kojto 90:cb3d968589d8 3139 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3140 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3141 */
Kojto 90:cb3d968589d8 3142 /*@{*/
Kojto 90:cb3d968589d8 3143 #define BP_AIPS_PACRD_WP5 (9U) /*!< Bit position for AIPS_PACRD_WP5. */
Kojto 90:cb3d968589d8 3144 #define BM_AIPS_PACRD_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRD_WP5. */
Kojto 90:cb3d968589d8 3145 #define BS_AIPS_PACRD_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP5. */
Kojto 90:cb3d968589d8 3146
Kojto 90:cb3d968589d8 3147 /*! @brief Read current value of the AIPS_PACRD_WP5 field. */
Kojto 90:cb3d968589d8 3148 #define BR_AIPS_PACRD_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP5))
Kojto 90:cb3d968589d8 3149
Kojto 90:cb3d968589d8 3150 /*! @brief Format value for bitfield AIPS_PACRD_WP5. */
Kojto 90:cb3d968589d8 3151 #define BF_AIPS_PACRD_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP5) & BM_AIPS_PACRD_WP5)
Kojto 90:cb3d968589d8 3152
Kojto 90:cb3d968589d8 3153 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 3154 #define BW_AIPS_PACRD_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP5) = (v))
Kojto 90:cb3d968589d8 3155 /*@}*/
Kojto 90:cb3d968589d8 3156
Kojto 90:cb3d968589d8 3157 /*!
Kojto 90:cb3d968589d8 3158 * @name Register AIPS_PACRD, field SP5[10] (RW)
Kojto 90:cb3d968589d8 3159 *
Kojto 90:cb3d968589d8 3160 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3161 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3162 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 3163 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 3164 * access initiates.
Kojto 90:cb3d968589d8 3165 *
Kojto 90:cb3d968589d8 3166 * Values:
Kojto 90:cb3d968589d8 3167 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3168 * accesses.
Kojto 90:cb3d968589d8 3169 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3170 */
Kojto 90:cb3d968589d8 3171 /*@{*/
Kojto 90:cb3d968589d8 3172 #define BP_AIPS_PACRD_SP5 (10U) /*!< Bit position for AIPS_PACRD_SP5. */
Kojto 90:cb3d968589d8 3173 #define BM_AIPS_PACRD_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRD_SP5. */
Kojto 90:cb3d968589d8 3174 #define BS_AIPS_PACRD_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP5. */
Kojto 90:cb3d968589d8 3175
Kojto 90:cb3d968589d8 3176 /*! @brief Read current value of the AIPS_PACRD_SP5 field. */
Kojto 90:cb3d968589d8 3177 #define BR_AIPS_PACRD_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP5))
Kojto 90:cb3d968589d8 3178
Kojto 90:cb3d968589d8 3179 /*! @brief Format value for bitfield AIPS_PACRD_SP5. */
Kojto 90:cb3d968589d8 3180 #define BF_AIPS_PACRD_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP5) & BM_AIPS_PACRD_SP5)
Kojto 90:cb3d968589d8 3181
Kojto 90:cb3d968589d8 3182 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 3183 #define BW_AIPS_PACRD_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP5) = (v))
Kojto 90:cb3d968589d8 3184 /*@}*/
Kojto 90:cb3d968589d8 3185
Kojto 90:cb3d968589d8 3186 /*!
Kojto 90:cb3d968589d8 3187 * @name Register AIPS_PACRD, field TP4[12] (RW)
Kojto 90:cb3d968589d8 3188 *
Kojto 90:cb3d968589d8 3189 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3190 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3191 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3192 *
Kojto 90:cb3d968589d8 3193 * Values:
Kojto 90:cb3d968589d8 3194 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3195 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3196 */
Kojto 90:cb3d968589d8 3197 /*@{*/
Kojto 90:cb3d968589d8 3198 #define BP_AIPS_PACRD_TP4 (12U) /*!< Bit position for AIPS_PACRD_TP4. */
Kojto 90:cb3d968589d8 3199 #define BM_AIPS_PACRD_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRD_TP4. */
Kojto 90:cb3d968589d8 3200 #define BS_AIPS_PACRD_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP4. */
Kojto 90:cb3d968589d8 3201
Kojto 90:cb3d968589d8 3202 /*! @brief Read current value of the AIPS_PACRD_TP4 field. */
Kojto 90:cb3d968589d8 3203 #define BR_AIPS_PACRD_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP4))
Kojto 90:cb3d968589d8 3204
Kojto 90:cb3d968589d8 3205 /*! @brief Format value for bitfield AIPS_PACRD_TP4. */
Kojto 90:cb3d968589d8 3206 #define BF_AIPS_PACRD_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP4) & BM_AIPS_PACRD_TP4)
Kojto 90:cb3d968589d8 3207
Kojto 90:cb3d968589d8 3208 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 3209 #define BW_AIPS_PACRD_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP4) = (v))
Kojto 90:cb3d968589d8 3210 /*@}*/
Kojto 90:cb3d968589d8 3211
Kojto 90:cb3d968589d8 3212 /*!
Kojto 90:cb3d968589d8 3213 * @name Register AIPS_PACRD, field WP4[13] (RW)
Kojto 90:cb3d968589d8 3214 *
Kojto 90:cb3d968589d8 3215 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 3216 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 3217 * no peripheral access initiates.
Kojto 90:cb3d968589d8 3218 *
Kojto 90:cb3d968589d8 3219 * Values:
Kojto 90:cb3d968589d8 3220 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3221 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3222 */
Kojto 90:cb3d968589d8 3223 /*@{*/
Kojto 90:cb3d968589d8 3224 #define BP_AIPS_PACRD_WP4 (13U) /*!< Bit position for AIPS_PACRD_WP4. */
Kojto 90:cb3d968589d8 3225 #define BM_AIPS_PACRD_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRD_WP4. */
Kojto 90:cb3d968589d8 3226 #define BS_AIPS_PACRD_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP4. */
Kojto 90:cb3d968589d8 3227
Kojto 90:cb3d968589d8 3228 /*! @brief Read current value of the AIPS_PACRD_WP4 field. */
Kojto 90:cb3d968589d8 3229 #define BR_AIPS_PACRD_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP4))
Kojto 90:cb3d968589d8 3230
Kojto 90:cb3d968589d8 3231 /*! @brief Format value for bitfield AIPS_PACRD_WP4. */
Kojto 90:cb3d968589d8 3232 #define BF_AIPS_PACRD_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP4) & BM_AIPS_PACRD_WP4)
Kojto 90:cb3d968589d8 3233
Kojto 90:cb3d968589d8 3234 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 3235 #define BW_AIPS_PACRD_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP4) = (v))
Kojto 90:cb3d968589d8 3236 /*@}*/
Kojto 90:cb3d968589d8 3237
Kojto 90:cb3d968589d8 3238 /*!
Kojto 90:cb3d968589d8 3239 * @name Register AIPS_PACRD, field SP4[14] (RW)
Kojto 90:cb3d968589d8 3240 *
Kojto 90:cb3d968589d8 3241 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3242 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3243 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 3244 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 3245 * access initiates.
Kojto 90:cb3d968589d8 3246 *
Kojto 90:cb3d968589d8 3247 * Values:
Kojto 90:cb3d968589d8 3248 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3249 * accesses.
Kojto 90:cb3d968589d8 3250 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3251 */
Kojto 90:cb3d968589d8 3252 /*@{*/
Kojto 90:cb3d968589d8 3253 #define BP_AIPS_PACRD_SP4 (14U) /*!< Bit position for AIPS_PACRD_SP4. */
Kojto 90:cb3d968589d8 3254 #define BM_AIPS_PACRD_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRD_SP4. */
Kojto 90:cb3d968589d8 3255 #define BS_AIPS_PACRD_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP4. */
Kojto 90:cb3d968589d8 3256
Kojto 90:cb3d968589d8 3257 /*! @brief Read current value of the AIPS_PACRD_SP4 field. */
Kojto 90:cb3d968589d8 3258 #define BR_AIPS_PACRD_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP4))
Kojto 90:cb3d968589d8 3259
Kojto 90:cb3d968589d8 3260 /*! @brief Format value for bitfield AIPS_PACRD_SP4. */
Kojto 90:cb3d968589d8 3261 #define BF_AIPS_PACRD_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP4) & BM_AIPS_PACRD_SP4)
Kojto 90:cb3d968589d8 3262
Kojto 90:cb3d968589d8 3263 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 3264 #define BW_AIPS_PACRD_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP4) = (v))
Kojto 90:cb3d968589d8 3265 /*@}*/
Kojto 90:cb3d968589d8 3266
Kojto 90:cb3d968589d8 3267 /*!
Kojto 90:cb3d968589d8 3268 * @name Register AIPS_PACRD, field TP3[16] (RW)
Kojto 90:cb3d968589d8 3269 *
Kojto 90:cb3d968589d8 3270 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3271 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3272 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3273 *
Kojto 90:cb3d968589d8 3274 * Values:
Kojto 90:cb3d968589d8 3275 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3276 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3277 */
Kojto 90:cb3d968589d8 3278 /*@{*/
Kojto 90:cb3d968589d8 3279 #define BP_AIPS_PACRD_TP3 (16U) /*!< Bit position for AIPS_PACRD_TP3. */
Kojto 90:cb3d968589d8 3280 #define BM_AIPS_PACRD_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRD_TP3. */
Kojto 90:cb3d968589d8 3281 #define BS_AIPS_PACRD_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP3. */
Kojto 90:cb3d968589d8 3282
Kojto 90:cb3d968589d8 3283 /*! @brief Read current value of the AIPS_PACRD_TP3 field. */
Kojto 90:cb3d968589d8 3284 #define BR_AIPS_PACRD_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP3))
Kojto 90:cb3d968589d8 3285
Kojto 90:cb3d968589d8 3286 /*! @brief Format value for bitfield AIPS_PACRD_TP3. */
Kojto 90:cb3d968589d8 3287 #define BF_AIPS_PACRD_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP3) & BM_AIPS_PACRD_TP3)
Kojto 90:cb3d968589d8 3288
Kojto 90:cb3d968589d8 3289 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 3290 #define BW_AIPS_PACRD_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP3) = (v))
Kojto 90:cb3d968589d8 3291 /*@}*/
Kojto 90:cb3d968589d8 3292
Kojto 90:cb3d968589d8 3293 /*!
Kojto 90:cb3d968589d8 3294 * @name Register AIPS_PACRD, field WP3[17] (RW)
Kojto 90:cb3d968589d8 3295 *
Kojto 90:cb3d968589d8 3296 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 3297 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 3298 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 3299 *
Kojto 90:cb3d968589d8 3300 * Values:
Kojto 90:cb3d968589d8 3301 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3302 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3303 */
Kojto 90:cb3d968589d8 3304 /*@{*/
Kojto 90:cb3d968589d8 3305 #define BP_AIPS_PACRD_WP3 (17U) /*!< Bit position for AIPS_PACRD_WP3. */
Kojto 90:cb3d968589d8 3306 #define BM_AIPS_PACRD_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRD_WP3. */
Kojto 90:cb3d968589d8 3307 #define BS_AIPS_PACRD_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP3. */
Kojto 90:cb3d968589d8 3308
Kojto 90:cb3d968589d8 3309 /*! @brief Read current value of the AIPS_PACRD_WP3 field. */
Kojto 90:cb3d968589d8 3310 #define BR_AIPS_PACRD_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP3))
Kojto 90:cb3d968589d8 3311
Kojto 90:cb3d968589d8 3312 /*! @brief Format value for bitfield AIPS_PACRD_WP3. */
Kojto 90:cb3d968589d8 3313 #define BF_AIPS_PACRD_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP3) & BM_AIPS_PACRD_WP3)
Kojto 90:cb3d968589d8 3314
Kojto 90:cb3d968589d8 3315 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 3316 #define BW_AIPS_PACRD_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP3) = (v))
Kojto 90:cb3d968589d8 3317 /*@}*/
Kojto 90:cb3d968589d8 3318
Kojto 90:cb3d968589d8 3319 /*!
Kojto 90:cb3d968589d8 3320 * @name Register AIPS_PACRD, field SP3[18] (RW)
Kojto 90:cb3d968589d8 3321 *
Kojto 90:cb3d968589d8 3322 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3323 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3324 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 3325 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 3326 * initiates.
Kojto 90:cb3d968589d8 3327 *
Kojto 90:cb3d968589d8 3328 * Values:
Kojto 90:cb3d968589d8 3329 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3330 * accesses.
Kojto 90:cb3d968589d8 3331 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3332 */
Kojto 90:cb3d968589d8 3333 /*@{*/
Kojto 90:cb3d968589d8 3334 #define BP_AIPS_PACRD_SP3 (18U) /*!< Bit position for AIPS_PACRD_SP3. */
Kojto 90:cb3d968589d8 3335 #define BM_AIPS_PACRD_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRD_SP3. */
Kojto 90:cb3d968589d8 3336 #define BS_AIPS_PACRD_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP3. */
Kojto 90:cb3d968589d8 3337
Kojto 90:cb3d968589d8 3338 /*! @brief Read current value of the AIPS_PACRD_SP3 field. */
Kojto 90:cb3d968589d8 3339 #define BR_AIPS_PACRD_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP3))
Kojto 90:cb3d968589d8 3340
Kojto 90:cb3d968589d8 3341 /*! @brief Format value for bitfield AIPS_PACRD_SP3. */
Kojto 90:cb3d968589d8 3342 #define BF_AIPS_PACRD_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP3) & BM_AIPS_PACRD_SP3)
Kojto 90:cb3d968589d8 3343
Kojto 90:cb3d968589d8 3344 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 3345 #define BW_AIPS_PACRD_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP3) = (v))
Kojto 90:cb3d968589d8 3346 /*@}*/
Kojto 90:cb3d968589d8 3347
Kojto 90:cb3d968589d8 3348 /*!
Kojto 90:cb3d968589d8 3349 * @name Register AIPS_PACRD, field TP2[20] (RW)
Kojto 90:cb3d968589d8 3350 *
Kojto 90:cb3d968589d8 3351 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3352 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3353 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3354 *
Kojto 90:cb3d968589d8 3355 * Values:
Kojto 90:cb3d968589d8 3356 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3357 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3358 */
Kojto 90:cb3d968589d8 3359 /*@{*/
Kojto 90:cb3d968589d8 3360 #define BP_AIPS_PACRD_TP2 (20U) /*!< Bit position for AIPS_PACRD_TP2. */
Kojto 90:cb3d968589d8 3361 #define BM_AIPS_PACRD_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRD_TP2. */
Kojto 90:cb3d968589d8 3362 #define BS_AIPS_PACRD_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP2. */
Kojto 90:cb3d968589d8 3363
Kojto 90:cb3d968589d8 3364 /*! @brief Read current value of the AIPS_PACRD_TP2 field. */
Kojto 90:cb3d968589d8 3365 #define BR_AIPS_PACRD_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP2))
Kojto 90:cb3d968589d8 3366
Kojto 90:cb3d968589d8 3367 /*! @brief Format value for bitfield AIPS_PACRD_TP2. */
Kojto 90:cb3d968589d8 3368 #define BF_AIPS_PACRD_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP2) & BM_AIPS_PACRD_TP2)
Kojto 90:cb3d968589d8 3369
Kojto 90:cb3d968589d8 3370 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 3371 #define BW_AIPS_PACRD_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP2) = (v))
Kojto 90:cb3d968589d8 3372 /*@}*/
Kojto 90:cb3d968589d8 3373
Kojto 90:cb3d968589d8 3374 /*!
Kojto 90:cb3d968589d8 3375 * @name Register AIPS_PACRD, field WP2[21] (RW)
Kojto 90:cb3d968589d8 3376 *
Kojto 90:cb3d968589d8 3377 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 3378 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 3379 * no peripheral access initiates.
Kojto 90:cb3d968589d8 3380 *
Kojto 90:cb3d968589d8 3381 * Values:
Kojto 90:cb3d968589d8 3382 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3383 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3384 */
Kojto 90:cb3d968589d8 3385 /*@{*/
Kojto 90:cb3d968589d8 3386 #define BP_AIPS_PACRD_WP2 (21U) /*!< Bit position for AIPS_PACRD_WP2. */
Kojto 90:cb3d968589d8 3387 #define BM_AIPS_PACRD_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRD_WP2. */
Kojto 90:cb3d968589d8 3388 #define BS_AIPS_PACRD_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP2. */
Kojto 90:cb3d968589d8 3389
Kojto 90:cb3d968589d8 3390 /*! @brief Read current value of the AIPS_PACRD_WP2 field. */
Kojto 90:cb3d968589d8 3391 #define BR_AIPS_PACRD_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP2))
Kojto 90:cb3d968589d8 3392
Kojto 90:cb3d968589d8 3393 /*! @brief Format value for bitfield AIPS_PACRD_WP2. */
Kojto 90:cb3d968589d8 3394 #define BF_AIPS_PACRD_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP2) & BM_AIPS_PACRD_WP2)
Kojto 90:cb3d968589d8 3395
Kojto 90:cb3d968589d8 3396 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 3397 #define BW_AIPS_PACRD_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP2) = (v))
Kojto 90:cb3d968589d8 3398 /*@}*/
Kojto 90:cb3d968589d8 3399
Kojto 90:cb3d968589d8 3400 /*!
Kojto 90:cb3d968589d8 3401 * @name Register AIPS_PACRD, field SP2[22] (RW)
Kojto 90:cb3d968589d8 3402 *
Kojto 90:cb3d968589d8 3403 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3404 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3405 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 3406 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 3407 * access initiates.
Kojto 90:cb3d968589d8 3408 *
Kojto 90:cb3d968589d8 3409 * Values:
Kojto 90:cb3d968589d8 3410 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3411 * accesses.
Kojto 90:cb3d968589d8 3412 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3413 */
Kojto 90:cb3d968589d8 3414 /*@{*/
Kojto 90:cb3d968589d8 3415 #define BP_AIPS_PACRD_SP2 (22U) /*!< Bit position for AIPS_PACRD_SP2. */
Kojto 90:cb3d968589d8 3416 #define BM_AIPS_PACRD_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRD_SP2. */
Kojto 90:cb3d968589d8 3417 #define BS_AIPS_PACRD_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP2. */
Kojto 90:cb3d968589d8 3418
Kojto 90:cb3d968589d8 3419 /*! @brief Read current value of the AIPS_PACRD_SP2 field. */
Kojto 90:cb3d968589d8 3420 #define BR_AIPS_PACRD_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP2))
Kojto 90:cb3d968589d8 3421
Kojto 90:cb3d968589d8 3422 /*! @brief Format value for bitfield AIPS_PACRD_SP2. */
Kojto 90:cb3d968589d8 3423 #define BF_AIPS_PACRD_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP2) & BM_AIPS_PACRD_SP2)
Kojto 90:cb3d968589d8 3424
Kojto 90:cb3d968589d8 3425 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 3426 #define BW_AIPS_PACRD_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP2) = (v))
Kojto 90:cb3d968589d8 3427 /*@}*/
Kojto 90:cb3d968589d8 3428
Kojto 90:cb3d968589d8 3429 /*!
Kojto 90:cb3d968589d8 3430 * @name Register AIPS_PACRD, field TP1[24] (RW)
Kojto 90:cb3d968589d8 3431 *
Kojto 90:cb3d968589d8 3432 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3433 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3434 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3435 *
Kojto 90:cb3d968589d8 3436 * Values:
Kojto 90:cb3d968589d8 3437 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3438 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3439 */
Kojto 90:cb3d968589d8 3440 /*@{*/
Kojto 90:cb3d968589d8 3441 #define BP_AIPS_PACRD_TP1 (24U) /*!< Bit position for AIPS_PACRD_TP1. */
Kojto 90:cb3d968589d8 3442 #define BM_AIPS_PACRD_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRD_TP1. */
Kojto 90:cb3d968589d8 3443 #define BS_AIPS_PACRD_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP1. */
Kojto 90:cb3d968589d8 3444
Kojto 90:cb3d968589d8 3445 /*! @brief Read current value of the AIPS_PACRD_TP1 field. */
Kojto 90:cb3d968589d8 3446 #define BR_AIPS_PACRD_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP1))
Kojto 90:cb3d968589d8 3447
Kojto 90:cb3d968589d8 3448 /*! @brief Format value for bitfield AIPS_PACRD_TP1. */
Kojto 90:cb3d968589d8 3449 #define BF_AIPS_PACRD_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP1) & BM_AIPS_PACRD_TP1)
Kojto 90:cb3d968589d8 3450
Kojto 90:cb3d968589d8 3451 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 3452 #define BW_AIPS_PACRD_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP1) = (v))
Kojto 90:cb3d968589d8 3453 /*@}*/
Kojto 90:cb3d968589d8 3454
Kojto 90:cb3d968589d8 3455 /*!
Kojto 90:cb3d968589d8 3456 * @name Register AIPS_PACRD, field WP1[25] (RW)
Kojto 90:cb3d968589d8 3457 *
Kojto 90:cb3d968589d8 3458 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 3459 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 3460 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 3461 *
Kojto 90:cb3d968589d8 3462 * Values:
Kojto 90:cb3d968589d8 3463 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3464 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3465 */
Kojto 90:cb3d968589d8 3466 /*@{*/
Kojto 90:cb3d968589d8 3467 #define BP_AIPS_PACRD_WP1 (25U) /*!< Bit position for AIPS_PACRD_WP1. */
Kojto 90:cb3d968589d8 3468 #define BM_AIPS_PACRD_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRD_WP1. */
Kojto 90:cb3d968589d8 3469 #define BS_AIPS_PACRD_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP1. */
Kojto 90:cb3d968589d8 3470
Kojto 90:cb3d968589d8 3471 /*! @brief Read current value of the AIPS_PACRD_WP1 field. */
Kojto 90:cb3d968589d8 3472 #define BR_AIPS_PACRD_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP1))
Kojto 90:cb3d968589d8 3473
Kojto 90:cb3d968589d8 3474 /*! @brief Format value for bitfield AIPS_PACRD_WP1. */
Kojto 90:cb3d968589d8 3475 #define BF_AIPS_PACRD_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP1) & BM_AIPS_PACRD_WP1)
Kojto 90:cb3d968589d8 3476
Kojto 90:cb3d968589d8 3477 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 3478 #define BW_AIPS_PACRD_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP1) = (v))
Kojto 90:cb3d968589d8 3479 /*@}*/
Kojto 90:cb3d968589d8 3480
Kojto 90:cb3d968589d8 3481 /*!
Kojto 90:cb3d968589d8 3482 * @name Register AIPS_PACRD, field SP1[26] (RW)
Kojto 90:cb3d968589d8 3483 *
Kojto 90:cb3d968589d8 3484 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3485 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3486 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 3487 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 3488 * access initiates.
Kojto 90:cb3d968589d8 3489 *
Kojto 90:cb3d968589d8 3490 * Values:
Kojto 90:cb3d968589d8 3491 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3492 * accesses.
Kojto 90:cb3d968589d8 3493 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3494 */
Kojto 90:cb3d968589d8 3495 /*@{*/
Kojto 90:cb3d968589d8 3496 #define BP_AIPS_PACRD_SP1 (26U) /*!< Bit position for AIPS_PACRD_SP1. */
Kojto 90:cb3d968589d8 3497 #define BM_AIPS_PACRD_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRD_SP1. */
Kojto 90:cb3d968589d8 3498 #define BS_AIPS_PACRD_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP1. */
Kojto 90:cb3d968589d8 3499
Kojto 90:cb3d968589d8 3500 /*! @brief Read current value of the AIPS_PACRD_SP1 field. */
Kojto 90:cb3d968589d8 3501 #define BR_AIPS_PACRD_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP1))
Kojto 90:cb3d968589d8 3502
Kojto 90:cb3d968589d8 3503 /*! @brief Format value for bitfield AIPS_PACRD_SP1. */
Kojto 90:cb3d968589d8 3504 #define BF_AIPS_PACRD_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP1) & BM_AIPS_PACRD_SP1)
Kojto 90:cb3d968589d8 3505
Kojto 90:cb3d968589d8 3506 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 3507 #define BW_AIPS_PACRD_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP1) = (v))
Kojto 90:cb3d968589d8 3508 /*@}*/
Kojto 90:cb3d968589d8 3509
Kojto 90:cb3d968589d8 3510 /*!
Kojto 90:cb3d968589d8 3511 * @name Register AIPS_PACRD, field TP0[28] (RW)
Kojto 90:cb3d968589d8 3512 *
Kojto 90:cb3d968589d8 3513 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3514 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3515 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3516 *
Kojto 90:cb3d968589d8 3517 * Values:
Kojto 90:cb3d968589d8 3518 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3519 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3520 */
Kojto 90:cb3d968589d8 3521 /*@{*/
Kojto 90:cb3d968589d8 3522 #define BP_AIPS_PACRD_TP0 (28U) /*!< Bit position for AIPS_PACRD_TP0. */
Kojto 90:cb3d968589d8 3523 #define BM_AIPS_PACRD_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRD_TP0. */
Kojto 90:cb3d968589d8 3524 #define BS_AIPS_PACRD_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRD_TP0. */
Kojto 90:cb3d968589d8 3525
Kojto 90:cb3d968589d8 3526 /*! @brief Read current value of the AIPS_PACRD_TP0 field. */
Kojto 90:cb3d968589d8 3527 #define BR_AIPS_PACRD_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP0))
Kojto 90:cb3d968589d8 3528
Kojto 90:cb3d968589d8 3529 /*! @brief Format value for bitfield AIPS_PACRD_TP0. */
Kojto 90:cb3d968589d8 3530 #define BF_AIPS_PACRD_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_TP0) & BM_AIPS_PACRD_TP0)
Kojto 90:cb3d968589d8 3531
Kojto 90:cb3d968589d8 3532 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 3533 #define BW_AIPS_PACRD_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP0) = (v))
Kojto 90:cb3d968589d8 3534 /*@}*/
Kojto 90:cb3d968589d8 3535
Kojto 90:cb3d968589d8 3536 /*!
Kojto 90:cb3d968589d8 3537 * @name Register AIPS_PACRD, field WP0[29] (RW)
Kojto 90:cb3d968589d8 3538 *
Kojto 90:cb3d968589d8 3539 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 3540 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 3541 * no peripheral access initiates.
Kojto 90:cb3d968589d8 3542 *
Kojto 90:cb3d968589d8 3543 * Values:
Kojto 90:cb3d968589d8 3544 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3545 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3546 */
Kojto 90:cb3d968589d8 3547 /*@{*/
Kojto 90:cb3d968589d8 3548 #define BP_AIPS_PACRD_WP0 (29U) /*!< Bit position for AIPS_PACRD_WP0. */
Kojto 90:cb3d968589d8 3549 #define BM_AIPS_PACRD_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRD_WP0. */
Kojto 90:cb3d968589d8 3550 #define BS_AIPS_PACRD_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRD_WP0. */
Kojto 90:cb3d968589d8 3551
Kojto 90:cb3d968589d8 3552 /*! @brief Read current value of the AIPS_PACRD_WP0 field. */
Kojto 90:cb3d968589d8 3553 #define BR_AIPS_PACRD_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP0))
Kojto 90:cb3d968589d8 3554
Kojto 90:cb3d968589d8 3555 /*! @brief Format value for bitfield AIPS_PACRD_WP0. */
Kojto 90:cb3d968589d8 3556 #define BF_AIPS_PACRD_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_WP0) & BM_AIPS_PACRD_WP0)
Kojto 90:cb3d968589d8 3557
Kojto 90:cb3d968589d8 3558 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 3559 #define BW_AIPS_PACRD_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP0) = (v))
Kojto 90:cb3d968589d8 3560 /*@}*/
Kojto 90:cb3d968589d8 3561
Kojto 90:cb3d968589d8 3562 /*!
Kojto 90:cb3d968589d8 3563 * @name Register AIPS_PACRD, field SP0[30] (RW)
Kojto 90:cb3d968589d8 3564 *
Kojto 90:cb3d968589d8 3565 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3566 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3567 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 3568 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 3569 * access initiates.
Kojto 90:cb3d968589d8 3570 *
Kojto 90:cb3d968589d8 3571 * Values:
Kojto 90:cb3d968589d8 3572 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3573 * accesses.
Kojto 90:cb3d968589d8 3574 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3575 */
Kojto 90:cb3d968589d8 3576 /*@{*/
Kojto 90:cb3d968589d8 3577 #define BP_AIPS_PACRD_SP0 (30U) /*!< Bit position for AIPS_PACRD_SP0. */
Kojto 90:cb3d968589d8 3578 #define BM_AIPS_PACRD_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRD_SP0. */
Kojto 90:cb3d968589d8 3579 #define BS_AIPS_PACRD_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRD_SP0. */
Kojto 90:cb3d968589d8 3580
Kojto 90:cb3d968589d8 3581 /*! @brief Read current value of the AIPS_PACRD_SP0 field. */
Kojto 90:cb3d968589d8 3582 #define BR_AIPS_PACRD_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP0))
Kojto 90:cb3d968589d8 3583
Kojto 90:cb3d968589d8 3584 /*! @brief Format value for bitfield AIPS_PACRD_SP0. */
Kojto 90:cb3d968589d8 3585 #define BF_AIPS_PACRD_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRD_SP0) & BM_AIPS_PACRD_SP0)
Kojto 90:cb3d968589d8 3586
Kojto 90:cb3d968589d8 3587 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 3588 #define BW_AIPS_PACRD_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP0) = (v))
Kojto 90:cb3d968589d8 3589 /*@}*/
Kojto 90:cb3d968589d8 3590
Kojto 90:cb3d968589d8 3591 /*******************************************************************************
Kojto 90:cb3d968589d8 3592 * HW_AIPS_PACRE - Peripheral Access Control Register
Kojto 90:cb3d968589d8 3593 ******************************************************************************/
Kojto 90:cb3d968589d8 3594
Kojto 90:cb3d968589d8 3595 /*!
Kojto 90:cb3d968589d8 3596 * @brief HW_AIPS_PACRE - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 3597 *
Kojto 90:cb3d968589d8 3598 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 3599 *
Kojto 90:cb3d968589d8 3600 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 3601 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 3602 * registers.
Kojto 90:cb3d968589d8 3603 */
Kojto 90:cb3d968589d8 3604 typedef union _hw_aips_pacre
Kojto 90:cb3d968589d8 3605 {
Kojto 90:cb3d968589d8 3606 uint32_t U;
Kojto 90:cb3d968589d8 3607 struct _hw_aips_pacre_bitfields
Kojto 90:cb3d968589d8 3608 {
Kojto 90:cb3d968589d8 3609 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 3610 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 3611 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 3612 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 3613 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 3614 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 3615 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 3616 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 3617 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 3618 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 3619 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 3620 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 3621 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 3622 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 3623 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 3624 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 3625 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 3626 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 3627 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 3628 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 3629 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 3630 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 3631 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 3632 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 3633 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 3634 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 3635 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 3636 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 3637 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 3638 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 3639 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 3640 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 3641 } B;
Kojto 90:cb3d968589d8 3642 } hw_aips_pacre_t;
Kojto 90:cb3d968589d8 3643
Kojto 90:cb3d968589d8 3644 /*!
Kojto 90:cb3d968589d8 3645 * @name Constants and macros for entire AIPS_PACRE register
Kojto 90:cb3d968589d8 3646 */
Kojto 90:cb3d968589d8 3647 /*@{*/
Kojto 90:cb3d968589d8 3648 #define HW_AIPS_PACRE_ADDR(x) ((x) + 0x40U)
Kojto 90:cb3d968589d8 3649
Kojto 90:cb3d968589d8 3650 #define HW_AIPS_PACRE(x) (*(__IO hw_aips_pacre_t *) HW_AIPS_PACRE_ADDR(x))
Kojto 90:cb3d968589d8 3651 #define HW_AIPS_PACRE_RD(x) (HW_AIPS_PACRE(x).U)
Kojto 90:cb3d968589d8 3652 #define HW_AIPS_PACRE_WR(x, v) (HW_AIPS_PACRE(x).U = (v))
Kojto 90:cb3d968589d8 3653 #define HW_AIPS_PACRE_SET(x, v) (HW_AIPS_PACRE_WR(x, HW_AIPS_PACRE_RD(x) | (v)))
Kojto 90:cb3d968589d8 3654 #define HW_AIPS_PACRE_CLR(x, v) (HW_AIPS_PACRE_WR(x, HW_AIPS_PACRE_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 3655 #define HW_AIPS_PACRE_TOG(x, v) (HW_AIPS_PACRE_WR(x, HW_AIPS_PACRE_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 3656 /*@}*/
Kojto 90:cb3d968589d8 3657
Kojto 90:cb3d968589d8 3658 /*
Kojto 90:cb3d968589d8 3659 * Constants & macros for individual AIPS_PACRE bitfields
Kojto 90:cb3d968589d8 3660 */
Kojto 90:cb3d968589d8 3661
Kojto 90:cb3d968589d8 3662 /*!
Kojto 90:cb3d968589d8 3663 * @name Register AIPS_PACRE, field TP7[0] (RW)
Kojto 90:cb3d968589d8 3664 *
Kojto 90:cb3d968589d8 3665 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3666 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3667 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3668 *
Kojto 90:cb3d968589d8 3669 * Values:
Kojto 90:cb3d968589d8 3670 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3671 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3672 */
Kojto 90:cb3d968589d8 3673 /*@{*/
Kojto 90:cb3d968589d8 3674 #define BP_AIPS_PACRE_TP7 (0U) /*!< Bit position for AIPS_PACRE_TP7. */
Kojto 90:cb3d968589d8 3675 #define BM_AIPS_PACRE_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRE_TP7. */
Kojto 90:cb3d968589d8 3676 #define BS_AIPS_PACRE_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP7. */
Kojto 90:cb3d968589d8 3677
Kojto 90:cb3d968589d8 3678 /*! @brief Read current value of the AIPS_PACRE_TP7 field. */
Kojto 90:cb3d968589d8 3679 #define BR_AIPS_PACRE_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP7))
Kojto 90:cb3d968589d8 3680
Kojto 90:cb3d968589d8 3681 /*! @brief Format value for bitfield AIPS_PACRE_TP7. */
Kojto 90:cb3d968589d8 3682 #define BF_AIPS_PACRE_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP7) & BM_AIPS_PACRE_TP7)
Kojto 90:cb3d968589d8 3683
Kojto 90:cb3d968589d8 3684 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 3685 #define BW_AIPS_PACRE_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP7) = (v))
Kojto 90:cb3d968589d8 3686 /*@}*/
Kojto 90:cb3d968589d8 3687
Kojto 90:cb3d968589d8 3688 /*!
Kojto 90:cb3d968589d8 3689 * @name Register AIPS_PACRE, field WP7[1] (RW)
Kojto 90:cb3d968589d8 3690 *
Kojto 90:cb3d968589d8 3691 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 3692 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 3693 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 3694 *
Kojto 90:cb3d968589d8 3695 * Values:
Kojto 90:cb3d968589d8 3696 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3697 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3698 */
Kojto 90:cb3d968589d8 3699 /*@{*/
Kojto 90:cb3d968589d8 3700 #define BP_AIPS_PACRE_WP7 (1U) /*!< Bit position for AIPS_PACRE_WP7. */
Kojto 90:cb3d968589d8 3701 #define BM_AIPS_PACRE_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRE_WP7. */
Kojto 90:cb3d968589d8 3702 #define BS_AIPS_PACRE_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP7. */
Kojto 90:cb3d968589d8 3703
Kojto 90:cb3d968589d8 3704 /*! @brief Read current value of the AIPS_PACRE_WP7 field. */
Kojto 90:cb3d968589d8 3705 #define BR_AIPS_PACRE_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP7))
Kojto 90:cb3d968589d8 3706
Kojto 90:cb3d968589d8 3707 /*! @brief Format value for bitfield AIPS_PACRE_WP7. */
Kojto 90:cb3d968589d8 3708 #define BF_AIPS_PACRE_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP7) & BM_AIPS_PACRE_WP7)
Kojto 90:cb3d968589d8 3709
Kojto 90:cb3d968589d8 3710 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 3711 #define BW_AIPS_PACRE_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP7) = (v))
Kojto 90:cb3d968589d8 3712 /*@}*/
Kojto 90:cb3d968589d8 3713
Kojto 90:cb3d968589d8 3714 /*!
Kojto 90:cb3d968589d8 3715 * @name Register AIPS_PACRE, field SP7[2] (RW)
Kojto 90:cb3d968589d8 3716 *
Kojto 90:cb3d968589d8 3717 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3718 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3719 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 3720 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 3721 * access initiates.
Kojto 90:cb3d968589d8 3722 *
Kojto 90:cb3d968589d8 3723 * Values:
Kojto 90:cb3d968589d8 3724 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3725 * accesses.
Kojto 90:cb3d968589d8 3726 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3727 */
Kojto 90:cb3d968589d8 3728 /*@{*/
Kojto 90:cb3d968589d8 3729 #define BP_AIPS_PACRE_SP7 (2U) /*!< Bit position for AIPS_PACRE_SP7. */
Kojto 90:cb3d968589d8 3730 #define BM_AIPS_PACRE_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRE_SP7. */
Kojto 90:cb3d968589d8 3731 #define BS_AIPS_PACRE_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP7. */
Kojto 90:cb3d968589d8 3732
Kojto 90:cb3d968589d8 3733 /*! @brief Read current value of the AIPS_PACRE_SP7 field. */
Kojto 90:cb3d968589d8 3734 #define BR_AIPS_PACRE_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP7))
Kojto 90:cb3d968589d8 3735
Kojto 90:cb3d968589d8 3736 /*! @brief Format value for bitfield AIPS_PACRE_SP7. */
Kojto 90:cb3d968589d8 3737 #define BF_AIPS_PACRE_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP7) & BM_AIPS_PACRE_SP7)
Kojto 90:cb3d968589d8 3738
Kojto 90:cb3d968589d8 3739 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 3740 #define BW_AIPS_PACRE_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP7) = (v))
Kojto 90:cb3d968589d8 3741 /*@}*/
Kojto 90:cb3d968589d8 3742
Kojto 90:cb3d968589d8 3743 /*!
Kojto 90:cb3d968589d8 3744 * @name Register AIPS_PACRE, field TP6[4] (RW)
Kojto 90:cb3d968589d8 3745 *
Kojto 90:cb3d968589d8 3746 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3747 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3748 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3749 *
Kojto 90:cb3d968589d8 3750 * Values:
Kojto 90:cb3d968589d8 3751 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3752 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3753 */
Kojto 90:cb3d968589d8 3754 /*@{*/
Kojto 90:cb3d968589d8 3755 #define BP_AIPS_PACRE_TP6 (4U) /*!< Bit position for AIPS_PACRE_TP6. */
Kojto 90:cb3d968589d8 3756 #define BM_AIPS_PACRE_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRE_TP6. */
Kojto 90:cb3d968589d8 3757 #define BS_AIPS_PACRE_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP6. */
Kojto 90:cb3d968589d8 3758
Kojto 90:cb3d968589d8 3759 /*! @brief Read current value of the AIPS_PACRE_TP6 field. */
Kojto 90:cb3d968589d8 3760 #define BR_AIPS_PACRE_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP6))
Kojto 90:cb3d968589d8 3761
Kojto 90:cb3d968589d8 3762 /*! @brief Format value for bitfield AIPS_PACRE_TP6. */
Kojto 90:cb3d968589d8 3763 #define BF_AIPS_PACRE_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP6) & BM_AIPS_PACRE_TP6)
Kojto 90:cb3d968589d8 3764
Kojto 90:cb3d968589d8 3765 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 3766 #define BW_AIPS_PACRE_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP6) = (v))
Kojto 90:cb3d968589d8 3767 /*@}*/
Kojto 90:cb3d968589d8 3768
Kojto 90:cb3d968589d8 3769 /*!
Kojto 90:cb3d968589d8 3770 * @name Register AIPS_PACRE, field WP6[5] (RW)
Kojto 90:cb3d968589d8 3771 *
Kojto 90:cb3d968589d8 3772 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 3773 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 3774 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 3775 *
Kojto 90:cb3d968589d8 3776 * Values:
Kojto 90:cb3d968589d8 3777 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3778 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3779 */
Kojto 90:cb3d968589d8 3780 /*@{*/
Kojto 90:cb3d968589d8 3781 #define BP_AIPS_PACRE_WP6 (5U) /*!< Bit position for AIPS_PACRE_WP6. */
Kojto 90:cb3d968589d8 3782 #define BM_AIPS_PACRE_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRE_WP6. */
Kojto 90:cb3d968589d8 3783 #define BS_AIPS_PACRE_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP6. */
Kojto 90:cb3d968589d8 3784
Kojto 90:cb3d968589d8 3785 /*! @brief Read current value of the AIPS_PACRE_WP6 field. */
Kojto 90:cb3d968589d8 3786 #define BR_AIPS_PACRE_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP6))
Kojto 90:cb3d968589d8 3787
Kojto 90:cb3d968589d8 3788 /*! @brief Format value for bitfield AIPS_PACRE_WP6. */
Kojto 90:cb3d968589d8 3789 #define BF_AIPS_PACRE_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP6) & BM_AIPS_PACRE_WP6)
Kojto 90:cb3d968589d8 3790
Kojto 90:cb3d968589d8 3791 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 3792 #define BW_AIPS_PACRE_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP6) = (v))
Kojto 90:cb3d968589d8 3793 /*@}*/
Kojto 90:cb3d968589d8 3794
Kojto 90:cb3d968589d8 3795 /*!
Kojto 90:cb3d968589d8 3796 * @name Register AIPS_PACRE, field SP6[6] (RW)
Kojto 90:cb3d968589d8 3797 *
Kojto 90:cb3d968589d8 3798 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3799 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3800 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 3801 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 3802 * access initiates.
Kojto 90:cb3d968589d8 3803 *
Kojto 90:cb3d968589d8 3804 * Values:
Kojto 90:cb3d968589d8 3805 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3806 * accesses.
Kojto 90:cb3d968589d8 3807 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3808 */
Kojto 90:cb3d968589d8 3809 /*@{*/
Kojto 90:cb3d968589d8 3810 #define BP_AIPS_PACRE_SP6 (6U) /*!< Bit position for AIPS_PACRE_SP6. */
Kojto 90:cb3d968589d8 3811 #define BM_AIPS_PACRE_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRE_SP6. */
Kojto 90:cb3d968589d8 3812 #define BS_AIPS_PACRE_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP6. */
Kojto 90:cb3d968589d8 3813
Kojto 90:cb3d968589d8 3814 /*! @brief Read current value of the AIPS_PACRE_SP6 field. */
Kojto 90:cb3d968589d8 3815 #define BR_AIPS_PACRE_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP6))
Kojto 90:cb3d968589d8 3816
Kojto 90:cb3d968589d8 3817 /*! @brief Format value for bitfield AIPS_PACRE_SP6. */
Kojto 90:cb3d968589d8 3818 #define BF_AIPS_PACRE_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP6) & BM_AIPS_PACRE_SP6)
Kojto 90:cb3d968589d8 3819
Kojto 90:cb3d968589d8 3820 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 3821 #define BW_AIPS_PACRE_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP6) = (v))
Kojto 90:cb3d968589d8 3822 /*@}*/
Kojto 90:cb3d968589d8 3823
Kojto 90:cb3d968589d8 3824 /*!
Kojto 90:cb3d968589d8 3825 * @name Register AIPS_PACRE, field TP5[8] (RW)
Kojto 90:cb3d968589d8 3826 *
Kojto 90:cb3d968589d8 3827 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3828 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3829 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3830 *
Kojto 90:cb3d968589d8 3831 * Values:
Kojto 90:cb3d968589d8 3832 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3833 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3834 */
Kojto 90:cb3d968589d8 3835 /*@{*/
Kojto 90:cb3d968589d8 3836 #define BP_AIPS_PACRE_TP5 (8U) /*!< Bit position for AIPS_PACRE_TP5. */
Kojto 90:cb3d968589d8 3837 #define BM_AIPS_PACRE_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRE_TP5. */
Kojto 90:cb3d968589d8 3838 #define BS_AIPS_PACRE_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP5. */
Kojto 90:cb3d968589d8 3839
Kojto 90:cb3d968589d8 3840 /*! @brief Read current value of the AIPS_PACRE_TP5 field. */
Kojto 90:cb3d968589d8 3841 #define BR_AIPS_PACRE_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP5))
Kojto 90:cb3d968589d8 3842
Kojto 90:cb3d968589d8 3843 /*! @brief Format value for bitfield AIPS_PACRE_TP5. */
Kojto 90:cb3d968589d8 3844 #define BF_AIPS_PACRE_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP5) & BM_AIPS_PACRE_TP5)
Kojto 90:cb3d968589d8 3845
Kojto 90:cb3d968589d8 3846 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 3847 #define BW_AIPS_PACRE_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP5) = (v))
Kojto 90:cb3d968589d8 3848 /*@}*/
Kojto 90:cb3d968589d8 3849
Kojto 90:cb3d968589d8 3850 /*!
Kojto 90:cb3d968589d8 3851 * @name Register AIPS_PACRE, field WP5[9] (RW)
Kojto 90:cb3d968589d8 3852 *
Kojto 90:cb3d968589d8 3853 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 3854 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 3855 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 3856 *
Kojto 90:cb3d968589d8 3857 * Values:
Kojto 90:cb3d968589d8 3858 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3859 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3860 */
Kojto 90:cb3d968589d8 3861 /*@{*/
Kojto 90:cb3d968589d8 3862 #define BP_AIPS_PACRE_WP5 (9U) /*!< Bit position for AIPS_PACRE_WP5. */
Kojto 90:cb3d968589d8 3863 #define BM_AIPS_PACRE_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRE_WP5. */
Kojto 90:cb3d968589d8 3864 #define BS_AIPS_PACRE_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP5. */
Kojto 90:cb3d968589d8 3865
Kojto 90:cb3d968589d8 3866 /*! @brief Read current value of the AIPS_PACRE_WP5 field. */
Kojto 90:cb3d968589d8 3867 #define BR_AIPS_PACRE_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP5))
Kojto 90:cb3d968589d8 3868
Kojto 90:cb3d968589d8 3869 /*! @brief Format value for bitfield AIPS_PACRE_WP5. */
Kojto 90:cb3d968589d8 3870 #define BF_AIPS_PACRE_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP5) & BM_AIPS_PACRE_WP5)
Kojto 90:cb3d968589d8 3871
Kojto 90:cb3d968589d8 3872 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 3873 #define BW_AIPS_PACRE_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP5) = (v))
Kojto 90:cb3d968589d8 3874 /*@}*/
Kojto 90:cb3d968589d8 3875
Kojto 90:cb3d968589d8 3876 /*!
Kojto 90:cb3d968589d8 3877 * @name Register AIPS_PACRE, field SP5[10] (RW)
Kojto 90:cb3d968589d8 3878 *
Kojto 90:cb3d968589d8 3879 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3880 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3881 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 3882 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 3883 * access initiates.
Kojto 90:cb3d968589d8 3884 *
Kojto 90:cb3d968589d8 3885 * Values:
Kojto 90:cb3d968589d8 3886 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3887 * accesses.
Kojto 90:cb3d968589d8 3888 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3889 */
Kojto 90:cb3d968589d8 3890 /*@{*/
Kojto 90:cb3d968589d8 3891 #define BP_AIPS_PACRE_SP5 (10U) /*!< Bit position for AIPS_PACRE_SP5. */
Kojto 90:cb3d968589d8 3892 #define BM_AIPS_PACRE_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRE_SP5. */
Kojto 90:cb3d968589d8 3893 #define BS_AIPS_PACRE_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP5. */
Kojto 90:cb3d968589d8 3894
Kojto 90:cb3d968589d8 3895 /*! @brief Read current value of the AIPS_PACRE_SP5 field. */
Kojto 90:cb3d968589d8 3896 #define BR_AIPS_PACRE_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP5))
Kojto 90:cb3d968589d8 3897
Kojto 90:cb3d968589d8 3898 /*! @brief Format value for bitfield AIPS_PACRE_SP5. */
Kojto 90:cb3d968589d8 3899 #define BF_AIPS_PACRE_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP5) & BM_AIPS_PACRE_SP5)
Kojto 90:cb3d968589d8 3900
Kojto 90:cb3d968589d8 3901 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 3902 #define BW_AIPS_PACRE_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP5) = (v))
Kojto 90:cb3d968589d8 3903 /*@}*/
Kojto 90:cb3d968589d8 3904
Kojto 90:cb3d968589d8 3905 /*!
Kojto 90:cb3d968589d8 3906 * @name Register AIPS_PACRE, field TP4[12] (RW)
Kojto 90:cb3d968589d8 3907 *
Kojto 90:cb3d968589d8 3908 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3909 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3910 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3911 *
Kojto 90:cb3d968589d8 3912 * Values:
Kojto 90:cb3d968589d8 3913 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3914 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3915 */
Kojto 90:cb3d968589d8 3916 /*@{*/
Kojto 90:cb3d968589d8 3917 #define BP_AIPS_PACRE_TP4 (12U) /*!< Bit position for AIPS_PACRE_TP4. */
Kojto 90:cb3d968589d8 3918 #define BM_AIPS_PACRE_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRE_TP4. */
Kojto 90:cb3d968589d8 3919 #define BS_AIPS_PACRE_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP4. */
Kojto 90:cb3d968589d8 3920
Kojto 90:cb3d968589d8 3921 /*! @brief Read current value of the AIPS_PACRE_TP4 field. */
Kojto 90:cb3d968589d8 3922 #define BR_AIPS_PACRE_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP4))
Kojto 90:cb3d968589d8 3923
Kojto 90:cb3d968589d8 3924 /*! @brief Format value for bitfield AIPS_PACRE_TP4. */
Kojto 90:cb3d968589d8 3925 #define BF_AIPS_PACRE_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP4) & BM_AIPS_PACRE_TP4)
Kojto 90:cb3d968589d8 3926
Kojto 90:cb3d968589d8 3927 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 3928 #define BW_AIPS_PACRE_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP4) = (v))
Kojto 90:cb3d968589d8 3929 /*@}*/
Kojto 90:cb3d968589d8 3930
Kojto 90:cb3d968589d8 3931 /*!
Kojto 90:cb3d968589d8 3932 * @name Register AIPS_PACRE, field WP4[13] (RW)
Kojto 90:cb3d968589d8 3933 *
Kojto 90:cb3d968589d8 3934 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 3935 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 3936 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 3937 *
Kojto 90:cb3d968589d8 3938 * Values:
Kojto 90:cb3d968589d8 3939 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 3940 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 3941 */
Kojto 90:cb3d968589d8 3942 /*@{*/
Kojto 90:cb3d968589d8 3943 #define BP_AIPS_PACRE_WP4 (13U) /*!< Bit position for AIPS_PACRE_WP4. */
Kojto 90:cb3d968589d8 3944 #define BM_AIPS_PACRE_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRE_WP4. */
Kojto 90:cb3d968589d8 3945 #define BS_AIPS_PACRE_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP4. */
Kojto 90:cb3d968589d8 3946
Kojto 90:cb3d968589d8 3947 /*! @brief Read current value of the AIPS_PACRE_WP4 field. */
Kojto 90:cb3d968589d8 3948 #define BR_AIPS_PACRE_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP4))
Kojto 90:cb3d968589d8 3949
Kojto 90:cb3d968589d8 3950 /*! @brief Format value for bitfield AIPS_PACRE_WP4. */
Kojto 90:cb3d968589d8 3951 #define BF_AIPS_PACRE_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP4) & BM_AIPS_PACRE_WP4)
Kojto 90:cb3d968589d8 3952
Kojto 90:cb3d968589d8 3953 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 3954 #define BW_AIPS_PACRE_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP4) = (v))
Kojto 90:cb3d968589d8 3955 /*@}*/
Kojto 90:cb3d968589d8 3956
Kojto 90:cb3d968589d8 3957 /*!
Kojto 90:cb3d968589d8 3958 * @name Register AIPS_PACRE, field SP4[14] (RW)
Kojto 90:cb3d968589d8 3959 *
Kojto 90:cb3d968589d8 3960 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 3961 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 3962 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 3963 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 3964 * initiates.
Kojto 90:cb3d968589d8 3965 *
Kojto 90:cb3d968589d8 3966 * Values:
Kojto 90:cb3d968589d8 3967 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 3968 * accesses.
Kojto 90:cb3d968589d8 3969 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 3970 */
Kojto 90:cb3d968589d8 3971 /*@{*/
Kojto 90:cb3d968589d8 3972 #define BP_AIPS_PACRE_SP4 (14U) /*!< Bit position for AIPS_PACRE_SP4. */
Kojto 90:cb3d968589d8 3973 #define BM_AIPS_PACRE_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRE_SP4. */
Kojto 90:cb3d968589d8 3974 #define BS_AIPS_PACRE_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP4. */
Kojto 90:cb3d968589d8 3975
Kojto 90:cb3d968589d8 3976 /*! @brief Read current value of the AIPS_PACRE_SP4 field. */
Kojto 90:cb3d968589d8 3977 #define BR_AIPS_PACRE_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP4))
Kojto 90:cb3d968589d8 3978
Kojto 90:cb3d968589d8 3979 /*! @brief Format value for bitfield AIPS_PACRE_SP4. */
Kojto 90:cb3d968589d8 3980 #define BF_AIPS_PACRE_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP4) & BM_AIPS_PACRE_SP4)
Kojto 90:cb3d968589d8 3981
Kojto 90:cb3d968589d8 3982 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 3983 #define BW_AIPS_PACRE_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP4) = (v))
Kojto 90:cb3d968589d8 3984 /*@}*/
Kojto 90:cb3d968589d8 3985
Kojto 90:cb3d968589d8 3986 /*!
Kojto 90:cb3d968589d8 3987 * @name Register AIPS_PACRE, field TP3[16] (RW)
Kojto 90:cb3d968589d8 3988 *
Kojto 90:cb3d968589d8 3989 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 3990 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 3991 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 3992 *
Kojto 90:cb3d968589d8 3993 * Values:
Kojto 90:cb3d968589d8 3994 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 3995 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 3996 */
Kojto 90:cb3d968589d8 3997 /*@{*/
Kojto 90:cb3d968589d8 3998 #define BP_AIPS_PACRE_TP3 (16U) /*!< Bit position for AIPS_PACRE_TP3. */
Kojto 90:cb3d968589d8 3999 #define BM_AIPS_PACRE_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRE_TP3. */
Kojto 90:cb3d968589d8 4000 #define BS_AIPS_PACRE_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP3. */
Kojto 90:cb3d968589d8 4001
Kojto 90:cb3d968589d8 4002 /*! @brief Read current value of the AIPS_PACRE_TP3 field. */
Kojto 90:cb3d968589d8 4003 #define BR_AIPS_PACRE_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP3))
Kojto 90:cb3d968589d8 4004
Kojto 90:cb3d968589d8 4005 /*! @brief Format value for bitfield AIPS_PACRE_TP3. */
Kojto 90:cb3d968589d8 4006 #define BF_AIPS_PACRE_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP3) & BM_AIPS_PACRE_TP3)
Kojto 90:cb3d968589d8 4007
Kojto 90:cb3d968589d8 4008 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 4009 #define BW_AIPS_PACRE_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP3) = (v))
Kojto 90:cb3d968589d8 4010 /*@}*/
Kojto 90:cb3d968589d8 4011
Kojto 90:cb3d968589d8 4012 /*!
Kojto 90:cb3d968589d8 4013 * @name Register AIPS_PACRE, field WP3[17] (RW)
Kojto 90:cb3d968589d8 4014 *
Kojto 90:cb3d968589d8 4015 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 4016 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 4017 * no peripheral access initiates.
Kojto 90:cb3d968589d8 4018 *
Kojto 90:cb3d968589d8 4019 * Values:
Kojto 90:cb3d968589d8 4020 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4021 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4022 */
Kojto 90:cb3d968589d8 4023 /*@{*/
Kojto 90:cb3d968589d8 4024 #define BP_AIPS_PACRE_WP3 (17U) /*!< Bit position for AIPS_PACRE_WP3. */
Kojto 90:cb3d968589d8 4025 #define BM_AIPS_PACRE_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRE_WP3. */
Kojto 90:cb3d968589d8 4026 #define BS_AIPS_PACRE_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP3. */
Kojto 90:cb3d968589d8 4027
Kojto 90:cb3d968589d8 4028 /*! @brief Read current value of the AIPS_PACRE_WP3 field. */
Kojto 90:cb3d968589d8 4029 #define BR_AIPS_PACRE_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP3))
Kojto 90:cb3d968589d8 4030
Kojto 90:cb3d968589d8 4031 /*! @brief Format value for bitfield AIPS_PACRE_WP3. */
Kojto 90:cb3d968589d8 4032 #define BF_AIPS_PACRE_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP3) & BM_AIPS_PACRE_WP3)
Kojto 90:cb3d968589d8 4033
Kojto 90:cb3d968589d8 4034 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 4035 #define BW_AIPS_PACRE_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP3) = (v))
Kojto 90:cb3d968589d8 4036 /*@}*/
Kojto 90:cb3d968589d8 4037
Kojto 90:cb3d968589d8 4038 /*!
Kojto 90:cb3d968589d8 4039 * @name Register AIPS_PACRE, field SP3[18] (RW)
Kojto 90:cb3d968589d8 4040 *
Kojto 90:cb3d968589d8 4041 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4042 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4043 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 4044 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 4045 * access initiates.
Kojto 90:cb3d968589d8 4046 *
Kojto 90:cb3d968589d8 4047 * Values:
Kojto 90:cb3d968589d8 4048 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4049 * accesses.
Kojto 90:cb3d968589d8 4050 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4051 */
Kojto 90:cb3d968589d8 4052 /*@{*/
Kojto 90:cb3d968589d8 4053 #define BP_AIPS_PACRE_SP3 (18U) /*!< Bit position for AIPS_PACRE_SP3. */
Kojto 90:cb3d968589d8 4054 #define BM_AIPS_PACRE_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRE_SP3. */
Kojto 90:cb3d968589d8 4055 #define BS_AIPS_PACRE_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP3. */
Kojto 90:cb3d968589d8 4056
Kojto 90:cb3d968589d8 4057 /*! @brief Read current value of the AIPS_PACRE_SP3 field. */
Kojto 90:cb3d968589d8 4058 #define BR_AIPS_PACRE_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP3))
Kojto 90:cb3d968589d8 4059
Kojto 90:cb3d968589d8 4060 /*! @brief Format value for bitfield AIPS_PACRE_SP3. */
Kojto 90:cb3d968589d8 4061 #define BF_AIPS_PACRE_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP3) & BM_AIPS_PACRE_SP3)
Kojto 90:cb3d968589d8 4062
Kojto 90:cb3d968589d8 4063 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 4064 #define BW_AIPS_PACRE_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP3) = (v))
Kojto 90:cb3d968589d8 4065 /*@}*/
Kojto 90:cb3d968589d8 4066
Kojto 90:cb3d968589d8 4067 /*!
Kojto 90:cb3d968589d8 4068 * @name Register AIPS_PACRE, field TP2[20] (RW)
Kojto 90:cb3d968589d8 4069 *
Kojto 90:cb3d968589d8 4070 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4071 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4072 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4073 *
Kojto 90:cb3d968589d8 4074 * Values:
Kojto 90:cb3d968589d8 4075 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4076 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4077 */
Kojto 90:cb3d968589d8 4078 /*@{*/
Kojto 90:cb3d968589d8 4079 #define BP_AIPS_PACRE_TP2 (20U) /*!< Bit position for AIPS_PACRE_TP2. */
Kojto 90:cb3d968589d8 4080 #define BM_AIPS_PACRE_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRE_TP2. */
Kojto 90:cb3d968589d8 4081 #define BS_AIPS_PACRE_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP2. */
Kojto 90:cb3d968589d8 4082
Kojto 90:cb3d968589d8 4083 /*! @brief Read current value of the AIPS_PACRE_TP2 field. */
Kojto 90:cb3d968589d8 4084 #define BR_AIPS_PACRE_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP2))
Kojto 90:cb3d968589d8 4085
Kojto 90:cb3d968589d8 4086 /*! @brief Format value for bitfield AIPS_PACRE_TP2. */
Kojto 90:cb3d968589d8 4087 #define BF_AIPS_PACRE_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP2) & BM_AIPS_PACRE_TP2)
Kojto 90:cb3d968589d8 4088
Kojto 90:cb3d968589d8 4089 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 4090 #define BW_AIPS_PACRE_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP2) = (v))
Kojto 90:cb3d968589d8 4091 /*@}*/
Kojto 90:cb3d968589d8 4092
Kojto 90:cb3d968589d8 4093 /*!
Kojto 90:cb3d968589d8 4094 * @name Register AIPS_PACRE, field WP2[21] (RW)
Kojto 90:cb3d968589d8 4095 *
Kojto 90:cb3d968589d8 4096 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 4097 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 4098 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 4099 *
Kojto 90:cb3d968589d8 4100 * Values:
Kojto 90:cb3d968589d8 4101 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4102 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4103 */
Kojto 90:cb3d968589d8 4104 /*@{*/
Kojto 90:cb3d968589d8 4105 #define BP_AIPS_PACRE_WP2 (21U) /*!< Bit position for AIPS_PACRE_WP2. */
Kojto 90:cb3d968589d8 4106 #define BM_AIPS_PACRE_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRE_WP2. */
Kojto 90:cb3d968589d8 4107 #define BS_AIPS_PACRE_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP2. */
Kojto 90:cb3d968589d8 4108
Kojto 90:cb3d968589d8 4109 /*! @brief Read current value of the AIPS_PACRE_WP2 field. */
Kojto 90:cb3d968589d8 4110 #define BR_AIPS_PACRE_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP2))
Kojto 90:cb3d968589d8 4111
Kojto 90:cb3d968589d8 4112 /*! @brief Format value for bitfield AIPS_PACRE_WP2. */
Kojto 90:cb3d968589d8 4113 #define BF_AIPS_PACRE_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP2) & BM_AIPS_PACRE_WP2)
Kojto 90:cb3d968589d8 4114
Kojto 90:cb3d968589d8 4115 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 4116 #define BW_AIPS_PACRE_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP2) = (v))
Kojto 90:cb3d968589d8 4117 /*@}*/
Kojto 90:cb3d968589d8 4118
Kojto 90:cb3d968589d8 4119 /*!
Kojto 90:cb3d968589d8 4120 * @name Register AIPS_PACRE, field SP2[22] (RW)
Kojto 90:cb3d968589d8 4121 *
Kojto 90:cb3d968589d8 4122 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4123 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4124 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 4125 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 4126 * initiates.
Kojto 90:cb3d968589d8 4127 *
Kojto 90:cb3d968589d8 4128 * Values:
Kojto 90:cb3d968589d8 4129 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4130 * accesses.
Kojto 90:cb3d968589d8 4131 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4132 */
Kojto 90:cb3d968589d8 4133 /*@{*/
Kojto 90:cb3d968589d8 4134 #define BP_AIPS_PACRE_SP2 (22U) /*!< Bit position for AIPS_PACRE_SP2. */
Kojto 90:cb3d968589d8 4135 #define BM_AIPS_PACRE_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRE_SP2. */
Kojto 90:cb3d968589d8 4136 #define BS_AIPS_PACRE_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP2. */
Kojto 90:cb3d968589d8 4137
Kojto 90:cb3d968589d8 4138 /*! @brief Read current value of the AIPS_PACRE_SP2 field. */
Kojto 90:cb3d968589d8 4139 #define BR_AIPS_PACRE_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP2))
Kojto 90:cb3d968589d8 4140
Kojto 90:cb3d968589d8 4141 /*! @brief Format value for bitfield AIPS_PACRE_SP2. */
Kojto 90:cb3d968589d8 4142 #define BF_AIPS_PACRE_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP2) & BM_AIPS_PACRE_SP2)
Kojto 90:cb3d968589d8 4143
Kojto 90:cb3d968589d8 4144 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 4145 #define BW_AIPS_PACRE_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP2) = (v))
Kojto 90:cb3d968589d8 4146 /*@}*/
Kojto 90:cb3d968589d8 4147
Kojto 90:cb3d968589d8 4148 /*!
Kojto 90:cb3d968589d8 4149 * @name Register AIPS_PACRE, field TP1[24] (RW)
Kojto 90:cb3d968589d8 4150 *
Kojto 90:cb3d968589d8 4151 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4152 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4153 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4154 *
Kojto 90:cb3d968589d8 4155 * Values:
Kojto 90:cb3d968589d8 4156 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4157 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4158 */
Kojto 90:cb3d968589d8 4159 /*@{*/
Kojto 90:cb3d968589d8 4160 #define BP_AIPS_PACRE_TP1 (24U) /*!< Bit position for AIPS_PACRE_TP1. */
Kojto 90:cb3d968589d8 4161 #define BM_AIPS_PACRE_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRE_TP1. */
Kojto 90:cb3d968589d8 4162 #define BS_AIPS_PACRE_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP1. */
Kojto 90:cb3d968589d8 4163
Kojto 90:cb3d968589d8 4164 /*! @brief Read current value of the AIPS_PACRE_TP1 field. */
Kojto 90:cb3d968589d8 4165 #define BR_AIPS_PACRE_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP1))
Kojto 90:cb3d968589d8 4166
Kojto 90:cb3d968589d8 4167 /*! @brief Format value for bitfield AIPS_PACRE_TP1. */
Kojto 90:cb3d968589d8 4168 #define BF_AIPS_PACRE_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP1) & BM_AIPS_PACRE_TP1)
Kojto 90:cb3d968589d8 4169
Kojto 90:cb3d968589d8 4170 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 4171 #define BW_AIPS_PACRE_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP1) = (v))
Kojto 90:cb3d968589d8 4172 /*@}*/
Kojto 90:cb3d968589d8 4173
Kojto 90:cb3d968589d8 4174 /*!
Kojto 90:cb3d968589d8 4175 * @name Register AIPS_PACRE, field WP1[25] (RW)
Kojto 90:cb3d968589d8 4176 *
Kojto 90:cb3d968589d8 4177 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 4178 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 4179 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 4180 *
Kojto 90:cb3d968589d8 4181 * Values:
Kojto 90:cb3d968589d8 4182 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4183 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4184 */
Kojto 90:cb3d968589d8 4185 /*@{*/
Kojto 90:cb3d968589d8 4186 #define BP_AIPS_PACRE_WP1 (25U) /*!< Bit position for AIPS_PACRE_WP1. */
Kojto 90:cb3d968589d8 4187 #define BM_AIPS_PACRE_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRE_WP1. */
Kojto 90:cb3d968589d8 4188 #define BS_AIPS_PACRE_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP1. */
Kojto 90:cb3d968589d8 4189
Kojto 90:cb3d968589d8 4190 /*! @brief Read current value of the AIPS_PACRE_WP1 field. */
Kojto 90:cb3d968589d8 4191 #define BR_AIPS_PACRE_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP1))
Kojto 90:cb3d968589d8 4192
Kojto 90:cb3d968589d8 4193 /*! @brief Format value for bitfield AIPS_PACRE_WP1. */
Kojto 90:cb3d968589d8 4194 #define BF_AIPS_PACRE_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP1) & BM_AIPS_PACRE_WP1)
Kojto 90:cb3d968589d8 4195
Kojto 90:cb3d968589d8 4196 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 4197 #define BW_AIPS_PACRE_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP1) = (v))
Kojto 90:cb3d968589d8 4198 /*@}*/
Kojto 90:cb3d968589d8 4199
Kojto 90:cb3d968589d8 4200 /*!
Kojto 90:cb3d968589d8 4201 * @name Register AIPS_PACRE, field SP1[26] (RW)
Kojto 90:cb3d968589d8 4202 *
Kojto 90:cb3d968589d8 4203 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4204 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4205 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 4206 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 4207 * access initiates.
Kojto 90:cb3d968589d8 4208 *
Kojto 90:cb3d968589d8 4209 * Values:
Kojto 90:cb3d968589d8 4210 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4211 * accesses.
Kojto 90:cb3d968589d8 4212 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4213 */
Kojto 90:cb3d968589d8 4214 /*@{*/
Kojto 90:cb3d968589d8 4215 #define BP_AIPS_PACRE_SP1 (26U) /*!< Bit position for AIPS_PACRE_SP1. */
Kojto 90:cb3d968589d8 4216 #define BM_AIPS_PACRE_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRE_SP1. */
Kojto 90:cb3d968589d8 4217 #define BS_AIPS_PACRE_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP1. */
Kojto 90:cb3d968589d8 4218
Kojto 90:cb3d968589d8 4219 /*! @brief Read current value of the AIPS_PACRE_SP1 field. */
Kojto 90:cb3d968589d8 4220 #define BR_AIPS_PACRE_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP1))
Kojto 90:cb3d968589d8 4221
Kojto 90:cb3d968589d8 4222 /*! @brief Format value for bitfield AIPS_PACRE_SP1. */
Kojto 90:cb3d968589d8 4223 #define BF_AIPS_PACRE_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP1) & BM_AIPS_PACRE_SP1)
Kojto 90:cb3d968589d8 4224
Kojto 90:cb3d968589d8 4225 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 4226 #define BW_AIPS_PACRE_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP1) = (v))
Kojto 90:cb3d968589d8 4227 /*@}*/
Kojto 90:cb3d968589d8 4228
Kojto 90:cb3d968589d8 4229 /*!
Kojto 90:cb3d968589d8 4230 * @name Register AIPS_PACRE, field TP0[28] (RW)
Kojto 90:cb3d968589d8 4231 *
Kojto 90:cb3d968589d8 4232 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4233 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4234 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4235 *
Kojto 90:cb3d968589d8 4236 * Values:
Kojto 90:cb3d968589d8 4237 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4238 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4239 */
Kojto 90:cb3d968589d8 4240 /*@{*/
Kojto 90:cb3d968589d8 4241 #define BP_AIPS_PACRE_TP0 (28U) /*!< Bit position for AIPS_PACRE_TP0. */
Kojto 90:cb3d968589d8 4242 #define BM_AIPS_PACRE_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRE_TP0. */
Kojto 90:cb3d968589d8 4243 #define BS_AIPS_PACRE_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRE_TP0. */
Kojto 90:cb3d968589d8 4244
Kojto 90:cb3d968589d8 4245 /*! @brief Read current value of the AIPS_PACRE_TP0 field. */
Kojto 90:cb3d968589d8 4246 #define BR_AIPS_PACRE_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP0))
Kojto 90:cb3d968589d8 4247
Kojto 90:cb3d968589d8 4248 /*! @brief Format value for bitfield AIPS_PACRE_TP0. */
Kojto 90:cb3d968589d8 4249 #define BF_AIPS_PACRE_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_TP0) & BM_AIPS_PACRE_TP0)
Kojto 90:cb3d968589d8 4250
Kojto 90:cb3d968589d8 4251 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 4252 #define BW_AIPS_PACRE_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP0) = (v))
Kojto 90:cb3d968589d8 4253 /*@}*/
Kojto 90:cb3d968589d8 4254
Kojto 90:cb3d968589d8 4255 /*!
Kojto 90:cb3d968589d8 4256 * @name Register AIPS_PACRE, field WP0[29] (RW)
Kojto 90:cb3d968589d8 4257 *
Kojto 90:cb3d968589d8 4258 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 4259 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 4260 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 4261 *
Kojto 90:cb3d968589d8 4262 * Values:
Kojto 90:cb3d968589d8 4263 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4264 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4265 */
Kojto 90:cb3d968589d8 4266 /*@{*/
Kojto 90:cb3d968589d8 4267 #define BP_AIPS_PACRE_WP0 (29U) /*!< Bit position for AIPS_PACRE_WP0. */
Kojto 90:cb3d968589d8 4268 #define BM_AIPS_PACRE_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRE_WP0. */
Kojto 90:cb3d968589d8 4269 #define BS_AIPS_PACRE_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRE_WP0. */
Kojto 90:cb3d968589d8 4270
Kojto 90:cb3d968589d8 4271 /*! @brief Read current value of the AIPS_PACRE_WP0 field. */
Kojto 90:cb3d968589d8 4272 #define BR_AIPS_PACRE_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP0))
Kojto 90:cb3d968589d8 4273
Kojto 90:cb3d968589d8 4274 /*! @brief Format value for bitfield AIPS_PACRE_WP0. */
Kojto 90:cb3d968589d8 4275 #define BF_AIPS_PACRE_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_WP0) & BM_AIPS_PACRE_WP0)
Kojto 90:cb3d968589d8 4276
Kojto 90:cb3d968589d8 4277 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 4278 #define BW_AIPS_PACRE_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP0) = (v))
Kojto 90:cb3d968589d8 4279 /*@}*/
Kojto 90:cb3d968589d8 4280
Kojto 90:cb3d968589d8 4281 /*!
Kojto 90:cb3d968589d8 4282 * @name Register AIPS_PACRE, field SP0[30] (RW)
Kojto 90:cb3d968589d8 4283 *
Kojto 90:cb3d968589d8 4284 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4285 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4286 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 4287 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 4288 * access initiates.
Kojto 90:cb3d968589d8 4289 *
Kojto 90:cb3d968589d8 4290 * Values:
Kojto 90:cb3d968589d8 4291 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4292 * accesses.
Kojto 90:cb3d968589d8 4293 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4294 */
Kojto 90:cb3d968589d8 4295 /*@{*/
Kojto 90:cb3d968589d8 4296 #define BP_AIPS_PACRE_SP0 (30U) /*!< Bit position for AIPS_PACRE_SP0. */
Kojto 90:cb3d968589d8 4297 #define BM_AIPS_PACRE_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRE_SP0. */
Kojto 90:cb3d968589d8 4298 #define BS_AIPS_PACRE_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRE_SP0. */
Kojto 90:cb3d968589d8 4299
Kojto 90:cb3d968589d8 4300 /*! @brief Read current value of the AIPS_PACRE_SP0 field. */
Kojto 90:cb3d968589d8 4301 #define BR_AIPS_PACRE_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP0))
Kojto 90:cb3d968589d8 4302
Kojto 90:cb3d968589d8 4303 /*! @brief Format value for bitfield AIPS_PACRE_SP0. */
Kojto 90:cb3d968589d8 4304 #define BF_AIPS_PACRE_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRE_SP0) & BM_AIPS_PACRE_SP0)
Kojto 90:cb3d968589d8 4305
Kojto 90:cb3d968589d8 4306 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 4307 #define BW_AIPS_PACRE_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP0) = (v))
Kojto 90:cb3d968589d8 4308 /*@}*/
Kojto 90:cb3d968589d8 4309
Kojto 90:cb3d968589d8 4310 /*******************************************************************************
Kojto 90:cb3d968589d8 4311 * HW_AIPS_PACRF - Peripheral Access Control Register
Kojto 90:cb3d968589d8 4312 ******************************************************************************/
Kojto 90:cb3d968589d8 4313
Kojto 90:cb3d968589d8 4314 /*!
Kojto 90:cb3d968589d8 4315 * @brief HW_AIPS_PACRF - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 4316 *
Kojto 90:cb3d968589d8 4317 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 4318 *
Kojto 90:cb3d968589d8 4319 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 4320 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 4321 * registers.
Kojto 90:cb3d968589d8 4322 */
Kojto 90:cb3d968589d8 4323 typedef union _hw_aips_pacrf
Kojto 90:cb3d968589d8 4324 {
Kojto 90:cb3d968589d8 4325 uint32_t U;
Kojto 90:cb3d968589d8 4326 struct _hw_aips_pacrf_bitfields
Kojto 90:cb3d968589d8 4327 {
Kojto 90:cb3d968589d8 4328 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 4329 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 4330 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 4331 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 4332 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 4333 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 4334 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 4335 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 4336 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 4337 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 4338 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 4339 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 4340 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 4341 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 4342 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 4343 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 4344 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 4345 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 4346 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 4347 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 4348 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 4349 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 4350 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 4351 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 4352 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 4353 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 4354 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 4355 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 4356 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 4357 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 4358 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 4359 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 4360 } B;
Kojto 90:cb3d968589d8 4361 } hw_aips_pacrf_t;
Kojto 90:cb3d968589d8 4362
Kojto 90:cb3d968589d8 4363 /*!
Kojto 90:cb3d968589d8 4364 * @name Constants and macros for entire AIPS_PACRF register
Kojto 90:cb3d968589d8 4365 */
Kojto 90:cb3d968589d8 4366 /*@{*/
Kojto 90:cb3d968589d8 4367 #define HW_AIPS_PACRF_ADDR(x) ((x) + 0x44U)
Kojto 90:cb3d968589d8 4368
Kojto 90:cb3d968589d8 4369 #define HW_AIPS_PACRF(x) (*(__IO hw_aips_pacrf_t *) HW_AIPS_PACRF_ADDR(x))
Kojto 90:cb3d968589d8 4370 #define HW_AIPS_PACRF_RD(x) (HW_AIPS_PACRF(x).U)
Kojto 90:cb3d968589d8 4371 #define HW_AIPS_PACRF_WR(x, v) (HW_AIPS_PACRF(x).U = (v))
Kojto 90:cb3d968589d8 4372 #define HW_AIPS_PACRF_SET(x, v) (HW_AIPS_PACRF_WR(x, HW_AIPS_PACRF_RD(x) | (v)))
Kojto 90:cb3d968589d8 4373 #define HW_AIPS_PACRF_CLR(x, v) (HW_AIPS_PACRF_WR(x, HW_AIPS_PACRF_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 4374 #define HW_AIPS_PACRF_TOG(x, v) (HW_AIPS_PACRF_WR(x, HW_AIPS_PACRF_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 4375 /*@}*/
Kojto 90:cb3d968589d8 4376
Kojto 90:cb3d968589d8 4377 /*
Kojto 90:cb3d968589d8 4378 * Constants & macros for individual AIPS_PACRF bitfields
Kojto 90:cb3d968589d8 4379 */
Kojto 90:cb3d968589d8 4380
Kojto 90:cb3d968589d8 4381 /*!
Kojto 90:cb3d968589d8 4382 * @name Register AIPS_PACRF, field TP7[0] (RW)
Kojto 90:cb3d968589d8 4383 *
Kojto 90:cb3d968589d8 4384 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4385 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4386 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4387 *
Kojto 90:cb3d968589d8 4388 * Values:
Kojto 90:cb3d968589d8 4389 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4390 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4391 */
Kojto 90:cb3d968589d8 4392 /*@{*/
Kojto 90:cb3d968589d8 4393 #define BP_AIPS_PACRF_TP7 (0U) /*!< Bit position for AIPS_PACRF_TP7. */
Kojto 90:cb3d968589d8 4394 #define BM_AIPS_PACRF_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRF_TP7. */
Kojto 90:cb3d968589d8 4395 #define BS_AIPS_PACRF_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP7. */
Kojto 90:cb3d968589d8 4396
Kojto 90:cb3d968589d8 4397 /*! @brief Read current value of the AIPS_PACRF_TP7 field. */
Kojto 90:cb3d968589d8 4398 #define BR_AIPS_PACRF_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP7))
Kojto 90:cb3d968589d8 4399
Kojto 90:cb3d968589d8 4400 /*! @brief Format value for bitfield AIPS_PACRF_TP7. */
Kojto 90:cb3d968589d8 4401 #define BF_AIPS_PACRF_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP7) & BM_AIPS_PACRF_TP7)
Kojto 90:cb3d968589d8 4402
Kojto 90:cb3d968589d8 4403 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 4404 #define BW_AIPS_PACRF_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP7) = (v))
Kojto 90:cb3d968589d8 4405 /*@}*/
Kojto 90:cb3d968589d8 4406
Kojto 90:cb3d968589d8 4407 /*!
Kojto 90:cb3d968589d8 4408 * @name Register AIPS_PACRF, field WP7[1] (RW)
Kojto 90:cb3d968589d8 4409 *
Kojto 90:cb3d968589d8 4410 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 4411 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 4412 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 4413 *
Kojto 90:cb3d968589d8 4414 * Values:
Kojto 90:cb3d968589d8 4415 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4416 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4417 */
Kojto 90:cb3d968589d8 4418 /*@{*/
Kojto 90:cb3d968589d8 4419 #define BP_AIPS_PACRF_WP7 (1U) /*!< Bit position for AIPS_PACRF_WP7. */
Kojto 90:cb3d968589d8 4420 #define BM_AIPS_PACRF_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRF_WP7. */
Kojto 90:cb3d968589d8 4421 #define BS_AIPS_PACRF_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP7. */
Kojto 90:cb3d968589d8 4422
Kojto 90:cb3d968589d8 4423 /*! @brief Read current value of the AIPS_PACRF_WP7 field. */
Kojto 90:cb3d968589d8 4424 #define BR_AIPS_PACRF_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP7))
Kojto 90:cb3d968589d8 4425
Kojto 90:cb3d968589d8 4426 /*! @brief Format value for bitfield AIPS_PACRF_WP7. */
Kojto 90:cb3d968589d8 4427 #define BF_AIPS_PACRF_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP7) & BM_AIPS_PACRF_WP7)
Kojto 90:cb3d968589d8 4428
Kojto 90:cb3d968589d8 4429 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 4430 #define BW_AIPS_PACRF_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP7) = (v))
Kojto 90:cb3d968589d8 4431 /*@}*/
Kojto 90:cb3d968589d8 4432
Kojto 90:cb3d968589d8 4433 /*!
Kojto 90:cb3d968589d8 4434 * @name Register AIPS_PACRF, field SP7[2] (RW)
Kojto 90:cb3d968589d8 4435 *
Kojto 90:cb3d968589d8 4436 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4437 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4438 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 4439 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 4440 * access initiates.
Kojto 90:cb3d968589d8 4441 *
Kojto 90:cb3d968589d8 4442 * Values:
Kojto 90:cb3d968589d8 4443 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4444 * accesses.
Kojto 90:cb3d968589d8 4445 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4446 */
Kojto 90:cb3d968589d8 4447 /*@{*/
Kojto 90:cb3d968589d8 4448 #define BP_AIPS_PACRF_SP7 (2U) /*!< Bit position for AIPS_PACRF_SP7. */
Kojto 90:cb3d968589d8 4449 #define BM_AIPS_PACRF_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRF_SP7. */
Kojto 90:cb3d968589d8 4450 #define BS_AIPS_PACRF_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP7. */
Kojto 90:cb3d968589d8 4451
Kojto 90:cb3d968589d8 4452 /*! @brief Read current value of the AIPS_PACRF_SP7 field. */
Kojto 90:cb3d968589d8 4453 #define BR_AIPS_PACRF_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP7))
Kojto 90:cb3d968589d8 4454
Kojto 90:cb3d968589d8 4455 /*! @brief Format value for bitfield AIPS_PACRF_SP7. */
Kojto 90:cb3d968589d8 4456 #define BF_AIPS_PACRF_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP7) & BM_AIPS_PACRF_SP7)
Kojto 90:cb3d968589d8 4457
Kojto 90:cb3d968589d8 4458 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 4459 #define BW_AIPS_PACRF_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP7) = (v))
Kojto 90:cb3d968589d8 4460 /*@}*/
Kojto 90:cb3d968589d8 4461
Kojto 90:cb3d968589d8 4462 /*!
Kojto 90:cb3d968589d8 4463 * @name Register AIPS_PACRF, field TP6[4] (RW)
Kojto 90:cb3d968589d8 4464 *
Kojto 90:cb3d968589d8 4465 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4466 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4467 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4468 *
Kojto 90:cb3d968589d8 4469 * Values:
Kojto 90:cb3d968589d8 4470 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4471 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4472 */
Kojto 90:cb3d968589d8 4473 /*@{*/
Kojto 90:cb3d968589d8 4474 #define BP_AIPS_PACRF_TP6 (4U) /*!< Bit position for AIPS_PACRF_TP6. */
Kojto 90:cb3d968589d8 4475 #define BM_AIPS_PACRF_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRF_TP6. */
Kojto 90:cb3d968589d8 4476 #define BS_AIPS_PACRF_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP6. */
Kojto 90:cb3d968589d8 4477
Kojto 90:cb3d968589d8 4478 /*! @brief Read current value of the AIPS_PACRF_TP6 field. */
Kojto 90:cb3d968589d8 4479 #define BR_AIPS_PACRF_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP6))
Kojto 90:cb3d968589d8 4480
Kojto 90:cb3d968589d8 4481 /*! @brief Format value for bitfield AIPS_PACRF_TP6. */
Kojto 90:cb3d968589d8 4482 #define BF_AIPS_PACRF_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP6) & BM_AIPS_PACRF_TP6)
Kojto 90:cb3d968589d8 4483
Kojto 90:cb3d968589d8 4484 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 4485 #define BW_AIPS_PACRF_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP6) = (v))
Kojto 90:cb3d968589d8 4486 /*@}*/
Kojto 90:cb3d968589d8 4487
Kojto 90:cb3d968589d8 4488 /*!
Kojto 90:cb3d968589d8 4489 * @name Register AIPS_PACRF, field WP6[5] (RW)
Kojto 90:cb3d968589d8 4490 *
Kojto 90:cb3d968589d8 4491 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 4492 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 4493 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 4494 *
Kojto 90:cb3d968589d8 4495 * Values:
Kojto 90:cb3d968589d8 4496 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4497 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4498 */
Kojto 90:cb3d968589d8 4499 /*@{*/
Kojto 90:cb3d968589d8 4500 #define BP_AIPS_PACRF_WP6 (5U) /*!< Bit position for AIPS_PACRF_WP6. */
Kojto 90:cb3d968589d8 4501 #define BM_AIPS_PACRF_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRF_WP6. */
Kojto 90:cb3d968589d8 4502 #define BS_AIPS_PACRF_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP6. */
Kojto 90:cb3d968589d8 4503
Kojto 90:cb3d968589d8 4504 /*! @brief Read current value of the AIPS_PACRF_WP6 field. */
Kojto 90:cb3d968589d8 4505 #define BR_AIPS_PACRF_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP6))
Kojto 90:cb3d968589d8 4506
Kojto 90:cb3d968589d8 4507 /*! @brief Format value for bitfield AIPS_PACRF_WP6. */
Kojto 90:cb3d968589d8 4508 #define BF_AIPS_PACRF_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP6) & BM_AIPS_PACRF_WP6)
Kojto 90:cb3d968589d8 4509
Kojto 90:cb3d968589d8 4510 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 4511 #define BW_AIPS_PACRF_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP6) = (v))
Kojto 90:cb3d968589d8 4512 /*@}*/
Kojto 90:cb3d968589d8 4513
Kojto 90:cb3d968589d8 4514 /*!
Kojto 90:cb3d968589d8 4515 * @name Register AIPS_PACRF, field SP6[6] (RW)
Kojto 90:cb3d968589d8 4516 *
Kojto 90:cb3d968589d8 4517 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4518 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4519 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 4520 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 4521 * access initiates.
Kojto 90:cb3d968589d8 4522 *
Kojto 90:cb3d968589d8 4523 * Values:
Kojto 90:cb3d968589d8 4524 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4525 * accesses.
Kojto 90:cb3d968589d8 4526 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4527 */
Kojto 90:cb3d968589d8 4528 /*@{*/
Kojto 90:cb3d968589d8 4529 #define BP_AIPS_PACRF_SP6 (6U) /*!< Bit position for AIPS_PACRF_SP6. */
Kojto 90:cb3d968589d8 4530 #define BM_AIPS_PACRF_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRF_SP6. */
Kojto 90:cb3d968589d8 4531 #define BS_AIPS_PACRF_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP6. */
Kojto 90:cb3d968589d8 4532
Kojto 90:cb3d968589d8 4533 /*! @brief Read current value of the AIPS_PACRF_SP6 field. */
Kojto 90:cb3d968589d8 4534 #define BR_AIPS_PACRF_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP6))
Kojto 90:cb3d968589d8 4535
Kojto 90:cb3d968589d8 4536 /*! @brief Format value for bitfield AIPS_PACRF_SP6. */
Kojto 90:cb3d968589d8 4537 #define BF_AIPS_PACRF_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP6) & BM_AIPS_PACRF_SP6)
Kojto 90:cb3d968589d8 4538
Kojto 90:cb3d968589d8 4539 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 4540 #define BW_AIPS_PACRF_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP6) = (v))
Kojto 90:cb3d968589d8 4541 /*@}*/
Kojto 90:cb3d968589d8 4542
Kojto 90:cb3d968589d8 4543 /*!
Kojto 90:cb3d968589d8 4544 * @name Register AIPS_PACRF, field TP5[8] (RW)
Kojto 90:cb3d968589d8 4545 *
Kojto 90:cb3d968589d8 4546 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4547 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4548 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4549 *
Kojto 90:cb3d968589d8 4550 * Values:
Kojto 90:cb3d968589d8 4551 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4552 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4553 */
Kojto 90:cb3d968589d8 4554 /*@{*/
Kojto 90:cb3d968589d8 4555 #define BP_AIPS_PACRF_TP5 (8U) /*!< Bit position for AIPS_PACRF_TP5. */
Kojto 90:cb3d968589d8 4556 #define BM_AIPS_PACRF_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRF_TP5. */
Kojto 90:cb3d968589d8 4557 #define BS_AIPS_PACRF_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP5. */
Kojto 90:cb3d968589d8 4558
Kojto 90:cb3d968589d8 4559 /*! @brief Read current value of the AIPS_PACRF_TP5 field. */
Kojto 90:cb3d968589d8 4560 #define BR_AIPS_PACRF_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP5))
Kojto 90:cb3d968589d8 4561
Kojto 90:cb3d968589d8 4562 /*! @brief Format value for bitfield AIPS_PACRF_TP5. */
Kojto 90:cb3d968589d8 4563 #define BF_AIPS_PACRF_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP5) & BM_AIPS_PACRF_TP5)
Kojto 90:cb3d968589d8 4564
Kojto 90:cb3d968589d8 4565 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 4566 #define BW_AIPS_PACRF_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP5) = (v))
Kojto 90:cb3d968589d8 4567 /*@}*/
Kojto 90:cb3d968589d8 4568
Kojto 90:cb3d968589d8 4569 /*!
Kojto 90:cb3d968589d8 4570 * @name Register AIPS_PACRF, field WP5[9] (RW)
Kojto 90:cb3d968589d8 4571 *
Kojto 90:cb3d968589d8 4572 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 4573 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 4574 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 4575 *
Kojto 90:cb3d968589d8 4576 * Values:
Kojto 90:cb3d968589d8 4577 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4578 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4579 */
Kojto 90:cb3d968589d8 4580 /*@{*/
Kojto 90:cb3d968589d8 4581 #define BP_AIPS_PACRF_WP5 (9U) /*!< Bit position for AIPS_PACRF_WP5. */
Kojto 90:cb3d968589d8 4582 #define BM_AIPS_PACRF_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRF_WP5. */
Kojto 90:cb3d968589d8 4583 #define BS_AIPS_PACRF_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP5. */
Kojto 90:cb3d968589d8 4584
Kojto 90:cb3d968589d8 4585 /*! @brief Read current value of the AIPS_PACRF_WP5 field. */
Kojto 90:cb3d968589d8 4586 #define BR_AIPS_PACRF_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP5))
Kojto 90:cb3d968589d8 4587
Kojto 90:cb3d968589d8 4588 /*! @brief Format value for bitfield AIPS_PACRF_WP5. */
Kojto 90:cb3d968589d8 4589 #define BF_AIPS_PACRF_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP5) & BM_AIPS_PACRF_WP5)
Kojto 90:cb3d968589d8 4590
Kojto 90:cb3d968589d8 4591 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 4592 #define BW_AIPS_PACRF_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP5) = (v))
Kojto 90:cb3d968589d8 4593 /*@}*/
Kojto 90:cb3d968589d8 4594
Kojto 90:cb3d968589d8 4595 /*!
Kojto 90:cb3d968589d8 4596 * @name Register AIPS_PACRF, field SP5[10] (RW)
Kojto 90:cb3d968589d8 4597 *
Kojto 90:cb3d968589d8 4598 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4599 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4600 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 4601 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 4602 * access initiates.
Kojto 90:cb3d968589d8 4603 *
Kojto 90:cb3d968589d8 4604 * Values:
Kojto 90:cb3d968589d8 4605 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4606 * accesses.
Kojto 90:cb3d968589d8 4607 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4608 */
Kojto 90:cb3d968589d8 4609 /*@{*/
Kojto 90:cb3d968589d8 4610 #define BP_AIPS_PACRF_SP5 (10U) /*!< Bit position for AIPS_PACRF_SP5. */
Kojto 90:cb3d968589d8 4611 #define BM_AIPS_PACRF_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRF_SP5. */
Kojto 90:cb3d968589d8 4612 #define BS_AIPS_PACRF_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP5. */
Kojto 90:cb3d968589d8 4613
Kojto 90:cb3d968589d8 4614 /*! @brief Read current value of the AIPS_PACRF_SP5 field. */
Kojto 90:cb3d968589d8 4615 #define BR_AIPS_PACRF_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP5))
Kojto 90:cb3d968589d8 4616
Kojto 90:cb3d968589d8 4617 /*! @brief Format value for bitfield AIPS_PACRF_SP5. */
Kojto 90:cb3d968589d8 4618 #define BF_AIPS_PACRF_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP5) & BM_AIPS_PACRF_SP5)
Kojto 90:cb3d968589d8 4619
Kojto 90:cb3d968589d8 4620 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 4621 #define BW_AIPS_PACRF_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP5) = (v))
Kojto 90:cb3d968589d8 4622 /*@}*/
Kojto 90:cb3d968589d8 4623
Kojto 90:cb3d968589d8 4624 /*!
Kojto 90:cb3d968589d8 4625 * @name Register AIPS_PACRF, field TP4[12] (RW)
Kojto 90:cb3d968589d8 4626 *
Kojto 90:cb3d968589d8 4627 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4628 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4629 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4630 *
Kojto 90:cb3d968589d8 4631 * Values:
Kojto 90:cb3d968589d8 4632 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4633 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4634 */
Kojto 90:cb3d968589d8 4635 /*@{*/
Kojto 90:cb3d968589d8 4636 #define BP_AIPS_PACRF_TP4 (12U) /*!< Bit position for AIPS_PACRF_TP4. */
Kojto 90:cb3d968589d8 4637 #define BM_AIPS_PACRF_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRF_TP4. */
Kojto 90:cb3d968589d8 4638 #define BS_AIPS_PACRF_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP4. */
Kojto 90:cb3d968589d8 4639
Kojto 90:cb3d968589d8 4640 /*! @brief Read current value of the AIPS_PACRF_TP4 field. */
Kojto 90:cb3d968589d8 4641 #define BR_AIPS_PACRF_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP4))
Kojto 90:cb3d968589d8 4642
Kojto 90:cb3d968589d8 4643 /*! @brief Format value for bitfield AIPS_PACRF_TP4. */
Kojto 90:cb3d968589d8 4644 #define BF_AIPS_PACRF_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP4) & BM_AIPS_PACRF_TP4)
Kojto 90:cb3d968589d8 4645
Kojto 90:cb3d968589d8 4646 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 4647 #define BW_AIPS_PACRF_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP4) = (v))
Kojto 90:cb3d968589d8 4648 /*@}*/
Kojto 90:cb3d968589d8 4649
Kojto 90:cb3d968589d8 4650 /*!
Kojto 90:cb3d968589d8 4651 * @name Register AIPS_PACRF, field WP4[13] (RW)
Kojto 90:cb3d968589d8 4652 *
Kojto 90:cb3d968589d8 4653 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 4654 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 4655 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 4656 *
Kojto 90:cb3d968589d8 4657 * Values:
Kojto 90:cb3d968589d8 4658 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4659 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4660 */
Kojto 90:cb3d968589d8 4661 /*@{*/
Kojto 90:cb3d968589d8 4662 #define BP_AIPS_PACRF_WP4 (13U) /*!< Bit position for AIPS_PACRF_WP4. */
Kojto 90:cb3d968589d8 4663 #define BM_AIPS_PACRF_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRF_WP4. */
Kojto 90:cb3d968589d8 4664 #define BS_AIPS_PACRF_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP4. */
Kojto 90:cb3d968589d8 4665
Kojto 90:cb3d968589d8 4666 /*! @brief Read current value of the AIPS_PACRF_WP4 field. */
Kojto 90:cb3d968589d8 4667 #define BR_AIPS_PACRF_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP4))
Kojto 90:cb3d968589d8 4668
Kojto 90:cb3d968589d8 4669 /*! @brief Format value for bitfield AIPS_PACRF_WP4. */
Kojto 90:cb3d968589d8 4670 #define BF_AIPS_PACRF_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP4) & BM_AIPS_PACRF_WP4)
Kojto 90:cb3d968589d8 4671
Kojto 90:cb3d968589d8 4672 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 4673 #define BW_AIPS_PACRF_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP4) = (v))
Kojto 90:cb3d968589d8 4674 /*@}*/
Kojto 90:cb3d968589d8 4675
Kojto 90:cb3d968589d8 4676 /*!
Kojto 90:cb3d968589d8 4677 * @name Register AIPS_PACRF, field SP4[14] (RW)
Kojto 90:cb3d968589d8 4678 *
Kojto 90:cb3d968589d8 4679 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4680 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4681 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 4682 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 4683 * initiates.
Kojto 90:cb3d968589d8 4684 *
Kojto 90:cb3d968589d8 4685 * Values:
Kojto 90:cb3d968589d8 4686 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4687 * accesses.
Kojto 90:cb3d968589d8 4688 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4689 */
Kojto 90:cb3d968589d8 4690 /*@{*/
Kojto 90:cb3d968589d8 4691 #define BP_AIPS_PACRF_SP4 (14U) /*!< Bit position for AIPS_PACRF_SP4. */
Kojto 90:cb3d968589d8 4692 #define BM_AIPS_PACRF_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRF_SP4. */
Kojto 90:cb3d968589d8 4693 #define BS_AIPS_PACRF_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP4. */
Kojto 90:cb3d968589d8 4694
Kojto 90:cb3d968589d8 4695 /*! @brief Read current value of the AIPS_PACRF_SP4 field. */
Kojto 90:cb3d968589d8 4696 #define BR_AIPS_PACRF_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP4))
Kojto 90:cb3d968589d8 4697
Kojto 90:cb3d968589d8 4698 /*! @brief Format value for bitfield AIPS_PACRF_SP4. */
Kojto 90:cb3d968589d8 4699 #define BF_AIPS_PACRF_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP4) & BM_AIPS_PACRF_SP4)
Kojto 90:cb3d968589d8 4700
Kojto 90:cb3d968589d8 4701 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 4702 #define BW_AIPS_PACRF_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP4) = (v))
Kojto 90:cb3d968589d8 4703 /*@}*/
Kojto 90:cb3d968589d8 4704
Kojto 90:cb3d968589d8 4705 /*!
Kojto 90:cb3d968589d8 4706 * @name Register AIPS_PACRF, field TP3[16] (RW)
Kojto 90:cb3d968589d8 4707 *
Kojto 90:cb3d968589d8 4708 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4709 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4710 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4711 *
Kojto 90:cb3d968589d8 4712 * Values:
Kojto 90:cb3d968589d8 4713 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4714 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4715 */
Kojto 90:cb3d968589d8 4716 /*@{*/
Kojto 90:cb3d968589d8 4717 #define BP_AIPS_PACRF_TP3 (16U) /*!< Bit position for AIPS_PACRF_TP3. */
Kojto 90:cb3d968589d8 4718 #define BM_AIPS_PACRF_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRF_TP3. */
Kojto 90:cb3d968589d8 4719 #define BS_AIPS_PACRF_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP3. */
Kojto 90:cb3d968589d8 4720
Kojto 90:cb3d968589d8 4721 /*! @brief Read current value of the AIPS_PACRF_TP3 field. */
Kojto 90:cb3d968589d8 4722 #define BR_AIPS_PACRF_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP3))
Kojto 90:cb3d968589d8 4723
Kojto 90:cb3d968589d8 4724 /*! @brief Format value for bitfield AIPS_PACRF_TP3. */
Kojto 90:cb3d968589d8 4725 #define BF_AIPS_PACRF_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP3) & BM_AIPS_PACRF_TP3)
Kojto 90:cb3d968589d8 4726
Kojto 90:cb3d968589d8 4727 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 4728 #define BW_AIPS_PACRF_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP3) = (v))
Kojto 90:cb3d968589d8 4729 /*@}*/
Kojto 90:cb3d968589d8 4730
Kojto 90:cb3d968589d8 4731 /*!
Kojto 90:cb3d968589d8 4732 * @name Register AIPS_PACRF, field WP3[17] (RW)
Kojto 90:cb3d968589d8 4733 *
Kojto 90:cb3d968589d8 4734 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 4735 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 4736 * no peripheral access initiates.
Kojto 90:cb3d968589d8 4737 *
Kojto 90:cb3d968589d8 4738 * Values:
Kojto 90:cb3d968589d8 4739 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4740 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4741 */
Kojto 90:cb3d968589d8 4742 /*@{*/
Kojto 90:cb3d968589d8 4743 #define BP_AIPS_PACRF_WP3 (17U) /*!< Bit position for AIPS_PACRF_WP3. */
Kojto 90:cb3d968589d8 4744 #define BM_AIPS_PACRF_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRF_WP3. */
Kojto 90:cb3d968589d8 4745 #define BS_AIPS_PACRF_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP3. */
Kojto 90:cb3d968589d8 4746
Kojto 90:cb3d968589d8 4747 /*! @brief Read current value of the AIPS_PACRF_WP3 field. */
Kojto 90:cb3d968589d8 4748 #define BR_AIPS_PACRF_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP3))
Kojto 90:cb3d968589d8 4749
Kojto 90:cb3d968589d8 4750 /*! @brief Format value for bitfield AIPS_PACRF_WP3. */
Kojto 90:cb3d968589d8 4751 #define BF_AIPS_PACRF_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP3) & BM_AIPS_PACRF_WP3)
Kojto 90:cb3d968589d8 4752
Kojto 90:cb3d968589d8 4753 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 4754 #define BW_AIPS_PACRF_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP3) = (v))
Kojto 90:cb3d968589d8 4755 /*@}*/
Kojto 90:cb3d968589d8 4756
Kojto 90:cb3d968589d8 4757 /*!
Kojto 90:cb3d968589d8 4758 * @name Register AIPS_PACRF, field SP3[18] (RW)
Kojto 90:cb3d968589d8 4759 *
Kojto 90:cb3d968589d8 4760 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4761 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4762 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 4763 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 4764 * access initiates.
Kojto 90:cb3d968589d8 4765 *
Kojto 90:cb3d968589d8 4766 * Values:
Kojto 90:cb3d968589d8 4767 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4768 * accesses.
Kojto 90:cb3d968589d8 4769 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4770 */
Kojto 90:cb3d968589d8 4771 /*@{*/
Kojto 90:cb3d968589d8 4772 #define BP_AIPS_PACRF_SP3 (18U) /*!< Bit position for AIPS_PACRF_SP3. */
Kojto 90:cb3d968589d8 4773 #define BM_AIPS_PACRF_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRF_SP3. */
Kojto 90:cb3d968589d8 4774 #define BS_AIPS_PACRF_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP3. */
Kojto 90:cb3d968589d8 4775
Kojto 90:cb3d968589d8 4776 /*! @brief Read current value of the AIPS_PACRF_SP3 field. */
Kojto 90:cb3d968589d8 4777 #define BR_AIPS_PACRF_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP3))
Kojto 90:cb3d968589d8 4778
Kojto 90:cb3d968589d8 4779 /*! @brief Format value for bitfield AIPS_PACRF_SP3. */
Kojto 90:cb3d968589d8 4780 #define BF_AIPS_PACRF_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP3) & BM_AIPS_PACRF_SP3)
Kojto 90:cb3d968589d8 4781
Kojto 90:cb3d968589d8 4782 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 4783 #define BW_AIPS_PACRF_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP3) = (v))
Kojto 90:cb3d968589d8 4784 /*@}*/
Kojto 90:cb3d968589d8 4785
Kojto 90:cb3d968589d8 4786 /*!
Kojto 90:cb3d968589d8 4787 * @name Register AIPS_PACRF, field TP2[20] (RW)
Kojto 90:cb3d968589d8 4788 *
Kojto 90:cb3d968589d8 4789 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4790 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4791 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4792 *
Kojto 90:cb3d968589d8 4793 * Values:
Kojto 90:cb3d968589d8 4794 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4795 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4796 */
Kojto 90:cb3d968589d8 4797 /*@{*/
Kojto 90:cb3d968589d8 4798 #define BP_AIPS_PACRF_TP2 (20U) /*!< Bit position for AIPS_PACRF_TP2. */
Kojto 90:cb3d968589d8 4799 #define BM_AIPS_PACRF_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRF_TP2. */
Kojto 90:cb3d968589d8 4800 #define BS_AIPS_PACRF_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP2. */
Kojto 90:cb3d968589d8 4801
Kojto 90:cb3d968589d8 4802 /*! @brief Read current value of the AIPS_PACRF_TP2 field. */
Kojto 90:cb3d968589d8 4803 #define BR_AIPS_PACRF_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP2))
Kojto 90:cb3d968589d8 4804
Kojto 90:cb3d968589d8 4805 /*! @brief Format value for bitfield AIPS_PACRF_TP2. */
Kojto 90:cb3d968589d8 4806 #define BF_AIPS_PACRF_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP2) & BM_AIPS_PACRF_TP2)
Kojto 90:cb3d968589d8 4807
Kojto 90:cb3d968589d8 4808 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 4809 #define BW_AIPS_PACRF_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP2) = (v))
Kojto 90:cb3d968589d8 4810 /*@}*/
Kojto 90:cb3d968589d8 4811
Kojto 90:cb3d968589d8 4812 /*!
Kojto 90:cb3d968589d8 4813 * @name Register AIPS_PACRF, field WP2[21] (RW)
Kojto 90:cb3d968589d8 4814 *
Kojto 90:cb3d968589d8 4815 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 4816 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 4817 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 4818 *
Kojto 90:cb3d968589d8 4819 * Values:
Kojto 90:cb3d968589d8 4820 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4821 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4822 */
Kojto 90:cb3d968589d8 4823 /*@{*/
Kojto 90:cb3d968589d8 4824 #define BP_AIPS_PACRF_WP2 (21U) /*!< Bit position for AIPS_PACRF_WP2. */
Kojto 90:cb3d968589d8 4825 #define BM_AIPS_PACRF_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRF_WP2. */
Kojto 90:cb3d968589d8 4826 #define BS_AIPS_PACRF_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP2. */
Kojto 90:cb3d968589d8 4827
Kojto 90:cb3d968589d8 4828 /*! @brief Read current value of the AIPS_PACRF_WP2 field. */
Kojto 90:cb3d968589d8 4829 #define BR_AIPS_PACRF_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP2))
Kojto 90:cb3d968589d8 4830
Kojto 90:cb3d968589d8 4831 /*! @brief Format value for bitfield AIPS_PACRF_WP2. */
Kojto 90:cb3d968589d8 4832 #define BF_AIPS_PACRF_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP2) & BM_AIPS_PACRF_WP2)
Kojto 90:cb3d968589d8 4833
Kojto 90:cb3d968589d8 4834 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 4835 #define BW_AIPS_PACRF_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP2) = (v))
Kojto 90:cb3d968589d8 4836 /*@}*/
Kojto 90:cb3d968589d8 4837
Kojto 90:cb3d968589d8 4838 /*!
Kojto 90:cb3d968589d8 4839 * @name Register AIPS_PACRF, field SP2[22] (RW)
Kojto 90:cb3d968589d8 4840 *
Kojto 90:cb3d968589d8 4841 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4842 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4843 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 4844 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 4845 * initiates.
Kojto 90:cb3d968589d8 4846 *
Kojto 90:cb3d968589d8 4847 * Values:
Kojto 90:cb3d968589d8 4848 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4849 * accesses.
Kojto 90:cb3d968589d8 4850 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4851 */
Kojto 90:cb3d968589d8 4852 /*@{*/
Kojto 90:cb3d968589d8 4853 #define BP_AIPS_PACRF_SP2 (22U) /*!< Bit position for AIPS_PACRF_SP2. */
Kojto 90:cb3d968589d8 4854 #define BM_AIPS_PACRF_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRF_SP2. */
Kojto 90:cb3d968589d8 4855 #define BS_AIPS_PACRF_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP2. */
Kojto 90:cb3d968589d8 4856
Kojto 90:cb3d968589d8 4857 /*! @brief Read current value of the AIPS_PACRF_SP2 field. */
Kojto 90:cb3d968589d8 4858 #define BR_AIPS_PACRF_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP2))
Kojto 90:cb3d968589d8 4859
Kojto 90:cb3d968589d8 4860 /*! @brief Format value for bitfield AIPS_PACRF_SP2. */
Kojto 90:cb3d968589d8 4861 #define BF_AIPS_PACRF_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP2) & BM_AIPS_PACRF_SP2)
Kojto 90:cb3d968589d8 4862
Kojto 90:cb3d968589d8 4863 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 4864 #define BW_AIPS_PACRF_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP2) = (v))
Kojto 90:cb3d968589d8 4865 /*@}*/
Kojto 90:cb3d968589d8 4866
Kojto 90:cb3d968589d8 4867 /*!
Kojto 90:cb3d968589d8 4868 * @name Register AIPS_PACRF, field TP1[24] (RW)
Kojto 90:cb3d968589d8 4869 *
Kojto 90:cb3d968589d8 4870 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4871 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4872 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4873 *
Kojto 90:cb3d968589d8 4874 * Values:
Kojto 90:cb3d968589d8 4875 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4876 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4877 */
Kojto 90:cb3d968589d8 4878 /*@{*/
Kojto 90:cb3d968589d8 4879 #define BP_AIPS_PACRF_TP1 (24U) /*!< Bit position for AIPS_PACRF_TP1. */
Kojto 90:cb3d968589d8 4880 #define BM_AIPS_PACRF_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRF_TP1. */
Kojto 90:cb3d968589d8 4881 #define BS_AIPS_PACRF_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP1. */
Kojto 90:cb3d968589d8 4882
Kojto 90:cb3d968589d8 4883 /*! @brief Read current value of the AIPS_PACRF_TP1 field. */
Kojto 90:cb3d968589d8 4884 #define BR_AIPS_PACRF_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP1))
Kojto 90:cb3d968589d8 4885
Kojto 90:cb3d968589d8 4886 /*! @brief Format value for bitfield AIPS_PACRF_TP1. */
Kojto 90:cb3d968589d8 4887 #define BF_AIPS_PACRF_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP1) & BM_AIPS_PACRF_TP1)
Kojto 90:cb3d968589d8 4888
Kojto 90:cb3d968589d8 4889 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 4890 #define BW_AIPS_PACRF_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP1) = (v))
Kojto 90:cb3d968589d8 4891 /*@}*/
Kojto 90:cb3d968589d8 4892
Kojto 90:cb3d968589d8 4893 /*!
Kojto 90:cb3d968589d8 4894 * @name Register AIPS_PACRF, field WP1[25] (RW)
Kojto 90:cb3d968589d8 4895 *
Kojto 90:cb3d968589d8 4896 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 4897 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 4898 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 4899 *
Kojto 90:cb3d968589d8 4900 * Values:
Kojto 90:cb3d968589d8 4901 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4902 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4903 */
Kojto 90:cb3d968589d8 4904 /*@{*/
Kojto 90:cb3d968589d8 4905 #define BP_AIPS_PACRF_WP1 (25U) /*!< Bit position for AIPS_PACRF_WP1. */
Kojto 90:cb3d968589d8 4906 #define BM_AIPS_PACRF_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRF_WP1. */
Kojto 90:cb3d968589d8 4907 #define BS_AIPS_PACRF_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP1. */
Kojto 90:cb3d968589d8 4908
Kojto 90:cb3d968589d8 4909 /*! @brief Read current value of the AIPS_PACRF_WP1 field. */
Kojto 90:cb3d968589d8 4910 #define BR_AIPS_PACRF_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP1))
Kojto 90:cb3d968589d8 4911
Kojto 90:cb3d968589d8 4912 /*! @brief Format value for bitfield AIPS_PACRF_WP1. */
Kojto 90:cb3d968589d8 4913 #define BF_AIPS_PACRF_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP1) & BM_AIPS_PACRF_WP1)
Kojto 90:cb3d968589d8 4914
Kojto 90:cb3d968589d8 4915 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 4916 #define BW_AIPS_PACRF_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP1) = (v))
Kojto 90:cb3d968589d8 4917 /*@}*/
Kojto 90:cb3d968589d8 4918
Kojto 90:cb3d968589d8 4919 /*!
Kojto 90:cb3d968589d8 4920 * @name Register AIPS_PACRF, field SP1[26] (RW)
Kojto 90:cb3d968589d8 4921 *
Kojto 90:cb3d968589d8 4922 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 4923 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 4924 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 4925 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 4926 * access initiates.
Kojto 90:cb3d968589d8 4927 *
Kojto 90:cb3d968589d8 4928 * Values:
Kojto 90:cb3d968589d8 4929 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 4930 * accesses.
Kojto 90:cb3d968589d8 4931 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 4932 */
Kojto 90:cb3d968589d8 4933 /*@{*/
Kojto 90:cb3d968589d8 4934 #define BP_AIPS_PACRF_SP1 (26U) /*!< Bit position for AIPS_PACRF_SP1. */
Kojto 90:cb3d968589d8 4935 #define BM_AIPS_PACRF_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRF_SP1. */
Kojto 90:cb3d968589d8 4936 #define BS_AIPS_PACRF_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP1. */
Kojto 90:cb3d968589d8 4937
Kojto 90:cb3d968589d8 4938 /*! @brief Read current value of the AIPS_PACRF_SP1 field. */
Kojto 90:cb3d968589d8 4939 #define BR_AIPS_PACRF_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP1))
Kojto 90:cb3d968589d8 4940
Kojto 90:cb3d968589d8 4941 /*! @brief Format value for bitfield AIPS_PACRF_SP1. */
Kojto 90:cb3d968589d8 4942 #define BF_AIPS_PACRF_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP1) & BM_AIPS_PACRF_SP1)
Kojto 90:cb3d968589d8 4943
Kojto 90:cb3d968589d8 4944 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 4945 #define BW_AIPS_PACRF_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP1) = (v))
Kojto 90:cb3d968589d8 4946 /*@}*/
Kojto 90:cb3d968589d8 4947
Kojto 90:cb3d968589d8 4948 /*!
Kojto 90:cb3d968589d8 4949 * @name Register AIPS_PACRF, field TP0[28] (RW)
Kojto 90:cb3d968589d8 4950 *
Kojto 90:cb3d968589d8 4951 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 4952 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 4953 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 4954 *
Kojto 90:cb3d968589d8 4955 * Values:
Kojto 90:cb3d968589d8 4956 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 4957 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 4958 */
Kojto 90:cb3d968589d8 4959 /*@{*/
Kojto 90:cb3d968589d8 4960 #define BP_AIPS_PACRF_TP0 (28U) /*!< Bit position for AIPS_PACRF_TP0. */
Kojto 90:cb3d968589d8 4961 #define BM_AIPS_PACRF_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRF_TP0. */
Kojto 90:cb3d968589d8 4962 #define BS_AIPS_PACRF_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRF_TP0. */
Kojto 90:cb3d968589d8 4963
Kojto 90:cb3d968589d8 4964 /*! @brief Read current value of the AIPS_PACRF_TP0 field. */
Kojto 90:cb3d968589d8 4965 #define BR_AIPS_PACRF_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP0))
Kojto 90:cb3d968589d8 4966
Kojto 90:cb3d968589d8 4967 /*! @brief Format value for bitfield AIPS_PACRF_TP0. */
Kojto 90:cb3d968589d8 4968 #define BF_AIPS_PACRF_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_TP0) & BM_AIPS_PACRF_TP0)
Kojto 90:cb3d968589d8 4969
Kojto 90:cb3d968589d8 4970 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 4971 #define BW_AIPS_PACRF_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP0) = (v))
Kojto 90:cb3d968589d8 4972 /*@}*/
Kojto 90:cb3d968589d8 4973
Kojto 90:cb3d968589d8 4974 /*!
Kojto 90:cb3d968589d8 4975 * @name Register AIPS_PACRF, field WP0[29] (RW)
Kojto 90:cb3d968589d8 4976 *
Kojto 90:cb3d968589d8 4977 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 4978 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 4979 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 4980 *
Kojto 90:cb3d968589d8 4981 * Values:
Kojto 90:cb3d968589d8 4982 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 4983 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 4984 */
Kojto 90:cb3d968589d8 4985 /*@{*/
Kojto 90:cb3d968589d8 4986 #define BP_AIPS_PACRF_WP0 (29U) /*!< Bit position for AIPS_PACRF_WP0. */
Kojto 90:cb3d968589d8 4987 #define BM_AIPS_PACRF_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRF_WP0. */
Kojto 90:cb3d968589d8 4988 #define BS_AIPS_PACRF_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRF_WP0. */
Kojto 90:cb3d968589d8 4989
Kojto 90:cb3d968589d8 4990 /*! @brief Read current value of the AIPS_PACRF_WP0 field. */
Kojto 90:cb3d968589d8 4991 #define BR_AIPS_PACRF_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP0))
Kojto 90:cb3d968589d8 4992
Kojto 90:cb3d968589d8 4993 /*! @brief Format value for bitfield AIPS_PACRF_WP0. */
Kojto 90:cb3d968589d8 4994 #define BF_AIPS_PACRF_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_WP0) & BM_AIPS_PACRF_WP0)
Kojto 90:cb3d968589d8 4995
Kojto 90:cb3d968589d8 4996 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 4997 #define BW_AIPS_PACRF_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP0) = (v))
Kojto 90:cb3d968589d8 4998 /*@}*/
Kojto 90:cb3d968589d8 4999
Kojto 90:cb3d968589d8 5000 /*!
Kojto 90:cb3d968589d8 5001 * @name Register AIPS_PACRF, field SP0[30] (RW)
Kojto 90:cb3d968589d8 5002 *
Kojto 90:cb3d968589d8 5003 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5004 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5005 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 5006 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 5007 * access initiates.
Kojto 90:cb3d968589d8 5008 *
Kojto 90:cb3d968589d8 5009 * Values:
Kojto 90:cb3d968589d8 5010 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5011 * accesses.
Kojto 90:cb3d968589d8 5012 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5013 */
Kojto 90:cb3d968589d8 5014 /*@{*/
Kojto 90:cb3d968589d8 5015 #define BP_AIPS_PACRF_SP0 (30U) /*!< Bit position for AIPS_PACRF_SP0. */
Kojto 90:cb3d968589d8 5016 #define BM_AIPS_PACRF_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRF_SP0. */
Kojto 90:cb3d968589d8 5017 #define BS_AIPS_PACRF_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRF_SP0. */
Kojto 90:cb3d968589d8 5018
Kojto 90:cb3d968589d8 5019 /*! @brief Read current value of the AIPS_PACRF_SP0 field. */
Kojto 90:cb3d968589d8 5020 #define BR_AIPS_PACRF_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP0))
Kojto 90:cb3d968589d8 5021
Kojto 90:cb3d968589d8 5022 /*! @brief Format value for bitfield AIPS_PACRF_SP0. */
Kojto 90:cb3d968589d8 5023 #define BF_AIPS_PACRF_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRF_SP0) & BM_AIPS_PACRF_SP0)
Kojto 90:cb3d968589d8 5024
Kojto 90:cb3d968589d8 5025 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 5026 #define BW_AIPS_PACRF_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP0) = (v))
Kojto 90:cb3d968589d8 5027 /*@}*/
Kojto 90:cb3d968589d8 5028
Kojto 90:cb3d968589d8 5029 /*******************************************************************************
Kojto 90:cb3d968589d8 5030 * HW_AIPS_PACRG - Peripheral Access Control Register
Kojto 90:cb3d968589d8 5031 ******************************************************************************/
Kojto 90:cb3d968589d8 5032
Kojto 90:cb3d968589d8 5033 /*!
Kojto 90:cb3d968589d8 5034 * @brief HW_AIPS_PACRG - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 5035 *
Kojto 90:cb3d968589d8 5036 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 5037 *
Kojto 90:cb3d968589d8 5038 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 5039 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 5040 * registers.
Kojto 90:cb3d968589d8 5041 */
Kojto 90:cb3d968589d8 5042 typedef union _hw_aips_pacrg
Kojto 90:cb3d968589d8 5043 {
Kojto 90:cb3d968589d8 5044 uint32_t U;
Kojto 90:cb3d968589d8 5045 struct _hw_aips_pacrg_bitfields
Kojto 90:cb3d968589d8 5046 {
Kojto 90:cb3d968589d8 5047 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 5048 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 5049 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 5050 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 5051 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 5052 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 5053 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 5054 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 5055 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 5056 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 5057 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 5058 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 5059 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 5060 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 5061 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 5062 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 5063 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 5064 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 5065 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 5066 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 5067 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 5068 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 5069 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 5070 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 5071 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 5072 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 5073 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 5074 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 5075 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 5076 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 5077 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 5078 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 5079 } B;
Kojto 90:cb3d968589d8 5080 } hw_aips_pacrg_t;
Kojto 90:cb3d968589d8 5081
Kojto 90:cb3d968589d8 5082 /*!
Kojto 90:cb3d968589d8 5083 * @name Constants and macros for entire AIPS_PACRG register
Kojto 90:cb3d968589d8 5084 */
Kojto 90:cb3d968589d8 5085 /*@{*/
Kojto 90:cb3d968589d8 5086 #define HW_AIPS_PACRG_ADDR(x) ((x) + 0x48U)
Kojto 90:cb3d968589d8 5087
Kojto 90:cb3d968589d8 5088 #define HW_AIPS_PACRG(x) (*(__IO hw_aips_pacrg_t *) HW_AIPS_PACRG_ADDR(x))
Kojto 90:cb3d968589d8 5089 #define HW_AIPS_PACRG_RD(x) (HW_AIPS_PACRG(x).U)
Kojto 90:cb3d968589d8 5090 #define HW_AIPS_PACRG_WR(x, v) (HW_AIPS_PACRG(x).U = (v))
Kojto 90:cb3d968589d8 5091 #define HW_AIPS_PACRG_SET(x, v) (HW_AIPS_PACRG_WR(x, HW_AIPS_PACRG_RD(x) | (v)))
Kojto 90:cb3d968589d8 5092 #define HW_AIPS_PACRG_CLR(x, v) (HW_AIPS_PACRG_WR(x, HW_AIPS_PACRG_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 5093 #define HW_AIPS_PACRG_TOG(x, v) (HW_AIPS_PACRG_WR(x, HW_AIPS_PACRG_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 5094 /*@}*/
Kojto 90:cb3d968589d8 5095
Kojto 90:cb3d968589d8 5096 /*
Kojto 90:cb3d968589d8 5097 * Constants & macros for individual AIPS_PACRG bitfields
Kojto 90:cb3d968589d8 5098 */
Kojto 90:cb3d968589d8 5099
Kojto 90:cb3d968589d8 5100 /*!
Kojto 90:cb3d968589d8 5101 * @name Register AIPS_PACRG, field TP7[0] (RW)
Kojto 90:cb3d968589d8 5102 *
Kojto 90:cb3d968589d8 5103 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5104 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5105 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5106 *
Kojto 90:cb3d968589d8 5107 * Values:
Kojto 90:cb3d968589d8 5108 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5109 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5110 */
Kojto 90:cb3d968589d8 5111 /*@{*/
Kojto 90:cb3d968589d8 5112 #define BP_AIPS_PACRG_TP7 (0U) /*!< Bit position for AIPS_PACRG_TP7. */
Kojto 90:cb3d968589d8 5113 #define BM_AIPS_PACRG_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRG_TP7. */
Kojto 90:cb3d968589d8 5114 #define BS_AIPS_PACRG_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP7. */
Kojto 90:cb3d968589d8 5115
Kojto 90:cb3d968589d8 5116 /*! @brief Read current value of the AIPS_PACRG_TP7 field. */
Kojto 90:cb3d968589d8 5117 #define BR_AIPS_PACRG_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP7))
Kojto 90:cb3d968589d8 5118
Kojto 90:cb3d968589d8 5119 /*! @brief Format value for bitfield AIPS_PACRG_TP7. */
Kojto 90:cb3d968589d8 5120 #define BF_AIPS_PACRG_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP7) & BM_AIPS_PACRG_TP7)
Kojto 90:cb3d968589d8 5121
Kojto 90:cb3d968589d8 5122 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 5123 #define BW_AIPS_PACRG_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP7) = (v))
Kojto 90:cb3d968589d8 5124 /*@}*/
Kojto 90:cb3d968589d8 5125
Kojto 90:cb3d968589d8 5126 /*!
Kojto 90:cb3d968589d8 5127 * @name Register AIPS_PACRG, field WP7[1] (RW)
Kojto 90:cb3d968589d8 5128 *
Kojto 90:cb3d968589d8 5129 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 5130 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 5131 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 5132 *
Kojto 90:cb3d968589d8 5133 * Values:
Kojto 90:cb3d968589d8 5134 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 5135 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 5136 */
Kojto 90:cb3d968589d8 5137 /*@{*/
Kojto 90:cb3d968589d8 5138 #define BP_AIPS_PACRG_WP7 (1U) /*!< Bit position for AIPS_PACRG_WP7. */
Kojto 90:cb3d968589d8 5139 #define BM_AIPS_PACRG_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRG_WP7. */
Kojto 90:cb3d968589d8 5140 #define BS_AIPS_PACRG_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP7. */
Kojto 90:cb3d968589d8 5141
Kojto 90:cb3d968589d8 5142 /*! @brief Read current value of the AIPS_PACRG_WP7 field. */
Kojto 90:cb3d968589d8 5143 #define BR_AIPS_PACRG_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP7))
Kojto 90:cb3d968589d8 5144
Kojto 90:cb3d968589d8 5145 /*! @brief Format value for bitfield AIPS_PACRG_WP7. */
Kojto 90:cb3d968589d8 5146 #define BF_AIPS_PACRG_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP7) & BM_AIPS_PACRG_WP7)
Kojto 90:cb3d968589d8 5147
Kojto 90:cb3d968589d8 5148 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 5149 #define BW_AIPS_PACRG_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP7) = (v))
Kojto 90:cb3d968589d8 5150 /*@}*/
Kojto 90:cb3d968589d8 5151
Kojto 90:cb3d968589d8 5152 /*!
Kojto 90:cb3d968589d8 5153 * @name Register AIPS_PACRG, field SP7[2] (RW)
Kojto 90:cb3d968589d8 5154 *
Kojto 90:cb3d968589d8 5155 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5156 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5157 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 5158 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 5159 * access initiates.
Kojto 90:cb3d968589d8 5160 *
Kojto 90:cb3d968589d8 5161 * Values:
Kojto 90:cb3d968589d8 5162 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5163 * accesses.
Kojto 90:cb3d968589d8 5164 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5165 */
Kojto 90:cb3d968589d8 5166 /*@{*/
Kojto 90:cb3d968589d8 5167 #define BP_AIPS_PACRG_SP7 (2U) /*!< Bit position for AIPS_PACRG_SP7. */
Kojto 90:cb3d968589d8 5168 #define BM_AIPS_PACRG_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRG_SP7. */
Kojto 90:cb3d968589d8 5169 #define BS_AIPS_PACRG_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP7. */
Kojto 90:cb3d968589d8 5170
Kojto 90:cb3d968589d8 5171 /*! @brief Read current value of the AIPS_PACRG_SP7 field. */
Kojto 90:cb3d968589d8 5172 #define BR_AIPS_PACRG_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP7))
Kojto 90:cb3d968589d8 5173
Kojto 90:cb3d968589d8 5174 /*! @brief Format value for bitfield AIPS_PACRG_SP7. */
Kojto 90:cb3d968589d8 5175 #define BF_AIPS_PACRG_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP7) & BM_AIPS_PACRG_SP7)
Kojto 90:cb3d968589d8 5176
Kojto 90:cb3d968589d8 5177 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 5178 #define BW_AIPS_PACRG_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP7) = (v))
Kojto 90:cb3d968589d8 5179 /*@}*/
Kojto 90:cb3d968589d8 5180
Kojto 90:cb3d968589d8 5181 /*!
Kojto 90:cb3d968589d8 5182 * @name Register AIPS_PACRG, field TP6[4] (RW)
Kojto 90:cb3d968589d8 5183 *
Kojto 90:cb3d968589d8 5184 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5185 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5186 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5187 *
Kojto 90:cb3d968589d8 5188 * Values:
Kojto 90:cb3d968589d8 5189 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5190 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5191 */
Kojto 90:cb3d968589d8 5192 /*@{*/
Kojto 90:cb3d968589d8 5193 #define BP_AIPS_PACRG_TP6 (4U) /*!< Bit position for AIPS_PACRG_TP6. */
Kojto 90:cb3d968589d8 5194 #define BM_AIPS_PACRG_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRG_TP6. */
Kojto 90:cb3d968589d8 5195 #define BS_AIPS_PACRG_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP6. */
Kojto 90:cb3d968589d8 5196
Kojto 90:cb3d968589d8 5197 /*! @brief Read current value of the AIPS_PACRG_TP6 field. */
Kojto 90:cb3d968589d8 5198 #define BR_AIPS_PACRG_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP6))
Kojto 90:cb3d968589d8 5199
Kojto 90:cb3d968589d8 5200 /*! @brief Format value for bitfield AIPS_PACRG_TP6. */
Kojto 90:cb3d968589d8 5201 #define BF_AIPS_PACRG_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP6) & BM_AIPS_PACRG_TP6)
Kojto 90:cb3d968589d8 5202
Kojto 90:cb3d968589d8 5203 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 5204 #define BW_AIPS_PACRG_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP6) = (v))
Kojto 90:cb3d968589d8 5205 /*@}*/
Kojto 90:cb3d968589d8 5206
Kojto 90:cb3d968589d8 5207 /*!
Kojto 90:cb3d968589d8 5208 * @name Register AIPS_PACRG, field WP6[5] (RW)
Kojto 90:cb3d968589d8 5209 *
Kojto 90:cb3d968589d8 5210 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 5211 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 5212 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 5213 *
Kojto 90:cb3d968589d8 5214 * Values:
Kojto 90:cb3d968589d8 5215 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 5216 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 5217 */
Kojto 90:cb3d968589d8 5218 /*@{*/
Kojto 90:cb3d968589d8 5219 #define BP_AIPS_PACRG_WP6 (5U) /*!< Bit position for AIPS_PACRG_WP6. */
Kojto 90:cb3d968589d8 5220 #define BM_AIPS_PACRG_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRG_WP6. */
Kojto 90:cb3d968589d8 5221 #define BS_AIPS_PACRG_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP6. */
Kojto 90:cb3d968589d8 5222
Kojto 90:cb3d968589d8 5223 /*! @brief Read current value of the AIPS_PACRG_WP6 field. */
Kojto 90:cb3d968589d8 5224 #define BR_AIPS_PACRG_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP6))
Kojto 90:cb3d968589d8 5225
Kojto 90:cb3d968589d8 5226 /*! @brief Format value for bitfield AIPS_PACRG_WP6. */
Kojto 90:cb3d968589d8 5227 #define BF_AIPS_PACRG_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP6) & BM_AIPS_PACRG_WP6)
Kojto 90:cb3d968589d8 5228
Kojto 90:cb3d968589d8 5229 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 5230 #define BW_AIPS_PACRG_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP6) = (v))
Kojto 90:cb3d968589d8 5231 /*@}*/
Kojto 90:cb3d968589d8 5232
Kojto 90:cb3d968589d8 5233 /*!
Kojto 90:cb3d968589d8 5234 * @name Register AIPS_PACRG, field SP6[6] (RW)
Kojto 90:cb3d968589d8 5235 *
Kojto 90:cb3d968589d8 5236 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5237 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5238 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 5239 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 5240 * access initiates.
Kojto 90:cb3d968589d8 5241 *
Kojto 90:cb3d968589d8 5242 * Values:
Kojto 90:cb3d968589d8 5243 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5244 * accesses.
Kojto 90:cb3d968589d8 5245 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5246 */
Kojto 90:cb3d968589d8 5247 /*@{*/
Kojto 90:cb3d968589d8 5248 #define BP_AIPS_PACRG_SP6 (6U) /*!< Bit position for AIPS_PACRG_SP6. */
Kojto 90:cb3d968589d8 5249 #define BM_AIPS_PACRG_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRG_SP6. */
Kojto 90:cb3d968589d8 5250 #define BS_AIPS_PACRG_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP6. */
Kojto 90:cb3d968589d8 5251
Kojto 90:cb3d968589d8 5252 /*! @brief Read current value of the AIPS_PACRG_SP6 field. */
Kojto 90:cb3d968589d8 5253 #define BR_AIPS_PACRG_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP6))
Kojto 90:cb3d968589d8 5254
Kojto 90:cb3d968589d8 5255 /*! @brief Format value for bitfield AIPS_PACRG_SP6. */
Kojto 90:cb3d968589d8 5256 #define BF_AIPS_PACRG_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP6) & BM_AIPS_PACRG_SP6)
Kojto 90:cb3d968589d8 5257
Kojto 90:cb3d968589d8 5258 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 5259 #define BW_AIPS_PACRG_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP6) = (v))
Kojto 90:cb3d968589d8 5260 /*@}*/
Kojto 90:cb3d968589d8 5261
Kojto 90:cb3d968589d8 5262 /*!
Kojto 90:cb3d968589d8 5263 * @name Register AIPS_PACRG, field TP5[8] (RW)
Kojto 90:cb3d968589d8 5264 *
Kojto 90:cb3d968589d8 5265 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5266 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5267 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5268 *
Kojto 90:cb3d968589d8 5269 * Values:
Kojto 90:cb3d968589d8 5270 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5271 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5272 */
Kojto 90:cb3d968589d8 5273 /*@{*/
Kojto 90:cb3d968589d8 5274 #define BP_AIPS_PACRG_TP5 (8U) /*!< Bit position for AIPS_PACRG_TP5. */
Kojto 90:cb3d968589d8 5275 #define BM_AIPS_PACRG_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRG_TP5. */
Kojto 90:cb3d968589d8 5276 #define BS_AIPS_PACRG_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP5. */
Kojto 90:cb3d968589d8 5277
Kojto 90:cb3d968589d8 5278 /*! @brief Read current value of the AIPS_PACRG_TP5 field. */
Kojto 90:cb3d968589d8 5279 #define BR_AIPS_PACRG_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP5))
Kojto 90:cb3d968589d8 5280
Kojto 90:cb3d968589d8 5281 /*! @brief Format value for bitfield AIPS_PACRG_TP5. */
Kojto 90:cb3d968589d8 5282 #define BF_AIPS_PACRG_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP5) & BM_AIPS_PACRG_TP5)
Kojto 90:cb3d968589d8 5283
Kojto 90:cb3d968589d8 5284 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 5285 #define BW_AIPS_PACRG_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP5) = (v))
Kojto 90:cb3d968589d8 5286 /*@}*/
Kojto 90:cb3d968589d8 5287
Kojto 90:cb3d968589d8 5288 /*!
Kojto 90:cb3d968589d8 5289 * @name Register AIPS_PACRG, field WP5[9] (RW)
Kojto 90:cb3d968589d8 5290 *
Kojto 90:cb3d968589d8 5291 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 5292 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 5293 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 5294 *
Kojto 90:cb3d968589d8 5295 * Values:
Kojto 90:cb3d968589d8 5296 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 5297 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 5298 */
Kojto 90:cb3d968589d8 5299 /*@{*/
Kojto 90:cb3d968589d8 5300 #define BP_AIPS_PACRG_WP5 (9U) /*!< Bit position for AIPS_PACRG_WP5. */
Kojto 90:cb3d968589d8 5301 #define BM_AIPS_PACRG_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRG_WP5. */
Kojto 90:cb3d968589d8 5302 #define BS_AIPS_PACRG_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP5. */
Kojto 90:cb3d968589d8 5303
Kojto 90:cb3d968589d8 5304 /*! @brief Read current value of the AIPS_PACRG_WP5 field. */
Kojto 90:cb3d968589d8 5305 #define BR_AIPS_PACRG_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP5))
Kojto 90:cb3d968589d8 5306
Kojto 90:cb3d968589d8 5307 /*! @brief Format value for bitfield AIPS_PACRG_WP5. */
Kojto 90:cb3d968589d8 5308 #define BF_AIPS_PACRG_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP5) & BM_AIPS_PACRG_WP5)
Kojto 90:cb3d968589d8 5309
Kojto 90:cb3d968589d8 5310 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 5311 #define BW_AIPS_PACRG_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP5) = (v))
Kojto 90:cb3d968589d8 5312 /*@}*/
Kojto 90:cb3d968589d8 5313
Kojto 90:cb3d968589d8 5314 /*!
Kojto 90:cb3d968589d8 5315 * @name Register AIPS_PACRG, field SP5[10] (RW)
Kojto 90:cb3d968589d8 5316 *
Kojto 90:cb3d968589d8 5317 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5318 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5319 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 5320 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 5321 * access initiates.
Kojto 90:cb3d968589d8 5322 *
Kojto 90:cb3d968589d8 5323 * Values:
Kojto 90:cb3d968589d8 5324 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5325 * accesses.
Kojto 90:cb3d968589d8 5326 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5327 */
Kojto 90:cb3d968589d8 5328 /*@{*/
Kojto 90:cb3d968589d8 5329 #define BP_AIPS_PACRG_SP5 (10U) /*!< Bit position for AIPS_PACRG_SP5. */
Kojto 90:cb3d968589d8 5330 #define BM_AIPS_PACRG_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRG_SP5. */
Kojto 90:cb3d968589d8 5331 #define BS_AIPS_PACRG_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP5. */
Kojto 90:cb3d968589d8 5332
Kojto 90:cb3d968589d8 5333 /*! @brief Read current value of the AIPS_PACRG_SP5 field. */
Kojto 90:cb3d968589d8 5334 #define BR_AIPS_PACRG_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP5))
Kojto 90:cb3d968589d8 5335
Kojto 90:cb3d968589d8 5336 /*! @brief Format value for bitfield AIPS_PACRG_SP5. */
Kojto 90:cb3d968589d8 5337 #define BF_AIPS_PACRG_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP5) & BM_AIPS_PACRG_SP5)
Kojto 90:cb3d968589d8 5338
Kojto 90:cb3d968589d8 5339 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 5340 #define BW_AIPS_PACRG_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP5) = (v))
Kojto 90:cb3d968589d8 5341 /*@}*/
Kojto 90:cb3d968589d8 5342
Kojto 90:cb3d968589d8 5343 /*!
Kojto 90:cb3d968589d8 5344 * @name Register AIPS_PACRG, field TP4[12] (RW)
Kojto 90:cb3d968589d8 5345 *
Kojto 90:cb3d968589d8 5346 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5347 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5348 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5349 *
Kojto 90:cb3d968589d8 5350 * Values:
Kojto 90:cb3d968589d8 5351 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5352 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5353 */
Kojto 90:cb3d968589d8 5354 /*@{*/
Kojto 90:cb3d968589d8 5355 #define BP_AIPS_PACRG_TP4 (12U) /*!< Bit position for AIPS_PACRG_TP4. */
Kojto 90:cb3d968589d8 5356 #define BM_AIPS_PACRG_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRG_TP4. */
Kojto 90:cb3d968589d8 5357 #define BS_AIPS_PACRG_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP4. */
Kojto 90:cb3d968589d8 5358
Kojto 90:cb3d968589d8 5359 /*! @brief Read current value of the AIPS_PACRG_TP4 field. */
Kojto 90:cb3d968589d8 5360 #define BR_AIPS_PACRG_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP4))
Kojto 90:cb3d968589d8 5361
Kojto 90:cb3d968589d8 5362 /*! @brief Format value for bitfield AIPS_PACRG_TP4. */
Kojto 90:cb3d968589d8 5363 #define BF_AIPS_PACRG_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP4) & BM_AIPS_PACRG_TP4)
Kojto 90:cb3d968589d8 5364
Kojto 90:cb3d968589d8 5365 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 5366 #define BW_AIPS_PACRG_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP4) = (v))
Kojto 90:cb3d968589d8 5367 /*@}*/
Kojto 90:cb3d968589d8 5368
Kojto 90:cb3d968589d8 5369 /*!
Kojto 90:cb3d968589d8 5370 * @name Register AIPS_PACRG, field WP4[13] (RW)
Kojto 90:cb3d968589d8 5371 *
Kojto 90:cb3d968589d8 5372 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 5373 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 5374 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 5375 *
Kojto 90:cb3d968589d8 5376 * Values:
Kojto 90:cb3d968589d8 5377 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 5378 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 5379 */
Kojto 90:cb3d968589d8 5380 /*@{*/
Kojto 90:cb3d968589d8 5381 #define BP_AIPS_PACRG_WP4 (13U) /*!< Bit position for AIPS_PACRG_WP4. */
Kojto 90:cb3d968589d8 5382 #define BM_AIPS_PACRG_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRG_WP4. */
Kojto 90:cb3d968589d8 5383 #define BS_AIPS_PACRG_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP4. */
Kojto 90:cb3d968589d8 5384
Kojto 90:cb3d968589d8 5385 /*! @brief Read current value of the AIPS_PACRG_WP4 field. */
Kojto 90:cb3d968589d8 5386 #define BR_AIPS_PACRG_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP4))
Kojto 90:cb3d968589d8 5387
Kojto 90:cb3d968589d8 5388 /*! @brief Format value for bitfield AIPS_PACRG_WP4. */
Kojto 90:cb3d968589d8 5389 #define BF_AIPS_PACRG_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP4) & BM_AIPS_PACRG_WP4)
Kojto 90:cb3d968589d8 5390
Kojto 90:cb3d968589d8 5391 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 5392 #define BW_AIPS_PACRG_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP4) = (v))
Kojto 90:cb3d968589d8 5393 /*@}*/
Kojto 90:cb3d968589d8 5394
Kojto 90:cb3d968589d8 5395 /*!
Kojto 90:cb3d968589d8 5396 * @name Register AIPS_PACRG, field SP4[14] (RW)
Kojto 90:cb3d968589d8 5397 *
Kojto 90:cb3d968589d8 5398 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5399 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5400 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 5401 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 5402 * initiates.
Kojto 90:cb3d968589d8 5403 *
Kojto 90:cb3d968589d8 5404 * Values:
Kojto 90:cb3d968589d8 5405 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5406 * accesses.
Kojto 90:cb3d968589d8 5407 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5408 */
Kojto 90:cb3d968589d8 5409 /*@{*/
Kojto 90:cb3d968589d8 5410 #define BP_AIPS_PACRG_SP4 (14U) /*!< Bit position for AIPS_PACRG_SP4. */
Kojto 90:cb3d968589d8 5411 #define BM_AIPS_PACRG_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRG_SP4. */
Kojto 90:cb3d968589d8 5412 #define BS_AIPS_PACRG_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP4. */
Kojto 90:cb3d968589d8 5413
Kojto 90:cb3d968589d8 5414 /*! @brief Read current value of the AIPS_PACRG_SP4 field. */
Kojto 90:cb3d968589d8 5415 #define BR_AIPS_PACRG_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP4))
Kojto 90:cb3d968589d8 5416
Kojto 90:cb3d968589d8 5417 /*! @brief Format value for bitfield AIPS_PACRG_SP4. */
Kojto 90:cb3d968589d8 5418 #define BF_AIPS_PACRG_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP4) & BM_AIPS_PACRG_SP4)
Kojto 90:cb3d968589d8 5419
Kojto 90:cb3d968589d8 5420 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 5421 #define BW_AIPS_PACRG_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP4) = (v))
Kojto 90:cb3d968589d8 5422 /*@}*/
Kojto 90:cb3d968589d8 5423
Kojto 90:cb3d968589d8 5424 /*!
Kojto 90:cb3d968589d8 5425 * @name Register AIPS_PACRG, field TP3[16] (RW)
Kojto 90:cb3d968589d8 5426 *
Kojto 90:cb3d968589d8 5427 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5428 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5429 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5430 *
Kojto 90:cb3d968589d8 5431 * Values:
Kojto 90:cb3d968589d8 5432 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5433 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5434 */
Kojto 90:cb3d968589d8 5435 /*@{*/
Kojto 90:cb3d968589d8 5436 #define BP_AIPS_PACRG_TP3 (16U) /*!< Bit position for AIPS_PACRG_TP3. */
Kojto 90:cb3d968589d8 5437 #define BM_AIPS_PACRG_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRG_TP3. */
Kojto 90:cb3d968589d8 5438 #define BS_AIPS_PACRG_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP3. */
Kojto 90:cb3d968589d8 5439
Kojto 90:cb3d968589d8 5440 /*! @brief Read current value of the AIPS_PACRG_TP3 field. */
Kojto 90:cb3d968589d8 5441 #define BR_AIPS_PACRG_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP3))
Kojto 90:cb3d968589d8 5442
Kojto 90:cb3d968589d8 5443 /*! @brief Format value for bitfield AIPS_PACRG_TP3. */
Kojto 90:cb3d968589d8 5444 #define BF_AIPS_PACRG_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP3) & BM_AIPS_PACRG_TP3)
Kojto 90:cb3d968589d8 5445
Kojto 90:cb3d968589d8 5446 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 5447 #define BW_AIPS_PACRG_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP3) = (v))
Kojto 90:cb3d968589d8 5448 /*@}*/
Kojto 90:cb3d968589d8 5449
Kojto 90:cb3d968589d8 5450 /*!
Kojto 90:cb3d968589d8 5451 * @name Register AIPS_PACRG, field WP3[17] (RW)
Kojto 90:cb3d968589d8 5452 *
Kojto 90:cb3d968589d8 5453 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 5454 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 5455 * no peripheral access initiates.
Kojto 90:cb3d968589d8 5456 *
Kojto 90:cb3d968589d8 5457 * Values:
Kojto 90:cb3d968589d8 5458 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 5459 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 5460 */
Kojto 90:cb3d968589d8 5461 /*@{*/
Kojto 90:cb3d968589d8 5462 #define BP_AIPS_PACRG_WP3 (17U) /*!< Bit position for AIPS_PACRG_WP3. */
Kojto 90:cb3d968589d8 5463 #define BM_AIPS_PACRG_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRG_WP3. */
Kojto 90:cb3d968589d8 5464 #define BS_AIPS_PACRG_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP3. */
Kojto 90:cb3d968589d8 5465
Kojto 90:cb3d968589d8 5466 /*! @brief Read current value of the AIPS_PACRG_WP3 field. */
Kojto 90:cb3d968589d8 5467 #define BR_AIPS_PACRG_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP3))
Kojto 90:cb3d968589d8 5468
Kojto 90:cb3d968589d8 5469 /*! @brief Format value for bitfield AIPS_PACRG_WP3. */
Kojto 90:cb3d968589d8 5470 #define BF_AIPS_PACRG_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP3) & BM_AIPS_PACRG_WP3)
Kojto 90:cb3d968589d8 5471
Kojto 90:cb3d968589d8 5472 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 5473 #define BW_AIPS_PACRG_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP3) = (v))
Kojto 90:cb3d968589d8 5474 /*@}*/
Kojto 90:cb3d968589d8 5475
Kojto 90:cb3d968589d8 5476 /*!
Kojto 90:cb3d968589d8 5477 * @name Register AIPS_PACRG, field SP3[18] (RW)
Kojto 90:cb3d968589d8 5478 *
Kojto 90:cb3d968589d8 5479 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5480 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5481 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 5482 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 5483 * access initiates.
Kojto 90:cb3d968589d8 5484 *
Kojto 90:cb3d968589d8 5485 * Values:
Kojto 90:cb3d968589d8 5486 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5487 * accesses.
Kojto 90:cb3d968589d8 5488 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5489 */
Kojto 90:cb3d968589d8 5490 /*@{*/
Kojto 90:cb3d968589d8 5491 #define BP_AIPS_PACRG_SP3 (18U) /*!< Bit position for AIPS_PACRG_SP3. */
Kojto 90:cb3d968589d8 5492 #define BM_AIPS_PACRG_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRG_SP3. */
Kojto 90:cb3d968589d8 5493 #define BS_AIPS_PACRG_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP3. */
Kojto 90:cb3d968589d8 5494
Kojto 90:cb3d968589d8 5495 /*! @brief Read current value of the AIPS_PACRG_SP3 field. */
Kojto 90:cb3d968589d8 5496 #define BR_AIPS_PACRG_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP3))
Kojto 90:cb3d968589d8 5497
Kojto 90:cb3d968589d8 5498 /*! @brief Format value for bitfield AIPS_PACRG_SP3. */
Kojto 90:cb3d968589d8 5499 #define BF_AIPS_PACRG_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP3) & BM_AIPS_PACRG_SP3)
Kojto 90:cb3d968589d8 5500
Kojto 90:cb3d968589d8 5501 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 5502 #define BW_AIPS_PACRG_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP3) = (v))
Kojto 90:cb3d968589d8 5503 /*@}*/
Kojto 90:cb3d968589d8 5504
Kojto 90:cb3d968589d8 5505 /*!
Kojto 90:cb3d968589d8 5506 * @name Register AIPS_PACRG, field TP2[20] (RW)
Kojto 90:cb3d968589d8 5507 *
Kojto 90:cb3d968589d8 5508 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5509 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5510 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5511 *
Kojto 90:cb3d968589d8 5512 * Values:
Kojto 90:cb3d968589d8 5513 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5514 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5515 */
Kojto 90:cb3d968589d8 5516 /*@{*/
Kojto 90:cb3d968589d8 5517 #define BP_AIPS_PACRG_TP2 (20U) /*!< Bit position for AIPS_PACRG_TP2. */
Kojto 90:cb3d968589d8 5518 #define BM_AIPS_PACRG_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRG_TP2. */
Kojto 90:cb3d968589d8 5519 #define BS_AIPS_PACRG_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP2. */
Kojto 90:cb3d968589d8 5520
Kojto 90:cb3d968589d8 5521 /*! @brief Read current value of the AIPS_PACRG_TP2 field. */
Kojto 90:cb3d968589d8 5522 #define BR_AIPS_PACRG_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP2))
Kojto 90:cb3d968589d8 5523
Kojto 90:cb3d968589d8 5524 /*! @brief Format value for bitfield AIPS_PACRG_TP2. */
Kojto 90:cb3d968589d8 5525 #define BF_AIPS_PACRG_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP2) & BM_AIPS_PACRG_TP2)
Kojto 90:cb3d968589d8 5526
Kojto 90:cb3d968589d8 5527 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 5528 #define BW_AIPS_PACRG_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP2) = (v))
Kojto 90:cb3d968589d8 5529 /*@}*/
Kojto 90:cb3d968589d8 5530
Kojto 90:cb3d968589d8 5531 /*!
Kojto 90:cb3d968589d8 5532 * @name Register AIPS_PACRG, field WP2[21] (RW)
Kojto 90:cb3d968589d8 5533 *
Kojto 90:cb3d968589d8 5534 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 5535 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 5536 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 5537 *
Kojto 90:cb3d968589d8 5538 * Values:
Kojto 90:cb3d968589d8 5539 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 5540 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 5541 */
Kojto 90:cb3d968589d8 5542 /*@{*/
Kojto 90:cb3d968589d8 5543 #define BP_AIPS_PACRG_WP2 (21U) /*!< Bit position for AIPS_PACRG_WP2. */
Kojto 90:cb3d968589d8 5544 #define BM_AIPS_PACRG_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRG_WP2. */
Kojto 90:cb3d968589d8 5545 #define BS_AIPS_PACRG_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP2. */
Kojto 90:cb3d968589d8 5546
Kojto 90:cb3d968589d8 5547 /*! @brief Read current value of the AIPS_PACRG_WP2 field. */
Kojto 90:cb3d968589d8 5548 #define BR_AIPS_PACRG_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP2))
Kojto 90:cb3d968589d8 5549
Kojto 90:cb3d968589d8 5550 /*! @brief Format value for bitfield AIPS_PACRG_WP2. */
Kojto 90:cb3d968589d8 5551 #define BF_AIPS_PACRG_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP2) & BM_AIPS_PACRG_WP2)
Kojto 90:cb3d968589d8 5552
Kojto 90:cb3d968589d8 5553 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 5554 #define BW_AIPS_PACRG_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP2) = (v))
Kojto 90:cb3d968589d8 5555 /*@}*/
Kojto 90:cb3d968589d8 5556
Kojto 90:cb3d968589d8 5557 /*!
Kojto 90:cb3d968589d8 5558 * @name Register AIPS_PACRG, field SP2[22] (RW)
Kojto 90:cb3d968589d8 5559 *
Kojto 90:cb3d968589d8 5560 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5561 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5562 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 5563 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 5564 * initiates.
Kojto 90:cb3d968589d8 5565 *
Kojto 90:cb3d968589d8 5566 * Values:
Kojto 90:cb3d968589d8 5567 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5568 * accesses.
Kojto 90:cb3d968589d8 5569 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5570 */
Kojto 90:cb3d968589d8 5571 /*@{*/
Kojto 90:cb3d968589d8 5572 #define BP_AIPS_PACRG_SP2 (22U) /*!< Bit position for AIPS_PACRG_SP2. */
Kojto 90:cb3d968589d8 5573 #define BM_AIPS_PACRG_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRG_SP2. */
Kojto 90:cb3d968589d8 5574 #define BS_AIPS_PACRG_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP2. */
Kojto 90:cb3d968589d8 5575
Kojto 90:cb3d968589d8 5576 /*! @brief Read current value of the AIPS_PACRG_SP2 field. */
Kojto 90:cb3d968589d8 5577 #define BR_AIPS_PACRG_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP2))
Kojto 90:cb3d968589d8 5578
Kojto 90:cb3d968589d8 5579 /*! @brief Format value for bitfield AIPS_PACRG_SP2. */
Kojto 90:cb3d968589d8 5580 #define BF_AIPS_PACRG_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP2) & BM_AIPS_PACRG_SP2)
Kojto 90:cb3d968589d8 5581
Kojto 90:cb3d968589d8 5582 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 5583 #define BW_AIPS_PACRG_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP2) = (v))
Kojto 90:cb3d968589d8 5584 /*@}*/
Kojto 90:cb3d968589d8 5585
Kojto 90:cb3d968589d8 5586 /*!
Kojto 90:cb3d968589d8 5587 * @name Register AIPS_PACRG, field TP1[24] (RW)
Kojto 90:cb3d968589d8 5588 *
Kojto 90:cb3d968589d8 5589 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5590 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5591 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5592 *
Kojto 90:cb3d968589d8 5593 * Values:
Kojto 90:cb3d968589d8 5594 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5595 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5596 */
Kojto 90:cb3d968589d8 5597 /*@{*/
Kojto 90:cb3d968589d8 5598 #define BP_AIPS_PACRG_TP1 (24U) /*!< Bit position for AIPS_PACRG_TP1. */
Kojto 90:cb3d968589d8 5599 #define BM_AIPS_PACRG_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRG_TP1. */
Kojto 90:cb3d968589d8 5600 #define BS_AIPS_PACRG_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP1. */
Kojto 90:cb3d968589d8 5601
Kojto 90:cb3d968589d8 5602 /*! @brief Read current value of the AIPS_PACRG_TP1 field. */
Kojto 90:cb3d968589d8 5603 #define BR_AIPS_PACRG_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP1))
Kojto 90:cb3d968589d8 5604
Kojto 90:cb3d968589d8 5605 /*! @brief Format value for bitfield AIPS_PACRG_TP1. */
Kojto 90:cb3d968589d8 5606 #define BF_AIPS_PACRG_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP1) & BM_AIPS_PACRG_TP1)
Kojto 90:cb3d968589d8 5607
Kojto 90:cb3d968589d8 5608 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 5609 #define BW_AIPS_PACRG_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP1) = (v))
Kojto 90:cb3d968589d8 5610 /*@}*/
Kojto 90:cb3d968589d8 5611
Kojto 90:cb3d968589d8 5612 /*!
Kojto 90:cb3d968589d8 5613 * @name Register AIPS_PACRG, field WP1[25] (RW)
Kojto 90:cb3d968589d8 5614 *
Kojto 90:cb3d968589d8 5615 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 5616 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 5617 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 5618 *
Kojto 90:cb3d968589d8 5619 * Values:
Kojto 90:cb3d968589d8 5620 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 5621 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 5622 */
Kojto 90:cb3d968589d8 5623 /*@{*/
Kojto 90:cb3d968589d8 5624 #define BP_AIPS_PACRG_WP1 (25U) /*!< Bit position for AIPS_PACRG_WP1. */
Kojto 90:cb3d968589d8 5625 #define BM_AIPS_PACRG_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRG_WP1. */
Kojto 90:cb3d968589d8 5626 #define BS_AIPS_PACRG_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP1. */
Kojto 90:cb3d968589d8 5627
Kojto 90:cb3d968589d8 5628 /*! @brief Read current value of the AIPS_PACRG_WP1 field. */
Kojto 90:cb3d968589d8 5629 #define BR_AIPS_PACRG_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP1))
Kojto 90:cb3d968589d8 5630
Kojto 90:cb3d968589d8 5631 /*! @brief Format value for bitfield AIPS_PACRG_WP1. */
Kojto 90:cb3d968589d8 5632 #define BF_AIPS_PACRG_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP1) & BM_AIPS_PACRG_WP1)
Kojto 90:cb3d968589d8 5633
Kojto 90:cb3d968589d8 5634 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 5635 #define BW_AIPS_PACRG_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP1) = (v))
Kojto 90:cb3d968589d8 5636 /*@}*/
Kojto 90:cb3d968589d8 5637
Kojto 90:cb3d968589d8 5638 /*!
Kojto 90:cb3d968589d8 5639 * @name Register AIPS_PACRG, field SP1[26] (RW)
Kojto 90:cb3d968589d8 5640 *
Kojto 90:cb3d968589d8 5641 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5642 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5643 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 5644 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 5645 * access initiates.
Kojto 90:cb3d968589d8 5646 *
Kojto 90:cb3d968589d8 5647 * Values:
Kojto 90:cb3d968589d8 5648 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5649 * accesses.
Kojto 90:cb3d968589d8 5650 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5651 */
Kojto 90:cb3d968589d8 5652 /*@{*/
Kojto 90:cb3d968589d8 5653 #define BP_AIPS_PACRG_SP1 (26U) /*!< Bit position for AIPS_PACRG_SP1. */
Kojto 90:cb3d968589d8 5654 #define BM_AIPS_PACRG_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRG_SP1. */
Kojto 90:cb3d968589d8 5655 #define BS_AIPS_PACRG_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP1. */
Kojto 90:cb3d968589d8 5656
Kojto 90:cb3d968589d8 5657 /*! @brief Read current value of the AIPS_PACRG_SP1 field. */
Kojto 90:cb3d968589d8 5658 #define BR_AIPS_PACRG_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP1))
Kojto 90:cb3d968589d8 5659
Kojto 90:cb3d968589d8 5660 /*! @brief Format value for bitfield AIPS_PACRG_SP1. */
Kojto 90:cb3d968589d8 5661 #define BF_AIPS_PACRG_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP1) & BM_AIPS_PACRG_SP1)
Kojto 90:cb3d968589d8 5662
Kojto 90:cb3d968589d8 5663 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 5664 #define BW_AIPS_PACRG_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP1) = (v))
Kojto 90:cb3d968589d8 5665 /*@}*/
Kojto 90:cb3d968589d8 5666
Kojto 90:cb3d968589d8 5667 /*!
Kojto 90:cb3d968589d8 5668 * @name Register AIPS_PACRG, field TP0[28] (RW)
Kojto 90:cb3d968589d8 5669 *
Kojto 90:cb3d968589d8 5670 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5671 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5672 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5673 *
Kojto 90:cb3d968589d8 5674 * Values:
Kojto 90:cb3d968589d8 5675 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5676 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5677 */
Kojto 90:cb3d968589d8 5678 /*@{*/
Kojto 90:cb3d968589d8 5679 #define BP_AIPS_PACRG_TP0 (28U) /*!< Bit position for AIPS_PACRG_TP0. */
Kojto 90:cb3d968589d8 5680 #define BM_AIPS_PACRG_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRG_TP0. */
Kojto 90:cb3d968589d8 5681 #define BS_AIPS_PACRG_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRG_TP0. */
Kojto 90:cb3d968589d8 5682
Kojto 90:cb3d968589d8 5683 /*! @brief Read current value of the AIPS_PACRG_TP0 field. */
Kojto 90:cb3d968589d8 5684 #define BR_AIPS_PACRG_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP0))
Kojto 90:cb3d968589d8 5685
Kojto 90:cb3d968589d8 5686 /*! @brief Format value for bitfield AIPS_PACRG_TP0. */
Kojto 90:cb3d968589d8 5687 #define BF_AIPS_PACRG_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_TP0) & BM_AIPS_PACRG_TP0)
Kojto 90:cb3d968589d8 5688
Kojto 90:cb3d968589d8 5689 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 5690 #define BW_AIPS_PACRG_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP0) = (v))
Kojto 90:cb3d968589d8 5691 /*@}*/
Kojto 90:cb3d968589d8 5692
Kojto 90:cb3d968589d8 5693 /*!
Kojto 90:cb3d968589d8 5694 * @name Register AIPS_PACRG, field WP0[29] (RW)
Kojto 90:cb3d968589d8 5695 *
Kojto 90:cb3d968589d8 5696 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 5697 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 5698 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 5699 *
Kojto 90:cb3d968589d8 5700 * Values:
Kojto 90:cb3d968589d8 5701 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 5702 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 5703 */
Kojto 90:cb3d968589d8 5704 /*@{*/
Kojto 90:cb3d968589d8 5705 #define BP_AIPS_PACRG_WP0 (29U) /*!< Bit position for AIPS_PACRG_WP0. */
Kojto 90:cb3d968589d8 5706 #define BM_AIPS_PACRG_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRG_WP0. */
Kojto 90:cb3d968589d8 5707 #define BS_AIPS_PACRG_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRG_WP0. */
Kojto 90:cb3d968589d8 5708
Kojto 90:cb3d968589d8 5709 /*! @brief Read current value of the AIPS_PACRG_WP0 field. */
Kojto 90:cb3d968589d8 5710 #define BR_AIPS_PACRG_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP0))
Kojto 90:cb3d968589d8 5711
Kojto 90:cb3d968589d8 5712 /*! @brief Format value for bitfield AIPS_PACRG_WP0. */
Kojto 90:cb3d968589d8 5713 #define BF_AIPS_PACRG_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_WP0) & BM_AIPS_PACRG_WP0)
Kojto 90:cb3d968589d8 5714
Kojto 90:cb3d968589d8 5715 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 5716 #define BW_AIPS_PACRG_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP0) = (v))
Kojto 90:cb3d968589d8 5717 /*@}*/
Kojto 90:cb3d968589d8 5718
Kojto 90:cb3d968589d8 5719 /*!
Kojto 90:cb3d968589d8 5720 * @name Register AIPS_PACRG, field SP0[30] (RW)
Kojto 90:cb3d968589d8 5721 *
Kojto 90:cb3d968589d8 5722 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5723 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5724 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 5725 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 5726 * access initiates.
Kojto 90:cb3d968589d8 5727 *
Kojto 90:cb3d968589d8 5728 * Values:
Kojto 90:cb3d968589d8 5729 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5730 * accesses.
Kojto 90:cb3d968589d8 5731 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5732 */
Kojto 90:cb3d968589d8 5733 /*@{*/
Kojto 90:cb3d968589d8 5734 #define BP_AIPS_PACRG_SP0 (30U) /*!< Bit position for AIPS_PACRG_SP0. */
Kojto 90:cb3d968589d8 5735 #define BM_AIPS_PACRG_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRG_SP0. */
Kojto 90:cb3d968589d8 5736 #define BS_AIPS_PACRG_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRG_SP0. */
Kojto 90:cb3d968589d8 5737
Kojto 90:cb3d968589d8 5738 /*! @brief Read current value of the AIPS_PACRG_SP0 field. */
Kojto 90:cb3d968589d8 5739 #define BR_AIPS_PACRG_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP0))
Kojto 90:cb3d968589d8 5740
Kojto 90:cb3d968589d8 5741 /*! @brief Format value for bitfield AIPS_PACRG_SP0. */
Kojto 90:cb3d968589d8 5742 #define BF_AIPS_PACRG_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRG_SP0) & BM_AIPS_PACRG_SP0)
Kojto 90:cb3d968589d8 5743
Kojto 90:cb3d968589d8 5744 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 5745 #define BW_AIPS_PACRG_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP0) = (v))
Kojto 90:cb3d968589d8 5746 /*@}*/
Kojto 90:cb3d968589d8 5747
Kojto 90:cb3d968589d8 5748 /*******************************************************************************
Kojto 90:cb3d968589d8 5749 * HW_AIPS_PACRH - Peripheral Access Control Register
Kojto 90:cb3d968589d8 5750 ******************************************************************************/
Kojto 90:cb3d968589d8 5751
Kojto 90:cb3d968589d8 5752 /*!
Kojto 90:cb3d968589d8 5753 * @brief HW_AIPS_PACRH - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 5754 *
Kojto 90:cb3d968589d8 5755 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 5756 *
Kojto 90:cb3d968589d8 5757 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 5758 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 5759 * registers.
Kojto 90:cb3d968589d8 5760 */
Kojto 90:cb3d968589d8 5761 typedef union _hw_aips_pacrh
Kojto 90:cb3d968589d8 5762 {
Kojto 90:cb3d968589d8 5763 uint32_t U;
Kojto 90:cb3d968589d8 5764 struct _hw_aips_pacrh_bitfields
Kojto 90:cb3d968589d8 5765 {
Kojto 90:cb3d968589d8 5766 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 5767 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 5768 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 5769 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 5770 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 5771 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 5772 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 5773 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 5774 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 5775 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 5776 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 5777 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 5778 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 5779 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 5780 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 5781 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 5782 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 5783 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 5784 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 5785 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 5786 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 5787 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 5788 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 5789 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 5790 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 5791 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 5792 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 5793 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 5794 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 5795 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 5796 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 5797 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 5798 } B;
Kojto 90:cb3d968589d8 5799 } hw_aips_pacrh_t;
Kojto 90:cb3d968589d8 5800
Kojto 90:cb3d968589d8 5801 /*!
Kojto 90:cb3d968589d8 5802 * @name Constants and macros for entire AIPS_PACRH register
Kojto 90:cb3d968589d8 5803 */
Kojto 90:cb3d968589d8 5804 /*@{*/
Kojto 90:cb3d968589d8 5805 #define HW_AIPS_PACRH_ADDR(x) ((x) + 0x4CU)
Kojto 90:cb3d968589d8 5806
Kojto 90:cb3d968589d8 5807 #define HW_AIPS_PACRH(x) (*(__IO hw_aips_pacrh_t *) HW_AIPS_PACRH_ADDR(x))
Kojto 90:cb3d968589d8 5808 #define HW_AIPS_PACRH_RD(x) (HW_AIPS_PACRH(x).U)
Kojto 90:cb3d968589d8 5809 #define HW_AIPS_PACRH_WR(x, v) (HW_AIPS_PACRH(x).U = (v))
Kojto 90:cb3d968589d8 5810 #define HW_AIPS_PACRH_SET(x, v) (HW_AIPS_PACRH_WR(x, HW_AIPS_PACRH_RD(x) | (v)))
Kojto 90:cb3d968589d8 5811 #define HW_AIPS_PACRH_CLR(x, v) (HW_AIPS_PACRH_WR(x, HW_AIPS_PACRH_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 5812 #define HW_AIPS_PACRH_TOG(x, v) (HW_AIPS_PACRH_WR(x, HW_AIPS_PACRH_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 5813 /*@}*/
Kojto 90:cb3d968589d8 5814
Kojto 90:cb3d968589d8 5815 /*
Kojto 90:cb3d968589d8 5816 * Constants & macros for individual AIPS_PACRH bitfields
Kojto 90:cb3d968589d8 5817 */
Kojto 90:cb3d968589d8 5818
Kojto 90:cb3d968589d8 5819 /*!
Kojto 90:cb3d968589d8 5820 * @name Register AIPS_PACRH, field TP7[0] (RW)
Kojto 90:cb3d968589d8 5821 *
Kojto 90:cb3d968589d8 5822 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5823 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5824 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5825 *
Kojto 90:cb3d968589d8 5826 * Values:
Kojto 90:cb3d968589d8 5827 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5828 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5829 */
Kojto 90:cb3d968589d8 5830 /*@{*/
Kojto 90:cb3d968589d8 5831 #define BP_AIPS_PACRH_TP7 (0U) /*!< Bit position for AIPS_PACRH_TP7. */
Kojto 90:cb3d968589d8 5832 #define BM_AIPS_PACRH_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRH_TP7. */
Kojto 90:cb3d968589d8 5833 #define BS_AIPS_PACRH_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP7. */
Kojto 90:cb3d968589d8 5834
Kojto 90:cb3d968589d8 5835 /*! @brief Read current value of the AIPS_PACRH_TP7 field. */
Kojto 90:cb3d968589d8 5836 #define BR_AIPS_PACRH_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP7))
Kojto 90:cb3d968589d8 5837
Kojto 90:cb3d968589d8 5838 /*! @brief Format value for bitfield AIPS_PACRH_TP7. */
Kojto 90:cb3d968589d8 5839 #define BF_AIPS_PACRH_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP7) & BM_AIPS_PACRH_TP7)
Kojto 90:cb3d968589d8 5840
Kojto 90:cb3d968589d8 5841 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 5842 #define BW_AIPS_PACRH_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP7) = (v))
Kojto 90:cb3d968589d8 5843 /*@}*/
Kojto 90:cb3d968589d8 5844
Kojto 90:cb3d968589d8 5845 /*!
Kojto 90:cb3d968589d8 5846 * @name Register AIPS_PACRH, field WP7[1] (RW)
Kojto 90:cb3d968589d8 5847 *
Kojto 90:cb3d968589d8 5848 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 5849 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 5850 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 5851 *
Kojto 90:cb3d968589d8 5852 * Values:
Kojto 90:cb3d968589d8 5853 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 5854 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 5855 */
Kojto 90:cb3d968589d8 5856 /*@{*/
Kojto 90:cb3d968589d8 5857 #define BP_AIPS_PACRH_WP7 (1U) /*!< Bit position for AIPS_PACRH_WP7. */
Kojto 90:cb3d968589d8 5858 #define BM_AIPS_PACRH_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRH_WP7. */
Kojto 90:cb3d968589d8 5859 #define BS_AIPS_PACRH_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP7. */
Kojto 90:cb3d968589d8 5860
Kojto 90:cb3d968589d8 5861 /*! @brief Read current value of the AIPS_PACRH_WP7 field. */
Kojto 90:cb3d968589d8 5862 #define BR_AIPS_PACRH_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP7))
Kojto 90:cb3d968589d8 5863
Kojto 90:cb3d968589d8 5864 /*! @brief Format value for bitfield AIPS_PACRH_WP7. */
Kojto 90:cb3d968589d8 5865 #define BF_AIPS_PACRH_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP7) & BM_AIPS_PACRH_WP7)
Kojto 90:cb3d968589d8 5866
Kojto 90:cb3d968589d8 5867 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 5868 #define BW_AIPS_PACRH_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP7) = (v))
Kojto 90:cb3d968589d8 5869 /*@}*/
Kojto 90:cb3d968589d8 5870
Kojto 90:cb3d968589d8 5871 /*!
Kojto 90:cb3d968589d8 5872 * @name Register AIPS_PACRH, field SP7[2] (RW)
Kojto 90:cb3d968589d8 5873 *
Kojto 90:cb3d968589d8 5874 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5875 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5876 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 5877 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 5878 * access initiates.
Kojto 90:cb3d968589d8 5879 *
Kojto 90:cb3d968589d8 5880 * Values:
Kojto 90:cb3d968589d8 5881 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5882 * accesses.
Kojto 90:cb3d968589d8 5883 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5884 */
Kojto 90:cb3d968589d8 5885 /*@{*/
Kojto 90:cb3d968589d8 5886 #define BP_AIPS_PACRH_SP7 (2U) /*!< Bit position for AIPS_PACRH_SP7. */
Kojto 90:cb3d968589d8 5887 #define BM_AIPS_PACRH_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRH_SP7. */
Kojto 90:cb3d968589d8 5888 #define BS_AIPS_PACRH_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP7. */
Kojto 90:cb3d968589d8 5889
Kojto 90:cb3d968589d8 5890 /*! @brief Read current value of the AIPS_PACRH_SP7 field. */
Kojto 90:cb3d968589d8 5891 #define BR_AIPS_PACRH_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP7))
Kojto 90:cb3d968589d8 5892
Kojto 90:cb3d968589d8 5893 /*! @brief Format value for bitfield AIPS_PACRH_SP7. */
Kojto 90:cb3d968589d8 5894 #define BF_AIPS_PACRH_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP7) & BM_AIPS_PACRH_SP7)
Kojto 90:cb3d968589d8 5895
Kojto 90:cb3d968589d8 5896 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 5897 #define BW_AIPS_PACRH_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP7) = (v))
Kojto 90:cb3d968589d8 5898 /*@}*/
Kojto 90:cb3d968589d8 5899
Kojto 90:cb3d968589d8 5900 /*!
Kojto 90:cb3d968589d8 5901 * @name Register AIPS_PACRH, field TP6[4] (RW)
Kojto 90:cb3d968589d8 5902 *
Kojto 90:cb3d968589d8 5903 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5904 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5905 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5906 *
Kojto 90:cb3d968589d8 5907 * Values:
Kojto 90:cb3d968589d8 5908 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5909 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5910 */
Kojto 90:cb3d968589d8 5911 /*@{*/
Kojto 90:cb3d968589d8 5912 #define BP_AIPS_PACRH_TP6 (4U) /*!< Bit position for AIPS_PACRH_TP6. */
Kojto 90:cb3d968589d8 5913 #define BM_AIPS_PACRH_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRH_TP6. */
Kojto 90:cb3d968589d8 5914 #define BS_AIPS_PACRH_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP6. */
Kojto 90:cb3d968589d8 5915
Kojto 90:cb3d968589d8 5916 /*! @brief Read current value of the AIPS_PACRH_TP6 field. */
Kojto 90:cb3d968589d8 5917 #define BR_AIPS_PACRH_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP6))
Kojto 90:cb3d968589d8 5918
Kojto 90:cb3d968589d8 5919 /*! @brief Format value for bitfield AIPS_PACRH_TP6. */
Kojto 90:cb3d968589d8 5920 #define BF_AIPS_PACRH_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP6) & BM_AIPS_PACRH_TP6)
Kojto 90:cb3d968589d8 5921
Kojto 90:cb3d968589d8 5922 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 5923 #define BW_AIPS_PACRH_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP6) = (v))
Kojto 90:cb3d968589d8 5924 /*@}*/
Kojto 90:cb3d968589d8 5925
Kojto 90:cb3d968589d8 5926 /*!
Kojto 90:cb3d968589d8 5927 * @name Register AIPS_PACRH, field WP6[5] (RW)
Kojto 90:cb3d968589d8 5928 *
Kojto 90:cb3d968589d8 5929 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 5930 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 5931 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 5932 *
Kojto 90:cb3d968589d8 5933 * Values:
Kojto 90:cb3d968589d8 5934 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 5935 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 5936 */
Kojto 90:cb3d968589d8 5937 /*@{*/
Kojto 90:cb3d968589d8 5938 #define BP_AIPS_PACRH_WP6 (5U) /*!< Bit position for AIPS_PACRH_WP6. */
Kojto 90:cb3d968589d8 5939 #define BM_AIPS_PACRH_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRH_WP6. */
Kojto 90:cb3d968589d8 5940 #define BS_AIPS_PACRH_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP6. */
Kojto 90:cb3d968589d8 5941
Kojto 90:cb3d968589d8 5942 /*! @brief Read current value of the AIPS_PACRH_WP6 field. */
Kojto 90:cb3d968589d8 5943 #define BR_AIPS_PACRH_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP6))
Kojto 90:cb3d968589d8 5944
Kojto 90:cb3d968589d8 5945 /*! @brief Format value for bitfield AIPS_PACRH_WP6. */
Kojto 90:cb3d968589d8 5946 #define BF_AIPS_PACRH_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP6) & BM_AIPS_PACRH_WP6)
Kojto 90:cb3d968589d8 5947
Kojto 90:cb3d968589d8 5948 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 5949 #define BW_AIPS_PACRH_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP6) = (v))
Kojto 90:cb3d968589d8 5950 /*@}*/
Kojto 90:cb3d968589d8 5951
Kojto 90:cb3d968589d8 5952 /*!
Kojto 90:cb3d968589d8 5953 * @name Register AIPS_PACRH, field SP6[6] (RW)
Kojto 90:cb3d968589d8 5954 *
Kojto 90:cb3d968589d8 5955 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 5956 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 5957 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 5958 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 5959 * access initiates.
Kojto 90:cb3d968589d8 5960 *
Kojto 90:cb3d968589d8 5961 * Values:
Kojto 90:cb3d968589d8 5962 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 5963 * accesses.
Kojto 90:cb3d968589d8 5964 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 5965 */
Kojto 90:cb3d968589d8 5966 /*@{*/
Kojto 90:cb3d968589d8 5967 #define BP_AIPS_PACRH_SP6 (6U) /*!< Bit position for AIPS_PACRH_SP6. */
Kojto 90:cb3d968589d8 5968 #define BM_AIPS_PACRH_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRH_SP6. */
Kojto 90:cb3d968589d8 5969 #define BS_AIPS_PACRH_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP6. */
Kojto 90:cb3d968589d8 5970
Kojto 90:cb3d968589d8 5971 /*! @brief Read current value of the AIPS_PACRH_SP6 field. */
Kojto 90:cb3d968589d8 5972 #define BR_AIPS_PACRH_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP6))
Kojto 90:cb3d968589d8 5973
Kojto 90:cb3d968589d8 5974 /*! @brief Format value for bitfield AIPS_PACRH_SP6. */
Kojto 90:cb3d968589d8 5975 #define BF_AIPS_PACRH_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP6) & BM_AIPS_PACRH_SP6)
Kojto 90:cb3d968589d8 5976
Kojto 90:cb3d968589d8 5977 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 5978 #define BW_AIPS_PACRH_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP6) = (v))
Kojto 90:cb3d968589d8 5979 /*@}*/
Kojto 90:cb3d968589d8 5980
Kojto 90:cb3d968589d8 5981 /*!
Kojto 90:cb3d968589d8 5982 * @name Register AIPS_PACRH, field TP5[8] (RW)
Kojto 90:cb3d968589d8 5983 *
Kojto 90:cb3d968589d8 5984 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 5985 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 5986 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 5987 *
Kojto 90:cb3d968589d8 5988 * Values:
Kojto 90:cb3d968589d8 5989 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 5990 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 5991 */
Kojto 90:cb3d968589d8 5992 /*@{*/
Kojto 90:cb3d968589d8 5993 #define BP_AIPS_PACRH_TP5 (8U) /*!< Bit position for AIPS_PACRH_TP5. */
Kojto 90:cb3d968589d8 5994 #define BM_AIPS_PACRH_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRH_TP5. */
Kojto 90:cb3d968589d8 5995 #define BS_AIPS_PACRH_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP5. */
Kojto 90:cb3d968589d8 5996
Kojto 90:cb3d968589d8 5997 /*! @brief Read current value of the AIPS_PACRH_TP5 field. */
Kojto 90:cb3d968589d8 5998 #define BR_AIPS_PACRH_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP5))
Kojto 90:cb3d968589d8 5999
Kojto 90:cb3d968589d8 6000 /*! @brief Format value for bitfield AIPS_PACRH_TP5. */
Kojto 90:cb3d968589d8 6001 #define BF_AIPS_PACRH_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP5) & BM_AIPS_PACRH_TP5)
Kojto 90:cb3d968589d8 6002
Kojto 90:cb3d968589d8 6003 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 6004 #define BW_AIPS_PACRH_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP5) = (v))
Kojto 90:cb3d968589d8 6005 /*@}*/
Kojto 90:cb3d968589d8 6006
Kojto 90:cb3d968589d8 6007 /*!
Kojto 90:cb3d968589d8 6008 * @name Register AIPS_PACRH, field WP5[9] (RW)
Kojto 90:cb3d968589d8 6009 *
Kojto 90:cb3d968589d8 6010 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 6011 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 6012 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 6013 *
Kojto 90:cb3d968589d8 6014 * Values:
Kojto 90:cb3d968589d8 6015 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6016 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6017 */
Kojto 90:cb3d968589d8 6018 /*@{*/
Kojto 90:cb3d968589d8 6019 #define BP_AIPS_PACRH_WP5 (9U) /*!< Bit position for AIPS_PACRH_WP5. */
Kojto 90:cb3d968589d8 6020 #define BM_AIPS_PACRH_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRH_WP5. */
Kojto 90:cb3d968589d8 6021 #define BS_AIPS_PACRH_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP5. */
Kojto 90:cb3d968589d8 6022
Kojto 90:cb3d968589d8 6023 /*! @brief Read current value of the AIPS_PACRH_WP5 field. */
Kojto 90:cb3d968589d8 6024 #define BR_AIPS_PACRH_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP5))
Kojto 90:cb3d968589d8 6025
Kojto 90:cb3d968589d8 6026 /*! @brief Format value for bitfield AIPS_PACRH_WP5. */
Kojto 90:cb3d968589d8 6027 #define BF_AIPS_PACRH_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP5) & BM_AIPS_PACRH_WP5)
Kojto 90:cb3d968589d8 6028
Kojto 90:cb3d968589d8 6029 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 6030 #define BW_AIPS_PACRH_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP5) = (v))
Kojto 90:cb3d968589d8 6031 /*@}*/
Kojto 90:cb3d968589d8 6032
Kojto 90:cb3d968589d8 6033 /*!
Kojto 90:cb3d968589d8 6034 * @name Register AIPS_PACRH, field SP5[10] (RW)
Kojto 90:cb3d968589d8 6035 *
Kojto 90:cb3d968589d8 6036 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6037 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6038 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 6039 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 6040 * access initiates.
Kojto 90:cb3d968589d8 6041 *
Kojto 90:cb3d968589d8 6042 * Values:
Kojto 90:cb3d968589d8 6043 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6044 * accesses.
Kojto 90:cb3d968589d8 6045 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6046 */
Kojto 90:cb3d968589d8 6047 /*@{*/
Kojto 90:cb3d968589d8 6048 #define BP_AIPS_PACRH_SP5 (10U) /*!< Bit position for AIPS_PACRH_SP5. */
Kojto 90:cb3d968589d8 6049 #define BM_AIPS_PACRH_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRH_SP5. */
Kojto 90:cb3d968589d8 6050 #define BS_AIPS_PACRH_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP5. */
Kojto 90:cb3d968589d8 6051
Kojto 90:cb3d968589d8 6052 /*! @brief Read current value of the AIPS_PACRH_SP5 field. */
Kojto 90:cb3d968589d8 6053 #define BR_AIPS_PACRH_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP5))
Kojto 90:cb3d968589d8 6054
Kojto 90:cb3d968589d8 6055 /*! @brief Format value for bitfield AIPS_PACRH_SP5. */
Kojto 90:cb3d968589d8 6056 #define BF_AIPS_PACRH_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP5) & BM_AIPS_PACRH_SP5)
Kojto 90:cb3d968589d8 6057
Kojto 90:cb3d968589d8 6058 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 6059 #define BW_AIPS_PACRH_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP5) = (v))
Kojto 90:cb3d968589d8 6060 /*@}*/
Kojto 90:cb3d968589d8 6061
Kojto 90:cb3d968589d8 6062 /*!
Kojto 90:cb3d968589d8 6063 * @name Register AIPS_PACRH, field TP4[12] (RW)
Kojto 90:cb3d968589d8 6064 *
Kojto 90:cb3d968589d8 6065 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6066 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6067 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6068 *
Kojto 90:cb3d968589d8 6069 * Values:
Kojto 90:cb3d968589d8 6070 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6071 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6072 */
Kojto 90:cb3d968589d8 6073 /*@{*/
Kojto 90:cb3d968589d8 6074 #define BP_AIPS_PACRH_TP4 (12U) /*!< Bit position for AIPS_PACRH_TP4. */
Kojto 90:cb3d968589d8 6075 #define BM_AIPS_PACRH_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRH_TP4. */
Kojto 90:cb3d968589d8 6076 #define BS_AIPS_PACRH_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP4. */
Kojto 90:cb3d968589d8 6077
Kojto 90:cb3d968589d8 6078 /*! @brief Read current value of the AIPS_PACRH_TP4 field. */
Kojto 90:cb3d968589d8 6079 #define BR_AIPS_PACRH_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP4))
Kojto 90:cb3d968589d8 6080
Kojto 90:cb3d968589d8 6081 /*! @brief Format value for bitfield AIPS_PACRH_TP4. */
Kojto 90:cb3d968589d8 6082 #define BF_AIPS_PACRH_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP4) & BM_AIPS_PACRH_TP4)
Kojto 90:cb3d968589d8 6083
Kojto 90:cb3d968589d8 6084 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 6085 #define BW_AIPS_PACRH_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP4) = (v))
Kojto 90:cb3d968589d8 6086 /*@}*/
Kojto 90:cb3d968589d8 6087
Kojto 90:cb3d968589d8 6088 /*!
Kojto 90:cb3d968589d8 6089 * @name Register AIPS_PACRH, field WP4[13] (RW)
Kojto 90:cb3d968589d8 6090 *
Kojto 90:cb3d968589d8 6091 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 6092 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 6093 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 6094 *
Kojto 90:cb3d968589d8 6095 * Values:
Kojto 90:cb3d968589d8 6096 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6097 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6098 */
Kojto 90:cb3d968589d8 6099 /*@{*/
Kojto 90:cb3d968589d8 6100 #define BP_AIPS_PACRH_WP4 (13U) /*!< Bit position for AIPS_PACRH_WP4. */
Kojto 90:cb3d968589d8 6101 #define BM_AIPS_PACRH_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRH_WP4. */
Kojto 90:cb3d968589d8 6102 #define BS_AIPS_PACRH_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP4. */
Kojto 90:cb3d968589d8 6103
Kojto 90:cb3d968589d8 6104 /*! @brief Read current value of the AIPS_PACRH_WP4 field. */
Kojto 90:cb3d968589d8 6105 #define BR_AIPS_PACRH_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP4))
Kojto 90:cb3d968589d8 6106
Kojto 90:cb3d968589d8 6107 /*! @brief Format value for bitfield AIPS_PACRH_WP4. */
Kojto 90:cb3d968589d8 6108 #define BF_AIPS_PACRH_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP4) & BM_AIPS_PACRH_WP4)
Kojto 90:cb3d968589d8 6109
Kojto 90:cb3d968589d8 6110 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 6111 #define BW_AIPS_PACRH_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP4) = (v))
Kojto 90:cb3d968589d8 6112 /*@}*/
Kojto 90:cb3d968589d8 6113
Kojto 90:cb3d968589d8 6114 /*!
Kojto 90:cb3d968589d8 6115 * @name Register AIPS_PACRH, field SP4[14] (RW)
Kojto 90:cb3d968589d8 6116 *
Kojto 90:cb3d968589d8 6117 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6118 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6119 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 6120 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 6121 * initiates.
Kojto 90:cb3d968589d8 6122 *
Kojto 90:cb3d968589d8 6123 * Values:
Kojto 90:cb3d968589d8 6124 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6125 * accesses.
Kojto 90:cb3d968589d8 6126 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6127 */
Kojto 90:cb3d968589d8 6128 /*@{*/
Kojto 90:cb3d968589d8 6129 #define BP_AIPS_PACRH_SP4 (14U) /*!< Bit position for AIPS_PACRH_SP4. */
Kojto 90:cb3d968589d8 6130 #define BM_AIPS_PACRH_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRH_SP4. */
Kojto 90:cb3d968589d8 6131 #define BS_AIPS_PACRH_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP4. */
Kojto 90:cb3d968589d8 6132
Kojto 90:cb3d968589d8 6133 /*! @brief Read current value of the AIPS_PACRH_SP4 field. */
Kojto 90:cb3d968589d8 6134 #define BR_AIPS_PACRH_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP4))
Kojto 90:cb3d968589d8 6135
Kojto 90:cb3d968589d8 6136 /*! @brief Format value for bitfield AIPS_PACRH_SP4. */
Kojto 90:cb3d968589d8 6137 #define BF_AIPS_PACRH_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP4) & BM_AIPS_PACRH_SP4)
Kojto 90:cb3d968589d8 6138
Kojto 90:cb3d968589d8 6139 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 6140 #define BW_AIPS_PACRH_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP4) = (v))
Kojto 90:cb3d968589d8 6141 /*@}*/
Kojto 90:cb3d968589d8 6142
Kojto 90:cb3d968589d8 6143 /*!
Kojto 90:cb3d968589d8 6144 * @name Register AIPS_PACRH, field TP3[16] (RW)
Kojto 90:cb3d968589d8 6145 *
Kojto 90:cb3d968589d8 6146 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6147 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6148 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6149 *
Kojto 90:cb3d968589d8 6150 * Values:
Kojto 90:cb3d968589d8 6151 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6152 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6153 */
Kojto 90:cb3d968589d8 6154 /*@{*/
Kojto 90:cb3d968589d8 6155 #define BP_AIPS_PACRH_TP3 (16U) /*!< Bit position for AIPS_PACRH_TP3. */
Kojto 90:cb3d968589d8 6156 #define BM_AIPS_PACRH_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRH_TP3. */
Kojto 90:cb3d968589d8 6157 #define BS_AIPS_PACRH_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP3. */
Kojto 90:cb3d968589d8 6158
Kojto 90:cb3d968589d8 6159 /*! @brief Read current value of the AIPS_PACRH_TP3 field. */
Kojto 90:cb3d968589d8 6160 #define BR_AIPS_PACRH_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP3))
Kojto 90:cb3d968589d8 6161
Kojto 90:cb3d968589d8 6162 /*! @brief Format value for bitfield AIPS_PACRH_TP3. */
Kojto 90:cb3d968589d8 6163 #define BF_AIPS_PACRH_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP3) & BM_AIPS_PACRH_TP3)
Kojto 90:cb3d968589d8 6164
Kojto 90:cb3d968589d8 6165 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 6166 #define BW_AIPS_PACRH_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP3) = (v))
Kojto 90:cb3d968589d8 6167 /*@}*/
Kojto 90:cb3d968589d8 6168
Kojto 90:cb3d968589d8 6169 /*!
Kojto 90:cb3d968589d8 6170 * @name Register AIPS_PACRH, field WP3[17] (RW)
Kojto 90:cb3d968589d8 6171 *
Kojto 90:cb3d968589d8 6172 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 6173 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 6174 * no peripheral access initiates.
Kojto 90:cb3d968589d8 6175 *
Kojto 90:cb3d968589d8 6176 * Values:
Kojto 90:cb3d968589d8 6177 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6178 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6179 */
Kojto 90:cb3d968589d8 6180 /*@{*/
Kojto 90:cb3d968589d8 6181 #define BP_AIPS_PACRH_WP3 (17U) /*!< Bit position for AIPS_PACRH_WP3. */
Kojto 90:cb3d968589d8 6182 #define BM_AIPS_PACRH_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRH_WP3. */
Kojto 90:cb3d968589d8 6183 #define BS_AIPS_PACRH_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP3. */
Kojto 90:cb3d968589d8 6184
Kojto 90:cb3d968589d8 6185 /*! @brief Read current value of the AIPS_PACRH_WP3 field. */
Kojto 90:cb3d968589d8 6186 #define BR_AIPS_PACRH_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP3))
Kojto 90:cb3d968589d8 6187
Kojto 90:cb3d968589d8 6188 /*! @brief Format value for bitfield AIPS_PACRH_WP3. */
Kojto 90:cb3d968589d8 6189 #define BF_AIPS_PACRH_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP3) & BM_AIPS_PACRH_WP3)
Kojto 90:cb3d968589d8 6190
Kojto 90:cb3d968589d8 6191 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 6192 #define BW_AIPS_PACRH_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP3) = (v))
Kojto 90:cb3d968589d8 6193 /*@}*/
Kojto 90:cb3d968589d8 6194
Kojto 90:cb3d968589d8 6195 /*!
Kojto 90:cb3d968589d8 6196 * @name Register AIPS_PACRH, field SP3[18] (RW)
Kojto 90:cb3d968589d8 6197 *
Kojto 90:cb3d968589d8 6198 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6199 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6200 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 6201 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 6202 * access initiates.
Kojto 90:cb3d968589d8 6203 *
Kojto 90:cb3d968589d8 6204 * Values:
Kojto 90:cb3d968589d8 6205 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6206 * accesses.
Kojto 90:cb3d968589d8 6207 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6208 */
Kojto 90:cb3d968589d8 6209 /*@{*/
Kojto 90:cb3d968589d8 6210 #define BP_AIPS_PACRH_SP3 (18U) /*!< Bit position for AIPS_PACRH_SP3. */
Kojto 90:cb3d968589d8 6211 #define BM_AIPS_PACRH_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRH_SP3. */
Kojto 90:cb3d968589d8 6212 #define BS_AIPS_PACRH_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP3. */
Kojto 90:cb3d968589d8 6213
Kojto 90:cb3d968589d8 6214 /*! @brief Read current value of the AIPS_PACRH_SP3 field. */
Kojto 90:cb3d968589d8 6215 #define BR_AIPS_PACRH_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP3))
Kojto 90:cb3d968589d8 6216
Kojto 90:cb3d968589d8 6217 /*! @brief Format value for bitfield AIPS_PACRH_SP3. */
Kojto 90:cb3d968589d8 6218 #define BF_AIPS_PACRH_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP3) & BM_AIPS_PACRH_SP3)
Kojto 90:cb3d968589d8 6219
Kojto 90:cb3d968589d8 6220 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 6221 #define BW_AIPS_PACRH_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP3) = (v))
Kojto 90:cb3d968589d8 6222 /*@}*/
Kojto 90:cb3d968589d8 6223
Kojto 90:cb3d968589d8 6224 /*!
Kojto 90:cb3d968589d8 6225 * @name Register AIPS_PACRH, field TP2[20] (RW)
Kojto 90:cb3d968589d8 6226 *
Kojto 90:cb3d968589d8 6227 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6228 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6229 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6230 *
Kojto 90:cb3d968589d8 6231 * Values:
Kojto 90:cb3d968589d8 6232 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6233 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6234 */
Kojto 90:cb3d968589d8 6235 /*@{*/
Kojto 90:cb3d968589d8 6236 #define BP_AIPS_PACRH_TP2 (20U) /*!< Bit position for AIPS_PACRH_TP2. */
Kojto 90:cb3d968589d8 6237 #define BM_AIPS_PACRH_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRH_TP2. */
Kojto 90:cb3d968589d8 6238 #define BS_AIPS_PACRH_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP2. */
Kojto 90:cb3d968589d8 6239
Kojto 90:cb3d968589d8 6240 /*! @brief Read current value of the AIPS_PACRH_TP2 field. */
Kojto 90:cb3d968589d8 6241 #define BR_AIPS_PACRH_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP2))
Kojto 90:cb3d968589d8 6242
Kojto 90:cb3d968589d8 6243 /*! @brief Format value for bitfield AIPS_PACRH_TP2. */
Kojto 90:cb3d968589d8 6244 #define BF_AIPS_PACRH_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP2) & BM_AIPS_PACRH_TP2)
Kojto 90:cb3d968589d8 6245
Kojto 90:cb3d968589d8 6246 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 6247 #define BW_AIPS_PACRH_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP2) = (v))
Kojto 90:cb3d968589d8 6248 /*@}*/
Kojto 90:cb3d968589d8 6249
Kojto 90:cb3d968589d8 6250 /*!
Kojto 90:cb3d968589d8 6251 * @name Register AIPS_PACRH, field WP2[21] (RW)
Kojto 90:cb3d968589d8 6252 *
Kojto 90:cb3d968589d8 6253 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 6254 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 6255 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 6256 *
Kojto 90:cb3d968589d8 6257 * Values:
Kojto 90:cb3d968589d8 6258 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6259 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6260 */
Kojto 90:cb3d968589d8 6261 /*@{*/
Kojto 90:cb3d968589d8 6262 #define BP_AIPS_PACRH_WP2 (21U) /*!< Bit position for AIPS_PACRH_WP2. */
Kojto 90:cb3d968589d8 6263 #define BM_AIPS_PACRH_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRH_WP2. */
Kojto 90:cb3d968589d8 6264 #define BS_AIPS_PACRH_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP2. */
Kojto 90:cb3d968589d8 6265
Kojto 90:cb3d968589d8 6266 /*! @brief Read current value of the AIPS_PACRH_WP2 field. */
Kojto 90:cb3d968589d8 6267 #define BR_AIPS_PACRH_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP2))
Kojto 90:cb3d968589d8 6268
Kojto 90:cb3d968589d8 6269 /*! @brief Format value for bitfield AIPS_PACRH_WP2. */
Kojto 90:cb3d968589d8 6270 #define BF_AIPS_PACRH_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP2) & BM_AIPS_PACRH_WP2)
Kojto 90:cb3d968589d8 6271
Kojto 90:cb3d968589d8 6272 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 6273 #define BW_AIPS_PACRH_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP2) = (v))
Kojto 90:cb3d968589d8 6274 /*@}*/
Kojto 90:cb3d968589d8 6275
Kojto 90:cb3d968589d8 6276 /*!
Kojto 90:cb3d968589d8 6277 * @name Register AIPS_PACRH, field SP2[22] (RW)
Kojto 90:cb3d968589d8 6278 *
Kojto 90:cb3d968589d8 6279 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6280 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6281 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 6282 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 6283 * initiates.
Kojto 90:cb3d968589d8 6284 *
Kojto 90:cb3d968589d8 6285 * Values:
Kojto 90:cb3d968589d8 6286 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6287 * accesses.
Kojto 90:cb3d968589d8 6288 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6289 */
Kojto 90:cb3d968589d8 6290 /*@{*/
Kojto 90:cb3d968589d8 6291 #define BP_AIPS_PACRH_SP2 (22U) /*!< Bit position for AIPS_PACRH_SP2. */
Kojto 90:cb3d968589d8 6292 #define BM_AIPS_PACRH_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRH_SP2. */
Kojto 90:cb3d968589d8 6293 #define BS_AIPS_PACRH_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP2. */
Kojto 90:cb3d968589d8 6294
Kojto 90:cb3d968589d8 6295 /*! @brief Read current value of the AIPS_PACRH_SP2 field. */
Kojto 90:cb3d968589d8 6296 #define BR_AIPS_PACRH_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP2))
Kojto 90:cb3d968589d8 6297
Kojto 90:cb3d968589d8 6298 /*! @brief Format value for bitfield AIPS_PACRH_SP2. */
Kojto 90:cb3d968589d8 6299 #define BF_AIPS_PACRH_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP2) & BM_AIPS_PACRH_SP2)
Kojto 90:cb3d968589d8 6300
Kojto 90:cb3d968589d8 6301 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 6302 #define BW_AIPS_PACRH_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP2) = (v))
Kojto 90:cb3d968589d8 6303 /*@}*/
Kojto 90:cb3d968589d8 6304
Kojto 90:cb3d968589d8 6305 /*!
Kojto 90:cb3d968589d8 6306 * @name Register AIPS_PACRH, field TP1[24] (RW)
Kojto 90:cb3d968589d8 6307 *
Kojto 90:cb3d968589d8 6308 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6309 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6310 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6311 *
Kojto 90:cb3d968589d8 6312 * Values:
Kojto 90:cb3d968589d8 6313 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6314 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6315 */
Kojto 90:cb3d968589d8 6316 /*@{*/
Kojto 90:cb3d968589d8 6317 #define BP_AIPS_PACRH_TP1 (24U) /*!< Bit position for AIPS_PACRH_TP1. */
Kojto 90:cb3d968589d8 6318 #define BM_AIPS_PACRH_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRH_TP1. */
Kojto 90:cb3d968589d8 6319 #define BS_AIPS_PACRH_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP1. */
Kojto 90:cb3d968589d8 6320
Kojto 90:cb3d968589d8 6321 /*! @brief Read current value of the AIPS_PACRH_TP1 field. */
Kojto 90:cb3d968589d8 6322 #define BR_AIPS_PACRH_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP1))
Kojto 90:cb3d968589d8 6323
Kojto 90:cb3d968589d8 6324 /*! @brief Format value for bitfield AIPS_PACRH_TP1. */
Kojto 90:cb3d968589d8 6325 #define BF_AIPS_PACRH_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP1) & BM_AIPS_PACRH_TP1)
Kojto 90:cb3d968589d8 6326
Kojto 90:cb3d968589d8 6327 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 6328 #define BW_AIPS_PACRH_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP1) = (v))
Kojto 90:cb3d968589d8 6329 /*@}*/
Kojto 90:cb3d968589d8 6330
Kojto 90:cb3d968589d8 6331 /*!
Kojto 90:cb3d968589d8 6332 * @name Register AIPS_PACRH, field WP1[25] (RW)
Kojto 90:cb3d968589d8 6333 *
Kojto 90:cb3d968589d8 6334 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 6335 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 6336 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 6337 *
Kojto 90:cb3d968589d8 6338 * Values:
Kojto 90:cb3d968589d8 6339 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6340 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6341 */
Kojto 90:cb3d968589d8 6342 /*@{*/
Kojto 90:cb3d968589d8 6343 #define BP_AIPS_PACRH_WP1 (25U) /*!< Bit position for AIPS_PACRH_WP1. */
Kojto 90:cb3d968589d8 6344 #define BM_AIPS_PACRH_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRH_WP1. */
Kojto 90:cb3d968589d8 6345 #define BS_AIPS_PACRH_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP1. */
Kojto 90:cb3d968589d8 6346
Kojto 90:cb3d968589d8 6347 /*! @brief Read current value of the AIPS_PACRH_WP1 field. */
Kojto 90:cb3d968589d8 6348 #define BR_AIPS_PACRH_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP1))
Kojto 90:cb3d968589d8 6349
Kojto 90:cb3d968589d8 6350 /*! @brief Format value for bitfield AIPS_PACRH_WP1. */
Kojto 90:cb3d968589d8 6351 #define BF_AIPS_PACRH_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP1) & BM_AIPS_PACRH_WP1)
Kojto 90:cb3d968589d8 6352
Kojto 90:cb3d968589d8 6353 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 6354 #define BW_AIPS_PACRH_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP1) = (v))
Kojto 90:cb3d968589d8 6355 /*@}*/
Kojto 90:cb3d968589d8 6356
Kojto 90:cb3d968589d8 6357 /*!
Kojto 90:cb3d968589d8 6358 * @name Register AIPS_PACRH, field SP1[26] (RW)
Kojto 90:cb3d968589d8 6359 *
Kojto 90:cb3d968589d8 6360 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6361 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6362 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 6363 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 6364 * access initiates.
Kojto 90:cb3d968589d8 6365 *
Kojto 90:cb3d968589d8 6366 * Values:
Kojto 90:cb3d968589d8 6367 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6368 * accesses.
Kojto 90:cb3d968589d8 6369 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6370 */
Kojto 90:cb3d968589d8 6371 /*@{*/
Kojto 90:cb3d968589d8 6372 #define BP_AIPS_PACRH_SP1 (26U) /*!< Bit position for AIPS_PACRH_SP1. */
Kojto 90:cb3d968589d8 6373 #define BM_AIPS_PACRH_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRH_SP1. */
Kojto 90:cb3d968589d8 6374 #define BS_AIPS_PACRH_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP1. */
Kojto 90:cb3d968589d8 6375
Kojto 90:cb3d968589d8 6376 /*! @brief Read current value of the AIPS_PACRH_SP1 field. */
Kojto 90:cb3d968589d8 6377 #define BR_AIPS_PACRH_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP1))
Kojto 90:cb3d968589d8 6378
Kojto 90:cb3d968589d8 6379 /*! @brief Format value for bitfield AIPS_PACRH_SP1. */
Kojto 90:cb3d968589d8 6380 #define BF_AIPS_PACRH_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP1) & BM_AIPS_PACRH_SP1)
Kojto 90:cb3d968589d8 6381
Kojto 90:cb3d968589d8 6382 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 6383 #define BW_AIPS_PACRH_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP1) = (v))
Kojto 90:cb3d968589d8 6384 /*@}*/
Kojto 90:cb3d968589d8 6385
Kojto 90:cb3d968589d8 6386 /*!
Kojto 90:cb3d968589d8 6387 * @name Register AIPS_PACRH, field TP0[28] (RW)
Kojto 90:cb3d968589d8 6388 *
Kojto 90:cb3d968589d8 6389 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6390 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6391 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6392 *
Kojto 90:cb3d968589d8 6393 * Values:
Kojto 90:cb3d968589d8 6394 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6395 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6396 */
Kojto 90:cb3d968589d8 6397 /*@{*/
Kojto 90:cb3d968589d8 6398 #define BP_AIPS_PACRH_TP0 (28U) /*!< Bit position for AIPS_PACRH_TP0. */
Kojto 90:cb3d968589d8 6399 #define BM_AIPS_PACRH_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRH_TP0. */
Kojto 90:cb3d968589d8 6400 #define BS_AIPS_PACRH_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRH_TP0. */
Kojto 90:cb3d968589d8 6401
Kojto 90:cb3d968589d8 6402 /*! @brief Read current value of the AIPS_PACRH_TP0 field. */
Kojto 90:cb3d968589d8 6403 #define BR_AIPS_PACRH_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP0))
Kojto 90:cb3d968589d8 6404
Kojto 90:cb3d968589d8 6405 /*! @brief Format value for bitfield AIPS_PACRH_TP0. */
Kojto 90:cb3d968589d8 6406 #define BF_AIPS_PACRH_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_TP0) & BM_AIPS_PACRH_TP0)
Kojto 90:cb3d968589d8 6407
Kojto 90:cb3d968589d8 6408 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 6409 #define BW_AIPS_PACRH_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP0) = (v))
Kojto 90:cb3d968589d8 6410 /*@}*/
Kojto 90:cb3d968589d8 6411
Kojto 90:cb3d968589d8 6412 /*!
Kojto 90:cb3d968589d8 6413 * @name Register AIPS_PACRH, field WP0[29] (RW)
Kojto 90:cb3d968589d8 6414 *
Kojto 90:cb3d968589d8 6415 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 6416 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 6417 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 6418 *
Kojto 90:cb3d968589d8 6419 * Values:
Kojto 90:cb3d968589d8 6420 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6421 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6422 */
Kojto 90:cb3d968589d8 6423 /*@{*/
Kojto 90:cb3d968589d8 6424 #define BP_AIPS_PACRH_WP0 (29U) /*!< Bit position for AIPS_PACRH_WP0. */
Kojto 90:cb3d968589d8 6425 #define BM_AIPS_PACRH_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRH_WP0. */
Kojto 90:cb3d968589d8 6426 #define BS_AIPS_PACRH_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRH_WP0. */
Kojto 90:cb3d968589d8 6427
Kojto 90:cb3d968589d8 6428 /*! @brief Read current value of the AIPS_PACRH_WP0 field. */
Kojto 90:cb3d968589d8 6429 #define BR_AIPS_PACRH_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP0))
Kojto 90:cb3d968589d8 6430
Kojto 90:cb3d968589d8 6431 /*! @brief Format value for bitfield AIPS_PACRH_WP0. */
Kojto 90:cb3d968589d8 6432 #define BF_AIPS_PACRH_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_WP0) & BM_AIPS_PACRH_WP0)
Kojto 90:cb3d968589d8 6433
Kojto 90:cb3d968589d8 6434 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 6435 #define BW_AIPS_PACRH_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP0) = (v))
Kojto 90:cb3d968589d8 6436 /*@}*/
Kojto 90:cb3d968589d8 6437
Kojto 90:cb3d968589d8 6438 /*!
Kojto 90:cb3d968589d8 6439 * @name Register AIPS_PACRH, field SP0[30] (RW)
Kojto 90:cb3d968589d8 6440 *
Kojto 90:cb3d968589d8 6441 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6442 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6443 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 6444 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 6445 * access initiates.
Kojto 90:cb3d968589d8 6446 *
Kojto 90:cb3d968589d8 6447 * Values:
Kojto 90:cb3d968589d8 6448 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6449 * accesses.
Kojto 90:cb3d968589d8 6450 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6451 */
Kojto 90:cb3d968589d8 6452 /*@{*/
Kojto 90:cb3d968589d8 6453 #define BP_AIPS_PACRH_SP0 (30U) /*!< Bit position for AIPS_PACRH_SP0. */
Kojto 90:cb3d968589d8 6454 #define BM_AIPS_PACRH_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRH_SP0. */
Kojto 90:cb3d968589d8 6455 #define BS_AIPS_PACRH_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRH_SP0. */
Kojto 90:cb3d968589d8 6456
Kojto 90:cb3d968589d8 6457 /*! @brief Read current value of the AIPS_PACRH_SP0 field. */
Kojto 90:cb3d968589d8 6458 #define BR_AIPS_PACRH_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP0))
Kojto 90:cb3d968589d8 6459
Kojto 90:cb3d968589d8 6460 /*! @brief Format value for bitfield AIPS_PACRH_SP0. */
Kojto 90:cb3d968589d8 6461 #define BF_AIPS_PACRH_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRH_SP0) & BM_AIPS_PACRH_SP0)
Kojto 90:cb3d968589d8 6462
Kojto 90:cb3d968589d8 6463 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 6464 #define BW_AIPS_PACRH_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP0) = (v))
Kojto 90:cb3d968589d8 6465 /*@}*/
Kojto 90:cb3d968589d8 6466
Kojto 90:cb3d968589d8 6467 /*******************************************************************************
Kojto 90:cb3d968589d8 6468 * HW_AIPS_PACRI - Peripheral Access Control Register
Kojto 90:cb3d968589d8 6469 ******************************************************************************/
Kojto 90:cb3d968589d8 6470
Kojto 90:cb3d968589d8 6471 /*!
Kojto 90:cb3d968589d8 6472 * @brief HW_AIPS_PACRI - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 6473 *
Kojto 90:cb3d968589d8 6474 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 6475 *
Kojto 90:cb3d968589d8 6476 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 6477 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 6478 * registers.
Kojto 90:cb3d968589d8 6479 */
Kojto 90:cb3d968589d8 6480 typedef union _hw_aips_pacri
Kojto 90:cb3d968589d8 6481 {
Kojto 90:cb3d968589d8 6482 uint32_t U;
Kojto 90:cb3d968589d8 6483 struct _hw_aips_pacri_bitfields
Kojto 90:cb3d968589d8 6484 {
Kojto 90:cb3d968589d8 6485 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 6486 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 6487 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 6488 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 6489 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 6490 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 6491 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 6492 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 6493 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 6494 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 6495 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 6496 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 6497 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 6498 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 6499 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 6500 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 6501 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 6502 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 6503 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 6504 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 6505 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 6506 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 6507 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 6508 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 6509 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 6510 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 6511 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 6512 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 6513 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 6514 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 6515 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 6516 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 6517 } B;
Kojto 90:cb3d968589d8 6518 } hw_aips_pacri_t;
Kojto 90:cb3d968589d8 6519
Kojto 90:cb3d968589d8 6520 /*!
Kojto 90:cb3d968589d8 6521 * @name Constants and macros for entire AIPS_PACRI register
Kojto 90:cb3d968589d8 6522 */
Kojto 90:cb3d968589d8 6523 /*@{*/
Kojto 90:cb3d968589d8 6524 #define HW_AIPS_PACRI_ADDR(x) ((x) + 0x50U)
Kojto 90:cb3d968589d8 6525
Kojto 90:cb3d968589d8 6526 #define HW_AIPS_PACRI(x) (*(__IO hw_aips_pacri_t *) HW_AIPS_PACRI_ADDR(x))
Kojto 90:cb3d968589d8 6527 #define HW_AIPS_PACRI_RD(x) (HW_AIPS_PACRI(x).U)
Kojto 90:cb3d968589d8 6528 #define HW_AIPS_PACRI_WR(x, v) (HW_AIPS_PACRI(x).U = (v))
Kojto 90:cb3d968589d8 6529 #define HW_AIPS_PACRI_SET(x, v) (HW_AIPS_PACRI_WR(x, HW_AIPS_PACRI_RD(x) | (v)))
Kojto 90:cb3d968589d8 6530 #define HW_AIPS_PACRI_CLR(x, v) (HW_AIPS_PACRI_WR(x, HW_AIPS_PACRI_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 6531 #define HW_AIPS_PACRI_TOG(x, v) (HW_AIPS_PACRI_WR(x, HW_AIPS_PACRI_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 6532 /*@}*/
Kojto 90:cb3d968589d8 6533
Kojto 90:cb3d968589d8 6534 /*
Kojto 90:cb3d968589d8 6535 * Constants & macros for individual AIPS_PACRI bitfields
Kojto 90:cb3d968589d8 6536 */
Kojto 90:cb3d968589d8 6537
Kojto 90:cb3d968589d8 6538 /*!
Kojto 90:cb3d968589d8 6539 * @name Register AIPS_PACRI, field TP7[0] (RW)
Kojto 90:cb3d968589d8 6540 *
Kojto 90:cb3d968589d8 6541 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6542 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6543 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6544 *
Kojto 90:cb3d968589d8 6545 * Values:
Kojto 90:cb3d968589d8 6546 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6547 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6548 */
Kojto 90:cb3d968589d8 6549 /*@{*/
Kojto 90:cb3d968589d8 6550 #define BP_AIPS_PACRI_TP7 (0U) /*!< Bit position for AIPS_PACRI_TP7. */
Kojto 90:cb3d968589d8 6551 #define BM_AIPS_PACRI_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRI_TP7. */
Kojto 90:cb3d968589d8 6552 #define BS_AIPS_PACRI_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP7. */
Kojto 90:cb3d968589d8 6553
Kojto 90:cb3d968589d8 6554 /*! @brief Read current value of the AIPS_PACRI_TP7 field. */
Kojto 90:cb3d968589d8 6555 #define BR_AIPS_PACRI_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP7))
Kojto 90:cb3d968589d8 6556
Kojto 90:cb3d968589d8 6557 /*! @brief Format value for bitfield AIPS_PACRI_TP7. */
Kojto 90:cb3d968589d8 6558 #define BF_AIPS_PACRI_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP7) & BM_AIPS_PACRI_TP7)
Kojto 90:cb3d968589d8 6559
Kojto 90:cb3d968589d8 6560 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 6561 #define BW_AIPS_PACRI_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP7) = (v))
Kojto 90:cb3d968589d8 6562 /*@}*/
Kojto 90:cb3d968589d8 6563
Kojto 90:cb3d968589d8 6564 /*!
Kojto 90:cb3d968589d8 6565 * @name Register AIPS_PACRI, field WP7[1] (RW)
Kojto 90:cb3d968589d8 6566 *
Kojto 90:cb3d968589d8 6567 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 6568 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 6569 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 6570 *
Kojto 90:cb3d968589d8 6571 * Values:
Kojto 90:cb3d968589d8 6572 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6573 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6574 */
Kojto 90:cb3d968589d8 6575 /*@{*/
Kojto 90:cb3d968589d8 6576 #define BP_AIPS_PACRI_WP7 (1U) /*!< Bit position for AIPS_PACRI_WP7. */
Kojto 90:cb3d968589d8 6577 #define BM_AIPS_PACRI_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRI_WP7. */
Kojto 90:cb3d968589d8 6578 #define BS_AIPS_PACRI_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP7. */
Kojto 90:cb3d968589d8 6579
Kojto 90:cb3d968589d8 6580 /*! @brief Read current value of the AIPS_PACRI_WP7 field. */
Kojto 90:cb3d968589d8 6581 #define BR_AIPS_PACRI_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP7))
Kojto 90:cb3d968589d8 6582
Kojto 90:cb3d968589d8 6583 /*! @brief Format value for bitfield AIPS_PACRI_WP7. */
Kojto 90:cb3d968589d8 6584 #define BF_AIPS_PACRI_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP7) & BM_AIPS_PACRI_WP7)
Kojto 90:cb3d968589d8 6585
Kojto 90:cb3d968589d8 6586 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 6587 #define BW_AIPS_PACRI_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP7) = (v))
Kojto 90:cb3d968589d8 6588 /*@}*/
Kojto 90:cb3d968589d8 6589
Kojto 90:cb3d968589d8 6590 /*!
Kojto 90:cb3d968589d8 6591 * @name Register AIPS_PACRI, field SP7[2] (RW)
Kojto 90:cb3d968589d8 6592 *
Kojto 90:cb3d968589d8 6593 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6594 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6595 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 6596 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 6597 * access initiates.
Kojto 90:cb3d968589d8 6598 *
Kojto 90:cb3d968589d8 6599 * Values:
Kojto 90:cb3d968589d8 6600 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6601 * accesses.
Kojto 90:cb3d968589d8 6602 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6603 */
Kojto 90:cb3d968589d8 6604 /*@{*/
Kojto 90:cb3d968589d8 6605 #define BP_AIPS_PACRI_SP7 (2U) /*!< Bit position for AIPS_PACRI_SP7. */
Kojto 90:cb3d968589d8 6606 #define BM_AIPS_PACRI_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRI_SP7. */
Kojto 90:cb3d968589d8 6607 #define BS_AIPS_PACRI_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP7. */
Kojto 90:cb3d968589d8 6608
Kojto 90:cb3d968589d8 6609 /*! @brief Read current value of the AIPS_PACRI_SP7 field. */
Kojto 90:cb3d968589d8 6610 #define BR_AIPS_PACRI_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP7))
Kojto 90:cb3d968589d8 6611
Kojto 90:cb3d968589d8 6612 /*! @brief Format value for bitfield AIPS_PACRI_SP7. */
Kojto 90:cb3d968589d8 6613 #define BF_AIPS_PACRI_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP7) & BM_AIPS_PACRI_SP7)
Kojto 90:cb3d968589d8 6614
Kojto 90:cb3d968589d8 6615 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 6616 #define BW_AIPS_PACRI_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP7) = (v))
Kojto 90:cb3d968589d8 6617 /*@}*/
Kojto 90:cb3d968589d8 6618
Kojto 90:cb3d968589d8 6619 /*!
Kojto 90:cb3d968589d8 6620 * @name Register AIPS_PACRI, field TP6[4] (RW)
Kojto 90:cb3d968589d8 6621 *
Kojto 90:cb3d968589d8 6622 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6623 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6624 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6625 *
Kojto 90:cb3d968589d8 6626 * Values:
Kojto 90:cb3d968589d8 6627 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6628 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6629 */
Kojto 90:cb3d968589d8 6630 /*@{*/
Kojto 90:cb3d968589d8 6631 #define BP_AIPS_PACRI_TP6 (4U) /*!< Bit position for AIPS_PACRI_TP6. */
Kojto 90:cb3d968589d8 6632 #define BM_AIPS_PACRI_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRI_TP6. */
Kojto 90:cb3d968589d8 6633 #define BS_AIPS_PACRI_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP6. */
Kojto 90:cb3d968589d8 6634
Kojto 90:cb3d968589d8 6635 /*! @brief Read current value of the AIPS_PACRI_TP6 field. */
Kojto 90:cb3d968589d8 6636 #define BR_AIPS_PACRI_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP6))
Kojto 90:cb3d968589d8 6637
Kojto 90:cb3d968589d8 6638 /*! @brief Format value for bitfield AIPS_PACRI_TP6. */
Kojto 90:cb3d968589d8 6639 #define BF_AIPS_PACRI_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP6) & BM_AIPS_PACRI_TP6)
Kojto 90:cb3d968589d8 6640
Kojto 90:cb3d968589d8 6641 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 6642 #define BW_AIPS_PACRI_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP6) = (v))
Kojto 90:cb3d968589d8 6643 /*@}*/
Kojto 90:cb3d968589d8 6644
Kojto 90:cb3d968589d8 6645 /*!
Kojto 90:cb3d968589d8 6646 * @name Register AIPS_PACRI, field WP6[5] (RW)
Kojto 90:cb3d968589d8 6647 *
Kojto 90:cb3d968589d8 6648 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 6649 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 6650 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 6651 *
Kojto 90:cb3d968589d8 6652 * Values:
Kojto 90:cb3d968589d8 6653 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6654 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6655 */
Kojto 90:cb3d968589d8 6656 /*@{*/
Kojto 90:cb3d968589d8 6657 #define BP_AIPS_PACRI_WP6 (5U) /*!< Bit position for AIPS_PACRI_WP6. */
Kojto 90:cb3d968589d8 6658 #define BM_AIPS_PACRI_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRI_WP6. */
Kojto 90:cb3d968589d8 6659 #define BS_AIPS_PACRI_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP6. */
Kojto 90:cb3d968589d8 6660
Kojto 90:cb3d968589d8 6661 /*! @brief Read current value of the AIPS_PACRI_WP6 field. */
Kojto 90:cb3d968589d8 6662 #define BR_AIPS_PACRI_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP6))
Kojto 90:cb3d968589d8 6663
Kojto 90:cb3d968589d8 6664 /*! @brief Format value for bitfield AIPS_PACRI_WP6. */
Kojto 90:cb3d968589d8 6665 #define BF_AIPS_PACRI_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP6) & BM_AIPS_PACRI_WP6)
Kojto 90:cb3d968589d8 6666
Kojto 90:cb3d968589d8 6667 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 6668 #define BW_AIPS_PACRI_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP6) = (v))
Kojto 90:cb3d968589d8 6669 /*@}*/
Kojto 90:cb3d968589d8 6670
Kojto 90:cb3d968589d8 6671 /*!
Kojto 90:cb3d968589d8 6672 * @name Register AIPS_PACRI, field SP6[6] (RW)
Kojto 90:cb3d968589d8 6673 *
Kojto 90:cb3d968589d8 6674 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6675 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6676 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 6677 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 6678 * access initiates.
Kojto 90:cb3d968589d8 6679 *
Kojto 90:cb3d968589d8 6680 * Values:
Kojto 90:cb3d968589d8 6681 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6682 * accesses.
Kojto 90:cb3d968589d8 6683 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6684 */
Kojto 90:cb3d968589d8 6685 /*@{*/
Kojto 90:cb3d968589d8 6686 #define BP_AIPS_PACRI_SP6 (6U) /*!< Bit position for AIPS_PACRI_SP6. */
Kojto 90:cb3d968589d8 6687 #define BM_AIPS_PACRI_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRI_SP6. */
Kojto 90:cb3d968589d8 6688 #define BS_AIPS_PACRI_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP6. */
Kojto 90:cb3d968589d8 6689
Kojto 90:cb3d968589d8 6690 /*! @brief Read current value of the AIPS_PACRI_SP6 field. */
Kojto 90:cb3d968589d8 6691 #define BR_AIPS_PACRI_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP6))
Kojto 90:cb3d968589d8 6692
Kojto 90:cb3d968589d8 6693 /*! @brief Format value for bitfield AIPS_PACRI_SP6. */
Kojto 90:cb3d968589d8 6694 #define BF_AIPS_PACRI_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP6) & BM_AIPS_PACRI_SP6)
Kojto 90:cb3d968589d8 6695
Kojto 90:cb3d968589d8 6696 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 6697 #define BW_AIPS_PACRI_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP6) = (v))
Kojto 90:cb3d968589d8 6698 /*@}*/
Kojto 90:cb3d968589d8 6699
Kojto 90:cb3d968589d8 6700 /*!
Kojto 90:cb3d968589d8 6701 * @name Register AIPS_PACRI, field TP5[8] (RW)
Kojto 90:cb3d968589d8 6702 *
Kojto 90:cb3d968589d8 6703 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6704 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6705 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6706 *
Kojto 90:cb3d968589d8 6707 * Values:
Kojto 90:cb3d968589d8 6708 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6709 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6710 */
Kojto 90:cb3d968589d8 6711 /*@{*/
Kojto 90:cb3d968589d8 6712 #define BP_AIPS_PACRI_TP5 (8U) /*!< Bit position for AIPS_PACRI_TP5. */
Kojto 90:cb3d968589d8 6713 #define BM_AIPS_PACRI_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRI_TP5. */
Kojto 90:cb3d968589d8 6714 #define BS_AIPS_PACRI_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP5. */
Kojto 90:cb3d968589d8 6715
Kojto 90:cb3d968589d8 6716 /*! @brief Read current value of the AIPS_PACRI_TP5 field. */
Kojto 90:cb3d968589d8 6717 #define BR_AIPS_PACRI_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP5))
Kojto 90:cb3d968589d8 6718
Kojto 90:cb3d968589d8 6719 /*! @brief Format value for bitfield AIPS_PACRI_TP5. */
Kojto 90:cb3d968589d8 6720 #define BF_AIPS_PACRI_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP5) & BM_AIPS_PACRI_TP5)
Kojto 90:cb3d968589d8 6721
Kojto 90:cb3d968589d8 6722 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 6723 #define BW_AIPS_PACRI_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP5) = (v))
Kojto 90:cb3d968589d8 6724 /*@}*/
Kojto 90:cb3d968589d8 6725
Kojto 90:cb3d968589d8 6726 /*!
Kojto 90:cb3d968589d8 6727 * @name Register AIPS_PACRI, field WP5[9] (RW)
Kojto 90:cb3d968589d8 6728 *
Kojto 90:cb3d968589d8 6729 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 6730 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 6731 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 6732 *
Kojto 90:cb3d968589d8 6733 * Values:
Kojto 90:cb3d968589d8 6734 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6735 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6736 */
Kojto 90:cb3d968589d8 6737 /*@{*/
Kojto 90:cb3d968589d8 6738 #define BP_AIPS_PACRI_WP5 (9U) /*!< Bit position for AIPS_PACRI_WP5. */
Kojto 90:cb3d968589d8 6739 #define BM_AIPS_PACRI_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRI_WP5. */
Kojto 90:cb3d968589d8 6740 #define BS_AIPS_PACRI_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP5. */
Kojto 90:cb3d968589d8 6741
Kojto 90:cb3d968589d8 6742 /*! @brief Read current value of the AIPS_PACRI_WP5 field. */
Kojto 90:cb3d968589d8 6743 #define BR_AIPS_PACRI_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP5))
Kojto 90:cb3d968589d8 6744
Kojto 90:cb3d968589d8 6745 /*! @brief Format value for bitfield AIPS_PACRI_WP5. */
Kojto 90:cb3d968589d8 6746 #define BF_AIPS_PACRI_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP5) & BM_AIPS_PACRI_WP5)
Kojto 90:cb3d968589d8 6747
Kojto 90:cb3d968589d8 6748 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 6749 #define BW_AIPS_PACRI_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP5) = (v))
Kojto 90:cb3d968589d8 6750 /*@}*/
Kojto 90:cb3d968589d8 6751
Kojto 90:cb3d968589d8 6752 /*!
Kojto 90:cb3d968589d8 6753 * @name Register AIPS_PACRI, field SP5[10] (RW)
Kojto 90:cb3d968589d8 6754 *
Kojto 90:cb3d968589d8 6755 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6756 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6757 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 6758 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 6759 * access initiates.
Kojto 90:cb3d968589d8 6760 *
Kojto 90:cb3d968589d8 6761 * Values:
Kojto 90:cb3d968589d8 6762 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6763 * accesses.
Kojto 90:cb3d968589d8 6764 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6765 */
Kojto 90:cb3d968589d8 6766 /*@{*/
Kojto 90:cb3d968589d8 6767 #define BP_AIPS_PACRI_SP5 (10U) /*!< Bit position for AIPS_PACRI_SP5. */
Kojto 90:cb3d968589d8 6768 #define BM_AIPS_PACRI_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRI_SP5. */
Kojto 90:cb3d968589d8 6769 #define BS_AIPS_PACRI_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP5. */
Kojto 90:cb3d968589d8 6770
Kojto 90:cb3d968589d8 6771 /*! @brief Read current value of the AIPS_PACRI_SP5 field. */
Kojto 90:cb3d968589d8 6772 #define BR_AIPS_PACRI_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP5))
Kojto 90:cb3d968589d8 6773
Kojto 90:cb3d968589d8 6774 /*! @brief Format value for bitfield AIPS_PACRI_SP5. */
Kojto 90:cb3d968589d8 6775 #define BF_AIPS_PACRI_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP5) & BM_AIPS_PACRI_SP5)
Kojto 90:cb3d968589d8 6776
Kojto 90:cb3d968589d8 6777 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 6778 #define BW_AIPS_PACRI_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP5) = (v))
Kojto 90:cb3d968589d8 6779 /*@}*/
Kojto 90:cb3d968589d8 6780
Kojto 90:cb3d968589d8 6781 /*!
Kojto 90:cb3d968589d8 6782 * @name Register AIPS_PACRI, field TP4[12] (RW)
Kojto 90:cb3d968589d8 6783 *
Kojto 90:cb3d968589d8 6784 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6785 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6786 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6787 *
Kojto 90:cb3d968589d8 6788 * Values:
Kojto 90:cb3d968589d8 6789 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6790 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6791 */
Kojto 90:cb3d968589d8 6792 /*@{*/
Kojto 90:cb3d968589d8 6793 #define BP_AIPS_PACRI_TP4 (12U) /*!< Bit position for AIPS_PACRI_TP4. */
Kojto 90:cb3d968589d8 6794 #define BM_AIPS_PACRI_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRI_TP4. */
Kojto 90:cb3d968589d8 6795 #define BS_AIPS_PACRI_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP4. */
Kojto 90:cb3d968589d8 6796
Kojto 90:cb3d968589d8 6797 /*! @brief Read current value of the AIPS_PACRI_TP4 field. */
Kojto 90:cb3d968589d8 6798 #define BR_AIPS_PACRI_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP4))
Kojto 90:cb3d968589d8 6799
Kojto 90:cb3d968589d8 6800 /*! @brief Format value for bitfield AIPS_PACRI_TP4. */
Kojto 90:cb3d968589d8 6801 #define BF_AIPS_PACRI_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP4) & BM_AIPS_PACRI_TP4)
Kojto 90:cb3d968589d8 6802
Kojto 90:cb3d968589d8 6803 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 6804 #define BW_AIPS_PACRI_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP4) = (v))
Kojto 90:cb3d968589d8 6805 /*@}*/
Kojto 90:cb3d968589d8 6806
Kojto 90:cb3d968589d8 6807 /*!
Kojto 90:cb3d968589d8 6808 * @name Register AIPS_PACRI, field WP4[13] (RW)
Kojto 90:cb3d968589d8 6809 *
Kojto 90:cb3d968589d8 6810 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 6811 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 6812 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 6813 *
Kojto 90:cb3d968589d8 6814 * Values:
Kojto 90:cb3d968589d8 6815 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6816 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6817 */
Kojto 90:cb3d968589d8 6818 /*@{*/
Kojto 90:cb3d968589d8 6819 #define BP_AIPS_PACRI_WP4 (13U) /*!< Bit position for AIPS_PACRI_WP4. */
Kojto 90:cb3d968589d8 6820 #define BM_AIPS_PACRI_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRI_WP4. */
Kojto 90:cb3d968589d8 6821 #define BS_AIPS_PACRI_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP4. */
Kojto 90:cb3d968589d8 6822
Kojto 90:cb3d968589d8 6823 /*! @brief Read current value of the AIPS_PACRI_WP4 field. */
Kojto 90:cb3d968589d8 6824 #define BR_AIPS_PACRI_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP4))
Kojto 90:cb3d968589d8 6825
Kojto 90:cb3d968589d8 6826 /*! @brief Format value for bitfield AIPS_PACRI_WP4. */
Kojto 90:cb3d968589d8 6827 #define BF_AIPS_PACRI_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP4) & BM_AIPS_PACRI_WP4)
Kojto 90:cb3d968589d8 6828
Kojto 90:cb3d968589d8 6829 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 6830 #define BW_AIPS_PACRI_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP4) = (v))
Kojto 90:cb3d968589d8 6831 /*@}*/
Kojto 90:cb3d968589d8 6832
Kojto 90:cb3d968589d8 6833 /*!
Kojto 90:cb3d968589d8 6834 * @name Register AIPS_PACRI, field SP4[14] (RW)
Kojto 90:cb3d968589d8 6835 *
Kojto 90:cb3d968589d8 6836 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6837 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6838 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 6839 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 6840 * initiates.
Kojto 90:cb3d968589d8 6841 *
Kojto 90:cb3d968589d8 6842 * Values:
Kojto 90:cb3d968589d8 6843 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6844 * accesses.
Kojto 90:cb3d968589d8 6845 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6846 */
Kojto 90:cb3d968589d8 6847 /*@{*/
Kojto 90:cb3d968589d8 6848 #define BP_AIPS_PACRI_SP4 (14U) /*!< Bit position for AIPS_PACRI_SP4. */
Kojto 90:cb3d968589d8 6849 #define BM_AIPS_PACRI_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRI_SP4. */
Kojto 90:cb3d968589d8 6850 #define BS_AIPS_PACRI_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP4. */
Kojto 90:cb3d968589d8 6851
Kojto 90:cb3d968589d8 6852 /*! @brief Read current value of the AIPS_PACRI_SP4 field. */
Kojto 90:cb3d968589d8 6853 #define BR_AIPS_PACRI_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP4))
Kojto 90:cb3d968589d8 6854
Kojto 90:cb3d968589d8 6855 /*! @brief Format value for bitfield AIPS_PACRI_SP4. */
Kojto 90:cb3d968589d8 6856 #define BF_AIPS_PACRI_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP4) & BM_AIPS_PACRI_SP4)
Kojto 90:cb3d968589d8 6857
Kojto 90:cb3d968589d8 6858 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 6859 #define BW_AIPS_PACRI_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP4) = (v))
Kojto 90:cb3d968589d8 6860 /*@}*/
Kojto 90:cb3d968589d8 6861
Kojto 90:cb3d968589d8 6862 /*!
Kojto 90:cb3d968589d8 6863 * @name Register AIPS_PACRI, field TP3[16] (RW)
Kojto 90:cb3d968589d8 6864 *
Kojto 90:cb3d968589d8 6865 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6866 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6867 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6868 *
Kojto 90:cb3d968589d8 6869 * Values:
Kojto 90:cb3d968589d8 6870 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6871 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6872 */
Kojto 90:cb3d968589d8 6873 /*@{*/
Kojto 90:cb3d968589d8 6874 #define BP_AIPS_PACRI_TP3 (16U) /*!< Bit position for AIPS_PACRI_TP3. */
Kojto 90:cb3d968589d8 6875 #define BM_AIPS_PACRI_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRI_TP3. */
Kojto 90:cb3d968589d8 6876 #define BS_AIPS_PACRI_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP3. */
Kojto 90:cb3d968589d8 6877
Kojto 90:cb3d968589d8 6878 /*! @brief Read current value of the AIPS_PACRI_TP3 field. */
Kojto 90:cb3d968589d8 6879 #define BR_AIPS_PACRI_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP3))
Kojto 90:cb3d968589d8 6880
Kojto 90:cb3d968589d8 6881 /*! @brief Format value for bitfield AIPS_PACRI_TP3. */
Kojto 90:cb3d968589d8 6882 #define BF_AIPS_PACRI_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP3) & BM_AIPS_PACRI_TP3)
Kojto 90:cb3d968589d8 6883
Kojto 90:cb3d968589d8 6884 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 6885 #define BW_AIPS_PACRI_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP3) = (v))
Kojto 90:cb3d968589d8 6886 /*@}*/
Kojto 90:cb3d968589d8 6887
Kojto 90:cb3d968589d8 6888 /*!
Kojto 90:cb3d968589d8 6889 * @name Register AIPS_PACRI, field WP3[17] (RW)
Kojto 90:cb3d968589d8 6890 *
Kojto 90:cb3d968589d8 6891 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 6892 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 6893 * no peripheral access initiates.
Kojto 90:cb3d968589d8 6894 *
Kojto 90:cb3d968589d8 6895 * Values:
Kojto 90:cb3d968589d8 6896 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6897 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6898 */
Kojto 90:cb3d968589d8 6899 /*@{*/
Kojto 90:cb3d968589d8 6900 #define BP_AIPS_PACRI_WP3 (17U) /*!< Bit position for AIPS_PACRI_WP3. */
Kojto 90:cb3d968589d8 6901 #define BM_AIPS_PACRI_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRI_WP3. */
Kojto 90:cb3d968589d8 6902 #define BS_AIPS_PACRI_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP3. */
Kojto 90:cb3d968589d8 6903
Kojto 90:cb3d968589d8 6904 /*! @brief Read current value of the AIPS_PACRI_WP3 field. */
Kojto 90:cb3d968589d8 6905 #define BR_AIPS_PACRI_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP3))
Kojto 90:cb3d968589d8 6906
Kojto 90:cb3d968589d8 6907 /*! @brief Format value for bitfield AIPS_PACRI_WP3. */
Kojto 90:cb3d968589d8 6908 #define BF_AIPS_PACRI_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP3) & BM_AIPS_PACRI_WP3)
Kojto 90:cb3d968589d8 6909
Kojto 90:cb3d968589d8 6910 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 6911 #define BW_AIPS_PACRI_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP3) = (v))
Kojto 90:cb3d968589d8 6912 /*@}*/
Kojto 90:cb3d968589d8 6913
Kojto 90:cb3d968589d8 6914 /*!
Kojto 90:cb3d968589d8 6915 * @name Register AIPS_PACRI, field SP3[18] (RW)
Kojto 90:cb3d968589d8 6916 *
Kojto 90:cb3d968589d8 6917 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6918 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 6919 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 6920 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 6921 * access initiates.
Kojto 90:cb3d968589d8 6922 *
Kojto 90:cb3d968589d8 6923 * Values:
Kojto 90:cb3d968589d8 6924 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 6925 * accesses.
Kojto 90:cb3d968589d8 6926 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 6927 */
Kojto 90:cb3d968589d8 6928 /*@{*/
Kojto 90:cb3d968589d8 6929 #define BP_AIPS_PACRI_SP3 (18U) /*!< Bit position for AIPS_PACRI_SP3. */
Kojto 90:cb3d968589d8 6930 #define BM_AIPS_PACRI_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRI_SP3. */
Kojto 90:cb3d968589d8 6931 #define BS_AIPS_PACRI_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP3. */
Kojto 90:cb3d968589d8 6932
Kojto 90:cb3d968589d8 6933 /*! @brief Read current value of the AIPS_PACRI_SP3 field. */
Kojto 90:cb3d968589d8 6934 #define BR_AIPS_PACRI_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP3))
Kojto 90:cb3d968589d8 6935
Kojto 90:cb3d968589d8 6936 /*! @brief Format value for bitfield AIPS_PACRI_SP3. */
Kojto 90:cb3d968589d8 6937 #define BF_AIPS_PACRI_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP3) & BM_AIPS_PACRI_SP3)
Kojto 90:cb3d968589d8 6938
Kojto 90:cb3d968589d8 6939 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 6940 #define BW_AIPS_PACRI_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP3) = (v))
Kojto 90:cb3d968589d8 6941 /*@}*/
Kojto 90:cb3d968589d8 6942
Kojto 90:cb3d968589d8 6943 /*!
Kojto 90:cb3d968589d8 6944 * @name Register AIPS_PACRI, field TP2[20] (RW)
Kojto 90:cb3d968589d8 6945 *
Kojto 90:cb3d968589d8 6946 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 6947 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 6948 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 6949 *
Kojto 90:cb3d968589d8 6950 * Values:
Kojto 90:cb3d968589d8 6951 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 6952 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 6953 */
Kojto 90:cb3d968589d8 6954 /*@{*/
Kojto 90:cb3d968589d8 6955 #define BP_AIPS_PACRI_TP2 (20U) /*!< Bit position for AIPS_PACRI_TP2. */
Kojto 90:cb3d968589d8 6956 #define BM_AIPS_PACRI_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRI_TP2. */
Kojto 90:cb3d968589d8 6957 #define BS_AIPS_PACRI_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP2. */
Kojto 90:cb3d968589d8 6958
Kojto 90:cb3d968589d8 6959 /*! @brief Read current value of the AIPS_PACRI_TP2 field. */
Kojto 90:cb3d968589d8 6960 #define BR_AIPS_PACRI_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP2))
Kojto 90:cb3d968589d8 6961
Kojto 90:cb3d968589d8 6962 /*! @brief Format value for bitfield AIPS_PACRI_TP2. */
Kojto 90:cb3d968589d8 6963 #define BF_AIPS_PACRI_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP2) & BM_AIPS_PACRI_TP2)
Kojto 90:cb3d968589d8 6964
Kojto 90:cb3d968589d8 6965 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 6966 #define BW_AIPS_PACRI_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP2) = (v))
Kojto 90:cb3d968589d8 6967 /*@}*/
Kojto 90:cb3d968589d8 6968
Kojto 90:cb3d968589d8 6969 /*!
Kojto 90:cb3d968589d8 6970 * @name Register AIPS_PACRI, field WP2[21] (RW)
Kojto 90:cb3d968589d8 6971 *
Kojto 90:cb3d968589d8 6972 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 6973 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 6974 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 6975 *
Kojto 90:cb3d968589d8 6976 * Values:
Kojto 90:cb3d968589d8 6977 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 6978 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 6979 */
Kojto 90:cb3d968589d8 6980 /*@{*/
Kojto 90:cb3d968589d8 6981 #define BP_AIPS_PACRI_WP2 (21U) /*!< Bit position for AIPS_PACRI_WP2. */
Kojto 90:cb3d968589d8 6982 #define BM_AIPS_PACRI_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRI_WP2. */
Kojto 90:cb3d968589d8 6983 #define BS_AIPS_PACRI_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP2. */
Kojto 90:cb3d968589d8 6984
Kojto 90:cb3d968589d8 6985 /*! @brief Read current value of the AIPS_PACRI_WP2 field. */
Kojto 90:cb3d968589d8 6986 #define BR_AIPS_PACRI_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP2))
Kojto 90:cb3d968589d8 6987
Kojto 90:cb3d968589d8 6988 /*! @brief Format value for bitfield AIPS_PACRI_WP2. */
Kojto 90:cb3d968589d8 6989 #define BF_AIPS_PACRI_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP2) & BM_AIPS_PACRI_WP2)
Kojto 90:cb3d968589d8 6990
Kojto 90:cb3d968589d8 6991 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 6992 #define BW_AIPS_PACRI_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP2) = (v))
Kojto 90:cb3d968589d8 6993 /*@}*/
Kojto 90:cb3d968589d8 6994
Kojto 90:cb3d968589d8 6995 /*!
Kojto 90:cb3d968589d8 6996 * @name Register AIPS_PACRI, field SP2[22] (RW)
Kojto 90:cb3d968589d8 6997 *
Kojto 90:cb3d968589d8 6998 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 6999 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7000 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 7001 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 7002 * initiates.
Kojto 90:cb3d968589d8 7003 *
Kojto 90:cb3d968589d8 7004 * Values:
Kojto 90:cb3d968589d8 7005 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7006 * accesses.
Kojto 90:cb3d968589d8 7007 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7008 */
Kojto 90:cb3d968589d8 7009 /*@{*/
Kojto 90:cb3d968589d8 7010 #define BP_AIPS_PACRI_SP2 (22U) /*!< Bit position for AIPS_PACRI_SP2. */
Kojto 90:cb3d968589d8 7011 #define BM_AIPS_PACRI_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRI_SP2. */
Kojto 90:cb3d968589d8 7012 #define BS_AIPS_PACRI_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP2. */
Kojto 90:cb3d968589d8 7013
Kojto 90:cb3d968589d8 7014 /*! @brief Read current value of the AIPS_PACRI_SP2 field. */
Kojto 90:cb3d968589d8 7015 #define BR_AIPS_PACRI_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP2))
Kojto 90:cb3d968589d8 7016
Kojto 90:cb3d968589d8 7017 /*! @brief Format value for bitfield AIPS_PACRI_SP2. */
Kojto 90:cb3d968589d8 7018 #define BF_AIPS_PACRI_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP2) & BM_AIPS_PACRI_SP2)
Kojto 90:cb3d968589d8 7019
Kojto 90:cb3d968589d8 7020 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 7021 #define BW_AIPS_PACRI_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP2) = (v))
Kojto 90:cb3d968589d8 7022 /*@}*/
Kojto 90:cb3d968589d8 7023
Kojto 90:cb3d968589d8 7024 /*!
Kojto 90:cb3d968589d8 7025 * @name Register AIPS_PACRI, field TP1[24] (RW)
Kojto 90:cb3d968589d8 7026 *
Kojto 90:cb3d968589d8 7027 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7028 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7029 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7030 *
Kojto 90:cb3d968589d8 7031 * Values:
Kojto 90:cb3d968589d8 7032 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7033 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7034 */
Kojto 90:cb3d968589d8 7035 /*@{*/
Kojto 90:cb3d968589d8 7036 #define BP_AIPS_PACRI_TP1 (24U) /*!< Bit position for AIPS_PACRI_TP1. */
Kojto 90:cb3d968589d8 7037 #define BM_AIPS_PACRI_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRI_TP1. */
Kojto 90:cb3d968589d8 7038 #define BS_AIPS_PACRI_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP1. */
Kojto 90:cb3d968589d8 7039
Kojto 90:cb3d968589d8 7040 /*! @brief Read current value of the AIPS_PACRI_TP1 field. */
Kojto 90:cb3d968589d8 7041 #define BR_AIPS_PACRI_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP1))
Kojto 90:cb3d968589d8 7042
Kojto 90:cb3d968589d8 7043 /*! @brief Format value for bitfield AIPS_PACRI_TP1. */
Kojto 90:cb3d968589d8 7044 #define BF_AIPS_PACRI_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP1) & BM_AIPS_PACRI_TP1)
Kojto 90:cb3d968589d8 7045
Kojto 90:cb3d968589d8 7046 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 7047 #define BW_AIPS_PACRI_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP1) = (v))
Kojto 90:cb3d968589d8 7048 /*@}*/
Kojto 90:cb3d968589d8 7049
Kojto 90:cb3d968589d8 7050 /*!
Kojto 90:cb3d968589d8 7051 * @name Register AIPS_PACRI, field WP1[25] (RW)
Kojto 90:cb3d968589d8 7052 *
Kojto 90:cb3d968589d8 7053 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 7054 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 7055 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 7056 *
Kojto 90:cb3d968589d8 7057 * Values:
Kojto 90:cb3d968589d8 7058 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 7059 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 7060 */
Kojto 90:cb3d968589d8 7061 /*@{*/
Kojto 90:cb3d968589d8 7062 #define BP_AIPS_PACRI_WP1 (25U) /*!< Bit position for AIPS_PACRI_WP1. */
Kojto 90:cb3d968589d8 7063 #define BM_AIPS_PACRI_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRI_WP1. */
Kojto 90:cb3d968589d8 7064 #define BS_AIPS_PACRI_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP1. */
Kojto 90:cb3d968589d8 7065
Kojto 90:cb3d968589d8 7066 /*! @brief Read current value of the AIPS_PACRI_WP1 field. */
Kojto 90:cb3d968589d8 7067 #define BR_AIPS_PACRI_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP1))
Kojto 90:cb3d968589d8 7068
Kojto 90:cb3d968589d8 7069 /*! @brief Format value for bitfield AIPS_PACRI_WP1. */
Kojto 90:cb3d968589d8 7070 #define BF_AIPS_PACRI_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP1) & BM_AIPS_PACRI_WP1)
Kojto 90:cb3d968589d8 7071
Kojto 90:cb3d968589d8 7072 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 7073 #define BW_AIPS_PACRI_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP1) = (v))
Kojto 90:cb3d968589d8 7074 /*@}*/
Kojto 90:cb3d968589d8 7075
Kojto 90:cb3d968589d8 7076 /*!
Kojto 90:cb3d968589d8 7077 * @name Register AIPS_PACRI, field SP1[26] (RW)
Kojto 90:cb3d968589d8 7078 *
Kojto 90:cb3d968589d8 7079 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 7080 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7081 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 7082 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 7083 * access initiates.
Kojto 90:cb3d968589d8 7084 *
Kojto 90:cb3d968589d8 7085 * Values:
Kojto 90:cb3d968589d8 7086 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7087 * accesses.
Kojto 90:cb3d968589d8 7088 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7089 */
Kojto 90:cb3d968589d8 7090 /*@{*/
Kojto 90:cb3d968589d8 7091 #define BP_AIPS_PACRI_SP1 (26U) /*!< Bit position for AIPS_PACRI_SP1. */
Kojto 90:cb3d968589d8 7092 #define BM_AIPS_PACRI_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRI_SP1. */
Kojto 90:cb3d968589d8 7093 #define BS_AIPS_PACRI_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP1. */
Kojto 90:cb3d968589d8 7094
Kojto 90:cb3d968589d8 7095 /*! @brief Read current value of the AIPS_PACRI_SP1 field. */
Kojto 90:cb3d968589d8 7096 #define BR_AIPS_PACRI_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP1))
Kojto 90:cb3d968589d8 7097
Kojto 90:cb3d968589d8 7098 /*! @brief Format value for bitfield AIPS_PACRI_SP1. */
Kojto 90:cb3d968589d8 7099 #define BF_AIPS_PACRI_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP1) & BM_AIPS_PACRI_SP1)
Kojto 90:cb3d968589d8 7100
Kojto 90:cb3d968589d8 7101 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 7102 #define BW_AIPS_PACRI_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP1) = (v))
Kojto 90:cb3d968589d8 7103 /*@}*/
Kojto 90:cb3d968589d8 7104
Kojto 90:cb3d968589d8 7105 /*!
Kojto 90:cb3d968589d8 7106 * @name Register AIPS_PACRI, field TP0[28] (RW)
Kojto 90:cb3d968589d8 7107 *
Kojto 90:cb3d968589d8 7108 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7109 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7110 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7111 *
Kojto 90:cb3d968589d8 7112 * Values:
Kojto 90:cb3d968589d8 7113 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7114 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7115 */
Kojto 90:cb3d968589d8 7116 /*@{*/
Kojto 90:cb3d968589d8 7117 #define BP_AIPS_PACRI_TP0 (28U) /*!< Bit position for AIPS_PACRI_TP0. */
Kojto 90:cb3d968589d8 7118 #define BM_AIPS_PACRI_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRI_TP0. */
Kojto 90:cb3d968589d8 7119 #define BS_AIPS_PACRI_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRI_TP0. */
Kojto 90:cb3d968589d8 7120
Kojto 90:cb3d968589d8 7121 /*! @brief Read current value of the AIPS_PACRI_TP0 field. */
Kojto 90:cb3d968589d8 7122 #define BR_AIPS_PACRI_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP0))
Kojto 90:cb3d968589d8 7123
Kojto 90:cb3d968589d8 7124 /*! @brief Format value for bitfield AIPS_PACRI_TP0. */
Kojto 90:cb3d968589d8 7125 #define BF_AIPS_PACRI_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_TP0) & BM_AIPS_PACRI_TP0)
Kojto 90:cb3d968589d8 7126
Kojto 90:cb3d968589d8 7127 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 7128 #define BW_AIPS_PACRI_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP0) = (v))
Kojto 90:cb3d968589d8 7129 /*@}*/
Kojto 90:cb3d968589d8 7130
Kojto 90:cb3d968589d8 7131 /*!
Kojto 90:cb3d968589d8 7132 * @name Register AIPS_PACRI, field WP0[29] (RW)
Kojto 90:cb3d968589d8 7133 *
Kojto 90:cb3d968589d8 7134 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 7135 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 7136 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 7137 *
Kojto 90:cb3d968589d8 7138 * Values:
Kojto 90:cb3d968589d8 7139 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 7140 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 7141 */
Kojto 90:cb3d968589d8 7142 /*@{*/
Kojto 90:cb3d968589d8 7143 #define BP_AIPS_PACRI_WP0 (29U) /*!< Bit position for AIPS_PACRI_WP0. */
Kojto 90:cb3d968589d8 7144 #define BM_AIPS_PACRI_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRI_WP0. */
Kojto 90:cb3d968589d8 7145 #define BS_AIPS_PACRI_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRI_WP0. */
Kojto 90:cb3d968589d8 7146
Kojto 90:cb3d968589d8 7147 /*! @brief Read current value of the AIPS_PACRI_WP0 field. */
Kojto 90:cb3d968589d8 7148 #define BR_AIPS_PACRI_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP0))
Kojto 90:cb3d968589d8 7149
Kojto 90:cb3d968589d8 7150 /*! @brief Format value for bitfield AIPS_PACRI_WP0. */
Kojto 90:cb3d968589d8 7151 #define BF_AIPS_PACRI_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_WP0) & BM_AIPS_PACRI_WP0)
Kojto 90:cb3d968589d8 7152
Kojto 90:cb3d968589d8 7153 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 7154 #define BW_AIPS_PACRI_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP0) = (v))
Kojto 90:cb3d968589d8 7155 /*@}*/
Kojto 90:cb3d968589d8 7156
Kojto 90:cb3d968589d8 7157 /*!
Kojto 90:cb3d968589d8 7158 * @name Register AIPS_PACRI, field SP0[30] (RW)
Kojto 90:cb3d968589d8 7159 *
Kojto 90:cb3d968589d8 7160 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 7161 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7162 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 7163 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 7164 * access initiates.
Kojto 90:cb3d968589d8 7165 *
Kojto 90:cb3d968589d8 7166 * Values:
Kojto 90:cb3d968589d8 7167 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7168 * accesses.
Kojto 90:cb3d968589d8 7169 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7170 */
Kojto 90:cb3d968589d8 7171 /*@{*/
Kojto 90:cb3d968589d8 7172 #define BP_AIPS_PACRI_SP0 (30U) /*!< Bit position for AIPS_PACRI_SP0. */
Kojto 90:cb3d968589d8 7173 #define BM_AIPS_PACRI_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRI_SP0. */
Kojto 90:cb3d968589d8 7174 #define BS_AIPS_PACRI_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRI_SP0. */
Kojto 90:cb3d968589d8 7175
Kojto 90:cb3d968589d8 7176 /*! @brief Read current value of the AIPS_PACRI_SP0 field. */
Kojto 90:cb3d968589d8 7177 #define BR_AIPS_PACRI_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP0))
Kojto 90:cb3d968589d8 7178
Kojto 90:cb3d968589d8 7179 /*! @brief Format value for bitfield AIPS_PACRI_SP0. */
Kojto 90:cb3d968589d8 7180 #define BF_AIPS_PACRI_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRI_SP0) & BM_AIPS_PACRI_SP0)
Kojto 90:cb3d968589d8 7181
Kojto 90:cb3d968589d8 7182 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 7183 #define BW_AIPS_PACRI_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP0) = (v))
Kojto 90:cb3d968589d8 7184 /*@}*/
Kojto 90:cb3d968589d8 7185
Kojto 90:cb3d968589d8 7186 /*******************************************************************************
Kojto 90:cb3d968589d8 7187 * HW_AIPS_PACRJ - Peripheral Access Control Register
Kojto 90:cb3d968589d8 7188 ******************************************************************************/
Kojto 90:cb3d968589d8 7189
Kojto 90:cb3d968589d8 7190 /*!
Kojto 90:cb3d968589d8 7191 * @brief HW_AIPS_PACRJ - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 7192 *
Kojto 90:cb3d968589d8 7193 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 7194 *
Kojto 90:cb3d968589d8 7195 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 7196 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 7197 * registers.
Kojto 90:cb3d968589d8 7198 */
Kojto 90:cb3d968589d8 7199 typedef union _hw_aips_pacrj
Kojto 90:cb3d968589d8 7200 {
Kojto 90:cb3d968589d8 7201 uint32_t U;
Kojto 90:cb3d968589d8 7202 struct _hw_aips_pacrj_bitfields
Kojto 90:cb3d968589d8 7203 {
Kojto 90:cb3d968589d8 7204 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 7205 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 7206 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 7207 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 7208 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 7209 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 7210 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 7211 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 7212 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 7213 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 7214 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 7215 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 7216 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 7217 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 7218 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 7219 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 7220 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 7221 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 7222 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 7223 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 7224 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 7225 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 7226 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 7227 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 7228 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 7229 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 7230 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 7231 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 7232 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 7233 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 7234 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 7235 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 7236 } B;
Kojto 90:cb3d968589d8 7237 } hw_aips_pacrj_t;
Kojto 90:cb3d968589d8 7238
Kojto 90:cb3d968589d8 7239 /*!
Kojto 90:cb3d968589d8 7240 * @name Constants and macros for entire AIPS_PACRJ register
Kojto 90:cb3d968589d8 7241 */
Kojto 90:cb3d968589d8 7242 /*@{*/
Kojto 90:cb3d968589d8 7243 #define HW_AIPS_PACRJ_ADDR(x) ((x) + 0x54U)
Kojto 90:cb3d968589d8 7244
Kojto 90:cb3d968589d8 7245 #define HW_AIPS_PACRJ(x) (*(__IO hw_aips_pacrj_t *) HW_AIPS_PACRJ_ADDR(x))
Kojto 90:cb3d968589d8 7246 #define HW_AIPS_PACRJ_RD(x) (HW_AIPS_PACRJ(x).U)
Kojto 90:cb3d968589d8 7247 #define HW_AIPS_PACRJ_WR(x, v) (HW_AIPS_PACRJ(x).U = (v))
Kojto 90:cb3d968589d8 7248 #define HW_AIPS_PACRJ_SET(x, v) (HW_AIPS_PACRJ_WR(x, HW_AIPS_PACRJ_RD(x) | (v)))
Kojto 90:cb3d968589d8 7249 #define HW_AIPS_PACRJ_CLR(x, v) (HW_AIPS_PACRJ_WR(x, HW_AIPS_PACRJ_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 7250 #define HW_AIPS_PACRJ_TOG(x, v) (HW_AIPS_PACRJ_WR(x, HW_AIPS_PACRJ_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 7251 /*@}*/
Kojto 90:cb3d968589d8 7252
Kojto 90:cb3d968589d8 7253 /*
Kojto 90:cb3d968589d8 7254 * Constants & macros for individual AIPS_PACRJ bitfields
Kojto 90:cb3d968589d8 7255 */
Kojto 90:cb3d968589d8 7256
Kojto 90:cb3d968589d8 7257 /*!
Kojto 90:cb3d968589d8 7258 * @name Register AIPS_PACRJ, field TP7[0] (RW)
Kojto 90:cb3d968589d8 7259 *
Kojto 90:cb3d968589d8 7260 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7261 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7262 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7263 *
Kojto 90:cb3d968589d8 7264 * Values:
Kojto 90:cb3d968589d8 7265 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7266 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7267 */
Kojto 90:cb3d968589d8 7268 /*@{*/
Kojto 90:cb3d968589d8 7269 #define BP_AIPS_PACRJ_TP7 (0U) /*!< Bit position for AIPS_PACRJ_TP7. */
Kojto 90:cb3d968589d8 7270 #define BM_AIPS_PACRJ_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRJ_TP7. */
Kojto 90:cb3d968589d8 7271 #define BS_AIPS_PACRJ_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP7. */
Kojto 90:cb3d968589d8 7272
Kojto 90:cb3d968589d8 7273 /*! @brief Read current value of the AIPS_PACRJ_TP7 field. */
Kojto 90:cb3d968589d8 7274 #define BR_AIPS_PACRJ_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP7))
Kojto 90:cb3d968589d8 7275
Kojto 90:cb3d968589d8 7276 /*! @brief Format value for bitfield AIPS_PACRJ_TP7. */
Kojto 90:cb3d968589d8 7277 #define BF_AIPS_PACRJ_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP7) & BM_AIPS_PACRJ_TP7)
Kojto 90:cb3d968589d8 7278
Kojto 90:cb3d968589d8 7279 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 7280 #define BW_AIPS_PACRJ_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP7) = (v))
Kojto 90:cb3d968589d8 7281 /*@}*/
Kojto 90:cb3d968589d8 7282
Kojto 90:cb3d968589d8 7283 /*!
Kojto 90:cb3d968589d8 7284 * @name Register AIPS_PACRJ, field WP7[1] (RW)
Kojto 90:cb3d968589d8 7285 *
Kojto 90:cb3d968589d8 7286 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 7287 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 7288 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 7289 *
Kojto 90:cb3d968589d8 7290 * Values:
Kojto 90:cb3d968589d8 7291 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 7292 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 7293 */
Kojto 90:cb3d968589d8 7294 /*@{*/
Kojto 90:cb3d968589d8 7295 #define BP_AIPS_PACRJ_WP7 (1U) /*!< Bit position for AIPS_PACRJ_WP7. */
Kojto 90:cb3d968589d8 7296 #define BM_AIPS_PACRJ_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRJ_WP7. */
Kojto 90:cb3d968589d8 7297 #define BS_AIPS_PACRJ_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP7. */
Kojto 90:cb3d968589d8 7298
Kojto 90:cb3d968589d8 7299 /*! @brief Read current value of the AIPS_PACRJ_WP7 field. */
Kojto 90:cb3d968589d8 7300 #define BR_AIPS_PACRJ_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP7))
Kojto 90:cb3d968589d8 7301
Kojto 90:cb3d968589d8 7302 /*! @brief Format value for bitfield AIPS_PACRJ_WP7. */
Kojto 90:cb3d968589d8 7303 #define BF_AIPS_PACRJ_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP7) & BM_AIPS_PACRJ_WP7)
Kojto 90:cb3d968589d8 7304
Kojto 90:cb3d968589d8 7305 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 7306 #define BW_AIPS_PACRJ_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP7) = (v))
Kojto 90:cb3d968589d8 7307 /*@}*/
Kojto 90:cb3d968589d8 7308
Kojto 90:cb3d968589d8 7309 /*!
Kojto 90:cb3d968589d8 7310 * @name Register AIPS_PACRJ, field SP7[2] (RW)
Kojto 90:cb3d968589d8 7311 *
Kojto 90:cb3d968589d8 7312 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 7313 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7314 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 7315 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 7316 * access initiates.
Kojto 90:cb3d968589d8 7317 *
Kojto 90:cb3d968589d8 7318 * Values:
Kojto 90:cb3d968589d8 7319 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7320 * accesses.
Kojto 90:cb3d968589d8 7321 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7322 */
Kojto 90:cb3d968589d8 7323 /*@{*/
Kojto 90:cb3d968589d8 7324 #define BP_AIPS_PACRJ_SP7 (2U) /*!< Bit position for AIPS_PACRJ_SP7. */
Kojto 90:cb3d968589d8 7325 #define BM_AIPS_PACRJ_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRJ_SP7. */
Kojto 90:cb3d968589d8 7326 #define BS_AIPS_PACRJ_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP7. */
Kojto 90:cb3d968589d8 7327
Kojto 90:cb3d968589d8 7328 /*! @brief Read current value of the AIPS_PACRJ_SP7 field. */
Kojto 90:cb3d968589d8 7329 #define BR_AIPS_PACRJ_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP7))
Kojto 90:cb3d968589d8 7330
Kojto 90:cb3d968589d8 7331 /*! @brief Format value for bitfield AIPS_PACRJ_SP7. */
Kojto 90:cb3d968589d8 7332 #define BF_AIPS_PACRJ_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP7) & BM_AIPS_PACRJ_SP7)
Kojto 90:cb3d968589d8 7333
Kojto 90:cb3d968589d8 7334 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 7335 #define BW_AIPS_PACRJ_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP7) = (v))
Kojto 90:cb3d968589d8 7336 /*@}*/
Kojto 90:cb3d968589d8 7337
Kojto 90:cb3d968589d8 7338 /*!
Kojto 90:cb3d968589d8 7339 * @name Register AIPS_PACRJ, field TP6[4] (RW)
Kojto 90:cb3d968589d8 7340 *
Kojto 90:cb3d968589d8 7341 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7342 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7343 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7344 *
Kojto 90:cb3d968589d8 7345 * Values:
Kojto 90:cb3d968589d8 7346 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7347 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7348 */
Kojto 90:cb3d968589d8 7349 /*@{*/
Kojto 90:cb3d968589d8 7350 #define BP_AIPS_PACRJ_TP6 (4U) /*!< Bit position for AIPS_PACRJ_TP6. */
Kojto 90:cb3d968589d8 7351 #define BM_AIPS_PACRJ_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRJ_TP6. */
Kojto 90:cb3d968589d8 7352 #define BS_AIPS_PACRJ_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP6. */
Kojto 90:cb3d968589d8 7353
Kojto 90:cb3d968589d8 7354 /*! @brief Read current value of the AIPS_PACRJ_TP6 field. */
Kojto 90:cb3d968589d8 7355 #define BR_AIPS_PACRJ_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP6))
Kojto 90:cb3d968589d8 7356
Kojto 90:cb3d968589d8 7357 /*! @brief Format value for bitfield AIPS_PACRJ_TP6. */
Kojto 90:cb3d968589d8 7358 #define BF_AIPS_PACRJ_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP6) & BM_AIPS_PACRJ_TP6)
Kojto 90:cb3d968589d8 7359
Kojto 90:cb3d968589d8 7360 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 7361 #define BW_AIPS_PACRJ_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP6) = (v))
Kojto 90:cb3d968589d8 7362 /*@}*/
Kojto 90:cb3d968589d8 7363
Kojto 90:cb3d968589d8 7364 /*!
Kojto 90:cb3d968589d8 7365 * @name Register AIPS_PACRJ, field WP6[5] (RW)
Kojto 90:cb3d968589d8 7366 *
Kojto 90:cb3d968589d8 7367 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 7368 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 7369 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 7370 *
Kojto 90:cb3d968589d8 7371 * Values:
Kojto 90:cb3d968589d8 7372 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 7373 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 7374 */
Kojto 90:cb3d968589d8 7375 /*@{*/
Kojto 90:cb3d968589d8 7376 #define BP_AIPS_PACRJ_WP6 (5U) /*!< Bit position for AIPS_PACRJ_WP6. */
Kojto 90:cb3d968589d8 7377 #define BM_AIPS_PACRJ_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRJ_WP6. */
Kojto 90:cb3d968589d8 7378 #define BS_AIPS_PACRJ_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP6. */
Kojto 90:cb3d968589d8 7379
Kojto 90:cb3d968589d8 7380 /*! @brief Read current value of the AIPS_PACRJ_WP6 field. */
Kojto 90:cb3d968589d8 7381 #define BR_AIPS_PACRJ_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP6))
Kojto 90:cb3d968589d8 7382
Kojto 90:cb3d968589d8 7383 /*! @brief Format value for bitfield AIPS_PACRJ_WP6. */
Kojto 90:cb3d968589d8 7384 #define BF_AIPS_PACRJ_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP6) & BM_AIPS_PACRJ_WP6)
Kojto 90:cb3d968589d8 7385
Kojto 90:cb3d968589d8 7386 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 7387 #define BW_AIPS_PACRJ_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP6) = (v))
Kojto 90:cb3d968589d8 7388 /*@}*/
Kojto 90:cb3d968589d8 7389
Kojto 90:cb3d968589d8 7390 /*!
Kojto 90:cb3d968589d8 7391 * @name Register AIPS_PACRJ, field SP6[6] (RW)
Kojto 90:cb3d968589d8 7392 *
Kojto 90:cb3d968589d8 7393 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 7394 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7395 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 7396 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 7397 * access initiates.
Kojto 90:cb3d968589d8 7398 *
Kojto 90:cb3d968589d8 7399 * Values:
Kojto 90:cb3d968589d8 7400 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7401 * accesses.
Kojto 90:cb3d968589d8 7402 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7403 */
Kojto 90:cb3d968589d8 7404 /*@{*/
Kojto 90:cb3d968589d8 7405 #define BP_AIPS_PACRJ_SP6 (6U) /*!< Bit position for AIPS_PACRJ_SP6. */
Kojto 90:cb3d968589d8 7406 #define BM_AIPS_PACRJ_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRJ_SP6. */
Kojto 90:cb3d968589d8 7407 #define BS_AIPS_PACRJ_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP6. */
Kojto 90:cb3d968589d8 7408
Kojto 90:cb3d968589d8 7409 /*! @brief Read current value of the AIPS_PACRJ_SP6 field. */
Kojto 90:cb3d968589d8 7410 #define BR_AIPS_PACRJ_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP6))
Kojto 90:cb3d968589d8 7411
Kojto 90:cb3d968589d8 7412 /*! @brief Format value for bitfield AIPS_PACRJ_SP6. */
Kojto 90:cb3d968589d8 7413 #define BF_AIPS_PACRJ_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP6) & BM_AIPS_PACRJ_SP6)
Kojto 90:cb3d968589d8 7414
Kojto 90:cb3d968589d8 7415 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 7416 #define BW_AIPS_PACRJ_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP6) = (v))
Kojto 90:cb3d968589d8 7417 /*@}*/
Kojto 90:cb3d968589d8 7418
Kojto 90:cb3d968589d8 7419 /*!
Kojto 90:cb3d968589d8 7420 * @name Register AIPS_PACRJ, field TP5[8] (RW)
Kojto 90:cb3d968589d8 7421 *
Kojto 90:cb3d968589d8 7422 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7423 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7424 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7425 *
Kojto 90:cb3d968589d8 7426 * Values:
Kojto 90:cb3d968589d8 7427 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7428 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7429 */
Kojto 90:cb3d968589d8 7430 /*@{*/
Kojto 90:cb3d968589d8 7431 #define BP_AIPS_PACRJ_TP5 (8U) /*!< Bit position for AIPS_PACRJ_TP5. */
Kojto 90:cb3d968589d8 7432 #define BM_AIPS_PACRJ_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRJ_TP5. */
Kojto 90:cb3d968589d8 7433 #define BS_AIPS_PACRJ_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP5. */
Kojto 90:cb3d968589d8 7434
Kojto 90:cb3d968589d8 7435 /*! @brief Read current value of the AIPS_PACRJ_TP5 field. */
Kojto 90:cb3d968589d8 7436 #define BR_AIPS_PACRJ_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP5))
Kojto 90:cb3d968589d8 7437
Kojto 90:cb3d968589d8 7438 /*! @brief Format value for bitfield AIPS_PACRJ_TP5. */
Kojto 90:cb3d968589d8 7439 #define BF_AIPS_PACRJ_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP5) & BM_AIPS_PACRJ_TP5)
Kojto 90:cb3d968589d8 7440
Kojto 90:cb3d968589d8 7441 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 7442 #define BW_AIPS_PACRJ_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP5) = (v))
Kojto 90:cb3d968589d8 7443 /*@}*/
Kojto 90:cb3d968589d8 7444
Kojto 90:cb3d968589d8 7445 /*!
Kojto 90:cb3d968589d8 7446 * @name Register AIPS_PACRJ, field WP5[9] (RW)
Kojto 90:cb3d968589d8 7447 *
Kojto 90:cb3d968589d8 7448 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 7449 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 7450 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 7451 *
Kojto 90:cb3d968589d8 7452 * Values:
Kojto 90:cb3d968589d8 7453 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 7454 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 7455 */
Kojto 90:cb3d968589d8 7456 /*@{*/
Kojto 90:cb3d968589d8 7457 #define BP_AIPS_PACRJ_WP5 (9U) /*!< Bit position for AIPS_PACRJ_WP5. */
Kojto 90:cb3d968589d8 7458 #define BM_AIPS_PACRJ_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRJ_WP5. */
Kojto 90:cb3d968589d8 7459 #define BS_AIPS_PACRJ_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP5. */
Kojto 90:cb3d968589d8 7460
Kojto 90:cb3d968589d8 7461 /*! @brief Read current value of the AIPS_PACRJ_WP5 field. */
Kojto 90:cb3d968589d8 7462 #define BR_AIPS_PACRJ_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP5))
Kojto 90:cb3d968589d8 7463
Kojto 90:cb3d968589d8 7464 /*! @brief Format value for bitfield AIPS_PACRJ_WP5. */
Kojto 90:cb3d968589d8 7465 #define BF_AIPS_PACRJ_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP5) & BM_AIPS_PACRJ_WP5)
Kojto 90:cb3d968589d8 7466
Kojto 90:cb3d968589d8 7467 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 7468 #define BW_AIPS_PACRJ_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP5) = (v))
Kojto 90:cb3d968589d8 7469 /*@}*/
Kojto 90:cb3d968589d8 7470
Kojto 90:cb3d968589d8 7471 /*!
Kojto 90:cb3d968589d8 7472 * @name Register AIPS_PACRJ, field SP5[10] (RW)
Kojto 90:cb3d968589d8 7473 *
Kojto 90:cb3d968589d8 7474 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 7475 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7476 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 7477 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 7478 * access initiates.
Kojto 90:cb3d968589d8 7479 *
Kojto 90:cb3d968589d8 7480 * Values:
Kojto 90:cb3d968589d8 7481 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7482 * accesses.
Kojto 90:cb3d968589d8 7483 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7484 */
Kojto 90:cb3d968589d8 7485 /*@{*/
Kojto 90:cb3d968589d8 7486 #define BP_AIPS_PACRJ_SP5 (10U) /*!< Bit position for AIPS_PACRJ_SP5. */
Kojto 90:cb3d968589d8 7487 #define BM_AIPS_PACRJ_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRJ_SP5. */
Kojto 90:cb3d968589d8 7488 #define BS_AIPS_PACRJ_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP5. */
Kojto 90:cb3d968589d8 7489
Kojto 90:cb3d968589d8 7490 /*! @brief Read current value of the AIPS_PACRJ_SP5 field. */
Kojto 90:cb3d968589d8 7491 #define BR_AIPS_PACRJ_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP5))
Kojto 90:cb3d968589d8 7492
Kojto 90:cb3d968589d8 7493 /*! @brief Format value for bitfield AIPS_PACRJ_SP5. */
Kojto 90:cb3d968589d8 7494 #define BF_AIPS_PACRJ_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP5) & BM_AIPS_PACRJ_SP5)
Kojto 90:cb3d968589d8 7495
Kojto 90:cb3d968589d8 7496 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 7497 #define BW_AIPS_PACRJ_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP5) = (v))
Kojto 90:cb3d968589d8 7498 /*@}*/
Kojto 90:cb3d968589d8 7499
Kojto 90:cb3d968589d8 7500 /*!
Kojto 90:cb3d968589d8 7501 * @name Register AIPS_PACRJ, field TP4[12] (RW)
Kojto 90:cb3d968589d8 7502 *
Kojto 90:cb3d968589d8 7503 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7504 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7505 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7506 *
Kojto 90:cb3d968589d8 7507 * Values:
Kojto 90:cb3d968589d8 7508 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7509 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7510 */
Kojto 90:cb3d968589d8 7511 /*@{*/
Kojto 90:cb3d968589d8 7512 #define BP_AIPS_PACRJ_TP4 (12U) /*!< Bit position for AIPS_PACRJ_TP4. */
Kojto 90:cb3d968589d8 7513 #define BM_AIPS_PACRJ_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRJ_TP4. */
Kojto 90:cb3d968589d8 7514 #define BS_AIPS_PACRJ_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP4. */
Kojto 90:cb3d968589d8 7515
Kojto 90:cb3d968589d8 7516 /*! @brief Read current value of the AIPS_PACRJ_TP4 field. */
Kojto 90:cb3d968589d8 7517 #define BR_AIPS_PACRJ_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP4))
Kojto 90:cb3d968589d8 7518
Kojto 90:cb3d968589d8 7519 /*! @brief Format value for bitfield AIPS_PACRJ_TP4. */
Kojto 90:cb3d968589d8 7520 #define BF_AIPS_PACRJ_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP4) & BM_AIPS_PACRJ_TP4)
Kojto 90:cb3d968589d8 7521
Kojto 90:cb3d968589d8 7522 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 7523 #define BW_AIPS_PACRJ_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP4) = (v))
Kojto 90:cb3d968589d8 7524 /*@}*/
Kojto 90:cb3d968589d8 7525
Kojto 90:cb3d968589d8 7526 /*!
Kojto 90:cb3d968589d8 7527 * @name Register AIPS_PACRJ, field WP4[13] (RW)
Kojto 90:cb3d968589d8 7528 *
Kojto 90:cb3d968589d8 7529 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 7530 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 7531 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 7532 *
Kojto 90:cb3d968589d8 7533 * Values:
Kojto 90:cb3d968589d8 7534 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 7535 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 7536 */
Kojto 90:cb3d968589d8 7537 /*@{*/
Kojto 90:cb3d968589d8 7538 #define BP_AIPS_PACRJ_WP4 (13U) /*!< Bit position for AIPS_PACRJ_WP4. */
Kojto 90:cb3d968589d8 7539 #define BM_AIPS_PACRJ_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRJ_WP4. */
Kojto 90:cb3d968589d8 7540 #define BS_AIPS_PACRJ_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP4. */
Kojto 90:cb3d968589d8 7541
Kojto 90:cb3d968589d8 7542 /*! @brief Read current value of the AIPS_PACRJ_WP4 field. */
Kojto 90:cb3d968589d8 7543 #define BR_AIPS_PACRJ_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP4))
Kojto 90:cb3d968589d8 7544
Kojto 90:cb3d968589d8 7545 /*! @brief Format value for bitfield AIPS_PACRJ_WP4. */
Kojto 90:cb3d968589d8 7546 #define BF_AIPS_PACRJ_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP4) & BM_AIPS_PACRJ_WP4)
Kojto 90:cb3d968589d8 7547
Kojto 90:cb3d968589d8 7548 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 7549 #define BW_AIPS_PACRJ_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP4) = (v))
Kojto 90:cb3d968589d8 7550 /*@}*/
Kojto 90:cb3d968589d8 7551
Kojto 90:cb3d968589d8 7552 /*!
Kojto 90:cb3d968589d8 7553 * @name Register AIPS_PACRJ, field SP4[14] (RW)
Kojto 90:cb3d968589d8 7554 *
Kojto 90:cb3d968589d8 7555 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 7556 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7557 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 7558 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 7559 * initiates.
Kojto 90:cb3d968589d8 7560 *
Kojto 90:cb3d968589d8 7561 * Values:
Kojto 90:cb3d968589d8 7562 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7563 * accesses.
Kojto 90:cb3d968589d8 7564 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7565 */
Kojto 90:cb3d968589d8 7566 /*@{*/
Kojto 90:cb3d968589d8 7567 #define BP_AIPS_PACRJ_SP4 (14U) /*!< Bit position for AIPS_PACRJ_SP4. */
Kojto 90:cb3d968589d8 7568 #define BM_AIPS_PACRJ_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRJ_SP4. */
Kojto 90:cb3d968589d8 7569 #define BS_AIPS_PACRJ_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP4. */
Kojto 90:cb3d968589d8 7570
Kojto 90:cb3d968589d8 7571 /*! @brief Read current value of the AIPS_PACRJ_SP4 field. */
Kojto 90:cb3d968589d8 7572 #define BR_AIPS_PACRJ_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP4))
Kojto 90:cb3d968589d8 7573
Kojto 90:cb3d968589d8 7574 /*! @brief Format value for bitfield AIPS_PACRJ_SP4. */
Kojto 90:cb3d968589d8 7575 #define BF_AIPS_PACRJ_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP4) & BM_AIPS_PACRJ_SP4)
Kojto 90:cb3d968589d8 7576
Kojto 90:cb3d968589d8 7577 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 7578 #define BW_AIPS_PACRJ_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP4) = (v))
Kojto 90:cb3d968589d8 7579 /*@}*/
Kojto 90:cb3d968589d8 7580
Kojto 90:cb3d968589d8 7581 /*!
Kojto 90:cb3d968589d8 7582 * @name Register AIPS_PACRJ, field TP3[16] (RW)
Kojto 90:cb3d968589d8 7583 *
Kojto 90:cb3d968589d8 7584 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7585 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7586 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7587 *
Kojto 90:cb3d968589d8 7588 * Values:
Kojto 90:cb3d968589d8 7589 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7590 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7591 */
Kojto 90:cb3d968589d8 7592 /*@{*/
Kojto 90:cb3d968589d8 7593 #define BP_AIPS_PACRJ_TP3 (16U) /*!< Bit position for AIPS_PACRJ_TP3. */
Kojto 90:cb3d968589d8 7594 #define BM_AIPS_PACRJ_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRJ_TP3. */
Kojto 90:cb3d968589d8 7595 #define BS_AIPS_PACRJ_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP3. */
Kojto 90:cb3d968589d8 7596
Kojto 90:cb3d968589d8 7597 /*! @brief Read current value of the AIPS_PACRJ_TP3 field. */
Kojto 90:cb3d968589d8 7598 #define BR_AIPS_PACRJ_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP3))
Kojto 90:cb3d968589d8 7599
Kojto 90:cb3d968589d8 7600 /*! @brief Format value for bitfield AIPS_PACRJ_TP3. */
Kojto 90:cb3d968589d8 7601 #define BF_AIPS_PACRJ_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP3) & BM_AIPS_PACRJ_TP3)
Kojto 90:cb3d968589d8 7602
Kojto 90:cb3d968589d8 7603 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 7604 #define BW_AIPS_PACRJ_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP3) = (v))
Kojto 90:cb3d968589d8 7605 /*@}*/
Kojto 90:cb3d968589d8 7606
Kojto 90:cb3d968589d8 7607 /*!
Kojto 90:cb3d968589d8 7608 * @name Register AIPS_PACRJ, field WP3[17] (RW)
Kojto 90:cb3d968589d8 7609 *
Kojto 90:cb3d968589d8 7610 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 7611 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 7612 * no peripheral access initiates.
Kojto 90:cb3d968589d8 7613 *
Kojto 90:cb3d968589d8 7614 * Values:
Kojto 90:cb3d968589d8 7615 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 7616 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 7617 */
Kojto 90:cb3d968589d8 7618 /*@{*/
Kojto 90:cb3d968589d8 7619 #define BP_AIPS_PACRJ_WP3 (17U) /*!< Bit position for AIPS_PACRJ_WP3. */
Kojto 90:cb3d968589d8 7620 #define BM_AIPS_PACRJ_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRJ_WP3. */
Kojto 90:cb3d968589d8 7621 #define BS_AIPS_PACRJ_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP3. */
Kojto 90:cb3d968589d8 7622
Kojto 90:cb3d968589d8 7623 /*! @brief Read current value of the AIPS_PACRJ_WP3 field. */
Kojto 90:cb3d968589d8 7624 #define BR_AIPS_PACRJ_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP3))
Kojto 90:cb3d968589d8 7625
Kojto 90:cb3d968589d8 7626 /*! @brief Format value for bitfield AIPS_PACRJ_WP3. */
Kojto 90:cb3d968589d8 7627 #define BF_AIPS_PACRJ_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP3) & BM_AIPS_PACRJ_WP3)
Kojto 90:cb3d968589d8 7628
Kojto 90:cb3d968589d8 7629 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 7630 #define BW_AIPS_PACRJ_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP3) = (v))
Kojto 90:cb3d968589d8 7631 /*@}*/
Kojto 90:cb3d968589d8 7632
Kojto 90:cb3d968589d8 7633 /*!
Kojto 90:cb3d968589d8 7634 * @name Register AIPS_PACRJ, field SP3[18] (RW)
Kojto 90:cb3d968589d8 7635 *
Kojto 90:cb3d968589d8 7636 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 7637 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7638 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 7639 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 7640 * access initiates.
Kojto 90:cb3d968589d8 7641 *
Kojto 90:cb3d968589d8 7642 * Values:
Kojto 90:cb3d968589d8 7643 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7644 * accesses.
Kojto 90:cb3d968589d8 7645 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7646 */
Kojto 90:cb3d968589d8 7647 /*@{*/
Kojto 90:cb3d968589d8 7648 #define BP_AIPS_PACRJ_SP3 (18U) /*!< Bit position for AIPS_PACRJ_SP3. */
Kojto 90:cb3d968589d8 7649 #define BM_AIPS_PACRJ_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRJ_SP3. */
Kojto 90:cb3d968589d8 7650 #define BS_AIPS_PACRJ_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP3. */
Kojto 90:cb3d968589d8 7651
Kojto 90:cb3d968589d8 7652 /*! @brief Read current value of the AIPS_PACRJ_SP3 field. */
Kojto 90:cb3d968589d8 7653 #define BR_AIPS_PACRJ_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP3))
Kojto 90:cb3d968589d8 7654
Kojto 90:cb3d968589d8 7655 /*! @brief Format value for bitfield AIPS_PACRJ_SP3. */
Kojto 90:cb3d968589d8 7656 #define BF_AIPS_PACRJ_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP3) & BM_AIPS_PACRJ_SP3)
Kojto 90:cb3d968589d8 7657
Kojto 90:cb3d968589d8 7658 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 7659 #define BW_AIPS_PACRJ_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP3) = (v))
Kojto 90:cb3d968589d8 7660 /*@}*/
Kojto 90:cb3d968589d8 7661
Kojto 90:cb3d968589d8 7662 /*!
Kojto 90:cb3d968589d8 7663 * @name Register AIPS_PACRJ, field TP2[20] (RW)
Kojto 90:cb3d968589d8 7664 *
Kojto 90:cb3d968589d8 7665 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7666 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7667 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7668 *
Kojto 90:cb3d968589d8 7669 * Values:
Kojto 90:cb3d968589d8 7670 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7671 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7672 */
Kojto 90:cb3d968589d8 7673 /*@{*/
Kojto 90:cb3d968589d8 7674 #define BP_AIPS_PACRJ_TP2 (20U) /*!< Bit position for AIPS_PACRJ_TP2. */
Kojto 90:cb3d968589d8 7675 #define BM_AIPS_PACRJ_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRJ_TP2. */
Kojto 90:cb3d968589d8 7676 #define BS_AIPS_PACRJ_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP2. */
Kojto 90:cb3d968589d8 7677
Kojto 90:cb3d968589d8 7678 /*! @brief Read current value of the AIPS_PACRJ_TP2 field. */
Kojto 90:cb3d968589d8 7679 #define BR_AIPS_PACRJ_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP2))
Kojto 90:cb3d968589d8 7680
Kojto 90:cb3d968589d8 7681 /*! @brief Format value for bitfield AIPS_PACRJ_TP2. */
Kojto 90:cb3d968589d8 7682 #define BF_AIPS_PACRJ_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP2) & BM_AIPS_PACRJ_TP2)
Kojto 90:cb3d968589d8 7683
Kojto 90:cb3d968589d8 7684 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 7685 #define BW_AIPS_PACRJ_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP2) = (v))
Kojto 90:cb3d968589d8 7686 /*@}*/
Kojto 90:cb3d968589d8 7687
Kojto 90:cb3d968589d8 7688 /*!
Kojto 90:cb3d968589d8 7689 * @name Register AIPS_PACRJ, field WP2[21] (RW)
Kojto 90:cb3d968589d8 7690 *
Kojto 90:cb3d968589d8 7691 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 7692 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 7693 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 7694 *
Kojto 90:cb3d968589d8 7695 * Values:
Kojto 90:cb3d968589d8 7696 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 7697 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 7698 */
Kojto 90:cb3d968589d8 7699 /*@{*/
Kojto 90:cb3d968589d8 7700 #define BP_AIPS_PACRJ_WP2 (21U) /*!< Bit position for AIPS_PACRJ_WP2. */
Kojto 90:cb3d968589d8 7701 #define BM_AIPS_PACRJ_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRJ_WP2. */
Kojto 90:cb3d968589d8 7702 #define BS_AIPS_PACRJ_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP2. */
Kojto 90:cb3d968589d8 7703
Kojto 90:cb3d968589d8 7704 /*! @brief Read current value of the AIPS_PACRJ_WP2 field. */
Kojto 90:cb3d968589d8 7705 #define BR_AIPS_PACRJ_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP2))
Kojto 90:cb3d968589d8 7706
Kojto 90:cb3d968589d8 7707 /*! @brief Format value for bitfield AIPS_PACRJ_WP2. */
Kojto 90:cb3d968589d8 7708 #define BF_AIPS_PACRJ_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP2) & BM_AIPS_PACRJ_WP2)
Kojto 90:cb3d968589d8 7709
Kojto 90:cb3d968589d8 7710 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 7711 #define BW_AIPS_PACRJ_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP2) = (v))
Kojto 90:cb3d968589d8 7712 /*@}*/
Kojto 90:cb3d968589d8 7713
Kojto 90:cb3d968589d8 7714 /*!
Kojto 90:cb3d968589d8 7715 * @name Register AIPS_PACRJ, field SP2[22] (RW)
Kojto 90:cb3d968589d8 7716 *
Kojto 90:cb3d968589d8 7717 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 7718 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7719 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 7720 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 7721 * initiates.
Kojto 90:cb3d968589d8 7722 *
Kojto 90:cb3d968589d8 7723 * Values:
Kojto 90:cb3d968589d8 7724 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7725 * accesses.
Kojto 90:cb3d968589d8 7726 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7727 */
Kojto 90:cb3d968589d8 7728 /*@{*/
Kojto 90:cb3d968589d8 7729 #define BP_AIPS_PACRJ_SP2 (22U) /*!< Bit position for AIPS_PACRJ_SP2. */
Kojto 90:cb3d968589d8 7730 #define BM_AIPS_PACRJ_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRJ_SP2. */
Kojto 90:cb3d968589d8 7731 #define BS_AIPS_PACRJ_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP2. */
Kojto 90:cb3d968589d8 7732
Kojto 90:cb3d968589d8 7733 /*! @brief Read current value of the AIPS_PACRJ_SP2 field. */
Kojto 90:cb3d968589d8 7734 #define BR_AIPS_PACRJ_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP2))
Kojto 90:cb3d968589d8 7735
Kojto 90:cb3d968589d8 7736 /*! @brief Format value for bitfield AIPS_PACRJ_SP2. */
Kojto 90:cb3d968589d8 7737 #define BF_AIPS_PACRJ_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP2) & BM_AIPS_PACRJ_SP2)
Kojto 90:cb3d968589d8 7738
Kojto 90:cb3d968589d8 7739 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 7740 #define BW_AIPS_PACRJ_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP2) = (v))
Kojto 90:cb3d968589d8 7741 /*@}*/
Kojto 90:cb3d968589d8 7742
Kojto 90:cb3d968589d8 7743 /*!
Kojto 90:cb3d968589d8 7744 * @name Register AIPS_PACRJ, field TP1[24] (RW)
Kojto 90:cb3d968589d8 7745 *
Kojto 90:cb3d968589d8 7746 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7747 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7748 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7749 *
Kojto 90:cb3d968589d8 7750 * Values:
Kojto 90:cb3d968589d8 7751 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7752 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7753 */
Kojto 90:cb3d968589d8 7754 /*@{*/
Kojto 90:cb3d968589d8 7755 #define BP_AIPS_PACRJ_TP1 (24U) /*!< Bit position for AIPS_PACRJ_TP1. */
Kojto 90:cb3d968589d8 7756 #define BM_AIPS_PACRJ_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRJ_TP1. */
Kojto 90:cb3d968589d8 7757 #define BS_AIPS_PACRJ_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP1. */
Kojto 90:cb3d968589d8 7758
Kojto 90:cb3d968589d8 7759 /*! @brief Read current value of the AIPS_PACRJ_TP1 field. */
Kojto 90:cb3d968589d8 7760 #define BR_AIPS_PACRJ_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP1))
Kojto 90:cb3d968589d8 7761
Kojto 90:cb3d968589d8 7762 /*! @brief Format value for bitfield AIPS_PACRJ_TP1. */
Kojto 90:cb3d968589d8 7763 #define BF_AIPS_PACRJ_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP1) & BM_AIPS_PACRJ_TP1)
Kojto 90:cb3d968589d8 7764
Kojto 90:cb3d968589d8 7765 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 7766 #define BW_AIPS_PACRJ_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP1) = (v))
Kojto 90:cb3d968589d8 7767 /*@}*/
Kojto 90:cb3d968589d8 7768
Kojto 90:cb3d968589d8 7769 /*!
Kojto 90:cb3d968589d8 7770 * @name Register AIPS_PACRJ, field WP1[25] (RW)
Kojto 90:cb3d968589d8 7771 *
Kojto 90:cb3d968589d8 7772 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 7773 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 7774 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 7775 *
Kojto 90:cb3d968589d8 7776 * Values:
Kojto 90:cb3d968589d8 7777 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 7778 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 7779 */
Kojto 90:cb3d968589d8 7780 /*@{*/
Kojto 90:cb3d968589d8 7781 #define BP_AIPS_PACRJ_WP1 (25U) /*!< Bit position for AIPS_PACRJ_WP1. */
Kojto 90:cb3d968589d8 7782 #define BM_AIPS_PACRJ_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRJ_WP1. */
Kojto 90:cb3d968589d8 7783 #define BS_AIPS_PACRJ_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP1. */
Kojto 90:cb3d968589d8 7784
Kojto 90:cb3d968589d8 7785 /*! @brief Read current value of the AIPS_PACRJ_WP1 field. */
Kojto 90:cb3d968589d8 7786 #define BR_AIPS_PACRJ_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP1))
Kojto 90:cb3d968589d8 7787
Kojto 90:cb3d968589d8 7788 /*! @brief Format value for bitfield AIPS_PACRJ_WP1. */
Kojto 90:cb3d968589d8 7789 #define BF_AIPS_PACRJ_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP1) & BM_AIPS_PACRJ_WP1)
Kojto 90:cb3d968589d8 7790
Kojto 90:cb3d968589d8 7791 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 7792 #define BW_AIPS_PACRJ_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP1) = (v))
Kojto 90:cb3d968589d8 7793 /*@}*/
Kojto 90:cb3d968589d8 7794
Kojto 90:cb3d968589d8 7795 /*!
Kojto 90:cb3d968589d8 7796 * @name Register AIPS_PACRJ, field SP1[26] (RW)
Kojto 90:cb3d968589d8 7797 *
Kojto 90:cb3d968589d8 7798 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 7799 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7800 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 7801 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 7802 * access initiates.
Kojto 90:cb3d968589d8 7803 *
Kojto 90:cb3d968589d8 7804 * Values:
Kojto 90:cb3d968589d8 7805 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7806 * accesses.
Kojto 90:cb3d968589d8 7807 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7808 */
Kojto 90:cb3d968589d8 7809 /*@{*/
Kojto 90:cb3d968589d8 7810 #define BP_AIPS_PACRJ_SP1 (26U) /*!< Bit position for AIPS_PACRJ_SP1. */
Kojto 90:cb3d968589d8 7811 #define BM_AIPS_PACRJ_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRJ_SP1. */
Kojto 90:cb3d968589d8 7812 #define BS_AIPS_PACRJ_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP1. */
Kojto 90:cb3d968589d8 7813
Kojto 90:cb3d968589d8 7814 /*! @brief Read current value of the AIPS_PACRJ_SP1 field. */
Kojto 90:cb3d968589d8 7815 #define BR_AIPS_PACRJ_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP1))
Kojto 90:cb3d968589d8 7816
Kojto 90:cb3d968589d8 7817 /*! @brief Format value for bitfield AIPS_PACRJ_SP1. */
Kojto 90:cb3d968589d8 7818 #define BF_AIPS_PACRJ_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP1) & BM_AIPS_PACRJ_SP1)
Kojto 90:cb3d968589d8 7819
Kojto 90:cb3d968589d8 7820 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 7821 #define BW_AIPS_PACRJ_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP1) = (v))
Kojto 90:cb3d968589d8 7822 /*@}*/
Kojto 90:cb3d968589d8 7823
Kojto 90:cb3d968589d8 7824 /*!
Kojto 90:cb3d968589d8 7825 * @name Register AIPS_PACRJ, field TP0[28] (RW)
Kojto 90:cb3d968589d8 7826 *
Kojto 90:cb3d968589d8 7827 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7828 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7829 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7830 *
Kojto 90:cb3d968589d8 7831 * Values:
Kojto 90:cb3d968589d8 7832 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7833 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7834 */
Kojto 90:cb3d968589d8 7835 /*@{*/
Kojto 90:cb3d968589d8 7836 #define BP_AIPS_PACRJ_TP0 (28U) /*!< Bit position for AIPS_PACRJ_TP0. */
Kojto 90:cb3d968589d8 7837 #define BM_AIPS_PACRJ_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRJ_TP0. */
Kojto 90:cb3d968589d8 7838 #define BS_AIPS_PACRJ_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRJ_TP0. */
Kojto 90:cb3d968589d8 7839
Kojto 90:cb3d968589d8 7840 /*! @brief Read current value of the AIPS_PACRJ_TP0 field. */
Kojto 90:cb3d968589d8 7841 #define BR_AIPS_PACRJ_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP0))
Kojto 90:cb3d968589d8 7842
Kojto 90:cb3d968589d8 7843 /*! @brief Format value for bitfield AIPS_PACRJ_TP0. */
Kojto 90:cb3d968589d8 7844 #define BF_AIPS_PACRJ_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_TP0) & BM_AIPS_PACRJ_TP0)
Kojto 90:cb3d968589d8 7845
Kojto 90:cb3d968589d8 7846 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 7847 #define BW_AIPS_PACRJ_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP0) = (v))
Kojto 90:cb3d968589d8 7848 /*@}*/
Kojto 90:cb3d968589d8 7849
Kojto 90:cb3d968589d8 7850 /*!
Kojto 90:cb3d968589d8 7851 * @name Register AIPS_PACRJ, field WP0[29] (RW)
Kojto 90:cb3d968589d8 7852 *
Kojto 90:cb3d968589d8 7853 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 7854 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 7855 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 7856 *
Kojto 90:cb3d968589d8 7857 * Values:
Kojto 90:cb3d968589d8 7858 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 7859 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 7860 */
Kojto 90:cb3d968589d8 7861 /*@{*/
Kojto 90:cb3d968589d8 7862 #define BP_AIPS_PACRJ_WP0 (29U) /*!< Bit position for AIPS_PACRJ_WP0. */
Kojto 90:cb3d968589d8 7863 #define BM_AIPS_PACRJ_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRJ_WP0. */
Kojto 90:cb3d968589d8 7864 #define BS_AIPS_PACRJ_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRJ_WP0. */
Kojto 90:cb3d968589d8 7865
Kojto 90:cb3d968589d8 7866 /*! @brief Read current value of the AIPS_PACRJ_WP0 field. */
Kojto 90:cb3d968589d8 7867 #define BR_AIPS_PACRJ_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP0))
Kojto 90:cb3d968589d8 7868
Kojto 90:cb3d968589d8 7869 /*! @brief Format value for bitfield AIPS_PACRJ_WP0. */
Kojto 90:cb3d968589d8 7870 #define BF_AIPS_PACRJ_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_WP0) & BM_AIPS_PACRJ_WP0)
Kojto 90:cb3d968589d8 7871
Kojto 90:cb3d968589d8 7872 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 7873 #define BW_AIPS_PACRJ_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP0) = (v))
Kojto 90:cb3d968589d8 7874 /*@}*/
Kojto 90:cb3d968589d8 7875
Kojto 90:cb3d968589d8 7876 /*!
Kojto 90:cb3d968589d8 7877 * @name Register AIPS_PACRJ, field SP0[30] (RW)
Kojto 90:cb3d968589d8 7878 *
Kojto 90:cb3d968589d8 7879 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 7880 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 7881 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 7882 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 7883 * access initiates.
Kojto 90:cb3d968589d8 7884 *
Kojto 90:cb3d968589d8 7885 * Values:
Kojto 90:cb3d968589d8 7886 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 7887 * accesses.
Kojto 90:cb3d968589d8 7888 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 7889 */
Kojto 90:cb3d968589d8 7890 /*@{*/
Kojto 90:cb3d968589d8 7891 #define BP_AIPS_PACRJ_SP0 (30U) /*!< Bit position for AIPS_PACRJ_SP0. */
Kojto 90:cb3d968589d8 7892 #define BM_AIPS_PACRJ_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRJ_SP0. */
Kojto 90:cb3d968589d8 7893 #define BS_AIPS_PACRJ_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRJ_SP0. */
Kojto 90:cb3d968589d8 7894
Kojto 90:cb3d968589d8 7895 /*! @brief Read current value of the AIPS_PACRJ_SP0 field. */
Kojto 90:cb3d968589d8 7896 #define BR_AIPS_PACRJ_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP0))
Kojto 90:cb3d968589d8 7897
Kojto 90:cb3d968589d8 7898 /*! @brief Format value for bitfield AIPS_PACRJ_SP0. */
Kojto 90:cb3d968589d8 7899 #define BF_AIPS_PACRJ_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRJ_SP0) & BM_AIPS_PACRJ_SP0)
Kojto 90:cb3d968589d8 7900
Kojto 90:cb3d968589d8 7901 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 7902 #define BW_AIPS_PACRJ_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP0) = (v))
Kojto 90:cb3d968589d8 7903 /*@}*/
Kojto 90:cb3d968589d8 7904
Kojto 90:cb3d968589d8 7905 /*******************************************************************************
Kojto 90:cb3d968589d8 7906 * HW_AIPS_PACRK - Peripheral Access Control Register
Kojto 90:cb3d968589d8 7907 ******************************************************************************/
Kojto 90:cb3d968589d8 7908
Kojto 90:cb3d968589d8 7909 /*!
Kojto 90:cb3d968589d8 7910 * @brief HW_AIPS_PACRK - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 7911 *
Kojto 90:cb3d968589d8 7912 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 7913 *
Kojto 90:cb3d968589d8 7914 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 7915 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 7916 * registers.
Kojto 90:cb3d968589d8 7917 */
Kojto 90:cb3d968589d8 7918 typedef union _hw_aips_pacrk
Kojto 90:cb3d968589d8 7919 {
Kojto 90:cb3d968589d8 7920 uint32_t U;
Kojto 90:cb3d968589d8 7921 struct _hw_aips_pacrk_bitfields
Kojto 90:cb3d968589d8 7922 {
Kojto 90:cb3d968589d8 7923 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 7924 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 7925 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 7926 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 7927 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 7928 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 7929 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 7930 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 7931 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 7932 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 7933 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 7934 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 7935 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 7936 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 7937 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 7938 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 7939 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 7940 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 7941 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 7942 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 7943 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 7944 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 7945 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 7946 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 7947 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 7948 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 7949 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 7950 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 7951 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 7952 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 7953 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 7954 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 7955 } B;
Kojto 90:cb3d968589d8 7956 } hw_aips_pacrk_t;
Kojto 90:cb3d968589d8 7957
Kojto 90:cb3d968589d8 7958 /*!
Kojto 90:cb3d968589d8 7959 * @name Constants and macros for entire AIPS_PACRK register
Kojto 90:cb3d968589d8 7960 */
Kojto 90:cb3d968589d8 7961 /*@{*/
Kojto 90:cb3d968589d8 7962 #define HW_AIPS_PACRK_ADDR(x) ((x) + 0x58U)
Kojto 90:cb3d968589d8 7963
Kojto 90:cb3d968589d8 7964 #define HW_AIPS_PACRK(x) (*(__IO hw_aips_pacrk_t *) HW_AIPS_PACRK_ADDR(x))
Kojto 90:cb3d968589d8 7965 #define HW_AIPS_PACRK_RD(x) (HW_AIPS_PACRK(x).U)
Kojto 90:cb3d968589d8 7966 #define HW_AIPS_PACRK_WR(x, v) (HW_AIPS_PACRK(x).U = (v))
Kojto 90:cb3d968589d8 7967 #define HW_AIPS_PACRK_SET(x, v) (HW_AIPS_PACRK_WR(x, HW_AIPS_PACRK_RD(x) | (v)))
Kojto 90:cb3d968589d8 7968 #define HW_AIPS_PACRK_CLR(x, v) (HW_AIPS_PACRK_WR(x, HW_AIPS_PACRK_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 7969 #define HW_AIPS_PACRK_TOG(x, v) (HW_AIPS_PACRK_WR(x, HW_AIPS_PACRK_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 7970 /*@}*/
Kojto 90:cb3d968589d8 7971
Kojto 90:cb3d968589d8 7972 /*
Kojto 90:cb3d968589d8 7973 * Constants & macros for individual AIPS_PACRK bitfields
Kojto 90:cb3d968589d8 7974 */
Kojto 90:cb3d968589d8 7975
Kojto 90:cb3d968589d8 7976 /*!
Kojto 90:cb3d968589d8 7977 * @name Register AIPS_PACRK, field TP7[0] (RW)
Kojto 90:cb3d968589d8 7978 *
Kojto 90:cb3d968589d8 7979 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 7980 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 7981 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 7982 *
Kojto 90:cb3d968589d8 7983 * Values:
Kojto 90:cb3d968589d8 7984 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 7985 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 7986 */
Kojto 90:cb3d968589d8 7987 /*@{*/
Kojto 90:cb3d968589d8 7988 #define BP_AIPS_PACRK_TP7 (0U) /*!< Bit position for AIPS_PACRK_TP7. */
Kojto 90:cb3d968589d8 7989 #define BM_AIPS_PACRK_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRK_TP7. */
Kojto 90:cb3d968589d8 7990 #define BS_AIPS_PACRK_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP7. */
Kojto 90:cb3d968589d8 7991
Kojto 90:cb3d968589d8 7992 /*! @brief Read current value of the AIPS_PACRK_TP7 field. */
Kojto 90:cb3d968589d8 7993 #define BR_AIPS_PACRK_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP7))
Kojto 90:cb3d968589d8 7994
Kojto 90:cb3d968589d8 7995 /*! @brief Format value for bitfield AIPS_PACRK_TP7. */
Kojto 90:cb3d968589d8 7996 #define BF_AIPS_PACRK_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP7) & BM_AIPS_PACRK_TP7)
Kojto 90:cb3d968589d8 7997
Kojto 90:cb3d968589d8 7998 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 7999 #define BW_AIPS_PACRK_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP7) = (v))
Kojto 90:cb3d968589d8 8000 /*@}*/
Kojto 90:cb3d968589d8 8001
Kojto 90:cb3d968589d8 8002 /*!
Kojto 90:cb3d968589d8 8003 * @name Register AIPS_PACRK, field WP7[1] (RW)
Kojto 90:cb3d968589d8 8004 *
Kojto 90:cb3d968589d8 8005 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8006 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8007 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8008 *
Kojto 90:cb3d968589d8 8009 * Values:
Kojto 90:cb3d968589d8 8010 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8011 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8012 */
Kojto 90:cb3d968589d8 8013 /*@{*/
Kojto 90:cb3d968589d8 8014 #define BP_AIPS_PACRK_WP7 (1U) /*!< Bit position for AIPS_PACRK_WP7. */
Kojto 90:cb3d968589d8 8015 #define BM_AIPS_PACRK_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRK_WP7. */
Kojto 90:cb3d968589d8 8016 #define BS_AIPS_PACRK_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP7. */
Kojto 90:cb3d968589d8 8017
Kojto 90:cb3d968589d8 8018 /*! @brief Read current value of the AIPS_PACRK_WP7 field. */
Kojto 90:cb3d968589d8 8019 #define BR_AIPS_PACRK_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP7))
Kojto 90:cb3d968589d8 8020
Kojto 90:cb3d968589d8 8021 /*! @brief Format value for bitfield AIPS_PACRK_WP7. */
Kojto 90:cb3d968589d8 8022 #define BF_AIPS_PACRK_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP7) & BM_AIPS_PACRK_WP7)
Kojto 90:cb3d968589d8 8023
Kojto 90:cb3d968589d8 8024 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 8025 #define BW_AIPS_PACRK_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP7) = (v))
Kojto 90:cb3d968589d8 8026 /*@}*/
Kojto 90:cb3d968589d8 8027
Kojto 90:cb3d968589d8 8028 /*!
Kojto 90:cb3d968589d8 8029 * @name Register AIPS_PACRK, field SP7[2] (RW)
Kojto 90:cb3d968589d8 8030 *
Kojto 90:cb3d968589d8 8031 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8032 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8033 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 8034 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 8035 * access initiates.
Kojto 90:cb3d968589d8 8036 *
Kojto 90:cb3d968589d8 8037 * Values:
Kojto 90:cb3d968589d8 8038 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8039 * accesses.
Kojto 90:cb3d968589d8 8040 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8041 */
Kojto 90:cb3d968589d8 8042 /*@{*/
Kojto 90:cb3d968589d8 8043 #define BP_AIPS_PACRK_SP7 (2U) /*!< Bit position for AIPS_PACRK_SP7. */
Kojto 90:cb3d968589d8 8044 #define BM_AIPS_PACRK_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRK_SP7. */
Kojto 90:cb3d968589d8 8045 #define BS_AIPS_PACRK_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP7. */
Kojto 90:cb3d968589d8 8046
Kojto 90:cb3d968589d8 8047 /*! @brief Read current value of the AIPS_PACRK_SP7 field. */
Kojto 90:cb3d968589d8 8048 #define BR_AIPS_PACRK_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP7))
Kojto 90:cb3d968589d8 8049
Kojto 90:cb3d968589d8 8050 /*! @brief Format value for bitfield AIPS_PACRK_SP7. */
Kojto 90:cb3d968589d8 8051 #define BF_AIPS_PACRK_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP7) & BM_AIPS_PACRK_SP7)
Kojto 90:cb3d968589d8 8052
Kojto 90:cb3d968589d8 8053 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 8054 #define BW_AIPS_PACRK_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP7) = (v))
Kojto 90:cb3d968589d8 8055 /*@}*/
Kojto 90:cb3d968589d8 8056
Kojto 90:cb3d968589d8 8057 /*!
Kojto 90:cb3d968589d8 8058 * @name Register AIPS_PACRK, field TP6[4] (RW)
Kojto 90:cb3d968589d8 8059 *
Kojto 90:cb3d968589d8 8060 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8061 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8062 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8063 *
Kojto 90:cb3d968589d8 8064 * Values:
Kojto 90:cb3d968589d8 8065 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8066 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8067 */
Kojto 90:cb3d968589d8 8068 /*@{*/
Kojto 90:cb3d968589d8 8069 #define BP_AIPS_PACRK_TP6 (4U) /*!< Bit position for AIPS_PACRK_TP6. */
Kojto 90:cb3d968589d8 8070 #define BM_AIPS_PACRK_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRK_TP6. */
Kojto 90:cb3d968589d8 8071 #define BS_AIPS_PACRK_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP6. */
Kojto 90:cb3d968589d8 8072
Kojto 90:cb3d968589d8 8073 /*! @brief Read current value of the AIPS_PACRK_TP6 field. */
Kojto 90:cb3d968589d8 8074 #define BR_AIPS_PACRK_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP6))
Kojto 90:cb3d968589d8 8075
Kojto 90:cb3d968589d8 8076 /*! @brief Format value for bitfield AIPS_PACRK_TP6. */
Kojto 90:cb3d968589d8 8077 #define BF_AIPS_PACRK_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP6) & BM_AIPS_PACRK_TP6)
Kojto 90:cb3d968589d8 8078
Kojto 90:cb3d968589d8 8079 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 8080 #define BW_AIPS_PACRK_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP6) = (v))
Kojto 90:cb3d968589d8 8081 /*@}*/
Kojto 90:cb3d968589d8 8082
Kojto 90:cb3d968589d8 8083 /*!
Kojto 90:cb3d968589d8 8084 * @name Register AIPS_PACRK, field WP6[5] (RW)
Kojto 90:cb3d968589d8 8085 *
Kojto 90:cb3d968589d8 8086 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8087 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8088 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8089 *
Kojto 90:cb3d968589d8 8090 * Values:
Kojto 90:cb3d968589d8 8091 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8092 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8093 */
Kojto 90:cb3d968589d8 8094 /*@{*/
Kojto 90:cb3d968589d8 8095 #define BP_AIPS_PACRK_WP6 (5U) /*!< Bit position for AIPS_PACRK_WP6. */
Kojto 90:cb3d968589d8 8096 #define BM_AIPS_PACRK_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRK_WP6. */
Kojto 90:cb3d968589d8 8097 #define BS_AIPS_PACRK_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP6. */
Kojto 90:cb3d968589d8 8098
Kojto 90:cb3d968589d8 8099 /*! @brief Read current value of the AIPS_PACRK_WP6 field. */
Kojto 90:cb3d968589d8 8100 #define BR_AIPS_PACRK_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP6))
Kojto 90:cb3d968589d8 8101
Kojto 90:cb3d968589d8 8102 /*! @brief Format value for bitfield AIPS_PACRK_WP6. */
Kojto 90:cb3d968589d8 8103 #define BF_AIPS_PACRK_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP6) & BM_AIPS_PACRK_WP6)
Kojto 90:cb3d968589d8 8104
Kojto 90:cb3d968589d8 8105 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 8106 #define BW_AIPS_PACRK_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP6) = (v))
Kojto 90:cb3d968589d8 8107 /*@}*/
Kojto 90:cb3d968589d8 8108
Kojto 90:cb3d968589d8 8109 /*!
Kojto 90:cb3d968589d8 8110 * @name Register AIPS_PACRK, field SP6[6] (RW)
Kojto 90:cb3d968589d8 8111 *
Kojto 90:cb3d968589d8 8112 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8113 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8114 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 8115 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 8116 * access initiates.
Kojto 90:cb3d968589d8 8117 *
Kojto 90:cb3d968589d8 8118 * Values:
Kojto 90:cb3d968589d8 8119 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8120 * accesses.
Kojto 90:cb3d968589d8 8121 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8122 */
Kojto 90:cb3d968589d8 8123 /*@{*/
Kojto 90:cb3d968589d8 8124 #define BP_AIPS_PACRK_SP6 (6U) /*!< Bit position for AIPS_PACRK_SP6. */
Kojto 90:cb3d968589d8 8125 #define BM_AIPS_PACRK_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRK_SP6. */
Kojto 90:cb3d968589d8 8126 #define BS_AIPS_PACRK_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP6. */
Kojto 90:cb3d968589d8 8127
Kojto 90:cb3d968589d8 8128 /*! @brief Read current value of the AIPS_PACRK_SP6 field. */
Kojto 90:cb3d968589d8 8129 #define BR_AIPS_PACRK_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP6))
Kojto 90:cb3d968589d8 8130
Kojto 90:cb3d968589d8 8131 /*! @brief Format value for bitfield AIPS_PACRK_SP6. */
Kojto 90:cb3d968589d8 8132 #define BF_AIPS_PACRK_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP6) & BM_AIPS_PACRK_SP6)
Kojto 90:cb3d968589d8 8133
Kojto 90:cb3d968589d8 8134 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 8135 #define BW_AIPS_PACRK_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP6) = (v))
Kojto 90:cb3d968589d8 8136 /*@}*/
Kojto 90:cb3d968589d8 8137
Kojto 90:cb3d968589d8 8138 /*!
Kojto 90:cb3d968589d8 8139 * @name Register AIPS_PACRK, field TP5[8] (RW)
Kojto 90:cb3d968589d8 8140 *
Kojto 90:cb3d968589d8 8141 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8142 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8143 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8144 *
Kojto 90:cb3d968589d8 8145 * Values:
Kojto 90:cb3d968589d8 8146 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8147 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8148 */
Kojto 90:cb3d968589d8 8149 /*@{*/
Kojto 90:cb3d968589d8 8150 #define BP_AIPS_PACRK_TP5 (8U) /*!< Bit position for AIPS_PACRK_TP5. */
Kojto 90:cb3d968589d8 8151 #define BM_AIPS_PACRK_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRK_TP5. */
Kojto 90:cb3d968589d8 8152 #define BS_AIPS_PACRK_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP5. */
Kojto 90:cb3d968589d8 8153
Kojto 90:cb3d968589d8 8154 /*! @brief Read current value of the AIPS_PACRK_TP5 field. */
Kojto 90:cb3d968589d8 8155 #define BR_AIPS_PACRK_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP5))
Kojto 90:cb3d968589d8 8156
Kojto 90:cb3d968589d8 8157 /*! @brief Format value for bitfield AIPS_PACRK_TP5. */
Kojto 90:cb3d968589d8 8158 #define BF_AIPS_PACRK_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP5) & BM_AIPS_PACRK_TP5)
Kojto 90:cb3d968589d8 8159
Kojto 90:cb3d968589d8 8160 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 8161 #define BW_AIPS_PACRK_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP5) = (v))
Kojto 90:cb3d968589d8 8162 /*@}*/
Kojto 90:cb3d968589d8 8163
Kojto 90:cb3d968589d8 8164 /*!
Kojto 90:cb3d968589d8 8165 * @name Register AIPS_PACRK, field WP5[9] (RW)
Kojto 90:cb3d968589d8 8166 *
Kojto 90:cb3d968589d8 8167 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8168 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8169 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8170 *
Kojto 90:cb3d968589d8 8171 * Values:
Kojto 90:cb3d968589d8 8172 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8173 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8174 */
Kojto 90:cb3d968589d8 8175 /*@{*/
Kojto 90:cb3d968589d8 8176 #define BP_AIPS_PACRK_WP5 (9U) /*!< Bit position for AIPS_PACRK_WP5. */
Kojto 90:cb3d968589d8 8177 #define BM_AIPS_PACRK_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRK_WP5. */
Kojto 90:cb3d968589d8 8178 #define BS_AIPS_PACRK_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP5. */
Kojto 90:cb3d968589d8 8179
Kojto 90:cb3d968589d8 8180 /*! @brief Read current value of the AIPS_PACRK_WP5 field. */
Kojto 90:cb3d968589d8 8181 #define BR_AIPS_PACRK_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP5))
Kojto 90:cb3d968589d8 8182
Kojto 90:cb3d968589d8 8183 /*! @brief Format value for bitfield AIPS_PACRK_WP5. */
Kojto 90:cb3d968589d8 8184 #define BF_AIPS_PACRK_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP5) & BM_AIPS_PACRK_WP5)
Kojto 90:cb3d968589d8 8185
Kojto 90:cb3d968589d8 8186 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 8187 #define BW_AIPS_PACRK_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP5) = (v))
Kojto 90:cb3d968589d8 8188 /*@}*/
Kojto 90:cb3d968589d8 8189
Kojto 90:cb3d968589d8 8190 /*!
Kojto 90:cb3d968589d8 8191 * @name Register AIPS_PACRK, field SP5[10] (RW)
Kojto 90:cb3d968589d8 8192 *
Kojto 90:cb3d968589d8 8193 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8194 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8195 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 8196 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 8197 * access initiates.
Kojto 90:cb3d968589d8 8198 *
Kojto 90:cb3d968589d8 8199 * Values:
Kojto 90:cb3d968589d8 8200 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8201 * accesses.
Kojto 90:cb3d968589d8 8202 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8203 */
Kojto 90:cb3d968589d8 8204 /*@{*/
Kojto 90:cb3d968589d8 8205 #define BP_AIPS_PACRK_SP5 (10U) /*!< Bit position for AIPS_PACRK_SP5. */
Kojto 90:cb3d968589d8 8206 #define BM_AIPS_PACRK_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRK_SP5. */
Kojto 90:cb3d968589d8 8207 #define BS_AIPS_PACRK_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP5. */
Kojto 90:cb3d968589d8 8208
Kojto 90:cb3d968589d8 8209 /*! @brief Read current value of the AIPS_PACRK_SP5 field. */
Kojto 90:cb3d968589d8 8210 #define BR_AIPS_PACRK_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP5))
Kojto 90:cb3d968589d8 8211
Kojto 90:cb3d968589d8 8212 /*! @brief Format value for bitfield AIPS_PACRK_SP5. */
Kojto 90:cb3d968589d8 8213 #define BF_AIPS_PACRK_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP5) & BM_AIPS_PACRK_SP5)
Kojto 90:cb3d968589d8 8214
Kojto 90:cb3d968589d8 8215 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 8216 #define BW_AIPS_PACRK_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP5) = (v))
Kojto 90:cb3d968589d8 8217 /*@}*/
Kojto 90:cb3d968589d8 8218
Kojto 90:cb3d968589d8 8219 /*!
Kojto 90:cb3d968589d8 8220 * @name Register AIPS_PACRK, field TP4[12] (RW)
Kojto 90:cb3d968589d8 8221 *
Kojto 90:cb3d968589d8 8222 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8223 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8224 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8225 *
Kojto 90:cb3d968589d8 8226 * Values:
Kojto 90:cb3d968589d8 8227 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8228 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8229 */
Kojto 90:cb3d968589d8 8230 /*@{*/
Kojto 90:cb3d968589d8 8231 #define BP_AIPS_PACRK_TP4 (12U) /*!< Bit position for AIPS_PACRK_TP4. */
Kojto 90:cb3d968589d8 8232 #define BM_AIPS_PACRK_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRK_TP4. */
Kojto 90:cb3d968589d8 8233 #define BS_AIPS_PACRK_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP4. */
Kojto 90:cb3d968589d8 8234
Kojto 90:cb3d968589d8 8235 /*! @brief Read current value of the AIPS_PACRK_TP4 field. */
Kojto 90:cb3d968589d8 8236 #define BR_AIPS_PACRK_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP4))
Kojto 90:cb3d968589d8 8237
Kojto 90:cb3d968589d8 8238 /*! @brief Format value for bitfield AIPS_PACRK_TP4. */
Kojto 90:cb3d968589d8 8239 #define BF_AIPS_PACRK_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP4) & BM_AIPS_PACRK_TP4)
Kojto 90:cb3d968589d8 8240
Kojto 90:cb3d968589d8 8241 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 8242 #define BW_AIPS_PACRK_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP4) = (v))
Kojto 90:cb3d968589d8 8243 /*@}*/
Kojto 90:cb3d968589d8 8244
Kojto 90:cb3d968589d8 8245 /*!
Kojto 90:cb3d968589d8 8246 * @name Register AIPS_PACRK, field WP4[13] (RW)
Kojto 90:cb3d968589d8 8247 *
Kojto 90:cb3d968589d8 8248 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8249 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8250 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8251 *
Kojto 90:cb3d968589d8 8252 * Values:
Kojto 90:cb3d968589d8 8253 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8254 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8255 */
Kojto 90:cb3d968589d8 8256 /*@{*/
Kojto 90:cb3d968589d8 8257 #define BP_AIPS_PACRK_WP4 (13U) /*!< Bit position for AIPS_PACRK_WP4. */
Kojto 90:cb3d968589d8 8258 #define BM_AIPS_PACRK_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRK_WP4. */
Kojto 90:cb3d968589d8 8259 #define BS_AIPS_PACRK_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP4. */
Kojto 90:cb3d968589d8 8260
Kojto 90:cb3d968589d8 8261 /*! @brief Read current value of the AIPS_PACRK_WP4 field. */
Kojto 90:cb3d968589d8 8262 #define BR_AIPS_PACRK_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP4))
Kojto 90:cb3d968589d8 8263
Kojto 90:cb3d968589d8 8264 /*! @brief Format value for bitfield AIPS_PACRK_WP4. */
Kojto 90:cb3d968589d8 8265 #define BF_AIPS_PACRK_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP4) & BM_AIPS_PACRK_WP4)
Kojto 90:cb3d968589d8 8266
Kojto 90:cb3d968589d8 8267 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 8268 #define BW_AIPS_PACRK_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP4) = (v))
Kojto 90:cb3d968589d8 8269 /*@}*/
Kojto 90:cb3d968589d8 8270
Kojto 90:cb3d968589d8 8271 /*!
Kojto 90:cb3d968589d8 8272 * @name Register AIPS_PACRK, field SP4[14] (RW)
Kojto 90:cb3d968589d8 8273 *
Kojto 90:cb3d968589d8 8274 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8275 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8276 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 8277 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 8278 * initiates.
Kojto 90:cb3d968589d8 8279 *
Kojto 90:cb3d968589d8 8280 * Values:
Kojto 90:cb3d968589d8 8281 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8282 * accesses.
Kojto 90:cb3d968589d8 8283 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8284 */
Kojto 90:cb3d968589d8 8285 /*@{*/
Kojto 90:cb3d968589d8 8286 #define BP_AIPS_PACRK_SP4 (14U) /*!< Bit position for AIPS_PACRK_SP4. */
Kojto 90:cb3d968589d8 8287 #define BM_AIPS_PACRK_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRK_SP4. */
Kojto 90:cb3d968589d8 8288 #define BS_AIPS_PACRK_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP4. */
Kojto 90:cb3d968589d8 8289
Kojto 90:cb3d968589d8 8290 /*! @brief Read current value of the AIPS_PACRK_SP4 field. */
Kojto 90:cb3d968589d8 8291 #define BR_AIPS_PACRK_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP4))
Kojto 90:cb3d968589d8 8292
Kojto 90:cb3d968589d8 8293 /*! @brief Format value for bitfield AIPS_PACRK_SP4. */
Kojto 90:cb3d968589d8 8294 #define BF_AIPS_PACRK_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP4) & BM_AIPS_PACRK_SP4)
Kojto 90:cb3d968589d8 8295
Kojto 90:cb3d968589d8 8296 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 8297 #define BW_AIPS_PACRK_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP4) = (v))
Kojto 90:cb3d968589d8 8298 /*@}*/
Kojto 90:cb3d968589d8 8299
Kojto 90:cb3d968589d8 8300 /*!
Kojto 90:cb3d968589d8 8301 * @name Register AIPS_PACRK, field TP3[16] (RW)
Kojto 90:cb3d968589d8 8302 *
Kojto 90:cb3d968589d8 8303 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8304 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8305 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8306 *
Kojto 90:cb3d968589d8 8307 * Values:
Kojto 90:cb3d968589d8 8308 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8309 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8310 */
Kojto 90:cb3d968589d8 8311 /*@{*/
Kojto 90:cb3d968589d8 8312 #define BP_AIPS_PACRK_TP3 (16U) /*!< Bit position for AIPS_PACRK_TP3. */
Kojto 90:cb3d968589d8 8313 #define BM_AIPS_PACRK_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRK_TP3. */
Kojto 90:cb3d968589d8 8314 #define BS_AIPS_PACRK_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP3. */
Kojto 90:cb3d968589d8 8315
Kojto 90:cb3d968589d8 8316 /*! @brief Read current value of the AIPS_PACRK_TP3 field. */
Kojto 90:cb3d968589d8 8317 #define BR_AIPS_PACRK_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP3))
Kojto 90:cb3d968589d8 8318
Kojto 90:cb3d968589d8 8319 /*! @brief Format value for bitfield AIPS_PACRK_TP3. */
Kojto 90:cb3d968589d8 8320 #define BF_AIPS_PACRK_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP3) & BM_AIPS_PACRK_TP3)
Kojto 90:cb3d968589d8 8321
Kojto 90:cb3d968589d8 8322 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 8323 #define BW_AIPS_PACRK_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP3) = (v))
Kojto 90:cb3d968589d8 8324 /*@}*/
Kojto 90:cb3d968589d8 8325
Kojto 90:cb3d968589d8 8326 /*!
Kojto 90:cb3d968589d8 8327 * @name Register AIPS_PACRK, field WP3[17] (RW)
Kojto 90:cb3d968589d8 8328 *
Kojto 90:cb3d968589d8 8329 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 8330 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 8331 * no peripheral access initiates.
Kojto 90:cb3d968589d8 8332 *
Kojto 90:cb3d968589d8 8333 * Values:
Kojto 90:cb3d968589d8 8334 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8335 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8336 */
Kojto 90:cb3d968589d8 8337 /*@{*/
Kojto 90:cb3d968589d8 8338 #define BP_AIPS_PACRK_WP3 (17U) /*!< Bit position for AIPS_PACRK_WP3. */
Kojto 90:cb3d968589d8 8339 #define BM_AIPS_PACRK_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRK_WP3. */
Kojto 90:cb3d968589d8 8340 #define BS_AIPS_PACRK_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP3. */
Kojto 90:cb3d968589d8 8341
Kojto 90:cb3d968589d8 8342 /*! @brief Read current value of the AIPS_PACRK_WP3 field. */
Kojto 90:cb3d968589d8 8343 #define BR_AIPS_PACRK_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP3))
Kojto 90:cb3d968589d8 8344
Kojto 90:cb3d968589d8 8345 /*! @brief Format value for bitfield AIPS_PACRK_WP3. */
Kojto 90:cb3d968589d8 8346 #define BF_AIPS_PACRK_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP3) & BM_AIPS_PACRK_WP3)
Kojto 90:cb3d968589d8 8347
Kojto 90:cb3d968589d8 8348 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 8349 #define BW_AIPS_PACRK_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP3) = (v))
Kojto 90:cb3d968589d8 8350 /*@}*/
Kojto 90:cb3d968589d8 8351
Kojto 90:cb3d968589d8 8352 /*!
Kojto 90:cb3d968589d8 8353 * @name Register AIPS_PACRK, field SP3[18] (RW)
Kojto 90:cb3d968589d8 8354 *
Kojto 90:cb3d968589d8 8355 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8356 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8357 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 8358 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 8359 * access initiates.
Kojto 90:cb3d968589d8 8360 *
Kojto 90:cb3d968589d8 8361 * Values:
Kojto 90:cb3d968589d8 8362 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8363 * accesses.
Kojto 90:cb3d968589d8 8364 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8365 */
Kojto 90:cb3d968589d8 8366 /*@{*/
Kojto 90:cb3d968589d8 8367 #define BP_AIPS_PACRK_SP3 (18U) /*!< Bit position for AIPS_PACRK_SP3. */
Kojto 90:cb3d968589d8 8368 #define BM_AIPS_PACRK_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRK_SP3. */
Kojto 90:cb3d968589d8 8369 #define BS_AIPS_PACRK_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP3. */
Kojto 90:cb3d968589d8 8370
Kojto 90:cb3d968589d8 8371 /*! @brief Read current value of the AIPS_PACRK_SP3 field. */
Kojto 90:cb3d968589d8 8372 #define BR_AIPS_PACRK_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP3))
Kojto 90:cb3d968589d8 8373
Kojto 90:cb3d968589d8 8374 /*! @brief Format value for bitfield AIPS_PACRK_SP3. */
Kojto 90:cb3d968589d8 8375 #define BF_AIPS_PACRK_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP3) & BM_AIPS_PACRK_SP3)
Kojto 90:cb3d968589d8 8376
Kojto 90:cb3d968589d8 8377 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 8378 #define BW_AIPS_PACRK_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP3) = (v))
Kojto 90:cb3d968589d8 8379 /*@}*/
Kojto 90:cb3d968589d8 8380
Kojto 90:cb3d968589d8 8381 /*!
Kojto 90:cb3d968589d8 8382 * @name Register AIPS_PACRK, field TP2[20] (RW)
Kojto 90:cb3d968589d8 8383 *
Kojto 90:cb3d968589d8 8384 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8385 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8386 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8387 *
Kojto 90:cb3d968589d8 8388 * Values:
Kojto 90:cb3d968589d8 8389 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8390 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8391 */
Kojto 90:cb3d968589d8 8392 /*@{*/
Kojto 90:cb3d968589d8 8393 #define BP_AIPS_PACRK_TP2 (20U) /*!< Bit position for AIPS_PACRK_TP2. */
Kojto 90:cb3d968589d8 8394 #define BM_AIPS_PACRK_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRK_TP2. */
Kojto 90:cb3d968589d8 8395 #define BS_AIPS_PACRK_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP2. */
Kojto 90:cb3d968589d8 8396
Kojto 90:cb3d968589d8 8397 /*! @brief Read current value of the AIPS_PACRK_TP2 field. */
Kojto 90:cb3d968589d8 8398 #define BR_AIPS_PACRK_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP2))
Kojto 90:cb3d968589d8 8399
Kojto 90:cb3d968589d8 8400 /*! @brief Format value for bitfield AIPS_PACRK_TP2. */
Kojto 90:cb3d968589d8 8401 #define BF_AIPS_PACRK_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP2) & BM_AIPS_PACRK_TP2)
Kojto 90:cb3d968589d8 8402
Kojto 90:cb3d968589d8 8403 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 8404 #define BW_AIPS_PACRK_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP2) = (v))
Kojto 90:cb3d968589d8 8405 /*@}*/
Kojto 90:cb3d968589d8 8406
Kojto 90:cb3d968589d8 8407 /*!
Kojto 90:cb3d968589d8 8408 * @name Register AIPS_PACRK, field WP2[21] (RW)
Kojto 90:cb3d968589d8 8409 *
Kojto 90:cb3d968589d8 8410 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8411 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8412 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8413 *
Kojto 90:cb3d968589d8 8414 * Values:
Kojto 90:cb3d968589d8 8415 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8416 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8417 */
Kojto 90:cb3d968589d8 8418 /*@{*/
Kojto 90:cb3d968589d8 8419 #define BP_AIPS_PACRK_WP2 (21U) /*!< Bit position for AIPS_PACRK_WP2. */
Kojto 90:cb3d968589d8 8420 #define BM_AIPS_PACRK_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRK_WP2. */
Kojto 90:cb3d968589d8 8421 #define BS_AIPS_PACRK_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP2. */
Kojto 90:cb3d968589d8 8422
Kojto 90:cb3d968589d8 8423 /*! @brief Read current value of the AIPS_PACRK_WP2 field. */
Kojto 90:cb3d968589d8 8424 #define BR_AIPS_PACRK_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP2))
Kojto 90:cb3d968589d8 8425
Kojto 90:cb3d968589d8 8426 /*! @brief Format value for bitfield AIPS_PACRK_WP2. */
Kojto 90:cb3d968589d8 8427 #define BF_AIPS_PACRK_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP2) & BM_AIPS_PACRK_WP2)
Kojto 90:cb3d968589d8 8428
Kojto 90:cb3d968589d8 8429 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 8430 #define BW_AIPS_PACRK_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP2) = (v))
Kojto 90:cb3d968589d8 8431 /*@}*/
Kojto 90:cb3d968589d8 8432
Kojto 90:cb3d968589d8 8433 /*!
Kojto 90:cb3d968589d8 8434 * @name Register AIPS_PACRK, field SP2[22] (RW)
Kojto 90:cb3d968589d8 8435 *
Kojto 90:cb3d968589d8 8436 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8437 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8438 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 8439 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 8440 * initiates.
Kojto 90:cb3d968589d8 8441 *
Kojto 90:cb3d968589d8 8442 * Values:
Kojto 90:cb3d968589d8 8443 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8444 * accesses.
Kojto 90:cb3d968589d8 8445 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8446 */
Kojto 90:cb3d968589d8 8447 /*@{*/
Kojto 90:cb3d968589d8 8448 #define BP_AIPS_PACRK_SP2 (22U) /*!< Bit position for AIPS_PACRK_SP2. */
Kojto 90:cb3d968589d8 8449 #define BM_AIPS_PACRK_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRK_SP2. */
Kojto 90:cb3d968589d8 8450 #define BS_AIPS_PACRK_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP2. */
Kojto 90:cb3d968589d8 8451
Kojto 90:cb3d968589d8 8452 /*! @brief Read current value of the AIPS_PACRK_SP2 field. */
Kojto 90:cb3d968589d8 8453 #define BR_AIPS_PACRK_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP2))
Kojto 90:cb3d968589d8 8454
Kojto 90:cb3d968589d8 8455 /*! @brief Format value for bitfield AIPS_PACRK_SP2. */
Kojto 90:cb3d968589d8 8456 #define BF_AIPS_PACRK_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP2) & BM_AIPS_PACRK_SP2)
Kojto 90:cb3d968589d8 8457
Kojto 90:cb3d968589d8 8458 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 8459 #define BW_AIPS_PACRK_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP2) = (v))
Kojto 90:cb3d968589d8 8460 /*@}*/
Kojto 90:cb3d968589d8 8461
Kojto 90:cb3d968589d8 8462 /*!
Kojto 90:cb3d968589d8 8463 * @name Register AIPS_PACRK, field TP1[24] (RW)
Kojto 90:cb3d968589d8 8464 *
Kojto 90:cb3d968589d8 8465 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8466 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8467 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8468 *
Kojto 90:cb3d968589d8 8469 * Values:
Kojto 90:cb3d968589d8 8470 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8471 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8472 */
Kojto 90:cb3d968589d8 8473 /*@{*/
Kojto 90:cb3d968589d8 8474 #define BP_AIPS_PACRK_TP1 (24U) /*!< Bit position for AIPS_PACRK_TP1. */
Kojto 90:cb3d968589d8 8475 #define BM_AIPS_PACRK_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRK_TP1. */
Kojto 90:cb3d968589d8 8476 #define BS_AIPS_PACRK_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP1. */
Kojto 90:cb3d968589d8 8477
Kojto 90:cb3d968589d8 8478 /*! @brief Read current value of the AIPS_PACRK_TP1 field. */
Kojto 90:cb3d968589d8 8479 #define BR_AIPS_PACRK_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP1))
Kojto 90:cb3d968589d8 8480
Kojto 90:cb3d968589d8 8481 /*! @brief Format value for bitfield AIPS_PACRK_TP1. */
Kojto 90:cb3d968589d8 8482 #define BF_AIPS_PACRK_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP1) & BM_AIPS_PACRK_TP1)
Kojto 90:cb3d968589d8 8483
Kojto 90:cb3d968589d8 8484 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 8485 #define BW_AIPS_PACRK_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP1) = (v))
Kojto 90:cb3d968589d8 8486 /*@}*/
Kojto 90:cb3d968589d8 8487
Kojto 90:cb3d968589d8 8488 /*!
Kojto 90:cb3d968589d8 8489 * @name Register AIPS_PACRK, field WP1[25] (RW)
Kojto 90:cb3d968589d8 8490 *
Kojto 90:cb3d968589d8 8491 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8492 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8493 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8494 *
Kojto 90:cb3d968589d8 8495 * Values:
Kojto 90:cb3d968589d8 8496 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8497 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8498 */
Kojto 90:cb3d968589d8 8499 /*@{*/
Kojto 90:cb3d968589d8 8500 #define BP_AIPS_PACRK_WP1 (25U) /*!< Bit position for AIPS_PACRK_WP1. */
Kojto 90:cb3d968589d8 8501 #define BM_AIPS_PACRK_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRK_WP1. */
Kojto 90:cb3d968589d8 8502 #define BS_AIPS_PACRK_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP1. */
Kojto 90:cb3d968589d8 8503
Kojto 90:cb3d968589d8 8504 /*! @brief Read current value of the AIPS_PACRK_WP1 field. */
Kojto 90:cb3d968589d8 8505 #define BR_AIPS_PACRK_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP1))
Kojto 90:cb3d968589d8 8506
Kojto 90:cb3d968589d8 8507 /*! @brief Format value for bitfield AIPS_PACRK_WP1. */
Kojto 90:cb3d968589d8 8508 #define BF_AIPS_PACRK_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP1) & BM_AIPS_PACRK_WP1)
Kojto 90:cb3d968589d8 8509
Kojto 90:cb3d968589d8 8510 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 8511 #define BW_AIPS_PACRK_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP1) = (v))
Kojto 90:cb3d968589d8 8512 /*@}*/
Kojto 90:cb3d968589d8 8513
Kojto 90:cb3d968589d8 8514 /*!
Kojto 90:cb3d968589d8 8515 * @name Register AIPS_PACRK, field SP1[26] (RW)
Kojto 90:cb3d968589d8 8516 *
Kojto 90:cb3d968589d8 8517 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8518 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8519 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 8520 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 8521 * access initiates.
Kojto 90:cb3d968589d8 8522 *
Kojto 90:cb3d968589d8 8523 * Values:
Kojto 90:cb3d968589d8 8524 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8525 * accesses.
Kojto 90:cb3d968589d8 8526 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8527 */
Kojto 90:cb3d968589d8 8528 /*@{*/
Kojto 90:cb3d968589d8 8529 #define BP_AIPS_PACRK_SP1 (26U) /*!< Bit position for AIPS_PACRK_SP1. */
Kojto 90:cb3d968589d8 8530 #define BM_AIPS_PACRK_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRK_SP1. */
Kojto 90:cb3d968589d8 8531 #define BS_AIPS_PACRK_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP1. */
Kojto 90:cb3d968589d8 8532
Kojto 90:cb3d968589d8 8533 /*! @brief Read current value of the AIPS_PACRK_SP1 field. */
Kojto 90:cb3d968589d8 8534 #define BR_AIPS_PACRK_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP1))
Kojto 90:cb3d968589d8 8535
Kojto 90:cb3d968589d8 8536 /*! @brief Format value for bitfield AIPS_PACRK_SP1. */
Kojto 90:cb3d968589d8 8537 #define BF_AIPS_PACRK_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP1) & BM_AIPS_PACRK_SP1)
Kojto 90:cb3d968589d8 8538
Kojto 90:cb3d968589d8 8539 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 8540 #define BW_AIPS_PACRK_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP1) = (v))
Kojto 90:cb3d968589d8 8541 /*@}*/
Kojto 90:cb3d968589d8 8542
Kojto 90:cb3d968589d8 8543 /*!
Kojto 90:cb3d968589d8 8544 * @name Register AIPS_PACRK, field TP0[28] (RW)
Kojto 90:cb3d968589d8 8545 *
Kojto 90:cb3d968589d8 8546 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8547 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8548 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8549 *
Kojto 90:cb3d968589d8 8550 * Values:
Kojto 90:cb3d968589d8 8551 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8552 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8553 */
Kojto 90:cb3d968589d8 8554 /*@{*/
Kojto 90:cb3d968589d8 8555 #define BP_AIPS_PACRK_TP0 (28U) /*!< Bit position for AIPS_PACRK_TP0. */
Kojto 90:cb3d968589d8 8556 #define BM_AIPS_PACRK_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRK_TP0. */
Kojto 90:cb3d968589d8 8557 #define BS_AIPS_PACRK_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRK_TP0. */
Kojto 90:cb3d968589d8 8558
Kojto 90:cb3d968589d8 8559 /*! @brief Read current value of the AIPS_PACRK_TP0 field. */
Kojto 90:cb3d968589d8 8560 #define BR_AIPS_PACRK_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP0))
Kojto 90:cb3d968589d8 8561
Kojto 90:cb3d968589d8 8562 /*! @brief Format value for bitfield AIPS_PACRK_TP0. */
Kojto 90:cb3d968589d8 8563 #define BF_AIPS_PACRK_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_TP0) & BM_AIPS_PACRK_TP0)
Kojto 90:cb3d968589d8 8564
Kojto 90:cb3d968589d8 8565 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 8566 #define BW_AIPS_PACRK_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP0) = (v))
Kojto 90:cb3d968589d8 8567 /*@}*/
Kojto 90:cb3d968589d8 8568
Kojto 90:cb3d968589d8 8569 /*!
Kojto 90:cb3d968589d8 8570 * @name Register AIPS_PACRK, field WP0[29] (RW)
Kojto 90:cb3d968589d8 8571 *
Kojto 90:cb3d968589d8 8572 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8573 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8574 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8575 *
Kojto 90:cb3d968589d8 8576 * Values:
Kojto 90:cb3d968589d8 8577 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8578 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8579 */
Kojto 90:cb3d968589d8 8580 /*@{*/
Kojto 90:cb3d968589d8 8581 #define BP_AIPS_PACRK_WP0 (29U) /*!< Bit position for AIPS_PACRK_WP0. */
Kojto 90:cb3d968589d8 8582 #define BM_AIPS_PACRK_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRK_WP0. */
Kojto 90:cb3d968589d8 8583 #define BS_AIPS_PACRK_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRK_WP0. */
Kojto 90:cb3d968589d8 8584
Kojto 90:cb3d968589d8 8585 /*! @brief Read current value of the AIPS_PACRK_WP0 field. */
Kojto 90:cb3d968589d8 8586 #define BR_AIPS_PACRK_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP0))
Kojto 90:cb3d968589d8 8587
Kojto 90:cb3d968589d8 8588 /*! @brief Format value for bitfield AIPS_PACRK_WP0. */
Kojto 90:cb3d968589d8 8589 #define BF_AIPS_PACRK_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_WP0) & BM_AIPS_PACRK_WP0)
Kojto 90:cb3d968589d8 8590
Kojto 90:cb3d968589d8 8591 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 8592 #define BW_AIPS_PACRK_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP0) = (v))
Kojto 90:cb3d968589d8 8593 /*@}*/
Kojto 90:cb3d968589d8 8594
Kojto 90:cb3d968589d8 8595 /*!
Kojto 90:cb3d968589d8 8596 * @name Register AIPS_PACRK, field SP0[30] (RW)
Kojto 90:cb3d968589d8 8597 *
Kojto 90:cb3d968589d8 8598 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8599 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8600 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 8601 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 8602 * access initiates.
Kojto 90:cb3d968589d8 8603 *
Kojto 90:cb3d968589d8 8604 * Values:
Kojto 90:cb3d968589d8 8605 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8606 * accesses.
Kojto 90:cb3d968589d8 8607 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8608 */
Kojto 90:cb3d968589d8 8609 /*@{*/
Kojto 90:cb3d968589d8 8610 #define BP_AIPS_PACRK_SP0 (30U) /*!< Bit position for AIPS_PACRK_SP0. */
Kojto 90:cb3d968589d8 8611 #define BM_AIPS_PACRK_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRK_SP0. */
Kojto 90:cb3d968589d8 8612 #define BS_AIPS_PACRK_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRK_SP0. */
Kojto 90:cb3d968589d8 8613
Kojto 90:cb3d968589d8 8614 /*! @brief Read current value of the AIPS_PACRK_SP0 field. */
Kojto 90:cb3d968589d8 8615 #define BR_AIPS_PACRK_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP0))
Kojto 90:cb3d968589d8 8616
Kojto 90:cb3d968589d8 8617 /*! @brief Format value for bitfield AIPS_PACRK_SP0. */
Kojto 90:cb3d968589d8 8618 #define BF_AIPS_PACRK_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRK_SP0) & BM_AIPS_PACRK_SP0)
Kojto 90:cb3d968589d8 8619
Kojto 90:cb3d968589d8 8620 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 8621 #define BW_AIPS_PACRK_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP0) = (v))
Kojto 90:cb3d968589d8 8622 /*@}*/
Kojto 90:cb3d968589d8 8623
Kojto 90:cb3d968589d8 8624 /*******************************************************************************
Kojto 90:cb3d968589d8 8625 * HW_AIPS_PACRL - Peripheral Access Control Register
Kojto 90:cb3d968589d8 8626 ******************************************************************************/
Kojto 90:cb3d968589d8 8627
Kojto 90:cb3d968589d8 8628 /*!
Kojto 90:cb3d968589d8 8629 * @brief HW_AIPS_PACRL - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 8630 *
Kojto 90:cb3d968589d8 8631 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 8632 *
Kojto 90:cb3d968589d8 8633 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 8634 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 8635 * registers.
Kojto 90:cb3d968589d8 8636 */
Kojto 90:cb3d968589d8 8637 typedef union _hw_aips_pacrl
Kojto 90:cb3d968589d8 8638 {
Kojto 90:cb3d968589d8 8639 uint32_t U;
Kojto 90:cb3d968589d8 8640 struct _hw_aips_pacrl_bitfields
Kojto 90:cb3d968589d8 8641 {
Kojto 90:cb3d968589d8 8642 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 8643 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 8644 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 8645 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 8646 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 8647 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 8648 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 8649 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 8650 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 8651 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 8652 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 8653 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 8654 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 8655 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 8656 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 8657 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 8658 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 8659 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 8660 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 8661 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 8662 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 8663 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 8664 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 8665 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 8666 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 8667 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 8668 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 8669 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 8670 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 8671 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 8672 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 8673 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 8674 } B;
Kojto 90:cb3d968589d8 8675 } hw_aips_pacrl_t;
Kojto 90:cb3d968589d8 8676
Kojto 90:cb3d968589d8 8677 /*!
Kojto 90:cb3d968589d8 8678 * @name Constants and macros for entire AIPS_PACRL register
Kojto 90:cb3d968589d8 8679 */
Kojto 90:cb3d968589d8 8680 /*@{*/
Kojto 90:cb3d968589d8 8681 #define HW_AIPS_PACRL_ADDR(x) ((x) + 0x5CU)
Kojto 90:cb3d968589d8 8682
Kojto 90:cb3d968589d8 8683 #define HW_AIPS_PACRL(x) (*(__IO hw_aips_pacrl_t *) HW_AIPS_PACRL_ADDR(x))
Kojto 90:cb3d968589d8 8684 #define HW_AIPS_PACRL_RD(x) (HW_AIPS_PACRL(x).U)
Kojto 90:cb3d968589d8 8685 #define HW_AIPS_PACRL_WR(x, v) (HW_AIPS_PACRL(x).U = (v))
Kojto 90:cb3d968589d8 8686 #define HW_AIPS_PACRL_SET(x, v) (HW_AIPS_PACRL_WR(x, HW_AIPS_PACRL_RD(x) | (v)))
Kojto 90:cb3d968589d8 8687 #define HW_AIPS_PACRL_CLR(x, v) (HW_AIPS_PACRL_WR(x, HW_AIPS_PACRL_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 8688 #define HW_AIPS_PACRL_TOG(x, v) (HW_AIPS_PACRL_WR(x, HW_AIPS_PACRL_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 8689 /*@}*/
Kojto 90:cb3d968589d8 8690
Kojto 90:cb3d968589d8 8691 /*
Kojto 90:cb3d968589d8 8692 * Constants & macros for individual AIPS_PACRL bitfields
Kojto 90:cb3d968589d8 8693 */
Kojto 90:cb3d968589d8 8694
Kojto 90:cb3d968589d8 8695 /*!
Kojto 90:cb3d968589d8 8696 * @name Register AIPS_PACRL, field TP7[0] (RW)
Kojto 90:cb3d968589d8 8697 *
Kojto 90:cb3d968589d8 8698 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8699 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8700 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8701 *
Kojto 90:cb3d968589d8 8702 * Values:
Kojto 90:cb3d968589d8 8703 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8704 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8705 */
Kojto 90:cb3d968589d8 8706 /*@{*/
Kojto 90:cb3d968589d8 8707 #define BP_AIPS_PACRL_TP7 (0U) /*!< Bit position for AIPS_PACRL_TP7. */
Kojto 90:cb3d968589d8 8708 #define BM_AIPS_PACRL_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRL_TP7. */
Kojto 90:cb3d968589d8 8709 #define BS_AIPS_PACRL_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP7. */
Kojto 90:cb3d968589d8 8710
Kojto 90:cb3d968589d8 8711 /*! @brief Read current value of the AIPS_PACRL_TP7 field. */
Kojto 90:cb3d968589d8 8712 #define BR_AIPS_PACRL_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP7))
Kojto 90:cb3d968589d8 8713
Kojto 90:cb3d968589d8 8714 /*! @brief Format value for bitfield AIPS_PACRL_TP7. */
Kojto 90:cb3d968589d8 8715 #define BF_AIPS_PACRL_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP7) & BM_AIPS_PACRL_TP7)
Kojto 90:cb3d968589d8 8716
Kojto 90:cb3d968589d8 8717 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 8718 #define BW_AIPS_PACRL_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP7) = (v))
Kojto 90:cb3d968589d8 8719 /*@}*/
Kojto 90:cb3d968589d8 8720
Kojto 90:cb3d968589d8 8721 /*!
Kojto 90:cb3d968589d8 8722 * @name Register AIPS_PACRL, field WP7[1] (RW)
Kojto 90:cb3d968589d8 8723 *
Kojto 90:cb3d968589d8 8724 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8725 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8726 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8727 *
Kojto 90:cb3d968589d8 8728 * Values:
Kojto 90:cb3d968589d8 8729 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8730 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8731 */
Kojto 90:cb3d968589d8 8732 /*@{*/
Kojto 90:cb3d968589d8 8733 #define BP_AIPS_PACRL_WP7 (1U) /*!< Bit position for AIPS_PACRL_WP7. */
Kojto 90:cb3d968589d8 8734 #define BM_AIPS_PACRL_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRL_WP7. */
Kojto 90:cb3d968589d8 8735 #define BS_AIPS_PACRL_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP7. */
Kojto 90:cb3d968589d8 8736
Kojto 90:cb3d968589d8 8737 /*! @brief Read current value of the AIPS_PACRL_WP7 field. */
Kojto 90:cb3d968589d8 8738 #define BR_AIPS_PACRL_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP7))
Kojto 90:cb3d968589d8 8739
Kojto 90:cb3d968589d8 8740 /*! @brief Format value for bitfield AIPS_PACRL_WP7. */
Kojto 90:cb3d968589d8 8741 #define BF_AIPS_PACRL_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP7) & BM_AIPS_PACRL_WP7)
Kojto 90:cb3d968589d8 8742
Kojto 90:cb3d968589d8 8743 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 8744 #define BW_AIPS_PACRL_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP7) = (v))
Kojto 90:cb3d968589d8 8745 /*@}*/
Kojto 90:cb3d968589d8 8746
Kojto 90:cb3d968589d8 8747 /*!
Kojto 90:cb3d968589d8 8748 * @name Register AIPS_PACRL, field SP7[2] (RW)
Kojto 90:cb3d968589d8 8749 *
Kojto 90:cb3d968589d8 8750 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8751 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8752 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 8753 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 8754 * access initiates.
Kojto 90:cb3d968589d8 8755 *
Kojto 90:cb3d968589d8 8756 * Values:
Kojto 90:cb3d968589d8 8757 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8758 * accesses.
Kojto 90:cb3d968589d8 8759 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8760 */
Kojto 90:cb3d968589d8 8761 /*@{*/
Kojto 90:cb3d968589d8 8762 #define BP_AIPS_PACRL_SP7 (2U) /*!< Bit position for AIPS_PACRL_SP7. */
Kojto 90:cb3d968589d8 8763 #define BM_AIPS_PACRL_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRL_SP7. */
Kojto 90:cb3d968589d8 8764 #define BS_AIPS_PACRL_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP7. */
Kojto 90:cb3d968589d8 8765
Kojto 90:cb3d968589d8 8766 /*! @brief Read current value of the AIPS_PACRL_SP7 field. */
Kojto 90:cb3d968589d8 8767 #define BR_AIPS_PACRL_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP7))
Kojto 90:cb3d968589d8 8768
Kojto 90:cb3d968589d8 8769 /*! @brief Format value for bitfield AIPS_PACRL_SP7. */
Kojto 90:cb3d968589d8 8770 #define BF_AIPS_PACRL_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP7) & BM_AIPS_PACRL_SP7)
Kojto 90:cb3d968589d8 8771
Kojto 90:cb3d968589d8 8772 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 8773 #define BW_AIPS_PACRL_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP7) = (v))
Kojto 90:cb3d968589d8 8774 /*@}*/
Kojto 90:cb3d968589d8 8775
Kojto 90:cb3d968589d8 8776 /*!
Kojto 90:cb3d968589d8 8777 * @name Register AIPS_PACRL, field TP6[4] (RW)
Kojto 90:cb3d968589d8 8778 *
Kojto 90:cb3d968589d8 8779 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8780 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8781 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8782 *
Kojto 90:cb3d968589d8 8783 * Values:
Kojto 90:cb3d968589d8 8784 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8785 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8786 */
Kojto 90:cb3d968589d8 8787 /*@{*/
Kojto 90:cb3d968589d8 8788 #define BP_AIPS_PACRL_TP6 (4U) /*!< Bit position for AIPS_PACRL_TP6. */
Kojto 90:cb3d968589d8 8789 #define BM_AIPS_PACRL_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRL_TP6. */
Kojto 90:cb3d968589d8 8790 #define BS_AIPS_PACRL_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP6. */
Kojto 90:cb3d968589d8 8791
Kojto 90:cb3d968589d8 8792 /*! @brief Read current value of the AIPS_PACRL_TP6 field. */
Kojto 90:cb3d968589d8 8793 #define BR_AIPS_PACRL_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP6))
Kojto 90:cb3d968589d8 8794
Kojto 90:cb3d968589d8 8795 /*! @brief Format value for bitfield AIPS_PACRL_TP6. */
Kojto 90:cb3d968589d8 8796 #define BF_AIPS_PACRL_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP6) & BM_AIPS_PACRL_TP6)
Kojto 90:cb3d968589d8 8797
Kojto 90:cb3d968589d8 8798 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 8799 #define BW_AIPS_PACRL_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP6) = (v))
Kojto 90:cb3d968589d8 8800 /*@}*/
Kojto 90:cb3d968589d8 8801
Kojto 90:cb3d968589d8 8802 /*!
Kojto 90:cb3d968589d8 8803 * @name Register AIPS_PACRL, field WP6[5] (RW)
Kojto 90:cb3d968589d8 8804 *
Kojto 90:cb3d968589d8 8805 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8806 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8807 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8808 *
Kojto 90:cb3d968589d8 8809 * Values:
Kojto 90:cb3d968589d8 8810 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8811 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8812 */
Kojto 90:cb3d968589d8 8813 /*@{*/
Kojto 90:cb3d968589d8 8814 #define BP_AIPS_PACRL_WP6 (5U) /*!< Bit position for AIPS_PACRL_WP6. */
Kojto 90:cb3d968589d8 8815 #define BM_AIPS_PACRL_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRL_WP6. */
Kojto 90:cb3d968589d8 8816 #define BS_AIPS_PACRL_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP6. */
Kojto 90:cb3d968589d8 8817
Kojto 90:cb3d968589d8 8818 /*! @brief Read current value of the AIPS_PACRL_WP6 field. */
Kojto 90:cb3d968589d8 8819 #define BR_AIPS_PACRL_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP6))
Kojto 90:cb3d968589d8 8820
Kojto 90:cb3d968589d8 8821 /*! @brief Format value for bitfield AIPS_PACRL_WP6. */
Kojto 90:cb3d968589d8 8822 #define BF_AIPS_PACRL_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP6) & BM_AIPS_PACRL_WP6)
Kojto 90:cb3d968589d8 8823
Kojto 90:cb3d968589d8 8824 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 8825 #define BW_AIPS_PACRL_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP6) = (v))
Kojto 90:cb3d968589d8 8826 /*@}*/
Kojto 90:cb3d968589d8 8827
Kojto 90:cb3d968589d8 8828 /*!
Kojto 90:cb3d968589d8 8829 * @name Register AIPS_PACRL, field SP6[6] (RW)
Kojto 90:cb3d968589d8 8830 *
Kojto 90:cb3d968589d8 8831 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8832 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8833 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 8834 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 8835 * access initiates.
Kojto 90:cb3d968589d8 8836 *
Kojto 90:cb3d968589d8 8837 * Values:
Kojto 90:cb3d968589d8 8838 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8839 * accesses.
Kojto 90:cb3d968589d8 8840 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8841 */
Kojto 90:cb3d968589d8 8842 /*@{*/
Kojto 90:cb3d968589d8 8843 #define BP_AIPS_PACRL_SP6 (6U) /*!< Bit position for AIPS_PACRL_SP6. */
Kojto 90:cb3d968589d8 8844 #define BM_AIPS_PACRL_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRL_SP6. */
Kojto 90:cb3d968589d8 8845 #define BS_AIPS_PACRL_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP6. */
Kojto 90:cb3d968589d8 8846
Kojto 90:cb3d968589d8 8847 /*! @brief Read current value of the AIPS_PACRL_SP6 field. */
Kojto 90:cb3d968589d8 8848 #define BR_AIPS_PACRL_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP6))
Kojto 90:cb3d968589d8 8849
Kojto 90:cb3d968589d8 8850 /*! @brief Format value for bitfield AIPS_PACRL_SP6. */
Kojto 90:cb3d968589d8 8851 #define BF_AIPS_PACRL_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP6) & BM_AIPS_PACRL_SP6)
Kojto 90:cb3d968589d8 8852
Kojto 90:cb3d968589d8 8853 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 8854 #define BW_AIPS_PACRL_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP6) = (v))
Kojto 90:cb3d968589d8 8855 /*@}*/
Kojto 90:cb3d968589d8 8856
Kojto 90:cb3d968589d8 8857 /*!
Kojto 90:cb3d968589d8 8858 * @name Register AIPS_PACRL, field TP5[8] (RW)
Kojto 90:cb3d968589d8 8859 *
Kojto 90:cb3d968589d8 8860 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8861 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8862 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8863 *
Kojto 90:cb3d968589d8 8864 * Values:
Kojto 90:cb3d968589d8 8865 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8866 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8867 */
Kojto 90:cb3d968589d8 8868 /*@{*/
Kojto 90:cb3d968589d8 8869 #define BP_AIPS_PACRL_TP5 (8U) /*!< Bit position for AIPS_PACRL_TP5. */
Kojto 90:cb3d968589d8 8870 #define BM_AIPS_PACRL_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRL_TP5. */
Kojto 90:cb3d968589d8 8871 #define BS_AIPS_PACRL_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP5. */
Kojto 90:cb3d968589d8 8872
Kojto 90:cb3d968589d8 8873 /*! @brief Read current value of the AIPS_PACRL_TP5 field. */
Kojto 90:cb3d968589d8 8874 #define BR_AIPS_PACRL_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP5))
Kojto 90:cb3d968589d8 8875
Kojto 90:cb3d968589d8 8876 /*! @brief Format value for bitfield AIPS_PACRL_TP5. */
Kojto 90:cb3d968589d8 8877 #define BF_AIPS_PACRL_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP5) & BM_AIPS_PACRL_TP5)
Kojto 90:cb3d968589d8 8878
Kojto 90:cb3d968589d8 8879 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 8880 #define BW_AIPS_PACRL_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP5) = (v))
Kojto 90:cb3d968589d8 8881 /*@}*/
Kojto 90:cb3d968589d8 8882
Kojto 90:cb3d968589d8 8883 /*!
Kojto 90:cb3d968589d8 8884 * @name Register AIPS_PACRL, field WP5[9] (RW)
Kojto 90:cb3d968589d8 8885 *
Kojto 90:cb3d968589d8 8886 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8887 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8888 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8889 *
Kojto 90:cb3d968589d8 8890 * Values:
Kojto 90:cb3d968589d8 8891 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8892 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8893 */
Kojto 90:cb3d968589d8 8894 /*@{*/
Kojto 90:cb3d968589d8 8895 #define BP_AIPS_PACRL_WP5 (9U) /*!< Bit position for AIPS_PACRL_WP5. */
Kojto 90:cb3d968589d8 8896 #define BM_AIPS_PACRL_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRL_WP5. */
Kojto 90:cb3d968589d8 8897 #define BS_AIPS_PACRL_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP5. */
Kojto 90:cb3d968589d8 8898
Kojto 90:cb3d968589d8 8899 /*! @brief Read current value of the AIPS_PACRL_WP5 field. */
Kojto 90:cb3d968589d8 8900 #define BR_AIPS_PACRL_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP5))
Kojto 90:cb3d968589d8 8901
Kojto 90:cb3d968589d8 8902 /*! @brief Format value for bitfield AIPS_PACRL_WP5. */
Kojto 90:cb3d968589d8 8903 #define BF_AIPS_PACRL_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP5) & BM_AIPS_PACRL_WP5)
Kojto 90:cb3d968589d8 8904
Kojto 90:cb3d968589d8 8905 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 8906 #define BW_AIPS_PACRL_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP5) = (v))
Kojto 90:cb3d968589d8 8907 /*@}*/
Kojto 90:cb3d968589d8 8908
Kojto 90:cb3d968589d8 8909 /*!
Kojto 90:cb3d968589d8 8910 * @name Register AIPS_PACRL, field SP5[10] (RW)
Kojto 90:cb3d968589d8 8911 *
Kojto 90:cb3d968589d8 8912 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8913 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8914 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 8915 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 8916 * access initiates.
Kojto 90:cb3d968589d8 8917 *
Kojto 90:cb3d968589d8 8918 * Values:
Kojto 90:cb3d968589d8 8919 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 8920 * accesses.
Kojto 90:cb3d968589d8 8921 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 8922 */
Kojto 90:cb3d968589d8 8923 /*@{*/
Kojto 90:cb3d968589d8 8924 #define BP_AIPS_PACRL_SP5 (10U) /*!< Bit position for AIPS_PACRL_SP5. */
Kojto 90:cb3d968589d8 8925 #define BM_AIPS_PACRL_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRL_SP5. */
Kojto 90:cb3d968589d8 8926 #define BS_AIPS_PACRL_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP5. */
Kojto 90:cb3d968589d8 8927
Kojto 90:cb3d968589d8 8928 /*! @brief Read current value of the AIPS_PACRL_SP5 field. */
Kojto 90:cb3d968589d8 8929 #define BR_AIPS_PACRL_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP5))
Kojto 90:cb3d968589d8 8930
Kojto 90:cb3d968589d8 8931 /*! @brief Format value for bitfield AIPS_PACRL_SP5. */
Kojto 90:cb3d968589d8 8932 #define BF_AIPS_PACRL_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP5) & BM_AIPS_PACRL_SP5)
Kojto 90:cb3d968589d8 8933
Kojto 90:cb3d968589d8 8934 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 8935 #define BW_AIPS_PACRL_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP5) = (v))
Kojto 90:cb3d968589d8 8936 /*@}*/
Kojto 90:cb3d968589d8 8937
Kojto 90:cb3d968589d8 8938 /*!
Kojto 90:cb3d968589d8 8939 * @name Register AIPS_PACRL, field TP4[12] (RW)
Kojto 90:cb3d968589d8 8940 *
Kojto 90:cb3d968589d8 8941 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 8942 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 8943 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 8944 *
Kojto 90:cb3d968589d8 8945 * Values:
Kojto 90:cb3d968589d8 8946 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 8947 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 8948 */
Kojto 90:cb3d968589d8 8949 /*@{*/
Kojto 90:cb3d968589d8 8950 #define BP_AIPS_PACRL_TP4 (12U) /*!< Bit position for AIPS_PACRL_TP4. */
Kojto 90:cb3d968589d8 8951 #define BM_AIPS_PACRL_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRL_TP4. */
Kojto 90:cb3d968589d8 8952 #define BS_AIPS_PACRL_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP4. */
Kojto 90:cb3d968589d8 8953
Kojto 90:cb3d968589d8 8954 /*! @brief Read current value of the AIPS_PACRL_TP4 field. */
Kojto 90:cb3d968589d8 8955 #define BR_AIPS_PACRL_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP4))
Kojto 90:cb3d968589d8 8956
Kojto 90:cb3d968589d8 8957 /*! @brief Format value for bitfield AIPS_PACRL_TP4. */
Kojto 90:cb3d968589d8 8958 #define BF_AIPS_PACRL_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP4) & BM_AIPS_PACRL_TP4)
Kojto 90:cb3d968589d8 8959
Kojto 90:cb3d968589d8 8960 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 8961 #define BW_AIPS_PACRL_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP4) = (v))
Kojto 90:cb3d968589d8 8962 /*@}*/
Kojto 90:cb3d968589d8 8963
Kojto 90:cb3d968589d8 8964 /*!
Kojto 90:cb3d968589d8 8965 * @name Register AIPS_PACRL, field WP4[13] (RW)
Kojto 90:cb3d968589d8 8966 *
Kojto 90:cb3d968589d8 8967 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 8968 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 8969 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 8970 *
Kojto 90:cb3d968589d8 8971 * Values:
Kojto 90:cb3d968589d8 8972 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 8973 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 8974 */
Kojto 90:cb3d968589d8 8975 /*@{*/
Kojto 90:cb3d968589d8 8976 #define BP_AIPS_PACRL_WP4 (13U) /*!< Bit position for AIPS_PACRL_WP4. */
Kojto 90:cb3d968589d8 8977 #define BM_AIPS_PACRL_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRL_WP4. */
Kojto 90:cb3d968589d8 8978 #define BS_AIPS_PACRL_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP4. */
Kojto 90:cb3d968589d8 8979
Kojto 90:cb3d968589d8 8980 /*! @brief Read current value of the AIPS_PACRL_WP4 field. */
Kojto 90:cb3d968589d8 8981 #define BR_AIPS_PACRL_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP4))
Kojto 90:cb3d968589d8 8982
Kojto 90:cb3d968589d8 8983 /*! @brief Format value for bitfield AIPS_PACRL_WP4. */
Kojto 90:cb3d968589d8 8984 #define BF_AIPS_PACRL_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP4) & BM_AIPS_PACRL_WP4)
Kojto 90:cb3d968589d8 8985
Kojto 90:cb3d968589d8 8986 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 8987 #define BW_AIPS_PACRL_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP4) = (v))
Kojto 90:cb3d968589d8 8988 /*@}*/
Kojto 90:cb3d968589d8 8989
Kojto 90:cb3d968589d8 8990 /*!
Kojto 90:cb3d968589d8 8991 * @name Register AIPS_PACRL, field SP4[14] (RW)
Kojto 90:cb3d968589d8 8992 *
Kojto 90:cb3d968589d8 8993 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 8994 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 8995 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 8996 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 8997 * initiates.
Kojto 90:cb3d968589d8 8998 *
Kojto 90:cb3d968589d8 8999 * Values:
Kojto 90:cb3d968589d8 9000 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9001 * accesses.
Kojto 90:cb3d968589d8 9002 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9003 */
Kojto 90:cb3d968589d8 9004 /*@{*/
Kojto 90:cb3d968589d8 9005 #define BP_AIPS_PACRL_SP4 (14U) /*!< Bit position for AIPS_PACRL_SP4. */
Kojto 90:cb3d968589d8 9006 #define BM_AIPS_PACRL_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRL_SP4. */
Kojto 90:cb3d968589d8 9007 #define BS_AIPS_PACRL_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP4. */
Kojto 90:cb3d968589d8 9008
Kojto 90:cb3d968589d8 9009 /*! @brief Read current value of the AIPS_PACRL_SP4 field. */
Kojto 90:cb3d968589d8 9010 #define BR_AIPS_PACRL_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP4))
Kojto 90:cb3d968589d8 9011
Kojto 90:cb3d968589d8 9012 /*! @brief Format value for bitfield AIPS_PACRL_SP4. */
Kojto 90:cb3d968589d8 9013 #define BF_AIPS_PACRL_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP4) & BM_AIPS_PACRL_SP4)
Kojto 90:cb3d968589d8 9014
Kojto 90:cb3d968589d8 9015 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 9016 #define BW_AIPS_PACRL_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP4) = (v))
Kojto 90:cb3d968589d8 9017 /*@}*/
Kojto 90:cb3d968589d8 9018
Kojto 90:cb3d968589d8 9019 /*!
Kojto 90:cb3d968589d8 9020 * @name Register AIPS_PACRL, field TP3[16] (RW)
Kojto 90:cb3d968589d8 9021 *
Kojto 90:cb3d968589d8 9022 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9023 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9024 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9025 *
Kojto 90:cb3d968589d8 9026 * Values:
Kojto 90:cb3d968589d8 9027 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9028 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9029 */
Kojto 90:cb3d968589d8 9030 /*@{*/
Kojto 90:cb3d968589d8 9031 #define BP_AIPS_PACRL_TP3 (16U) /*!< Bit position for AIPS_PACRL_TP3. */
Kojto 90:cb3d968589d8 9032 #define BM_AIPS_PACRL_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRL_TP3. */
Kojto 90:cb3d968589d8 9033 #define BS_AIPS_PACRL_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP3. */
Kojto 90:cb3d968589d8 9034
Kojto 90:cb3d968589d8 9035 /*! @brief Read current value of the AIPS_PACRL_TP3 field. */
Kojto 90:cb3d968589d8 9036 #define BR_AIPS_PACRL_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP3))
Kojto 90:cb3d968589d8 9037
Kojto 90:cb3d968589d8 9038 /*! @brief Format value for bitfield AIPS_PACRL_TP3. */
Kojto 90:cb3d968589d8 9039 #define BF_AIPS_PACRL_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP3) & BM_AIPS_PACRL_TP3)
Kojto 90:cb3d968589d8 9040
Kojto 90:cb3d968589d8 9041 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 9042 #define BW_AIPS_PACRL_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP3) = (v))
Kojto 90:cb3d968589d8 9043 /*@}*/
Kojto 90:cb3d968589d8 9044
Kojto 90:cb3d968589d8 9045 /*!
Kojto 90:cb3d968589d8 9046 * @name Register AIPS_PACRL, field WP3[17] (RW)
Kojto 90:cb3d968589d8 9047 *
Kojto 90:cb3d968589d8 9048 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 9049 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 9050 * no peripheral access initiates.
Kojto 90:cb3d968589d8 9051 *
Kojto 90:cb3d968589d8 9052 * Values:
Kojto 90:cb3d968589d8 9053 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9054 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9055 */
Kojto 90:cb3d968589d8 9056 /*@{*/
Kojto 90:cb3d968589d8 9057 #define BP_AIPS_PACRL_WP3 (17U) /*!< Bit position for AIPS_PACRL_WP3. */
Kojto 90:cb3d968589d8 9058 #define BM_AIPS_PACRL_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRL_WP3. */
Kojto 90:cb3d968589d8 9059 #define BS_AIPS_PACRL_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP3. */
Kojto 90:cb3d968589d8 9060
Kojto 90:cb3d968589d8 9061 /*! @brief Read current value of the AIPS_PACRL_WP3 field. */
Kojto 90:cb3d968589d8 9062 #define BR_AIPS_PACRL_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP3))
Kojto 90:cb3d968589d8 9063
Kojto 90:cb3d968589d8 9064 /*! @brief Format value for bitfield AIPS_PACRL_WP3. */
Kojto 90:cb3d968589d8 9065 #define BF_AIPS_PACRL_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP3) & BM_AIPS_PACRL_WP3)
Kojto 90:cb3d968589d8 9066
Kojto 90:cb3d968589d8 9067 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 9068 #define BW_AIPS_PACRL_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP3) = (v))
Kojto 90:cb3d968589d8 9069 /*@}*/
Kojto 90:cb3d968589d8 9070
Kojto 90:cb3d968589d8 9071 /*!
Kojto 90:cb3d968589d8 9072 * @name Register AIPS_PACRL, field SP3[18] (RW)
Kojto 90:cb3d968589d8 9073 *
Kojto 90:cb3d968589d8 9074 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9075 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9076 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 9077 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 9078 * access initiates.
Kojto 90:cb3d968589d8 9079 *
Kojto 90:cb3d968589d8 9080 * Values:
Kojto 90:cb3d968589d8 9081 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9082 * accesses.
Kojto 90:cb3d968589d8 9083 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9084 */
Kojto 90:cb3d968589d8 9085 /*@{*/
Kojto 90:cb3d968589d8 9086 #define BP_AIPS_PACRL_SP3 (18U) /*!< Bit position for AIPS_PACRL_SP3. */
Kojto 90:cb3d968589d8 9087 #define BM_AIPS_PACRL_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRL_SP3. */
Kojto 90:cb3d968589d8 9088 #define BS_AIPS_PACRL_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP3. */
Kojto 90:cb3d968589d8 9089
Kojto 90:cb3d968589d8 9090 /*! @brief Read current value of the AIPS_PACRL_SP3 field. */
Kojto 90:cb3d968589d8 9091 #define BR_AIPS_PACRL_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP3))
Kojto 90:cb3d968589d8 9092
Kojto 90:cb3d968589d8 9093 /*! @brief Format value for bitfield AIPS_PACRL_SP3. */
Kojto 90:cb3d968589d8 9094 #define BF_AIPS_PACRL_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP3) & BM_AIPS_PACRL_SP3)
Kojto 90:cb3d968589d8 9095
Kojto 90:cb3d968589d8 9096 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 9097 #define BW_AIPS_PACRL_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP3) = (v))
Kojto 90:cb3d968589d8 9098 /*@}*/
Kojto 90:cb3d968589d8 9099
Kojto 90:cb3d968589d8 9100 /*!
Kojto 90:cb3d968589d8 9101 * @name Register AIPS_PACRL, field TP2[20] (RW)
Kojto 90:cb3d968589d8 9102 *
Kojto 90:cb3d968589d8 9103 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9104 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9105 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9106 *
Kojto 90:cb3d968589d8 9107 * Values:
Kojto 90:cb3d968589d8 9108 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9109 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9110 */
Kojto 90:cb3d968589d8 9111 /*@{*/
Kojto 90:cb3d968589d8 9112 #define BP_AIPS_PACRL_TP2 (20U) /*!< Bit position for AIPS_PACRL_TP2. */
Kojto 90:cb3d968589d8 9113 #define BM_AIPS_PACRL_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRL_TP2. */
Kojto 90:cb3d968589d8 9114 #define BS_AIPS_PACRL_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP2. */
Kojto 90:cb3d968589d8 9115
Kojto 90:cb3d968589d8 9116 /*! @brief Read current value of the AIPS_PACRL_TP2 field. */
Kojto 90:cb3d968589d8 9117 #define BR_AIPS_PACRL_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP2))
Kojto 90:cb3d968589d8 9118
Kojto 90:cb3d968589d8 9119 /*! @brief Format value for bitfield AIPS_PACRL_TP2. */
Kojto 90:cb3d968589d8 9120 #define BF_AIPS_PACRL_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP2) & BM_AIPS_PACRL_TP2)
Kojto 90:cb3d968589d8 9121
Kojto 90:cb3d968589d8 9122 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 9123 #define BW_AIPS_PACRL_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP2) = (v))
Kojto 90:cb3d968589d8 9124 /*@}*/
Kojto 90:cb3d968589d8 9125
Kojto 90:cb3d968589d8 9126 /*!
Kojto 90:cb3d968589d8 9127 * @name Register AIPS_PACRL, field WP2[21] (RW)
Kojto 90:cb3d968589d8 9128 *
Kojto 90:cb3d968589d8 9129 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 9130 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 9131 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 9132 *
Kojto 90:cb3d968589d8 9133 * Values:
Kojto 90:cb3d968589d8 9134 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9135 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9136 */
Kojto 90:cb3d968589d8 9137 /*@{*/
Kojto 90:cb3d968589d8 9138 #define BP_AIPS_PACRL_WP2 (21U) /*!< Bit position for AIPS_PACRL_WP2. */
Kojto 90:cb3d968589d8 9139 #define BM_AIPS_PACRL_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRL_WP2. */
Kojto 90:cb3d968589d8 9140 #define BS_AIPS_PACRL_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP2. */
Kojto 90:cb3d968589d8 9141
Kojto 90:cb3d968589d8 9142 /*! @brief Read current value of the AIPS_PACRL_WP2 field. */
Kojto 90:cb3d968589d8 9143 #define BR_AIPS_PACRL_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP2))
Kojto 90:cb3d968589d8 9144
Kojto 90:cb3d968589d8 9145 /*! @brief Format value for bitfield AIPS_PACRL_WP2. */
Kojto 90:cb3d968589d8 9146 #define BF_AIPS_PACRL_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP2) & BM_AIPS_PACRL_WP2)
Kojto 90:cb3d968589d8 9147
Kojto 90:cb3d968589d8 9148 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 9149 #define BW_AIPS_PACRL_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP2) = (v))
Kojto 90:cb3d968589d8 9150 /*@}*/
Kojto 90:cb3d968589d8 9151
Kojto 90:cb3d968589d8 9152 /*!
Kojto 90:cb3d968589d8 9153 * @name Register AIPS_PACRL, field SP2[22] (RW)
Kojto 90:cb3d968589d8 9154 *
Kojto 90:cb3d968589d8 9155 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9156 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9157 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 9158 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 9159 * initiates.
Kojto 90:cb3d968589d8 9160 *
Kojto 90:cb3d968589d8 9161 * Values:
Kojto 90:cb3d968589d8 9162 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9163 * accesses.
Kojto 90:cb3d968589d8 9164 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9165 */
Kojto 90:cb3d968589d8 9166 /*@{*/
Kojto 90:cb3d968589d8 9167 #define BP_AIPS_PACRL_SP2 (22U) /*!< Bit position for AIPS_PACRL_SP2. */
Kojto 90:cb3d968589d8 9168 #define BM_AIPS_PACRL_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRL_SP2. */
Kojto 90:cb3d968589d8 9169 #define BS_AIPS_PACRL_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP2. */
Kojto 90:cb3d968589d8 9170
Kojto 90:cb3d968589d8 9171 /*! @brief Read current value of the AIPS_PACRL_SP2 field. */
Kojto 90:cb3d968589d8 9172 #define BR_AIPS_PACRL_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP2))
Kojto 90:cb3d968589d8 9173
Kojto 90:cb3d968589d8 9174 /*! @brief Format value for bitfield AIPS_PACRL_SP2. */
Kojto 90:cb3d968589d8 9175 #define BF_AIPS_PACRL_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP2) & BM_AIPS_PACRL_SP2)
Kojto 90:cb3d968589d8 9176
Kojto 90:cb3d968589d8 9177 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 9178 #define BW_AIPS_PACRL_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP2) = (v))
Kojto 90:cb3d968589d8 9179 /*@}*/
Kojto 90:cb3d968589d8 9180
Kojto 90:cb3d968589d8 9181 /*!
Kojto 90:cb3d968589d8 9182 * @name Register AIPS_PACRL, field TP1[24] (RW)
Kojto 90:cb3d968589d8 9183 *
Kojto 90:cb3d968589d8 9184 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9185 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9186 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9187 *
Kojto 90:cb3d968589d8 9188 * Values:
Kojto 90:cb3d968589d8 9189 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9190 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9191 */
Kojto 90:cb3d968589d8 9192 /*@{*/
Kojto 90:cb3d968589d8 9193 #define BP_AIPS_PACRL_TP1 (24U) /*!< Bit position for AIPS_PACRL_TP1. */
Kojto 90:cb3d968589d8 9194 #define BM_AIPS_PACRL_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRL_TP1. */
Kojto 90:cb3d968589d8 9195 #define BS_AIPS_PACRL_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP1. */
Kojto 90:cb3d968589d8 9196
Kojto 90:cb3d968589d8 9197 /*! @brief Read current value of the AIPS_PACRL_TP1 field. */
Kojto 90:cb3d968589d8 9198 #define BR_AIPS_PACRL_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP1))
Kojto 90:cb3d968589d8 9199
Kojto 90:cb3d968589d8 9200 /*! @brief Format value for bitfield AIPS_PACRL_TP1. */
Kojto 90:cb3d968589d8 9201 #define BF_AIPS_PACRL_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP1) & BM_AIPS_PACRL_TP1)
Kojto 90:cb3d968589d8 9202
Kojto 90:cb3d968589d8 9203 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 9204 #define BW_AIPS_PACRL_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP1) = (v))
Kojto 90:cb3d968589d8 9205 /*@}*/
Kojto 90:cb3d968589d8 9206
Kojto 90:cb3d968589d8 9207 /*!
Kojto 90:cb3d968589d8 9208 * @name Register AIPS_PACRL, field WP1[25] (RW)
Kojto 90:cb3d968589d8 9209 *
Kojto 90:cb3d968589d8 9210 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 9211 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 9212 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 9213 *
Kojto 90:cb3d968589d8 9214 * Values:
Kojto 90:cb3d968589d8 9215 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9216 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9217 */
Kojto 90:cb3d968589d8 9218 /*@{*/
Kojto 90:cb3d968589d8 9219 #define BP_AIPS_PACRL_WP1 (25U) /*!< Bit position for AIPS_PACRL_WP1. */
Kojto 90:cb3d968589d8 9220 #define BM_AIPS_PACRL_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRL_WP1. */
Kojto 90:cb3d968589d8 9221 #define BS_AIPS_PACRL_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP1. */
Kojto 90:cb3d968589d8 9222
Kojto 90:cb3d968589d8 9223 /*! @brief Read current value of the AIPS_PACRL_WP1 field. */
Kojto 90:cb3d968589d8 9224 #define BR_AIPS_PACRL_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP1))
Kojto 90:cb3d968589d8 9225
Kojto 90:cb3d968589d8 9226 /*! @brief Format value for bitfield AIPS_PACRL_WP1. */
Kojto 90:cb3d968589d8 9227 #define BF_AIPS_PACRL_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP1) & BM_AIPS_PACRL_WP1)
Kojto 90:cb3d968589d8 9228
Kojto 90:cb3d968589d8 9229 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 9230 #define BW_AIPS_PACRL_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP1) = (v))
Kojto 90:cb3d968589d8 9231 /*@}*/
Kojto 90:cb3d968589d8 9232
Kojto 90:cb3d968589d8 9233 /*!
Kojto 90:cb3d968589d8 9234 * @name Register AIPS_PACRL, field SP1[26] (RW)
Kojto 90:cb3d968589d8 9235 *
Kojto 90:cb3d968589d8 9236 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9237 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9238 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 9239 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 9240 * access initiates.
Kojto 90:cb3d968589d8 9241 *
Kojto 90:cb3d968589d8 9242 * Values:
Kojto 90:cb3d968589d8 9243 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9244 * accesses.
Kojto 90:cb3d968589d8 9245 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9246 */
Kojto 90:cb3d968589d8 9247 /*@{*/
Kojto 90:cb3d968589d8 9248 #define BP_AIPS_PACRL_SP1 (26U) /*!< Bit position for AIPS_PACRL_SP1. */
Kojto 90:cb3d968589d8 9249 #define BM_AIPS_PACRL_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRL_SP1. */
Kojto 90:cb3d968589d8 9250 #define BS_AIPS_PACRL_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP1. */
Kojto 90:cb3d968589d8 9251
Kojto 90:cb3d968589d8 9252 /*! @brief Read current value of the AIPS_PACRL_SP1 field. */
Kojto 90:cb3d968589d8 9253 #define BR_AIPS_PACRL_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP1))
Kojto 90:cb3d968589d8 9254
Kojto 90:cb3d968589d8 9255 /*! @brief Format value for bitfield AIPS_PACRL_SP1. */
Kojto 90:cb3d968589d8 9256 #define BF_AIPS_PACRL_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP1) & BM_AIPS_PACRL_SP1)
Kojto 90:cb3d968589d8 9257
Kojto 90:cb3d968589d8 9258 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 9259 #define BW_AIPS_PACRL_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP1) = (v))
Kojto 90:cb3d968589d8 9260 /*@}*/
Kojto 90:cb3d968589d8 9261
Kojto 90:cb3d968589d8 9262 /*!
Kojto 90:cb3d968589d8 9263 * @name Register AIPS_PACRL, field TP0[28] (RW)
Kojto 90:cb3d968589d8 9264 *
Kojto 90:cb3d968589d8 9265 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9266 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9267 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9268 *
Kojto 90:cb3d968589d8 9269 * Values:
Kojto 90:cb3d968589d8 9270 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9271 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9272 */
Kojto 90:cb3d968589d8 9273 /*@{*/
Kojto 90:cb3d968589d8 9274 #define BP_AIPS_PACRL_TP0 (28U) /*!< Bit position for AIPS_PACRL_TP0. */
Kojto 90:cb3d968589d8 9275 #define BM_AIPS_PACRL_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRL_TP0. */
Kojto 90:cb3d968589d8 9276 #define BS_AIPS_PACRL_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRL_TP0. */
Kojto 90:cb3d968589d8 9277
Kojto 90:cb3d968589d8 9278 /*! @brief Read current value of the AIPS_PACRL_TP0 field. */
Kojto 90:cb3d968589d8 9279 #define BR_AIPS_PACRL_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP0))
Kojto 90:cb3d968589d8 9280
Kojto 90:cb3d968589d8 9281 /*! @brief Format value for bitfield AIPS_PACRL_TP0. */
Kojto 90:cb3d968589d8 9282 #define BF_AIPS_PACRL_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_TP0) & BM_AIPS_PACRL_TP0)
Kojto 90:cb3d968589d8 9283
Kojto 90:cb3d968589d8 9284 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 9285 #define BW_AIPS_PACRL_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP0) = (v))
Kojto 90:cb3d968589d8 9286 /*@}*/
Kojto 90:cb3d968589d8 9287
Kojto 90:cb3d968589d8 9288 /*!
Kojto 90:cb3d968589d8 9289 * @name Register AIPS_PACRL, field WP0[29] (RW)
Kojto 90:cb3d968589d8 9290 *
Kojto 90:cb3d968589d8 9291 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 9292 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 9293 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 9294 *
Kojto 90:cb3d968589d8 9295 * Values:
Kojto 90:cb3d968589d8 9296 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9297 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9298 */
Kojto 90:cb3d968589d8 9299 /*@{*/
Kojto 90:cb3d968589d8 9300 #define BP_AIPS_PACRL_WP0 (29U) /*!< Bit position for AIPS_PACRL_WP0. */
Kojto 90:cb3d968589d8 9301 #define BM_AIPS_PACRL_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRL_WP0. */
Kojto 90:cb3d968589d8 9302 #define BS_AIPS_PACRL_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRL_WP0. */
Kojto 90:cb3d968589d8 9303
Kojto 90:cb3d968589d8 9304 /*! @brief Read current value of the AIPS_PACRL_WP0 field. */
Kojto 90:cb3d968589d8 9305 #define BR_AIPS_PACRL_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP0))
Kojto 90:cb3d968589d8 9306
Kojto 90:cb3d968589d8 9307 /*! @brief Format value for bitfield AIPS_PACRL_WP0. */
Kojto 90:cb3d968589d8 9308 #define BF_AIPS_PACRL_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_WP0) & BM_AIPS_PACRL_WP0)
Kojto 90:cb3d968589d8 9309
Kojto 90:cb3d968589d8 9310 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 9311 #define BW_AIPS_PACRL_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP0) = (v))
Kojto 90:cb3d968589d8 9312 /*@}*/
Kojto 90:cb3d968589d8 9313
Kojto 90:cb3d968589d8 9314 /*!
Kojto 90:cb3d968589d8 9315 * @name Register AIPS_PACRL, field SP0[30] (RW)
Kojto 90:cb3d968589d8 9316 *
Kojto 90:cb3d968589d8 9317 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9318 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9319 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 9320 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 9321 * access initiates.
Kojto 90:cb3d968589d8 9322 *
Kojto 90:cb3d968589d8 9323 * Values:
Kojto 90:cb3d968589d8 9324 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9325 * accesses.
Kojto 90:cb3d968589d8 9326 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9327 */
Kojto 90:cb3d968589d8 9328 /*@{*/
Kojto 90:cb3d968589d8 9329 #define BP_AIPS_PACRL_SP0 (30U) /*!< Bit position for AIPS_PACRL_SP0. */
Kojto 90:cb3d968589d8 9330 #define BM_AIPS_PACRL_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRL_SP0. */
Kojto 90:cb3d968589d8 9331 #define BS_AIPS_PACRL_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRL_SP0. */
Kojto 90:cb3d968589d8 9332
Kojto 90:cb3d968589d8 9333 /*! @brief Read current value of the AIPS_PACRL_SP0 field. */
Kojto 90:cb3d968589d8 9334 #define BR_AIPS_PACRL_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP0))
Kojto 90:cb3d968589d8 9335
Kojto 90:cb3d968589d8 9336 /*! @brief Format value for bitfield AIPS_PACRL_SP0. */
Kojto 90:cb3d968589d8 9337 #define BF_AIPS_PACRL_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRL_SP0) & BM_AIPS_PACRL_SP0)
Kojto 90:cb3d968589d8 9338
Kojto 90:cb3d968589d8 9339 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 9340 #define BW_AIPS_PACRL_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP0) = (v))
Kojto 90:cb3d968589d8 9341 /*@}*/
Kojto 90:cb3d968589d8 9342
Kojto 90:cb3d968589d8 9343 /*******************************************************************************
Kojto 90:cb3d968589d8 9344 * HW_AIPS_PACRM - Peripheral Access Control Register
Kojto 90:cb3d968589d8 9345 ******************************************************************************/
Kojto 90:cb3d968589d8 9346
Kojto 90:cb3d968589d8 9347 /*!
Kojto 90:cb3d968589d8 9348 * @brief HW_AIPS_PACRM - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 9349 *
Kojto 90:cb3d968589d8 9350 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 9351 *
Kojto 90:cb3d968589d8 9352 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 9353 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 9354 * registers.
Kojto 90:cb3d968589d8 9355 */
Kojto 90:cb3d968589d8 9356 typedef union _hw_aips_pacrm
Kojto 90:cb3d968589d8 9357 {
Kojto 90:cb3d968589d8 9358 uint32_t U;
Kojto 90:cb3d968589d8 9359 struct _hw_aips_pacrm_bitfields
Kojto 90:cb3d968589d8 9360 {
Kojto 90:cb3d968589d8 9361 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 9362 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 9363 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 9364 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 9365 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 9366 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 9367 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 9368 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 9369 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 9370 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 9371 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 9372 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 9373 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 9374 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 9375 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 9376 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 9377 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 9378 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 9379 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 9380 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 9381 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 9382 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 9383 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 9384 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 9385 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 9386 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 9387 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 9388 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 9389 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 9390 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 9391 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 9392 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 9393 } B;
Kojto 90:cb3d968589d8 9394 } hw_aips_pacrm_t;
Kojto 90:cb3d968589d8 9395
Kojto 90:cb3d968589d8 9396 /*!
Kojto 90:cb3d968589d8 9397 * @name Constants and macros for entire AIPS_PACRM register
Kojto 90:cb3d968589d8 9398 */
Kojto 90:cb3d968589d8 9399 /*@{*/
Kojto 90:cb3d968589d8 9400 #define HW_AIPS_PACRM_ADDR(x) ((x) + 0x60U)
Kojto 90:cb3d968589d8 9401
Kojto 90:cb3d968589d8 9402 #define HW_AIPS_PACRM(x) (*(__IO hw_aips_pacrm_t *) HW_AIPS_PACRM_ADDR(x))
Kojto 90:cb3d968589d8 9403 #define HW_AIPS_PACRM_RD(x) (HW_AIPS_PACRM(x).U)
Kojto 90:cb3d968589d8 9404 #define HW_AIPS_PACRM_WR(x, v) (HW_AIPS_PACRM(x).U = (v))
Kojto 90:cb3d968589d8 9405 #define HW_AIPS_PACRM_SET(x, v) (HW_AIPS_PACRM_WR(x, HW_AIPS_PACRM_RD(x) | (v)))
Kojto 90:cb3d968589d8 9406 #define HW_AIPS_PACRM_CLR(x, v) (HW_AIPS_PACRM_WR(x, HW_AIPS_PACRM_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 9407 #define HW_AIPS_PACRM_TOG(x, v) (HW_AIPS_PACRM_WR(x, HW_AIPS_PACRM_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 9408 /*@}*/
Kojto 90:cb3d968589d8 9409
Kojto 90:cb3d968589d8 9410 /*
Kojto 90:cb3d968589d8 9411 * Constants & macros for individual AIPS_PACRM bitfields
Kojto 90:cb3d968589d8 9412 */
Kojto 90:cb3d968589d8 9413
Kojto 90:cb3d968589d8 9414 /*!
Kojto 90:cb3d968589d8 9415 * @name Register AIPS_PACRM, field TP7[0] (RW)
Kojto 90:cb3d968589d8 9416 *
Kojto 90:cb3d968589d8 9417 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9418 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9419 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9420 *
Kojto 90:cb3d968589d8 9421 * Values:
Kojto 90:cb3d968589d8 9422 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9423 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9424 */
Kojto 90:cb3d968589d8 9425 /*@{*/
Kojto 90:cb3d968589d8 9426 #define BP_AIPS_PACRM_TP7 (0U) /*!< Bit position for AIPS_PACRM_TP7. */
Kojto 90:cb3d968589d8 9427 #define BM_AIPS_PACRM_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRM_TP7. */
Kojto 90:cb3d968589d8 9428 #define BS_AIPS_PACRM_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP7. */
Kojto 90:cb3d968589d8 9429
Kojto 90:cb3d968589d8 9430 /*! @brief Read current value of the AIPS_PACRM_TP7 field. */
Kojto 90:cb3d968589d8 9431 #define BR_AIPS_PACRM_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP7))
Kojto 90:cb3d968589d8 9432
Kojto 90:cb3d968589d8 9433 /*! @brief Format value for bitfield AIPS_PACRM_TP7. */
Kojto 90:cb3d968589d8 9434 #define BF_AIPS_PACRM_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP7) & BM_AIPS_PACRM_TP7)
Kojto 90:cb3d968589d8 9435
Kojto 90:cb3d968589d8 9436 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 9437 #define BW_AIPS_PACRM_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP7) = (v))
Kojto 90:cb3d968589d8 9438 /*@}*/
Kojto 90:cb3d968589d8 9439
Kojto 90:cb3d968589d8 9440 /*!
Kojto 90:cb3d968589d8 9441 * @name Register AIPS_PACRM, field WP7[1] (RW)
Kojto 90:cb3d968589d8 9442 *
Kojto 90:cb3d968589d8 9443 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 9444 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 9445 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 9446 *
Kojto 90:cb3d968589d8 9447 * Values:
Kojto 90:cb3d968589d8 9448 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9449 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9450 */
Kojto 90:cb3d968589d8 9451 /*@{*/
Kojto 90:cb3d968589d8 9452 #define BP_AIPS_PACRM_WP7 (1U) /*!< Bit position for AIPS_PACRM_WP7. */
Kojto 90:cb3d968589d8 9453 #define BM_AIPS_PACRM_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRM_WP7. */
Kojto 90:cb3d968589d8 9454 #define BS_AIPS_PACRM_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP7. */
Kojto 90:cb3d968589d8 9455
Kojto 90:cb3d968589d8 9456 /*! @brief Read current value of the AIPS_PACRM_WP7 field. */
Kojto 90:cb3d968589d8 9457 #define BR_AIPS_PACRM_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP7))
Kojto 90:cb3d968589d8 9458
Kojto 90:cb3d968589d8 9459 /*! @brief Format value for bitfield AIPS_PACRM_WP7. */
Kojto 90:cb3d968589d8 9460 #define BF_AIPS_PACRM_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP7) & BM_AIPS_PACRM_WP7)
Kojto 90:cb3d968589d8 9461
Kojto 90:cb3d968589d8 9462 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 9463 #define BW_AIPS_PACRM_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP7) = (v))
Kojto 90:cb3d968589d8 9464 /*@}*/
Kojto 90:cb3d968589d8 9465
Kojto 90:cb3d968589d8 9466 /*!
Kojto 90:cb3d968589d8 9467 * @name Register AIPS_PACRM, field SP7[2] (RW)
Kojto 90:cb3d968589d8 9468 *
Kojto 90:cb3d968589d8 9469 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9470 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9471 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 9472 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 9473 * access initiates.
Kojto 90:cb3d968589d8 9474 *
Kojto 90:cb3d968589d8 9475 * Values:
Kojto 90:cb3d968589d8 9476 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9477 * accesses.
Kojto 90:cb3d968589d8 9478 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9479 */
Kojto 90:cb3d968589d8 9480 /*@{*/
Kojto 90:cb3d968589d8 9481 #define BP_AIPS_PACRM_SP7 (2U) /*!< Bit position for AIPS_PACRM_SP7. */
Kojto 90:cb3d968589d8 9482 #define BM_AIPS_PACRM_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRM_SP7. */
Kojto 90:cb3d968589d8 9483 #define BS_AIPS_PACRM_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP7. */
Kojto 90:cb3d968589d8 9484
Kojto 90:cb3d968589d8 9485 /*! @brief Read current value of the AIPS_PACRM_SP7 field. */
Kojto 90:cb3d968589d8 9486 #define BR_AIPS_PACRM_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP7))
Kojto 90:cb3d968589d8 9487
Kojto 90:cb3d968589d8 9488 /*! @brief Format value for bitfield AIPS_PACRM_SP7. */
Kojto 90:cb3d968589d8 9489 #define BF_AIPS_PACRM_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP7) & BM_AIPS_PACRM_SP7)
Kojto 90:cb3d968589d8 9490
Kojto 90:cb3d968589d8 9491 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 9492 #define BW_AIPS_PACRM_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP7) = (v))
Kojto 90:cb3d968589d8 9493 /*@}*/
Kojto 90:cb3d968589d8 9494
Kojto 90:cb3d968589d8 9495 /*!
Kojto 90:cb3d968589d8 9496 * @name Register AIPS_PACRM, field TP6[4] (RW)
Kojto 90:cb3d968589d8 9497 *
Kojto 90:cb3d968589d8 9498 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9499 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9500 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9501 *
Kojto 90:cb3d968589d8 9502 * Values:
Kojto 90:cb3d968589d8 9503 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9504 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9505 */
Kojto 90:cb3d968589d8 9506 /*@{*/
Kojto 90:cb3d968589d8 9507 #define BP_AIPS_PACRM_TP6 (4U) /*!< Bit position for AIPS_PACRM_TP6. */
Kojto 90:cb3d968589d8 9508 #define BM_AIPS_PACRM_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRM_TP6. */
Kojto 90:cb3d968589d8 9509 #define BS_AIPS_PACRM_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP6. */
Kojto 90:cb3d968589d8 9510
Kojto 90:cb3d968589d8 9511 /*! @brief Read current value of the AIPS_PACRM_TP6 field. */
Kojto 90:cb3d968589d8 9512 #define BR_AIPS_PACRM_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP6))
Kojto 90:cb3d968589d8 9513
Kojto 90:cb3d968589d8 9514 /*! @brief Format value for bitfield AIPS_PACRM_TP6. */
Kojto 90:cb3d968589d8 9515 #define BF_AIPS_PACRM_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP6) & BM_AIPS_PACRM_TP6)
Kojto 90:cb3d968589d8 9516
Kojto 90:cb3d968589d8 9517 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 9518 #define BW_AIPS_PACRM_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP6) = (v))
Kojto 90:cb3d968589d8 9519 /*@}*/
Kojto 90:cb3d968589d8 9520
Kojto 90:cb3d968589d8 9521 /*!
Kojto 90:cb3d968589d8 9522 * @name Register AIPS_PACRM, field WP6[5] (RW)
Kojto 90:cb3d968589d8 9523 *
Kojto 90:cb3d968589d8 9524 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 9525 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 9526 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 9527 *
Kojto 90:cb3d968589d8 9528 * Values:
Kojto 90:cb3d968589d8 9529 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9530 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9531 */
Kojto 90:cb3d968589d8 9532 /*@{*/
Kojto 90:cb3d968589d8 9533 #define BP_AIPS_PACRM_WP6 (5U) /*!< Bit position for AIPS_PACRM_WP6. */
Kojto 90:cb3d968589d8 9534 #define BM_AIPS_PACRM_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRM_WP6. */
Kojto 90:cb3d968589d8 9535 #define BS_AIPS_PACRM_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP6. */
Kojto 90:cb3d968589d8 9536
Kojto 90:cb3d968589d8 9537 /*! @brief Read current value of the AIPS_PACRM_WP6 field. */
Kojto 90:cb3d968589d8 9538 #define BR_AIPS_PACRM_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP6))
Kojto 90:cb3d968589d8 9539
Kojto 90:cb3d968589d8 9540 /*! @brief Format value for bitfield AIPS_PACRM_WP6. */
Kojto 90:cb3d968589d8 9541 #define BF_AIPS_PACRM_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP6) & BM_AIPS_PACRM_WP6)
Kojto 90:cb3d968589d8 9542
Kojto 90:cb3d968589d8 9543 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 9544 #define BW_AIPS_PACRM_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP6) = (v))
Kojto 90:cb3d968589d8 9545 /*@}*/
Kojto 90:cb3d968589d8 9546
Kojto 90:cb3d968589d8 9547 /*!
Kojto 90:cb3d968589d8 9548 * @name Register AIPS_PACRM, field SP6[6] (RW)
Kojto 90:cb3d968589d8 9549 *
Kojto 90:cb3d968589d8 9550 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9551 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9552 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 9553 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 9554 * access initiates.
Kojto 90:cb3d968589d8 9555 *
Kojto 90:cb3d968589d8 9556 * Values:
Kojto 90:cb3d968589d8 9557 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9558 * accesses.
Kojto 90:cb3d968589d8 9559 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9560 */
Kojto 90:cb3d968589d8 9561 /*@{*/
Kojto 90:cb3d968589d8 9562 #define BP_AIPS_PACRM_SP6 (6U) /*!< Bit position for AIPS_PACRM_SP6. */
Kojto 90:cb3d968589d8 9563 #define BM_AIPS_PACRM_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRM_SP6. */
Kojto 90:cb3d968589d8 9564 #define BS_AIPS_PACRM_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP6. */
Kojto 90:cb3d968589d8 9565
Kojto 90:cb3d968589d8 9566 /*! @brief Read current value of the AIPS_PACRM_SP6 field. */
Kojto 90:cb3d968589d8 9567 #define BR_AIPS_PACRM_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP6))
Kojto 90:cb3d968589d8 9568
Kojto 90:cb3d968589d8 9569 /*! @brief Format value for bitfield AIPS_PACRM_SP6. */
Kojto 90:cb3d968589d8 9570 #define BF_AIPS_PACRM_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP6) & BM_AIPS_PACRM_SP6)
Kojto 90:cb3d968589d8 9571
Kojto 90:cb3d968589d8 9572 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 9573 #define BW_AIPS_PACRM_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP6) = (v))
Kojto 90:cb3d968589d8 9574 /*@}*/
Kojto 90:cb3d968589d8 9575
Kojto 90:cb3d968589d8 9576 /*!
Kojto 90:cb3d968589d8 9577 * @name Register AIPS_PACRM, field TP5[8] (RW)
Kojto 90:cb3d968589d8 9578 *
Kojto 90:cb3d968589d8 9579 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9580 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9581 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9582 *
Kojto 90:cb3d968589d8 9583 * Values:
Kojto 90:cb3d968589d8 9584 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9585 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9586 */
Kojto 90:cb3d968589d8 9587 /*@{*/
Kojto 90:cb3d968589d8 9588 #define BP_AIPS_PACRM_TP5 (8U) /*!< Bit position for AIPS_PACRM_TP5. */
Kojto 90:cb3d968589d8 9589 #define BM_AIPS_PACRM_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRM_TP5. */
Kojto 90:cb3d968589d8 9590 #define BS_AIPS_PACRM_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP5. */
Kojto 90:cb3d968589d8 9591
Kojto 90:cb3d968589d8 9592 /*! @brief Read current value of the AIPS_PACRM_TP5 field. */
Kojto 90:cb3d968589d8 9593 #define BR_AIPS_PACRM_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP5))
Kojto 90:cb3d968589d8 9594
Kojto 90:cb3d968589d8 9595 /*! @brief Format value for bitfield AIPS_PACRM_TP5. */
Kojto 90:cb3d968589d8 9596 #define BF_AIPS_PACRM_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP5) & BM_AIPS_PACRM_TP5)
Kojto 90:cb3d968589d8 9597
Kojto 90:cb3d968589d8 9598 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 9599 #define BW_AIPS_PACRM_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP5) = (v))
Kojto 90:cb3d968589d8 9600 /*@}*/
Kojto 90:cb3d968589d8 9601
Kojto 90:cb3d968589d8 9602 /*!
Kojto 90:cb3d968589d8 9603 * @name Register AIPS_PACRM, field WP5[9] (RW)
Kojto 90:cb3d968589d8 9604 *
Kojto 90:cb3d968589d8 9605 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 9606 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 9607 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 9608 *
Kojto 90:cb3d968589d8 9609 * Values:
Kojto 90:cb3d968589d8 9610 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9611 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9612 */
Kojto 90:cb3d968589d8 9613 /*@{*/
Kojto 90:cb3d968589d8 9614 #define BP_AIPS_PACRM_WP5 (9U) /*!< Bit position for AIPS_PACRM_WP5. */
Kojto 90:cb3d968589d8 9615 #define BM_AIPS_PACRM_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRM_WP5. */
Kojto 90:cb3d968589d8 9616 #define BS_AIPS_PACRM_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP5. */
Kojto 90:cb3d968589d8 9617
Kojto 90:cb3d968589d8 9618 /*! @brief Read current value of the AIPS_PACRM_WP5 field. */
Kojto 90:cb3d968589d8 9619 #define BR_AIPS_PACRM_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP5))
Kojto 90:cb3d968589d8 9620
Kojto 90:cb3d968589d8 9621 /*! @brief Format value for bitfield AIPS_PACRM_WP5. */
Kojto 90:cb3d968589d8 9622 #define BF_AIPS_PACRM_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP5) & BM_AIPS_PACRM_WP5)
Kojto 90:cb3d968589d8 9623
Kojto 90:cb3d968589d8 9624 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 9625 #define BW_AIPS_PACRM_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP5) = (v))
Kojto 90:cb3d968589d8 9626 /*@}*/
Kojto 90:cb3d968589d8 9627
Kojto 90:cb3d968589d8 9628 /*!
Kojto 90:cb3d968589d8 9629 * @name Register AIPS_PACRM, field SP5[10] (RW)
Kojto 90:cb3d968589d8 9630 *
Kojto 90:cb3d968589d8 9631 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9632 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9633 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 9634 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 9635 * access initiates.
Kojto 90:cb3d968589d8 9636 *
Kojto 90:cb3d968589d8 9637 * Values:
Kojto 90:cb3d968589d8 9638 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9639 * accesses.
Kojto 90:cb3d968589d8 9640 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9641 */
Kojto 90:cb3d968589d8 9642 /*@{*/
Kojto 90:cb3d968589d8 9643 #define BP_AIPS_PACRM_SP5 (10U) /*!< Bit position for AIPS_PACRM_SP5. */
Kojto 90:cb3d968589d8 9644 #define BM_AIPS_PACRM_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRM_SP5. */
Kojto 90:cb3d968589d8 9645 #define BS_AIPS_PACRM_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP5. */
Kojto 90:cb3d968589d8 9646
Kojto 90:cb3d968589d8 9647 /*! @brief Read current value of the AIPS_PACRM_SP5 field. */
Kojto 90:cb3d968589d8 9648 #define BR_AIPS_PACRM_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP5))
Kojto 90:cb3d968589d8 9649
Kojto 90:cb3d968589d8 9650 /*! @brief Format value for bitfield AIPS_PACRM_SP5. */
Kojto 90:cb3d968589d8 9651 #define BF_AIPS_PACRM_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP5) & BM_AIPS_PACRM_SP5)
Kojto 90:cb3d968589d8 9652
Kojto 90:cb3d968589d8 9653 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 9654 #define BW_AIPS_PACRM_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP5) = (v))
Kojto 90:cb3d968589d8 9655 /*@}*/
Kojto 90:cb3d968589d8 9656
Kojto 90:cb3d968589d8 9657 /*!
Kojto 90:cb3d968589d8 9658 * @name Register AIPS_PACRM, field TP4[12] (RW)
Kojto 90:cb3d968589d8 9659 *
Kojto 90:cb3d968589d8 9660 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9661 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9662 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9663 *
Kojto 90:cb3d968589d8 9664 * Values:
Kojto 90:cb3d968589d8 9665 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9666 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9667 */
Kojto 90:cb3d968589d8 9668 /*@{*/
Kojto 90:cb3d968589d8 9669 #define BP_AIPS_PACRM_TP4 (12U) /*!< Bit position for AIPS_PACRM_TP4. */
Kojto 90:cb3d968589d8 9670 #define BM_AIPS_PACRM_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRM_TP4. */
Kojto 90:cb3d968589d8 9671 #define BS_AIPS_PACRM_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP4. */
Kojto 90:cb3d968589d8 9672
Kojto 90:cb3d968589d8 9673 /*! @brief Read current value of the AIPS_PACRM_TP4 field. */
Kojto 90:cb3d968589d8 9674 #define BR_AIPS_PACRM_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP4))
Kojto 90:cb3d968589d8 9675
Kojto 90:cb3d968589d8 9676 /*! @brief Format value for bitfield AIPS_PACRM_TP4. */
Kojto 90:cb3d968589d8 9677 #define BF_AIPS_PACRM_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP4) & BM_AIPS_PACRM_TP4)
Kojto 90:cb3d968589d8 9678
Kojto 90:cb3d968589d8 9679 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 9680 #define BW_AIPS_PACRM_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP4) = (v))
Kojto 90:cb3d968589d8 9681 /*@}*/
Kojto 90:cb3d968589d8 9682
Kojto 90:cb3d968589d8 9683 /*!
Kojto 90:cb3d968589d8 9684 * @name Register AIPS_PACRM, field WP4[13] (RW)
Kojto 90:cb3d968589d8 9685 *
Kojto 90:cb3d968589d8 9686 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 9687 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 9688 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 9689 *
Kojto 90:cb3d968589d8 9690 * Values:
Kojto 90:cb3d968589d8 9691 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9692 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9693 */
Kojto 90:cb3d968589d8 9694 /*@{*/
Kojto 90:cb3d968589d8 9695 #define BP_AIPS_PACRM_WP4 (13U) /*!< Bit position for AIPS_PACRM_WP4. */
Kojto 90:cb3d968589d8 9696 #define BM_AIPS_PACRM_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRM_WP4. */
Kojto 90:cb3d968589d8 9697 #define BS_AIPS_PACRM_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP4. */
Kojto 90:cb3d968589d8 9698
Kojto 90:cb3d968589d8 9699 /*! @brief Read current value of the AIPS_PACRM_WP4 field. */
Kojto 90:cb3d968589d8 9700 #define BR_AIPS_PACRM_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP4))
Kojto 90:cb3d968589d8 9701
Kojto 90:cb3d968589d8 9702 /*! @brief Format value for bitfield AIPS_PACRM_WP4. */
Kojto 90:cb3d968589d8 9703 #define BF_AIPS_PACRM_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP4) & BM_AIPS_PACRM_WP4)
Kojto 90:cb3d968589d8 9704
Kojto 90:cb3d968589d8 9705 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 9706 #define BW_AIPS_PACRM_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP4) = (v))
Kojto 90:cb3d968589d8 9707 /*@}*/
Kojto 90:cb3d968589d8 9708
Kojto 90:cb3d968589d8 9709 /*!
Kojto 90:cb3d968589d8 9710 * @name Register AIPS_PACRM, field SP4[14] (RW)
Kojto 90:cb3d968589d8 9711 *
Kojto 90:cb3d968589d8 9712 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9713 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9714 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 9715 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 9716 * initiates.
Kojto 90:cb3d968589d8 9717 *
Kojto 90:cb3d968589d8 9718 * Values:
Kojto 90:cb3d968589d8 9719 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9720 * accesses.
Kojto 90:cb3d968589d8 9721 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9722 */
Kojto 90:cb3d968589d8 9723 /*@{*/
Kojto 90:cb3d968589d8 9724 #define BP_AIPS_PACRM_SP4 (14U) /*!< Bit position for AIPS_PACRM_SP4. */
Kojto 90:cb3d968589d8 9725 #define BM_AIPS_PACRM_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRM_SP4. */
Kojto 90:cb3d968589d8 9726 #define BS_AIPS_PACRM_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP4. */
Kojto 90:cb3d968589d8 9727
Kojto 90:cb3d968589d8 9728 /*! @brief Read current value of the AIPS_PACRM_SP4 field. */
Kojto 90:cb3d968589d8 9729 #define BR_AIPS_PACRM_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP4))
Kojto 90:cb3d968589d8 9730
Kojto 90:cb3d968589d8 9731 /*! @brief Format value for bitfield AIPS_PACRM_SP4. */
Kojto 90:cb3d968589d8 9732 #define BF_AIPS_PACRM_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP4) & BM_AIPS_PACRM_SP4)
Kojto 90:cb3d968589d8 9733
Kojto 90:cb3d968589d8 9734 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 9735 #define BW_AIPS_PACRM_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP4) = (v))
Kojto 90:cb3d968589d8 9736 /*@}*/
Kojto 90:cb3d968589d8 9737
Kojto 90:cb3d968589d8 9738 /*!
Kojto 90:cb3d968589d8 9739 * @name Register AIPS_PACRM, field TP3[16] (RW)
Kojto 90:cb3d968589d8 9740 *
Kojto 90:cb3d968589d8 9741 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9742 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9743 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9744 *
Kojto 90:cb3d968589d8 9745 * Values:
Kojto 90:cb3d968589d8 9746 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9747 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9748 */
Kojto 90:cb3d968589d8 9749 /*@{*/
Kojto 90:cb3d968589d8 9750 #define BP_AIPS_PACRM_TP3 (16U) /*!< Bit position for AIPS_PACRM_TP3. */
Kojto 90:cb3d968589d8 9751 #define BM_AIPS_PACRM_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRM_TP3. */
Kojto 90:cb3d968589d8 9752 #define BS_AIPS_PACRM_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP3. */
Kojto 90:cb3d968589d8 9753
Kojto 90:cb3d968589d8 9754 /*! @brief Read current value of the AIPS_PACRM_TP3 field. */
Kojto 90:cb3d968589d8 9755 #define BR_AIPS_PACRM_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP3))
Kojto 90:cb3d968589d8 9756
Kojto 90:cb3d968589d8 9757 /*! @brief Format value for bitfield AIPS_PACRM_TP3. */
Kojto 90:cb3d968589d8 9758 #define BF_AIPS_PACRM_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP3) & BM_AIPS_PACRM_TP3)
Kojto 90:cb3d968589d8 9759
Kojto 90:cb3d968589d8 9760 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 9761 #define BW_AIPS_PACRM_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP3) = (v))
Kojto 90:cb3d968589d8 9762 /*@}*/
Kojto 90:cb3d968589d8 9763
Kojto 90:cb3d968589d8 9764 /*!
Kojto 90:cb3d968589d8 9765 * @name Register AIPS_PACRM, field WP3[17] (RW)
Kojto 90:cb3d968589d8 9766 *
Kojto 90:cb3d968589d8 9767 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 9768 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 9769 * no peripheral access initiates.
Kojto 90:cb3d968589d8 9770 *
Kojto 90:cb3d968589d8 9771 * Values:
Kojto 90:cb3d968589d8 9772 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9773 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9774 */
Kojto 90:cb3d968589d8 9775 /*@{*/
Kojto 90:cb3d968589d8 9776 #define BP_AIPS_PACRM_WP3 (17U) /*!< Bit position for AIPS_PACRM_WP3. */
Kojto 90:cb3d968589d8 9777 #define BM_AIPS_PACRM_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRM_WP3. */
Kojto 90:cb3d968589d8 9778 #define BS_AIPS_PACRM_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP3. */
Kojto 90:cb3d968589d8 9779
Kojto 90:cb3d968589d8 9780 /*! @brief Read current value of the AIPS_PACRM_WP3 field. */
Kojto 90:cb3d968589d8 9781 #define BR_AIPS_PACRM_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP3))
Kojto 90:cb3d968589d8 9782
Kojto 90:cb3d968589d8 9783 /*! @brief Format value for bitfield AIPS_PACRM_WP3. */
Kojto 90:cb3d968589d8 9784 #define BF_AIPS_PACRM_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP3) & BM_AIPS_PACRM_WP3)
Kojto 90:cb3d968589d8 9785
Kojto 90:cb3d968589d8 9786 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 9787 #define BW_AIPS_PACRM_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP3) = (v))
Kojto 90:cb3d968589d8 9788 /*@}*/
Kojto 90:cb3d968589d8 9789
Kojto 90:cb3d968589d8 9790 /*!
Kojto 90:cb3d968589d8 9791 * @name Register AIPS_PACRM, field SP3[18] (RW)
Kojto 90:cb3d968589d8 9792 *
Kojto 90:cb3d968589d8 9793 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9794 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9795 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 9796 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 9797 * access initiates.
Kojto 90:cb3d968589d8 9798 *
Kojto 90:cb3d968589d8 9799 * Values:
Kojto 90:cb3d968589d8 9800 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9801 * accesses.
Kojto 90:cb3d968589d8 9802 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9803 */
Kojto 90:cb3d968589d8 9804 /*@{*/
Kojto 90:cb3d968589d8 9805 #define BP_AIPS_PACRM_SP3 (18U) /*!< Bit position for AIPS_PACRM_SP3. */
Kojto 90:cb3d968589d8 9806 #define BM_AIPS_PACRM_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRM_SP3. */
Kojto 90:cb3d968589d8 9807 #define BS_AIPS_PACRM_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP3. */
Kojto 90:cb3d968589d8 9808
Kojto 90:cb3d968589d8 9809 /*! @brief Read current value of the AIPS_PACRM_SP3 field. */
Kojto 90:cb3d968589d8 9810 #define BR_AIPS_PACRM_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP3))
Kojto 90:cb3d968589d8 9811
Kojto 90:cb3d968589d8 9812 /*! @brief Format value for bitfield AIPS_PACRM_SP3. */
Kojto 90:cb3d968589d8 9813 #define BF_AIPS_PACRM_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP3) & BM_AIPS_PACRM_SP3)
Kojto 90:cb3d968589d8 9814
Kojto 90:cb3d968589d8 9815 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 9816 #define BW_AIPS_PACRM_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP3) = (v))
Kojto 90:cb3d968589d8 9817 /*@}*/
Kojto 90:cb3d968589d8 9818
Kojto 90:cb3d968589d8 9819 /*!
Kojto 90:cb3d968589d8 9820 * @name Register AIPS_PACRM, field TP2[20] (RW)
Kojto 90:cb3d968589d8 9821 *
Kojto 90:cb3d968589d8 9822 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9823 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9824 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9825 *
Kojto 90:cb3d968589d8 9826 * Values:
Kojto 90:cb3d968589d8 9827 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9828 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9829 */
Kojto 90:cb3d968589d8 9830 /*@{*/
Kojto 90:cb3d968589d8 9831 #define BP_AIPS_PACRM_TP2 (20U) /*!< Bit position for AIPS_PACRM_TP2. */
Kojto 90:cb3d968589d8 9832 #define BM_AIPS_PACRM_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRM_TP2. */
Kojto 90:cb3d968589d8 9833 #define BS_AIPS_PACRM_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP2. */
Kojto 90:cb3d968589d8 9834
Kojto 90:cb3d968589d8 9835 /*! @brief Read current value of the AIPS_PACRM_TP2 field. */
Kojto 90:cb3d968589d8 9836 #define BR_AIPS_PACRM_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP2))
Kojto 90:cb3d968589d8 9837
Kojto 90:cb3d968589d8 9838 /*! @brief Format value for bitfield AIPS_PACRM_TP2. */
Kojto 90:cb3d968589d8 9839 #define BF_AIPS_PACRM_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP2) & BM_AIPS_PACRM_TP2)
Kojto 90:cb3d968589d8 9840
Kojto 90:cb3d968589d8 9841 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 9842 #define BW_AIPS_PACRM_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP2) = (v))
Kojto 90:cb3d968589d8 9843 /*@}*/
Kojto 90:cb3d968589d8 9844
Kojto 90:cb3d968589d8 9845 /*!
Kojto 90:cb3d968589d8 9846 * @name Register AIPS_PACRM, field WP2[21] (RW)
Kojto 90:cb3d968589d8 9847 *
Kojto 90:cb3d968589d8 9848 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 9849 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 9850 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 9851 *
Kojto 90:cb3d968589d8 9852 * Values:
Kojto 90:cb3d968589d8 9853 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9854 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9855 */
Kojto 90:cb3d968589d8 9856 /*@{*/
Kojto 90:cb3d968589d8 9857 #define BP_AIPS_PACRM_WP2 (21U) /*!< Bit position for AIPS_PACRM_WP2. */
Kojto 90:cb3d968589d8 9858 #define BM_AIPS_PACRM_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRM_WP2. */
Kojto 90:cb3d968589d8 9859 #define BS_AIPS_PACRM_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP2. */
Kojto 90:cb3d968589d8 9860
Kojto 90:cb3d968589d8 9861 /*! @brief Read current value of the AIPS_PACRM_WP2 field. */
Kojto 90:cb3d968589d8 9862 #define BR_AIPS_PACRM_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP2))
Kojto 90:cb3d968589d8 9863
Kojto 90:cb3d968589d8 9864 /*! @brief Format value for bitfield AIPS_PACRM_WP2. */
Kojto 90:cb3d968589d8 9865 #define BF_AIPS_PACRM_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP2) & BM_AIPS_PACRM_WP2)
Kojto 90:cb3d968589d8 9866
Kojto 90:cb3d968589d8 9867 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 9868 #define BW_AIPS_PACRM_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP2) = (v))
Kojto 90:cb3d968589d8 9869 /*@}*/
Kojto 90:cb3d968589d8 9870
Kojto 90:cb3d968589d8 9871 /*!
Kojto 90:cb3d968589d8 9872 * @name Register AIPS_PACRM, field SP2[22] (RW)
Kojto 90:cb3d968589d8 9873 *
Kojto 90:cb3d968589d8 9874 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9875 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9876 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 9877 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 9878 * initiates.
Kojto 90:cb3d968589d8 9879 *
Kojto 90:cb3d968589d8 9880 * Values:
Kojto 90:cb3d968589d8 9881 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9882 * accesses.
Kojto 90:cb3d968589d8 9883 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9884 */
Kojto 90:cb3d968589d8 9885 /*@{*/
Kojto 90:cb3d968589d8 9886 #define BP_AIPS_PACRM_SP2 (22U) /*!< Bit position for AIPS_PACRM_SP2. */
Kojto 90:cb3d968589d8 9887 #define BM_AIPS_PACRM_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRM_SP2. */
Kojto 90:cb3d968589d8 9888 #define BS_AIPS_PACRM_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP2. */
Kojto 90:cb3d968589d8 9889
Kojto 90:cb3d968589d8 9890 /*! @brief Read current value of the AIPS_PACRM_SP2 field. */
Kojto 90:cb3d968589d8 9891 #define BR_AIPS_PACRM_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP2))
Kojto 90:cb3d968589d8 9892
Kojto 90:cb3d968589d8 9893 /*! @brief Format value for bitfield AIPS_PACRM_SP2. */
Kojto 90:cb3d968589d8 9894 #define BF_AIPS_PACRM_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP2) & BM_AIPS_PACRM_SP2)
Kojto 90:cb3d968589d8 9895
Kojto 90:cb3d968589d8 9896 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 9897 #define BW_AIPS_PACRM_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP2) = (v))
Kojto 90:cb3d968589d8 9898 /*@}*/
Kojto 90:cb3d968589d8 9899
Kojto 90:cb3d968589d8 9900 /*!
Kojto 90:cb3d968589d8 9901 * @name Register AIPS_PACRM, field TP1[24] (RW)
Kojto 90:cb3d968589d8 9902 *
Kojto 90:cb3d968589d8 9903 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9904 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9905 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9906 *
Kojto 90:cb3d968589d8 9907 * Values:
Kojto 90:cb3d968589d8 9908 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9909 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9910 */
Kojto 90:cb3d968589d8 9911 /*@{*/
Kojto 90:cb3d968589d8 9912 #define BP_AIPS_PACRM_TP1 (24U) /*!< Bit position for AIPS_PACRM_TP1. */
Kojto 90:cb3d968589d8 9913 #define BM_AIPS_PACRM_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRM_TP1. */
Kojto 90:cb3d968589d8 9914 #define BS_AIPS_PACRM_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP1. */
Kojto 90:cb3d968589d8 9915
Kojto 90:cb3d968589d8 9916 /*! @brief Read current value of the AIPS_PACRM_TP1 field. */
Kojto 90:cb3d968589d8 9917 #define BR_AIPS_PACRM_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP1))
Kojto 90:cb3d968589d8 9918
Kojto 90:cb3d968589d8 9919 /*! @brief Format value for bitfield AIPS_PACRM_TP1. */
Kojto 90:cb3d968589d8 9920 #define BF_AIPS_PACRM_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP1) & BM_AIPS_PACRM_TP1)
Kojto 90:cb3d968589d8 9921
Kojto 90:cb3d968589d8 9922 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 9923 #define BW_AIPS_PACRM_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP1) = (v))
Kojto 90:cb3d968589d8 9924 /*@}*/
Kojto 90:cb3d968589d8 9925
Kojto 90:cb3d968589d8 9926 /*!
Kojto 90:cb3d968589d8 9927 * @name Register AIPS_PACRM, field WP1[25] (RW)
Kojto 90:cb3d968589d8 9928 *
Kojto 90:cb3d968589d8 9929 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 9930 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 9931 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 9932 *
Kojto 90:cb3d968589d8 9933 * Values:
Kojto 90:cb3d968589d8 9934 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 9935 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 9936 */
Kojto 90:cb3d968589d8 9937 /*@{*/
Kojto 90:cb3d968589d8 9938 #define BP_AIPS_PACRM_WP1 (25U) /*!< Bit position for AIPS_PACRM_WP1. */
Kojto 90:cb3d968589d8 9939 #define BM_AIPS_PACRM_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRM_WP1. */
Kojto 90:cb3d968589d8 9940 #define BS_AIPS_PACRM_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP1. */
Kojto 90:cb3d968589d8 9941
Kojto 90:cb3d968589d8 9942 /*! @brief Read current value of the AIPS_PACRM_WP1 field. */
Kojto 90:cb3d968589d8 9943 #define BR_AIPS_PACRM_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP1))
Kojto 90:cb3d968589d8 9944
Kojto 90:cb3d968589d8 9945 /*! @brief Format value for bitfield AIPS_PACRM_WP1. */
Kojto 90:cb3d968589d8 9946 #define BF_AIPS_PACRM_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP1) & BM_AIPS_PACRM_WP1)
Kojto 90:cb3d968589d8 9947
Kojto 90:cb3d968589d8 9948 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 9949 #define BW_AIPS_PACRM_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP1) = (v))
Kojto 90:cb3d968589d8 9950 /*@}*/
Kojto 90:cb3d968589d8 9951
Kojto 90:cb3d968589d8 9952 /*!
Kojto 90:cb3d968589d8 9953 * @name Register AIPS_PACRM, field SP1[26] (RW)
Kojto 90:cb3d968589d8 9954 *
Kojto 90:cb3d968589d8 9955 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 9956 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 9957 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 9958 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 9959 * access initiates.
Kojto 90:cb3d968589d8 9960 *
Kojto 90:cb3d968589d8 9961 * Values:
Kojto 90:cb3d968589d8 9962 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 9963 * accesses.
Kojto 90:cb3d968589d8 9964 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 9965 */
Kojto 90:cb3d968589d8 9966 /*@{*/
Kojto 90:cb3d968589d8 9967 #define BP_AIPS_PACRM_SP1 (26U) /*!< Bit position for AIPS_PACRM_SP1. */
Kojto 90:cb3d968589d8 9968 #define BM_AIPS_PACRM_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRM_SP1. */
Kojto 90:cb3d968589d8 9969 #define BS_AIPS_PACRM_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP1. */
Kojto 90:cb3d968589d8 9970
Kojto 90:cb3d968589d8 9971 /*! @brief Read current value of the AIPS_PACRM_SP1 field. */
Kojto 90:cb3d968589d8 9972 #define BR_AIPS_PACRM_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP1))
Kojto 90:cb3d968589d8 9973
Kojto 90:cb3d968589d8 9974 /*! @brief Format value for bitfield AIPS_PACRM_SP1. */
Kojto 90:cb3d968589d8 9975 #define BF_AIPS_PACRM_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP1) & BM_AIPS_PACRM_SP1)
Kojto 90:cb3d968589d8 9976
Kojto 90:cb3d968589d8 9977 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 9978 #define BW_AIPS_PACRM_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP1) = (v))
Kojto 90:cb3d968589d8 9979 /*@}*/
Kojto 90:cb3d968589d8 9980
Kojto 90:cb3d968589d8 9981 /*!
Kojto 90:cb3d968589d8 9982 * @name Register AIPS_PACRM, field TP0[28] (RW)
Kojto 90:cb3d968589d8 9983 *
Kojto 90:cb3d968589d8 9984 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 9985 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 9986 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 9987 *
Kojto 90:cb3d968589d8 9988 * Values:
Kojto 90:cb3d968589d8 9989 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 9990 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 9991 */
Kojto 90:cb3d968589d8 9992 /*@{*/
Kojto 90:cb3d968589d8 9993 #define BP_AIPS_PACRM_TP0 (28U) /*!< Bit position for AIPS_PACRM_TP0. */
Kojto 90:cb3d968589d8 9994 #define BM_AIPS_PACRM_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRM_TP0. */
Kojto 90:cb3d968589d8 9995 #define BS_AIPS_PACRM_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRM_TP0. */
Kojto 90:cb3d968589d8 9996
Kojto 90:cb3d968589d8 9997 /*! @brief Read current value of the AIPS_PACRM_TP0 field. */
Kojto 90:cb3d968589d8 9998 #define BR_AIPS_PACRM_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP0))
Kojto 90:cb3d968589d8 9999
Kojto 90:cb3d968589d8 10000 /*! @brief Format value for bitfield AIPS_PACRM_TP0. */
Kojto 90:cb3d968589d8 10001 #define BF_AIPS_PACRM_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_TP0) & BM_AIPS_PACRM_TP0)
Kojto 90:cb3d968589d8 10002
Kojto 90:cb3d968589d8 10003 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 10004 #define BW_AIPS_PACRM_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP0) = (v))
Kojto 90:cb3d968589d8 10005 /*@}*/
Kojto 90:cb3d968589d8 10006
Kojto 90:cb3d968589d8 10007 /*!
Kojto 90:cb3d968589d8 10008 * @name Register AIPS_PACRM, field WP0[29] (RW)
Kojto 90:cb3d968589d8 10009 *
Kojto 90:cb3d968589d8 10010 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 10011 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 10012 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 10013 *
Kojto 90:cb3d968589d8 10014 * Values:
Kojto 90:cb3d968589d8 10015 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10016 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10017 */
Kojto 90:cb3d968589d8 10018 /*@{*/
Kojto 90:cb3d968589d8 10019 #define BP_AIPS_PACRM_WP0 (29U) /*!< Bit position for AIPS_PACRM_WP0. */
Kojto 90:cb3d968589d8 10020 #define BM_AIPS_PACRM_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRM_WP0. */
Kojto 90:cb3d968589d8 10021 #define BS_AIPS_PACRM_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRM_WP0. */
Kojto 90:cb3d968589d8 10022
Kojto 90:cb3d968589d8 10023 /*! @brief Read current value of the AIPS_PACRM_WP0 field. */
Kojto 90:cb3d968589d8 10024 #define BR_AIPS_PACRM_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP0))
Kojto 90:cb3d968589d8 10025
Kojto 90:cb3d968589d8 10026 /*! @brief Format value for bitfield AIPS_PACRM_WP0. */
Kojto 90:cb3d968589d8 10027 #define BF_AIPS_PACRM_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_WP0) & BM_AIPS_PACRM_WP0)
Kojto 90:cb3d968589d8 10028
Kojto 90:cb3d968589d8 10029 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 10030 #define BW_AIPS_PACRM_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP0) = (v))
Kojto 90:cb3d968589d8 10031 /*@}*/
Kojto 90:cb3d968589d8 10032
Kojto 90:cb3d968589d8 10033 /*!
Kojto 90:cb3d968589d8 10034 * @name Register AIPS_PACRM, field SP0[30] (RW)
Kojto 90:cb3d968589d8 10035 *
Kojto 90:cb3d968589d8 10036 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10037 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10038 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 10039 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 10040 * access initiates.
Kojto 90:cb3d968589d8 10041 *
Kojto 90:cb3d968589d8 10042 * Values:
Kojto 90:cb3d968589d8 10043 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10044 * accesses.
Kojto 90:cb3d968589d8 10045 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10046 */
Kojto 90:cb3d968589d8 10047 /*@{*/
Kojto 90:cb3d968589d8 10048 #define BP_AIPS_PACRM_SP0 (30U) /*!< Bit position for AIPS_PACRM_SP0. */
Kojto 90:cb3d968589d8 10049 #define BM_AIPS_PACRM_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRM_SP0. */
Kojto 90:cb3d968589d8 10050 #define BS_AIPS_PACRM_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRM_SP0. */
Kojto 90:cb3d968589d8 10051
Kojto 90:cb3d968589d8 10052 /*! @brief Read current value of the AIPS_PACRM_SP0 field. */
Kojto 90:cb3d968589d8 10053 #define BR_AIPS_PACRM_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP0))
Kojto 90:cb3d968589d8 10054
Kojto 90:cb3d968589d8 10055 /*! @brief Format value for bitfield AIPS_PACRM_SP0. */
Kojto 90:cb3d968589d8 10056 #define BF_AIPS_PACRM_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRM_SP0) & BM_AIPS_PACRM_SP0)
Kojto 90:cb3d968589d8 10057
Kojto 90:cb3d968589d8 10058 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 10059 #define BW_AIPS_PACRM_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP0) = (v))
Kojto 90:cb3d968589d8 10060 /*@}*/
Kojto 90:cb3d968589d8 10061
Kojto 90:cb3d968589d8 10062 /*******************************************************************************
Kojto 90:cb3d968589d8 10063 * HW_AIPS_PACRN - Peripheral Access Control Register
Kojto 90:cb3d968589d8 10064 ******************************************************************************/
Kojto 90:cb3d968589d8 10065
Kojto 90:cb3d968589d8 10066 /*!
Kojto 90:cb3d968589d8 10067 * @brief HW_AIPS_PACRN - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 10068 *
Kojto 90:cb3d968589d8 10069 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 10070 *
Kojto 90:cb3d968589d8 10071 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 10072 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 10073 * registers.
Kojto 90:cb3d968589d8 10074 */
Kojto 90:cb3d968589d8 10075 typedef union _hw_aips_pacrn
Kojto 90:cb3d968589d8 10076 {
Kojto 90:cb3d968589d8 10077 uint32_t U;
Kojto 90:cb3d968589d8 10078 struct _hw_aips_pacrn_bitfields
Kojto 90:cb3d968589d8 10079 {
Kojto 90:cb3d968589d8 10080 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 10081 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 10082 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 10083 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 10084 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 10085 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 10086 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 10087 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 10088 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 10089 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 10090 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 10091 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 10092 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 10093 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 10094 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 10095 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 10096 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 10097 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 10098 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 10099 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 10100 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 10101 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 10102 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 10103 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 10104 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 10105 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 10106 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 10107 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 10108 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 10109 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 10110 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 10111 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 10112 } B;
Kojto 90:cb3d968589d8 10113 } hw_aips_pacrn_t;
Kojto 90:cb3d968589d8 10114
Kojto 90:cb3d968589d8 10115 /*!
Kojto 90:cb3d968589d8 10116 * @name Constants and macros for entire AIPS_PACRN register
Kojto 90:cb3d968589d8 10117 */
Kojto 90:cb3d968589d8 10118 /*@{*/
Kojto 90:cb3d968589d8 10119 #define HW_AIPS_PACRN_ADDR(x) ((x) + 0x64U)
Kojto 90:cb3d968589d8 10120
Kojto 90:cb3d968589d8 10121 #define HW_AIPS_PACRN(x) (*(__IO hw_aips_pacrn_t *) HW_AIPS_PACRN_ADDR(x))
Kojto 90:cb3d968589d8 10122 #define HW_AIPS_PACRN_RD(x) (HW_AIPS_PACRN(x).U)
Kojto 90:cb3d968589d8 10123 #define HW_AIPS_PACRN_WR(x, v) (HW_AIPS_PACRN(x).U = (v))
Kojto 90:cb3d968589d8 10124 #define HW_AIPS_PACRN_SET(x, v) (HW_AIPS_PACRN_WR(x, HW_AIPS_PACRN_RD(x) | (v)))
Kojto 90:cb3d968589d8 10125 #define HW_AIPS_PACRN_CLR(x, v) (HW_AIPS_PACRN_WR(x, HW_AIPS_PACRN_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 10126 #define HW_AIPS_PACRN_TOG(x, v) (HW_AIPS_PACRN_WR(x, HW_AIPS_PACRN_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 10127 /*@}*/
Kojto 90:cb3d968589d8 10128
Kojto 90:cb3d968589d8 10129 /*
Kojto 90:cb3d968589d8 10130 * Constants & macros for individual AIPS_PACRN bitfields
Kojto 90:cb3d968589d8 10131 */
Kojto 90:cb3d968589d8 10132
Kojto 90:cb3d968589d8 10133 /*!
Kojto 90:cb3d968589d8 10134 * @name Register AIPS_PACRN, field TP7[0] (RW)
Kojto 90:cb3d968589d8 10135 *
Kojto 90:cb3d968589d8 10136 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 10137 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 10138 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 10139 *
Kojto 90:cb3d968589d8 10140 * Values:
Kojto 90:cb3d968589d8 10141 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 10142 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 10143 */
Kojto 90:cb3d968589d8 10144 /*@{*/
Kojto 90:cb3d968589d8 10145 #define BP_AIPS_PACRN_TP7 (0U) /*!< Bit position for AIPS_PACRN_TP7. */
Kojto 90:cb3d968589d8 10146 #define BM_AIPS_PACRN_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRN_TP7. */
Kojto 90:cb3d968589d8 10147 #define BS_AIPS_PACRN_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP7. */
Kojto 90:cb3d968589d8 10148
Kojto 90:cb3d968589d8 10149 /*! @brief Read current value of the AIPS_PACRN_TP7 field. */
Kojto 90:cb3d968589d8 10150 #define BR_AIPS_PACRN_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP7))
Kojto 90:cb3d968589d8 10151
Kojto 90:cb3d968589d8 10152 /*! @brief Format value for bitfield AIPS_PACRN_TP7. */
Kojto 90:cb3d968589d8 10153 #define BF_AIPS_PACRN_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP7) & BM_AIPS_PACRN_TP7)
Kojto 90:cb3d968589d8 10154
Kojto 90:cb3d968589d8 10155 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 10156 #define BW_AIPS_PACRN_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP7) = (v))
Kojto 90:cb3d968589d8 10157 /*@}*/
Kojto 90:cb3d968589d8 10158
Kojto 90:cb3d968589d8 10159 /*!
Kojto 90:cb3d968589d8 10160 * @name Register AIPS_PACRN, field WP7[1] (RW)
Kojto 90:cb3d968589d8 10161 *
Kojto 90:cb3d968589d8 10162 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 10163 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 10164 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 10165 *
Kojto 90:cb3d968589d8 10166 * Values:
Kojto 90:cb3d968589d8 10167 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10168 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10169 */
Kojto 90:cb3d968589d8 10170 /*@{*/
Kojto 90:cb3d968589d8 10171 #define BP_AIPS_PACRN_WP7 (1U) /*!< Bit position for AIPS_PACRN_WP7. */
Kojto 90:cb3d968589d8 10172 #define BM_AIPS_PACRN_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRN_WP7. */
Kojto 90:cb3d968589d8 10173 #define BS_AIPS_PACRN_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP7. */
Kojto 90:cb3d968589d8 10174
Kojto 90:cb3d968589d8 10175 /*! @brief Read current value of the AIPS_PACRN_WP7 field. */
Kojto 90:cb3d968589d8 10176 #define BR_AIPS_PACRN_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP7))
Kojto 90:cb3d968589d8 10177
Kojto 90:cb3d968589d8 10178 /*! @brief Format value for bitfield AIPS_PACRN_WP7. */
Kojto 90:cb3d968589d8 10179 #define BF_AIPS_PACRN_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP7) & BM_AIPS_PACRN_WP7)
Kojto 90:cb3d968589d8 10180
Kojto 90:cb3d968589d8 10181 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 10182 #define BW_AIPS_PACRN_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP7) = (v))
Kojto 90:cb3d968589d8 10183 /*@}*/
Kojto 90:cb3d968589d8 10184
Kojto 90:cb3d968589d8 10185 /*!
Kojto 90:cb3d968589d8 10186 * @name Register AIPS_PACRN, field SP7[2] (RW)
Kojto 90:cb3d968589d8 10187 *
Kojto 90:cb3d968589d8 10188 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10189 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10190 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 10191 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 10192 * access initiates.
Kojto 90:cb3d968589d8 10193 *
Kojto 90:cb3d968589d8 10194 * Values:
Kojto 90:cb3d968589d8 10195 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10196 * accesses.
Kojto 90:cb3d968589d8 10197 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10198 */
Kojto 90:cb3d968589d8 10199 /*@{*/
Kojto 90:cb3d968589d8 10200 #define BP_AIPS_PACRN_SP7 (2U) /*!< Bit position for AIPS_PACRN_SP7. */
Kojto 90:cb3d968589d8 10201 #define BM_AIPS_PACRN_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRN_SP7. */
Kojto 90:cb3d968589d8 10202 #define BS_AIPS_PACRN_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP7. */
Kojto 90:cb3d968589d8 10203
Kojto 90:cb3d968589d8 10204 /*! @brief Read current value of the AIPS_PACRN_SP7 field. */
Kojto 90:cb3d968589d8 10205 #define BR_AIPS_PACRN_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP7))
Kojto 90:cb3d968589d8 10206
Kojto 90:cb3d968589d8 10207 /*! @brief Format value for bitfield AIPS_PACRN_SP7. */
Kojto 90:cb3d968589d8 10208 #define BF_AIPS_PACRN_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP7) & BM_AIPS_PACRN_SP7)
Kojto 90:cb3d968589d8 10209
Kojto 90:cb3d968589d8 10210 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 10211 #define BW_AIPS_PACRN_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP7) = (v))
Kojto 90:cb3d968589d8 10212 /*@}*/
Kojto 90:cb3d968589d8 10213
Kojto 90:cb3d968589d8 10214 /*!
Kojto 90:cb3d968589d8 10215 * @name Register AIPS_PACRN, field TP6[4] (RW)
Kojto 90:cb3d968589d8 10216 *
Kojto 90:cb3d968589d8 10217 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 10218 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 10219 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 10220 *
Kojto 90:cb3d968589d8 10221 * Values:
Kojto 90:cb3d968589d8 10222 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 10223 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 10224 */
Kojto 90:cb3d968589d8 10225 /*@{*/
Kojto 90:cb3d968589d8 10226 #define BP_AIPS_PACRN_TP6 (4U) /*!< Bit position for AIPS_PACRN_TP6. */
Kojto 90:cb3d968589d8 10227 #define BM_AIPS_PACRN_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRN_TP6. */
Kojto 90:cb3d968589d8 10228 #define BS_AIPS_PACRN_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP6. */
Kojto 90:cb3d968589d8 10229
Kojto 90:cb3d968589d8 10230 /*! @brief Read current value of the AIPS_PACRN_TP6 field. */
Kojto 90:cb3d968589d8 10231 #define BR_AIPS_PACRN_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP6))
Kojto 90:cb3d968589d8 10232
Kojto 90:cb3d968589d8 10233 /*! @brief Format value for bitfield AIPS_PACRN_TP6. */
Kojto 90:cb3d968589d8 10234 #define BF_AIPS_PACRN_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP6) & BM_AIPS_PACRN_TP6)
Kojto 90:cb3d968589d8 10235
Kojto 90:cb3d968589d8 10236 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 10237 #define BW_AIPS_PACRN_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP6) = (v))
Kojto 90:cb3d968589d8 10238 /*@}*/
Kojto 90:cb3d968589d8 10239
Kojto 90:cb3d968589d8 10240 /*!
Kojto 90:cb3d968589d8 10241 * @name Register AIPS_PACRN, field WP6[5] (RW)
Kojto 90:cb3d968589d8 10242 *
Kojto 90:cb3d968589d8 10243 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 10244 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 10245 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 10246 *
Kojto 90:cb3d968589d8 10247 * Values:
Kojto 90:cb3d968589d8 10248 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10249 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10250 */
Kojto 90:cb3d968589d8 10251 /*@{*/
Kojto 90:cb3d968589d8 10252 #define BP_AIPS_PACRN_WP6 (5U) /*!< Bit position for AIPS_PACRN_WP6. */
Kojto 90:cb3d968589d8 10253 #define BM_AIPS_PACRN_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRN_WP6. */
Kojto 90:cb3d968589d8 10254 #define BS_AIPS_PACRN_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP6. */
Kojto 90:cb3d968589d8 10255
Kojto 90:cb3d968589d8 10256 /*! @brief Read current value of the AIPS_PACRN_WP6 field. */
Kojto 90:cb3d968589d8 10257 #define BR_AIPS_PACRN_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP6))
Kojto 90:cb3d968589d8 10258
Kojto 90:cb3d968589d8 10259 /*! @brief Format value for bitfield AIPS_PACRN_WP6. */
Kojto 90:cb3d968589d8 10260 #define BF_AIPS_PACRN_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP6) & BM_AIPS_PACRN_WP6)
Kojto 90:cb3d968589d8 10261
Kojto 90:cb3d968589d8 10262 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 10263 #define BW_AIPS_PACRN_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP6) = (v))
Kojto 90:cb3d968589d8 10264 /*@}*/
Kojto 90:cb3d968589d8 10265
Kojto 90:cb3d968589d8 10266 /*!
Kojto 90:cb3d968589d8 10267 * @name Register AIPS_PACRN, field SP6[6] (RW)
Kojto 90:cb3d968589d8 10268 *
Kojto 90:cb3d968589d8 10269 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10270 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10271 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 10272 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 10273 * access initiates.
Kojto 90:cb3d968589d8 10274 *
Kojto 90:cb3d968589d8 10275 * Values:
Kojto 90:cb3d968589d8 10276 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10277 * accesses.
Kojto 90:cb3d968589d8 10278 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10279 */
Kojto 90:cb3d968589d8 10280 /*@{*/
Kojto 90:cb3d968589d8 10281 #define BP_AIPS_PACRN_SP6 (6U) /*!< Bit position for AIPS_PACRN_SP6. */
Kojto 90:cb3d968589d8 10282 #define BM_AIPS_PACRN_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRN_SP6. */
Kojto 90:cb3d968589d8 10283 #define BS_AIPS_PACRN_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP6. */
Kojto 90:cb3d968589d8 10284
Kojto 90:cb3d968589d8 10285 /*! @brief Read current value of the AIPS_PACRN_SP6 field. */
Kojto 90:cb3d968589d8 10286 #define BR_AIPS_PACRN_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP6))
Kojto 90:cb3d968589d8 10287
Kojto 90:cb3d968589d8 10288 /*! @brief Format value for bitfield AIPS_PACRN_SP6. */
Kojto 90:cb3d968589d8 10289 #define BF_AIPS_PACRN_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP6) & BM_AIPS_PACRN_SP6)
Kojto 90:cb3d968589d8 10290
Kojto 90:cb3d968589d8 10291 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 10292 #define BW_AIPS_PACRN_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP6) = (v))
Kojto 90:cb3d968589d8 10293 /*@}*/
Kojto 90:cb3d968589d8 10294
Kojto 90:cb3d968589d8 10295 /*!
Kojto 90:cb3d968589d8 10296 * @name Register AIPS_PACRN, field TP5[8] (RW)
Kojto 90:cb3d968589d8 10297 *
Kojto 90:cb3d968589d8 10298 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 10299 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 10300 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 10301 *
Kojto 90:cb3d968589d8 10302 * Values:
Kojto 90:cb3d968589d8 10303 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 10304 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 10305 */
Kojto 90:cb3d968589d8 10306 /*@{*/
Kojto 90:cb3d968589d8 10307 #define BP_AIPS_PACRN_TP5 (8U) /*!< Bit position for AIPS_PACRN_TP5. */
Kojto 90:cb3d968589d8 10308 #define BM_AIPS_PACRN_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRN_TP5. */
Kojto 90:cb3d968589d8 10309 #define BS_AIPS_PACRN_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP5. */
Kojto 90:cb3d968589d8 10310
Kojto 90:cb3d968589d8 10311 /*! @brief Read current value of the AIPS_PACRN_TP5 field. */
Kojto 90:cb3d968589d8 10312 #define BR_AIPS_PACRN_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP5))
Kojto 90:cb3d968589d8 10313
Kojto 90:cb3d968589d8 10314 /*! @brief Format value for bitfield AIPS_PACRN_TP5. */
Kojto 90:cb3d968589d8 10315 #define BF_AIPS_PACRN_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP5) & BM_AIPS_PACRN_TP5)
Kojto 90:cb3d968589d8 10316
Kojto 90:cb3d968589d8 10317 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 10318 #define BW_AIPS_PACRN_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP5) = (v))
Kojto 90:cb3d968589d8 10319 /*@}*/
Kojto 90:cb3d968589d8 10320
Kojto 90:cb3d968589d8 10321 /*!
Kojto 90:cb3d968589d8 10322 * @name Register AIPS_PACRN, field WP5[9] (RW)
Kojto 90:cb3d968589d8 10323 *
Kojto 90:cb3d968589d8 10324 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 10325 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 10326 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 10327 *
Kojto 90:cb3d968589d8 10328 * Values:
Kojto 90:cb3d968589d8 10329 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10330 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10331 */
Kojto 90:cb3d968589d8 10332 /*@{*/
Kojto 90:cb3d968589d8 10333 #define BP_AIPS_PACRN_WP5 (9U) /*!< Bit position for AIPS_PACRN_WP5. */
Kojto 90:cb3d968589d8 10334 #define BM_AIPS_PACRN_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRN_WP5. */
Kojto 90:cb3d968589d8 10335 #define BS_AIPS_PACRN_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP5. */
Kojto 90:cb3d968589d8 10336
Kojto 90:cb3d968589d8 10337 /*! @brief Read current value of the AIPS_PACRN_WP5 field. */
Kojto 90:cb3d968589d8 10338 #define BR_AIPS_PACRN_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP5))
Kojto 90:cb3d968589d8 10339
Kojto 90:cb3d968589d8 10340 /*! @brief Format value for bitfield AIPS_PACRN_WP5. */
Kojto 90:cb3d968589d8 10341 #define BF_AIPS_PACRN_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP5) & BM_AIPS_PACRN_WP5)
Kojto 90:cb3d968589d8 10342
Kojto 90:cb3d968589d8 10343 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 10344 #define BW_AIPS_PACRN_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP5) = (v))
Kojto 90:cb3d968589d8 10345 /*@}*/
Kojto 90:cb3d968589d8 10346
Kojto 90:cb3d968589d8 10347 /*!
Kojto 90:cb3d968589d8 10348 * @name Register AIPS_PACRN, field SP5[10] (RW)
Kojto 90:cb3d968589d8 10349 *
Kojto 90:cb3d968589d8 10350 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10351 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10352 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 10353 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 10354 * access initiates.
Kojto 90:cb3d968589d8 10355 *
Kojto 90:cb3d968589d8 10356 * Values:
Kojto 90:cb3d968589d8 10357 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10358 * accesses.
Kojto 90:cb3d968589d8 10359 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10360 */
Kojto 90:cb3d968589d8 10361 /*@{*/
Kojto 90:cb3d968589d8 10362 #define BP_AIPS_PACRN_SP5 (10U) /*!< Bit position for AIPS_PACRN_SP5. */
Kojto 90:cb3d968589d8 10363 #define BM_AIPS_PACRN_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRN_SP5. */
Kojto 90:cb3d968589d8 10364 #define BS_AIPS_PACRN_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP5. */
Kojto 90:cb3d968589d8 10365
Kojto 90:cb3d968589d8 10366 /*! @brief Read current value of the AIPS_PACRN_SP5 field. */
Kojto 90:cb3d968589d8 10367 #define BR_AIPS_PACRN_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP5))
Kojto 90:cb3d968589d8 10368
Kojto 90:cb3d968589d8 10369 /*! @brief Format value for bitfield AIPS_PACRN_SP5. */
Kojto 90:cb3d968589d8 10370 #define BF_AIPS_PACRN_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP5) & BM_AIPS_PACRN_SP5)
Kojto 90:cb3d968589d8 10371
Kojto 90:cb3d968589d8 10372 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 10373 #define BW_AIPS_PACRN_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP5) = (v))
Kojto 90:cb3d968589d8 10374 /*@}*/
Kojto 90:cb3d968589d8 10375
Kojto 90:cb3d968589d8 10376 /*!
Kojto 90:cb3d968589d8 10377 * @name Register AIPS_PACRN, field TP4[12] (RW)
Kojto 90:cb3d968589d8 10378 *
Kojto 90:cb3d968589d8 10379 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 10380 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 10381 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 10382 *
Kojto 90:cb3d968589d8 10383 * Values:
Kojto 90:cb3d968589d8 10384 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 10385 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 10386 */
Kojto 90:cb3d968589d8 10387 /*@{*/
Kojto 90:cb3d968589d8 10388 #define BP_AIPS_PACRN_TP4 (12U) /*!< Bit position for AIPS_PACRN_TP4. */
Kojto 90:cb3d968589d8 10389 #define BM_AIPS_PACRN_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRN_TP4. */
Kojto 90:cb3d968589d8 10390 #define BS_AIPS_PACRN_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP4. */
Kojto 90:cb3d968589d8 10391
Kojto 90:cb3d968589d8 10392 /*! @brief Read current value of the AIPS_PACRN_TP4 field. */
Kojto 90:cb3d968589d8 10393 #define BR_AIPS_PACRN_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP4))
Kojto 90:cb3d968589d8 10394
Kojto 90:cb3d968589d8 10395 /*! @brief Format value for bitfield AIPS_PACRN_TP4. */
Kojto 90:cb3d968589d8 10396 #define BF_AIPS_PACRN_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP4) & BM_AIPS_PACRN_TP4)
Kojto 90:cb3d968589d8 10397
Kojto 90:cb3d968589d8 10398 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 10399 #define BW_AIPS_PACRN_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP4) = (v))
Kojto 90:cb3d968589d8 10400 /*@}*/
Kojto 90:cb3d968589d8 10401
Kojto 90:cb3d968589d8 10402 /*!
Kojto 90:cb3d968589d8 10403 * @name Register AIPS_PACRN, field WP4[13] (RW)
Kojto 90:cb3d968589d8 10404 *
Kojto 90:cb3d968589d8 10405 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 10406 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 10407 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 10408 *
Kojto 90:cb3d968589d8 10409 * Values:
Kojto 90:cb3d968589d8 10410 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10411 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10412 */
Kojto 90:cb3d968589d8 10413 /*@{*/
Kojto 90:cb3d968589d8 10414 #define BP_AIPS_PACRN_WP4 (13U) /*!< Bit position for AIPS_PACRN_WP4. */
Kojto 90:cb3d968589d8 10415 #define BM_AIPS_PACRN_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRN_WP4. */
Kojto 90:cb3d968589d8 10416 #define BS_AIPS_PACRN_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP4. */
Kojto 90:cb3d968589d8 10417
Kojto 90:cb3d968589d8 10418 /*! @brief Read current value of the AIPS_PACRN_WP4 field. */
Kojto 90:cb3d968589d8 10419 #define BR_AIPS_PACRN_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP4))
Kojto 90:cb3d968589d8 10420
Kojto 90:cb3d968589d8 10421 /*! @brief Format value for bitfield AIPS_PACRN_WP4. */
Kojto 90:cb3d968589d8 10422 #define BF_AIPS_PACRN_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP4) & BM_AIPS_PACRN_WP4)
Kojto 90:cb3d968589d8 10423
Kojto 90:cb3d968589d8 10424 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 10425 #define BW_AIPS_PACRN_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP4) = (v))
Kojto 90:cb3d968589d8 10426 /*@}*/
Kojto 90:cb3d968589d8 10427
Kojto 90:cb3d968589d8 10428 /*!
Kojto 90:cb3d968589d8 10429 * @name Register AIPS_PACRN, field SP4[14] (RW)
Kojto 90:cb3d968589d8 10430 *
Kojto 90:cb3d968589d8 10431 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10432 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10433 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 10434 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 10435 * initiates.
Kojto 90:cb3d968589d8 10436 *
Kojto 90:cb3d968589d8 10437 * Values:
Kojto 90:cb3d968589d8 10438 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10439 * accesses.
Kojto 90:cb3d968589d8 10440 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10441 */
Kojto 90:cb3d968589d8 10442 /*@{*/
Kojto 90:cb3d968589d8 10443 #define BP_AIPS_PACRN_SP4 (14U) /*!< Bit position for AIPS_PACRN_SP4. */
Kojto 90:cb3d968589d8 10444 #define BM_AIPS_PACRN_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRN_SP4. */
Kojto 90:cb3d968589d8 10445 #define BS_AIPS_PACRN_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP4. */
Kojto 90:cb3d968589d8 10446
Kojto 90:cb3d968589d8 10447 /*! @brief Read current value of the AIPS_PACRN_SP4 field. */
Kojto 90:cb3d968589d8 10448 #define BR_AIPS_PACRN_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP4))
Kojto 90:cb3d968589d8 10449
Kojto 90:cb3d968589d8 10450 /*! @brief Format value for bitfield AIPS_PACRN_SP4. */
Kojto 90:cb3d968589d8 10451 #define BF_AIPS_PACRN_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP4) & BM_AIPS_PACRN_SP4)
Kojto 90:cb3d968589d8 10452
Kojto 90:cb3d968589d8 10453 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 10454 #define BW_AIPS_PACRN_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP4) = (v))
Kojto 90:cb3d968589d8 10455 /*@}*/
Kojto 90:cb3d968589d8 10456
Kojto 90:cb3d968589d8 10457 /*!
Kojto 90:cb3d968589d8 10458 * @name Register AIPS_PACRN, field TP3[16] (RW)
Kojto 90:cb3d968589d8 10459 *
Kojto 90:cb3d968589d8 10460 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 10461 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 10462 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 10463 *
Kojto 90:cb3d968589d8 10464 * Values:
Kojto 90:cb3d968589d8 10465 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 10466 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 10467 */
Kojto 90:cb3d968589d8 10468 /*@{*/
Kojto 90:cb3d968589d8 10469 #define BP_AIPS_PACRN_TP3 (16U) /*!< Bit position for AIPS_PACRN_TP3. */
Kojto 90:cb3d968589d8 10470 #define BM_AIPS_PACRN_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRN_TP3. */
Kojto 90:cb3d968589d8 10471 #define BS_AIPS_PACRN_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP3. */
Kojto 90:cb3d968589d8 10472
Kojto 90:cb3d968589d8 10473 /*! @brief Read current value of the AIPS_PACRN_TP3 field. */
Kojto 90:cb3d968589d8 10474 #define BR_AIPS_PACRN_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP3))
Kojto 90:cb3d968589d8 10475
Kojto 90:cb3d968589d8 10476 /*! @brief Format value for bitfield AIPS_PACRN_TP3. */
Kojto 90:cb3d968589d8 10477 #define BF_AIPS_PACRN_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP3) & BM_AIPS_PACRN_TP3)
Kojto 90:cb3d968589d8 10478
Kojto 90:cb3d968589d8 10479 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 10480 #define BW_AIPS_PACRN_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP3) = (v))
Kojto 90:cb3d968589d8 10481 /*@}*/
Kojto 90:cb3d968589d8 10482
Kojto 90:cb3d968589d8 10483 /*!
Kojto 90:cb3d968589d8 10484 * @name Register AIPS_PACRN, field WP3[17] (RW)
Kojto 90:cb3d968589d8 10485 *
Kojto 90:cb3d968589d8 10486 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 10487 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 10488 * no peripheral access initiates.
Kojto 90:cb3d968589d8 10489 *
Kojto 90:cb3d968589d8 10490 * Values:
Kojto 90:cb3d968589d8 10491 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10492 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10493 */
Kojto 90:cb3d968589d8 10494 /*@{*/
Kojto 90:cb3d968589d8 10495 #define BP_AIPS_PACRN_WP3 (17U) /*!< Bit position for AIPS_PACRN_WP3. */
Kojto 90:cb3d968589d8 10496 #define BM_AIPS_PACRN_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRN_WP3. */
Kojto 90:cb3d968589d8 10497 #define BS_AIPS_PACRN_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP3. */
Kojto 90:cb3d968589d8 10498
Kojto 90:cb3d968589d8 10499 /*! @brief Read current value of the AIPS_PACRN_WP3 field. */
Kojto 90:cb3d968589d8 10500 #define BR_AIPS_PACRN_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP3))
Kojto 90:cb3d968589d8 10501
Kojto 90:cb3d968589d8 10502 /*! @brief Format value for bitfield AIPS_PACRN_WP3. */
Kojto 90:cb3d968589d8 10503 #define BF_AIPS_PACRN_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP3) & BM_AIPS_PACRN_WP3)
Kojto 90:cb3d968589d8 10504
Kojto 90:cb3d968589d8 10505 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 10506 #define BW_AIPS_PACRN_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP3) = (v))
Kojto 90:cb3d968589d8 10507 /*@}*/
Kojto 90:cb3d968589d8 10508
Kojto 90:cb3d968589d8 10509 /*!
Kojto 90:cb3d968589d8 10510 * @name Register AIPS_PACRN, field SP3[18] (RW)
Kojto 90:cb3d968589d8 10511 *
Kojto 90:cb3d968589d8 10512 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10513 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10514 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 10515 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 10516 * access initiates.
Kojto 90:cb3d968589d8 10517 *
Kojto 90:cb3d968589d8 10518 * Values:
Kojto 90:cb3d968589d8 10519 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10520 * accesses.
Kojto 90:cb3d968589d8 10521 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10522 */
Kojto 90:cb3d968589d8 10523 /*@{*/
Kojto 90:cb3d968589d8 10524 #define BP_AIPS_PACRN_SP3 (18U) /*!< Bit position for AIPS_PACRN_SP3. */
Kojto 90:cb3d968589d8 10525 #define BM_AIPS_PACRN_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRN_SP3. */
Kojto 90:cb3d968589d8 10526 #define BS_AIPS_PACRN_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP3. */
Kojto 90:cb3d968589d8 10527
Kojto 90:cb3d968589d8 10528 /*! @brief Read current value of the AIPS_PACRN_SP3 field. */
Kojto 90:cb3d968589d8 10529 #define BR_AIPS_PACRN_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP3))
Kojto 90:cb3d968589d8 10530
Kojto 90:cb3d968589d8 10531 /*! @brief Format value for bitfield AIPS_PACRN_SP3. */
Kojto 90:cb3d968589d8 10532 #define BF_AIPS_PACRN_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP3) & BM_AIPS_PACRN_SP3)
Kojto 90:cb3d968589d8 10533
Kojto 90:cb3d968589d8 10534 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 10535 #define BW_AIPS_PACRN_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP3) = (v))
Kojto 90:cb3d968589d8 10536 /*@}*/
Kojto 90:cb3d968589d8 10537
Kojto 90:cb3d968589d8 10538 /*!
Kojto 90:cb3d968589d8 10539 * @name Register AIPS_PACRN, field TP2[20] (RW)
Kojto 90:cb3d968589d8 10540 *
Kojto 90:cb3d968589d8 10541 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 10542 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 10543 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 10544 *
Kojto 90:cb3d968589d8 10545 * Values:
Kojto 90:cb3d968589d8 10546 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 10547 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 10548 */
Kojto 90:cb3d968589d8 10549 /*@{*/
Kojto 90:cb3d968589d8 10550 #define BP_AIPS_PACRN_TP2 (20U) /*!< Bit position for AIPS_PACRN_TP2. */
Kojto 90:cb3d968589d8 10551 #define BM_AIPS_PACRN_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRN_TP2. */
Kojto 90:cb3d968589d8 10552 #define BS_AIPS_PACRN_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP2. */
Kojto 90:cb3d968589d8 10553
Kojto 90:cb3d968589d8 10554 /*! @brief Read current value of the AIPS_PACRN_TP2 field. */
Kojto 90:cb3d968589d8 10555 #define BR_AIPS_PACRN_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP2))
Kojto 90:cb3d968589d8 10556
Kojto 90:cb3d968589d8 10557 /*! @brief Format value for bitfield AIPS_PACRN_TP2. */
Kojto 90:cb3d968589d8 10558 #define BF_AIPS_PACRN_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP2) & BM_AIPS_PACRN_TP2)
Kojto 90:cb3d968589d8 10559
Kojto 90:cb3d968589d8 10560 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 10561 #define BW_AIPS_PACRN_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP2) = (v))
Kojto 90:cb3d968589d8 10562 /*@}*/
Kojto 90:cb3d968589d8 10563
Kojto 90:cb3d968589d8 10564 /*!
Kojto 90:cb3d968589d8 10565 * @name Register AIPS_PACRN, field WP2[21] (RW)
Kojto 90:cb3d968589d8 10566 *
Kojto 90:cb3d968589d8 10567 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 10568 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 10569 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 10570 *
Kojto 90:cb3d968589d8 10571 * Values:
Kojto 90:cb3d968589d8 10572 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10573 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10574 */
Kojto 90:cb3d968589d8 10575 /*@{*/
Kojto 90:cb3d968589d8 10576 #define BP_AIPS_PACRN_WP2 (21U) /*!< Bit position for AIPS_PACRN_WP2. */
Kojto 90:cb3d968589d8 10577 #define BM_AIPS_PACRN_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRN_WP2. */
Kojto 90:cb3d968589d8 10578 #define BS_AIPS_PACRN_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP2. */
Kojto 90:cb3d968589d8 10579
Kojto 90:cb3d968589d8 10580 /*! @brief Read current value of the AIPS_PACRN_WP2 field. */
Kojto 90:cb3d968589d8 10581 #define BR_AIPS_PACRN_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP2))
Kojto 90:cb3d968589d8 10582
Kojto 90:cb3d968589d8 10583 /*! @brief Format value for bitfield AIPS_PACRN_WP2. */
Kojto 90:cb3d968589d8 10584 #define BF_AIPS_PACRN_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP2) & BM_AIPS_PACRN_WP2)
Kojto 90:cb3d968589d8 10585
Kojto 90:cb3d968589d8 10586 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 10587 #define BW_AIPS_PACRN_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP2) = (v))
Kojto 90:cb3d968589d8 10588 /*@}*/
Kojto 90:cb3d968589d8 10589
Kojto 90:cb3d968589d8 10590 /*!
Kojto 90:cb3d968589d8 10591 * @name Register AIPS_PACRN, field SP2[22] (RW)
Kojto 90:cb3d968589d8 10592 *
Kojto 90:cb3d968589d8 10593 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10594 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10595 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 10596 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 10597 * initiates.
Kojto 90:cb3d968589d8 10598 *
Kojto 90:cb3d968589d8 10599 * Values:
Kojto 90:cb3d968589d8 10600 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10601 * accesses.
Kojto 90:cb3d968589d8 10602 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10603 */
Kojto 90:cb3d968589d8 10604 /*@{*/
Kojto 90:cb3d968589d8 10605 #define BP_AIPS_PACRN_SP2 (22U) /*!< Bit position for AIPS_PACRN_SP2. */
Kojto 90:cb3d968589d8 10606 #define BM_AIPS_PACRN_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRN_SP2. */
Kojto 90:cb3d968589d8 10607 #define BS_AIPS_PACRN_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP2. */
Kojto 90:cb3d968589d8 10608
Kojto 90:cb3d968589d8 10609 /*! @brief Read current value of the AIPS_PACRN_SP2 field. */
Kojto 90:cb3d968589d8 10610 #define BR_AIPS_PACRN_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP2))
Kojto 90:cb3d968589d8 10611
Kojto 90:cb3d968589d8 10612 /*! @brief Format value for bitfield AIPS_PACRN_SP2. */
Kojto 90:cb3d968589d8 10613 #define BF_AIPS_PACRN_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP2) & BM_AIPS_PACRN_SP2)
Kojto 90:cb3d968589d8 10614
Kojto 90:cb3d968589d8 10615 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 10616 #define BW_AIPS_PACRN_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP2) = (v))
Kojto 90:cb3d968589d8 10617 /*@}*/
Kojto 90:cb3d968589d8 10618
Kojto 90:cb3d968589d8 10619 /*!
Kojto 90:cb3d968589d8 10620 * @name Register AIPS_PACRN, field TP1[24] (RW)
Kojto 90:cb3d968589d8 10621 *
Kojto 90:cb3d968589d8 10622 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 10623 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 10624 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 10625 *
Kojto 90:cb3d968589d8 10626 * Values:
Kojto 90:cb3d968589d8 10627 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 10628 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 10629 */
Kojto 90:cb3d968589d8 10630 /*@{*/
Kojto 90:cb3d968589d8 10631 #define BP_AIPS_PACRN_TP1 (24U) /*!< Bit position for AIPS_PACRN_TP1. */
Kojto 90:cb3d968589d8 10632 #define BM_AIPS_PACRN_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRN_TP1. */
Kojto 90:cb3d968589d8 10633 #define BS_AIPS_PACRN_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP1. */
Kojto 90:cb3d968589d8 10634
Kojto 90:cb3d968589d8 10635 /*! @brief Read current value of the AIPS_PACRN_TP1 field. */
Kojto 90:cb3d968589d8 10636 #define BR_AIPS_PACRN_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP1))
Kojto 90:cb3d968589d8 10637
Kojto 90:cb3d968589d8 10638 /*! @brief Format value for bitfield AIPS_PACRN_TP1. */
Kojto 90:cb3d968589d8 10639 #define BF_AIPS_PACRN_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP1) & BM_AIPS_PACRN_TP1)
Kojto 90:cb3d968589d8 10640
Kojto 90:cb3d968589d8 10641 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 10642 #define BW_AIPS_PACRN_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP1) = (v))
Kojto 90:cb3d968589d8 10643 /*@}*/
Kojto 90:cb3d968589d8 10644
Kojto 90:cb3d968589d8 10645 /*!
Kojto 90:cb3d968589d8 10646 * @name Register AIPS_PACRN, field WP1[25] (RW)
Kojto 90:cb3d968589d8 10647 *
Kojto 90:cb3d968589d8 10648 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 10649 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 10650 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 10651 *
Kojto 90:cb3d968589d8 10652 * Values:
Kojto 90:cb3d968589d8 10653 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10654 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10655 */
Kojto 90:cb3d968589d8 10656 /*@{*/
Kojto 90:cb3d968589d8 10657 #define BP_AIPS_PACRN_WP1 (25U) /*!< Bit position for AIPS_PACRN_WP1. */
Kojto 90:cb3d968589d8 10658 #define BM_AIPS_PACRN_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRN_WP1. */
Kojto 90:cb3d968589d8 10659 #define BS_AIPS_PACRN_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP1. */
Kojto 90:cb3d968589d8 10660
Kojto 90:cb3d968589d8 10661 /*! @brief Read current value of the AIPS_PACRN_WP1 field. */
Kojto 90:cb3d968589d8 10662 #define BR_AIPS_PACRN_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP1))
Kojto 90:cb3d968589d8 10663
Kojto 90:cb3d968589d8 10664 /*! @brief Format value for bitfield AIPS_PACRN_WP1. */
Kojto 90:cb3d968589d8 10665 #define BF_AIPS_PACRN_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP1) & BM_AIPS_PACRN_WP1)
Kojto 90:cb3d968589d8 10666
Kojto 90:cb3d968589d8 10667 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 10668 #define BW_AIPS_PACRN_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP1) = (v))
Kojto 90:cb3d968589d8 10669 /*@}*/
Kojto 90:cb3d968589d8 10670
Kojto 90:cb3d968589d8 10671 /*!
Kojto 90:cb3d968589d8 10672 * @name Register AIPS_PACRN, field SP1[26] (RW)
Kojto 90:cb3d968589d8 10673 *
Kojto 90:cb3d968589d8 10674 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10675 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10676 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 10677 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 10678 * access initiates.
Kojto 90:cb3d968589d8 10679 *
Kojto 90:cb3d968589d8 10680 * Values:
Kojto 90:cb3d968589d8 10681 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10682 * accesses.
Kojto 90:cb3d968589d8 10683 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10684 */
Kojto 90:cb3d968589d8 10685 /*@{*/
Kojto 90:cb3d968589d8 10686 #define BP_AIPS_PACRN_SP1 (26U) /*!< Bit position for AIPS_PACRN_SP1. */
Kojto 90:cb3d968589d8 10687 #define BM_AIPS_PACRN_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRN_SP1. */
Kojto 90:cb3d968589d8 10688 #define BS_AIPS_PACRN_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP1. */
Kojto 90:cb3d968589d8 10689
Kojto 90:cb3d968589d8 10690 /*! @brief Read current value of the AIPS_PACRN_SP1 field. */
Kojto 90:cb3d968589d8 10691 #define BR_AIPS_PACRN_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP1))
Kojto 90:cb3d968589d8 10692
Kojto 90:cb3d968589d8 10693 /*! @brief Format value for bitfield AIPS_PACRN_SP1. */
Kojto 90:cb3d968589d8 10694 #define BF_AIPS_PACRN_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP1) & BM_AIPS_PACRN_SP1)
Kojto 90:cb3d968589d8 10695
Kojto 90:cb3d968589d8 10696 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 10697 #define BW_AIPS_PACRN_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP1) = (v))
Kojto 90:cb3d968589d8 10698 /*@}*/
Kojto 90:cb3d968589d8 10699
Kojto 90:cb3d968589d8 10700 /*!
Kojto 90:cb3d968589d8 10701 * @name Register AIPS_PACRN, field TP0[28] (RW)
Kojto 90:cb3d968589d8 10702 *
Kojto 90:cb3d968589d8 10703 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 10704 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 10705 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 10706 *
Kojto 90:cb3d968589d8 10707 * Values:
Kojto 90:cb3d968589d8 10708 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 10709 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 10710 */
Kojto 90:cb3d968589d8 10711 /*@{*/
Kojto 90:cb3d968589d8 10712 #define BP_AIPS_PACRN_TP0 (28U) /*!< Bit position for AIPS_PACRN_TP0. */
Kojto 90:cb3d968589d8 10713 #define BM_AIPS_PACRN_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRN_TP0. */
Kojto 90:cb3d968589d8 10714 #define BS_AIPS_PACRN_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRN_TP0. */
Kojto 90:cb3d968589d8 10715
Kojto 90:cb3d968589d8 10716 /*! @brief Read current value of the AIPS_PACRN_TP0 field. */
Kojto 90:cb3d968589d8 10717 #define BR_AIPS_PACRN_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP0))
Kojto 90:cb3d968589d8 10718
Kojto 90:cb3d968589d8 10719 /*! @brief Format value for bitfield AIPS_PACRN_TP0. */
Kojto 90:cb3d968589d8 10720 #define BF_AIPS_PACRN_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_TP0) & BM_AIPS_PACRN_TP0)
Kojto 90:cb3d968589d8 10721
Kojto 90:cb3d968589d8 10722 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 10723 #define BW_AIPS_PACRN_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP0) = (v))
Kojto 90:cb3d968589d8 10724 /*@}*/
Kojto 90:cb3d968589d8 10725
Kojto 90:cb3d968589d8 10726 /*!
Kojto 90:cb3d968589d8 10727 * @name Register AIPS_PACRN, field WP0[29] (RW)
Kojto 90:cb3d968589d8 10728 *
Kojto 90:cb3d968589d8 10729 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 10730 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 10731 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 10732 *
Kojto 90:cb3d968589d8 10733 * Values:
Kojto 90:cb3d968589d8 10734 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10735 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10736 */
Kojto 90:cb3d968589d8 10737 /*@{*/
Kojto 90:cb3d968589d8 10738 #define BP_AIPS_PACRN_WP0 (29U) /*!< Bit position for AIPS_PACRN_WP0. */
Kojto 90:cb3d968589d8 10739 #define BM_AIPS_PACRN_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRN_WP0. */
Kojto 90:cb3d968589d8 10740 #define BS_AIPS_PACRN_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRN_WP0. */
Kojto 90:cb3d968589d8 10741
Kojto 90:cb3d968589d8 10742 /*! @brief Read current value of the AIPS_PACRN_WP0 field. */
Kojto 90:cb3d968589d8 10743 #define BR_AIPS_PACRN_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP0))
Kojto 90:cb3d968589d8 10744
Kojto 90:cb3d968589d8 10745 /*! @brief Format value for bitfield AIPS_PACRN_WP0. */
Kojto 90:cb3d968589d8 10746 #define BF_AIPS_PACRN_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_WP0) & BM_AIPS_PACRN_WP0)
Kojto 90:cb3d968589d8 10747
Kojto 90:cb3d968589d8 10748 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 10749 #define BW_AIPS_PACRN_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP0) = (v))
Kojto 90:cb3d968589d8 10750 /*@}*/
Kojto 90:cb3d968589d8 10751
Kojto 90:cb3d968589d8 10752 /*!
Kojto 90:cb3d968589d8 10753 * @name Register AIPS_PACRN, field SP0[30] (RW)
Kojto 90:cb3d968589d8 10754 *
Kojto 90:cb3d968589d8 10755 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10756 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10757 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 10758 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 10759 * access initiates.
Kojto 90:cb3d968589d8 10760 *
Kojto 90:cb3d968589d8 10761 * Values:
Kojto 90:cb3d968589d8 10762 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10763 * accesses.
Kojto 90:cb3d968589d8 10764 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10765 */
Kojto 90:cb3d968589d8 10766 /*@{*/
Kojto 90:cb3d968589d8 10767 #define BP_AIPS_PACRN_SP0 (30U) /*!< Bit position for AIPS_PACRN_SP0. */
Kojto 90:cb3d968589d8 10768 #define BM_AIPS_PACRN_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRN_SP0. */
Kojto 90:cb3d968589d8 10769 #define BS_AIPS_PACRN_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRN_SP0. */
Kojto 90:cb3d968589d8 10770
Kojto 90:cb3d968589d8 10771 /*! @brief Read current value of the AIPS_PACRN_SP0 field. */
Kojto 90:cb3d968589d8 10772 #define BR_AIPS_PACRN_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP0))
Kojto 90:cb3d968589d8 10773
Kojto 90:cb3d968589d8 10774 /*! @brief Format value for bitfield AIPS_PACRN_SP0. */
Kojto 90:cb3d968589d8 10775 #define BF_AIPS_PACRN_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRN_SP0) & BM_AIPS_PACRN_SP0)
Kojto 90:cb3d968589d8 10776
Kojto 90:cb3d968589d8 10777 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 10778 #define BW_AIPS_PACRN_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP0) = (v))
Kojto 90:cb3d968589d8 10779 /*@}*/
Kojto 90:cb3d968589d8 10780
Kojto 90:cb3d968589d8 10781 /*******************************************************************************
Kojto 90:cb3d968589d8 10782 * HW_AIPS_PACRO - Peripheral Access Control Register
Kojto 90:cb3d968589d8 10783 ******************************************************************************/
Kojto 90:cb3d968589d8 10784
Kojto 90:cb3d968589d8 10785 /*!
Kojto 90:cb3d968589d8 10786 * @brief HW_AIPS_PACRO - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 10787 *
Kojto 90:cb3d968589d8 10788 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 10789 *
Kojto 90:cb3d968589d8 10790 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 10791 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 10792 * registers.
Kojto 90:cb3d968589d8 10793 */
Kojto 90:cb3d968589d8 10794 typedef union _hw_aips_pacro
Kojto 90:cb3d968589d8 10795 {
Kojto 90:cb3d968589d8 10796 uint32_t U;
Kojto 90:cb3d968589d8 10797 struct _hw_aips_pacro_bitfields
Kojto 90:cb3d968589d8 10798 {
Kojto 90:cb3d968589d8 10799 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 10800 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 10801 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 10802 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 10803 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 10804 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 10805 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 10806 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 10807 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 10808 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 10809 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 10810 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 10811 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 10812 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 10813 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 10814 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 10815 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 10816 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 10817 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 10818 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 10819 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 10820 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 10821 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 10822 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 10823 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 10824 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 10825 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 10826 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 10827 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 10828 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 10829 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 10830 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 10831 } B;
Kojto 90:cb3d968589d8 10832 } hw_aips_pacro_t;
Kojto 90:cb3d968589d8 10833
Kojto 90:cb3d968589d8 10834 /*!
Kojto 90:cb3d968589d8 10835 * @name Constants and macros for entire AIPS_PACRO register
Kojto 90:cb3d968589d8 10836 */
Kojto 90:cb3d968589d8 10837 /*@{*/
Kojto 90:cb3d968589d8 10838 #define HW_AIPS_PACRO_ADDR(x) ((x) + 0x68U)
Kojto 90:cb3d968589d8 10839
Kojto 90:cb3d968589d8 10840 #define HW_AIPS_PACRO(x) (*(__IO hw_aips_pacro_t *) HW_AIPS_PACRO_ADDR(x))
Kojto 90:cb3d968589d8 10841 #define HW_AIPS_PACRO_RD(x) (HW_AIPS_PACRO(x).U)
Kojto 90:cb3d968589d8 10842 #define HW_AIPS_PACRO_WR(x, v) (HW_AIPS_PACRO(x).U = (v))
Kojto 90:cb3d968589d8 10843 #define HW_AIPS_PACRO_SET(x, v) (HW_AIPS_PACRO_WR(x, HW_AIPS_PACRO_RD(x) | (v)))
Kojto 90:cb3d968589d8 10844 #define HW_AIPS_PACRO_CLR(x, v) (HW_AIPS_PACRO_WR(x, HW_AIPS_PACRO_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 10845 #define HW_AIPS_PACRO_TOG(x, v) (HW_AIPS_PACRO_WR(x, HW_AIPS_PACRO_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 10846 /*@}*/
Kojto 90:cb3d968589d8 10847
Kojto 90:cb3d968589d8 10848 /*
Kojto 90:cb3d968589d8 10849 * Constants & macros for individual AIPS_PACRO bitfields
Kojto 90:cb3d968589d8 10850 */
Kojto 90:cb3d968589d8 10851
Kojto 90:cb3d968589d8 10852 /*!
Kojto 90:cb3d968589d8 10853 * @name Register AIPS_PACRO, field TP7[0] (RW)
Kojto 90:cb3d968589d8 10854 *
Kojto 90:cb3d968589d8 10855 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 10856 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 10857 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 10858 *
Kojto 90:cb3d968589d8 10859 * Values:
Kojto 90:cb3d968589d8 10860 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 10861 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 10862 */
Kojto 90:cb3d968589d8 10863 /*@{*/
Kojto 90:cb3d968589d8 10864 #define BP_AIPS_PACRO_TP7 (0U) /*!< Bit position for AIPS_PACRO_TP7. */
Kojto 90:cb3d968589d8 10865 #define BM_AIPS_PACRO_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRO_TP7. */
Kojto 90:cb3d968589d8 10866 #define BS_AIPS_PACRO_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP7. */
Kojto 90:cb3d968589d8 10867
Kojto 90:cb3d968589d8 10868 /*! @brief Read current value of the AIPS_PACRO_TP7 field. */
Kojto 90:cb3d968589d8 10869 #define BR_AIPS_PACRO_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP7))
Kojto 90:cb3d968589d8 10870
Kojto 90:cb3d968589d8 10871 /*! @brief Format value for bitfield AIPS_PACRO_TP7. */
Kojto 90:cb3d968589d8 10872 #define BF_AIPS_PACRO_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP7) & BM_AIPS_PACRO_TP7)
Kojto 90:cb3d968589d8 10873
Kojto 90:cb3d968589d8 10874 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 10875 #define BW_AIPS_PACRO_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP7) = (v))
Kojto 90:cb3d968589d8 10876 /*@}*/
Kojto 90:cb3d968589d8 10877
Kojto 90:cb3d968589d8 10878 /*!
Kojto 90:cb3d968589d8 10879 * @name Register AIPS_PACRO, field WP7[1] (RW)
Kojto 90:cb3d968589d8 10880 *
Kojto 90:cb3d968589d8 10881 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 10882 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 10883 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 10884 *
Kojto 90:cb3d968589d8 10885 * Values:
Kojto 90:cb3d968589d8 10886 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10887 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10888 */
Kojto 90:cb3d968589d8 10889 /*@{*/
Kojto 90:cb3d968589d8 10890 #define BP_AIPS_PACRO_WP7 (1U) /*!< Bit position for AIPS_PACRO_WP7. */
Kojto 90:cb3d968589d8 10891 #define BM_AIPS_PACRO_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRO_WP7. */
Kojto 90:cb3d968589d8 10892 #define BS_AIPS_PACRO_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP7. */
Kojto 90:cb3d968589d8 10893
Kojto 90:cb3d968589d8 10894 /*! @brief Read current value of the AIPS_PACRO_WP7 field. */
Kojto 90:cb3d968589d8 10895 #define BR_AIPS_PACRO_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP7))
Kojto 90:cb3d968589d8 10896
Kojto 90:cb3d968589d8 10897 /*! @brief Format value for bitfield AIPS_PACRO_WP7. */
Kojto 90:cb3d968589d8 10898 #define BF_AIPS_PACRO_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP7) & BM_AIPS_PACRO_WP7)
Kojto 90:cb3d968589d8 10899
Kojto 90:cb3d968589d8 10900 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 10901 #define BW_AIPS_PACRO_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP7) = (v))
Kojto 90:cb3d968589d8 10902 /*@}*/
Kojto 90:cb3d968589d8 10903
Kojto 90:cb3d968589d8 10904 /*!
Kojto 90:cb3d968589d8 10905 * @name Register AIPS_PACRO, field SP7[2] (RW)
Kojto 90:cb3d968589d8 10906 *
Kojto 90:cb3d968589d8 10907 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10908 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10909 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 10910 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 10911 * access initiates.
Kojto 90:cb3d968589d8 10912 *
Kojto 90:cb3d968589d8 10913 * Values:
Kojto 90:cb3d968589d8 10914 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10915 * accesses.
Kojto 90:cb3d968589d8 10916 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10917 */
Kojto 90:cb3d968589d8 10918 /*@{*/
Kojto 90:cb3d968589d8 10919 #define BP_AIPS_PACRO_SP7 (2U) /*!< Bit position for AIPS_PACRO_SP7. */
Kojto 90:cb3d968589d8 10920 #define BM_AIPS_PACRO_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRO_SP7. */
Kojto 90:cb3d968589d8 10921 #define BS_AIPS_PACRO_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP7. */
Kojto 90:cb3d968589d8 10922
Kojto 90:cb3d968589d8 10923 /*! @brief Read current value of the AIPS_PACRO_SP7 field. */
Kojto 90:cb3d968589d8 10924 #define BR_AIPS_PACRO_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP7))
Kojto 90:cb3d968589d8 10925
Kojto 90:cb3d968589d8 10926 /*! @brief Format value for bitfield AIPS_PACRO_SP7. */
Kojto 90:cb3d968589d8 10927 #define BF_AIPS_PACRO_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP7) & BM_AIPS_PACRO_SP7)
Kojto 90:cb3d968589d8 10928
Kojto 90:cb3d968589d8 10929 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 10930 #define BW_AIPS_PACRO_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP7) = (v))
Kojto 90:cb3d968589d8 10931 /*@}*/
Kojto 90:cb3d968589d8 10932
Kojto 90:cb3d968589d8 10933 /*!
Kojto 90:cb3d968589d8 10934 * @name Register AIPS_PACRO, field TP6[4] (RW)
Kojto 90:cb3d968589d8 10935 *
Kojto 90:cb3d968589d8 10936 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 10937 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 10938 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 10939 *
Kojto 90:cb3d968589d8 10940 * Values:
Kojto 90:cb3d968589d8 10941 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 10942 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 10943 */
Kojto 90:cb3d968589d8 10944 /*@{*/
Kojto 90:cb3d968589d8 10945 #define BP_AIPS_PACRO_TP6 (4U) /*!< Bit position for AIPS_PACRO_TP6. */
Kojto 90:cb3d968589d8 10946 #define BM_AIPS_PACRO_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRO_TP6. */
Kojto 90:cb3d968589d8 10947 #define BS_AIPS_PACRO_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP6. */
Kojto 90:cb3d968589d8 10948
Kojto 90:cb3d968589d8 10949 /*! @brief Read current value of the AIPS_PACRO_TP6 field. */
Kojto 90:cb3d968589d8 10950 #define BR_AIPS_PACRO_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP6))
Kojto 90:cb3d968589d8 10951
Kojto 90:cb3d968589d8 10952 /*! @brief Format value for bitfield AIPS_PACRO_TP6. */
Kojto 90:cb3d968589d8 10953 #define BF_AIPS_PACRO_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP6) & BM_AIPS_PACRO_TP6)
Kojto 90:cb3d968589d8 10954
Kojto 90:cb3d968589d8 10955 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 10956 #define BW_AIPS_PACRO_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP6) = (v))
Kojto 90:cb3d968589d8 10957 /*@}*/
Kojto 90:cb3d968589d8 10958
Kojto 90:cb3d968589d8 10959 /*!
Kojto 90:cb3d968589d8 10960 * @name Register AIPS_PACRO, field WP6[5] (RW)
Kojto 90:cb3d968589d8 10961 *
Kojto 90:cb3d968589d8 10962 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 10963 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 10964 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 10965 *
Kojto 90:cb3d968589d8 10966 * Values:
Kojto 90:cb3d968589d8 10967 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 10968 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 10969 */
Kojto 90:cb3d968589d8 10970 /*@{*/
Kojto 90:cb3d968589d8 10971 #define BP_AIPS_PACRO_WP6 (5U) /*!< Bit position for AIPS_PACRO_WP6. */
Kojto 90:cb3d968589d8 10972 #define BM_AIPS_PACRO_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRO_WP6. */
Kojto 90:cb3d968589d8 10973 #define BS_AIPS_PACRO_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP6. */
Kojto 90:cb3d968589d8 10974
Kojto 90:cb3d968589d8 10975 /*! @brief Read current value of the AIPS_PACRO_WP6 field. */
Kojto 90:cb3d968589d8 10976 #define BR_AIPS_PACRO_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP6))
Kojto 90:cb3d968589d8 10977
Kojto 90:cb3d968589d8 10978 /*! @brief Format value for bitfield AIPS_PACRO_WP6. */
Kojto 90:cb3d968589d8 10979 #define BF_AIPS_PACRO_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP6) & BM_AIPS_PACRO_WP6)
Kojto 90:cb3d968589d8 10980
Kojto 90:cb3d968589d8 10981 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 10982 #define BW_AIPS_PACRO_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP6) = (v))
Kojto 90:cb3d968589d8 10983 /*@}*/
Kojto 90:cb3d968589d8 10984
Kojto 90:cb3d968589d8 10985 /*!
Kojto 90:cb3d968589d8 10986 * @name Register AIPS_PACRO, field SP6[6] (RW)
Kojto 90:cb3d968589d8 10987 *
Kojto 90:cb3d968589d8 10988 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 10989 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 10990 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 10991 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 10992 * access initiates.
Kojto 90:cb3d968589d8 10993 *
Kojto 90:cb3d968589d8 10994 * Values:
Kojto 90:cb3d968589d8 10995 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 10996 * accesses.
Kojto 90:cb3d968589d8 10997 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 10998 */
Kojto 90:cb3d968589d8 10999 /*@{*/
Kojto 90:cb3d968589d8 11000 #define BP_AIPS_PACRO_SP6 (6U) /*!< Bit position for AIPS_PACRO_SP6. */
Kojto 90:cb3d968589d8 11001 #define BM_AIPS_PACRO_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRO_SP6. */
Kojto 90:cb3d968589d8 11002 #define BS_AIPS_PACRO_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP6. */
Kojto 90:cb3d968589d8 11003
Kojto 90:cb3d968589d8 11004 /*! @brief Read current value of the AIPS_PACRO_SP6 field. */
Kojto 90:cb3d968589d8 11005 #define BR_AIPS_PACRO_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP6))
Kojto 90:cb3d968589d8 11006
Kojto 90:cb3d968589d8 11007 /*! @brief Format value for bitfield AIPS_PACRO_SP6. */
Kojto 90:cb3d968589d8 11008 #define BF_AIPS_PACRO_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP6) & BM_AIPS_PACRO_SP6)
Kojto 90:cb3d968589d8 11009
Kojto 90:cb3d968589d8 11010 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 11011 #define BW_AIPS_PACRO_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP6) = (v))
Kojto 90:cb3d968589d8 11012 /*@}*/
Kojto 90:cb3d968589d8 11013
Kojto 90:cb3d968589d8 11014 /*!
Kojto 90:cb3d968589d8 11015 * @name Register AIPS_PACRO, field TP5[8] (RW)
Kojto 90:cb3d968589d8 11016 *
Kojto 90:cb3d968589d8 11017 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11018 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11019 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11020 *
Kojto 90:cb3d968589d8 11021 * Values:
Kojto 90:cb3d968589d8 11022 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11023 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11024 */
Kojto 90:cb3d968589d8 11025 /*@{*/
Kojto 90:cb3d968589d8 11026 #define BP_AIPS_PACRO_TP5 (8U) /*!< Bit position for AIPS_PACRO_TP5. */
Kojto 90:cb3d968589d8 11027 #define BM_AIPS_PACRO_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRO_TP5. */
Kojto 90:cb3d968589d8 11028 #define BS_AIPS_PACRO_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP5. */
Kojto 90:cb3d968589d8 11029
Kojto 90:cb3d968589d8 11030 /*! @brief Read current value of the AIPS_PACRO_TP5 field. */
Kojto 90:cb3d968589d8 11031 #define BR_AIPS_PACRO_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP5))
Kojto 90:cb3d968589d8 11032
Kojto 90:cb3d968589d8 11033 /*! @brief Format value for bitfield AIPS_PACRO_TP5. */
Kojto 90:cb3d968589d8 11034 #define BF_AIPS_PACRO_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP5) & BM_AIPS_PACRO_TP5)
Kojto 90:cb3d968589d8 11035
Kojto 90:cb3d968589d8 11036 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 11037 #define BW_AIPS_PACRO_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP5) = (v))
Kojto 90:cb3d968589d8 11038 /*@}*/
Kojto 90:cb3d968589d8 11039
Kojto 90:cb3d968589d8 11040 /*!
Kojto 90:cb3d968589d8 11041 * @name Register AIPS_PACRO, field WP5[9] (RW)
Kojto 90:cb3d968589d8 11042 *
Kojto 90:cb3d968589d8 11043 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 11044 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 11045 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 11046 *
Kojto 90:cb3d968589d8 11047 * Values:
Kojto 90:cb3d968589d8 11048 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11049 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11050 */
Kojto 90:cb3d968589d8 11051 /*@{*/
Kojto 90:cb3d968589d8 11052 #define BP_AIPS_PACRO_WP5 (9U) /*!< Bit position for AIPS_PACRO_WP5. */
Kojto 90:cb3d968589d8 11053 #define BM_AIPS_PACRO_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRO_WP5. */
Kojto 90:cb3d968589d8 11054 #define BS_AIPS_PACRO_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP5. */
Kojto 90:cb3d968589d8 11055
Kojto 90:cb3d968589d8 11056 /*! @brief Read current value of the AIPS_PACRO_WP5 field. */
Kojto 90:cb3d968589d8 11057 #define BR_AIPS_PACRO_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP5))
Kojto 90:cb3d968589d8 11058
Kojto 90:cb3d968589d8 11059 /*! @brief Format value for bitfield AIPS_PACRO_WP5. */
Kojto 90:cb3d968589d8 11060 #define BF_AIPS_PACRO_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP5) & BM_AIPS_PACRO_WP5)
Kojto 90:cb3d968589d8 11061
Kojto 90:cb3d968589d8 11062 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 11063 #define BW_AIPS_PACRO_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP5) = (v))
Kojto 90:cb3d968589d8 11064 /*@}*/
Kojto 90:cb3d968589d8 11065
Kojto 90:cb3d968589d8 11066 /*!
Kojto 90:cb3d968589d8 11067 * @name Register AIPS_PACRO, field SP5[10] (RW)
Kojto 90:cb3d968589d8 11068 *
Kojto 90:cb3d968589d8 11069 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11070 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11071 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 11072 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 11073 * access initiates.
Kojto 90:cb3d968589d8 11074 *
Kojto 90:cb3d968589d8 11075 * Values:
Kojto 90:cb3d968589d8 11076 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11077 * accesses.
Kojto 90:cb3d968589d8 11078 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11079 */
Kojto 90:cb3d968589d8 11080 /*@{*/
Kojto 90:cb3d968589d8 11081 #define BP_AIPS_PACRO_SP5 (10U) /*!< Bit position for AIPS_PACRO_SP5. */
Kojto 90:cb3d968589d8 11082 #define BM_AIPS_PACRO_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRO_SP5. */
Kojto 90:cb3d968589d8 11083 #define BS_AIPS_PACRO_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP5. */
Kojto 90:cb3d968589d8 11084
Kojto 90:cb3d968589d8 11085 /*! @brief Read current value of the AIPS_PACRO_SP5 field. */
Kojto 90:cb3d968589d8 11086 #define BR_AIPS_PACRO_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP5))
Kojto 90:cb3d968589d8 11087
Kojto 90:cb3d968589d8 11088 /*! @brief Format value for bitfield AIPS_PACRO_SP5. */
Kojto 90:cb3d968589d8 11089 #define BF_AIPS_PACRO_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP5) & BM_AIPS_PACRO_SP5)
Kojto 90:cb3d968589d8 11090
Kojto 90:cb3d968589d8 11091 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 11092 #define BW_AIPS_PACRO_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP5) = (v))
Kojto 90:cb3d968589d8 11093 /*@}*/
Kojto 90:cb3d968589d8 11094
Kojto 90:cb3d968589d8 11095 /*!
Kojto 90:cb3d968589d8 11096 * @name Register AIPS_PACRO, field TP4[12] (RW)
Kojto 90:cb3d968589d8 11097 *
Kojto 90:cb3d968589d8 11098 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11099 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11100 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11101 *
Kojto 90:cb3d968589d8 11102 * Values:
Kojto 90:cb3d968589d8 11103 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11104 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11105 */
Kojto 90:cb3d968589d8 11106 /*@{*/
Kojto 90:cb3d968589d8 11107 #define BP_AIPS_PACRO_TP4 (12U) /*!< Bit position for AIPS_PACRO_TP4. */
Kojto 90:cb3d968589d8 11108 #define BM_AIPS_PACRO_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRO_TP4. */
Kojto 90:cb3d968589d8 11109 #define BS_AIPS_PACRO_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP4. */
Kojto 90:cb3d968589d8 11110
Kojto 90:cb3d968589d8 11111 /*! @brief Read current value of the AIPS_PACRO_TP4 field. */
Kojto 90:cb3d968589d8 11112 #define BR_AIPS_PACRO_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP4))
Kojto 90:cb3d968589d8 11113
Kojto 90:cb3d968589d8 11114 /*! @brief Format value for bitfield AIPS_PACRO_TP4. */
Kojto 90:cb3d968589d8 11115 #define BF_AIPS_PACRO_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP4) & BM_AIPS_PACRO_TP4)
Kojto 90:cb3d968589d8 11116
Kojto 90:cb3d968589d8 11117 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 11118 #define BW_AIPS_PACRO_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP4) = (v))
Kojto 90:cb3d968589d8 11119 /*@}*/
Kojto 90:cb3d968589d8 11120
Kojto 90:cb3d968589d8 11121 /*!
Kojto 90:cb3d968589d8 11122 * @name Register AIPS_PACRO, field WP4[13] (RW)
Kojto 90:cb3d968589d8 11123 *
Kojto 90:cb3d968589d8 11124 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 11125 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 11126 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 11127 *
Kojto 90:cb3d968589d8 11128 * Values:
Kojto 90:cb3d968589d8 11129 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11130 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11131 */
Kojto 90:cb3d968589d8 11132 /*@{*/
Kojto 90:cb3d968589d8 11133 #define BP_AIPS_PACRO_WP4 (13U) /*!< Bit position for AIPS_PACRO_WP4. */
Kojto 90:cb3d968589d8 11134 #define BM_AIPS_PACRO_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRO_WP4. */
Kojto 90:cb3d968589d8 11135 #define BS_AIPS_PACRO_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP4. */
Kojto 90:cb3d968589d8 11136
Kojto 90:cb3d968589d8 11137 /*! @brief Read current value of the AIPS_PACRO_WP4 field. */
Kojto 90:cb3d968589d8 11138 #define BR_AIPS_PACRO_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP4))
Kojto 90:cb3d968589d8 11139
Kojto 90:cb3d968589d8 11140 /*! @brief Format value for bitfield AIPS_PACRO_WP4. */
Kojto 90:cb3d968589d8 11141 #define BF_AIPS_PACRO_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP4) & BM_AIPS_PACRO_WP4)
Kojto 90:cb3d968589d8 11142
Kojto 90:cb3d968589d8 11143 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 11144 #define BW_AIPS_PACRO_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP4) = (v))
Kojto 90:cb3d968589d8 11145 /*@}*/
Kojto 90:cb3d968589d8 11146
Kojto 90:cb3d968589d8 11147 /*!
Kojto 90:cb3d968589d8 11148 * @name Register AIPS_PACRO, field SP4[14] (RW)
Kojto 90:cb3d968589d8 11149 *
Kojto 90:cb3d968589d8 11150 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11151 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11152 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 11153 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 11154 * initiates.
Kojto 90:cb3d968589d8 11155 *
Kojto 90:cb3d968589d8 11156 * Values:
Kojto 90:cb3d968589d8 11157 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11158 * accesses.
Kojto 90:cb3d968589d8 11159 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11160 */
Kojto 90:cb3d968589d8 11161 /*@{*/
Kojto 90:cb3d968589d8 11162 #define BP_AIPS_PACRO_SP4 (14U) /*!< Bit position for AIPS_PACRO_SP4. */
Kojto 90:cb3d968589d8 11163 #define BM_AIPS_PACRO_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRO_SP4. */
Kojto 90:cb3d968589d8 11164 #define BS_AIPS_PACRO_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP4. */
Kojto 90:cb3d968589d8 11165
Kojto 90:cb3d968589d8 11166 /*! @brief Read current value of the AIPS_PACRO_SP4 field. */
Kojto 90:cb3d968589d8 11167 #define BR_AIPS_PACRO_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP4))
Kojto 90:cb3d968589d8 11168
Kojto 90:cb3d968589d8 11169 /*! @brief Format value for bitfield AIPS_PACRO_SP4. */
Kojto 90:cb3d968589d8 11170 #define BF_AIPS_PACRO_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP4) & BM_AIPS_PACRO_SP4)
Kojto 90:cb3d968589d8 11171
Kojto 90:cb3d968589d8 11172 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 11173 #define BW_AIPS_PACRO_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP4) = (v))
Kojto 90:cb3d968589d8 11174 /*@}*/
Kojto 90:cb3d968589d8 11175
Kojto 90:cb3d968589d8 11176 /*!
Kojto 90:cb3d968589d8 11177 * @name Register AIPS_PACRO, field TP3[16] (RW)
Kojto 90:cb3d968589d8 11178 *
Kojto 90:cb3d968589d8 11179 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11180 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11181 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11182 *
Kojto 90:cb3d968589d8 11183 * Values:
Kojto 90:cb3d968589d8 11184 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11185 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11186 */
Kojto 90:cb3d968589d8 11187 /*@{*/
Kojto 90:cb3d968589d8 11188 #define BP_AIPS_PACRO_TP3 (16U) /*!< Bit position for AIPS_PACRO_TP3. */
Kojto 90:cb3d968589d8 11189 #define BM_AIPS_PACRO_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRO_TP3. */
Kojto 90:cb3d968589d8 11190 #define BS_AIPS_PACRO_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP3. */
Kojto 90:cb3d968589d8 11191
Kojto 90:cb3d968589d8 11192 /*! @brief Read current value of the AIPS_PACRO_TP3 field. */
Kojto 90:cb3d968589d8 11193 #define BR_AIPS_PACRO_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP3))
Kojto 90:cb3d968589d8 11194
Kojto 90:cb3d968589d8 11195 /*! @brief Format value for bitfield AIPS_PACRO_TP3. */
Kojto 90:cb3d968589d8 11196 #define BF_AIPS_PACRO_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP3) & BM_AIPS_PACRO_TP3)
Kojto 90:cb3d968589d8 11197
Kojto 90:cb3d968589d8 11198 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 11199 #define BW_AIPS_PACRO_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP3) = (v))
Kojto 90:cb3d968589d8 11200 /*@}*/
Kojto 90:cb3d968589d8 11201
Kojto 90:cb3d968589d8 11202 /*!
Kojto 90:cb3d968589d8 11203 * @name Register AIPS_PACRO, field WP3[17] (RW)
Kojto 90:cb3d968589d8 11204 *
Kojto 90:cb3d968589d8 11205 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 11206 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 11207 * no peripheral access initiates.
Kojto 90:cb3d968589d8 11208 *
Kojto 90:cb3d968589d8 11209 * Values:
Kojto 90:cb3d968589d8 11210 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11211 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11212 */
Kojto 90:cb3d968589d8 11213 /*@{*/
Kojto 90:cb3d968589d8 11214 #define BP_AIPS_PACRO_WP3 (17U) /*!< Bit position for AIPS_PACRO_WP3. */
Kojto 90:cb3d968589d8 11215 #define BM_AIPS_PACRO_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRO_WP3. */
Kojto 90:cb3d968589d8 11216 #define BS_AIPS_PACRO_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP3. */
Kojto 90:cb3d968589d8 11217
Kojto 90:cb3d968589d8 11218 /*! @brief Read current value of the AIPS_PACRO_WP3 field. */
Kojto 90:cb3d968589d8 11219 #define BR_AIPS_PACRO_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP3))
Kojto 90:cb3d968589d8 11220
Kojto 90:cb3d968589d8 11221 /*! @brief Format value for bitfield AIPS_PACRO_WP3. */
Kojto 90:cb3d968589d8 11222 #define BF_AIPS_PACRO_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP3) & BM_AIPS_PACRO_WP3)
Kojto 90:cb3d968589d8 11223
Kojto 90:cb3d968589d8 11224 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 11225 #define BW_AIPS_PACRO_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP3) = (v))
Kojto 90:cb3d968589d8 11226 /*@}*/
Kojto 90:cb3d968589d8 11227
Kojto 90:cb3d968589d8 11228 /*!
Kojto 90:cb3d968589d8 11229 * @name Register AIPS_PACRO, field SP3[18] (RW)
Kojto 90:cb3d968589d8 11230 *
Kojto 90:cb3d968589d8 11231 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11232 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11233 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 11234 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 11235 * access initiates.
Kojto 90:cb3d968589d8 11236 *
Kojto 90:cb3d968589d8 11237 * Values:
Kojto 90:cb3d968589d8 11238 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11239 * accesses.
Kojto 90:cb3d968589d8 11240 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11241 */
Kojto 90:cb3d968589d8 11242 /*@{*/
Kojto 90:cb3d968589d8 11243 #define BP_AIPS_PACRO_SP3 (18U) /*!< Bit position for AIPS_PACRO_SP3. */
Kojto 90:cb3d968589d8 11244 #define BM_AIPS_PACRO_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRO_SP3. */
Kojto 90:cb3d968589d8 11245 #define BS_AIPS_PACRO_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP3. */
Kojto 90:cb3d968589d8 11246
Kojto 90:cb3d968589d8 11247 /*! @brief Read current value of the AIPS_PACRO_SP3 field. */
Kojto 90:cb3d968589d8 11248 #define BR_AIPS_PACRO_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP3))
Kojto 90:cb3d968589d8 11249
Kojto 90:cb3d968589d8 11250 /*! @brief Format value for bitfield AIPS_PACRO_SP3. */
Kojto 90:cb3d968589d8 11251 #define BF_AIPS_PACRO_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP3) & BM_AIPS_PACRO_SP3)
Kojto 90:cb3d968589d8 11252
Kojto 90:cb3d968589d8 11253 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 11254 #define BW_AIPS_PACRO_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP3) = (v))
Kojto 90:cb3d968589d8 11255 /*@}*/
Kojto 90:cb3d968589d8 11256
Kojto 90:cb3d968589d8 11257 /*!
Kojto 90:cb3d968589d8 11258 * @name Register AIPS_PACRO, field TP2[20] (RW)
Kojto 90:cb3d968589d8 11259 *
Kojto 90:cb3d968589d8 11260 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11261 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11262 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11263 *
Kojto 90:cb3d968589d8 11264 * Values:
Kojto 90:cb3d968589d8 11265 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11266 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11267 */
Kojto 90:cb3d968589d8 11268 /*@{*/
Kojto 90:cb3d968589d8 11269 #define BP_AIPS_PACRO_TP2 (20U) /*!< Bit position for AIPS_PACRO_TP2. */
Kojto 90:cb3d968589d8 11270 #define BM_AIPS_PACRO_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRO_TP2. */
Kojto 90:cb3d968589d8 11271 #define BS_AIPS_PACRO_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP2. */
Kojto 90:cb3d968589d8 11272
Kojto 90:cb3d968589d8 11273 /*! @brief Read current value of the AIPS_PACRO_TP2 field. */
Kojto 90:cb3d968589d8 11274 #define BR_AIPS_PACRO_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP2))
Kojto 90:cb3d968589d8 11275
Kojto 90:cb3d968589d8 11276 /*! @brief Format value for bitfield AIPS_PACRO_TP2. */
Kojto 90:cb3d968589d8 11277 #define BF_AIPS_PACRO_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP2) & BM_AIPS_PACRO_TP2)
Kojto 90:cb3d968589d8 11278
Kojto 90:cb3d968589d8 11279 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 11280 #define BW_AIPS_PACRO_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP2) = (v))
Kojto 90:cb3d968589d8 11281 /*@}*/
Kojto 90:cb3d968589d8 11282
Kojto 90:cb3d968589d8 11283 /*!
Kojto 90:cb3d968589d8 11284 * @name Register AIPS_PACRO, field WP2[21] (RW)
Kojto 90:cb3d968589d8 11285 *
Kojto 90:cb3d968589d8 11286 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 11287 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 11288 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 11289 *
Kojto 90:cb3d968589d8 11290 * Values:
Kojto 90:cb3d968589d8 11291 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11292 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11293 */
Kojto 90:cb3d968589d8 11294 /*@{*/
Kojto 90:cb3d968589d8 11295 #define BP_AIPS_PACRO_WP2 (21U) /*!< Bit position for AIPS_PACRO_WP2. */
Kojto 90:cb3d968589d8 11296 #define BM_AIPS_PACRO_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRO_WP2. */
Kojto 90:cb3d968589d8 11297 #define BS_AIPS_PACRO_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP2. */
Kojto 90:cb3d968589d8 11298
Kojto 90:cb3d968589d8 11299 /*! @brief Read current value of the AIPS_PACRO_WP2 field. */
Kojto 90:cb3d968589d8 11300 #define BR_AIPS_PACRO_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP2))
Kojto 90:cb3d968589d8 11301
Kojto 90:cb3d968589d8 11302 /*! @brief Format value for bitfield AIPS_PACRO_WP2. */
Kojto 90:cb3d968589d8 11303 #define BF_AIPS_PACRO_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP2) & BM_AIPS_PACRO_WP2)
Kojto 90:cb3d968589d8 11304
Kojto 90:cb3d968589d8 11305 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 11306 #define BW_AIPS_PACRO_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP2) = (v))
Kojto 90:cb3d968589d8 11307 /*@}*/
Kojto 90:cb3d968589d8 11308
Kojto 90:cb3d968589d8 11309 /*!
Kojto 90:cb3d968589d8 11310 * @name Register AIPS_PACRO, field SP2[22] (RW)
Kojto 90:cb3d968589d8 11311 *
Kojto 90:cb3d968589d8 11312 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11313 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11314 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 11315 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 11316 * initiates.
Kojto 90:cb3d968589d8 11317 *
Kojto 90:cb3d968589d8 11318 * Values:
Kojto 90:cb3d968589d8 11319 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11320 * accesses.
Kojto 90:cb3d968589d8 11321 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11322 */
Kojto 90:cb3d968589d8 11323 /*@{*/
Kojto 90:cb3d968589d8 11324 #define BP_AIPS_PACRO_SP2 (22U) /*!< Bit position for AIPS_PACRO_SP2. */
Kojto 90:cb3d968589d8 11325 #define BM_AIPS_PACRO_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRO_SP2. */
Kojto 90:cb3d968589d8 11326 #define BS_AIPS_PACRO_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP2. */
Kojto 90:cb3d968589d8 11327
Kojto 90:cb3d968589d8 11328 /*! @brief Read current value of the AIPS_PACRO_SP2 field. */
Kojto 90:cb3d968589d8 11329 #define BR_AIPS_PACRO_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP2))
Kojto 90:cb3d968589d8 11330
Kojto 90:cb3d968589d8 11331 /*! @brief Format value for bitfield AIPS_PACRO_SP2. */
Kojto 90:cb3d968589d8 11332 #define BF_AIPS_PACRO_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP2) & BM_AIPS_PACRO_SP2)
Kojto 90:cb3d968589d8 11333
Kojto 90:cb3d968589d8 11334 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 11335 #define BW_AIPS_PACRO_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP2) = (v))
Kojto 90:cb3d968589d8 11336 /*@}*/
Kojto 90:cb3d968589d8 11337
Kojto 90:cb3d968589d8 11338 /*!
Kojto 90:cb3d968589d8 11339 * @name Register AIPS_PACRO, field TP1[24] (RW)
Kojto 90:cb3d968589d8 11340 *
Kojto 90:cb3d968589d8 11341 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11342 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11343 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11344 *
Kojto 90:cb3d968589d8 11345 * Values:
Kojto 90:cb3d968589d8 11346 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11347 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11348 */
Kojto 90:cb3d968589d8 11349 /*@{*/
Kojto 90:cb3d968589d8 11350 #define BP_AIPS_PACRO_TP1 (24U) /*!< Bit position for AIPS_PACRO_TP1. */
Kojto 90:cb3d968589d8 11351 #define BM_AIPS_PACRO_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRO_TP1. */
Kojto 90:cb3d968589d8 11352 #define BS_AIPS_PACRO_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP1. */
Kojto 90:cb3d968589d8 11353
Kojto 90:cb3d968589d8 11354 /*! @brief Read current value of the AIPS_PACRO_TP1 field. */
Kojto 90:cb3d968589d8 11355 #define BR_AIPS_PACRO_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP1))
Kojto 90:cb3d968589d8 11356
Kojto 90:cb3d968589d8 11357 /*! @brief Format value for bitfield AIPS_PACRO_TP1. */
Kojto 90:cb3d968589d8 11358 #define BF_AIPS_PACRO_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP1) & BM_AIPS_PACRO_TP1)
Kojto 90:cb3d968589d8 11359
Kojto 90:cb3d968589d8 11360 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 11361 #define BW_AIPS_PACRO_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP1) = (v))
Kojto 90:cb3d968589d8 11362 /*@}*/
Kojto 90:cb3d968589d8 11363
Kojto 90:cb3d968589d8 11364 /*!
Kojto 90:cb3d968589d8 11365 * @name Register AIPS_PACRO, field WP1[25] (RW)
Kojto 90:cb3d968589d8 11366 *
Kojto 90:cb3d968589d8 11367 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 11368 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 11369 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 11370 *
Kojto 90:cb3d968589d8 11371 * Values:
Kojto 90:cb3d968589d8 11372 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11373 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11374 */
Kojto 90:cb3d968589d8 11375 /*@{*/
Kojto 90:cb3d968589d8 11376 #define BP_AIPS_PACRO_WP1 (25U) /*!< Bit position for AIPS_PACRO_WP1. */
Kojto 90:cb3d968589d8 11377 #define BM_AIPS_PACRO_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRO_WP1. */
Kojto 90:cb3d968589d8 11378 #define BS_AIPS_PACRO_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP1. */
Kojto 90:cb3d968589d8 11379
Kojto 90:cb3d968589d8 11380 /*! @brief Read current value of the AIPS_PACRO_WP1 field. */
Kojto 90:cb3d968589d8 11381 #define BR_AIPS_PACRO_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP1))
Kojto 90:cb3d968589d8 11382
Kojto 90:cb3d968589d8 11383 /*! @brief Format value for bitfield AIPS_PACRO_WP1. */
Kojto 90:cb3d968589d8 11384 #define BF_AIPS_PACRO_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP1) & BM_AIPS_PACRO_WP1)
Kojto 90:cb3d968589d8 11385
Kojto 90:cb3d968589d8 11386 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 11387 #define BW_AIPS_PACRO_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP1) = (v))
Kojto 90:cb3d968589d8 11388 /*@}*/
Kojto 90:cb3d968589d8 11389
Kojto 90:cb3d968589d8 11390 /*!
Kojto 90:cb3d968589d8 11391 * @name Register AIPS_PACRO, field SP1[26] (RW)
Kojto 90:cb3d968589d8 11392 *
Kojto 90:cb3d968589d8 11393 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11394 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11395 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 11396 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 11397 * access initiates.
Kojto 90:cb3d968589d8 11398 *
Kojto 90:cb3d968589d8 11399 * Values:
Kojto 90:cb3d968589d8 11400 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11401 * accesses.
Kojto 90:cb3d968589d8 11402 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11403 */
Kojto 90:cb3d968589d8 11404 /*@{*/
Kojto 90:cb3d968589d8 11405 #define BP_AIPS_PACRO_SP1 (26U) /*!< Bit position for AIPS_PACRO_SP1. */
Kojto 90:cb3d968589d8 11406 #define BM_AIPS_PACRO_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRO_SP1. */
Kojto 90:cb3d968589d8 11407 #define BS_AIPS_PACRO_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP1. */
Kojto 90:cb3d968589d8 11408
Kojto 90:cb3d968589d8 11409 /*! @brief Read current value of the AIPS_PACRO_SP1 field. */
Kojto 90:cb3d968589d8 11410 #define BR_AIPS_PACRO_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP1))
Kojto 90:cb3d968589d8 11411
Kojto 90:cb3d968589d8 11412 /*! @brief Format value for bitfield AIPS_PACRO_SP1. */
Kojto 90:cb3d968589d8 11413 #define BF_AIPS_PACRO_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP1) & BM_AIPS_PACRO_SP1)
Kojto 90:cb3d968589d8 11414
Kojto 90:cb3d968589d8 11415 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 11416 #define BW_AIPS_PACRO_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP1) = (v))
Kojto 90:cb3d968589d8 11417 /*@}*/
Kojto 90:cb3d968589d8 11418
Kojto 90:cb3d968589d8 11419 /*!
Kojto 90:cb3d968589d8 11420 * @name Register AIPS_PACRO, field TP0[28] (RW)
Kojto 90:cb3d968589d8 11421 *
Kojto 90:cb3d968589d8 11422 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11423 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11424 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11425 *
Kojto 90:cb3d968589d8 11426 * Values:
Kojto 90:cb3d968589d8 11427 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11428 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11429 */
Kojto 90:cb3d968589d8 11430 /*@{*/
Kojto 90:cb3d968589d8 11431 #define BP_AIPS_PACRO_TP0 (28U) /*!< Bit position for AIPS_PACRO_TP0. */
Kojto 90:cb3d968589d8 11432 #define BM_AIPS_PACRO_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRO_TP0. */
Kojto 90:cb3d968589d8 11433 #define BS_AIPS_PACRO_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRO_TP0. */
Kojto 90:cb3d968589d8 11434
Kojto 90:cb3d968589d8 11435 /*! @brief Read current value of the AIPS_PACRO_TP0 field. */
Kojto 90:cb3d968589d8 11436 #define BR_AIPS_PACRO_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP0))
Kojto 90:cb3d968589d8 11437
Kojto 90:cb3d968589d8 11438 /*! @brief Format value for bitfield AIPS_PACRO_TP0. */
Kojto 90:cb3d968589d8 11439 #define BF_AIPS_PACRO_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_TP0) & BM_AIPS_PACRO_TP0)
Kojto 90:cb3d968589d8 11440
Kojto 90:cb3d968589d8 11441 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 11442 #define BW_AIPS_PACRO_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP0) = (v))
Kojto 90:cb3d968589d8 11443 /*@}*/
Kojto 90:cb3d968589d8 11444
Kojto 90:cb3d968589d8 11445 /*!
Kojto 90:cb3d968589d8 11446 * @name Register AIPS_PACRO, field WP0[29] (RW)
Kojto 90:cb3d968589d8 11447 *
Kojto 90:cb3d968589d8 11448 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 11449 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 11450 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 11451 *
Kojto 90:cb3d968589d8 11452 * Values:
Kojto 90:cb3d968589d8 11453 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11454 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11455 */
Kojto 90:cb3d968589d8 11456 /*@{*/
Kojto 90:cb3d968589d8 11457 #define BP_AIPS_PACRO_WP0 (29U) /*!< Bit position for AIPS_PACRO_WP0. */
Kojto 90:cb3d968589d8 11458 #define BM_AIPS_PACRO_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRO_WP0. */
Kojto 90:cb3d968589d8 11459 #define BS_AIPS_PACRO_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRO_WP0. */
Kojto 90:cb3d968589d8 11460
Kojto 90:cb3d968589d8 11461 /*! @brief Read current value of the AIPS_PACRO_WP0 field. */
Kojto 90:cb3d968589d8 11462 #define BR_AIPS_PACRO_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP0))
Kojto 90:cb3d968589d8 11463
Kojto 90:cb3d968589d8 11464 /*! @brief Format value for bitfield AIPS_PACRO_WP0. */
Kojto 90:cb3d968589d8 11465 #define BF_AIPS_PACRO_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_WP0) & BM_AIPS_PACRO_WP0)
Kojto 90:cb3d968589d8 11466
Kojto 90:cb3d968589d8 11467 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 11468 #define BW_AIPS_PACRO_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP0) = (v))
Kojto 90:cb3d968589d8 11469 /*@}*/
Kojto 90:cb3d968589d8 11470
Kojto 90:cb3d968589d8 11471 /*!
Kojto 90:cb3d968589d8 11472 * @name Register AIPS_PACRO, field SP0[30] (RW)
Kojto 90:cb3d968589d8 11473 *
Kojto 90:cb3d968589d8 11474 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11475 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11476 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 11477 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 11478 * access initiates.
Kojto 90:cb3d968589d8 11479 *
Kojto 90:cb3d968589d8 11480 * Values:
Kojto 90:cb3d968589d8 11481 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11482 * accesses.
Kojto 90:cb3d968589d8 11483 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11484 */
Kojto 90:cb3d968589d8 11485 /*@{*/
Kojto 90:cb3d968589d8 11486 #define BP_AIPS_PACRO_SP0 (30U) /*!< Bit position for AIPS_PACRO_SP0. */
Kojto 90:cb3d968589d8 11487 #define BM_AIPS_PACRO_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRO_SP0. */
Kojto 90:cb3d968589d8 11488 #define BS_AIPS_PACRO_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRO_SP0. */
Kojto 90:cb3d968589d8 11489
Kojto 90:cb3d968589d8 11490 /*! @brief Read current value of the AIPS_PACRO_SP0 field. */
Kojto 90:cb3d968589d8 11491 #define BR_AIPS_PACRO_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP0))
Kojto 90:cb3d968589d8 11492
Kojto 90:cb3d968589d8 11493 /*! @brief Format value for bitfield AIPS_PACRO_SP0. */
Kojto 90:cb3d968589d8 11494 #define BF_AIPS_PACRO_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRO_SP0) & BM_AIPS_PACRO_SP0)
Kojto 90:cb3d968589d8 11495
Kojto 90:cb3d968589d8 11496 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 11497 #define BW_AIPS_PACRO_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP0) = (v))
Kojto 90:cb3d968589d8 11498 /*@}*/
Kojto 90:cb3d968589d8 11499
Kojto 90:cb3d968589d8 11500 /*******************************************************************************
Kojto 90:cb3d968589d8 11501 * HW_AIPS_PACRP - Peripheral Access Control Register
Kojto 90:cb3d968589d8 11502 ******************************************************************************/
Kojto 90:cb3d968589d8 11503
Kojto 90:cb3d968589d8 11504 /*!
Kojto 90:cb3d968589d8 11505 * @brief HW_AIPS_PACRP - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 11506 *
Kojto 90:cb3d968589d8 11507 * Reset value: 0x44444444U
Kojto 90:cb3d968589d8 11508 *
Kojto 90:cb3d968589d8 11509 * This section describes PACR registers E-P, which control peripheral slots
Kojto 90:cb3d968589d8 11510 * 32-127. See PACRPeripheral Access Control Register for the description of these
Kojto 90:cb3d968589d8 11511 * registers.
Kojto 90:cb3d968589d8 11512 */
Kojto 90:cb3d968589d8 11513 typedef union _hw_aips_pacrp
Kojto 90:cb3d968589d8 11514 {
Kojto 90:cb3d968589d8 11515 uint32_t U;
Kojto 90:cb3d968589d8 11516 struct _hw_aips_pacrp_bitfields
Kojto 90:cb3d968589d8 11517 {
Kojto 90:cb3d968589d8 11518 uint32_t TP7 : 1; /*!< [0] Trusted Protect */
Kojto 90:cb3d968589d8 11519 uint32_t WP7 : 1; /*!< [1] Write Protect */
Kojto 90:cb3d968589d8 11520 uint32_t SP7 : 1; /*!< [2] Supervisor Protect */
Kojto 90:cb3d968589d8 11521 uint32_t RESERVED0 : 1; /*!< [3] */
Kojto 90:cb3d968589d8 11522 uint32_t TP6 : 1; /*!< [4] Trusted Protect */
Kojto 90:cb3d968589d8 11523 uint32_t WP6 : 1; /*!< [5] Write Protect */
Kojto 90:cb3d968589d8 11524 uint32_t SP6 : 1; /*!< [6] Supervisor Protect */
Kojto 90:cb3d968589d8 11525 uint32_t RESERVED1 : 1; /*!< [7] */
Kojto 90:cb3d968589d8 11526 uint32_t TP5 : 1; /*!< [8] Trusted Protect */
Kojto 90:cb3d968589d8 11527 uint32_t WP5 : 1; /*!< [9] Write Protect */
Kojto 90:cb3d968589d8 11528 uint32_t SP5 : 1; /*!< [10] Supervisor Protect */
Kojto 90:cb3d968589d8 11529 uint32_t RESERVED2 : 1; /*!< [11] */
Kojto 90:cb3d968589d8 11530 uint32_t TP4 : 1; /*!< [12] Trusted Protect */
Kojto 90:cb3d968589d8 11531 uint32_t WP4 : 1; /*!< [13] Write Protect */
Kojto 90:cb3d968589d8 11532 uint32_t SP4 : 1; /*!< [14] Supervisor Protect */
Kojto 90:cb3d968589d8 11533 uint32_t RESERVED3 : 1; /*!< [15] */
Kojto 90:cb3d968589d8 11534 uint32_t TP3 : 1; /*!< [16] Trusted Protect */
Kojto 90:cb3d968589d8 11535 uint32_t WP3 : 1; /*!< [17] Write Protect */
Kojto 90:cb3d968589d8 11536 uint32_t SP3 : 1; /*!< [18] Supervisor Protect */
Kojto 90:cb3d968589d8 11537 uint32_t RESERVED4 : 1; /*!< [19] */
Kojto 90:cb3d968589d8 11538 uint32_t TP2 : 1; /*!< [20] Trusted Protect */
Kojto 90:cb3d968589d8 11539 uint32_t WP2 : 1; /*!< [21] Write Protect */
Kojto 90:cb3d968589d8 11540 uint32_t SP2 : 1; /*!< [22] Supervisor Protect */
Kojto 90:cb3d968589d8 11541 uint32_t RESERVED5 : 1; /*!< [23] */
Kojto 90:cb3d968589d8 11542 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 11543 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 11544 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 11545 uint32_t RESERVED6 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 11546 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 11547 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 11548 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 11549 uint32_t RESERVED7 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 11550 } B;
Kojto 90:cb3d968589d8 11551 } hw_aips_pacrp_t;
Kojto 90:cb3d968589d8 11552
Kojto 90:cb3d968589d8 11553 /*!
Kojto 90:cb3d968589d8 11554 * @name Constants and macros for entire AIPS_PACRP register
Kojto 90:cb3d968589d8 11555 */
Kojto 90:cb3d968589d8 11556 /*@{*/
Kojto 90:cb3d968589d8 11557 #define HW_AIPS_PACRP_ADDR(x) ((x) + 0x6CU)
Kojto 90:cb3d968589d8 11558
Kojto 90:cb3d968589d8 11559 #define HW_AIPS_PACRP(x) (*(__IO hw_aips_pacrp_t *) HW_AIPS_PACRP_ADDR(x))
Kojto 90:cb3d968589d8 11560 #define HW_AIPS_PACRP_RD(x) (HW_AIPS_PACRP(x).U)
Kojto 90:cb3d968589d8 11561 #define HW_AIPS_PACRP_WR(x, v) (HW_AIPS_PACRP(x).U = (v))
Kojto 90:cb3d968589d8 11562 #define HW_AIPS_PACRP_SET(x, v) (HW_AIPS_PACRP_WR(x, HW_AIPS_PACRP_RD(x) | (v)))
Kojto 90:cb3d968589d8 11563 #define HW_AIPS_PACRP_CLR(x, v) (HW_AIPS_PACRP_WR(x, HW_AIPS_PACRP_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 11564 #define HW_AIPS_PACRP_TOG(x, v) (HW_AIPS_PACRP_WR(x, HW_AIPS_PACRP_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 11565 /*@}*/
Kojto 90:cb3d968589d8 11566
Kojto 90:cb3d968589d8 11567 /*
Kojto 90:cb3d968589d8 11568 * Constants & macros for individual AIPS_PACRP bitfields
Kojto 90:cb3d968589d8 11569 */
Kojto 90:cb3d968589d8 11570
Kojto 90:cb3d968589d8 11571 /*!
Kojto 90:cb3d968589d8 11572 * @name Register AIPS_PACRP, field TP7[0] (RW)
Kojto 90:cb3d968589d8 11573 *
Kojto 90:cb3d968589d8 11574 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11575 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11576 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11577 *
Kojto 90:cb3d968589d8 11578 * Values:
Kojto 90:cb3d968589d8 11579 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11580 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11581 */
Kojto 90:cb3d968589d8 11582 /*@{*/
Kojto 90:cb3d968589d8 11583 #define BP_AIPS_PACRP_TP7 (0U) /*!< Bit position for AIPS_PACRP_TP7. */
Kojto 90:cb3d968589d8 11584 #define BM_AIPS_PACRP_TP7 (0x00000001U) /*!< Bit mask for AIPS_PACRP_TP7. */
Kojto 90:cb3d968589d8 11585 #define BS_AIPS_PACRP_TP7 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP7. */
Kojto 90:cb3d968589d8 11586
Kojto 90:cb3d968589d8 11587 /*! @brief Read current value of the AIPS_PACRP_TP7 field. */
Kojto 90:cb3d968589d8 11588 #define BR_AIPS_PACRP_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP7))
Kojto 90:cb3d968589d8 11589
Kojto 90:cb3d968589d8 11590 /*! @brief Format value for bitfield AIPS_PACRP_TP7. */
Kojto 90:cb3d968589d8 11591 #define BF_AIPS_PACRP_TP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP7) & BM_AIPS_PACRP_TP7)
Kojto 90:cb3d968589d8 11592
Kojto 90:cb3d968589d8 11593 /*! @brief Set the TP7 field to a new value. */
Kojto 90:cb3d968589d8 11594 #define BW_AIPS_PACRP_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP7) = (v))
Kojto 90:cb3d968589d8 11595 /*@}*/
Kojto 90:cb3d968589d8 11596
Kojto 90:cb3d968589d8 11597 /*!
Kojto 90:cb3d968589d8 11598 * @name Register AIPS_PACRP, field WP7[1] (RW)
Kojto 90:cb3d968589d8 11599 *
Kojto 90:cb3d968589d8 11600 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 11601 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 11602 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 11603 *
Kojto 90:cb3d968589d8 11604 * Values:
Kojto 90:cb3d968589d8 11605 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11606 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11607 */
Kojto 90:cb3d968589d8 11608 /*@{*/
Kojto 90:cb3d968589d8 11609 #define BP_AIPS_PACRP_WP7 (1U) /*!< Bit position for AIPS_PACRP_WP7. */
Kojto 90:cb3d968589d8 11610 #define BM_AIPS_PACRP_WP7 (0x00000002U) /*!< Bit mask for AIPS_PACRP_WP7. */
Kojto 90:cb3d968589d8 11611 #define BS_AIPS_PACRP_WP7 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP7. */
Kojto 90:cb3d968589d8 11612
Kojto 90:cb3d968589d8 11613 /*! @brief Read current value of the AIPS_PACRP_WP7 field. */
Kojto 90:cb3d968589d8 11614 #define BR_AIPS_PACRP_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP7))
Kojto 90:cb3d968589d8 11615
Kojto 90:cb3d968589d8 11616 /*! @brief Format value for bitfield AIPS_PACRP_WP7. */
Kojto 90:cb3d968589d8 11617 #define BF_AIPS_PACRP_WP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP7) & BM_AIPS_PACRP_WP7)
Kojto 90:cb3d968589d8 11618
Kojto 90:cb3d968589d8 11619 /*! @brief Set the WP7 field to a new value. */
Kojto 90:cb3d968589d8 11620 #define BW_AIPS_PACRP_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP7) = (v))
Kojto 90:cb3d968589d8 11621 /*@}*/
Kojto 90:cb3d968589d8 11622
Kojto 90:cb3d968589d8 11623 /*!
Kojto 90:cb3d968589d8 11624 * @name Register AIPS_PACRP, field SP7[2] (RW)
Kojto 90:cb3d968589d8 11625 *
Kojto 90:cb3d968589d8 11626 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11627 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11628 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 11629 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 11630 * access initiates.
Kojto 90:cb3d968589d8 11631 *
Kojto 90:cb3d968589d8 11632 * Values:
Kojto 90:cb3d968589d8 11633 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11634 * accesses.
Kojto 90:cb3d968589d8 11635 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11636 */
Kojto 90:cb3d968589d8 11637 /*@{*/
Kojto 90:cb3d968589d8 11638 #define BP_AIPS_PACRP_SP7 (2U) /*!< Bit position for AIPS_PACRP_SP7. */
Kojto 90:cb3d968589d8 11639 #define BM_AIPS_PACRP_SP7 (0x00000004U) /*!< Bit mask for AIPS_PACRP_SP7. */
Kojto 90:cb3d968589d8 11640 #define BS_AIPS_PACRP_SP7 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP7. */
Kojto 90:cb3d968589d8 11641
Kojto 90:cb3d968589d8 11642 /*! @brief Read current value of the AIPS_PACRP_SP7 field. */
Kojto 90:cb3d968589d8 11643 #define BR_AIPS_PACRP_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP7))
Kojto 90:cb3d968589d8 11644
Kojto 90:cb3d968589d8 11645 /*! @brief Format value for bitfield AIPS_PACRP_SP7. */
Kojto 90:cb3d968589d8 11646 #define BF_AIPS_PACRP_SP7(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP7) & BM_AIPS_PACRP_SP7)
Kojto 90:cb3d968589d8 11647
Kojto 90:cb3d968589d8 11648 /*! @brief Set the SP7 field to a new value. */
Kojto 90:cb3d968589d8 11649 #define BW_AIPS_PACRP_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP7) = (v))
Kojto 90:cb3d968589d8 11650 /*@}*/
Kojto 90:cb3d968589d8 11651
Kojto 90:cb3d968589d8 11652 /*!
Kojto 90:cb3d968589d8 11653 * @name Register AIPS_PACRP, field TP6[4] (RW)
Kojto 90:cb3d968589d8 11654 *
Kojto 90:cb3d968589d8 11655 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11656 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11657 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11658 *
Kojto 90:cb3d968589d8 11659 * Values:
Kojto 90:cb3d968589d8 11660 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11661 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11662 */
Kojto 90:cb3d968589d8 11663 /*@{*/
Kojto 90:cb3d968589d8 11664 #define BP_AIPS_PACRP_TP6 (4U) /*!< Bit position for AIPS_PACRP_TP6. */
Kojto 90:cb3d968589d8 11665 #define BM_AIPS_PACRP_TP6 (0x00000010U) /*!< Bit mask for AIPS_PACRP_TP6. */
Kojto 90:cb3d968589d8 11666 #define BS_AIPS_PACRP_TP6 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP6. */
Kojto 90:cb3d968589d8 11667
Kojto 90:cb3d968589d8 11668 /*! @brief Read current value of the AIPS_PACRP_TP6 field. */
Kojto 90:cb3d968589d8 11669 #define BR_AIPS_PACRP_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP6))
Kojto 90:cb3d968589d8 11670
Kojto 90:cb3d968589d8 11671 /*! @brief Format value for bitfield AIPS_PACRP_TP6. */
Kojto 90:cb3d968589d8 11672 #define BF_AIPS_PACRP_TP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP6) & BM_AIPS_PACRP_TP6)
Kojto 90:cb3d968589d8 11673
Kojto 90:cb3d968589d8 11674 /*! @brief Set the TP6 field to a new value. */
Kojto 90:cb3d968589d8 11675 #define BW_AIPS_PACRP_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP6) = (v))
Kojto 90:cb3d968589d8 11676 /*@}*/
Kojto 90:cb3d968589d8 11677
Kojto 90:cb3d968589d8 11678 /*!
Kojto 90:cb3d968589d8 11679 * @name Register AIPS_PACRP, field WP6[5] (RW)
Kojto 90:cb3d968589d8 11680 *
Kojto 90:cb3d968589d8 11681 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 11682 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 11683 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 11684 *
Kojto 90:cb3d968589d8 11685 * Values:
Kojto 90:cb3d968589d8 11686 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11687 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11688 */
Kojto 90:cb3d968589d8 11689 /*@{*/
Kojto 90:cb3d968589d8 11690 #define BP_AIPS_PACRP_WP6 (5U) /*!< Bit position for AIPS_PACRP_WP6. */
Kojto 90:cb3d968589d8 11691 #define BM_AIPS_PACRP_WP6 (0x00000020U) /*!< Bit mask for AIPS_PACRP_WP6. */
Kojto 90:cb3d968589d8 11692 #define BS_AIPS_PACRP_WP6 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP6. */
Kojto 90:cb3d968589d8 11693
Kojto 90:cb3d968589d8 11694 /*! @brief Read current value of the AIPS_PACRP_WP6 field. */
Kojto 90:cb3d968589d8 11695 #define BR_AIPS_PACRP_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP6))
Kojto 90:cb3d968589d8 11696
Kojto 90:cb3d968589d8 11697 /*! @brief Format value for bitfield AIPS_PACRP_WP6. */
Kojto 90:cb3d968589d8 11698 #define BF_AIPS_PACRP_WP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP6) & BM_AIPS_PACRP_WP6)
Kojto 90:cb3d968589d8 11699
Kojto 90:cb3d968589d8 11700 /*! @brief Set the WP6 field to a new value. */
Kojto 90:cb3d968589d8 11701 #define BW_AIPS_PACRP_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP6) = (v))
Kojto 90:cb3d968589d8 11702 /*@}*/
Kojto 90:cb3d968589d8 11703
Kojto 90:cb3d968589d8 11704 /*!
Kojto 90:cb3d968589d8 11705 * @name Register AIPS_PACRP, field SP6[6] (RW)
Kojto 90:cb3d968589d8 11706 *
Kojto 90:cb3d968589d8 11707 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11708 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11709 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 11710 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 11711 * access initiates.
Kojto 90:cb3d968589d8 11712 *
Kojto 90:cb3d968589d8 11713 * Values:
Kojto 90:cb3d968589d8 11714 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11715 * accesses.
Kojto 90:cb3d968589d8 11716 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11717 */
Kojto 90:cb3d968589d8 11718 /*@{*/
Kojto 90:cb3d968589d8 11719 #define BP_AIPS_PACRP_SP6 (6U) /*!< Bit position for AIPS_PACRP_SP6. */
Kojto 90:cb3d968589d8 11720 #define BM_AIPS_PACRP_SP6 (0x00000040U) /*!< Bit mask for AIPS_PACRP_SP6. */
Kojto 90:cb3d968589d8 11721 #define BS_AIPS_PACRP_SP6 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP6. */
Kojto 90:cb3d968589d8 11722
Kojto 90:cb3d968589d8 11723 /*! @brief Read current value of the AIPS_PACRP_SP6 field. */
Kojto 90:cb3d968589d8 11724 #define BR_AIPS_PACRP_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP6))
Kojto 90:cb3d968589d8 11725
Kojto 90:cb3d968589d8 11726 /*! @brief Format value for bitfield AIPS_PACRP_SP6. */
Kojto 90:cb3d968589d8 11727 #define BF_AIPS_PACRP_SP6(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP6) & BM_AIPS_PACRP_SP6)
Kojto 90:cb3d968589d8 11728
Kojto 90:cb3d968589d8 11729 /*! @brief Set the SP6 field to a new value. */
Kojto 90:cb3d968589d8 11730 #define BW_AIPS_PACRP_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP6) = (v))
Kojto 90:cb3d968589d8 11731 /*@}*/
Kojto 90:cb3d968589d8 11732
Kojto 90:cb3d968589d8 11733 /*!
Kojto 90:cb3d968589d8 11734 * @name Register AIPS_PACRP, field TP5[8] (RW)
Kojto 90:cb3d968589d8 11735 *
Kojto 90:cb3d968589d8 11736 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11737 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11738 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11739 *
Kojto 90:cb3d968589d8 11740 * Values:
Kojto 90:cb3d968589d8 11741 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11742 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11743 */
Kojto 90:cb3d968589d8 11744 /*@{*/
Kojto 90:cb3d968589d8 11745 #define BP_AIPS_PACRP_TP5 (8U) /*!< Bit position for AIPS_PACRP_TP5. */
Kojto 90:cb3d968589d8 11746 #define BM_AIPS_PACRP_TP5 (0x00000100U) /*!< Bit mask for AIPS_PACRP_TP5. */
Kojto 90:cb3d968589d8 11747 #define BS_AIPS_PACRP_TP5 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP5. */
Kojto 90:cb3d968589d8 11748
Kojto 90:cb3d968589d8 11749 /*! @brief Read current value of the AIPS_PACRP_TP5 field. */
Kojto 90:cb3d968589d8 11750 #define BR_AIPS_PACRP_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP5))
Kojto 90:cb3d968589d8 11751
Kojto 90:cb3d968589d8 11752 /*! @brief Format value for bitfield AIPS_PACRP_TP5. */
Kojto 90:cb3d968589d8 11753 #define BF_AIPS_PACRP_TP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP5) & BM_AIPS_PACRP_TP5)
Kojto 90:cb3d968589d8 11754
Kojto 90:cb3d968589d8 11755 /*! @brief Set the TP5 field to a new value. */
Kojto 90:cb3d968589d8 11756 #define BW_AIPS_PACRP_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP5) = (v))
Kojto 90:cb3d968589d8 11757 /*@}*/
Kojto 90:cb3d968589d8 11758
Kojto 90:cb3d968589d8 11759 /*!
Kojto 90:cb3d968589d8 11760 * @name Register AIPS_PACRP, field WP5[9] (RW)
Kojto 90:cb3d968589d8 11761 *
Kojto 90:cb3d968589d8 11762 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 11763 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 11764 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 11765 *
Kojto 90:cb3d968589d8 11766 * Values:
Kojto 90:cb3d968589d8 11767 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11768 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11769 */
Kojto 90:cb3d968589d8 11770 /*@{*/
Kojto 90:cb3d968589d8 11771 #define BP_AIPS_PACRP_WP5 (9U) /*!< Bit position for AIPS_PACRP_WP5. */
Kojto 90:cb3d968589d8 11772 #define BM_AIPS_PACRP_WP5 (0x00000200U) /*!< Bit mask for AIPS_PACRP_WP5. */
Kojto 90:cb3d968589d8 11773 #define BS_AIPS_PACRP_WP5 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP5. */
Kojto 90:cb3d968589d8 11774
Kojto 90:cb3d968589d8 11775 /*! @brief Read current value of the AIPS_PACRP_WP5 field. */
Kojto 90:cb3d968589d8 11776 #define BR_AIPS_PACRP_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP5))
Kojto 90:cb3d968589d8 11777
Kojto 90:cb3d968589d8 11778 /*! @brief Format value for bitfield AIPS_PACRP_WP5. */
Kojto 90:cb3d968589d8 11779 #define BF_AIPS_PACRP_WP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP5) & BM_AIPS_PACRP_WP5)
Kojto 90:cb3d968589d8 11780
Kojto 90:cb3d968589d8 11781 /*! @brief Set the WP5 field to a new value. */
Kojto 90:cb3d968589d8 11782 #define BW_AIPS_PACRP_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP5) = (v))
Kojto 90:cb3d968589d8 11783 /*@}*/
Kojto 90:cb3d968589d8 11784
Kojto 90:cb3d968589d8 11785 /*!
Kojto 90:cb3d968589d8 11786 * @name Register AIPS_PACRP, field SP5[10] (RW)
Kojto 90:cb3d968589d8 11787 *
Kojto 90:cb3d968589d8 11788 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11789 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11790 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 11791 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 11792 * access initiates.
Kojto 90:cb3d968589d8 11793 *
Kojto 90:cb3d968589d8 11794 * Values:
Kojto 90:cb3d968589d8 11795 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11796 * accesses.
Kojto 90:cb3d968589d8 11797 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11798 */
Kojto 90:cb3d968589d8 11799 /*@{*/
Kojto 90:cb3d968589d8 11800 #define BP_AIPS_PACRP_SP5 (10U) /*!< Bit position for AIPS_PACRP_SP5. */
Kojto 90:cb3d968589d8 11801 #define BM_AIPS_PACRP_SP5 (0x00000400U) /*!< Bit mask for AIPS_PACRP_SP5. */
Kojto 90:cb3d968589d8 11802 #define BS_AIPS_PACRP_SP5 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP5. */
Kojto 90:cb3d968589d8 11803
Kojto 90:cb3d968589d8 11804 /*! @brief Read current value of the AIPS_PACRP_SP5 field. */
Kojto 90:cb3d968589d8 11805 #define BR_AIPS_PACRP_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP5))
Kojto 90:cb3d968589d8 11806
Kojto 90:cb3d968589d8 11807 /*! @brief Format value for bitfield AIPS_PACRP_SP5. */
Kojto 90:cb3d968589d8 11808 #define BF_AIPS_PACRP_SP5(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP5) & BM_AIPS_PACRP_SP5)
Kojto 90:cb3d968589d8 11809
Kojto 90:cb3d968589d8 11810 /*! @brief Set the SP5 field to a new value. */
Kojto 90:cb3d968589d8 11811 #define BW_AIPS_PACRP_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP5) = (v))
Kojto 90:cb3d968589d8 11812 /*@}*/
Kojto 90:cb3d968589d8 11813
Kojto 90:cb3d968589d8 11814 /*!
Kojto 90:cb3d968589d8 11815 * @name Register AIPS_PACRP, field TP4[12] (RW)
Kojto 90:cb3d968589d8 11816 *
Kojto 90:cb3d968589d8 11817 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11818 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11819 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11820 *
Kojto 90:cb3d968589d8 11821 * Values:
Kojto 90:cb3d968589d8 11822 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11823 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11824 */
Kojto 90:cb3d968589d8 11825 /*@{*/
Kojto 90:cb3d968589d8 11826 #define BP_AIPS_PACRP_TP4 (12U) /*!< Bit position for AIPS_PACRP_TP4. */
Kojto 90:cb3d968589d8 11827 #define BM_AIPS_PACRP_TP4 (0x00001000U) /*!< Bit mask for AIPS_PACRP_TP4. */
Kojto 90:cb3d968589d8 11828 #define BS_AIPS_PACRP_TP4 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP4. */
Kojto 90:cb3d968589d8 11829
Kojto 90:cb3d968589d8 11830 /*! @brief Read current value of the AIPS_PACRP_TP4 field. */
Kojto 90:cb3d968589d8 11831 #define BR_AIPS_PACRP_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP4))
Kojto 90:cb3d968589d8 11832
Kojto 90:cb3d968589d8 11833 /*! @brief Format value for bitfield AIPS_PACRP_TP4. */
Kojto 90:cb3d968589d8 11834 #define BF_AIPS_PACRP_TP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP4) & BM_AIPS_PACRP_TP4)
Kojto 90:cb3d968589d8 11835
Kojto 90:cb3d968589d8 11836 /*! @brief Set the TP4 field to a new value. */
Kojto 90:cb3d968589d8 11837 #define BW_AIPS_PACRP_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP4) = (v))
Kojto 90:cb3d968589d8 11838 /*@}*/
Kojto 90:cb3d968589d8 11839
Kojto 90:cb3d968589d8 11840 /*!
Kojto 90:cb3d968589d8 11841 * @name Register AIPS_PACRP, field WP4[13] (RW)
Kojto 90:cb3d968589d8 11842 *
Kojto 90:cb3d968589d8 11843 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 11844 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 11845 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 11846 *
Kojto 90:cb3d968589d8 11847 * Values:
Kojto 90:cb3d968589d8 11848 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11849 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11850 */
Kojto 90:cb3d968589d8 11851 /*@{*/
Kojto 90:cb3d968589d8 11852 #define BP_AIPS_PACRP_WP4 (13U) /*!< Bit position for AIPS_PACRP_WP4. */
Kojto 90:cb3d968589d8 11853 #define BM_AIPS_PACRP_WP4 (0x00002000U) /*!< Bit mask for AIPS_PACRP_WP4. */
Kojto 90:cb3d968589d8 11854 #define BS_AIPS_PACRP_WP4 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP4. */
Kojto 90:cb3d968589d8 11855
Kojto 90:cb3d968589d8 11856 /*! @brief Read current value of the AIPS_PACRP_WP4 field. */
Kojto 90:cb3d968589d8 11857 #define BR_AIPS_PACRP_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP4))
Kojto 90:cb3d968589d8 11858
Kojto 90:cb3d968589d8 11859 /*! @brief Format value for bitfield AIPS_PACRP_WP4. */
Kojto 90:cb3d968589d8 11860 #define BF_AIPS_PACRP_WP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP4) & BM_AIPS_PACRP_WP4)
Kojto 90:cb3d968589d8 11861
Kojto 90:cb3d968589d8 11862 /*! @brief Set the WP4 field to a new value. */
Kojto 90:cb3d968589d8 11863 #define BW_AIPS_PACRP_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP4) = (v))
Kojto 90:cb3d968589d8 11864 /*@}*/
Kojto 90:cb3d968589d8 11865
Kojto 90:cb3d968589d8 11866 /*!
Kojto 90:cb3d968589d8 11867 * @name Register AIPS_PACRP, field SP4[14] (RW)
Kojto 90:cb3d968589d8 11868 *
Kojto 90:cb3d968589d8 11869 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11870 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11871 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 11872 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 11873 * initiates.
Kojto 90:cb3d968589d8 11874 *
Kojto 90:cb3d968589d8 11875 * Values:
Kojto 90:cb3d968589d8 11876 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11877 * accesses.
Kojto 90:cb3d968589d8 11878 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11879 */
Kojto 90:cb3d968589d8 11880 /*@{*/
Kojto 90:cb3d968589d8 11881 #define BP_AIPS_PACRP_SP4 (14U) /*!< Bit position for AIPS_PACRP_SP4. */
Kojto 90:cb3d968589d8 11882 #define BM_AIPS_PACRP_SP4 (0x00004000U) /*!< Bit mask for AIPS_PACRP_SP4. */
Kojto 90:cb3d968589d8 11883 #define BS_AIPS_PACRP_SP4 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP4. */
Kojto 90:cb3d968589d8 11884
Kojto 90:cb3d968589d8 11885 /*! @brief Read current value of the AIPS_PACRP_SP4 field. */
Kojto 90:cb3d968589d8 11886 #define BR_AIPS_PACRP_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP4))
Kojto 90:cb3d968589d8 11887
Kojto 90:cb3d968589d8 11888 /*! @brief Format value for bitfield AIPS_PACRP_SP4. */
Kojto 90:cb3d968589d8 11889 #define BF_AIPS_PACRP_SP4(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP4) & BM_AIPS_PACRP_SP4)
Kojto 90:cb3d968589d8 11890
Kojto 90:cb3d968589d8 11891 /*! @brief Set the SP4 field to a new value. */
Kojto 90:cb3d968589d8 11892 #define BW_AIPS_PACRP_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP4) = (v))
Kojto 90:cb3d968589d8 11893 /*@}*/
Kojto 90:cb3d968589d8 11894
Kojto 90:cb3d968589d8 11895 /*!
Kojto 90:cb3d968589d8 11896 * @name Register AIPS_PACRP, field TP3[16] (RW)
Kojto 90:cb3d968589d8 11897 *
Kojto 90:cb3d968589d8 11898 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11899 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11900 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11901 *
Kojto 90:cb3d968589d8 11902 * Values:
Kojto 90:cb3d968589d8 11903 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11904 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11905 */
Kojto 90:cb3d968589d8 11906 /*@{*/
Kojto 90:cb3d968589d8 11907 #define BP_AIPS_PACRP_TP3 (16U) /*!< Bit position for AIPS_PACRP_TP3. */
Kojto 90:cb3d968589d8 11908 #define BM_AIPS_PACRP_TP3 (0x00010000U) /*!< Bit mask for AIPS_PACRP_TP3. */
Kojto 90:cb3d968589d8 11909 #define BS_AIPS_PACRP_TP3 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP3. */
Kojto 90:cb3d968589d8 11910
Kojto 90:cb3d968589d8 11911 /*! @brief Read current value of the AIPS_PACRP_TP3 field. */
Kojto 90:cb3d968589d8 11912 #define BR_AIPS_PACRP_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP3))
Kojto 90:cb3d968589d8 11913
Kojto 90:cb3d968589d8 11914 /*! @brief Format value for bitfield AIPS_PACRP_TP3. */
Kojto 90:cb3d968589d8 11915 #define BF_AIPS_PACRP_TP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP3) & BM_AIPS_PACRP_TP3)
Kojto 90:cb3d968589d8 11916
Kojto 90:cb3d968589d8 11917 /*! @brief Set the TP3 field to a new value. */
Kojto 90:cb3d968589d8 11918 #define BW_AIPS_PACRP_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP3) = (v))
Kojto 90:cb3d968589d8 11919 /*@}*/
Kojto 90:cb3d968589d8 11920
Kojto 90:cb3d968589d8 11921 /*!
Kojto 90:cb3d968589d8 11922 * @name Register AIPS_PACRP, field WP3[17] (RW)
Kojto 90:cb3d968589d8 11923 *
Kojto 90:cb3d968589d8 11924 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 11925 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 11926 * no peripheral access initiates.
Kojto 90:cb3d968589d8 11927 *
Kojto 90:cb3d968589d8 11928 * Values:
Kojto 90:cb3d968589d8 11929 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 11930 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 11931 */
Kojto 90:cb3d968589d8 11932 /*@{*/
Kojto 90:cb3d968589d8 11933 #define BP_AIPS_PACRP_WP3 (17U) /*!< Bit position for AIPS_PACRP_WP3. */
Kojto 90:cb3d968589d8 11934 #define BM_AIPS_PACRP_WP3 (0x00020000U) /*!< Bit mask for AIPS_PACRP_WP3. */
Kojto 90:cb3d968589d8 11935 #define BS_AIPS_PACRP_WP3 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP3. */
Kojto 90:cb3d968589d8 11936
Kojto 90:cb3d968589d8 11937 /*! @brief Read current value of the AIPS_PACRP_WP3 field. */
Kojto 90:cb3d968589d8 11938 #define BR_AIPS_PACRP_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP3))
Kojto 90:cb3d968589d8 11939
Kojto 90:cb3d968589d8 11940 /*! @brief Format value for bitfield AIPS_PACRP_WP3. */
Kojto 90:cb3d968589d8 11941 #define BF_AIPS_PACRP_WP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP3) & BM_AIPS_PACRP_WP3)
Kojto 90:cb3d968589d8 11942
Kojto 90:cb3d968589d8 11943 /*! @brief Set the WP3 field to a new value. */
Kojto 90:cb3d968589d8 11944 #define BW_AIPS_PACRP_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP3) = (v))
Kojto 90:cb3d968589d8 11945 /*@}*/
Kojto 90:cb3d968589d8 11946
Kojto 90:cb3d968589d8 11947 /*!
Kojto 90:cb3d968589d8 11948 * @name Register AIPS_PACRP, field SP3[18] (RW)
Kojto 90:cb3d968589d8 11949 *
Kojto 90:cb3d968589d8 11950 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 11951 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 11952 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 11953 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 11954 * access initiates.
Kojto 90:cb3d968589d8 11955 *
Kojto 90:cb3d968589d8 11956 * Values:
Kojto 90:cb3d968589d8 11957 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 11958 * accesses.
Kojto 90:cb3d968589d8 11959 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 11960 */
Kojto 90:cb3d968589d8 11961 /*@{*/
Kojto 90:cb3d968589d8 11962 #define BP_AIPS_PACRP_SP3 (18U) /*!< Bit position for AIPS_PACRP_SP3. */
Kojto 90:cb3d968589d8 11963 #define BM_AIPS_PACRP_SP3 (0x00040000U) /*!< Bit mask for AIPS_PACRP_SP3. */
Kojto 90:cb3d968589d8 11964 #define BS_AIPS_PACRP_SP3 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP3. */
Kojto 90:cb3d968589d8 11965
Kojto 90:cb3d968589d8 11966 /*! @brief Read current value of the AIPS_PACRP_SP3 field. */
Kojto 90:cb3d968589d8 11967 #define BR_AIPS_PACRP_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP3))
Kojto 90:cb3d968589d8 11968
Kojto 90:cb3d968589d8 11969 /*! @brief Format value for bitfield AIPS_PACRP_SP3. */
Kojto 90:cb3d968589d8 11970 #define BF_AIPS_PACRP_SP3(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP3) & BM_AIPS_PACRP_SP3)
Kojto 90:cb3d968589d8 11971
Kojto 90:cb3d968589d8 11972 /*! @brief Set the SP3 field to a new value. */
Kojto 90:cb3d968589d8 11973 #define BW_AIPS_PACRP_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP3) = (v))
Kojto 90:cb3d968589d8 11974 /*@}*/
Kojto 90:cb3d968589d8 11975
Kojto 90:cb3d968589d8 11976 /*!
Kojto 90:cb3d968589d8 11977 * @name Register AIPS_PACRP, field TP2[20] (RW)
Kojto 90:cb3d968589d8 11978 *
Kojto 90:cb3d968589d8 11979 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 11980 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 11981 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 11982 *
Kojto 90:cb3d968589d8 11983 * Values:
Kojto 90:cb3d968589d8 11984 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 11985 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 11986 */
Kojto 90:cb3d968589d8 11987 /*@{*/
Kojto 90:cb3d968589d8 11988 #define BP_AIPS_PACRP_TP2 (20U) /*!< Bit position for AIPS_PACRP_TP2. */
Kojto 90:cb3d968589d8 11989 #define BM_AIPS_PACRP_TP2 (0x00100000U) /*!< Bit mask for AIPS_PACRP_TP2. */
Kojto 90:cb3d968589d8 11990 #define BS_AIPS_PACRP_TP2 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP2. */
Kojto 90:cb3d968589d8 11991
Kojto 90:cb3d968589d8 11992 /*! @brief Read current value of the AIPS_PACRP_TP2 field. */
Kojto 90:cb3d968589d8 11993 #define BR_AIPS_PACRP_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP2))
Kojto 90:cb3d968589d8 11994
Kojto 90:cb3d968589d8 11995 /*! @brief Format value for bitfield AIPS_PACRP_TP2. */
Kojto 90:cb3d968589d8 11996 #define BF_AIPS_PACRP_TP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP2) & BM_AIPS_PACRP_TP2)
Kojto 90:cb3d968589d8 11997
Kojto 90:cb3d968589d8 11998 /*! @brief Set the TP2 field to a new value. */
Kojto 90:cb3d968589d8 11999 #define BW_AIPS_PACRP_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP2) = (v))
Kojto 90:cb3d968589d8 12000 /*@}*/
Kojto 90:cb3d968589d8 12001
Kojto 90:cb3d968589d8 12002 /*!
Kojto 90:cb3d968589d8 12003 * @name Register AIPS_PACRP, field WP2[21] (RW)
Kojto 90:cb3d968589d8 12004 *
Kojto 90:cb3d968589d8 12005 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 12006 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 12007 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 12008 *
Kojto 90:cb3d968589d8 12009 * Values:
Kojto 90:cb3d968589d8 12010 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 12011 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 12012 */
Kojto 90:cb3d968589d8 12013 /*@{*/
Kojto 90:cb3d968589d8 12014 #define BP_AIPS_PACRP_WP2 (21U) /*!< Bit position for AIPS_PACRP_WP2. */
Kojto 90:cb3d968589d8 12015 #define BM_AIPS_PACRP_WP2 (0x00200000U) /*!< Bit mask for AIPS_PACRP_WP2. */
Kojto 90:cb3d968589d8 12016 #define BS_AIPS_PACRP_WP2 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP2. */
Kojto 90:cb3d968589d8 12017
Kojto 90:cb3d968589d8 12018 /*! @brief Read current value of the AIPS_PACRP_WP2 field. */
Kojto 90:cb3d968589d8 12019 #define BR_AIPS_PACRP_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP2))
Kojto 90:cb3d968589d8 12020
Kojto 90:cb3d968589d8 12021 /*! @brief Format value for bitfield AIPS_PACRP_WP2. */
Kojto 90:cb3d968589d8 12022 #define BF_AIPS_PACRP_WP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP2) & BM_AIPS_PACRP_WP2)
Kojto 90:cb3d968589d8 12023
Kojto 90:cb3d968589d8 12024 /*! @brief Set the WP2 field to a new value. */
Kojto 90:cb3d968589d8 12025 #define BW_AIPS_PACRP_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP2) = (v))
Kojto 90:cb3d968589d8 12026 /*@}*/
Kojto 90:cb3d968589d8 12027
Kojto 90:cb3d968589d8 12028 /*!
Kojto 90:cb3d968589d8 12029 * @name Register AIPS_PACRP, field SP2[22] (RW)
Kojto 90:cb3d968589d8 12030 *
Kojto 90:cb3d968589d8 12031 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 12032 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 12033 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 12034 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 12035 * initiates.
Kojto 90:cb3d968589d8 12036 *
Kojto 90:cb3d968589d8 12037 * Values:
Kojto 90:cb3d968589d8 12038 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 12039 * accesses.
Kojto 90:cb3d968589d8 12040 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 12041 */
Kojto 90:cb3d968589d8 12042 /*@{*/
Kojto 90:cb3d968589d8 12043 #define BP_AIPS_PACRP_SP2 (22U) /*!< Bit position for AIPS_PACRP_SP2. */
Kojto 90:cb3d968589d8 12044 #define BM_AIPS_PACRP_SP2 (0x00400000U) /*!< Bit mask for AIPS_PACRP_SP2. */
Kojto 90:cb3d968589d8 12045 #define BS_AIPS_PACRP_SP2 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP2. */
Kojto 90:cb3d968589d8 12046
Kojto 90:cb3d968589d8 12047 /*! @brief Read current value of the AIPS_PACRP_SP2 field. */
Kojto 90:cb3d968589d8 12048 #define BR_AIPS_PACRP_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP2))
Kojto 90:cb3d968589d8 12049
Kojto 90:cb3d968589d8 12050 /*! @brief Format value for bitfield AIPS_PACRP_SP2. */
Kojto 90:cb3d968589d8 12051 #define BF_AIPS_PACRP_SP2(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP2) & BM_AIPS_PACRP_SP2)
Kojto 90:cb3d968589d8 12052
Kojto 90:cb3d968589d8 12053 /*! @brief Set the SP2 field to a new value. */
Kojto 90:cb3d968589d8 12054 #define BW_AIPS_PACRP_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP2) = (v))
Kojto 90:cb3d968589d8 12055 /*@}*/
Kojto 90:cb3d968589d8 12056
Kojto 90:cb3d968589d8 12057 /*!
Kojto 90:cb3d968589d8 12058 * @name Register AIPS_PACRP, field TP1[24] (RW)
Kojto 90:cb3d968589d8 12059 *
Kojto 90:cb3d968589d8 12060 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 12061 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 12062 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 12063 *
Kojto 90:cb3d968589d8 12064 * Values:
Kojto 90:cb3d968589d8 12065 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 12066 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 12067 */
Kojto 90:cb3d968589d8 12068 /*@{*/
Kojto 90:cb3d968589d8 12069 #define BP_AIPS_PACRP_TP1 (24U) /*!< Bit position for AIPS_PACRP_TP1. */
Kojto 90:cb3d968589d8 12070 #define BM_AIPS_PACRP_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRP_TP1. */
Kojto 90:cb3d968589d8 12071 #define BS_AIPS_PACRP_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP1. */
Kojto 90:cb3d968589d8 12072
Kojto 90:cb3d968589d8 12073 /*! @brief Read current value of the AIPS_PACRP_TP1 field. */
Kojto 90:cb3d968589d8 12074 #define BR_AIPS_PACRP_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP1))
Kojto 90:cb3d968589d8 12075
Kojto 90:cb3d968589d8 12076 /*! @brief Format value for bitfield AIPS_PACRP_TP1. */
Kojto 90:cb3d968589d8 12077 #define BF_AIPS_PACRP_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP1) & BM_AIPS_PACRP_TP1)
Kojto 90:cb3d968589d8 12078
Kojto 90:cb3d968589d8 12079 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 12080 #define BW_AIPS_PACRP_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP1) = (v))
Kojto 90:cb3d968589d8 12081 /*@}*/
Kojto 90:cb3d968589d8 12082
Kojto 90:cb3d968589d8 12083 /*!
Kojto 90:cb3d968589d8 12084 * @name Register AIPS_PACRP, field WP1[25] (RW)
Kojto 90:cb3d968589d8 12085 *
Kojto 90:cb3d968589d8 12086 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 12087 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 12088 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 12089 *
Kojto 90:cb3d968589d8 12090 * Values:
Kojto 90:cb3d968589d8 12091 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 12092 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 12093 */
Kojto 90:cb3d968589d8 12094 /*@{*/
Kojto 90:cb3d968589d8 12095 #define BP_AIPS_PACRP_WP1 (25U) /*!< Bit position for AIPS_PACRP_WP1. */
Kojto 90:cb3d968589d8 12096 #define BM_AIPS_PACRP_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRP_WP1. */
Kojto 90:cb3d968589d8 12097 #define BS_AIPS_PACRP_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP1. */
Kojto 90:cb3d968589d8 12098
Kojto 90:cb3d968589d8 12099 /*! @brief Read current value of the AIPS_PACRP_WP1 field. */
Kojto 90:cb3d968589d8 12100 #define BR_AIPS_PACRP_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP1))
Kojto 90:cb3d968589d8 12101
Kojto 90:cb3d968589d8 12102 /*! @brief Format value for bitfield AIPS_PACRP_WP1. */
Kojto 90:cb3d968589d8 12103 #define BF_AIPS_PACRP_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP1) & BM_AIPS_PACRP_WP1)
Kojto 90:cb3d968589d8 12104
Kojto 90:cb3d968589d8 12105 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 12106 #define BW_AIPS_PACRP_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP1) = (v))
Kojto 90:cb3d968589d8 12107 /*@}*/
Kojto 90:cb3d968589d8 12108
Kojto 90:cb3d968589d8 12109 /*!
Kojto 90:cb3d968589d8 12110 * @name Register AIPS_PACRP, field SP1[26] (RW)
Kojto 90:cb3d968589d8 12111 *
Kojto 90:cb3d968589d8 12112 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 12113 * access. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 12114 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
Kojto 90:cb3d968589d8 12115 * be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 12116 * access initiates.
Kojto 90:cb3d968589d8 12117 *
Kojto 90:cb3d968589d8 12118 * Values:
Kojto 90:cb3d968589d8 12119 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 12120 * accesses.
Kojto 90:cb3d968589d8 12121 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 12122 */
Kojto 90:cb3d968589d8 12123 /*@{*/
Kojto 90:cb3d968589d8 12124 #define BP_AIPS_PACRP_SP1 (26U) /*!< Bit position for AIPS_PACRP_SP1. */
Kojto 90:cb3d968589d8 12125 #define BM_AIPS_PACRP_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRP_SP1. */
Kojto 90:cb3d968589d8 12126 #define BS_AIPS_PACRP_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP1. */
Kojto 90:cb3d968589d8 12127
Kojto 90:cb3d968589d8 12128 /*! @brief Read current value of the AIPS_PACRP_SP1 field. */
Kojto 90:cb3d968589d8 12129 #define BR_AIPS_PACRP_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP1))
Kojto 90:cb3d968589d8 12130
Kojto 90:cb3d968589d8 12131 /*! @brief Format value for bitfield AIPS_PACRP_SP1. */
Kojto 90:cb3d968589d8 12132 #define BF_AIPS_PACRP_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP1) & BM_AIPS_PACRP_SP1)
Kojto 90:cb3d968589d8 12133
Kojto 90:cb3d968589d8 12134 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 12135 #define BW_AIPS_PACRP_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP1) = (v))
Kojto 90:cb3d968589d8 12136 /*@}*/
Kojto 90:cb3d968589d8 12137
Kojto 90:cb3d968589d8 12138 /*!
Kojto 90:cb3d968589d8 12139 * @name Register AIPS_PACRP, field TP0[28] (RW)
Kojto 90:cb3d968589d8 12140 *
Kojto 90:cb3d968589d8 12141 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 12142 * When this bit is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 12143 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 12144 *
Kojto 90:cb3d968589d8 12145 * Values:
Kojto 90:cb3d968589d8 12146 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 12147 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 12148 */
Kojto 90:cb3d968589d8 12149 /*@{*/
Kojto 90:cb3d968589d8 12150 #define BP_AIPS_PACRP_TP0 (28U) /*!< Bit position for AIPS_PACRP_TP0. */
Kojto 90:cb3d968589d8 12151 #define BM_AIPS_PACRP_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRP_TP0. */
Kojto 90:cb3d968589d8 12152 #define BS_AIPS_PACRP_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRP_TP0. */
Kojto 90:cb3d968589d8 12153
Kojto 90:cb3d968589d8 12154 /*! @brief Read current value of the AIPS_PACRP_TP0 field. */
Kojto 90:cb3d968589d8 12155 #define BR_AIPS_PACRP_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP0))
Kojto 90:cb3d968589d8 12156
Kojto 90:cb3d968589d8 12157 /*! @brief Format value for bitfield AIPS_PACRP_TP0. */
Kojto 90:cb3d968589d8 12158 #define BF_AIPS_PACRP_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_TP0) & BM_AIPS_PACRP_TP0)
Kojto 90:cb3d968589d8 12159
Kojto 90:cb3d968589d8 12160 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 12161 #define BW_AIPS_PACRP_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP0) = (v))
Kojto 90:cb3d968589d8 12162 /*@}*/
Kojto 90:cb3d968589d8 12163
Kojto 90:cb3d968589d8 12164 /*!
Kojto 90:cb3d968589d8 12165 * @name Register AIPS_PACRP, field WP0[29] (RW)
Kojto 90:cb3d968589d8 12166 *
Kojto 90:cb3d968589d8 12167 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 12168 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 12169 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 12170 *
Kojto 90:cb3d968589d8 12171 * Values:
Kojto 90:cb3d968589d8 12172 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 12173 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 12174 */
Kojto 90:cb3d968589d8 12175 /*@{*/
Kojto 90:cb3d968589d8 12176 #define BP_AIPS_PACRP_WP0 (29U) /*!< Bit position for AIPS_PACRP_WP0. */
Kojto 90:cb3d968589d8 12177 #define BM_AIPS_PACRP_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRP_WP0. */
Kojto 90:cb3d968589d8 12178 #define BS_AIPS_PACRP_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRP_WP0. */
Kojto 90:cb3d968589d8 12179
Kojto 90:cb3d968589d8 12180 /*! @brief Read current value of the AIPS_PACRP_WP0 field. */
Kojto 90:cb3d968589d8 12181 #define BR_AIPS_PACRP_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP0))
Kojto 90:cb3d968589d8 12182
Kojto 90:cb3d968589d8 12183 /*! @brief Format value for bitfield AIPS_PACRP_WP0. */
Kojto 90:cb3d968589d8 12184 #define BF_AIPS_PACRP_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_WP0) & BM_AIPS_PACRP_WP0)
Kojto 90:cb3d968589d8 12185
Kojto 90:cb3d968589d8 12186 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 12187 #define BW_AIPS_PACRP_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP0) = (v))
Kojto 90:cb3d968589d8 12188 /*@}*/
Kojto 90:cb3d968589d8 12189
Kojto 90:cb3d968589d8 12190 /*!
Kojto 90:cb3d968589d8 12191 * @name Register AIPS_PACRP, field SP0[30] (RW)
Kojto 90:cb3d968589d8 12192 *
Kojto 90:cb3d968589d8 12193 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 12194 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 12195 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 12196 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 12197 * access initiates.
Kojto 90:cb3d968589d8 12198 *
Kojto 90:cb3d968589d8 12199 * Values:
Kojto 90:cb3d968589d8 12200 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 12201 * accesses.
Kojto 90:cb3d968589d8 12202 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 12203 */
Kojto 90:cb3d968589d8 12204 /*@{*/
Kojto 90:cb3d968589d8 12205 #define BP_AIPS_PACRP_SP0 (30U) /*!< Bit position for AIPS_PACRP_SP0. */
Kojto 90:cb3d968589d8 12206 #define BM_AIPS_PACRP_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRP_SP0. */
Kojto 90:cb3d968589d8 12207 #define BS_AIPS_PACRP_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRP_SP0. */
Kojto 90:cb3d968589d8 12208
Kojto 90:cb3d968589d8 12209 /*! @brief Read current value of the AIPS_PACRP_SP0 field. */
Kojto 90:cb3d968589d8 12210 #define BR_AIPS_PACRP_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP0))
Kojto 90:cb3d968589d8 12211
Kojto 90:cb3d968589d8 12212 /*! @brief Format value for bitfield AIPS_PACRP_SP0. */
Kojto 90:cb3d968589d8 12213 #define BF_AIPS_PACRP_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRP_SP0) & BM_AIPS_PACRP_SP0)
Kojto 90:cb3d968589d8 12214
Kojto 90:cb3d968589d8 12215 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 12216 #define BW_AIPS_PACRP_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP0) = (v))
Kojto 90:cb3d968589d8 12217 /*@}*/
Kojto 90:cb3d968589d8 12218
Kojto 90:cb3d968589d8 12219 /*******************************************************************************
Kojto 90:cb3d968589d8 12220 * HW_AIPS_PACRU - Peripheral Access Control Register
Kojto 90:cb3d968589d8 12221 ******************************************************************************/
Kojto 90:cb3d968589d8 12222
Kojto 90:cb3d968589d8 12223 /*!
Kojto 90:cb3d968589d8 12224 * @brief HW_AIPS_PACRU - Peripheral Access Control Register (RW)
Kojto 90:cb3d968589d8 12225 *
Kojto 90:cb3d968589d8 12226 * Reset value: 0x44000000U
Kojto 90:cb3d968589d8 12227 *
Kojto 90:cb3d968589d8 12228 * PACRU defines the access levels for the two global spaces.
Kojto 90:cb3d968589d8 12229 */
Kojto 90:cb3d968589d8 12230 typedef union _hw_aips_pacru
Kojto 90:cb3d968589d8 12231 {
Kojto 90:cb3d968589d8 12232 uint32_t U;
Kojto 90:cb3d968589d8 12233 struct _hw_aips_pacru_bitfields
Kojto 90:cb3d968589d8 12234 {
Kojto 90:cb3d968589d8 12235 uint32_t RESERVED0 : 24; /*!< [23:0] */
Kojto 90:cb3d968589d8 12236 uint32_t TP1 : 1; /*!< [24] Trusted Protect */
Kojto 90:cb3d968589d8 12237 uint32_t WP1 : 1; /*!< [25] Write Protect */
Kojto 90:cb3d968589d8 12238 uint32_t SP1 : 1; /*!< [26] Supervisor Protect */
Kojto 90:cb3d968589d8 12239 uint32_t RESERVED1 : 1; /*!< [27] */
Kojto 90:cb3d968589d8 12240 uint32_t TP0 : 1; /*!< [28] Trusted Protect */
Kojto 90:cb3d968589d8 12241 uint32_t WP0 : 1; /*!< [29] Write Protect */
Kojto 90:cb3d968589d8 12242 uint32_t SP0 : 1; /*!< [30] Supervisor Protect */
Kojto 90:cb3d968589d8 12243 uint32_t RESERVED2 : 1; /*!< [31] */
Kojto 90:cb3d968589d8 12244 } B;
Kojto 90:cb3d968589d8 12245 } hw_aips_pacru_t;
Kojto 90:cb3d968589d8 12246
Kojto 90:cb3d968589d8 12247 /*!
Kojto 90:cb3d968589d8 12248 * @name Constants and macros for entire AIPS_PACRU register
Kojto 90:cb3d968589d8 12249 */
Kojto 90:cb3d968589d8 12250 /*@{*/
Kojto 90:cb3d968589d8 12251 #define HW_AIPS_PACRU_ADDR(x) ((x) + 0x80U)
Kojto 90:cb3d968589d8 12252
Kojto 90:cb3d968589d8 12253 #define HW_AIPS_PACRU(x) (*(__IO hw_aips_pacru_t *) HW_AIPS_PACRU_ADDR(x))
Kojto 90:cb3d968589d8 12254 #define HW_AIPS_PACRU_RD(x) (HW_AIPS_PACRU(x).U)
Kojto 90:cb3d968589d8 12255 #define HW_AIPS_PACRU_WR(x, v) (HW_AIPS_PACRU(x).U = (v))
Kojto 90:cb3d968589d8 12256 #define HW_AIPS_PACRU_SET(x, v) (HW_AIPS_PACRU_WR(x, HW_AIPS_PACRU_RD(x) | (v)))
Kojto 90:cb3d968589d8 12257 #define HW_AIPS_PACRU_CLR(x, v) (HW_AIPS_PACRU_WR(x, HW_AIPS_PACRU_RD(x) & ~(v)))
Kojto 90:cb3d968589d8 12258 #define HW_AIPS_PACRU_TOG(x, v) (HW_AIPS_PACRU_WR(x, HW_AIPS_PACRU_RD(x) ^ (v)))
Kojto 90:cb3d968589d8 12259 /*@}*/
Kojto 90:cb3d968589d8 12260
Kojto 90:cb3d968589d8 12261 /*
Kojto 90:cb3d968589d8 12262 * Constants & macros for individual AIPS_PACRU bitfields
Kojto 90:cb3d968589d8 12263 */
Kojto 90:cb3d968589d8 12264
Kojto 90:cb3d968589d8 12265 /*!
Kojto 90:cb3d968589d8 12266 * @name Register AIPS_PACRU, field TP1[24] (RW)
Kojto 90:cb3d968589d8 12267 *
Kojto 90:cb3d968589d8 12268 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 12269 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 12270 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 12271 *
Kojto 90:cb3d968589d8 12272 * Values:
Kojto 90:cb3d968589d8 12273 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 12274 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 12275 */
Kojto 90:cb3d968589d8 12276 /*@{*/
Kojto 90:cb3d968589d8 12277 #define BP_AIPS_PACRU_TP1 (24U) /*!< Bit position for AIPS_PACRU_TP1. */
Kojto 90:cb3d968589d8 12278 #define BM_AIPS_PACRU_TP1 (0x01000000U) /*!< Bit mask for AIPS_PACRU_TP1. */
Kojto 90:cb3d968589d8 12279 #define BS_AIPS_PACRU_TP1 (1U) /*!< Bit field size in bits for AIPS_PACRU_TP1. */
Kojto 90:cb3d968589d8 12280
Kojto 90:cb3d968589d8 12281 /*! @brief Read current value of the AIPS_PACRU_TP1 field. */
Kojto 90:cb3d968589d8 12282 #define BR_AIPS_PACRU_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP1))
Kojto 90:cb3d968589d8 12283
Kojto 90:cb3d968589d8 12284 /*! @brief Format value for bitfield AIPS_PACRU_TP1. */
Kojto 90:cb3d968589d8 12285 #define BF_AIPS_PACRU_TP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_TP1) & BM_AIPS_PACRU_TP1)
Kojto 90:cb3d968589d8 12286
Kojto 90:cb3d968589d8 12287 /*! @brief Set the TP1 field to a new value. */
Kojto 90:cb3d968589d8 12288 #define BW_AIPS_PACRU_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP1) = (v))
Kojto 90:cb3d968589d8 12289 /*@}*/
Kojto 90:cb3d968589d8 12290
Kojto 90:cb3d968589d8 12291 /*!
Kojto 90:cb3d968589d8 12292 * @name Register AIPS_PACRU, field WP1[25] (RW)
Kojto 90:cb3d968589d8 12293 *
Kojto 90:cb3d968589d8 12294 * Determines whether the peripheral allows write accesss. When this bit is set
Kojto 90:cb3d968589d8 12295 * and a write access is attempted, access terminates with an error response and
Kojto 90:cb3d968589d8 12296 * no peripheral access initiates.
Kojto 90:cb3d968589d8 12297 *
Kojto 90:cb3d968589d8 12298 * Values:
Kojto 90:cb3d968589d8 12299 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 12300 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 12301 */
Kojto 90:cb3d968589d8 12302 /*@{*/
Kojto 90:cb3d968589d8 12303 #define BP_AIPS_PACRU_WP1 (25U) /*!< Bit position for AIPS_PACRU_WP1. */
Kojto 90:cb3d968589d8 12304 #define BM_AIPS_PACRU_WP1 (0x02000000U) /*!< Bit mask for AIPS_PACRU_WP1. */
Kojto 90:cb3d968589d8 12305 #define BS_AIPS_PACRU_WP1 (1U) /*!< Bit field size in bits for AIPS_PACRU_WP1. */
Kojto 90:cb3d968589d8 12306
Kojto 90:cb3d968589d8 12307 /*! @brief Read current value of the AIPS_PACRU_WP1 field. */
Kojto 90:cb3d968589d8 12308 #define BR_AIPS_PACRU_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP1))
Kojto 90:cb3d968589d8 12309
Kojto 90:cb3d968589d8 12310 /*! @brief Format value for bitfield AIPS_PACRU_WP1. */
Kojto 90:cb3d968589d8 12311 #define BF_AIPS_PACRU_WP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_WP1) & BM_AIPS_PACRU_WP1)
Kojto 90:cb3d968589d8 12312
Kojto 90:cb3d968589d8 12313 /*! @brief Set the WP1 field to a new value. */
Kojto 90:cb3d968589d8 12314 #define BW_AIPS_PACRU_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP1) = (v))
Kojto 90:cb3d968589d8 12315 /*@}*/
Kojto 90:cb3d968589d8 12316
Kojto 90:cb3d968589d8 12317 /*!
Kojto 90:cb3d968589d8 12318 * @name Register AIPS_PACRU, field SP1[26] (RW)
Kojto 90:cb3d968589d8 12319 *
Kojto 90:cb3d968589d8 12320 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 12321 * accesses. When this field is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 12322 * supervisor access attribute, and the MPRx[MPLn] control field for the master
Kojto 90:cb3d968589d8 12323 * must be set. If not, access terminates with an error response and no peripheral
Kojto 90:cb3d968589d8 12324 * access initiates.
Kojto 90:cb3d968589d8 12325 *
Kojto 90:cb3d968589d8 12326 * Values:
Kojto 90:cb3d968589d8 12327 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 12328 * accesses.
Kojto 90:cb3d968589d8 12329 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 12330 */
Kojto 90:cb3d968589d8 12331 /*@{*/
Kojto 90:cb3d968589d8 12332 #define BP_AIPS_PACRU_SP1 (26U) /*!< Bit position for AIPS_PACRU_SP1. */
Kojto 90:cb3d968589d8 12333 #define BM_AIPS_PACRU_SP1 (0x04000000U) /*!< Bit mask for AIPS_PACRU_SP1. */
Kojto 90:cb3d968589d8 12334 #define BS_AIPS_PACRU_SP1 (1U) /*!< Bit field size in bits for AIPS_PACRU_SP1. */
Kojto 90:cb3d968589d8 12335
Kojto 90:cb3d968589d8 12336 /*! @brief Read current value of the AIPS_PACRU_SP1 field. */
Kojto 90:cb3d968589d8 12337 #define BR_AIPS_PACRU_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP1))
Kojto 90:cb3d968589d8 12338
Kojto 90:cb3d968589d8 12339 /*! @brief Format value for bitfield AIPS_PACRU_SP1. */
Kojto 90:cb3d968589d8 12340 #define BF_AIPS_PACRU_SP1(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_SP1) & BM_AIPS_PACRU_SP1)
Kojto 90:cb3d968589d8 12341
Kojto 90:cb3d968589d8 12342 /*! @brief Set the SP1 field to a new value. */
Kojto 90:cb3d968589d8 12343 #define BW_AIPS_PACRU_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP1) = (v))
Kojto 90:cb3d968589d8 12344 /*@}*/
Kojto 90:cb3d968589d8 12345
Kojto 90:cb3d968589d8 12346 /*!
Kojto 90:cb3d968589d8 12347 * @name Register AIPS_PACRU, field TP0[28] (RW)
Kojto 90:cb3d968589d8 12348 *
Kojto 90:cb3d968589d8 12349 * Determines whether the peripheral allows accesses from an untrusted master.
Kojto 90:cb3d968589d8 12350 * When this field is set and an access is attempted by an untrusted master, the
Kojto 90:cb3d968589d8 12351 * access terminates with an error response and no peripheral access initiates.
Kojto 90:cb3d968589d8 12352 *
Kojto 90:cb3d968589d8 12353 * Values:
Kojto 90:cb3d968589d8 12354 * - 0 - Accesses from an untrusted master are allowed.
Kojto 90:cb3d968589d8 12355 * - 1 - Accesses from an untrusted master are not allowed.
Kojto 90:cb3d968589d8 12356 */
Kojto 90:cb3d968589d8 12357 /*@{*/
Kojto 90:cb3d968589d8 12358 #define BP_AIPS_PACRU_TP0 (28U) /*!< Bit position for AIPS_PACRU_TP0. */
Kojto 90:cb3d968589d8 12359 #define BM_AIPS_PACRU_TP0 (0x10000000U) /*!< Bit mask for AIPS_PACRU_TP0. */
Kojto 90:cb3d968589d8 12360 #define BS_AIPS_PACRU_TP0 (1U) /*!< Bit field size in bits for AIPS_PACRU_TP0. */
Kojto 90:cb3d968589d8 12361
Kojto 90:cb3d968589d8 12362 /*! @brief Read current value of the AIPS_PACRU_TP0 field. */
Kojto 90:cb3d968589d8 12363 #define BR_AIPS_PACRU_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP0))
Kojto 90:cb3d968589d8 12364
Kojto 90:cb3d968589d8 12365 /*! @brief Format value for bitfield AIPS_PACRU_TP0. */
Kojto 90:cb3d968589d8 12366 #define BF_AIPS_PACRU_TP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_TP0) & BM_AIPS_PACRU_TP0)
Kojto 90:cb3d968589d8 12367
Kojto 90:cb3d968589d8 12368 /*! @brief Set the TP0 field to a new value. */
Kojto 90:cb3d968589d8 12369 #define BW_AIPS_PACRU_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP0) = (v))
Kojto 90:cb3d968589d8 12370 /*@}*/
Kojto 90:cb3d968589d8 12371
Kojto 90:cb3d968589d8 12372 /*!
Kojto 90:cb3d968589d8 12373 * @name Register AIPS_PACRU, field WP0[29] (RW)
Kojto 90:cb3d968589d8 12374 *
Kojto 90:cb3d968589d8 12375 * Determines whether the peripheral allows write accesses. When this field is
Kojto 90:cb3d968589d8 12376 * set and a write access is attempted, access terminates with an error response
Kojto 90:cb3d968589d8 12377 * and no peripheral access initiates.
Kojto 90:cb3d968589d8 12378 *
Kojto 90:cb3d968589d8 12379 * Values:
Kojto 90:cb3d968589d8 12380 * - 0 - This peripheral allows write accesses.
Kojto 90:cb3d968589d8 12381 * - 1 - This peripheral is write protected.
Kojto 90:cb3d968589d8 12382 */
Kojto 90:cb3d968589d8 12383 /*@{*/
Kojto 90:cb3d968589d8 12384 #define BP_AIPS_PACRU_WP0 (29U) /*!< Bit position for AIPS_PACRU_WP0. */
Kojto 90:cb3d968589d8 12385 #define BM_AIPS_PACRU_WP0 (0x20000000U) /*!< Bit mask for AIPS_PACRU_WP0. */
Kojto 90:cb3d968589d8 12386 #define BS_AIPS_PACRU_WP0 (1U) /*!< Bit field size in bits for AIPS_PACRU_WP0. */
Kojto 90:cb3d968589d8 12387
Kojto 90:cb3d968589d8 12388 /*! @brief Read current value of the AIPS_PACRU_WP0 field. */
Kojto 90:cb3d968589d8 12389 #define BR_AIPS_PACRU_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP0))
Kojto 90:cb3d968589d8 12390
Kojto 90:cb3d968589d8 12391 /*! @brief Format value for bitfield AIPS_PACRU_WP0. */
Kojto 90:cb3d968589d8 12392 #define BF_AIPS_PACRU_WP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_WP0) & BM_AIPS_PACRU_WP0)
Kojto 90:cb3d968589d8 12393
Kojto 90:cb3d968589d8 12394 /*! @brief Set the WP0 field to a new value. */
Kojto 90:cb3d968589d8 12395 #define BW_AIPS_PACRU_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP0) = (v))
Kojto 90:cb3d968589d8 12396 /*@}*/
Kojto 90:cb3d968589d8 12397
Kojto 90:cb3d968589d8 12398 /*!
Kojto 90:cb3d968589d8 12399 * @name Register AIPS_PACRU, field SP0[30] (RW)
Kojto 90:cb3d968589d8 12400 *
Kojto 90:cb3d968589d8 12401 * Determines whether the peripheral requires supervisor privilege level for
Kojto 90:cb3d968589d8 12402 * access. When this bit is set, the master privilege level must indicate the
Kojto 90:cb3d968589d8 12403 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
Kojto 90:cb3d968589d8 12404 * set. If not, access terminates with an error response and no peripheral access
Kojto 90:cb3d968589d8 12405 * initiates.
Kojto 90:cb3d968589d8 12406 *
Kojto 90:cb3d968589d8 12407 * Values:
Kojto 90:cb3d968589d8 12408 * - 0 - This peripheral does not require supervisor privilege level for
Kojto 90:cb3d968589d8 12409 * accesses.
Kojto 90:cb3d968589d8 12410 * - 1 - This peripheral requires supervisor privilege level for accesses.
Kojto 90:cb3d968589d8 12411 */
Kojto 90:cb3d968589d8 12412 /*@{*/
Kojto 90:cb3d968589d8 12413 #define BP_AIPS_PACRU_SP0 (30U) /*!< Bit position for AIPS_PACRU_SP0. */
Kojto 90:cb3d968589d8 12414 #define BM_AIPS_PACRU_SP0 (0x40000000U) /*!< Bit mask for AIPS_PACRU_SP0. */
Kojto 90:cb3d968589d8 12415 #define BS_AIPS_PACRU_SP0 (1U) /*!< Bit field size in bits for AIPS_PACRU_SP0. */
Kojto 90:cb3d968589d8 12416
Kojto 90:cb3d968589d8 12417 /*! @brief Read current value of the AIPS_PACRU_SP0 field. */
Kojto 90:cb3d968589d8 12418 #define BR_AIPS_PACRU_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP0))
Kojto 90:cb3d968589d8 12419
Kojto 90:cb3d968589d8 12420 /*! @brief Format value for bitfield AIPS_PACRU_SP0. */
Kojto 90:cb3d968589d8 12421 #define BF_AIPS_PACRU_SP0(v) ((uint32_t)((uint32_t)(v) << BP_AIPS_PACRU_SP0) & BM_AIPS_PACRU_SP0)
Kojto 90:cb3d968589d8 12422
Kojto 90:cb3d968589d8 12423 /*! @brief Set the SP0 field to a new value. */
Kojto 90:cb3d968589d8 12424 #define BW_AIPS_PACRU_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP0) = (v))
Kojto 90:cb3d968589d8 12425 /*@}*/
Kojto 90:cb3d968589d8 12426
Kojto 90:cb3d968589d8 12427 /*******************************************************************************
Kojto 90:cb3d968589d8 12428 * hw_aips_t - module struct
Kojto 90:cb3d968589d8 12429 ******************************************************************************/
Kojto 90:cb3d968589d8 12430 /*!
Kojto 90:cb3d968589d8 12431 * @brief All AIPS module registers.
Kojto 90:cb3d968589d8 12432 */
Kojto 90:cb3d968589d8 12433 #pragma pack(1)
Kojto 90:cb3d968589d8 12434 typedef struct _hw_aips
Kojto 90:cb3d968589d8 12435 {
Kojto 90:cb3d968589d8 12436 __IO hw_aips_mpra_t MPRA; /*!< [0x0] Master Privilege Register A */
Kojto 90:cb3d968589d8 12437 uint8_t _reserved0[28];
Kojto 90:cb3d968589d8 12438 __IO hw_aips_pacra_t PACRA; /*!< [0x20] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12439 __IO hw_aips_pacrb_t PACRB; /*!< [0x24] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12440 __IO hw_aips_pacrc_t PACRC; /*!< [0x28] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12441 __IO hw_aips_pacrd_t PACRD; /*!< [0x2C] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12442 uint8_t _reserved1[16];
Kojto 90:cb3d968589d8 12443 __IO hw_aips_pacre_t PACRE; /*!< [0x40] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12444 __IO hw_aips_pacrf_t PACRF; /*!< [0x44] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12445 __IO hw_aips_pacrg_t PACRG; /*!< [0x48] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12446 __IO hw_aips_pacrh_t PACRH; /*!< [0x4C] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12447 __IO hw_aips_pacri_t PACRI; /*!< [0x50] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12448 __IO hw_aips_pacrj_t PACRJ; /*!< [0x54] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12449 __IO hw_aips_pacrk_t PACRK; /*!< [0x58] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12450 __IO hw_aips_pacrl_t PACRL; /*!< [0x5C] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12451 __IO hw_aips_pacrm_t PACRM; /*!< [0x60] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12452 __IO hw_aips_pacrn_t PACRN; /*!< [0x64] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12453 __IO hw_aips_pacro_t PACRO; /*!< [0x68] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12454 __IO hw_aips_pacrp_t PACRP; /*!< [0x6C] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12455 uint8_t _reserved2[16];
Kojto 90:cb3d968589d8 12456 __IO hw_aips_pacru_t PACRU; /*!< [0x80] Peripheral Access Control Register */
Kojto 90:cb3d968589d8 12457 } hw_aips_t;
Kojto 90:cb3d968589d8 12458 #pragma pack()
Kojto 90:cb3d968589d8 12459
Kojto 90:cb3d968589d8 12460 /*! @brief Macro to access all AIPS registers. */
Kojto 90:cb3d968589d8 12461 /*! @param x AIPS module instance base address. */
Kojto 90:cb3d968589d8 12462 /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
Kojto 90:cb3d968589d8 12463 * use the '&' operator, like <code>&HW_AIPS(AIPS0_BASE)</code>. */
Kojto 90:cb3d968589d8 12464 #define HW_AIPS(x) (*(hw_aips_t *)(x))
Kojto 90:cb3d968589d8 12465
Kojto 90:cb3d968589d8 12466 #endif /* __HW_AIPS_REGISTERS_H__ */
Kojto 90:cb3d968589d8 12467 /* EOF */