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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_XADOW_M0/core_cmFunc.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
110:165afa46840b 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 87:6213f644d804 1 /**************************************************************************//**
bogdanm 87:6213f644d804 2 * @file core_cmFunc.h
bogdanm 87:6213f644d804 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 110:165afa46840b 4 * @version V4.10
Kojto 110:165afa46840b 5 * @date 18. March 2015
bogdanm 87:6213f644d804 6 *
bogdanm 87:6213f644d804 7 * @note
bogdanm 87:6213f644d804 8 *
bogdanm 87:6213f644d804 9 ******************************************************************************/
Kojto 110:165afa46840b 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
bogdanm 87:6213f644d804 11
bogdanm 87:6213f644d804 12 All rights reserved.
bogdanm 87:6213f644d804 13 Redistribution and use in source and binary forms, with or without
bogdanm 87:6213f644d804 14 modification, are permitted provided that the following conditions are met:
bogdanm 87:6213f644d804 15 - Redistributions of source code must retain the above copyright
bogdanm 87:6213f644d804 16 notice, this list of conditions and the following disclaimer.
bogdanm 87:6213f644d804 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 87:6213f644d804 18 notice, this list of conditions and the following disclaimer in the
bogdanm 87:6213f644d804 19 documentation and/or other materials provided with the distribution.
bogdanm 87:6213f644d804 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 87:6213f644d804 21 to endorse or promote products derived from this software without
bogdanm 87:6213f644d804 22 specific prior written permission.
bogdanm 87:6213f644d804 23 *
bogdanm 87:6213f644d804 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 87:6213f644d804 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 87:6213f644d804 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 87:6213f644d804 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 87:6213f644d804 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 87:6213f644d804 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 87:6213f644d804 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 87:6213f644d804 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 87:6213f644d804 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 87:6213f644d804 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 87:6213f644d804 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 87:6213f644d804 35 ---------------------------------------------------------------------------*/
bogdanm 87:6213f644d804 36
bogdanm 87:6213f644d804 37
bogdanm 87:6213f644d804 38 #ifndef __CORE_CMFUNC_H
bogdanm 87:6213f644d804 39 #define __CORE_CMFUNC_H
bogdanm 87:6213f644d804 40
bogdanm 87:6213f644d804 41
bogdanm 87:6213f644d804 42 /* ########################### Core Function Access ########################### */
bogdanm 87:6213f644d804 43 /** \ingroup CMSIS_Core_FunctionInterface
bogdanm 87:6213f644d804 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
bogdanm 87:6213f644d804 45 @{
bogdanm 87:6213f644d804 46 */
bogdanm 87:6213f644d804 47
bogdanm 87:6213f644d804 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 87:6213f644d804 49 /* ARM armcc specific functions */
bogdanm 87:6213f644d804 50
bogdanm 87:6213f644d804 51 #if (__ARMCC_VERSION < 400677)
bogdanm 87:6213f644d804 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 87:6213f644d804 53 #endif
bogdanm 87:6213f644d804 54
bogdanm 87:6213f644d804 55 /* intrinsic void __enable_irq(); */
bogdanm 87:6213f644d804 56 /* intrinsic void __disable_irq(); */
bogdanm 87:6213f644d804 57
bogdanm 87:6213f644d804 58 /** \brief Get Control Register
bogdanm 87:6213f644d804 59
bogdanm 87:6213f644d804 60 This function returns the content of the Control Register.
bogdanm 87:6213f644d804 61
bogdanm 87:6213f644d804 62 \return Control Register value
bogdanm 87:6213f644d804 63 */
bogdanm 87:6213f644d804 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 87:6213f644d804 65 {
bogdanm 87:6213f644d804 66 register uint32_t __regControl __ASM("control");
bogdanm 87:6213f644d804 67 return(__regControl);
bogdanm 87:6213f644d804 68 }
bogdanm 87:6213f644d804 69
bogdanm 87:6213f644d804 70
bogdanm 87:6213f644d804 71 /** \brief Set Control Register
bogdanm 87:6213f644d804 72
bogdanm 87:6213f644d804 73 This function writes the given value to the Control Register.
bogdanm 87:6213f644d804 74
bogdanm 87:6213f644d804 75 \param [in] control Control Register value to set
bogdanm 87:6213f644d804 76 */
bogdanm 87:6213f644d804 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 87:6213f644d804 78 {
bogdanm 87:6213f644d804 79 register uint32_t __regControl __ASM("control");
bogdanm 87:6213f644d804 80 __regControl = control;
bogdanm 87:6213f644d804 81 }
bogdanm 87:6213f644d804 82
bogdanm 87:6213f644d804 83
bogdanm 87:6213f644d804 84 /** \brief Get IPSR Register
bogdanm 87:6213f644d804 85
bogdanm 87:6213f644d804 86 This function returns the content of the IPSR Register.
bogdanm 87:6213f644d804 87
bogdanm 87:6213f644d804 88 \return IPSR Register value
bogdanm 87:6213f644d804 89 */
bogdanm 87:6213f644d804 90 __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 87:6213f644d804 91 {
bogdanm 87:6213f644d804 92 register uint32_t __regIPSR __ASM("ipsr");
bogdanm 87:6213f644d804 93 return(__regIPSR);
bogdanm 87:6213f644d804 94 }
bogdanm 87:6213f644d804 95
bogdanm 87:6213f644d804 96
bogdanm 87:6213f644d804 97 /** \brief Get APSR Register
bogdanm 87:6213f644d804 98
bogdanm 87:6213f644d804 99 This function returns the content of the APSR Register.
bogdanm 87:6213f644d804 100
bogdanm 87:6213f644d804 101 \return APSR Register value
bogdanm 87:6213f644d804 102 */
bogdanm 87:6213f644d804 103 __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 87:6213f644d804 104 {
bogdanm 87:6213f644d804 105 register uint32_t __regAPSR __ASM("apsr");
bogdanm 87:6213f644d804 106 return(__regAPSR);
bogdanm 87:6213f644d804 107 }
bogdanm 87:6213f644d804 108
bogdanm 87:6213f644d804 109
bogdanm 87:6213f644d804 110 /** \brief Get xPSR Register
bogdanm 87:6213f644d804 111
bogdanm 87:6213f644d804 112 This function returns the content of the xPSR Register.
bogdanm 87:6213f644d804 113
bogdanm 87:6213f644d804 114 \return xPSR Register value
bogdanm 87:6213f644d804 115 */
bogdanm 87:6213f644d804 116 __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 87:6213f644d804 117 {
bogdanm 87:6213f644d804 118 register uint32_t __regXPSR __ASM("xpsr");
bogdanm 87:6213f644d804 119 return(__regXPSR);
bogdanm 87:6213f644d804 120 }
bogdanm 87:6213f644d804 121
bogdanm 87:6213f644d804 122
bogdanm 87:6213f644d804 123 /** \brief Get Process Stack Pointer
bogdanm 87:6213f644d804 124
bogdanm 87:6213f644d804 125 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 87:6213f644d804 126
bogdanm 87:6213f644d804 127 \return PSP Register value
bogdanm 87:6213f644d804 128 */
bogdanm 87:6213f644d804 129 __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 87:6213f644d804 130 {
bogdanm 87:6213f644d804 131 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 87:6213f644d804 132 return(__regProcessStackPointer);
bogdanm 87:6213f644d804 133 }
bogdanm 87:6213f644d804 134
bogdanm 87:6213f644d804 135
bogdanm 87:6213f644d804 136 /** \brief Set Process Stack Pointer
bogdanm 87:6213f644d804 137
bogdanm 87:6213f644d804 138 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 87:6213f644d804 139
bogdanm 87:6213f644d804 140 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 87:6213f644d804 141 */
bogdanm 87:6213f644d804 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 87:6213f644d804 143 {
bogdanm 87:6213f644d804 144 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 87:6213f644d804 145 __regProcessStackPointer = topOfProcStack;
bogdanm 87:6213f644d804 146 }
bogdanm 87:6213f644d804 147
bogdanm 87:6213f644d804 148
bogdanm 87:6213f644d804 149 /** \brief Get Main Stack Pointer
bogdanm 87:6213f644d804 150
bogdanm 87:6213f644d804 151 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 87:6213f644d804 152
bogdanm 87:6213f644d804 153 \return MSP Register value
bogdanm 87:6213f644d804 154 */
bogdanm 87:6213f644d804 155 __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 87:6213f644d804 156 {
bogdanm 87:6213f644d804 157 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 87:6213f644d804 158 return(__regMainStackPointer);
bogdanm 87:6213f644d804 159 }
bogdanm 87:6213f644d804 160
bogdanm 87:6213f644d804 161
bogdanm 87:6213f644d804 162 /** \brief Set Main Stack Pointer
bogdanm 87:6213f644d804 163
bogdanm 87:6213f644d804 164 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 87:6213f644d804 165
bogdanm 87:6213f644d804 166 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 87:6213f644d804 167 */
bogdanm 87:6213f644d804 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 87:6213f644d804 169 {
bogdanm 87:6213f644d804 170 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 87:6213f644d804 171 __regMainStackPointer = topOfMainStack;
bogdanm 87:6213f644d804 172 }
bogdanm 87:6213f644d804 173
bogdanm 87:6213f644d804 174
bogdanm 87:6213f644d804 175 /** \brief Get Priority Mask
bogdanm 87:6213f644d804 176
bogdanm 87:6213f644d804 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 87:6213f644d804 178
bogdanm 87:6213f644d804 179 \return Priority Mask value
bogdanm 87:6213f644d804 180 */
bogdanm 87:6213f644d804 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 87:6213f644d804 182 {
bogdanm 87:6213f644d804 183 register uint32_t __regPriMask __ASM("primask");
bogdanm 87:6213f644d804 184 return(__regPriMask);
bogdanm 87:6213f644d804 185 }
bogdanm 87:6213f644d804 186
bogdanm 87:6213f644d804 187
bogdanm 87:6213f644d804 188 /** \brief Set Priority Mask
bogdanm 87:6213f644d804 189
bogdanm 87:6213f644d804 190 This function assigns the given value to the Priority Mask Register.
bogdanm 87:6213f644d804 191
bogdanm 87:6213f644d804 192 \param [in] priMask Priority Mask
bogdanm 87:6213f644d804 193 */
bogdanm 87:6213f644d804 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 87:6213f644d804 195 {
bogdanm 87:6213f644d804 196 register uint32_t __regPriMask __ASM("primask");
bogdanm 87:6213f644d804 197 __regPriMask = (priMask);
bogdanm 87:6213f644d804 198 }
bogdanm 87:6213f644d804 199
bogdanm 87:6213f644d804 200
Kojto 110:165afa46840b 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
bogdanm 87:6213f644d804 202
bogdanm 87:6213f644d804 203 /** \brief Enable FIQ
bogdanm 87:6213f644d804 204
bogdanm 87:6213f644d804 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 87:6213f644d804 206 Can only be executed in Privileged modes.
bogdanm 87:6213f644d804 207 */
bogdanm 87:6213f644d804 208 #define __enable_fault_irq __enable_fiq
bogdanm 87:6213f644d804 209
bogdanm 87:6213f644d804 210
bogdanm 87:6213f644d804 211 /** \brief Disable FIQ
bogdanm 87:6213f644d804 212
bogdanm 87:6213f644d804 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 87:6213f644d804 214 Can only be executed in Privileged modes.
bogdanm 87:6213f644d804 215 */
bogdanm 87:6213f644d804 216 #define __disable_fault_irq __disable_fiq
bogdanm 87:6213f644d804 217
bogdanm 87:6213f644d804 218
bogdanm 87:6213f644d804 219 /** \brief Get Base Priority
bogdanm 87:6213f644d804 220
bogdanm 87:6213f644d804 221 This function returns the current value of the Base Priority register.
bogdanm 87:6213f644d804 222
bogdanm 87:6213f644d804 223 \return Base Priority register value
bogdanm 87:6213f644d804 224 */
bogdanm 87:6213f644d804 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 87:6213f644d804 226 {
bogdanm 87:6213f644d804 227 register uint32_t __regBasePri __ASM("basepri");
bogdanm 87:6213f644d804 228 return(__regBasePri);
bogdanm 87:6213f644d804 229 }
bogdanm 87:6213f644d804 230
bogdanm 87:6213f644d804 231
bogdanm 87:6213f644d804 232 /** \brief Set Base Priority
bogdanm 87:6213f644d804 233
bogdanm 87:6213f644d804 234 This function assigns the given value to the Base Priority register.
bogdanm 87:6213f644d804 235
bogdanm 87:6213f644d804 236 \param [in] basePri Base Priority value to set
bogdanm 87:6213f644d804 237 */
bogdanm 87:6213f644d804 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
bogdanm 87:6213f644d804 239 {
bogdanm 87:6213f644d804 240 register uint32_t __regBasePri __ASM("basepri");
bogdanm 87:6213f644d804 241 __regBasePri = (basePri & 0xff);
bogdanm 87:6213f644d804 242 }
bogdanm 87:6213f644d804 243
bogdanm 87:6213f644d804 244
Kojto 110:165afa46840b 245 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 246
Kojto 110:165afa46840b 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 248 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 249
Kojto 110:165afa46840b 250 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 251 */
Kojto 110:165afa46840b 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 110:165afa46840b 253 {
Kojto 110:165afa46840b 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Kojto 110:165afa46840b 255 __regBasePriMax = (basePri & 0xff);
Kojto 110:165afa46840b 256 }
Kojto 110:165afa46840b 257
Kojto 110:165afa46840b 258
bogdanm 87:6213f644d804 259 /** \brief Get Fault Mask
bogdanm 87:6213f644d804 260
bogdanm 87:6213f644d804 261 This function returns the current value of the Fault Mask register.
bogdanm 87:6213f644d804 262
bogdanm 87:6213f644d804 263 \return Fault Mask register value
bogdanm 87:6213f644d804 264 */
bogdanm 87:6213f644d804 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 87:6213f644d804 266 {
bogdanm 87:6213f644d804 267 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 87:6213f644d804 268 return(__regFaultMask);
bogdanm 87:6213f644d804 269 }
bogdanm 87:6213f644d804 270
bogdanm 87:6213f644d804 271
bogdanm 87:6213f644d804 272 /** \brief Set Fault Mask
bogdanm 87:6213f644d804 273
bogdanm 87:6213f644d804 274 This function assigns the given value to the Fault Mask register.
bogdanm 87:6213f644d804 275
bogdanm 87:6213f644d804 276 \param [in] faultMask Fault Mask value to set
bogdanm 87:6213f644d804 277 */
bogdanm 87:6213f644d804 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 87:6213f644d804 279 {
bogdanm 87:6213f644d804 280 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 87:6213f644d804 281 __regFaultMask = (faultMask & (uint32_t)1);
bogdanm 87:6213f644d804 282 }
bogdanm 87:6213f644d804 283
Kojto 110:165afa46840b 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
bogdanm 87:6213f644d804 285
bogdanm 87:6213f644d804 286
Kojto 110:165afa46840b 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 87:6213f644d804 288
bogdanm 87:6213f644d804 289 /** \brief Get FPSCR
bogdanm 87:6213f644d804 290
bogdanm 87:6213f644d804 291 This function returns the current value of the Floating Point Status/Control register.
bogdanm 87:6213f644d804 292
bogdanm 87:6213f644d804 293 \return Floating Point Status/Control register value
bogdanm 87:6213f644d804 294 */
bogdanm 87:6213f644d804 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 87:6213f644d804 296 {
bogdanm 87:6213f644d804 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 87:6213f644d804 298 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 87:6213f644d804 299 return(__regfpscr);
bogdanm 87:6213f644d804 300 #else
bogdanm 87:6213f644d804 301 return(0);
bogdanm 87:6213f644d804 302 #endif
bogdanm 87:6213f644d804 303 }
bogdanm 87:6213f644d804 304
bogdanm 87:6213f644d804 305
bogdanm 87:6213f644d804 306 /** \brief Set FPSCR
bogdanm 87:6213f644d804 307
bogdanm 87:6213f644d804 308 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 87:6213f644d804 309
bogdanm 87:6213f644d804 310 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 87:6213f644d804 311 */
bogdanm 87:6213f644d804 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 87:6213f644d804 313 {
bogdanm 87:6213f644d804 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 87:6213f644d804 315 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 87:6213f644d804 316 __regfpscr = (fpscr);
bogdanm 87:6213f644d804 317 #endif
bogdanm 87:6213f644d804 318 }
bogdanm 87:6213f644d804 319
Kojto 110:165afa46840b 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
bogdanm 87:6213f644d804 321
bogdanm 87:6213f644d804 322
bogdanm 87:6213f644d804 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 87:6213f644d804 324 /* GNU gcc specific functions */
bogdanm 87:6213f644d804 325
bogdanm 87:6213f644d804 326 /** \brief Enable IRQ Interrupts
bogdanm 87:6213f644d804 327
bogdanm 87:6213f644d804 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
bogdanm 87:6213f644d804 329 Can only be executed in Privileged modes.
bogdanm 87:6213f644d804 330 */
bogdanm 87:6213f644d804 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
bogdanm 87:6213f644d804 332 {
bogdanm 87:6213f644d804 333 __ASM volatile ("cpsie i" : : : "memory");
bogdanm 87:6213f644d804 334 }
bogdanm 87:6213f644d804 335
bogdanm 87:6213f644d804 336
bogdanm 87:6213f644d804 337 /** \brief Disable IRQ Interrupts
bogdanm 87:6213f644d804 338
bogdanm 87:6213f644d804 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
bogdanm 87:6213f644d804 340 Can only be executed in Privileged modes.
bogdanm 87:6213f644d804 341 */
bogdanm 87:6213f644d804 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
bogdanm 87:6213f644d804 343 {
bogdanm 87:6213f644d804 344 __ASM volatile ("cpsid i" : : : "memory");
bogdanm 87:6213f644d804 345 }
bogdanm 87:6213f644d804 346
bogdanm 87:6213f644d804 347
bogdanm 87:6213f644d804 348 /** \brief Get Control Register
bogdanm 87:6213f644d804 349
bogdanm 87:6213f644d804 350 This function returns the content of the Control Register.
bogdanm 87:6213f644d804 351
bogdanm 87:6213f644d804 352 \return Control Register value
bogdanm 87:6213f644d804 353 */
bogdanm 87:6213f644d804 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 87:6213f644d804 355 {
bogdanm 87:6213f644d804 356 uint32_t result;
bogdanm 87:6213f644d804 357
bogdanm 87:6213f644d804 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
bogdanm 87:6213f644d804 359 return(result);
bogdanm 87:6213f644d804 360 }
bogdanm 87:6213f644d804 361
bogdanm 87:6213f644d804 362
bogdanm 87:6213f644d804 363 /** \brief Set Control Register
bogdanm 87:6213f644d804 364
bogdanm 87:6213f644d804 365 This function writes the given value to the Control Register.
bogdanm 87:6213f644d804 366
bogdanm 87:6213f644d804 367 \param [in] control Control Register value to set
bogdanm 87:6213f644d804 368 */
bogdanm 87:6213f644d804 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 87:6213f644d804 370 {
bogdanm 87:6213f644d804 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
bogdanm 87:6213f644d804 372 }
bogdanm 87:6213f644d804 373
bogdanm 87:6213f644d804 374
bogdanm 87:6213f644d804 375 /** \brief Get IPSR Register
bogdanm 87:6213f644d804 376
bogdanm 87:6213f644d804 377 This function returns the content of the IPSR Register.
bogdanm 87:6213f644d804 378
bogdanm 87:6213f644d804 379 \return IPSR Register value
bogdanm 87:6213f644d804 380 */
bogdanm 87:6213f644d804 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 87:6213f644d804 382 {
bogdanm 87:6213f644d804 383 uint32_t result;
bogdanm 87:6213f644d804 384
bogdanm 87:6213f644d804 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
bogdanm 87:6213f644d804 386 return(result);
bogdanm 87:6213f644d804 387 }
bogdanm 87:6213f644d804 388
bogdanm 87:6213f644d804 389
bogdanm 87:6213f644d804 390 /** \brief Get APSR Register
bogdanm 87:6213f644d804 391
bogdanm 87:6213f644d804 392 This function returns the content of the APSR Register.
bogdanm 87:6213f644d804 393
bogdanm 87:6213f644d804 394 \return APSR Register value
bogdanm 87:6213f644d804 395 */
bogdanm 87:6213f644d804 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 87:6213f644d804 397 {
bogdanm 87:6213f644d804 398 uint32_t result;
bogdanm 87:6213f644d804 399
bogdanm 87:6213f644d804 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
bogdanm 87:6213f644d804 401 return(result);
bogdanm 87:6213f644d804 402 }
bogdanm 87:6213f644d804 403
bogdanm 87:6213f644d804 404
bogdanm 87:6213f644d804 405 /** \brief Get xPSR Register
bogdanm 87:6213f644d804 406
bogdanm 87:6213f644d804 407 This function returns the content of the xPSR Register.
bogdanm 87:6213f644d804 408
bogdanm 87:6213f644d804 409 \return xPSR Register value
bogdanm 87:6213f644d804 410 */
bogdanm 87:6213f644d804 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 87:6213f644d804 412 {
bogdanm 87:6213f644d804 413 uint32_t result;
bogdanm 87:6213f644d804 414
bogdanm 87:6213f644d804 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
bogdanm 87:6213f644d804 416 return(result);
bogdanm 87:6213f644d804 417 }
bogdanm 87:6213f644d804 418
bogdanm 87:6213f644d804 419
bogdanm 87:6213f644d804 420 /** \brief Get Process Stack Pointer
bogdanm 87:6213f644d804 421
bogdanm 87:6213f644d804 422 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 87:6213f644d804 423
bogdanm 87:6213f644d804 424 \return PSP Register value
bogdanm 87:6213f644d804 425 */
bogdanm 87:6213f644d804 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 87:6213f644d804 427 {
bogdanm 87:6213f644d804 428 register uint32_t result;
bogdanm 87:6213f644d804 429
bogdanm 87:6213f644d804 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
bogdanm 87:6213f644d804 431 return(result);
bogdanm 87:6213f644d804 432 }
bogdanm 87:6213f644d804 433
bogdanm 87:6213f644d804 434
bogdanm 87:6213f644d804 435 /** \brief Set Process Stack Pointer
bogdanm 87:6213f644d804 436
bogdanm 87:6213f644d804 437 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 87:6213f644d804 438
bogdanm 87:6213f644d804 439 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 87:6213f644d804 440 */
bogdanm 87:6213f644d804 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 87:6213f644d804 442 {
bogdanm 87:6213f644d804 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
bogdanm 87:6213f644d804 444 }
bogdanm 87:6213f644d804 445
bogdanm 87:6213f644d804 446
bogdanm 87:6213f644d804 447 /** \brief Get Main Stack Pointer
bogdanm 87:6213f644d804 448
bogdanm 87:6213f644d804 449 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 87:6213f644d804 450
bogdanm 87:6213f644d804 451 \return MSP Register value
bogdanm 87:6213f644d804 452 */
bogdanm 87:6213f644d804 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 87:6213f644d804 454 {
bogdanm 87:6213f644d804 455 register uint32_t result;
bogdanm 87:6213f644d804 456
bogdanm 87:6213f644d804 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
bogdanm 87:6213f644d804 458 return(result);
bogdanm 87:6213f644d804 459 }
bogdanm 87:6213f644d804 460
bogdanm 87:6213f644d804 461
bogdanm 87:6213f644d804 462 /** \brief Set Main Stack Pointer
bogdanm 87:6213f644d804 463
bogdanm 87:6213f644d804 464 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 87:6213f644d804 465
bogdanm 87:6213f644d804 466 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 87:6213f644d804 467 */
bogdanm 87:6213f644d804 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 87:6213f644d804 469 {
bogdanm 87:6213f644d804 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
bogdanm 87:6213f644d804 471 }
bogdanm 87:6213f644d804 472
bogdanm 87:6213f644d804 473
bogdanm 87:6213f644d804 474 /** \brief Get Priority Mask
bogdanm 87:6213f644d804 475
bogdanm 87:6213f644d804 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 87:6213f644d804 477
bogdanm 87:6213f644d804 478 \return Priority Mask value
bogdanm 87:6213f644d804 479 */
bogdanm 87:6213f644d804 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 87:6213f644d804 481 {
bogdanm 87:6213f644d804 482 uint32_t result;
bogdanm 87:6213f644d804 483
bogdanm 87:6213f644d804 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
bogdanm 87:6213f644d804 485 return(result);
bogdanm 87:6213f644d804 486 }
bogdanm 87:6213f644d804 487
bogdanm 87:6213f644d804 488
bogdanm 87:6213f644d804 489 /** \brief Set Priority Mask
bogdanm 87:6213f644d804 490
bogdanm 87:6213f644d804 491 This function assigns the given value to the Priority Mask Register.
bogdanm 87:6213f644d804 492
bogdanm 87:6213f644d804 493 \param [in] priMask Priority Mask
bogdanm 87:6213f644d804 494 */
bogdanm 87:6213f644d804 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 87:6213f644d804 496 {
bogdanm 87:6213f644d804 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
bogdanm 87:6213f644d804 498 }
bogdanm 87:6213f644d804 499
bogdanm 87:6213f644d804 500
bogdanm 87:6213f644d804 501 #if (__CORTEX_M >= 0x03)
bogdanm 87:6213f644d804 502
bogdanm 87:6213f644d804 503 /** \brief Enable FIQ
bogdanm 87:6213f644d804 504
bogdanm 87:6213f644d804 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 87:6213f644d804 506 Can only be executed in Privileged modes.
bogdanm 87:6213f644d804 507 */
bogdanm 87:6213f644d804 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
bogdanm 87:6213f644d804 509 {
bogdanm 87:6213f644d804 510 __ASM volatile ("cpsie f" : : : "memory");
bogdanm 87:6213f644d804 511 }
bogdanm 87:6213f644d804 512
bogdanm 87:6213f644d804 513
bogdanm 87:6213f644d804 514 /** \brief Disable FIQ
bogdanm 87:6213f644d804 515
bogdanm 87:6213f644d804 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 87:6213f644d804 517 Can only be executed in Privileged modes.
bogdanm 87:6213f644d804 518 */
bogdanm 87:6213f644d804 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
bogdanm 87:6213f644d804 520 {
bogdanm 87:6213f644d804 521 __ASM volatile ("cpsid f" : : : "memory");
bogdanm 87:6213f644d804 522 }
bogdanm 87:6213f644d804 523
bogdanm 87:6213f644d804 524
bogdanm 87:6213f644d804 525 /** \brief Get Base Priority
bogdanm 87:6213f644d804 526
bogdanm 87:6213f644d804 527 This function returns the current value of the Base Priority register.
bogdanm 87:6213f644d804 528
bogdanm 87:6213f644d804 529 \return Base Priority register value
bogdanm 87:6213f644d804 530 */
bogdanm 87:6213f644d804 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 87:6213f644d804 532 {
bogdanm 87:6213f644d804 533 uint32_t result;
bogdanm 87:6213f644d804 534
Kojto 110:165afa46840b 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
bogdanm 87:6213f644d804 536 return(result);
bogdanm 87:6213f644d804 537 }
bogdanm 87:6213f644d804 538
bogdanm 87:6213f644d804 539
bogdanm 87:6213f644d804 540 /** \brief Set Base Priority
bogdanm 87:6213f644d804 541
bogdanm 87:6213f644d804 542 This function assigns the given value to the Base Priority register.
bogdanm 87:6213f644d804 543
bogdanm 87:6213f644d804 544 \param [in] basePri Base Priority value to set
bogdanm 87:6213f644d804 545 */
bogdanm 87:6213f644d804 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
bogdanm 87:6213f644d804 547 {
bogdanm 87:6213f644d804 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
bogdanm 87:6213f644d804 549 }
bogdanm 87:6213f644d804 550
bogdanm 87:6213f644d804 551
Kojto 110:165afa46840b 552 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 553
Kojto 110:165afa46840b 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 555 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 556
Kojto 110:165afa46840b 557 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 558 */
Kojto 110:165afa46840b 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Kojto 110:165afa46840b 560 {
Kojto 110:165afa46840b 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Kojto 110:165afa46840b 562 }
Kojto 110:165afa46840b 563
Kojto 110:165afa46840b 564
bogdanm 87:6213f644d804 565 /** \brief Get Fault Mask
bogdanm 87:6213f644d804 566
bogdanm 87:6213f644d804 567 This function returns the current value of the Fault Mask register.
bogdanm 87:6213f644d804 568
bogdanm 87:6213f644d804 569 \return Fault Mask register value
bogdanm 87:6213f644d804 570 */
bogdanm 87:6213f644d804 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 87:6213f644d804 572 {
bogdanm 87:6213f644d804 573 uint32_t result;
bogdanm 87:6213f644d804 574
bogdanm 87:6213f644d804 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
bogdanm 87:6213f644d804 576 return(result);
bogdanm 87:6213f644d804 577 }
bogdanm 87:6213f644d804 578
bogdanm 87:6213f644d804 579
bogdanm 87:6213f644d804 580 /** \brief Set Fault Mask
bogdanm 87:6213f644d804 581
bogdanm 87:6213f644d804 582 This function assigns the given value to the Fault Mask register.
bogdanm 87:6213f644d804 583
bogdanm 87:6213f644d804 584 \param [in] faultMask Fault Mask value to set
bogdanm 87:6213f644d804 585 */
bogdanm 87:6213f644d804 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 87:6213f644d804 587 {
bogdanm 87:6213f644d804 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
bogdanm 87:6213f644d804 589 }
bogdanm 87:6213f644d804 590
bogdanm 87:6213f644d804 591 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 87:6213f644d804 592
bogdanm 87:6213f644d804 593
Kojto 110:165afa46840b 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 87:6213f644d804 595
bogdanm 87:6213f644d804 596 /** \brief Get FPSCR
bogdanm 87:6213f644d804 597
bogdanm 87:6213f644d804 598 This function returns the current value of the Floating Point Status/Control register.
bogdanm 87:6213f644d804 599
bogdanm 87:6213f644d804 600 \return Floating Point Status/Control register value
bogdanm 87:6213f644d804 601 */
bogdanm 87:6213f644d804 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 87:6213f644d804 603 {
bogdanm 87:6213f644d804 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 87:6213f644d804 605 uint32_t result;
bogdanm 87:6213f644d804 606
bogdanm 87:6213f644d804 607 /* Empty asm statement works as a scheduling barrier */
bogdanm 87:6213f644d804 608 __ASM volatile ("");
bogdanm 87:6213f644d804 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
bogdanm 87:6213f644d804 610 __ASM volatile ("");
bogdanm 87:6213f644d804 611 return(result);
bogdanm 87:6213f644d804 612 #else
bogdanm 87:6213f644d804 613 return(0);
bogdanm 87:6213f644d804 614 #endif
bogdanm 87:6213f644d804 615 }
bogdanm 87:6213f644d804 616
bogdanm 87:6213f644d804 617
bogdanm 87:6213f644d804 618 /** \brief Set FPSCR
bogdanm 87:6213f644d804 619
bogdanm 87:6213f644d804 620 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 87:6213f644d804 621
bogdanm 87:6213f644d804 622 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 87:6213f644d804 623 */
bogdanm 87:6213f644d804 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 87:6213f644d804 625 {
bogdanm 87:6213f644d804 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 87:6213f644d804 627 /* Empty asm statement works as a scheduling barrier */
bogdanm 87:6213f644d804 628 __ASM volatile ("");
bogdanm 87:6213f644d804 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
bogdanm 87:6213f644d804 630 __ASM volatile ("");
bogdanm 87:6213f644d804 631 #endif
bogdanm 87:6213f644d804 632 }
bogdanm 87:6213f644d804 633
Kojto 110:165afa46840b 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 110:165afa46840b 635
Kojto 110:165afa46840b 636
Kojto 110:165afa46840b 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 110:165afa46840b 638 /* IAR iccarm specific functions */
Kojto 110:165afa46840b 639 #include <cmsis_iar.h>
Kojto 110:165afa46840b 640
Kojto 110:165afa46840b 641
Kojto 110:165afa46840b 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 110:165afa46840b 643 /* TI CCS specific functions */
Kojto 110:165afa46840b 644 #include <cmsis_ccs.h>
bogdanm 87:6213f644d804 645
bogdanm 87:6213f644d804 646
bogdanm 87:6213f644d804 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 87:6213f644d804 648 /* TASKING carm specific functions */
bogdanm 87:6213f644d804 649 /*
bogdanm 87:6213f644d804 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 110:165afa46840b 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 87:6213f644d804 652 * Including the CMSIS ones.
bogdanm 87:6213f644d804 653 */
bogdanm 87:6213f644d804 654
Kojto 110:165afa46840b 655
Kojto 110:165afa46840b 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 110:165afa46840b 657 /* Cosmic specific functions */
Kojto 110:165afa46840b 658 #include <cmsis_csm.h>
Kojto 110:165afa46840b 659
bogdanm 87:6213f644d804 660 #endif
bogdanm 87:6213f644d804 661
bogdanm 87:6213f644d804 662 /*@} end of CMSIS_Core_RegAccFunctions */
bogdanm 87:6213f644d804 663
bogdanm 87:6213f644d804 664 #endif /* __CORE_CMFUNC_H */