mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/i2c_device.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
132:9baf128c2fab 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 132:9baf128c2fab 1 /* mbed Microcontroller Library
<> 132:9baf128c2fab 2 *******************************************************************************
<> 132:9baf128c2fab 3 * Copyright (c) 2015, STMicroelectronics
<> 132:9baf128c2fab 4 * All rights reserved.
<> 132:9baf128c2fab 5 *
<> 132:9baf128c2fab 6 * Redistribution and use in source and binary forms, with or without
<> 132:9baf128c2fab 7 * modification, are permitted provided that the following conditions are met:
<> 132:9baf128c2fab 8 *
<> 132:9baf128c2fab 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 132:9baf128c2fab 10 * this list of conditions and the following disclaimer.
<> 132:9baf128c2fab 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 132:9baf128c2fab 12 * this list of conditions and the following disclaimer in the documentation
<> 132:9baf128c2fab 13 * and/or other materials provided with the distribution.
<> 132:9baf128c2fab 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 132:9baf128c2fab 15 * may be used to endorse or promote products derived from this software
<> 132:9baf128c2fab 16 * without specific prior written permission.
<> 132:9baf128c2fab 17 *
<> 132:9baf128c2fab 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 132:9baf128c2fab 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 132:9baf128c2fab 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 132:9baf128c2fab 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 132:9baf128c2fab 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 132:9baf128c2fab 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 132:9baf128c2fab 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 132:9baf128c2fab 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 132:9baf128c2fab 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 132:9baf128c2fab 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 132:9baf128c2fab 28 *******************************************************************************
<> 132:9baf128c2fab 29 */
<> 132:9baf128c2fab 30 #ifndef MBED_I2C_DEVICE_H
<> 132:9baf128c2fab 31 #define MBED_I2C_DEVICE_H
<> 132:9baf128c2fab 32
<> 132:9baf128c2fab 33 #include "cmsis.h"
<> 132:9baf128c2fab 34
<> 132:9baf128c2fab 35 #ifdef __cplusplus
<> 132:9baf128c2fab 36 extern "C" {
<> 132:9baf128c2fab 37 #endif
<> 132:9baf128c2fab 38
<> 132:9baf128c2fab 39 #ifdef DEVICE_I2C
<> 132:9baf128c2fab 40
<> 132:9baf128c2fab 41 #define I2C_IP_VERSION_V2
<> 132:9baf128c2fab 42
<> 132:9baf128c2fab 43 #define I2C_IT_ALL (I2C_IT_ERRI|I2C_IT_TCI|I2C_IT_STOPI|I2C_IT_NACKI|I2C_IT_ADDRI|I2C_IT_RXI|I2C_IT_TXI)
<> 132:9baf128c2fab 44
<> 132:9baf128c2fab 45 /* Family specifc settings for clock source */
<> 132:9baf128c2fab 46 #define I2CAPI_I2C1_CLKSRC RCC_I2C1CLKSOURCE_SYSCLK
<> 132:9baf128c2fab 47 #define I2CAPI_I2C2_CLKSRC RCC_I2C2CLKSOURCE_SYSCLK
<> 132:9baf128c2fab 48 #define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK
<> 132:9baf128c2fab 49 #define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK
<> 132:9baf128c2fab 50
<> 132:9baf128c2fab 51 /* Provide the suitable timing depending on requested frequencie */
<> 134:ad3be0349dc5 52 static inline uint32_t get_i2c_timing(int hz)
<> 132:9baf128c2fab 53 {
<> 132:9baf128c2fab 54 uint32_t tim = 0;
<> 132:9baf128c2fab 55 if (SystemCoreClock == 80000000) {
<> 132:9baf128c2fab 56 // Common settings: I2C clock = 80 MHz, Analog filter = ON, Digital filter coefficient = 0
<> 132:9baf128c2fab 57 switch (hz) {
<> 132:9baf128c2fab 58 case 100000:
<> 132:9baf128c2fab 59 tim = 0x30C14E6B; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
<> 132:9baf128c2fab 60 break;
<> 132:9baf128c2fab 61 case 400000:
<> 132:9baf128c2fab 62 tim = 0x10D1143A; // Fast mode with Rise Time = 250ns and Fall Time = 100ns
<> 132:9baf128c2fab 63 break;
<> 132:9baf128c2fab 64 case 1000000:
<> 132:9baf128c2fab 65 tim = 0x00810E27; // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
<> 132:9baf128c2fab 66 break;
<> 132:9baf128c2fab 67 default:
<> 132:9baf128c2fab 68 break;
<> 132:9baf128c2fab 69 }
<> 132:9baf128c2fab 70 } else if (SystemCoreClock == 48000000) {
<> 132:9baf128c2fab 71 // Common settings: I2C clock = 48 MHz, Analog filter = ON, Digital filter coefficient = 0
<> 132:9baf128c2fab 72 switch (hz) {
<> 132:9baf128c2fab 73 case 100000:
<> 132:9baf128c2fab 74 tim = 0x20A03E55; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
<> 132:9baf128c2fab 75 break;
<> 132:9baf128c2fab 76 case 400000:
<> 132:9baf128c2fab 77 tim = 0x10800C21; // Fast mode with Rise Time = 250ns and Fall Time = 100ns
<> 132:9baf128c2fab 78 break;
<> 132:9baf128c2fab 79 case 1000000:
<> 132:9baf128c2fab 80 tim = 0x00500816; // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
<> 132:9baf128c2fab 81 break;
<> 132:9baf128c2fab 82 default:
<> 132:9baf128c2fab 83 break;
<> 132:9baf128c2fab 84 }
<> 132:9baf128c2fab 85 }
<> 132:9baf128c2fab 86 return tim;
<> 132:9baf128c2fab 87 }
<> 132:9baf128c2fab 88
<> 132:9baf128c2fab 89 #ifdef __cplusplus
<> 132:9baf128c2fab 90 }
<> 132:9baf128c2fab 91 #endif
<> 132:9baf128c2fab 92
<> 132:9baf128c2fab 93 #endif // DEVICE_I2C
<> 132:9baf128c2fab 94
<> 132:9baf128c2fab 95 #endif