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mbed 2

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TARGET_NUCLEO_L031K6/core_cmFunc.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
119:aae6fcc7d9bb 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 119:aae6fcc7d9bb 1 /**************************************************************************//**
Kojto 119:aae6fcc7d9bb 2 * @file core_cmFunc.h
Kojto 119:aae6fcc7d9bb 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 119:aae6fcc7d9bb 4 * @version V4.10
Kojto 119:aae6fcc7d9bb 5 * @date 18. March 2015
Kojto 119:aae6fcc7d9bb 6 *
Kojto 119:aae6fcc7d9bb 7 * @note
Kojto 119:aae6fcc7d9bb 8 *
Kojto 119:aae6fcc7d9bb 9 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
Kojto 119:aae6fcc7d9bb 11
Kojto 119:aae6fcc7d9bb 12 All rights reserved.
Kojto 119:aae6fcc7d9bb 13 Redistribution and use in source and binary forms, with or without
Kojto 119:aae6fcc7d9bb 14 modification, are permitted provided that the following conditions are met:
Kojto 119:aae6fcc7d9bb 15 - Redistributions of source code must retain the above copyright
Kojto 119:aae6fcc7d9bb 16 notice, this list of conditions and the following disclaimer.
Kojto 119:aae6fcc7d9bb 17 - Redistributions in binary form must reproduce the above copyright
Kojto 119:aae6fcc7d9bb 18 notice, this list of conditions and the following disclaimer in the
Kojto 119:aae6fcc7d9bb 19 documentation and/or other materials provided with the distribution.
Kojto 119:aae6fcc7d9bb 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 119:aae6fcc7d9bb 21 to endorse or promote products derived from this software without
Kojto 119:aae6fcc7d9bb 22 specific prior written permission.
Kojto 119:aae6fcc7d9bb 23 *
Kojto 119:aae6fcc7d9bb 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 119:aae6fcc7d9bb 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 119:aae6fcc7d9bb 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 119:aae6fcc7d9bb 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 119:aae6fcc7d9bb 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 119:aae6fcc7d9bb 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 119:aae6fcc7d9bb 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 119:aae6fcc7d9bb 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 119:aae6fcc7d9bb 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 119:aae6fcc7d9bb 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 119:aae6fcc7d9bb 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 119:aae6fcc7d9bb 35 ---------------------------------------------------------------------------*/
Kojto 119:aae6fcc7d9bb 36
Kojto 119:aae6fcc7d9bb 37
Kojto 119:aae6fcc7d9bb 38 #ifndef __CORE_CMFUNC_H
Kojto 119:aae6fcc7d9bb 39 #define __CORE_CMFUNC_H
Kojto 119:aae6fcc7d9bb 40
Kojto 119:aae6fcc7d9bb 41
Kojto 119:aae6fcc7d9bb 42 /* ########################### Core Function Access ########################### */
Kojto 119:aae6fcc7d9bb 43 /** \ingroup CMSIS_Core_FunctionInterface
Kojto 119:aae6fcc7d9bb 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Kojto 119:aae6fcc7d9bb 45 @{
Kojto 119:aae6fcc7d9bb 46 */
Kojto 119:aae6fcc7d9bb 47
Kojto 119:aae6fcc7d9bb 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Kojto 119:aae6fcc7d9bb 49 /* ARM armcc specific functions */
Kojto 119:aae6fcc7d9bb 50
Kojto 119:aae6fcc7d9bb 51 #if (__ARMCC_VERSION < 400677)
Kojto 119:aae6fcc7d9bb 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Kojto 119:aae6fcc7d9bb 53 #endif
Kojto 119:aae6fcc7d9bb 54
Kojto 119:aae6fcc7d9bb 55 /* intrinsic void __enable_irq(); */
Kojto 119:aae6fcc7d9bb 56 /* intrinsic void __disable_irq(); */
Kojto 119:aae6fcc7d9bb 57
Kojto 119:aae6fcc7d9bb 58 /** \brief Get Control Register
Kojto 119:aae6fcc7d9bb 59
Kojto 119:aae6fcc7d9bb 60 This function returns the content of the Control Register.
Kojto 119:aae6fcc7d9bb 61
Kojto 119:aae6fcc7d9bb 62 \return Control Register value
Kojto 119:aae6fcc7d9bb 63 */
Kojto 119:aae6fcc7d9bb 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 119:aae6fcc7d9bb 65 {
Kojto 119:aae6fcc7d9bb 66 register uint32_t __regControl __ASM("control");
Kojto 119:aae6fcc7d9bb 67 return(__regControl);
Kojto 119:aae6fcc7d9bb 68 }
Kojto 119:aae6fcc7d9bb 69
Kojto 119:aae6fcc7d9bb 70
Kojto 119:aae6fcc7d9bb 71 /** \brief Set Control Register
Kojto 119:aae6fcc7d9bb 72
Kojto 119:aae6fcc7d9bb 73 This function writes the given value to the Control Register.
Kojto 119:aae6fcc7d9bb 74
Kojto 119:aae6fcc7d9bb 75 \param [in] control Control Register value to set
Kojto 119:aae6fcc7d9bb 76 */
Kojto 119:aae6fcc7d9bb 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 119:aae6fcc7d9bb 78 {
Kojto 119:aae6fcc7d9bb 79 register uint32_t __regControl __ASM("control");
Kojto 119:aae6fcc7d9bb 80 __regControl = control;
Kojto 119:aae6fcc7d9bb 81 }
Kojto 119:aae6fcc7d9bb 82
Kojto 119:aae6fcc7d9bb 83
Kojto 119:aae6fcc7d9bb 84 /** \brief Get IPSR Register
Kojto 119:aae6fcc7d9bb 85
Kojto 119:aae6fcc7d9bb 86 This function returns the content of the IPSR Register.
Kojto 119:aae6fcc7d9bb 87
Kojto 119:aae6fcc7d9bb 88 \return IPSR Register value
Kojto 119:aae6fcc7d9bb 89 */
Kojto 119:aae6fcc7d9bb 90 __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 119:aae6fcc7d9bb 91 {
Kojto 119:aae6fcc7d9bb 92 register uint32_t __regIPSR __ASM("ipsr");
Kojto 119:aae6fcc7d9bb 93 return(__regIPSR);
Kojto 119:aae6fcc7d9bb 94 }
Kojto 119:aae6fcc7d9bb 95
Kojto 119:aae6fcc7d9bb 96
Kojto 119:aae6fcc7d9bb 97 /** \brief Get APSR Register
Kojto 119:aae6fcc7d9bb 98
Kojto 119:aae6fcc7d9bb 99 This function returns the content of the APSR Register.
Kojto 119:aae6fcc7d9bb 100
Kojto 119:aae6fcc7d9bb 101 \return APSR Register value
Kojto 119:aae6fcc7d9bb 102 */
Kojto 119:aae6fcc7d9bb 103 __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 119:aae6fcc7d9bb 104 {
Kojto 119:aae6fcc7d9bb 105 register uint32_t __regAPSR __ASM("apsr");
Kojto 119:aae6fcc7d9bb 106 return(__regAPSR);
Kojto 119:aae6fcc7d9bb 107 }
Kojto 119:aae6fcc7d9bb 108
Kojto 119:aae6fcc7d9bb 109
Kojto 119:aae6fcc7d9bb 110 /** \brief Get xPSR Register
Kojto 119:aae6fcc7d9bb 111
Kojto 119:aae6fcc7d9bb 112 This function returns the content of the xPSR Register.
Kojto 119:aae6fcc7d9bb 113
Kojto 119:aae6fcc7d9bb 114 \return xPSR Register value
Kojto 119:aae6fcc7d9bb 115 */
Kojto 119:aae6fcc7d9bb 116 __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 119:aae6fcc7d9bb 117 {
Kojto 119:aae6fcc7d9bb 118 register uint32_t __regXPSR __ASM("xpsr");
Kojto 119:aae6fcc7d9bb 119 return(__regXPSR);
Kojto 119:aae6fcc7d9bb 120 }
Kojto 119:aae6fcc7d9bb 121
Kojto 119:aae6fcc7d9bb 122
Kojto 119:aae6fcc7d9bb 123 /** \brief Get Process Stack Pointer
Kojto 119:aae6fcc7d9bb 124
Kojto 119:aae6fcc7d9bb 125 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 119:aae6fcc7d9bb 126
Kojto 119:aae6fcc7d9bb 127 \return PSP Register value
Kojto 119:aae6fcc7d9bb 128 */
Kojto 119:aae6fcc7d9bb 129 __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 119:aae6fcc7d9bb 130 {
Kojto 119:aae6fcc7d9bb 131 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 119:aae6fcc7d9bb 132 return(__regProcessStackPointer);
Kojto 119:aae6fcc7d9bb 133 }
Kojto 119:aae6fcc7d9bb 134
Kojto 119:aae6fcc7d9bb 135
Kojto 119:aae6fcc7d9bb 136 /** \brief Set Process Stack Pointer
Kojto 119:aae6fcc7d9bb 137
Kojto 119:aae6fcc7d9bb 138 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 119:aae6fcc7d9bb 139
Kojto 119:aae6fcc7d9bb 140 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 119:aae6fcc7d9bb 141 */
Kojto 119:aae6fcc7d9bb 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 119:aae6fcc7d9bb 143 {
Kojto 119:aae6fcc7d9bb 144 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 119:aae6fcc7d9bb 145 __regProcessStackPointer = topOfProcStack;
Kojto 119:aae6fcc7d9bb 146 }
Kojto 119:aae6fcc7d9bb 147
Kojto 119:aae6fcc7d9bb 148
Kojto 119:aae6fcc7d9bb 149 /** \brief Get Main Stack Pointer
Kojto 119:aae6fcc7d9bb 150
Kojto 119:aae6fcc7d9bb 151 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 119:aae6fcc7d9bb 152
Kojto 119:aae6fcc7d9bb 153 \return MSP Register value
Kojto 119:aae6fcc7d9bb 154 */
Kojto 119:aae6fcc7d9bb 155 __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 119:aae6fcc7d9bb 156 {
Kojto 119:aae6fcc7d9bb 157 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 119:aae6fcc7d9bb 158 return(__regMainStackPointer);
Kojto 119:aae6fcc7d9bb 159 }
Kojto 119:aae6fcc7d9bb 160
Kojto 119:aae6fcc7d9bb 161
Kojto 119:aae6fcc7d9bb 162 /** \brief Set Main Stack Pointer
Kojto 119:aae6fcc7d9bb 163
Kojto 119:aae6fcc7d9bb 164 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 119:aae6fcc7d9bb 165
Kojto 119:aae6fcc7d9bb 166 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 119:aae6fcc7d9bb 167 */
Kojto 119:aae6fcc7d9bb 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 119:aae6fcc7d9bb 169 {
Kojto 119:aae6fcc7d9bb 170 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 119:aae6fcc7d9bb 171 __regMainStackPointer = topOfMainStack;
Kojto 119:aae6fcc7d9bb 172 }
Kojto 119:aae6fcc7d9bb 173
Kojto 119:aae6fcc7d9bb 174
Kojto 119:aae6fcc7d9bb 175 /** \brief Get Priority Mask
Kojto 119:aae6fcc7d9bb 176
Kojto 119:aae6fcc7d9bb 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 119:aae6fcc7d9bb 178
Kojto 119:aae6fcc7d9bb 179 \return Priority Mask value
Kojto 119:aae6fcc7d9bb 180 */
Kojto 119:aae6fcc7d9bb 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 119:aae6fcc7d9bb 182 {
Kojto 119:aae6fcc7d9bb 183 register uint32_t __regPriMask __ASM("primask");
Kojto 119:aae6fcc7d9bb 184 return(__regPriMask);
Kojto 119:aae6fcc7d9bb 185 }
Kojto 119:aae6fcc7d9bb 186
Kojto 119:aae6fcc7d9bb 187
Kojto 119:aae6fcc7d9bb 188 /** \brief Set Priority Mask
Kojto 119:aae6fcc7d9bb 189
Kojto 119:aae6fcc7d9bb 190 This function assigns the given value to the Priority Mask Register.
Kojto 119:aae6fcc7d9bb 191
Kojto 119:aae6fcc7d9bb 192 \param [in] priMask Priority Mask
Kojto 119:aae6fcc7d9bb 193 */
Kojto 119:aae6fcc7d9bb 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 119:aae6fcc7d9bb 195 {
Kojto 119:aae6fcc7d9bb 196 register uint32_t __regPriMask __ASM("primask");
Kojto 119:aae6fcc7d9bb 197 __regPriMask = (priMask);
Kojto 119:aae6fcc7d9bb 198 }
Kojto 119:aae6fcc7d9bb 199
Kojto 119:aae6fcc7d9bb 200
Kojto 119:aae6fcc7d9bb 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 119:aae6fcc7d9bb 202
Kojto 119:aae6fcc7d9bb 203 /** \brief Enable FIQ
Kojto 119:aae6fcc7d9bb 204
Kojto 119:aae6fcc7d9bb 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 119:aae6fcc7d9bb 206 Can only be executed in Privileged modes.
Kojto 119:aae6fcc7d9bb 207 */
Kojto 119:aae6fcc7d9bb 208 #define __enable_fault_irq __enable_fiq
Kojto 119:aae6fcc7d9bb 209
Kojto 119:aae6fcc7d9bb 210
Kojto 119:aae6fcc7d9bb 211 /** \brief Disable FIQ
Kojto 119:aae6fcc7d9bb 212
Kojto 119:aae6fcc7d9bb 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 119:aae6fcc7d9bb 214 Can only be executed in Privileged modes.
Kojto 119:aae6fcc7d9bb 215 */
Kojto 119:aae6fcc7d9bb 216 #define __disable_fault_irq __disable_fiq
Kojto 119:aae6fcc7d9bb 217
Kojto 119:aae6fcc7d9bb 218
Kojto 119:aae6fcc7d9bb 219 /** \brief Get Base Priority
Kojto 119:aae6fcc7d9bb 220
Kojto 119:aae6fcc7d9bb 221 This function returns the current value of the Base Priority register.
Kojto 119:aae6fcc7d9bb 222
Kojto 119:aae6fcc7d9bb 223 \return Base Priority register value
Kojto 119:aae6fcc7d9bb 224 */
Kojto 119:aae6fcc7d9bb 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 119:aae6fcc7d9bb 226 {
Kojto 119:aae6fcc7d9bb 227 register uint32_t __regBasePri __ASM("basepri");
Kojto 119:aae6fcc7d9bb 228 return(__regBasePri);
Kojto 119:aae6fcc7d9bb 229 }
Kojto 119:aae6fcc7d9bb 230
Kojto 119:aae6fcc7d9bb 231
Kojto 119:aae6fcc7d9bb 232 /** \brief Set Base Priority
Kojto 119:aae6fcc7d9bb 233
Kojto 119:aae6fcc7d9bb 234 This function assigns the given value to the Base Priority register.
Kojto 119:aae6fcc7d9bb 235
Kojto 119:aae6fcc7d9bb 236 \param [in] basePri Base Priority value to set
Kojto 119:aae6fcc7d9bb 237 */
Kojto 119:aae6fcc7d9bb 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
Kojto 119:aae6fcc7d9bb 239 {
Kojto 119:aae6fcc7d9bb 240 register uint32_t __regBasePri __ASM("basepri");
Kojto 119:aae6fcc7d9bb 241 __regBasePri = (basePri & 0xff);
Kojto 119:aae6fcc7d9bb 242 }
Kojto 119:aae6fcc7d9bb 243
Kojto 119:aae6fcc7d9bb 244
Kojto 119:aae6fcc7d9bb 245 /** \brief Set Base Priority with condition
Kojto 119:aae6fcc7d9bb 246
Kojto 119:aae6fcc7d9bb 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 119:aae6fcc7d9bb 248 or the new value increases the BASEPRI priority level.
Kojto 119:aae6fcc7d9bb 249
Kojto 119:aae6fcc7d9bb 250 \param [in] basePri Base Priority value to set
Kojto 119:aae6fcc7d9bb 251 */
Kojto 119:aae6fcc7d9bb 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 119:aae6fcc7d9bb 253 {
Kojto 119:aae6fcc7d9bb 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Kojto 119:aae6fcc7d9bb 255 __regBasePriMax = (basePri & 0xff);
Kojto 119:aae6fcc7d9bb 256 }
Kojto 119:aae6fcc7d9bb 257
Kojto 119:aae6fcc7d9bb 258
Kojto 119:aae6fcc7d9bb 259 /** \brief Get Fault Mask
Kojto 119:aae6fcc7d9bb 260
Kojto 119:aae6fcc7d9bb 261 This function returns the current value of the Fault Mask register.
Kojto 119:aae6fcc7d9bb 262
Kojto 119:aae6fcc7d9bb 263 \return Fault Mask register value
Kojto 119:aae6fcc7d9bb 264 */
Kojto 119:aae6fcc7d9bb 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 119:aae6fcc7d9bb 266 {
Kojto 119:aae6fcc7d9bb 267 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 119:aae6fcc7d9bb 268 return(__regFaultMask);
Kojto 119:aae6fcc7d9bb 269 }
Kojto 119:aae6fcc7d9bb 270
Kojto 119:aae6fcc7d9bb 271
Kojto 119:aae6fcc7d9bb 272 /** \brief Set Fault Mask
Kojto 119:aae6fcc7d9bb 273
Kojto 119:aae6fcc7d9bb 274 This function assigns the given value to the Fault Mask register.
Kojto 119:aae6fcc7d9bb 275
Kojto 119:aae6fcc7d9bb 276 \param [in] faultMask Fault Mask value to set
Kojto 119:aae6fcc7d9bb 277 */
Kojto 119:aae6fcc7d9bb 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 119:aae6fcc7d9bb 279 {
Kojto 119:aae6fcc7d9bb 280 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 119:aae6fcc7d9bb 281 __regFaultMask = (faultMask & (uint32_t)1);
Kojto 119:aae6fcc7d9bb 282 }
Kojto 119:aae6fcc7d9bb 283
Kojto 119:aae6fcc7d9bb 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Kojto 119:aae6fcc7d9bb 285
Kojto 119:aae6fcc7d9bb 286
Kojto 119:aae6fcc7d9bb 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Kojto 119:aae6fcc7d9bb 288
Kojto 119:aae6fcc7d9bb 289 /** \brief Get FPSCR
Kojto 119:aae6fcc7d9bb 290
Kojto 119:aae6fcc7d9bb 291 This function returns the current value of the Floating Point Status/Control register.
Kojto 119:aae6fcc7d9bb 292
Kojto 119:aae6fcc7d9bb 293 \return Floating Point Status/Control register value
Kojto 119:aae6fcc7d9bb 294 */
Kojto 119:aae6fcc7d9bb 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 119:aae6fcc7d9bb 296 {
Kojto 119:aae6fcc7d9bb 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 119:aae6fcc7d9bb 298 register uint32_t __regfpscr __ASM("fpscr");
Kojto 119:aae6fcc7d9bb 299 return(__regfpscr);
Kojto 119:aae6fcc7d9bb 300 #else
Kojto 119:aae6fcc7d9bb 301 return(0);
Kojto 119:aae6fcc7d9bb 302 #endif
Kojto 119:aae6fcc7d9bb 303 }
Kojto 119:aae6fcc7d9bb 304
Kojto 119:aae6fcc7d9bb 305
Kojto 119:aae6fcc7d9bb 306 /** \brief Set FPSCR
Kojto 119:aae6fcc7d9bb 307
Kojto 119:aae6fcc7d9bb 308 This function assigns the given value to the Floating Point Status/Control register.
Kojto 119:aae6fcc7d9bb 309
Kojto 119:aae6fcc7d9bb 310 \param [in] fpscr Floating Point Status/Control value to set
Kojto 119:aae6fcc7d9bb 311 */
Kojto 119:aae6fcc7d9bb 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 119:aae6fcc7d9bb 313 {
Kojto 119:aae6fcc7d9bb 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 119:aae6fcc7d9bb 315 register uint32_t __regfpscr __ASM("fpscr");
Kojto 119:aae6fcc7d9bb 316 __regfpscr = (fpscr);
Kojto 119:aae6fcc7d9bb 317 #endif
Kojto 119:aae6fcc7d9bb 318 }
Kojto 119:aae6fcc7d9bb 319
Kojto 119:aae6fcc7d9bb 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 119:aae6fcc7d9bb 321
Kojto 119:aae6fcc7d9bb 322
Kojto 119:aae6fcc7d9bb 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Kojto 119:aae6fcc7d9bb 324 /* GNU gcc specific functions */
Kojto 119:aae6fcc7d9bb 325
Kojto 119:aae6fcc7d9bb 326 /** \brief Enable IRQ Interrupts
Kojto 119:aae6fcc7d9bb 327
Kojto 119:aae6fcc7d9bb 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Kojto 119:aae6fcc7d9bb 329 Can only be executed in Privileged modes.
Kojto 119:aae6fcc7d9bb 330 */
Kojto 119:aae6fcc7d9bb 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
Kojto 119:aae6fcc7d9bb 332 {
Kojto 119:aae6fcc7d9bb 333 __ASM volatile ("cpsie i" : : : "memory");
Kojto 119:aae6fcc7d9bb 334 }
Kojto 119:aae6fcc7d9bb 335
Kojto 119:aae6fcc7d9bb 336
Kojto 119:aae6fcc7d9bb 337 /** \brief Disable IRQ Interrupts
Kojto 119:aae6fcc7d9bb 338
Kojto 119:aae6fcc7d9bb 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
Kojto 119:aae6fcc7d9bb 340 Can only be executed in Privileged modes.
Kojto 119:aae6fcc7d9bb 341 */
Kojto 119:aae6fcc7d9bb 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
Kojto 119:aae6fcc7d9bb 343 {
Kojto 119:aae6fcc7d9bb 344 __ASM volatile ("cpsid i" : : : "memory");
Kojto 119:aae6fcc7d9bb 345 }
Kojto 119:aae6fcc7d9bb 346
Kojto 119:aae6fcc7d9bb 347
Kojto 119:aae6fcc7d9bb 348 /** \brief Get Control Register
Kojto 119:aae6fcc7d9bb 349
Kojto 119:aae6fcc7d9bb 350 This function returns the content of the Control Register.
Kojto 119:aae6fcc7d9bb 351
Kojto 119:aae6fcc7d9bb 352 \return Control Register value
Kojto 119:aae6fcc7d9bb 353 */
Kojto 119:aae6fcc7d9bb 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 119:aae6fcc7d9bb 355 {
Kojto 119:aae6fcc7d9bb 356 uint32_t result;
Kojto 119:aae6fcc7d9bb 357
Kojto 119:aae6fcc7d9bb 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
Kojto 119:aae6fcc7d9bb 359 return(result);
Kojto 119:aae6fcc7d9bb 360 }
Kojto 119:aae6fcc7d9bb 361
Kojto 119:aae6fcc7d9bb 362
Kojto 119:aae6fcc7d9bb 363 /** \brief Set Control Register
Kojto 119:aae6fcc7d9bb 364
Kojto 119:aae6fcc7d9bb 365 This function writes the given value to the Control Register.
Kojto 119:aae6fcc7d9bb 366
Kojto 119:aae6fcc7d9bb 367 \param [in] control Control Register value to set
Kojto 119:aae6fcc7d9bb 368 */
Kojto 119:aae6fcc7d9bb 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 119:aae6fcc7d9bb 370 {
Kojto 119:aae6fcc7d9bb 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
Kojto 119:aae6fcc7d9bb 372 }
Kojto 119:aae6fcc7d9bb 373
Kojto 119:aae6fcc7d9bb 374
Kojto 119:aae6fcc7d9bb 375 /** \brief Get IPSR Register
Kojto 119:aae6fcc7d9bb 376
Kojto 119:aae6fcc7d9bb 377 This function returns the content of the IPSR Register.
Kojto 119:aae6fcc7d9bb 378
Kojto 119:aae6fcc7d9bb 379 \return IPSR Register value
Kojto 119:aae6fcc7d9bb 380 */
Kojto 119:aae6fcc7d9bb 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 119:aae6fcc7d9bb 382 {
Kojto 119:aae6fcc7d9bb 383 uint32_t result;
Kojto 119:aae6fcc7d9bb 384
Kojto 119:aae6fcc7d9bb 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Kojto 119:aae6fcc7d9bb 386 return(result);
Kojto 119:aae6fcc7d9bb 387 }
Kojto 119:aae6fcc7d9bb 388
Kojto 119:aae6fcc7d9bb 389
Kojto 119:aae6fcc7d9bb 390 /** \brief Get APSR Register
Kojto 119:aae6fcc7d9bb 391
Kojto 119:aae6fcc7d9bb 392 This function returns the content of the APSR Register.
Kojto 119:aae6fcc7d9bb 393
Kojto 119:aae6fcc7d9bb 394 \return APSR Register value
Kojto 119:aae6fcc7d9bb 395 */
Kojto 119:aae6fcc7d9bb 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 119:aae6fcc7d9bb 397 {
Kojto 119:aae6fcc7d9bb 398 uint32_t result;
Kojto 119:aae6fcc7d9bb 399
Kojto 119:aae6fcc7d9bb 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Kojto 119:aae6fcc7d9bb 401 return(result);
Kojto 119:aae6fcc7d9bb 402 }
Kojto 119:aae6fcc7d9bb 403
Kojto 119:aae6fcc7d9bb 404
Kojto 119:aae6fcc7d9bb 405 /** \brief Get xPSR Register
Kojto 119:aae6fcc7d9bb 406
Kojto 119:aae6fcc7d9bb 407 This function returns the content of the xPSR Register.
Kojto 119:aae6fcc7d9bb 408
Kojto 119:aae6fcc7d9bb 409 \return xPSR Register value
Kojto 119:aae6fcc7d9bb 410 */
Kojto 119:aae6fcc7d9bb 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 119:aae6fcc7d9bb 412 {
Kojto 119:aae6fcc7d9bb 413 uint32_t result;
Kojto 119:aae6fcc7d9bb 414
Kojto 119:aae6fcc7d9bb 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Kojto 119:aae6fcc7d9bb 416 return(result);
Kojto 119:aae6fcc7d9bb 417 }
Kojto 119:aae6fcc7d9bb 418
Kojto 119:aae6fcc7d9bb 419
Kojto 119:aae6fcc7d9bb 420 /** \brief Get Process Stack Pointer
Kojto 119:aae6fcc7d9bb 421
Kojto 119:aae6fcc7d9bb 422 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 119:aae6fcc7d9bb 423
Kojto 119:aae6fcc7d9bb 424 \return PSP Register value
Kojto 119:aae6fcc7d9bb 425 */
Kojto 119:aae6fcc7d9bb 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 119:aae6fcc7d9bb 427 {
Kojto 119:aae6fcc7d9bb 428 register uint32_t result;
Kojto 119:aae6fcc7d9bb 429
Kojto 119:aae6fcc7d9bb 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
Kojto 119:aae6fcc7d9bb 431 return(result);
Kojto 119:aae6fcc7d9bb 432 }
Kojto 119:aae6fcc7d9bb 433
Kojto 119:aae6fcc7d9bb 434
Kojto 119:aae6fcc7d9bb 435 /** \brief Set Process Stack Pointer
Kojto 119:aae6fcc7d9bb 436
Kojto 119:aae6fcc7d9bb 437 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 119:aae6fcc7d9bb 438
Kojto 119:aae6fcc7d9bb 439 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 119:aae6fcc7d9bb 440 */
Kojto 119:aae6fcc7d9bb 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 119:aae6fcc7d9bb 442 {
Kojto 119:aae6fcc7d9bb 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
Kojto 119:aae6fcc7d9bb 444 }
Kojto 119:aae6fcc7d9bb 445
Kojto 119:aae6fcc7d9bb 446
Kojto 119:aae6fcc7d9bb 447 /** \brief Get Main Stack Pointer
Kojto 119:aae6fcc7d9bb 448
Kojto 119:aae6fcc7d9bb 449 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 119:aae6fcc7d9bb 450
Kojto 119:aae6fcc7d9bb 451 \return MSP Register value
Kojto 119:aae6fcc7d9bb 452 */
Kojto 119:aae6fcc7d9bb 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 119:aae6fcc7d9bb 454 {
Kojto 119:aae6fcc7d9bb 455 register uint32_t result;
Kojto 119:aae6fcc7d9bb 456
Kojto 119:aae6fcc7d9bb 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
Kojto 119:aae6fcc7d9bb 458 return(result);
Kojto 119:aae6fcc7d9bb 459 }
Kojto 119:aae6fcc7d9bb 460
Kojto 119:aae6fcc7d9bb 461
Kojto 119:aae6fcc7d9bb 462 /** \brief Set Main Stack Pointer
Kojto 119:aae6fcc7d9bb 463
Kojto 119:aae6fcc7d9bb 464 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 119:aae6fcc7d9bb 465
Kojto 119:aae6fcc7d9bb 466 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 119:aae6fcc7d9bb 467 */
Kojto 119:aae6fcc7d9bb 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 119:aae6fcc7d9bb 469 {
Kojto 119:aae6fcc7d9bb 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
Kojto 119:aae6fcc7d9bb 471 }
Kojto 119:aae6fcc7d9bb 472
Kojto 119:aae6fcc7d9bb 473
Kojto 119:aae6fcc7d9bb 474 /** \brief Get Priority Mask
Kojto 119:aae6fcc7d9bb 475
Kojto 119:aae6fcc7d9bb 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 119:aae6fcc7d9bb 477
Kojto 119:aae6fcc7d9bb 478 \return Priority Mask value
Kojto 119:aae6fcc7d9bb 479 */
Kojto 119:aae6fcc7d9bb 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 119:aae6fcc7d9bb 481 {
Kojto 119:aae6fcc7d9bb 482 uint32_t result;
Kojto 119:aae6fcc7d9bb 483
Kojto 119:aae6fcc7d9bb 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Kojto 119:aae6fcc7d9bb 485 return(result);
Kojto 119:aae6fcc7d9bb 486 }
Kojto 119:aae6fcc7d9bb 487
Kojto 119:aae6fcc7d9bb 488
Kojto 119:aae6fcc7d9bb 489 /** \brief Set Priority Mask
Kojto 119:aae6fcc7d9bb 490
Kojto 119:aae6fcc7d9bb 491 This function assigns the given value to the Priority Mask Register.
Kojto 119:aae6fcc7d9bb 492
Kojto 119:aae6fcc7d9bb 493 \param [in] priMask Priority Mask
Kojto 119:aae6fcc7d9bb 494 */
Kojto 119:aae6fcc7d9bb 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 119:aae6fcc7d9bb 496 {
Kojto 119:aae6fcc7d9bb 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
Kojto 119:aae6fcc7d9bb 498 }
Kojto 119:aae6fcc7d9bb 499
Kojto 119:aae6fcc7d9bb 500
Kojto 119:aae6fcc7d9bb 501 #if (__CORTEX_M >= 0x03)
Kojto 119:aae6fcc7d9bb 502
Kojto 119:aae6fcc7d9bb 503 /** \brief Enable FIQ
Kojto 119:aae6fcc7d9bb 504
Kojto 119:aae6fcc7d9bb 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 119:aae6fcc7d9bb 506 Can only be executed in Privileged modes.
Kojto 119:aae6fcc7d9bb 507 */
Kojto 119:aae6fcc7d9bb 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
Kojto 119:aae6fcc7d9bb 509 {
Kojto 119:aae6fcc7d9bb 510 __ASM volatile ("cpsie f" : : : "memory");
Kojto 119:aae6fcc7d9bb 511 }
Kojto 119:aae6fcc7d9bb 512
Kojto 119:aae6fcc7d9bb 513
Kojto 119:aae6fcc7d9bb 514 /** \brief Disable FIQ
Kojto 119:aae6fcc7d9bb 515
Kojto 119:aae6fcc7d9bb 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 119:aae6fcc7d9bb 517 Can only be executed in Privileged modes.
Kojto 119:aae6fcc7d9bb 518 */
Kojto 119:aae6fcc7d9bb 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
Kojto 119:aae6fcc7d9bb 520 {
Kojto 119:aae6fcc7d9bb 521 __ASM volatile ("cpsid f" : : : "memory");
Kojto 119:aae6fcc7d9bb 522 }
Kojto 119:aae6fcc7d9bb 523
Kojto 119:aae6fcc7d9bb 524
Kojto 119:aae6fcc7d9bb 525 /** \brief Get Base Priority
Kojto 119:aae6fcc7d9bb 526
Kojto 119:aae6fcc7d9bb 527 This function returns the current value of the Base Priority register.
Kojto 119:aae6fcc7d9bb 528
Kojto 119:aae6fcc7d9bb 529 \return Base Priority register value
Kojto 119:aae6fcc7d9bb 530 */
Kojto 119:aae6fcc7d9bb 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 119:aae6fcc7d9bb 532 {
Kojto 119:aae6fcc7d9bb 533 uint32_t result;
Kojto 119:aae6fcc7d9bb 534
Kojto 119:aae6fcc7d9bb 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
Kojto 119:aae6fcc7d9bb 536 return(result);
Kojto 119:aae6fcc7d9bb 537 }
Kojto 119:aae6fcc7d9bb 538
Kojto 119:aae6fcc7d9bb 539
Kojto 119:aae6fcc7d9bb 540 /** \brief Set Base Priority
Kojto 119:aae6fcc7d9bb 541
Kojto 119:aae6fcc7d9bb 542 This function assigns the given value to the Base Priority register.
Kojto 119:aae6fcc7d9bb 543
Kojto 119:aae6fcc7d9bb 544 \param [in] basePri Base Priority value to set
Kojto 119:aae6fcc7d9bb 545 */
Kojto 119:aae6fcc7d9bb 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
Kojto 119:aae6fcc7d9bb 547 {
Kojto 119:aae6fcc7d9bb 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
Kojto 119:aae6fcc7d9bb 549 }
Kojto 119:aae6fcc7d9bb 550
Kojto 119:aae6fcc7d9bb 551
Kojto 119:aae6fcc7d9bb 552 /** \brief Set Base Priority with condition
Kojto 119:aae6fcc7d9bb 553
Kojto 119:aae6fcc7d9bb 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 119:aae6fcc7d9bb 555 or the new value increases the BASEPRI priority level.
Kojto 119:aae6fcc7d9bb 556
Kojto 119:aae6fcc7d9bb 557 \param [in] basePri Base Priority value to set
Kojto 119:aae6fcc7d9bb 558 */
Kojto 119:aae6fcc7d9bb 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Kojto 119:aae6fcc7d9bb 560 {
Kojto 119:aae6fcc7d9bb 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Kojto 119:aae6fcc7d9bb 562 }
Kojto 119:aae6fcc7d9bb 563
Kojto 119:aae6fcc7d9bb 564
Kojto 119:aae6fcc7d9bb 565 /** \brief Get Fault Mask
Kojto 119:aae6fcc7d9bb 566
Kojto 119:aae6fcc7d9bb 567 This function returns the current value of the Fault Mask register.
Kojto 119:aae6fcc7d9bb 568
Kojto 119:aae6fcc7d9bb 569 \return Fault Mask register value
Kojto 119:aae6fcc7d9bb 570 */
Kojto 119:aae6fcc7d9bb 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 119:aae6fcc7d9bb 572 {
Kojto 119:aae6fcc7d9bb 573 uint32_t result;
Kojto 119:aae6fcc7d9bb 574
Kojto 119:aae6fcc7d9bb 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Kojto 119:aae6fcc7d9bb 576 return(result);
Kojto 119:aae6fcc7d9bb 577 }
Kojto 119:aae6fcc7d9bb 578
Kojto 119:aae6fcc7d9bb 579
Kojto 119:aae6fcc7d9bb 580 /** \brief Set Fault Mask
Kojto 119:aae6fcc7d9bb 581
Kojto 119:aae6fcc7d9bb 582 This function assigns the given value to the Fault Mask register.
Kojto 119:aae6fcc7d9bb 583
Kojto 119:aae6fcc7d9bb 584 \param [in] faultMask Fault Mask value to set
Kojto 119:aae6fcc7d9bb 585 */
Kojto 119:aae6fcc7d9bb 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 119:aae6fcc7d9bb 587 {
Kojto 119:aae6fcc7d9bb 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
Kojto 119:aae6fcc7d9bb 589 }
Kojto 119:aae6fcc7d9bb 590
Kojto 119:aae6fcc7d9bb 591 #endif /* (__CORTEX_M >= 0x03) */
Kojto 119:aae6fcc7d9bb 592
Kojto 119:aae6fcc7d9bb 593
Kojto 119:aae6fcc7d9bb 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Kojto 119:aae6fcc7d9bb 595
Kojto 119:aae6fcc7d9bb 596 /** \brief Get FPSCR
Kojto 119:aae6fcc7d9bb 597
Kojto 119:aae6fcc7d9bb 598 This function returns the current value of the Floating Point Status/Control register.
Kojto 119:aae6fcc7d9bb 599
Kojto 119:aae6fcc7d9bb 600 \return Floating Point Status/Control register value
Kojto 119:aae6fcc7d9bb 601 */
Kojto 119:aae6fcc7d9bb 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 119:aae6fcc7d9bb 603 {
Kojto 119:aae6fcc7d9bb 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 119:aae6fcc7d9bb 605 uint32_t result;
Kojto 119:aae6fcc7d9bb 606
Kojto 119:aae6fcc7d9bb 607 /* Empty asm statement works as a scheduling barrier */
Kojto 119:aae6fcc7d9bb 608 __ASM volatile ("");
Kojto 119:aae6fcc7d9bb 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
Kojto 119:aae6fcc7d9bb 610 __ASM volatile ("");
Kojto 119:aae6fcc7d9bb 611 return(result);
Kojto 119:aae6fcc7d9bb 612 #else
Kojto 119:aae6fcc7d9bb 613 return(0);
Kojto 119:aae6fcc7d9bb 614 #endif
Kojto 119:aae6fcc7d9bb 615 }
Kojto 119:aae6fcc7d9bb 616
Kojto 119:aae6fcc7d9bb 617
Kojto 119:aae6fcc7d9bb 618 /** \brief Set FPSCR
Kojto 119:aae6fcc7d9bb 619
Kojto 119:aae6fcc7d9bb 620 This function assigns the given value to the Floating Point Status/Control register.
Kojto 119:aae6fcc7d9bb 621
Kojto 119:aae6fcc7d9bb 622 \param [in] fpscr Floating Point Status/Control value to set
Kojto 119:aae6fcc7d9bb 623 */
Kojto 119:aae6fcc7d9bb 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 119:aae6fcc7d9bb 625 {
Kojto 119:aae6fcc7d9bb 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 119:aae6fcc7d9bb 627 /* Empty asm statement works as a scheduling barrier */
Kojto 119:aae6fcc7d9bb 628 __ASM volatile ("");
Kojto 119:aae6fcc7d9bb 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
Kojto 119:aae6fcc7d9bb 630 __ASM volatile ("");
Kojto 119:aae6fcc7d9bb 631 #endif
Kojto 119:aae6fcc7d9bb 632 }
Kojto 119:aae6fcc7d9bb 633
Kojto 119:aae6fcc7d9bb 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 119:aae6fcc7d9bb 635
Kojto 119:aae6fcc7d9bb 636
Kojto 119:aae6fcc7d9bb 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 119:aae6fcc7d9bb 638 /* IAR iccarm specific functions */
Kojto 119:aae6fcc7d9bb 639 #include <cmsis_iar.h>
Kojto 119:aae6fcc7d9bb 640
Kojto 119:aae6fcc7d9bb 641
Kojto 119:aae6fcc7d9bb 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 119:aae6fcc7d9bb 643 /* TI CCS specific functions */
Kojto 119:aae6fcc7d9bb 644 #include <cmsis_ccs.h>
Kojto 119:aae6fcc7d9bb 645
Kojto 119:aae6fcc7d9bb 646
Kojto 119:aae6fcc7d9bb 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Kojto 119:aae6fcc7d9bb 648 /* TASKING carm specific functions */
Kojto 119:aae6fcc7d9bb 649 /*
Kojto 119:aae6fcc7d9bb 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 119:aae6fcc7d9bb 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
Kojto 119:aae6fcc7d9bb 652 * Including the CMSIS ones.
Kojto 119:aae6fcc7d9bb 653 */
Kojto 119:aae6fcc7d9bb 654
Kojto 119:aae6fcc7d9bb 655
Kojto 119:aae6fcc7d9bb 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 119:aae6fcc7d9bb 657 /* Cosmic specific functions */
Kojto 119:aae6fcc7d9bb 658 #include <cmsis_csm.h>
Kojto 119:aae6fcc7d9bb 659
Kojto 119:aae6fcc7d9bb 660 #endif
Kojto 119:aae6fcc7d9bb 661
Kojto 119:aae6fcc7d9bb 662 /*@} end of CMSIS_Core_RegAccFunctions */
Kojto 119:aae6fcc7d9bb 663
Kojto 119:aae6fcc7d9bb 664 #endif /* __CORE_CMFUNC_H */