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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MTS_DRAGONFLY_F411RE/core_ca9.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
115:87f2f5183dfb 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /**************************************************************************//**
Kojto 101:7cff1c4259d7 2 * @file core_ca9.h
Kojto 101:7cff1c4259d7 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
Kojto 101:7cff1c4259d7 4 * @version
Kojto 101:7cff1c4259d7 5 * @date 25 March 2013
Kojto 101:7cff1c4259d7 6 *
Kojto 101:7cff1c4259d7 7 * @note
Kojto 101:7cff1c4259d7 8 *
Kojto 101:7cff1c4259d7 9 ******************************************************************************/
Kojto 101:7cff1c4259d7 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
Kojto 101:7cff1c4259d7 11
Kojto 101:7cff1c4259d7 12 All rights reserved.
Kojto 101:7cff1c4259d7 13 Redistribution and use in source and binary forms, with or without
Kojto 101:7cff1c4259d7 14 modification, are permitted provided that the following conditions are met:
Kojto 101:7cff1c4259d7 15 - Redistributions of source code must retain the above copyright
Kojto 101:7cff1c4259d7 16 notice, this list of conditions and the following disclaimer.
Kojto 101:7cff1c4259d7 17 - Redistributions in binary form must reproduce the above copyright
Kojto 101:7cff1c4259d7 18 notice, this list of conditions and the following disclaimer in the
Kojto 101:7cff1c4259d7 19 documentation and/or other materials provided with the distribution.
Kojto 101:7cff1c4259d7 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 101:7cff1c4259d7 21 to endorse or promote products derived from this software without
Kojto 101:7cff1c4259d7 22 specific prior written permission.
Kojto 101:7cff1c4259d7 23 *
Kojto 101:7cff1c4259d7 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 101:7cff1c4259d7 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 101:7cff1c4259d7 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 101:7cff1c4259d7 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 101:7cff1c4259d7 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 101:7cff1c4259d7 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 101:7cff1c4259d7 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 101:7cff1c4259d7 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 101:7cff1c4259d7 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 101:7cff1c4259d7 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 101:7cff1c4259d7 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 101:7cff1c4259d7 35 ---------------------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 36
Kojto 101:7cff1c4259d7 37
Kojto 101:7cff1c4259d7 38 #if defined ( __ICCARM__ )
Kojto 101:7cff1c4259d7 39 #pragma system_include /* treat file as system include file for MISRA check */
Kojto 101:7cff1c4259d7 40 #endif
Kojto 101:7cff1c4259d7 41
Kojto 101:7cff1c4259d7 42 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 43 extern "C" {
Kojto 101:7cff1c4259d7 44 #endif
Kojto 101:7cff1c4259d7 45
Kojto 101:7cff1c4259d7 46 #ifndef __CORE_CA9_H_GENERIC
Kojto 101:7cff1c4259d7 47 #define __CORE_CA9_H_GENERIC
Kojto 101:7cff1c4259d7 48
Kojto 101:7cff1c4259d7 49
Kojto 101:7cff1c4259d7 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
Kojto 101:7cff1c4259d7 51 CMSIS violates the following MISRA-C:2004 rules:
Kojto 101:7cff1c4259d7 52
Kojto 101:7cff1c4259d7 53 \li Required Rule 8.5, object/function definition in header file.<br>
Kojto 101:7cff1c4259d7 54 Function definitions in header files are used to allow 'inlining'.
Kojto 101:7cff1c4259d7 55
Kojto 101:7cff1c4259d7 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Kojto 101:7cff1c4259d7 57 Unions are used for effective representation of core registers.
Kojto 101:7cff1c4259d7 58
Kojto 101:7cff1c4259d7 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
Kojto 101:7cff1c4259d7 60 Function-like macros are used to allow more efficient code.
Kojto 101:7cff1c4259d7 61 */
Kojto 101:7cff1c4259d7 62
Kojto 101:7cff1c4259d7 63
Kojto 101:7cff1c4259d7 64 /*******************************************************************************
Kojto 101:7cff1c4259d7 65 * CMSIS definitions
Kojto 101:7cff1c4259d7 66 ******************************************************************************/
Kojto 101:7cff1c4259d7 67 /** \ingroup Cortex_A9
Kojto 101:7cff1c4259d7 68 @{
Kojto 101:7cff1c4259d7 69 */
Kojto 101:7cff1c4259d7 70
Kojto 101:7cff1c4259d7 71 /* CMSIS CA9 definitions */
Kojto 101:7cff1c4259d7 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
Kojto 101:7cff1c4259d7 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
Kojto 101:7cff1c4259d7 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
Kojto 101:7cff1c4259d7 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
Kojto 101:7cff1c4259d7 76
Kojto 101:7cff1c4259d7 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
Kojto 101:7cff1c4259d7 78
Kojto 101:7cff1c4259d7 79
Kojto 101:7cff1c4259d7 80 #if defined ( __CC_ARM )
Kojto 101:7cff1c4259d7 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
Kojto 101:7cff1c4259d7 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
Kojto 101:7cff1c4259d7 83 #define __STATIC_INLINE static __inline
Kojto 101:7cff1c4259d7 84 #define __STATIC_ASM static __asm
Kojto 101:7cff1c4259d7 85
Kojto 101:7cff1c4259d7 86 #elif defined ( __ICCARM__ )
Kojto 101:7cff1c4259d7 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
Kojto 101:7cff1c4259d7 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
Kojto 101:7cff1c4259d7 89 #define __STATIC_INLINE static inline
Kojto 101:7cff1c4259d7 90 #define __STATIC_ASM static __asm
Kojto 101:7cff1c4259d7 91
Kojto 115:87f2f5183dfb 92 #include <stdint.h>
Kojto 115:87f2f5183dfb 93 inline uint32_t __get_PSR(void) {
Kojto 115:87f2f5183dfb 94 __ASM("mrs r0, cpsr");
Kojto 115:87f2f5183dfb 95 }
Kojto 115:87f2f5183dfb 96
Kojto 101:7cff1c4259d7 97 #elif defined ( __TMS470__ )
Kojto 101:7cff1c4259d7 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
Kojto 101:7cff1c4259d7 99 #define __STATIC_INLINE static inline
Kojto 101:7cff1c4259d7 100 #define __STATIC_ASM static __asm
Kojto 101:7cff1c4259d7 101
Kojto 101:7cff1c4259d7 102 #elif defined ( __GNUC__ )
Kojto 101:7cff1c4259d7 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
Kojto 101:7cff1c4259d7 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
Kojto 101:7cff1c4259d7 105 #define __STATIC_INLINE static inline
Kojto 101:7cff1c4259d7 106 #define __STATIC_ASM static __asm
Kojto 101:7cff1c4259d7 107
Kojto 101:7cff1c4259d7 108 #elif defined ( __TASKING__ )
Kojto 101:7cff1c4259d7 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
Kojto 101:7cff1c4259d7 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
Kojto 101:7cff1c4259d7 111 #define __STATIC_INLINE static inline
Kojto 101:7cff1c4259d7 112 #define __STATIC_ASM static __asm
Kojto 101:7cff1c4259d7 113
Kojto 101:7cff1c4259d7 114 #endif
Kojto 101:7cff1c4259d7 115
Kojto 101:7cff1c4259d7 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
Kojto 101:7cff1c4259d7 117 */
Kojto 101:7cff1c4259d7 118 #if defined ( __CC_ARM )
Kojto 101:7cff1c4259d7 119 #if defined __TARGET_FPU_VFP
Kojto 101:7cff1c4259d7 120 #if (__FPU_PRESENT == 1)
Kojto 101:7cff1c4259d7 121 #define __FPU_USED 1
Kojto 101:7cff1c4259d7 122 #else
Kojto 101:7cff1c4259d7 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 101:7cff1c4259d7 124 #define __FPU_USED 0
Kojto 101:7cff1c4259d7 125 #endif
Kojto 101:7cff1c4259d7 126 #else
Kojto 101:7cff1c4259d7 127 #define __FPU_USED 0
Kojto 101:7cff1c4259d7 128 #endif
Kojto 101:7cff1c4259d7 129
Kojto 101:7cff1c4259d7 130 #elif defined ( __ICCARM__ )
Kojto 101:7cff1c4259d7 131 #if defined __ARMVFP__
Kojto 101:7cff1c4259d7 132 #if (__FPU_PRESENT == 1)
Kojto 101:7cff1c4259d7 133 #define __FPU_USED 1
Kojto 101:7cff1c4259d7 134 #else
Kojto 101:7cff1c4259d7 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 101:7cff1c4259d7 136 #define __FPU_USED 0
Kojto 101:7cff1c4259d7 137 #endif
Kojto 101:7cff1c4259d7 138 #else
Kojto 101:7cff1c4259d7 139 #define __FPU_USED 0
Kojto 101:7cff1c4259d7 140 #endif
Kojto 101:7cff1c4259d7 141
Kojto 101:7cff1c4259d7 142 #elif defined ( __TMS470__ )
Kojto 101:7cff1c4259d7 143 #if defined __TI_VFP_SUPPORT__
Kojto 101:7cff1c4259d7 144 #if (__FPU_PRESENT == 1)
Kojto 101:7cff1c4259d7 145 #define __FPU_USED 1
Kojto 101:7cff1c4259d7 146 #else
Kojto 101:7cff1c4259d7 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 101:7cff1c4259d7 148 #define __FPU_USED 0
Kojto 101:7cff1c4259d7 149 #endif
Kojto 101:7cff1c4259d7 150 #else
Kojto 101:7cff1c4259d7 151 #define __FPU_USED 0
Kojto 101:7cff1c4259d7 152 #endif
Kojto 101:7cff1c4259d7 153
Kojto 101:7cff1c4259d7 154 #elif defined ( __GNUC__ )
Kojto 101:7cff1c4259d7 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
Kojto 101:7cff1c4259d7 156 #if (__FPU_PRESENT == 1)
Kojto 101:7cff1c4259d7 157 #define __FPU_USED 1
Kojto 101:7cff1c4259d7 158 #else
Kojto 101:7cff1c4259d7 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 101:7cff1c4259d7 160 #define __FPU_USED 0
Kojto 101:7cff1c4259d7 161 #endif
Kojto 101:7cff1c4259d7 162 #else
Kojto 101:7cff1c4259d7 163 #define __FPU_USED 0
Kojto 101:7cff1c4259d7 164 #endif
Kojto 101:7cff1c4259d7 165
Kojto 101:7cff1c4259d7 166 #elif defined ( __TASKING__ )
Kojto 101:7cff1c4259d7 167 #if defined __FPU_VFP__
Kojto 101:7cff1c4259d7 168 #if (__FPU_PRESENT == 1)
Kojto 101:7cff1c4259d7 169 #define __FPU_USED 1
Kojto 101:7cff1c4259d7 170 #else
Kojto 101:7cff1c4259d7 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 101:7cff1c4259d7 172 #define __FPU_USED 0
Kojto 101:7cff1c4259d7 173 #endif
Kojto 101:7cff1c4259d7 174 #else
Kojto 101:7cff1c4259d7 175 #define __FPU_USED 0
Kojto 101:7cff1c4259d7 176 #endif
Kojto 101:7cff1c4259d7 177 #endif
Kojto 101:7cff1c4259d7 178
Kojto 101:7cff1c4259d7 179 #include <stdint.h> /*!< standard types definitions */
Kojto 101:7cff1c4259d7 180 #include "core_caInstr.h" /*!< Core Instruction Access */
Kojto 101:7cff1c4259d7 181 #include "core_caFunc.h" /*!< Core Function Access */
Kojto 101:7cff1c4259d7 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
Kojto 101:7cff1c4259d7 183
Kojto 101:7cff1c4259d7 184 #endif /* __CORE_CA9_H_GENERIC */
Kojto 101:7cff1c4259d7 185
Kojto 101:7cff1c4259d7 186 #ifndef __CMSIS_GENERIC
Kojto 101:7cff1c4259d7 187
Kojto 101:7cff1c4259d7 188 #ifndef __CORE_CA9_H_DEPENDANT
Kojto 101:7cff1c4259d7 189 #define __CORE_CA9_H_DEPENDANT
Kojto 101:7cff1c4259d7 190
Kojto 101:7cff1c4259d7 191 /* check device defines and use defaults */
Kojto 101:7cff1c4259d7 192 #if defined __CHECK_DEVICE_DEFINES
Kojto 101:7cff1c4259d7 193 #ifndef __CA9_REV
Kojto 101:7cff1c4259d7 194 #define __CA9_REV 0x0000
Kojto 101:7cff1c4259d7 195 #warning "__CA9_REV not defined in device header file; using default!"
Kojto 101:7cff1c4259d7 196 #endif
Kojto 101:7cff1c4259d7 197
Kojto 101:7cff1c4259d7 198 #ifndef __FPU_PRESENT
Kojto 101:7cff1c4259d7 199 #define __FPU_PRESENT 1
Kojto 101:7cff1c4259d7 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
Kojto 101:7cff1c4259d7 201 #endif
Kojto 101:7cff1c4259d7 202
Kojto 101:7cff1c4259d7 203 #ifndef __Vendor_SysTickConfig
Kojto 101:7cff1c4259d7 204 #define __Vendor_SysTickConfig 1
Kojto 101:7cff1c4259d7 205 #endif
Kojto 101:7cff1c4259d7 206
Kojto 101:7cff1c4259d7 207 #if __Vendor_SysTickConfig == 0
Kojto 101:7cff1c4259d7 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
Kojto 101:7cff1c4259d7 209 #endif
Kojto 101:7cff1c4259d7 210 #endif
Kojto 101:7cff1c4259d7 211
Kojto 101:7cff1c4259d7 212 /* IO definitions (access restrictions to peripheral registers) */
Kojto 101:7cff1c4259d7 213 /**
Kojto 101:7cff1c4259d7 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
Kojto 101:7cff1c4259d7 215
Kojto 101:7cff1c4259d7 216 <strong>IO Type Qualifiers</strong> are used
Kojto 101:7cff1c4259d7 217 \li to specify the access to peripheral variables.
Kojto 101:7cff1c4259d7 218 \li for automatic generation of peripheral register debug information.
Kojto 101:7cff1c4259d7 219 */
Kojto 101:7cff1c4259d7 220 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 221 #define __I volatile /*!< Defines 'read only' permissions */
Kojto 101:7cff1c4259d7 222 #else
Kojto 101:7cff1c4259d7 223 #define __I volatile const /*!< Defines 'read only' permissions */
Kojto 101:7cff1c4259d7 224 #endif
Kojto 101:7cff1c4259d7 225 #define __O volatile /*!< Defines 'write only' permissions */
Kojto 101:7cff1c4259d7 226 #define __IO volatile /*!< Defines 'read / write' permissions */
Kojto 101:7cff1c4259d7 227
Kojto 101:7cff1c4259d7 228 /*@} end of group Cortex_A9 */
Kojto 101:7cff1c4259d7 229
Kojto 101:7cff1c4259d7 230
Kojto 101:7cff1c4259d7 231 /*******************************************************************************
Kojto 101:7cff1c4259d7 232 * Register Abstraction
Kojto 101:7cff1c4259d7 233 ******************************************************************************/
Kojto 101:7cff1c4259d7 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
Kojto 101:7cff1c4259d7 235 \brief Type definitions and defines for Cortex-A processor based devices.
Kojto 101:7cff1c4259d7 236 */
Kojto 101:7cff1c4259d7 237
Kojto 101:7cff1c4259d7 238 /** \ingroup CMSIS_core_register
Kojto 101:7cff1c4259d7 239 \defgroup CMSIS_CORE Status and Control Registers
Kojto 101:7cff1c4259d7 240 \brief Core Register type definitions.
Kojto 101:7cff1c4259d7 241 @{
Kojto 101:7cff1c4259d7 242 */
Kojto 101:7cff1c4259d7 243
Kojto 101:7cff1c4259d7 244 /** \brief Union type to access the Application Program Status Register (APSR).
Kojto 101:7cff1c4259d7 245 */
Kojto 101:7cff1c4259d7 246 typedef union
Kojto 101:7cff1c4259d7 247 {
Kojto 101:7cff1c4259d7 248 struct
Kojto 101:7cff1c4259d7 249 {
Kojto 101:7cff1c4259d7 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
Kojto 101:7cff1c4259d7 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
Kojto 101:7cff1c4259d7 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
Kojto 101:7cff1c4259d7 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
Kojto 101:7cff1c4259d7 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
Kojto 101:7cff1c4259d7 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
Kojto 101:7cff1c4259d7 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
Kojto 101:7cff1c4259d7 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
Kojto 101:7cff1c4259d7 258 } b; /*!< Structure used for bit access */
Kojto 101:7cff1c4259d7 259 uint32_t w; /*!< Type used for word access */
Kojto 101:7cff1c4259d7 260 } APSR_Type;
Kojto 101:7cff1c4259d7 261
Kojto 101:7cff1c4259d7 262
Kojto 101:7cff1c4259d7 263 /*@} end of group CMSIS_CORE */
Kojto 101:7cff1c4259d7 264
Kojto 101:7cff1c4259d7 265 /*@} end of CMSIS_Core_FPUFunctions */
Kojto 101:7cff1c4259d7 266
Kojto 101:7cff1c4259d7 267
Kojto 101:7cff1c4259d7 268 #endif /* __CORE_CA9_H_GENERIC */
Kojto 101:7cff1c4259d7 269
Kojto 101:7cff1c4259d7 270 #endif /* __CMSIS_GENERIC */
Kojto 101:7cff1c4259d7 271
Kojto 101:7cff1c4259d7 272 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 273 }
Kojto 101:7cff1c4259d7 274
Kojto 101:7cff1c4259d7 275
Kojto 101:7cff1c4259d7 276 #endif