mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MAX32620HSP/core_cmSimd.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
125:2e9cc70d1897 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 125:2e9cc70d1897 1 /**************************************************************************//**
AnnaBridge 125:2e9cc70d1897 2 * @file core_cmSimd.h
AnnaBridge 125:2e9cc70d1897 3 * @brief CMSIS Cortex-M SIMD Header File
AnnaBridge 125:2e9cc70d1897 4 * @version V4.10
AnnaBridge 125:2e9cc70d1897 5 * @date 18. March 2015
AnnaBridge 125:2e9cc70d1897 6 *
AnnaBridge 125:2e9cc70d1897 7 * @note
AnnaBridge 125:2e9cc70d1897 8 *
AnnaBridge 125:2e9cc70d1897 9 ******************************************************************************/
AnnaBridge 125:2e9cc70d1897 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
AnnaBridge 125:2e9cc70d1897 11
AnnaBridge 125:2e9cc70d1897 12 All rights reserved.
AnnaBridge 125:2e9cc70d1897 13 Redistribution and use in source and binary forms, with or without
AnnaBridge 125:2e9cc70d1897 14 modification, are permitted provided that the following conditions are met:
AnnaBridge 125:2e9cc70d1897 15 - Redistributions of source code must retain the above copyright
AnnaBridge 125:2e9cc70d1897 16 notice, this list of conditions and the following disclaimer.
AnnaBridge 125:2e9cc70d1897 17 - Redistributions in binary form must reproduce the above copyright
AnnaBridge 125:2e9cc70d1897 18 notice, this list of conditions and the following disclaimer in the
AnnaBridge 125:2e9cc70d1897 19 documentation and/or other materials provided with the distribution.
AnnaBridge 125:2e9cc70d1897 20 - Neither the name of ARM nor the names of its contributors may be used
AnnaBridge 125:2e9cc70d1897 21 to endorse or promote products derived from this software without
AnnaBridge 125:2e9cc70d1897 22 specific prior written permission.
AnnaBridge 125:2e9cc70d1897 23 *
AnnaBridge 125:2e9cc70d1897 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 125:2e9cc70d1897 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 125:2e9cc70d1897 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
AnnaBridge 125:2e9cc70d1897 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
AnnaBridge 125:2e9cc70d1897 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
AnnaBridge 125:2e9cc70d1897 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
AnnaBridge 125:2e9cc70d1897 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
AnnaBridge 125:2e9cc70d1897 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
AnnaBridge 125:2e9cc70d1897 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
AnnaBridge 125:2e9cc70d1897 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
AnnaBridge 125:2e9cc70d1897 34 POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 125:2e9cc70d1897 35 ---------------------------------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 36
AnnaBridge 125:2e9cc70d1897 37
AnnaBridge 125:2e9cc70d1897 38 #if defined ( __ICCARM__ )
AnnaBridge 125:2e9cc70d1897 39 #pragma system_include /* treat file as system include file for MISRA check */
AnnaBridge 125:2e9cc70d1897 40 #endif
AnnaBridge 125:2e9cc70d1897 41
AnnaBridge 125:2e9cc70d1897 42 #ifndef __CORE_CMSIMD_H
AnnaBridge 125:2e9cc70d1897 43 #define __CORE_CMSIMD_H
AnnaBridge 125:2e9cc70d1897 44
AnnaBridge 125:2e9cc70d1897 45 #ifdef __cplusplus
AnnaBridge 125:2e9cc70d1897 46 extern "C" {
AnnaBridge 125:2e9cc70d1897 47 #endif
AnnaBridge 125:2e9cc70d1897 48
AnnaBridge 125:2e9cc70d1897 49
AnnaBridge 125:2e9cc70d1897 50 /*******************************************************************************
AnnaBridge 125:2e9cc70d1897 51 * Hardware Abstraction Layer
AnnaBridge 125:2e9cc70d1897 52 ******************************************************************************/
AnnaBridge 125:2e9cc70d1897 53
AnnaBridge 125:2e9cc70d1897 54
AnnaBridge 125:2e9cc70d1897 55 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 125:2e9cc70d1897 56 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 125:2e9cc70d1897 57 Access to dedicated SIMD instructions
AnnaBridge 125:2e9cc70d1897 58 @{
AnnaBridge 125:2e9cc70d1897 59 */
AnnaBridge 125:2e9cc70d1897 60
AnnaBridge 125:2e9cc70d1897 61 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
AnnaBridge 125:2e9cc70d1897 62 /* ARM armcc specific functions */
AnnaBridge 125:2e9cc70d1897 63 #define __SADD8 __sadd8
AnnaBridge 125:2e9cc70d1897 64 #define __QADD8 __qadd8
AnnaBridge 125:2e9cc70d1897 65 #define __SHADD8 __shadd8
AnnaBridge 125:2e9cc70d1897 66 #define __UADD8 __uadd8
AnnaBridge 125:2e9cc70d1897 67 #define __UQADD8 __uqadd8
AnnaBridge 125:2e9cc70d1897 68 #define __UHADD8 __uhadd8
AnnaBridge 125:2e9cc70d1897 69 #define __SSUB8 __ssub8
AnnaBridge 125:2e9cc70d1897 70 #define __QSUB8 __qsub8
AnnaBridge 125:2e9cc70d1897 71 #define __SHSUB8 __shsub8
AnnaBridge 125:2e9cc70d1897 72 #define __USUB8 __usub8
AnnaBridge 125:2e9cc70d1897 73 #define __UQSUB8 __uqsub8
AnnaBridge 125:2e9cc70d1897 74 #define __UHSUB8 __uhsub8
AnnaBridge 125:2e9cc70d1897 75 #define __SADD16 __sadd16
AnnaBridge 125:2e9cc70d1897 76 #define __QADD16 __qadd16
AnnaBridge 125:2e9cc70d1897 77 #define __SHADD16 __shadd16
AnnaBridge 125:2e9cc70d1897 78 #define __UADD16 __uadd16
AnnaBridge 125:2e9cc70d1897 79 #define __UQADD16 __uqadd16
AnnaBridge 125:2e9cc70d1897 80 #define __UHADD16 __uhadd16
AnnaBridge 125:2e9cc70d1897 81 #define __SSUB16 __ssub16
AnnaBridge 125:2e9cc70d1897 82 #define __QSUB16 __qsub16
AnnaBridge 125:2e9cc70d1897 83 #define __SHSUB16 __shsub16
AnnaBridge 125:2e9cc70d1897 84 #define __USUB16 __usub16
AnnaBridge 125:2e9cc70d1897 85 #define __UQSUB16 __uqsub16
AnnaBridge 125:2e9cc70d1897 86 #define __UHSUB16 __uhsub16
AnnaBridge 125:2e9cc70d1897 87 #define __SASX __sasx
AnnaBridge 125:2e9cc70d1897 88 #define __QASX __qasx
AnnaBridge 125:2e9cc70d1897 89 #define __SHASX __shasx
AnnaBridge 125:2e9cc70d1897 90 #define __UASX __uasx
AnnaBridge 125:2e9cc70d1897 91 #define __UQASX __uqasx
AnnaBridge 125:2e9cc70d1897 92 #define __UHASX __uhasx
AnnaBridge 125:2e9cc70d1897 93 #define __SSAX __ssax
AnnaBridge 125:2e9cc70d1897 94 #define __QSAX __qsax
AnnaBridge 125:2e9cc70d1897 95 #define __SHSAX __shsax
AnnaBridge 125:2e9cc70d1897 96 #define __USAX __usax
AnnaBridge 125:2e9cc70d1897 97 #define __UQSAX __uqsax
AnnaBridge 125:2e9cc70d1897 98 #define __UHSAX __uhsax
AnnaBridge 125:2e9cc70d1897 99 #define __USAD8 __usad8
AnnaBridge 125:2e9cc70d1897 100 #define __USADA8 __usada8
AnnaBridge 125:2e9cc70d1897 101 #define __SSAT16 __ssat16
AnnaBridge 125:2e9cc70d1897 102 #define __USAT16 __usat16
AnnaBridge 125:2e9cc70d1897 103 #define __UXTB16 __uxtb16
AnnaBridge 125:2e9cc70d1897 104 #define __UXTAB16 __uxtab16
AnnaBridge 125:2e9cc70d1897 105 #define __SXTB16 __sxtb16
AnnaBridge 125:2e9cc70d1897 106 #define __SXTAB16 __sxtab16
AnnaBridge 125:2e9cc70d1897 107 #define __SMUAD __smuad
AnnaBridge 125:2e9cc70d1897 108 #define __SMUADX __smuadx
AnnaBridge 125:2e9cc70d1897 109 #define __SMLAD __smlad
AnnaBridge 125:2e9cc70d1897 110 #define __SMLADX __smladx
AnnaBridge 125:2e9cc70d1897 111 #define __SMLALD __smlald
AnnaBridge 125:2e9cc70d1897 112 #define __SMLALDX __smlaldx
AnnaBridge 125:2e9cc70d1897 113 #define __SMUSD __smusd
AnnaBridge 125:2e9cc70d1897 114 #define __SMUSDX __smusdx
AnnaBridge 125:2e9cc70d1897 115 #define __SMLSD __smlsd
AnnaBridge 125:2e9cc70d1897 116 #define __SMLSDX __smlsdx
AnnaBridge 125:2e9cc70d1897 117 #define __SMLSLD __smlsld
AnnaBridge 125:2e9cc70d1897 118 #define __SMLSLDX __smlsldx
AnnaBridge 125:2e9cc70d1897 119 #define __SEL __sel
AnnaBridge 125:2e9cc70d1897 120 #define __QADD __qadd
AnnaBridge 125:2e9cc70d1897 121 #define __QSUB __qsub
AnnaBridge 125:2e9cc70d1897 122
AnnaBridge 125:2e9cc70d1897 123 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 125:2e9cc70d1897 124 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 125:2e9cc70d1897 125
AnnaBridge 125:2e9cc70d1897 126 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 125:2e9cc70d1897 127 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 125:2e9cc70d1897 128
AnnaBridge 125:2e9cc70d1897 129 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
AnnaBridge 125:2e9cc70d1897 130 ((int64_t)(ARG3) << 32) ) >> 32))
AnnaBridge 125:2e9cc70d1897 131
AnnaBridge 125:2e9cc70d1897 132
AnnaBridge 125:2e9cc70d1897 133 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
AnnaBridge 125:2e9cc70d1897 134 /* GNU gcc specific functions */
AnnaBridge 125:2e9cc70d1897 135 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 136 {
AnnaBridge 125:2e9cc70d1897 137 uint32_t result;
AnnaBridge 125:2e9cc70d1897 138
AnnaBridge 125:2e9cc70d1897 139 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 140 return(result);
AnnaBridge 125:2e9cc70d1897 141 }
AnnaBridge 125:2e9cc70d1897 142
AnnaBridge 125:2e9cc70d1897 143 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 144 {
AnnaBridge 125:2e9cc70d1897 145 uint32_t result;
AnnaBridge 125:2e9cc70d1897 146
AnnaBridge 125:2e9cc70d1897 147 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 148 return(result);
AnnaBridge 125:2e9cc70d1897 149 }
AnnaBridge 125:2e9cc70d1897 150
AnnaBridge 125:2e9cc70d1897 151 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 152 {
AnnaBridge 125:2e9cc70d1897 153 uint32_t result;
AnnaBridge 125:2e9cc70d1897 154
AnnaBridge 125:2e9cc70d1897 155 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 156 return(result);
AnnaBridge 125:2e9cc70d1897 157 }
AnnaBridge 125:2e9cc70d1897 158
AnnaBridge 125:2e9cc70d1897 159 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 160 {
AnnaBridge 125:2e9cc70d1897 161 uint32_t result;
AnnaBridge 125:2e9cc70d1897 162
AnnaBridge 125:2e9cc70d1897 163 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 164 return(result);
AnnaBridge 125:2e9cc70d1897 165 }
AnnaBridge 125:2e9cc70d1897 166
AnnaBridge 125:2e9cc70d1897 167 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 168 {
AnnaBridge 125:2e9cc70d1897 169 uint32_t result;
AnnaBridge 125:2e9cc70d1897 170
AnnaBridge 125:2e9cc70d1897 171 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 172 return(result);
AnnaBridge 125:2e9cc70d1897 173 }
AnnaBridge 125:2e9cc70d1897 174
AnnaBridge 125:2e9cc70d1897 175 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 176 {
AnnaBridge 125:2e9cc70d1897 177 uint32_t result;
AnnaBridge 125:2e9cc70d1897 178
AnnaBridge 125:2e9cc70d1897 179 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 180 return(result);
AnnaBridge 125:2e9cc70d1897 181 }
AnnaBridge 125:2e9cc70d1897 182
AnnaBridge 125:2e9cc70d1897 183
AnnaBridge 125:2e9cc70d1897 184 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 185 {
AnnaBridge 125:2e9cc70d1897 186 uint32_t result;
AnnaBridge 125:2e9cc70d1897 187
AnnaBridge 125:2e9cc70d1897 188 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 189 return(result);
AnnaBridge 125:2e9cc70d1897 190 }
AnnaBridge 125:2e9cc70d1897 191
AnnaBridge 125:2e9cc70d1897 192 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 193 {
AnnaBridge 125:2e9cc70d1897 194 uint32_t result;
AnnaBridge 125:2e9cc70d1897 195
AnnaBridge 125:2e9cc70d1897 196 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 197 return(result);
AnnaBridge 125:2e9cc70d1897 198 }
AnnaBridge 125:2e9cc70d1897 199
AnnaBridge 125:2e9cc70d1897 200 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 201 {
AnnaBridge 125:2e9cc70d1897 202 uint32_t result;
AnnaBridge 125:2e9cc70d1897 203
AnnaBridge 125:2e9cc70d1897 204 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 205 return(result);
AnnaBridge 125:2e9cc70d1897 206 }
AnnaBridge 125:2e9cc70d1897 207
AnnaBridge 125:2e9cc70d1897 208 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 209 {
AnnaBridge 125:2e9cc70d1897 210 uint32_t result;
AnnaBridge 125:2e9cc70d1897 211
AnnaBridge 125:2e9cc70d1897 212 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 213 return(result);
AnnaBridge 125:2e9cc70d1897 214 }
AnnaBridge 125:2e9cc70d1897 215
AnnaBridge 125:2e9cc70d1897 216 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 217 {
AnnaBridge 125:2e9cc70d1897 218 uint32_t result;
AnnaBridge 125:2e9cc70d1897 219
AnnaBridge 125:2e9cc70d1897 220 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 221 return(result);
AnnaBridge 125:2e9cc70d1897 222 }
AnnaBridge 125:2e9cc70d1897 223
AnnaBridge 125:2e9cc70d1897 224 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 225 {
AnnaBridge 125:2e9cc70d1897 226 uint32_t result;
AnnaBridge 125:2e9cc70d1897 227
AnnaBridge 125:2e9cc70d1897 228 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 229 return(result);
AnnaBridge 125:2e9cc70d1897 230 }
AnnaBridge 125:2e9cc70d1897 231
AnnaBridge 125:2e9cc70d1897 232
AnnaBridge 125:2e9cc70d1897 233 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 234 {
AnnaBridge 125:2e9cc70d1897 235 uint32_t result;
AnnaBridge 125:2e9cc70d1897 236
AnnaBridge 125:2e9cc70d1897 237 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 238 return(result);
AnnaBridge 125:2e9cc70d1897 239 }
AnnaBridge 125:2e9cc70d1897 240
AnnaBridge 125:2e9cc70d1897 241 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 242 {
AnnaBridge 125:2e9cc70d1897 243 uint32_t result;
AnnaBridge 125:2e9cc70d1897 244
AnnaBridge 125:2e9cc70d1897 245 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 246 return(result);
AnnaBridge 125:2e9cc70d1897 247 }
AnnaBridge 125:2e9cc70d1897 248
AnnaBridge 125:2e9cc70d1897 249 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 250 {
AnnaBridge 125:2e9cc70d1897 251 uint32_t result;
AnnaBridge 125:2e9cc70d1897 252
AnnaBridge 125:2e9cc70d1897 253 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 254 return(result);
AnnaBridge 125:2e9cc70d1897 255 }
AnnaBridge 125:2e9cc70d1897 256
AnnaBridge 125:2e9cc70d1897 257 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 258 {
AnnaBridge 125:2e9cc70d1897 259 uint32_t result;
AnnaBridge 125:2e9cc70d1897 260
AnnaBridge 125:2e9cc70d1897 261 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 262 return(result);
AnnaBridge 125:2e9cc70d1897 263 }
AnnaBridge 125:2e9cc70d1897 264
AnnaBridge 125:2e9cc70d1897 265 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 266 {
AnnaBridge 125:2e9cc70d1897 267 uint32_t result;
AnnaBridge 125:2e9cc70d1897 268
AnnaBridge 125:2e9cc70d1897 269 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 270 return(result);
AnnaBridge 125:2e9cc70d1897 271 }
AnnaBridge 125:2e9cc70d1897 272
AnnaBridge 125:2e9cc70d1897 273 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 274 {
AnnaBridge 125:2e9cc70d1897 275 uint32_t result;
AnnaBridge 125:2e9cc70d1897 276
AnnaBridge 125:2e9cc70d1897 277 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 278 return(result);
AnnaBridge 125:2e9cc70d1897 279 }
AnnaBridge 125:2e9cc70d1897 280
AnnaBridge 125:2e9cc70d1897 281 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 282 {
AnnaBridge 125:2e9cc70d1897 283 uint32_t result;
AnnaBridge 125:2e9cc70d1897 284
AnnaBridge 125:2e9cc70d1897 285 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 286 return(result);
AnnaBridge 125:2e9cc70d1897 287 }
AnnaBridge 125:2e9cc70d1897 288
AnnaBridge 125:2e9cc70d1897 289 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 290 {
AnnaBridge 125:2e9cc70d1897 291 uint32_t result;
AnnaBridge 125:2e9cc70d1897 292
AnnaBridge 125:2e9cc70d1897 293 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 294 return(result);
AnnaBridge 125:2e9cc70d1897 295 }
AnnaBridge 125:2e9cc70d1897 296
AnnaBridge 125:2e9cc70d1897 297 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 298 {
AnnaBridge 125:2e9cc70d1897 299 uint32_t result;
AnnaBridge 125:2e9cc70d1897 300
AnnaBridge 125:2e9cc70d1897 301 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 302 return(result);
AnnaBridge 125:2e9cc70d1897 303 }
AnnaBridge 125:2e9cc70d1897 304
AnnaBridge 125:2e9cc70d1897 305 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 306 {
AnnaBridge 125:2e9cc70d1897 307 uint32_t result;
AnnaBridge 125:2e9cc70d1897 308
AnnaBridge 125:2e9cc70d1897 309 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 310 return(result);
AnnaBridge 125:2e9cc70d1897 311 }
AnnaBridge 125:2e9cc70d1897 312
AnnaBridge 125:2e9cc70d1897 313 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 314 {
AnnaBridge 125:2e9cc70d1897 315 uint32_t result;
AnnaBridge 125:2e9cc70d1897 316
AnnaBridge 125:2e9cc70d1897 317 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 318 return(result);
AnnaBridge 125:2e9cc70d1897 319 }
AnnaBridge 125:2e9cc70d1897 320
AnnaBridge 125:2e9cc70d1897 321 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 322 {
AnnaBridge 125:2e9cc70d1897 323 uint32_t result;
AnnaBridge 125:2e9cc70d1897 324
AnnaBridge 125:2e9cc70d1897 325 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 326 return(result);
AnnaBridge 125:2e9cc70d1897 327 }
AnnaBridge 125:2e9cc70d1897 328
AnnaBridge 125:2e9cc70d1897 329 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 330 {
AnnaBridge 125:2e9cc70d1897 331 uint32_t result;
AnnaBridge 125:2e9cc70d1897 332
AnnaBridge 125:2e9cc70d1897 333 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 334 return(result);
AnnaBridge 125:2e9cc70d1897 335 }
AnnaBridge 125:2e9cc70d1897 336
AnnaBridge 125:2e9cc70d1897 337 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 338 {
AnnaBridge 125:2e9cc70d1897 339 uint32_t result;
AnnaBridge 125:2e9cc70d1897 340
AnnaBridge 125:2e9cc70d1897 341 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 342 return(result);
AnnaBridge 125:2e9cc70d1897 343 }
AnnaBridge 125:2e9cc70d1897 344
AnnaBridge 125:2e9cc70d1897 345 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 346 {
AnnaBridge 125:2e9cc70d1897 347 uint32_t result;
AnnaBridge 125:2e9cc70d1897 348
AnnaBridge 125:2e9cc70d1897 349 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 350 return(result);
AnnaBridge 125:2e9cc70d1897 351 }
AnnaBridge 125:2e9cc70d1897 352
AnnaBridge 125:2e9cc70d1897 353 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 354 {
AnnaBridge 125:2e9cc70d1897 355 uint32_t result;
AnnaBridge 125:2e9cc70d1897 356
AnnaBridge 125:2e9cc70d1897 357 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 358 return(result);
AnnaBridge 125:2e9cc70d1897 359 }
AnnaBridge 125:2e9cc70d1897 360
AnnaBridge 125:2e9cc70d1897 361 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 362 {
AnnaBridge 125:2e9cc70d1897 363 uint32_t result;
AnnaBridge 125:2e9cc70d1897 364
AnnaBridge 125:2e9cc70d1897 365 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 366 return(result);
AnnaBridge 125:2e9cc70d1897 367 }
AnnaBridge 125:2e9cc70d1897 368
AnnaBridge 125:2e9cc70d1897 369 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 370 {
AnnaBridge 125:2e9cc70d1897 371 uint32_t result;
AnnaBridge 125:2e9cc70d1897 372
AnnaBridge 125:2e9cc70d1897 373 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 374 return(result);
AnnaBridge 125:2e9cc70d1897 375 }
AnnaBridge 125:2e9cc70d1897 376
AnnaBridge 125:2e9cc70d1897 377 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 378 {
AnnaBridge 125:2e9cc70d1897 379 uint32_t result;
AnnaBridge 125:2e9cc70d1897 380
AnnaBridge 125:2e9cc70d1897 381 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 382 return(result);
AnnaBridge 125:2e9cc70d1897 383 }
AnnaBridge 125:2e9cc70d1897 384
AnnaBridge 125:2e9cc70d1897 385 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 386 {
AnnaBridge 125:2e9cc70d1897 387 uint32_t result;
AnnaBridge 125:2e9cc70d1897 388
AnnaBridge 125:2e9cc70d1897 389 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 390 return(result);
AnnaBridge 125:2e9cc70d1897 391 }
AnnaBridge 125:2e9cc70d1897 392
AnnaBridge 125:2e9cc70d1897 393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 394 {
AnnaBridge 125:2e9cc70d1897 395 uint32_t result;
AnnaBridge 125:2e9cc70d1897 396
AnnaBridge 125:2e9cc70d1897 397 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 398 return(result);
AnnaBridge 125:2e9cc70d1897 399 }
AnnaBridge 125:2e9cc70d1897 400
AnnaBridge 125:2e9cc70d1897 401 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 402 {
AnnaBridge 125:2e9cc70d1897 403 uint32_t result;
AnnaBridge 125:2e9cc70d1897 404
AnnaBridge 125:2e9cc70d1897 405 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 406 return(result);
AnnaBridge 125:2e9cc70d1897 407 }
AnnaBridge 125:2e9cc70d1897 408
AnnaBridge 125:2e9cc70d1897 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 410 {
AnnaBridge 125:2e9cc70d1897 411 uint32_t result;
AnnaBridge 125:2e9cc70d1897 412
AnnaBridge 125:2e9cc70d1897 413 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 414 return(result);
AnnaBridge 125:2e9cc70d1897 415 }
AnnaBridge 125:2e9cc70d1897 416
AnnaBridge 125:2e9cc70d1897 417 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 418 {
AnnaBridge 125:2e9cc70d1897 419 uint32_t result;
AnnaBridge 125:2e9cc70d1897 420
AnnaBridge 125:2e9cc70d1897 421 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 422 return(result);
AnnaBridge 125:2e9cc70d1897 423 }
AnnaBridge 125:2e9cc70d1897 424
AnnaBridge 125:2e9cc70d1897 425 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 426 {
AnnaBridge 125:2e9cc70d1897 427 uint32_t result;
AnnaBridge 125:2e9cc70d1897 428
AnnaBridge 125:2e9cc70d1897 429 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 430 return(result);
AnnaBridge 125:2e9cc70d1897 431 }
AnnaBridge 125:2e9cc70d1897 432
AnnaBridge 125:2e9cc70d1897 433 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 125:2e9cc70d1897 434 {
AnnaBridge 125:2e9cc70d1897 435 uint32_t result;
AnnaBridge 125:2e9cc70d1897 436
AnnaBridge 125:2e9cc70d1897 437 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 438 return(result);
AnnaBridge 125:2e9cc70d1897 439 }
AnnaBridge 125:2e9cc70d1897 440
AnnaBridge 125:2e9cc70d1897 441 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 125:2e9cc70d1897 442 ({ \
AnnaBridge 125:2e9cc70d1897 443 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 125:2e9cc70d1897 444 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 125:2e9cc70d1897 445 __RES; \
AnnaBridge 125:2e9cc70d1897 446 })
AnnaBridge 125:2e9cc70d1897 447
AnnaBridge 125:2e9cc70d1897 448 #define __USAT16(ARG1,ARG2) \
AnnaBridge 125:2e9cc70d1897 449 ({ \
AnnaBridge 125:2e9cc70d1897 450 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 125:2e9cc70d1897 451 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 125:2e9cc70d1897 452 __RES; \
AnnaBridge 125:2e9cc70d1897 453 })
AnnaBridge 125:2e9cc70d1897 454
AnnaBridge 125:2e9cc70d1897 455 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 125:2e9cc70d1897 456 {
AnnaBridge 125:2e9cc70d1897 457 uint32_t result;
AnnaBridge 125:2e9cc70d1897 458
AnnaBridge 125:2e9cc70d1897 459 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 125:2e9cc70d1897 460 return(result);
AnnaBridge 125:2e9cc70d1897 461 }
AnnaBridge 125:2e9cc70d1897 462
AnnaBridge 125:2e9cc70d1897 463 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 464 {
AnnaBridge 125:2e9cc70d1897 465 uint32_t result;
AnnaBridge 125:2e9cc70d1897 466
AnnaBridge 125:2e9cc70d1897 467 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 468 return(result);
AnnaBridge 125:2e9cc70d1897 469 }
AnnaBridge 125:2e9cc70d1897 470
AnnaBridge 125:2e9cc70d1897 471 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 125:2e9cc70d1897 472 {
AnnaBridge 125:2e9cc70d1897 473 uint32_t result;
AnnaBridge 125:2e9cc70d1897 474
AnnaBridge 125:2e9cc70d1897 475 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 125:2e9cc70d1897 476 return(result);
AnnaBridge 125:2e9cc70d1897 477 }
AnnaBridge 125:2e9cc70d1897 478
AnnaBridge 125:2e9cc70d1897 479 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 480 {
AnnaBridge 125:2e9cc70d1897 481 uint32_t result;
AnnaBridge 125:2e9cc70d1897 482
AnnaBridge 125:2e9cc70d1897 483 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 484 return(result);
AnnaBridge 125:2e9cc70d1897 485 }
AnnaBridge 125:2e9cc70d1897 486
AnnaBridge 125:2e9cc70d1897 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 488 {
AnnaBridge 125:2e9cc70d1897 489 uint32_t result;
AnnaBridge 125:2e9cc70d1897 490
AnnaBridge 125:2e9cc70d1897 491 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 492 return(result);
AnnaBridge 125:2e9cc70d1897 493 }
AnnaBridge 125:2e9cc70d1897 494
AnnaBridge 125:2e9cc70d1897 495 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 496 {
AnnaBridge 125:2e9cc70d1897 497 uint32_t result;
AnnaBridge 125:2e9cc70d1897 498
AnnaBridge 125:2e9cc70d1897 499 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 500 return(result);
AnnaBridge 125:2e9cc70d1897 501 }
AnnaBridge 125:2e9cc70d1897 502
AnnaBridge 125:2e9cc70d1897 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 125:2e9cc70d1897 504 {
AnnaBridge 125:2e9cc70d1897 505 uint32_t result;
AnnaBridge 125:2e9cc70d1897 506
AnnaBridge 125:2e9cc70d1897 507 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 508 return(result);
AnnaBridge 125:2e9cc70d1897 509 }
AnnaBridge 125:2e9cc70d1897 510
AnnaBridge 125:2e9cc70d1897 511 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 125:2e9cc70d1897 512 {
AnnaBridge 125:2e9cc70d1897 513 uint32_t result;
AnnaBridge 125:2e9cc70d1897 514
AnnaBridge 125:2e9cc70d1897 515 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 516 return(result);
AnnaBridge 125:2e9cc70d1897 517 }
AnnaBridge 125:2e9cc70d1897 518
AnnaBridge 125:2e9cc70d1897 519 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 125:2e9cc70d1897 520 {
AnnaBridge 125:2e9cc70d1897 521 union llreg_u{
AnnaBridge 125:2e9cc70d1897 522 uint32_t w32[2];
AnnaBridge 125:2e9cc70d1897 523 uint64_t w64;
AnnaBridge 125:2e9cc70d1897 524 } llr;
AnnaBridge 125:2e9cc70d1897 525 llr.w64 = acc;
AnnaBridge 125:2e9cc70d1897 526
AnnaBridge 125:2e9cc70d1897 527 #ifndef __ARMEB__ // Little endian
AnnaBridge 125:2e9cc70d1897 528 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 125:2e9cc70d1897 529 #else // Big endian
AnnaBridge 125:2e9cc70d1897 530 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 125:2e9cc70d1897 531 #endif
AnnaBridge 125:2e9cc70d1897 532
AnnaBridge 125:2e9cc70d1897 533 return(llr.w64);
AnnaBridge 125:2e9cc70d1897 534 }
AnnaBridge 125:2e9cc70d1897 535
AnnaBridge 125:2e9cc70d1897 536 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 125:2e9cc70d1897 537 {
AnnaBridge 125:2e9cc70d1897 538 union llreg_u{
AnnaBridge 125:2e9cc70d1897 539 uint32_t w32[2];
AnnaBridge 125:2e9cc70d1897 540 uint64_t w64;
AnnaBridge 125:2e9cc70d1897 541 } llr;
AnnaBridge 125:2e9cc70d1897 542 llr.w64 = acc;
AnnaBridge 125:2e9cc70d1897 543
AnnaBridge 125:2e9cc70d1897 544 #ifndef __ARMEB__ // Little endian
AnnaBridge 125:2e9cc70d1897 545 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 125:2e9cc70d1897 546 #else // Big endian
AnnaBridge 125:2e9cc70d1897 547 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 125:2e9cc70d1897 548 #endif
AnnaBridge 125:2e9cc70d1897 549
AnnaBridge 125:2e9cc70d1897 550 return(llr.w64);
AnnaBridge 125:2e9cc70d1897 551 }
AnnaBridge 125:2e9cc70d1897 552
AnnaBridge 125:2e9cc70d1897 553 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 554 {
AnnaBridge 125:2e9cc70d1897 555 uint32_t result;
AnnaBridge 125:2e9cc70d1897 556
AnnaBridge 125:2e9cc70d1897 557 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 558 return(result);
AnnaBridge 125:2e9cc70d1897 559 }
AnnaBridge 125:2e9cc70d1897 560
AnnaBridge 125:2e9cc70d1897 561 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 562 {
AnnaBridge 125:2e9cc70d1897 563 uint32_t result;
AnnaBridge 125:2e9cc70d1897 564
AnnaBridge 125:2e9cc70d1897 565 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 566 return(result);
AnnaBridge 125:2e9cc70d1897 567 }
AnnaBridge 125:2e9cc70d1897 568
AnnaBridge 125:2e9cc70d1897 569 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 125:2e9cc70d1897 570 {
AnnaBridge 125:2e9cc70d1897 571 uint32_t result;
AnnaBridge 125:2e9cc70d1897 572
AnnaBridge 125:2e9cc70d1897 573 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 574 return(result);
AnnaBridge 125:2e9cc70d1897 575 }
AnnaBridge 125:2e9cc70d1897 576
AnnaBridge 125:2e9cc70d1897 577 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 125:2e9cc70d1897 578 {
AnnaBridge 125:2e9cc70d1897 579 uint32_t result;
AnnaBridge 125:2e9cc70d1897 580
AnnaBridge 125:2e9cc70d1897 581 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 582 return(result);
AnnaBridge 125:2e9cc70d1897 583 }
AnnaBridge 125:2e9cc70d1897 584
AnnaBridge 125:2e9cc70d1897 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 125:2e9cc70d1897 586 {
AnnaBridge 125:2e9cc70d1897 587 union llreg_u{
AnnaBridge 125:2e9cc70d1897 588 uint32_t w32[2];
AnnaBridge 125:2e9cc70d1897 589 uint64_t w64;
AnnaBridge 125:2e9cc70d1897 590 } llr;
AnnaBridge 125:2e9cc70d1897 591 llr.w64 = acc;
AnnaBridge 125:2e9cc70d1897 592
AnnaBridge 125:2e9cc70d1897 593 #ifndef __ARMEB__ // Little endian
AnnaBridge 125:2e9cc70d1897 594 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 125:2e9cc70d1897 595 #else // Big endian
AnnaBridge 125:2e9cc70d1897 596 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 125:2e9cc70d1897 597 #endif
AnnaBridge 125:2e9cc70d1897 598
AnnaBridge 125:2e9cc70d1897 599 return(llr.w64);
AnnaBridge 125:2e9cc70d1897 600 }
AnnaBridge 125:2e9cc70d1897 601
AnnaBridge 125:2e9cc70d1897 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 125:2e9cc70d1897 603 {
AnnaBridge 125:2e9cc70d1897 604 union llreg_u{
AnnaBridge 125:2e9cc70d1897 605 uint32_t w32[2];
AnnaBridge 125:2e9cc70d1897 606 uint64_t w64;
AnnaBridge 125:2e9cc70d1897 607 } llr;
AnnaBridge 125:2e9cc70d1897 608 llr.w64 = acc;
AnnaBridge 125:2e9cc70d1897 609
AnnaBridge 125:2e9cc70d1897 610 #ifndef __ARMEB__ // Little endian
AnnaBridge 125:2e9cc70d1897 611 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 125:2e9cc70d1897 612 #else // Big endian
AnnaBridge 125:2e9cc70d1897 613 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 125:2e9cc70d1897 614 #endif
AnnaBridge 125:2e9cc70d1897 615
AnnaBridge 125:2e9cc70d1897 616 return(llr.w64);
AnnaBridge 125:2e9cc70d1897 617 }
AnnaBridge 125:2e9cc70d1897 618
AnnaBridge 125:2e9cc70d1897 619 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 620 {
AnnaBridge 125:2e9cc70d1897 621 uint32_t result;
AnnaBridge 125:2e9cc70d1897 622
AnnaBridge 125:2e9cc70d1897 623 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 624 return(result);
AnnaBridge 125:2e9cc70d1897 625 }
AnnaBridge 125:2e9cc70d1897 626
AnnaBridge 125:2e9cc70d1897 627 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 628 {
AnnaBridge 125:2e9cc70d1897 629 uint32_t result;
AnnaBridge 125:2e9cc70d1897 630
AnnaBridge 125:2e9cc70d1897 631 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 632 return(result);
AnnaBridge 125:2e9cc70d1897 633 }
AnnaBridge 125:2e9cc70d1897 634
AnnaBridge 125:2e9cc70d1897 635 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 636 {
AnnaBridge 125:2e9cc70d1897 637 uint32_t result;
AnnaBridge 125:2e9cc70d1897 638
AnnaBridge 125:2e9cc70d1897 639 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 640 return(result);
AnnaBridge 125:2e9cc70d1897 641 }
AnnaBridge 125:2e9cc70d1897 642
AnnaBridge 125:2e9cc70d1897 643 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 125:2e9cc70d1897 644 ({ \
AnnaBridge 125:2e9cc70d1897 645 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 125:2e9cc70d1897 646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 125:2e9cc70d1897 647 __RES; \
AnnaBridge 125:2e9cc70d1897 648 })
AnnaBridge 125:2e9cc70d1897 649
AnnaBridge 125:2e9cc70d1897 650 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 125:2e9cc70d1897 651 ({ \
AnnaBridge 125:2e9cc70d1897 652 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 125:2e9cc70d1897 653 if (ARG3 == 0) \
AnnaBridge 125:2e9cc70d1897 654 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 125:2e9cc70d1897 655 else \
AnnaBridge 125:2e9cc70d1897 656 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 125:2e9cc70d1897 657 __RES; \
AnnaBridge 125:2e9cc70d1897 658 })
AnnaBridge 125:2e9cc70d1897 659
AnnaBridge 125:2e9cc70d1897 660 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 125:2e9cc70d1897 661 {
AnnaBridge 125:2e9cc70d1897 662 int32_t result;
AnnaBridge 125:2e9cc70d1897 663
AnnaBridge 125:2e9cc70d1897 664 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 665 return(result);
AnnaBridge 125:2e9cc70d1897 666 }
AnnaBridge 125:2e9cc70d1897 667
AnnaBridge 125:2e9cc70d1897 668
AnnaBridge 125:2e9cc70d1897 669 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
AnnaBridge 125:2e9cc70d1897 670 /* IAR iccarm specific functions */
AnnaBridge 125:2e9cc70d1897 671 #include <cmsis_iar.h>
AnnaBridge 125:2e9cc70d1897 672
AnnaBridge 125:2e9cc70d1897 673
AnnaBridge 125:2e9cc70d1897 674 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
AnnaBridge 125:2e9cc70d1897 675 /* TI CCS specific functions */
AnnaBridge 125:2e9cc70d1897 676 #include <cmsis_ccs.h>
AnnaBridge 125:2e9cc70d1897 677
AnnaBridge 125:2e9cc70d1897 678
AnnaBridge 125:2e9cc70d1897 679 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
AnnaBridge 125:2e9cc70d1897 680 /* TASKING carm specific functions */
AnnaBridge 125:2e9cc70d1897 681 /* not yet supported */
AnnaBridge 125:2e9cc70d1897 682
AnnaBridge 125:2e9cc70d1897 683
AnnaBridge 125:2e9cc70d1897 684 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
AnnaBridge 125:2e9cc70d1897 685 /* Cosmic specific functions */
AnnaBridge 125:2e9cc70d1897 686 #include <cmsis_csm.h>
AnnaBridge 125:2e9cc70d1897 687
AnnaBridge 125:2e9cc70d1897 688 #endif
AnnaBridge 125:2e9cc70d1897 689
AnnaBridge 125:2e9cc70d1897 690 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 125:2e9cc70d1897 691
AnnaBridge 125:2e9cc70d1897 692
AnnaBridge 125:2e9cc70d1897 693 #ifdef __cplusplus
AnnaBridge 125:2e9cc70d1897 694 }
AnnaBridge 125:2e9cc70d1897 695 #endif
AnnaBridge 125:2e9cc70d1897 696
AnnaBridge 125:2e9cc70d1897 697 #endif /* __CORE_CMSIMD_H */