mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_LPC11U35_501/core_cm4_simd.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
81:7d30d6019079 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 81:7d30d6019079 1 /**************************************************************************//**
bogdanm 81:7d30d6019079 2 * @file core_cm4_simd.h
bogdanm 81:7d30d6019079 3 * @brief CMSIS Cortex-M4 SIMD Header File
bogdanm 81:7d30d6019079 4 * @version V3.20
bogdanm 81:7d30d6019079 5 * @date 25. February 2013
bogdanm 81:7d30d6019079 6 *
bogdanm 81:7d30d6019079 7 * @note
bogdanm 81:7d30d6019079 8 *
bogdanm 81:7d30d6019079 9 ******************************************************************************/
bogdanm 81:7d30d6019079 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 81:7d30d6019079 11
bogdanm 81:7d30d6019079 12 All rights reserved.
bogdanm 81:7d30d6019079 13 Redistribution and use in source and binary forms, with or without
bogdanm 81:7d30d6019079 14 modification, are permitted provided that the following conditions are met:
bogdanm 81:7d30d6019079 15 - Redistributions of source code must retain the above copyright
bogdanm 81:7d30d6019079 16 notice, this list of conditions and the following disclaimer.
bogdanm 81:7d30d6019079 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 81:7d30d6019079 18 notice, this list of conditions and the following disclaimer in the
bogdanm 81:7d30d6019079 19 documentation and/or other materials provided with the distribution.
bogdanm 81:7d30d6019079 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 81:7d30d6019079 21 to endorse or promote products derived from this software without
bogdanm 81:7d30d6019079 22 specific prior written permission.
bogdanm 81:7d30d6019079 23 *
bogdanm 81:7d30d6019079 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 81:7d30d6019079 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 81:7d30d6019079 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 81:7d30d6019079 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 81:7d30d6019079 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 81:7d30d6019079 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 81:7d30d6019079 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 81:7d30d6019079 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 81:7d30d6019079 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 81:7d30d6019079 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 81:7d30d6019079 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 81:7d30d6019079 35 ---------------------------------------------------------------------------*/
bogdanm 81:7d30d6019079 36
bogdanm 81:7d30d6019079 37
bogdanm 81:7d30d6019079 38 #ifdef __cplusplus
bogdanm 81:7d30d6019079 39 extern "C" {
bogdanm 81:7d30d6019079 40 #endif
bogdanm 81:7d30d6019079 41
bogdanm 81:7d30d6019079 42 #ifndef __CORE_CM4_SIMD_H
bogdanm 81:7d30d6019079 43 #define __CORE_CM4_SIMD_H
bogdanm 81:7d30d6019079 44
bogdanm 81:7d30d6019079 45
bogdanm 81:7d30d6019079 46 /*******************************************************************************
bogdanm 81:7d30d6019079 47 * Hardware Abstraction Layer
bogdanm 81:7d30d6019079 48 ******************************************************************************/
bogdanm 81:7d30d6019079 49
bogdanm 81:7d30d6019079 50
bogdanm 81:7d30d6019079 51 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 81:7d30d6019079 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 81:7d30d6019079 53 Access to dedicated SIMD instructions
bogdanm 81:7d30d6019079 54 @{
bogdanm 81:7d30d6019079 55 */
bogdanm 81:7d30d6019079 56
bogdanm 81:7d30d6019079 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 81:7d30d6019079 58 /* ARM armcc specific functions */
bogdanm 81:7d30d6019079 59
bogdanm 81:7d30d6019079 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 81:7d30d6019079 61 #define __SADD8 __sadd8
bogdanm 81:7d30d6019079 62 #define __QADD8 __qadd8
bogdanm 81:7d30d6019079 63 #define __SHADD8 __shadd8
bogdanm 81:7d30d6019079 64 #define __UADD8 __uadd8
bogdanm 81:7d30d6019079 65 #define __UQADD8 __uqadd8
bogdanm 81:7d30d6019079 66 #define __UHADD8 __uhadd8
bogdanm 81:7d30d6019079 67 #define __SSUB8 __ssub8
bogdanm 81:7d30d6019079 68 #define __QSUB8 __qsub8
bogdanm 81:7d30d6019079 69 #define __SHSUB8 __shsub8
bogdanm 81:7d30d6019079 70 #define __USUB8 __usub8
bogdanm 81:7d30d6019079 71 #define __UQSUB8 __uqsub8
bogdanm 81:7d30d6019079 72 #define __UHSUB8 __uhsub8
bogdanm 81:7d30d6019079 73 #define __SADD16 __sadd16
bogdanm 81:7d30d6019079 74 #define __QADD16 __qadd16
bogdanm 81:7d30d6019079 75 #define __SHADD16 __shadd16
bogdanm 81:7d30d6019079 76 #define __UADD16 __uadd16
bogdanm 81:7d30d6019079 77 #define __UQADD16 __uqadd16
bogdanm 81:7d30d6019079 78 #define __UHADD16 __uhadd16
bogdanm 81:7d30d6019079 79 #define __SSUB16 __ssub16
bogdanm 81:7d30d6019079 80 #define __QSUB16 __qsub16
bogdanm 81:7d30d6019079 81 #define __SHSUB16 __shsub16
bogdanm 81:7d30d6019079 82 #define __USUB16 __usub16
bogdanm 81:7d30d6019079 83 #define __UQSUB16 __uqsub16
bogdanm 81:7d30d6019079 84 #define __UHSUB16 __uhsub16
bogdanm 81:7d30d6019079 85 #define __SASX __sasx
bogdanm 81:7d30d6019079 86 #define __QASX __qasx
bogdanm 81:7d30d6019079 87 #define __SHASX __shasx
bogdanm 81:7d30d6019079 88 #define __UASX __uasx
bogdanm 81:7d30d6019079 89 #define __UQASX __uqasx
bogdanm 81:7d30d6019079 90 #define __UHASX __uhasx
bogdanm 81:7d30d6019079 91 #define __SSAX __ssax
bogdanm 81:7d30d6019079 92 #define __QSAX __qsax
bogdanm 81:7d30d6019079 93 #define __SHSAX __shsax
bogdanm 81:7d30d6019079 94 #define __USAX __usax
bogdanm 81:7d30d6019079 95 #define __UQSAX __uqsax
bogdanm 81:7d30d6019079 96 #define __UHSAX __uhsax
bogdanm 81:7d30d6019079 97 #define __USAD8 __usad8
bogdanm 81:7d30d6019079 98 #define __USADA8 __usada8
bogdanm 81:7d30d6019079 99 #define __SSAT16 __ssat16
bogdanm 81:7d30d6019079 100 #define __USAT16 __usat16
bogdanm 81:7d30d6019079 101 #define __UXTB16 __uxtb16
bogdanm 81:7d30d6019079 102 #define __UXTAB16 __uxtab16
bogdanm 81:7d30d6019079 103 #define __SXTB16 __sxtb16
bogdanm 81:7d30d6019079 104 #define __SXTAB16 __sxtab16
bogdanm 81:7d30d6019079 105 #define __SMUAD __smuad
bogdanm 81:7d30d6019079 106 #define __SMUADX __smuadx
bogdanm 81:7d30d6019079 107 #define __SMLAD __smlad
bogdanm 81:7d30d6019079 108 #define __SMLADX __smladx
bogdanm 81:7d30d6019079 109 #define __SMLALD __smlald
bogdanm 81:7d30d6019079 110 #define __SMLALDX __smlaldx
bogdanm 81:7d30d6019079 111 #define __SMUSD __smusd
bogdanm 81:7d30d6019079 112 #define __SMUSDX __smusdx
bogdanm 81:7d30d6019079 113 #define __SMLSD __smlsd
bogdanm 81:7d30d6019079 114 #define __SMLSDX __smlsdx
bogdanm 81:7d30d6019079 115 #define __SMLSLD __smlsld
bogdanm 81:7d30d6019079 116 #define __SMLSLDX __smlsldx
bogdanm 81:7d30d6019079 117 #define __SEL __sel
bogdanm 81:7d30d6019079 118 #define __QADD __qadd
bogdanm 81:7d30d6019079 119 #define __QSUB __qsub
bogdanm 81:7d30d6019079 120
bogdanm 81:7d30d6019079 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 81:7d30d6019079 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 81:7d30d6019079 123
bogdanm 81:7d30d6019079 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 81:7d30d6019079 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 81:7d30d6019079 126
bogdanm 81:7d30d6019079 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 81:7d30d6019079 128 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 81:7d30d6019079 129
bogdanm 81:7d30d6019079 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 81:7d30d6019079 131
bogdanm 81:7d30d6019079 132
bogdanm 81:7d30d6019079 133
bogdanm 81:7d30d6019079 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 81:7d30d6019079 135 /* IAR iccarm specific functions */
bogdanm 81:7d30d6019079 136
bogdanm 81:7d30d6019079 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 81:7d30d6019079 138 #include <cmsis_iar.h>
bogdanm 81:7d30d6019079 139
bogdanm 81:7d30d6019079 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 81:7d30d6019079 141
bogdanm 81:7d30d6019079 142
bogdanm 81:7d30d6019079 143
bogdanm 81:7d30d6019079 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 81:7d30d6019079 145 /* TI CCS specific functions */
bogdanm 81:7d30d6019079 146
bogdanm 81:7d30d6019079 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 81:7d30d6019079 148 #include <cmsis_ccs.h>
bogdanm 81:7d30d6019079 149
bogdanm 81:7d30d6019079 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 81:7d30d6019079 151
bogdanm 81:7d30d6019079 152
bogdanm 81:7d30d6019079 153
bogdanm 81:7d30d6019079 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 81:7d30d6019079 155 /* GNU gcc specific functions */
bogdanm 81:7d30d6019079 156
bogdanm 81:7d30d6019079 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 81:7d30d6019079 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 159 {
bogdanm 81:7d30d6019079 160 uint32_t result;
bogdanm 81:7d30d6019079 161
bogdanm 81:7d30d6019079 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 163 return(result);
bogdanm 81:7d30d6019079 164 }
bogdanm 81:7d30d6019079 165
bogdanm 81:7d30d6019079 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 167 {
bogdanm 81:7d30d6019079 168 uint32_t result;
bogdanm 81:7d30d6019079 169
bogdanm 81:7d30d6019079 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 171 return(result);
bogdanm 81:7d30d6019079 172 }
bogdanm 81:7d30d6019079 173
bogdanm 81:7d30d6019079 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 175 {
bogdanm 81:7d30d6019079 176 uint32_t result;
bogdanm 81:7d30d6019079 177
bogdanm 81:7d30d6019079 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 179 return(result);
bogdanm 81:7d30d6019079 180 }
bogdanm 81:7d30d6019079 181
bogdanm 81:7d30d6019079 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 183 {
bogdanm 81:7d30d6019079 184 uint32_t result;
bogdanm 81:7d30d6019079 185
bogdanm 81:7d30d6019079 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 187 return(result);
bogdanm 81:7d30d6019079 188 }
bogdanm 81:7d30d6019079 189
bogdanm 81:7d30d6019079 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 191 {
bogdanm 81:7d30d6019079 192 uint32_t result;
bogdanm 81:7d30d6019079 193
bogdanm 81:7d30d6019079 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 195 return(result);
bogdanm 81:7d30d6019079 196 }
bogdanm 81:7d30d6019079 197
bogdanm 81:7d30d6019079 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 199 {
bogdanm 81:7d30d6019079 200 uint32_t result;
bogdanm 81:7d30d6019079 201
bogdanm 81:7d30d6019079 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 203 return(result);
bogdanm 81:7d30d6019079 204 }
bogdanm 81:7d30d6019079 205
bogdanm 81:7d30d6019079 206
bogdanm 81:7d30d6019079 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 208 {
bogdanm 81:7d30d6019079 209 uint32_t result;
bogdanm 81:7d30d6019079 210
bogdanm 81:7d30d6019079 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 212 return(result);
bogdanm 81:7d30d6019079 213 }
bogdanm 81:7d30d6019079 214
bogdanm 81:7d30d6019079 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 216 {
bogdanm 81:7d30d6019079 217 uint32_t result;
bogdanm 81:7d30d6019079 218
bogdanm 81:7d30d6019079 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 220 return(result);
bogdanm 81:7d30d6019079 221 }
bogdanm 81:7d30d6019079 222
bogdanm 81:7d30d6019079 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 224 {
bogdanm 81:7d30d6019079 225 uint32_t result;
bogdanm 81:7d30d6019079 226
bogdanm 81:7d30d6019079 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 228 return(result);
bogdanm 81:7d30d6019079 229 }
bogdanm 81:7d30d6019079 230
bogdanm 81:7d30d6019079 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 232 {
bogdanm 81:7d30d6019079 233 uint32_t result;
bogdanm 81:7d30d6019079 234
bogdanm 81:7d30d6019079 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 236 return(result);
bogdanm 81:7d30d6019079 237 }
bogdanm 81:7d30d6019079 238
bogdanm 81:7d30d6019079 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 240 {
bogdanm 81:7d30d6019079 241 uint32_t result;
bogdanm 81:7d30d6019079 242
bogdanm 81:7d30d6019079 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 244 return(result);
bogdanm 81:7d30d6019079 245 }
bogdanm 81:7d30d6019079 246
bogdanm 81:7d30d6019079 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 248 {
bogdanm 81:7d30d6019079 249 uint32_t result;
bogdanm 81:7d30d6019079 250
bogdanm 81:7d30d6019079 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 252 return(result);
bogdanm 81:7d30d6019079 253 }
bogdanm 81:7d30d6019079 254
bogdanm 81:7d30d6019079 255
bogdanm 81:7d30d6019079 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 257 {
bogdanm 81:7d30d6019079 258 uint32_t result;
bogdanm 81:7d30d6019079 259
bogdanm 81:7d30d6019079 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 261 return(result);
bogdanm 81:7d30d6019079 262 }
bogdanm 81:7d30d6019079 263
bogdanm 81:7d30d6019079 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 265 {
bogdanm 81:7d30d6019079 266 uint32_t result;
bogdanm 81:7d30d6019079 267
bogdanm 81:7d30d6019079 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 269 return(result);
bogdanm 81:7d30d6019079 270 }
bogdanm 81:7d30d6019079 271
bogdanm 81:7d30d6019079 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 273 {
bogdanm 81:7d30d6019079 274 uint32_t result;
bogdanm 81:7d30d6019079 275
bogdanm 81:7d30d6019079 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 277 return(result);
bogdanm 81:7d30d6019079 278 }
bogdanm 81:7d30d6019079 279
bogdanm 81:7d30d6019079 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 281 {
bogdanm 81:7d30d6019079 282 uint32_t result;
bogdanm 81:7d30d6019079 283
bogdanm 81:7d30d6019079 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 285 return(result);
bogdanm 81:7d30d6019079 286 }
bogdanm 81:7d30d6019079 287
bogdanm 81:7d30d6019079 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 289 {
bogdanm 81:7d30d6019079 290 uint32_t result;
bogdanm 81:7d30d6019079 291
bogdanm 81:7d30d6019079 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 293 return(result);
bogdanm 81:7d30d6019079 294 }
bogdanm 81:7d30d6019079 295
bogdanm 81:7d30d6019079 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 297 {
bogdanm 81:7d30d6019079 298 uint32_t result;
bogdanm 81:7d30d6019079 299
bogdanm 81:7d30d6019079 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 301 return(result);
bogdanm 81:7d30d6019079 302 }
bogdanm 81:7d30d6019079 303
bogdanm 81:7d30d6019079 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 305 {
bogdanm 81:7d30d6019079 306 uint32_t result;
bogdanm 81:7d30d6019079 307
bogdanm 81:7d30d6019079 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 309 return(result);
bogdanm 81:7d30d6019079 310 }
bogdanm 81:7d30d6019079 311
bogdanm 81:7d30d6019079 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 313 {
bogdanm 81:7d30d6019079 314 uint32_t result;
bogdanm 81:7d30d6019079 315
bogdanm 81:7d30d6019079 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 317 return(result);
bogdanm 81:7d30d6019079 318 }
bogdanm 81:7d30d6019079 319
bogdanm 81:7d30d6019079 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 321 {
bogdanm 81:7d30d6019079 322 uint32_t result;
bogdanm 81:7d30d6019079 323
bogdanm 81:7d30d6019079 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 325 return(result);
bogdanm 81:7d30d6019079 326 }
bogdanm 81:7d30d6019079 327
bogdanm 81:7d30d6019079 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 329 {
bogdanm 81:7d30d6019079 330 uint32_t result;
bogdanm 81:7d30d6019079 331
bogdanm 81:7d30d6019079 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 333 return(result);
bogdanm 81:7d30d6019079 334 }
bogdanm 81:7d30d6019079 335
bogdanm 81:7d30d6019079 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 337 {
bogdanm 81:7d30d6019079 338 uint32_t result;
bogdanm 81:7d30d6019079 339
bogdanm 81:7d30d6019079 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 341 return(result);
bogdanm 81:7d30d6019079 342 }
bogdanm 81:7d30d6019079 343
bogdanm 81:7d30d6019079 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 345 {
bogdanm 81:7d30d6019079 346 uint32_t result;
bogdanm 81:7d30d6019079 347
bogdanm 81:7d30d6019079 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 349 return(result);
bogdanm 81:7d30d6019079 350 }
bogdanm 81:7d30d6019079 351
bogdanm 81:7d30d6019079 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 353 {
bogdanm 81:7d30d6019079 354 uint32_t result;
bogdanm 81:7d30d6019079 355
bogdanm 81:7d30d6019079 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 357 return(result);
bogdanm 81:7d30d6019079 358 }
bogdanm 81:7d30d6019079 359
bogdanm 81:7d30d6019079 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 361 {
bogdanm 81:7d30d6019079 362 uint32_t result;
bogdanm 81:7d30d6019079 363
bogdanm 81:7d30d6019079 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 365 return(result);
bogdanm 81:7d30d6019079 366 }
bogdanm 81:7d30d6019079 367
bogdanm 81:7d30d6019079 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 369 {
bogdanm 81:7d30d6019079 370 uint32_t result;
bogdanm 81:7d30d6019079 371
bogdanm 81:7d30d6019079 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 373 return(result);
bogdanm 81:7d30d6019079 374 }
bogdanm 81:7d30d6019079 375
bogdanm 81:7d30d6019079 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 377 {
bogdanm 81:7d30d6019079 378 uint32_t result;
bogdanm 81:7d30d6019079 379
bogdanm 81:7d30d6019079 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 381 return(result);
bogdanm 81:7d30d6019079 382 }
bogdanm 81:7d30d6019079 383
bogdanm 81:7d30d6019079 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 385 {
bogdanm 81:7d30d6019079 386 uint32_t result;
bogdanm 81:7d30d6019079 387
bogdanm 81:7d30d6019079 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 389 return(result);
bogdanm 81:7d30d6019079 390 }
bogdanm 81:7d30d6019079 391
bogdanm 81:7d30d6019079 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 393 {
bogdanm 81:7d30d6019079 394 uint32_t result;
bogdanm 81:7d30d6019079 395
bogdanm 81:7d30d6019079 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 397 return(result);
bogdanm 81:7d30d6019079 398 }
bogdanm 81:7d30d6019079 399
bogdanm 81:7d30d6019079 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 401 {
bogdanm 81:7d30d6019079 402 uint32_t result;
bogdanm 81:7d30d6019079 403
bogdanm 81:7d30d6019079 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 405 return(result);
bogdanm 81:7d30d6019079 406 }
bogdanm 81:7d30d6019079 407
bogdanm 81:7d30d6019079 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 409 {
bogdanm 81:7d30d6019079 410 uint32_t result;
bogdanm 81:7d30d6019079 411
bogdanm 81:7d30d6019079 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 413 return(result);
bogdanm 81:7d30d6019079 414 }
bogdanm 81:7d30d6019079 415
bogdanm 81:7d30d6019079 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 417 {
bogdanm 81:7d30d6019079 418 uint32_t result;
bogdanm 81:7d30d6019079 419
bogdanm 81:7d30d6019079 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 421 return(result);
bogdanm 81:7d30d6019079 422 }
bogdanm 81:7d30d6019079 423
bogdanm 81:7d30d6019079 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 425 {
bogdanm 81:7d30d6019079 426 uint32_t result;
bogdanm 81:7d30d6019079 427
bogdanm 81:7d30d6019079 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 429 return(result);
bogdanm 81:7d30d6019079 430 }
bogdanm 81:7d30d6019079 431
bogdanm 81:7d30d6019079 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 433 {
bogdanm 81:7d30d6019079 434 uint32_t result;
bogdanm 81:7d30d6019079 435
bogdanm 81:7d30d6019079 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 437 return(result);
bogdanm 81:7d30d6019079 438 }
bogdanm 81:7d30d6019079 439
bogdanm 81:7d30d6019079 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 441 {
bogdanm 81:7d30d6019079 442 uint32_t result;
bogdanm 81:7d30d6019079 443
bogdanm 81:7d30d6019079 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 445 return(result);
bogdanm 81:7d30d6019079 446 }
bogdanm 81:7d30d6019079 447
bogdanm 81:7d30d6019079 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 449 {
bogdanm 81:7d30d6019079 450 uint32_t result;
bogdanm 81:7d30d6019079 451
bogdanm 81:7d30d6019079 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 453 return(result);
bogdanm 81:7d30d6019079 454 }
bogdanm 81:7d30d6019079 455
bogdanm 81:7d30d6019079 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 81:7d30d6019079 457 {
bogdanm 81:7d30d6019079 458 uint32_t result;
bogdanm 81:7d30d6019079 459
bogdanm 81:7d30d6019079 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 81:7d30d6019079 461 return(result);
bogdanm 81:7d30d6019079 462 }
bogdanm 81:7d30d6019079 463
bogdanm 81:7d30d6019079 464 #define __SSAT16(ARG1,ARG2) \
bogdanm 81:7d30d6019079 465 ({ \
bogdanm 81:7d30d6019079 466 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 81:7d30d6019079 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 81:7d30d6019079 468 __RES; \
bogdanm 81:7d30d6019079 469 })
bogdanm 81:7d30d6019079 470
bogdanm 81:7d30d6019079 471 #define __USAT16(ARG1,ARG2) \
bogdanm 81:7d30d6019079 472 ({ \
bogdanm 81:7d30d6019079 473 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 81:7d30d6019079 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 81:7d30d6019079 475 __RES; \
bogdanm 81:7d30d6019079 476 })
bogdanm 81:7d30d6019079 477
bogdanm 81:7d30d6019079 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 81:7d30d6019079 479 {
bogdanm 81:7d30d6019079 480 uint32_t result;
bogdanm 81:7d30d6019079 481
bogdanm 81:7d30d6019079 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 81:7d30d6019079 483 return(result);
bogdanm 81:7d30d6019079 484 }
bogdanm 81:7d30d6019079 485
bogdanm 81:7d30d6019079 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 487 {
bogdanm 81:7d30d6019079 488 uint32_t result;
bogdanm 81:7d30d6019079 489
bogdanm 81:7d30d6019079 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 491 return(result);
bogdanm 81:7d30d6019079 492 }
bogdanm 81:7d30d6019079 493
bogdanm 81:7d30d6019079 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 81:7d30d6019079 495 {
bogdanm 81:7d30d6019079 496 uint32_t result;
bogdanm 81:7d30d6019079 497
bogdanm 81:7d30d6019079 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 81:7d30d6019079 499 return(result);
bogdanm 81:7d30d6019079 500 }
bogdanm 81:7d30d6019079 501
bogdanm 81:7d30d6019079 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 503 {
bogdanm 81:7d30d6019079 504 uint32_t result;
bogdanm 81:7d30d6019079 505
bogdanm 81:7d30d6019079 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 507 return(result);
bogdanm 81:7d30d6019079 508 }
bogdanm 81:7d30d6019079 509
bogdanm 81:7d30d6019079 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 511 {
bogdanm 81:7d30d6019079 512 uint32_t result;
bogdanm 81:7d30d6019079 513
bogdanm 81:7d30d6019079 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 515 return(result);
bogdanm 81:7d30d6019079 516 }
bogdanm 81:7d30d6019079 517
bogdanm 81:7d30d6019079 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 519 {
bogdanm 81:7d30d6019079 520 uint32_t result;
bogdanm 81:7d30d6019079 521
bogdanm 81:7d30d6019079 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 523 return(result);
bogdanm 81:7d30d6019079 524 }
bogdanm 81:7d30d6019079 525
bogdanm 81:7d30d6019079 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 81:7d30d6019079 527 {
bogdanm 81:7d30d6019079 528 uint32_t result;
bogdanm 81:7d30d6019079 529
bogdanm 81:7d30d6019079 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 81:7d30d6019079 531 return(result);
bogdanm 81:7d30d6019079 532 }
bogdanm 81:7d30d6019079 533
bogdanm 81:7d30d6019079 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 81:7d30d6019079 535 {
bogdanm 81:7d30d6019079 536 uint32_t result;
bogdanm 81:7d30d6019079 537
bogdanm 81:7d30d6019079 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 81:7d30d6019079 539 return(result);
bogdanm 81:7d30d6019079 540 }
bogdanm 81:7d30d6019079 541
bogdanm 81:7d30d6019079 542 #define __SMLALD(ARG1,ARG2,ARG3) \
bogdanm 81:7d30d6019079 543 ({ \
bogdanm 81:7d30d6019079 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 81:7d30d6019079 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 81:7d30d6019079 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 81:7d30d6019079 547 })
bogdanm 81:7d30d6019079 548
bogdanm 81:7d30d6019079 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
bogdanm 81:7d30d6019079 550 ({ \
bogdanm 81:7d30d6019079 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 81:7d30d6019079 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 81:7d30d6019079 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 81:7d30d6019079 554 })
bogdanm 81:7d30d6019079 555
bogdanm 81:7d30d6019079 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 557 {
bogdanm 81:7d30d6019079 558 uint32_t result;
bogdanm 81:7d30d6019079 559
bogdanm 81:7d30d6019079 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 561 return(result);
bogdanm 81:7d30d6019079 562 }
bogdanm 81:7d30d6019079 563
bogdanm 81:7d30d6019079 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 565 {
bogdanm 81:7d30d6019079 566 uint32_t result;
bogdanm 81:7d30d6019079 567
bogdanm 81:7d30d6019079 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 569 return(result);
bogdanm 81:7d30d6019079 570 }
bogdanm 81:7d30d6019079 571
bogdanm 81:7d30d6019079 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 81:7d30d6019079 573 {
bogdanm 81:7d30d6019079 574 uint32_t result;
bogdanm 81:7d30d6019079 575
bogdanm 81:7d30d6019079 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 81:7d30d6019079 577 return(result);
bogdanm 81:7d30d6019079 578 }
bogdanm 81:7d30d6019079 579
bogdanm 81:7d30d6019079 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 81:7d30d6019079 581 {
bogdanm 81:7d30d6019079 582 uint32_t result;
bogdanm 81:7d30d6019079 583
bogdanm 81:7d30d6019079 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 81:7d30d6019079 585 return(result);
bogdanm 81:7d30d6019079 586 }
bogdanm 81:7d30d6019079 587
bogdanm 81:7d30d6019079 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
bogdanm 81:7d30d6019079 589 ({ \
bogdanm 81:7d30d6019079 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 81:7d30d6019079 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 81:7d30d6019079 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 81:7d30d6019079 593 })
bogdanm 81:7d30d6019079 594
bogdanm 81:7d30d6019079 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
bogdanm 81:7d30d6019079 596 ({ \
bogdanm 81:7d30d6019079 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 81:7d30d6019079 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 81:7d30d6019079 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 81:7d30d6019079 600 })
bogdanm 81:7d30d6019079 601
bogdanm 81:7d30d6019079 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 603 {
bogdanm 81:7d30d6019079 604 uint32_t result;
bogdanm 81:7d30d6019079 605
bogdanm 81:7d30d6019079 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 607 return(result);
bogdanm 81:7d30d6019079 608 }
bogdanm 81:7d30d6019079 609
bogdanm 81:7d30d6019079 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 611 {
bogdanm 81:7d30d6019079 612 uint32_t result;
bogdanm 81:7d30d6019079 613
bogdanm 81:7d30d6019079 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 615 return(result);
bogdanm 81:7d30d6019079 616 }
bogdanm 81:7d30d6019079 617
bogdanm 81:7d30d6019079 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 81:7d30d6019079 619 {
bogdanm 81:7d30d6019079 620 uint32_t result;
bogdanm 81:7d30d6019079 621
bogdanm 81:7d30d6019079 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 81:7d30d6019079 623 return(result);
bogdanm 81:7d30d6019079 624 }
bogdanm 81:7d30d6019079 625
bogdanm 81:7d30d6019079 626 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 81:7d30d6019079 627 ({ \
bogdanm 81:7d30d6019079 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 81:7d30d6019079 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 81:7d30d6019079 630 __RES; \
bogdanm 81:7d30d6019079 631 })
bogdanm 81:7d30d6019079 632
bogdanm 81:7d30d6019079 633 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 81:7d30d6019079 634 ({ \
bogdanm 81:7d30d6019079 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 81:7d30d6019079 636 if (ARG3 == 0) \
bogdanm 81:7d30d6019079 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 81:7d30d6019079 638 else \
bogdanm 81:7d30d6019079 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 81:7d30d6019079 640 __RES; \
bogdanm 81:7d30d6019079 641 })
bogdanm 81:7d30d6019079 642
bogdanm 81:7d30d6019079 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 81:7d30d6019079 644 {
bogdanm 81:7d30d6019079 645 int32_t result;
bogdanm 81:7d30d6019079 646
bogdanm 81:7d30d6019079 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 81:7d30d6019079 648 return(result);
bogdanm 81:7d30d6019079 649 }
bogdanm 81:7d30d6019079 650
bogdanm 81:7d30d6019079 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 81:7d30d6019079 652
bogdanm 81:7d30d6019079 653
bogdanm 81:7d30d6019079 654
bogdanm 81:7d30d6019079 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 81:7d30d6019079 656 /* TASKING carm specific functions */
bogdanm 81:7d30d6019079 657
bogdanm 81:7d30d6019079 658
bogdanm 81:7d30d6019079 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 81:7d30d6019079 660 /* not yet supported */
bogdanm 81:7d30d6019079 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 81:7d30d6019079 662
bogdanm 81:7d30d6019079 663
bogdanm 81:7d30d6019079 664 #endif
bogdanm 81:7d30d6019079 665
bogdanm 81:7d30d6019079 666 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 81:7d30d6019079 667
bogdanm 81:7d30d6019079 668
bogdanm 81:7d30d6019079 669 #endif /* __CORE_CM4_SIMD_H */
bogdanm 81:7d30d6019079 670
bogdanm 81:7d30d6019079 671 #ifdef __cplusplus
bogdanm 81:7d30d6019079 672 }
bogdanm 81:7d30d6019079 673 #endif