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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_LPC11U35_401/core_cmFunc.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
110:165afa46840b 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 74:a842253909c9 1 /**************************************************************************//**
bogdanm 74:a842253909c9 2 * @file core_cmFunc.h
bogdanm 74:a842253909c9 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 110:165afa46840b 4 * @version V4.10
Kojto 110:165afa46840b 5 * @date 18. March 2015
bogdanm 74:a842253909c9 6 *
bogdanm 74:a842253909c9 7 * @note
bogdanm 74:a842253909c9 8 *
bogdanm 74:a842253909c9 9 ******************************************************************************/
Kojto 110:165afa46840b 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
bogdanm 74:a842253909c9 11
bogdanm 74:a842253909c9 12 All rights reserved.
bogdanm 74:a842253909c9 13 Redistribution and use in source and binary forms, with or without
bogdanm 74:a842253909c9 14 modification, are permitted provided that the following conditions are met:
bogdanm 74:a842253909c9 15 - Redistributions of source code must retain the above copyright
bogdanm 74:a842253909c9 16 notice, this list of conditions and the following disclaimer.
bogdanm 74:a842253909c9 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 74:a842253909c9 18 notice, this list of conditions and the following disclaimer in the
bogdanm 74:a842253909c9 19 documentation and/or other materials provided with the distribution.
bogdanm 74:a842253909c9 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 74:a842253909c9 21 to endorse or promote products derived from this software without
bogdanm 74:a842253909c9 22 specific prior written permission.
bogdanm 74:a842253909c9 23 *
bogdanm 74:a842253909c9 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 74:a842253909c9 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 74:a842253909c9 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 74:a842253909c9 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 74:a842253909c9 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 74:a842253909c9 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 74:a842253909c9 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 74:a842253909c9 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 74:a842253909c9 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 74:a842253909c9 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 74:a842253909c9 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 74:a842253909c9 35 ---------------------------------------------------------------------------*/
bogdanm 74:a842253909c9 36
bogdanm 74:a842253909c9 37
bogdanm 74:a842253909c9 38 #ifndef __CORE_CMFUNC_H
bogdanm 74:a842253909c9 39 #define __CORE_CMFUNC_H
bogdanm 74:a842253909c9 40
bogdanm 74:a842253909c9 41
bogdanm 74:a842253909c9 42 /* ########################### Core Function Access ########################### */
bogdanm 74:a842253909c9 43 /** \ingroup CMSIS_Core_FunctionInterface
bogdanm 74:a842253909c9 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
bogdanm 74:a842253909c9 45 @{
bogdanm 74:a842253909c9 46 */
bogdanm 74:a842253909c9 47
bogdanm 74:a842253909c9 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 74:a842253909c9 49 /* ARM armcc specific functions */
bogdanm 74:a842253909c9 50
bogdanm 74:a842253909c9 51 #if (__ARMCC_VERSION < 400677)
bogdanm 74:a842253909c9 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 74:a842253909c9 53 #endif
bogdanm 74:a842253909c9 54
bogdanm 74:a842253909c9 55 /* intrinsic void __enable_irq(); */
bogdanm 74:a842253909c9 56 /* intrinsic void __disable_irq(); */
bogdanm 74:a842253909c9 57
bogdanm 74:a842253909c9 58 /** \brief Get Control Register
bogdanm 74:a842253909c9 59
bogdanm 74:a842253909c9 60 This function returns the content of the Control Register.
bogdanm 74:a842253909c9 61
bogdanm 74:a842253909c9 62 \return Control Register value
bogdanm 74:a842253909c9 63 */
bogdanm 74:a842253909c9 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 74:a842253909c9 65 {
bogdanm 74:a842253909c9 66 register uint32_t __regControl __ASM("control");
bogdanm 74:a842253909c9 67 return(__regControl);
bogdanm 74:a842253909c9 68 }
bogdanm 74:a842253909c9 69
bogdanm 74:a842253909c9 70
bogdanm 74:a842253909c9 71 /** \brief Set Control Register
bogdanm 74:a842253909c9 72
bogdanm 74:a842253909c9 73 This function writes the given value to the Control Register.
bogdanm 74:a842253909c9 74
bogdanm 74:a842253909c9 75 \param [in] control Control Register value to set
bogdanm 74:a842253909c9 76 */
bogdanm 74:a842253909c9 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 74:a842253909c9 78 {
bogdanm 74:a842253909c9 79 register uint32_t __regControl __ASM("control");
bogdanm 74:a842253909c9 80 __regControl = control;
bogdanm 74:a842253909c9 81 }
bogdanm 74:a842253909c9 82
bogdanm 74:a842253909c9 83
bogdanm 74:a842253909c9 84 /** \brief Get IPSR Register
bogdanm 74:a842253909c9 85
bogdanm 74:a842253909c9 86 This function returns the content of the IPSR Register.
bogdanm 74:a842253909c9 87
bogdanm 74:a842253909c9 88 \return IPSR Register value
bogdanm 74:a842253909c9 89 */
bogdanm 74:a842253909c9 90 __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 74:a842253909c9 91 {
bogdanm 74:a842253909c9 92 register uint32_t __regIPSR __ASM("ipsr");
bogdanm 74:a842253909c9 93 return(__regIPSR);
bogdanm 74:a842253909c9 94 }
bogdanm 74:a842253909c9 95
bogdanm 74:a842253909c9 96
bogdanm 74:a842253909c9 97 /** \brief Get APSR Register
bogdanm 74:a842253909c9 98
bogdanm 74:a842253909c9 99 This function returns the content of the APSR Register.
bogdanm 74:a842253909c9 100
bogdanm 74:a842253909c9 101 \return APSR Register value
bogdanm 74:a842253909c9 102 */
bogdanm 74:a842253909c9 103 __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 74:a842253909c9 104 {
bogdanm 74:a842253909c9 105 register uint32_t __regAPSR __ASM("apsr");
bogdanm 74:a842253909c9 106 return(__regAPSR);
bogdanm 74:a842253909c9 107 }
bogdanm 74:a842253909c9 108
bogdanm 74:a842253909c9 109
bogdanm 74:a842253909c9 110 /** \brief Get xPSR Register
bogdanm 74:a842253909c9 111
bogdanm 74:a842253909c9 112 This function returns the content of the xPSR Register.
bogdanm 74:a842253909c9 113
bogdanm 74:a842253909c9 114 \return xPSR Register value
bogdanm 74:a842253909c9 115 */
bogdanm 74:a842253909c9 116 __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 74:a842253909c9 117 {
bogdanm 74:a842253909c9 118 register uint32_t __regXPSR __ASM("xpsr");
bogdanm 74:a842253909c9 119 return(__regXPSR);
bogdanm 74:a842253909c9 120 }
bogdanm 74:a842253909c9 121
bogdanm 74:a842253909c9 122
bogdanm 74:a842253909c9 123 /** \brief Get Process Stack Pointer
bogdanm 74:a842253909c9 124
bogdanm 74:a842253909c9 125 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 74:a842253909c9 126
bogdanm 74:a842253909c9 127 \return PSP Register value
bogdanm 74:a842253909c9 128 */
bogdanm 74:a842253909c9 129 __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 74:a842253909c9 130 {
bogdanm 74:a842253909c9 131 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 74:a842253909c9 132 return(__regProcessStackPointer);
bogdanm 74:a842253909c9 133 }
bogdanm 74:a842253909c9 134
bogdanm 74:a842253909c9 135
bogdanm 74:a842253909c9 136 /** \brief Set Process Stack Pointer
bogdanm 74:a842253909c9 137
bogdanm 74:a842253909c9 138 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 74:a842253909c9 139
bogdanm 74:a842253909c9 140 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 74:a842253909c9 141 */
bogdanm 74:a842253909c9 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 74:a842253909c9 143 {
bogdanm 74:a842253909c9 144 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 74:a842253909c9 145 __regProcessStackPointer = topOfProcStack;
bogdanm 74:a842253909c9 146 }
bogdanm 74:a842253909c9 147
bogdanm 74:a842253909c9 148
bogdanm 74:a842253909c9 149 /** \brief Get Main Stack Pointer
bogdanm 74:a842253909c9 150
bogdanm 74:a842253909c9 151 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 74:a842253909c9 152
bogdanm 74:a842253909c9 153 \return MSP Register value
bogdanm 74:a842253909c9 154 */
bogdanm 74:a842253909c9 155 __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 74:a842253909c9 156 {
bogdanm 74:a842253909c9 157 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 74:a842253909c9 158 return(__regMainStackPointer);
bogdanm 74:a842253909c9 159 }
bogdanm 74:a842253909c9 160
bogdanm 74:a842253909c9 161
bogdanm 74:a842253909c9 162 /** \brief Set Main Stack Pointer
bogdanm 74:a842253909c9 163
bogdanm 74:a842253909c9 164 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 74:a842253909c9 165
bogdanm 74:a842253909c9 166 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 74:a842253909c9 167 */
bogdanm 74:a842253909c9 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 74:a842253909c9 169 {
bogdanm 74:a842253909c9 170 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 74:a842253909c9 171 __regMainStackPointer = topOfMainStack;
bogdanm 74:a842253909c9 172 }
bogdanm 74:a842253909c9 173
bogdanm 74:a842253909c9 174
bogdanm 74:a842253909c9 175 /** \brief Get Priority Mask
bogdanm 74:a842253909c9 176
bogdanm 74:a842253909c9 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 74:a842253909c9 178
bogdanm 74:a842253909c9 179 \return Priority Mask value
bogdanm 74:a842253909c9 180 */
bogdanm 74:a842253909c9 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 74:a842253909c9 182 {
bogdanm 74:a842253909c9 183 register uint32_t __regPriMask __ASM("primask");
bogdanm 74:a842253909c9 184 return(__regPriMask);
bogdanm 74:a842253909c9 185 }
bogdanm 74:a842253909c9 186
bogdanm 74:a842253909c9 187
bogdanm 74:a842253909c9 188 /** \brief Set Priority Mask
bogdanm 74:a842253909c9 189
bogdanm 74:a842253909c9 190 This function assigns the given value to the Priority Mask Register.
bogdanm 74:a842253909c9 191
bogdanm 74:a842253909c9 192 \param [in] priMask Priority Mask
bogdanm 74:a842253909c9 193 */
bogdanm 74:a842253909c9 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 74:a842253909c9 195 {
bogdanm 74:a842253909c9 196 register uint32_t __regPriMask __ASM("primask");
bogdanm 74:a842253909c9 197 __regPriMask = (priMask);
bogdanm 74:a842253909c9 198 }
bogdanm 74:a842253909c9 199
bogdanm 74:a842253909c9 200
Kojto 110:165afa46840b 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
bogdanm 74:a842253909c9 202
bogdanm 74:a842253909c9 203 /** \brief Enable FIQ
bogdanm 74:a842253909c9 204
bogdanm 74:a842253909c9 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 74:a842253909c9 206 Can only be executed in Privileged modes.
bogdanm 74:a842253909c9 207 */
bogdanm 74:a842253909c9 208 #define __enable_fault_irq __enable_fiq
bogdanm 74:a842253909c9 209
bogdanm 74:a842253909c9 210
bogdanm 74:a842253909c9 211 /** \brief Disable FIQ
bogdanm 74:a842253909c9 212
bogdanm 74:a842253909c9 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 74:a842253909c9 214 Can only be executed in Privileged modes.
bogdanm 74:a842253909c9 215 */
bogdanm 74:a842253909c9 216 #define __disable_fault_irq __disable_fiq
bogdanm 74:a842253909c9 217
bogdanm 74:a842253909c9 218
bogdanm 74:a842253909c9 219 /** \brief Get Base Priority
bogdanm 74:a842253909c9 220
bogdanm 74:a842253909c9 221 This function returns the current value of the Base Priority register.
bogdanm 74:a842253909c9 222
bogdanm 74:a842253909c9 223 \return Base Priority register value
bogdanm 74:a842253909c9 224 */
bogdanm 74:a842253909c9 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 74:a842253909c9 226 {
bogdanm 74:a842253909c9 227 register uint32_t __regBasePri __ASM("basepri");
bogdanm 74:a842253909c9 228 return(__regBasePri);
bogdanm 74:a842253909c9 229 }
bogdanm 74:a842253909c9 230
bogdanm 74:a842253909c9 231
bogdanm 74:a842253909c9 232 /** \brief Set Base Priority
bogdanm 74:a842253909c9 233
bogdanm 74:a842253909c9 234 This function assigns the given value to the Base Priority register.
bogdanm 74:a842253909c9 235
bogdanm 74:a842253909c9 236 \param [in] basePri Base Priority value to set
bogdanm 74:a842253909c9 237 */
bogdanm 74:a842253909c9 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
bogdanm 74:a842253909c9 239 {
bogdanm 74:a842253909c9 240 register uint32_t __regBasePri __ASM("basepri");
bogdanm 74:a842253909c9 241 __regBasePri = (basePri & 0xff);
bogdanm 74:a842253909c9 242 }
bogdanm 74:a842253909c9 243
bogdanm 74:a842253909c9 244
Kojto 110:165afa46840b 245 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 246
Kojto 110:165afa46840b 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 248 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 249
Kojto 110:165afa46840b 250 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 251 */
Kojto 110:165afa46840b 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 110:165afa46840b 253 {
Kojto 110:165afa46840b 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Kojto 110:165afa46840b 255 __regBasePriMax = (basePri & 0xff);
Kojto 110:165afa46840b 256 }
Kojto 110:165afa46840b 257
Kojto 110:165afa46840b 258
bogdanm 74:a842253909c9 259 /** \brief Get Fault Mask
bogdanm 74:a842253909c9 260
bogdanm 74:a842253909c9 261 This function returns the current value of the Fault Mask register.
bogdanm 74:a842253909c9 262
bogdanm 74:a842253909c9 263 \return Fault Mask register value
bogdanm 74:a842253909c9 264 */
bogdanm 74:a842253909c9 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 74:a842253909c9 266 {
bogdanm 74:a842253909c9 267 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 74:a842253909c9 268 return(__regFaultMask);
bogdanm 74:a842253909c9 269 }
bogdanm 74:a842253909c9 270
bogdanm 74:a842253909c9 271
bogdanm 74:a842253909c9 272 /** \brief Set Fault Mask
bogdanm 74:a842253909c9 273
bogdanm 74:a842253909c9 274 This function assigns the given value to the Fault Mask register.
bogdanm 74:a842253909c9 275
bogdanm 74:a842253909c9 276 \param [in] faultMask Fault Mask value to set
bogdanm 74:a842253909c9 277 */
bogdanm 74:a842253909c9 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 74:a842253909c9 279 {
bogdanm 74:a842253909c9 280 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 74:a842253909c9 281 __regFaultMask = (faultMask & (uint32_t)1);
bogdanm 74:a842253909c9 282 }
bogdanm 74:a842253909c9 283
Kojto 110:165afa46840b 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
bogdanm 74:a842253909c9 285
bogdanm 74:a842253909c9 286
Kojto 110:165afa46840b 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 74:a842253909c9 288
bogdanm 74:a842253909c9 289 /** \brief Get FPSCR
bogdanm 74:a842253909c9 290
bogdanm 74:a842253909c9 291 This function returns the current value of the Floating Point Status/Control register.
bogdanm 74:a842253909c9 292
bogdanm 74:a842253909c9 293 \return Floating Point Status/Control register value
bogdanm 74:a842253909c9 294 */
bogdanm 74:a842253909c9 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 74:a842253909c9 296 {
bogdanm 74:a842253909c9 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 74:a842253909c9 298 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 74:a842253909c9 299 return(__regfpscr);
bogdanm 74:a842253909c9 300 #else
bogdanm 74:a842253909c9 301 return(0);
bogdanm 74:a842253909c9 302 #endif
bogdanm 74:a842253909c9 303 }
bogdanm 74:a842253909c9 304
bogdanm 74:a842253909c9 305
bogdanm 74:a842253909c9 306 /** \brief Set FPSCR
bogdanm 74:a842253909c9 307
bogdanm 74:a842253909c9 308 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 74:a842253909c9 309
bogdanm 74:a842253909c9 310 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 74:a842253909c9 311 */
bogdanm 74:a842253909c9 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 74:a842253909c9 313 {
bogdanm 74:a842253909c9 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 74:a842253909c9 315 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 74:a842253909c9 316 __regfpscr = (fpscr);
bogdanm 74:a842253909c9 317 #endif
bogdanm 74:a842253909c9 318 }
bogdanm 74:a842253909c9 319
Kojto 110:165afa46840b 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
bogdanm 74:a842253909c9 321
bogdanm 74:a842253909c9 322
bogdanm 74:a842253909c9 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 74:a842253909c9 324 /* GNU gcc specific functions */
bogdanm 74:a842253909c9 325
bogdanm 74:a842253909c9 326 /** \brief Enable IRQ Interrupts
bogdanm 74:a842253909c9 327
bogdanm 74:a842253909c9 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
bogdanm 74:a842253909c9 329 Can only be executed in Privileged modes.
bogdanm 74:a842253909c9 330 */
bogdanm 74:a842253909c9 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
bogdanm 74:a842253909c9 332 {
bogdanm 74:a842253909c9 333 __ASM volatile ("cpsie i" : : : "memory");
bogdanm 74:a842253909c9 334 }
bogdanm 74:a842253909c9 335
bogdanm 74:a842253909c9 336
bogdanm 74:a842253909c9 337 /** \brief Disable IRQ Interrupts
bogdanm 74:a842253909c9 338
bogdanm 74:a842253909c9 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
bogdanm 74:a842253909c9 340 Can only be executed in Privileged modes.
bogdanm 74:a842253909c9 341 */
bogdanm 74:a842253909c9 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
bogdanm 74:a842253909c9 343 {
bogdanm 74:a842253909c9 344 __ASM volatile ("cpsid i" : : : "memory");
bogdanm 74:a842253909c9 345 }
bogdanm 74:a842253909c9 346
bogdanm 74:a842253909c9 347
bogdanm 74:a842253909c9 348 /** \brief Get Control Register
bogdanm 74:a842253909c9 349
bogdanm 74:a842253909c9 350 This function returns the content of the Control Register.
bogdanm 74:a842253909c9 351
bogdanm 74:a842253909c9 352 \return Control Register value
bogdanm 74:a842253909c9 353 */
bogdanm 74:a842253909c9 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 74:a842253909c9 355 {
bogdanm 74:a842253909c9 356 uint32_t result;
bogdanm 74:a842253909c9 357
bogdanm 74:a842253909c9 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
bogdanm 74:a842253909c9 359 return(result);
bogdanm 74:a842253909c9 360 }
bogdanm 74:a842253909c9 361
bogdanm 74:a842253909c9 362
bogdanm 74:a842253909c9 363 /** \brief Set Control Register
bogdanm 74:a842253909c9 364
bogdanm 74:a842253909c9 365 This function writes the given value to the Control Register.
bogdanm 74:a842253909c9 366
bogdanm 74:a842253909c9 367 \param [in] control Control Register value to set
bogdanm 74:a842253909c9 368 */
bogdanm 74:a842253909c9 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 74:a842253909c9 370 {
bogdanm 74:a842253909c9 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
bogdanm 74:a842253909c9 372 }
bogdanm 74:a842253909c9 373
bogdanm 74:a842253909c9 374
bogdanm 74:a842253909c9 375 /** \brief Get IPSR Register
bogdanm 74:a842253909c9 376
bogdanm 74:a842253909c9 377 This function returns the content of the IPSR Register.
bogdanm 74:a842253909c9 378
bogdanm 74:a842253909c9 379 \return IPSR Register value
bogdanm 74:a842253909c9 380 */
bogdanm 74:a842253909c9 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 74:a842253909c9 382 {
bogdanm 74:a842253909c9 383 uint32_t result;
bogdanm 74:a842253909c9 384
bogdanm 74:a842253909c9 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
bogdanm 74:a842253909c9 386 return(result);
bogdanm 74:a842253909c9 387 }
bogdanm 74:a842253909c9 388
bogdanm 74:a842253909c9 389
bogdanm 74:a842253909c9 390 /** \brief Get APSR Register
bogdanm 74:a842253909c9 391
bogdanm 74:a842253909c9 392 This function returns the content of the APSR Register.
bogdanm 74:a842253909c9 393
bogdanm 74:a842253909c9 394 \return APSR Register value
bogdanm 74:a842253909c9 395 */
bogdanm 74:a842253909c9 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 74:a842253909c9 397 {
bogdanm 74:a842253909c9 398 uint32_t result;
bogdanm 74:a842253909c9 399
bogdanm 74:a842253909c9 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
bogdanm 74:a842253909c9 401 return(result);
bogdanm 74:a842253909c9 402 }
bogdanm 74:a842253909c9 403
bogdanm 74:a842253909c9 404
bogdanm 74:a842253909c9 405 /** \brief Get xPSR Register
bogdanm 74:a842253909c9 406
bogdanm 74:a842253909c9 407 This function returns the content of the xPSR Register.
bogdanm 74:a842253909c9 408
bogdanm 74:a842253909c9 409 \return xPSR Register value
bogdanm 74:a842253909c9 410 */
bogdanm 74:a842253909c9 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 74:a842253909c9 412 {
bogdanm 74:a842253909c9 413 uint32_t result;
bogdanm 74:a842253909c9 414
bogdanm 74:a842253909c9 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
bogdanm 74:a842253909c9 416 return(result);
bogdanm 74:a842253909c9 417 }
bogdanm 74:a842253909c9 418
bogdanm 74:a842253909c9 419
bogdanm 74:a842253909c9 420 /** \brief Get Process Stack Pointer
bogdanm 74:a842253909c9 421
bogdanm 74:a842253909c9 422 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 74:a842253909c9 423
bogdanm 74:a842253909c9 424 \return PSP Register value
bogdanm 74:a842253909c9 425 */
bogdanm 74:a842253909c9 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 74:a842253909c9 427 {
bogdanm 74:a842253909c9 428 register uint32_t result;
bogdanm 74:a842253909c9 429
bogdanm 74:a842253909c9 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
bogdanm 74:a842253909c9 431 return(result);
bogdanm 74:a842253909c9 432 }
bogdanm 74:a842253909c9 433
bogdanm 74:a842253909c9 434
bogdanm 74:a842253909c9 435 /** \brief Set Process Stack Pointer
bogdanm 74:a842253909c9 436
bogdanm 74:a842253909c9 437 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 74:a842253909c9 438
bogdanm 74:a842253909c9 439 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 74:a842253909c9 440 */
bogdanm 74:a842253909c9 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 74:a842253909c9 442 {
bogdanm 74:a842253909c9 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
bogdanm 74:a842253909c9 444 }
bogdanm 74:a842253909c9 445
bogdanm 74:a842253909c9 446
bogdanm 74:a842253909c9 447 /** \brief Get Main Stack Pointer
bogdanm 74:a842253909c9 448
bogdanm 74:a842253909c9 449 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 74:a842253909c9 450
bogdanm 74:a842253909c9 451 \return MSP Register value
bogdanm 74:a842253909c9 452 */
bogdanm 74:a842253909c9 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 74:a842253909c9 454 {
bogdanm 74:a842253909c9 455 register uint32_t result;
bogdanm 74:a842253909c9 456
bogdanm 74:a842253909c9 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
bogdanm 74:a842253909c9 458 return(result);
bogdanm 74:a842253909c9 459 }
bogdanm 74:a842253909c9 460
bogdanm 74:a842253909c9 461
bogdanm 74:a842253909c9 462 /** \brief Set Main Stack Pointer
bogdanm 74:a842253909c9 463
bogdanm 74:a842253909c9 464 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 74:a842253909c9 465
bogdanm 74:a842253909c9 466 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 74:a842253909c9 467 */
bogdanm 74:a842253909c9 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 74:a842253909c9 469 {
bogdanm 74:a842253909c9 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
bogdanm 74:a842253909c9 471 }
bogdanm 74:a842253909c9 472
bogdanm 74:a842253909c9 473
bogdanm 74:a842253909c9 474 /** \brief Get Priority Mask
bogdanm 74:a842253909c9 475
bogdanm 74:a842253909c9 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 74:a842253909c9 477
bogdanm 74:a842253909c9 478 \return Priority Mask value
bogdanm 74:a842253909c9 479 */
bogdanm 74:a842253909c9 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 74:a842253909c9 481 {
bogdanm 74:a842253909c9 482 uint32_t result;
bogdanm 74:a842253909c9 483
bogdanm 74:a842253909c9 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
bogdanm 74:a842253909c9 485 return(result);
bogdanm 74:a842253909c9 486 }
bogdanm 74:a842253909c9 487
bogdanm 74:a842253909c9 488
bogdanm 74:a842253909c9 489 /** \brief Set Priority Mask
bogdanm 74:a842253909c9 490
bogdanm 74:a842253909c9 491 This function assigns the given value to the Priority Mask Register.
bogdanm 74:a842253909c9 492
bogdanm 74:a842253909c9 493 \param [in] priMask Priority Mask
bogdanm 74:a842253909c9 494 */
bogdanm 74:a842253909c9 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 74:a842253909c9 496 {
bogdanm 74:a842253909c9 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
bogdanm 74:a842253909c9 498 }
bogdanm 74:a842253909c9 499
bogdanm 74:a842253909c9 500
bogdanm 74:a842253909c9 501 #if (__CORTEX_M >= 0x03)
bogdanm 74:a842253909c9 502
bogdanm 74:a842253909c9 503 /** \brief Enable FIQ
bogdanm 74:a842253909c9 504
bogdanm 74:a842253909c9 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 74:a842253909c9 506 Can only be executed in Privileged modes.
bogdanm 74:a842253909c9 507 */
bogdanm 74:a842253909c9 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
bogdanm 74:a842253909c9 509 {
bogdanm 74:a842253909c9 510 __ASM volatile ("cpsie f" : : : "memory");
bogdanm 74:a842253909c9 511 }
bogdanm 74:a842253909c9 512
bogdanm 74:a842253909c9 513
bogdanm 74:a842253909c9 514 /** \brief Disable FIQ
bogdanm 74:a842253909c9 515
bogdanm 74:a842253909c9 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 74:a842253909c9 517 Can only be executed in Privileged modes.
bogdanm 74:a842253909c9 518 */
bogdanm 74:a842253909c9 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
bogdanm 74:a842253909c9 520 {
bogdanm 74:a842253909c9 521 __ASM volatile ("cpsid f" : : : "memory");
bogdanm 74:a842253909c9 522 }
bogdanm 74:a842253909c9 523
bogdanm 74:a842253909c9 524
bogdanm 74:a842253909c9 525 /** \brief Get Base Priority
bogdanm 74:a842253909c9 526
bogdanm 74:a842253909c9 527 This function returns the current value of the Base Priority register.
bogdanm 74:a842253909c9 528
bogdanm 74:a842253909c9 529 \return Base Priority register value
bogdanm 74:a842253909c9 530 */
bogdanm 74:a842253909c9 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 74:a842253909c9 532 {
bogdanm 74:a842253909c9 533 uint32_t result;
bogdanm 74:a842253909c9 534
Kojto 110:165afa46840b 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
bogdanm 74:a842253909c9 536 return(result);
bogdanm 74:a842253909c9 537 }
bogdanm 74:a842253909c9 538
bogdanm 74:a842253909c9 539
bogdanm 74:a842253909c9 540 /** \brief Set Base Priority
bogdanm 74:a842253909c9 541
bogdanm 74:a842253909c9 542 This function assigns the given value to the Base Priority register.
bogdanm 74:a842253909c9 543
bogdanm 74:a842253909c9 544 \param [in] basePri Base Priority value to set
bogdanm 74:a842253909c9 545 */
bogdanm 74:a842253909c9 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
bogdanm 74:a842253909c9 547 {
bogdanm 74:a842253909c9 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
bogdanm 74:a842253909c9 549 }
bogdanm 74:a842253909c9 550
bogdanm 74:a842253909c9 551
Kojto 110:165afa46840b 552 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 553
Kojto 110:165afa46840b 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 555 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 556
Kojto 110:165afa46840b 557 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 558 */
Kojto 110:165afa46840b 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Kojto 110:165afa46840b 560 {
Kojto 110:165afa46840b 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Kojto 110:165afa46840b 562 }
Kojto 110:165afa46840b 563
Kojto 110:165afa46840b 564
bogdanm 74:a842253909c9 565 /** \brief Get Fault Mask
bogdanm 74:a842253909c9 566
bogdanm 74:a842253909c9 567 This function returns the current value of the Fault Mask register.
bogdanm 74:a842253909c9 568
bogdanm 74:a842253909c9 569 \return Fault Mask register value
bogdanm 74:a842253909c9 570 */
bogdanm 74:a842253909c9 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 74:a842253909c9 572 {
bogdanm 74:a842253909c9 573 uint32_t result;
bogdanm 74:a842253909c9 574
bogdanm 74:a842253909c9 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
bogdanm 74:a842253909c9 576 return(result);
bogdanm 74:a842253909c9 577 }
bogdanm 74:a842253909c9 578
bogdanm 74:a842253909c9 579
bogdanm 74:a842253909c9 580 /** \brief Set Fault Mask
bogdanm 74:a842253909c9 581
bogdanm 74:a842253909c9 582 This function assigns the given value to the Fault Mask register.
bogdanm 74:a842253909c9 583
bogdanm 74:a842253909c9 584 \param [in] faultMask Fault Mask value to set
bogdanm 74:a842253909c9 585 */
bogdanm 74:a842253909c9 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 74:a842253909c9 587 {
bogdanm 74:a842253909c9 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
bogdanm 74:a842253909c9 589 }
bogdanm 74:a842253909c9 590
bogdanm 74:a842253909c9 591 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 74:a842253909c9 592
bogdanm 74:a842253909c9 593
Kojto 110:165afa46840b 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 74:a842253909c9 595
bogdanm 74:a842253909c9 596 /** \brief Get FPSCR
bogdanm 74:a842253909c9 597
bogdanm 74:a842253909c9 598 This function returns the current value of the Floating Point Status/Control register.
bogdanm 74:a842253909c9 599
bogdanm 74:a842253909c9 600 \return Floating Point Status/Control register value
bogdanm 74:a842253909c9 601 */
bogdanm 74:a842253909c9 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 74:a842253909c9 603 {
bogdanm 74:a842253909c9 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 74:a842253909c9 605 uint32_t result;
bogdanm 74:a842253909c9 606
bogdanm 74:a842253909c9 607 /* Empty asm statement works as a scheduling barrier */
bogdanm 74:a842253909c9 608 __ASM volatile ("");
bogdanm 74:a842253909c9 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
bogdanm 74:a842253909c9 610 __ASM volatile ("");
bogdanm 74:a842253909c9 611 return(result);
bogdanm 74:a842253909c9 612 #else
bogdanm 74:a842253909c9 613 return(0);
bogdanm 74:a842253909c9 614 #endif
bogdanm 74:a842253909c9 615 }
bogdanm 74:a842253909c9 616
bogdanm 74:a842253909c9 617
bogdanm 74:a842253909c9 618 /** \brief Set FPSCR
bogdanm 74:a842253909c9 619
bogdanm 74:a842253909c9 620 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 74:a842253909c9 621
bogdanm 74:a842253909c9 622 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 74:a842253909c9 623 */
bogdanm 74:a842253909c9 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 74:a842253909c9 625 {
bogdanm 74:a842253909c9 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 74:a842253909c9 627 /* Empty asm statement works as a scheduling barrier */
bogdanm 74:a842253909c9 628 __ASM volatile ("");
bogdanm 74:a842253909c9 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
bogdanm 74:a842253909c9 630 __ASM volatile ("");
bogdanm 74:a842253909c9 631 #endif
bogdanm 74:a842253909c9 632 }
bogdanm 74:a842253909c9 633
Kojto 110:165afa46840b 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 110:165afa46840b 635
Kojto 110:165afa46840b 636
Kojto 110:165afa46840b 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 110:165afa46840b 638 /* IAR iccarm specific functions */
Kojto 110:165afa46840b 639 #include <cmsis_iar.h>
Kojto 110:165afa46840b 640
Kojto 110:165afa46840b 641
Kojto 110:165afa46840b 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 110:165afa46840b 643 /* TI CCS specific functions */
Kojto 110:165afa46840b 644 #include <cmsis_ccs.h>
bogdanm 74:a842253909c9 645
bogdanm 74:a842253909c9 646
bogdanm 74:a842253909c9 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 74:a842253909c9 648 /* TASKING carm specific functions */
bogdanm 74:a842253909c9 649 /*
bogdanm 74:a842253909c9 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 110:165afa46840b 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 74:a842253909c9 652 * Including the CMSIS ones.
bogdanm 74:a842253909c9 653 */
bogdanm 74:a842253909c9 654
Kojto 110:165afa46840b 655
Kojto 110:165afa46840b 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 110:165afa46840b 657 /* Cosmic specific functions */
Kojto 110:165afa46840b 658 #include <cmsis_csm.h>
Kojto 110:165afa46840b 659
bogdanm 74:a842253909c9 660 #endif
bogdanm 74:a842253909c9 661
bogdanm 74:a842253909c9 662 /*@} end of CMSIS_Core_RegAccFunctions */
bogdanm 74:a842253909c9 663
bogdanm 74:a842253909c9 664 #endif /* __CORE_CMFUNC_H */