The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
110:165afa46840b
Release 134 of the mbed library

Ports for Upcoming Targets


Fixes and Changes

3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488
3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492
3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503
3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504
3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539
3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540
3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438
3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519
3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544
3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546
3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551
3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558
3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563
3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567
3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 66:9c8f0e3462fb 1 /**************************************************************************//**
bogdanm 66:9c8f0e3462fb 2 * @file core_cmFunc.h
bogdanm 66:9c8f0e3462fb 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 110:165afa46840b 4 * @version V4.10
Kojto 110:165afa46840b 5 * @date 18. March 2015
bogdanm 66:9c8f0e3462fb 6 *
bogdanm 66:9c8f0e3462fb 7 * @note
bogdanm 66:9c8f0e3462fb 8 *
bogdanm 66:9c8f0e3462fb 9 ******************************************************************************/
Kojto 110:165afa46840b 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
bogdanm 66:9c8f0e3462fb 11
bogdanm 66:9c8f0e3462fb 12 All rights reserved.
bogdanm 66:9c8f0e3462fb 13 Redistribution and use in source and binary forms, with or without
bogdanm 66:9c8f0e3462fb 14 modification, are permitted provided that the following conditions are met:
bogdanm 66:9c8f0e3462fb 15 - Redistributions of source code must retain the above copyright
bogdanm 66:9c8f0e3462fb 16 notice, this list of conditions and the following disclaimer.
bogdanm 66:9c8f0e3462fb 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 66:9c8f0e3462fb 18 notice, this list of conditions and the following disclaimer in the
bogdanm 66:9c8f0e3462fb 19 documentation and/or other materials provided with the distribution.
bogdanm 66:9c8f0e3462fb 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 66:9c8f0e3462fb 21 to endorse or promote products derived from this software without
bogdanm 66:9c8f0e3462fb 22 specific prior written permission.
bogdanm 66:9c8f0e3462fb 23 *
bogdanm 66:9c8f0e3462fb 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 66:9c8f0e3462fb 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 66:9c8f0e3462fb 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 66:9c8f0e3462fb 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 66:9c8f0e3462fb 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 66:9c8f0e3462fb 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 66:9c8f0e3462fb 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 66:9c8f0e3462fb 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 66:9c8f0e3462fb 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 66:9c8f0e3462fb 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 66:9c8f0e3462fb 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 66:9c8f0e3462fb 35 ---------------------------------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 36
bogdanm 66:9c8f0e3462fb 37
bogdanm 66:9c8f0e3462fb 38 #ifndef __CORE_CMFUNC_H
bogdanm 66:9c8f0e3462fb 39 #define __CORE_CMFUNC_H
bogdanm 66:9c8f0e3462fb 40
bogdanm 66:9c8f0e3462fb 41
bogdanm 66:9c8f0e3462fb 42 /* ########################### Core Function Access ########################### */
bogdanm 66:9c8f0e3462fb 43 /** \ingroup CMSIS_Core_FunctionInterface
bogdanm 66:9c8f0e3462fb 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
bogdanm 66:9c8f0e3462fb 45 @{
bogdanm 66:9c8f0e3462fb 46 */
bogdanm 66:9c8f0e3462fb 47
bogdanm 66:9c8f0e3462fb 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 66:9c8f0e3462fb 49 /* ARM armcc specific functions */
bogdanm 66:9c8f0e3462fb 50
bogdanm 66:9c8f0e3462fb 51 #if (__ARMCC_VERSION < 400677)
bogdanm 66:9c8f0e3462fb 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 66:9c8f0e3462fb 53 #endif
bogdanm 66:9c8f0e3462fb 54
bogdanm 66:9c8f0e3462fb 55 /* intrinsic void __enable_irq(); */
bogdanm 66:9c8f0e3462fb 56 /* intrinsic void __disable_irq(); */
bogdanm 66:9c8f0e3462fb 57
bogdanm 66:9c8f0e3462fb 58 /** \brief Get Control Register
bogdanm 66:9c8f0e3462fb 59
bogdanm 66:9c8f0e3462fb 60 This function returns the content of the Control Register.
bogdanm 66:9c8f0e3462fb 61
bogdanm 66:9c8f0e3462fb 62 \return Control Register value
bogdanm 66:9c8f0e3462fb 63 */
bogdanm 66:9c8f0e3462fb 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 66:9c8f0e3462fb 65 {
bogdanm 66:9c8f0e3462fb 66 register uint32_t __regControl __ASM("control");
bogdanm 66:9c8f0e3462fb 67 return(__regControl);
bogdanm 66:9c8f0e3462fb 68 }
bogdanm 66:9c8f0e3462fb 69
bogdanm 66:9c8f0e3462fb 70
bogdanm 66:9c8f0e3462fb 71 /** \brief Set Control Register
bogdanm 66:9c8f0e3462fb 72
bogdanm 66:9c8f0e3462fb 73 This function writes the given value to the Control Register.
bogdanm 66:9c8f0e3462fb 74
bogdanm 66:9c8f0e3462fb 75 \param [in] control Control Register value to set
bogdanm 66:9c8f0e3462fb 76 */
bogdanm 66:9c8f0e3462fb 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 66:9c8f0e3462fb 78 {
bogdanm 66:9c8f0e3462fb 79 register uint32_t __regControl __ASM("control");
bogdanm 66:9c8f0e3462fb 80 __regControl = control;
bogdanm 66:9c8f0e3462fb 81 }
bogdanm 66:9c8f0e3462fb 82
bogdanm 66:9c8f0e3462fb 83
bogdanm 66:9c8f0e3462fb 84 /** \brief Get IPSR Register
bogdanm 66:9c8f0e3462fb 85
bogdanm 66:9c8f0e3462fb 86 This function returns the content of the IPSR Register.
bogdanm 66:9c8f0e3462fb 87
bogdanm 66:9c8f0e3462fb 88 \return IPSR Register value
bogdanm 66:9c8f0e3462fb 89 */
bogdanm 66:9c8f0e3462fb 90 __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 66:9c8f0e3462fb 91 {
bogdanm 66:9c8f0e3462fb 92 register uint32_t __regIPSR __ASM("ipsr");
bogdanm 66:9c8f0e3462fb 93 return(__regIPSR);
bogdanm 66:9c8f0e3462fb 94 }
bogdanm 66:9c8f0e3462fb 95
bogdanm 66:9c8f0e3462fb 96
bogdanm 66:9c8f0e3462fb 97 /** \brief Get APSR Register
bogdanm 66:9c8f0e3462fb 98
bogdanm 66:9c8f0e3462fb 99 This function returns the content of the APSR Register.
bogdanm 66:9c8f0e3462fb 100
bogdanm 66:9c8f0e3462fb 101 \return APSR Register value
bogdanm 66:9c8f0e3462fb 102 */
bogdanm 66:9c8f0e3462fb 103 __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 66:9c8f0e3462fb 104 {
bogdanm 66:9c8f0e3462fb 105 register uint32_t __regAPSR __ASM("apsr");
bogdanm 66:9c8f0e3462fb 106 return(__regAPSR);
bogdanm 66:9c8f0e3462fb 107 }
bogdanm 66:9c8f0e3462fb 108
bogdanm 66:9c8f0e3462fb 109
bogdanm 66:9c8f0e3462fb 110 /** \brief Get xPSR Register
bogdanm 66:9c8f0e3462fb 111
bogdanm 66:9c8f0e3462fb 112 This function returns the content of the xPSR Register.
bogdanm 66:9c8f0e3462fb 113
bogdanm 66:9c8f0e3462fb 114 \return xPSR Register value
bogdanm 66:9c8f0e3462fb 115 */
bogdanm 66:9c8f0e3462fb 116 __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 66:9c8f0e3462fb 117 {
bogdanm 66:9c8f0e3462fb 118 register uint32_t __regXPSR __ASM("xpsr");
bogdanm 66:9c8f0e3462fb 119 return(__regXPSR);
bogdanm 66:9c8f0e3462fb 120 }
bogdanm 66:9c8f0e3462fb 121
bogdanm 66:9c8f0e3462fb 122
bogdanm 66:9c8f0e3462fb 123 /** \brief Get Process Stack Pointer
bogdanm 66:9c8f0e3462fb 124
bogdanm 66:9c8f0e3462fb 125 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 66:9c8f0e3462fb 126
bogdanm 66:9c8f0e3462fb 127 \return PSP Register value
bogdanm 66:9c8f0e3462fb 128 */
bogdanm 66:9c8f0e3462fb 129 __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 66:9c8f0e3462fb 130 {
bogdanm 66:9c8f0e3462fb 131 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 66:9c8f0e3462fb 132 return(__regProcessStackPointer);
bogdanm 66:9c8f0e3462fb 133 }
bogdanm 66:9c8f0e3462fb 134
bogdanm 66:9c8f0e3462fb 135
bogdanm 66:9c8f0e3462fb 136 /** \brief Set Process Stack Pointer
bogdanm 66:9c8f0e3462fb 137
bogdanm 66:9c8f0e3462fb 138 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 66:9c8f0e3462fb 139
bogdanm 66:9c8f0e3462fb 140 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 66:9c8f0e3462fb 141 */
bogdanm 66:9c8f0e3462fb 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 66:9c8f0e3462fb 143 {
bogdanm 66:9c8f0e3462fb 144 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 66:9c8f0e3462fb 145 __regProcessStackPointer = topOfProcStack;
bogdanm 66:9c8f0e3462fb 146 }
bogdanm 66:9c8f0e3462fb 147
bogdanm 66:9c8f0e3462fb 148
bogdanm 66:9c8f0e3462fb 149 /** \brief Get Main Stack Pointer
bogdanm 66:9c8f0e3462fb 150
bogdanm 66:9c8f0e3462fb 151 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 66:9c8f0e3462fb 152
bogdanm 66:9c8f0e3462fb 153 \return MSP Register value
bogdanm 66:9c8f0e3462fb 154 */
bogdanm 66:9c8f0e3462fb 155 __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 66:9c8f0e3462fb 156 {
bogdanm 66:9c8f0e3462fb 157 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 66:9c8f0e3462fb 158 return(__regMainStackPointer);
bogdanm 66:9c8f0e3462fb 159 }
bogdanm 66:9c8f0e3462fb 160
bogdanm 66:9c8f0e3462fb 161
bogdanm 66:9c8f0e3462fb 162 /** \brief Set Main Stack Pointer
bogdanm 66:9c8f0e3462fb 163
bogdanm 66:9c8f0e3462fb 164 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 66:9c8f0e3462fb 165
bogdanm 66:9c8f0e3462fb 166 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 66:9c8f0e3462fb 167 */
bogdanm 66:9c8f0e3462fb 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 66:9c8f0e3462fb 169 {
bogdanm 66:9c8f0e3462fb 170 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 66:9c8f0e3462fb 171 __regMainStackPointer = topOfMainStack;
bogdanm 66:9c8f0e3462fb 172 }
bogdanm 66:9c8f0e3462fb 173
bogdanm 66:9c8f0e3462fb 174
bogdanm 66:9c8f0e3462fb 175 /** \brief Get Priority Mask
bogdanm 66:9c8f0e3462fb 176
bogdanm 66:9c8f0e3462fb 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 66:9c8f0e3462fb 178
bogdanm 66:9c8f0e3462fb 179 \return Priority Mask value
bogdanm 66:9c8f0e3462fb 180 */
bogdanm 66:9c8f0e3462fb 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 66:9c8f0e3462fb 182 {
bogdanm 66:9c8f0e3462fb 183 register uint32_t __regPriMask __ASM("primask");
bogdanm 66:9c8f0e3462fb 184 return(__regPriMask);
bogdanm 66:9c8f0e3462fb 185 }
bogdanm 66:9c8f0e3462fb 186
bogdanm 66:9c8f0e3462fb 187
bogdanm 66:9c8f0e3462fb 188 /** \brief Set Priority Mask
bogdanm 66:9c8f0e3462fb 189
bogdanm 66:9c8f0e3462fb 190 This function assigns the given value to the Priority Mask Register.
bogdanm 66:9c8f0e3462fb 191
bogdanm 66:9c8f0e3462fb 192 \param [in] priMask Priority Mask
bogdanm 66:9c8f0e3462fb 193 */
bogdanm 66:9c8f0e3462fb 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 66:9c8f0e3462fb 195 {
bogdanm 66:9c8f0e3462fb 196 register uint32_t __regPriMask __ASM("primask");
bogdanm 66:9c8f0e3462fb 197 __regPriMask = (priMask);
bogdanm 66:9c8f0e3462fb 198 }
bogdanm 66:9c8f0e3462fb 199
bogdanm 66:9c8f0e3462fb 200
Kojto 110:165afa46840b 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
bogdanm 66:9c8f0e3462fb 202
bogdanm 66:9c8f0e3462fb 203 /** \brief Enable FIQ
bogdanm 66:9c8f0e3462fb 204
bogdanm 66:9c8f0e3462fb 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 66:9c8f0e3462fb 206 Can only be executed in Privileged modes.
bogdanm 66:9c8f0e3462fb 207 */
bogdanm 66:9c8f0e3462fb 208 #define __enable_fault_irq __enable_fiq
bogdanm 66:9c8f0e3462fb 209
bogdanm 66:9c8f0e3462fb 210
bogdanm 66:9c8f0e3462fb 211 /** \brief Disable FIQ
bogdanm 66:9c8f0e3462fb 212
bogdanm 66:9c8f0e3462fb 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 66:9c8f0e3462fb 214 Can only be executed in Privileged modes.
bogdanm 66:9c8f0e3462fb 215 */
bogdanm 66:9c8f0e3462fb 216 #define __disable_fault_irq __disable_fiq
bogdanm 66:9c8f0e3462fb 217
bogdanm 66:9c8f0e3462fb 218
bogdanm 66:9c8f0e3462fb 219 /** \brief Get Base Priority
bogdanm 66:9c8f0e3462fb 220
bogdanm 66:9c8f0e3462fb 221 This function returns the current value of the Base Priority register.
bogdanm 66:9c8f0e3462fb 222
bogdanm 66:9c8f0e3462fb 223 \return Base Priority register value
bogdanm 66:9c8f0e3462fb 224 */
bogdanm 66:9c8f0e3462fb 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 66:9c8f0e3462fb 226 {
bogdanm 66:9c8f0e3462fb 227 register uint32_t __regBasePri __ASM("basepri");
bogdanm 66:9c8f0e3462fb 228 return(__regBasePri);
bogdanm 66:9c8f0e3462fb 229 }
bogdanm 66:9c8f0e3462fb 230
bogdanm 66:9c8f0e3462fb 231
bogdanm 66:9c8f0e3462fb 232 /** \brief Set Base Priority
bogdanm 66:9c8f0e3462fb 233
bogdanm 66:9c8f0e3462fb 234 This function assigns the given value to the Base Priority register.
bogdanm 66:9c8f0e3462fb 235
bogdanm 66:9c8f0e3462fb 236 \param [in] basePri Base Priority value to set
bogdanm 66:9c8f0e3462fb 237 */
bogdanm 66:9c8f0e3462fb 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
bogdanm 66:9c8f0e3462fb 239 {
bogdanm 66:9c8f0e3462fb 240 register uint32_t __regBasePri __ASM("basepri");
bogdanm 66:9c8f0e3462fb 241 __regBasePri = (basePri & 0xff);
bogdanm 66:9c8f0e3462fb 242 }
bogdanm 66:9c8f0e3462fb 243
bogdanm 66:9c8f0e3462fb 244
Kojto 110:165afa46840b 245 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 246
Kojto 110:165afa46840b 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 248 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 249
Kojto 110:165afa46840b 250 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 251 */
Kojto 110:165afa46840b 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 110:165afa46840b 253 {
Kojto 110:165afa46840b 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Kojto 110:165afa46840b 255 __regBasePriMax = (basePri & 0xff);
Kojto 110:165afa46840b 256 }
Kojto 110:165afa46840b 257
Kojto 110:165afa46840b 258
bogdanm 66:9c8f0e3462fb 259 /** \brief Get Fault Mask
bogdanm 66:9c8f0e3462fb 260
bogdanm 66:9c8f0e3462fb 261 This function returns the current value of the Fault Mask register.
bogdanm 66:9c8f0e3462fb 262
bogdanm 66:9c8f0e3462fb 263 \return Fault Mask register value
bogdanm 66:9c8f0e3462fb 264 */
bogdanm 66:9c8f0e3462fb 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 66:9c8f0e3462fb 266 {
bogdanm 66:9c8f0e3462fb 267 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 66:9c8f0e3462fb 268 return(__regFaultMask);
bogdanm 66:9c8f0e3462fb 269 }
bogdanm 66:9c8f0e3462fb 270
bogdanm 66:9c8f0e3462fb 271
bogdanm 66:9c8f0e3462fb 272 /** \brief Set Fault Mask
bogdanm 66:9c8f0e3462fb 273
bogdanm 66:9c8f0e3462fb 274 This function assigns the given value to the Fault Mask register.
bogdanm 66:9c8f0e3462fb 275
bogdanm 66:9c8f0e3462fb 276 \param [in] faultMask Fault Mask value to set
bogdanm 66:9c8f0e3462fb 277 */
bogdanm 66:9c8f0e3462fb 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 66:9c8f0e3462fb 279 {
bogdanm 66:9c8f0e3462fb 280 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 66:9c8f0e3462fb 281 __regFaultMask = (faultMask & (uint32_t)1);
bogdanm 66:9c8f0e3462fb 282 }
bogdanm 66:9c8f0e3462fb 283
Kojto 110:165afa46840b 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
bogdanm 66:9c8f0e3462fb 285
bogdanm 66:9c8f0e3462fb 286
Kojto 110:165afa46840b 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 66:9c8f0e3462fb 288
bogdanm 66:9c8f0e3462fb 289 /** \brief Get FPSCR
bogdanm 66:9c8f0e3462fb 290
bogdanm 66:9c8f0e3462fb 291 This function returns the current value of the Floating Point Status/Control register.
bogdanm 66:9c8f0e3462fb 292
bogdanm 66:9c8f0e3462fb 293 \return Floating Point Status/Control register value
bogdanm 66:9c8f0e3462fb 294 */
bogdanm 66:9c8f0e3462fb 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 66:9c8f0e3462fb 296 {
bogdanm 66:9c8f0e3462fb 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 66:9c8f0e3462fb 298 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 66:9c8f0e3462fb 299 return(__regfpscr);
bogdanm 66:9c8f0e3462fb 300 #else
bogdanm 66:9c8f0e3462fb 301 return(0);
bogdanm 66:9c8f0e3462fb 302 #endif
bogdanm 66:9c8f0e3462fb 303 }
bogdanm 66:9c8f0e3462fb 304
bogdanm 66:9c8f0e3462fb 305
bogdanm 66:9c8f0e3462fb 306 /** \brief Set FPSCR
bogdanm 66:9c8f0e3462fb 307
bogdanm 66:9c8f0e3462fb 308 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 66:9c8f0e3462fb 309
bogdanm 66:9c8f0e3462fb 310 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 66:9c8f0e3462fb 311 */
bogdanm 66:9c8f0e3462fb 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 66:9c8f0e3462fb 313 {
bogdanm 66:9c8f0e3462fb 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 66:9c8f0e3462fb 315 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 66:9c8f0e3462fb 316 __regfpscr = (fpscr);
bogdanm 66:9c8f0e3462fb 317 #endif
bogdanm 66:9c8f0e3462fb 318 }
bogdanm 66:9c8f0e3462fb 319
Kojto 110:165afa46840b 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
bogdanm 66:9c8f0e3462fb 321
bogdanm 66:9c8f0e3462fb 322
bogdanm 66:9c8f0e3462fb 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 66:9c8f0e3462fb 324 /* GNU gcc specific functions */
bogdanm 66:9c8f0e3462fb 325
bogdanm 66:9c8f0e3462fb 326 /** \brief Enable IRQ Interrupts
bogdanm 66:9c8f0e3462fb 327
bogdanm 66:9c8f0e3462fb 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
bogdanm 66:9c8f0e3462fb 329 Can only be executed in Privileged modes.
bogdanm 66:9c8f0e3462fb 330 */
bogdanm 66:9c8f0e3462fb 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
bogdanm 66:9c8f0e3462fb 332 {
bogdanm 66:9c8f0e3462fb 333 __ASM volatile ("cpsie i" : : : "memory");
bogdanm 66:9c8f0e3462fb 334 }
bogdanm 66:9c8f0e3462fb 335
bogdanm 66:9c8f0e3462fb 336
bogdanm 66:9c8f0e3462fb 337 /** \brief Disable IRQ Interrupts
bogdanm 66:9c8f0e3462fb 338
bogdanm 66:9c8f0e3462fb 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
bogdanm 66:9c8f0e3462fb 340 Can only be executed in Privileged modes.
bogdanm 66:9c8f0e3462fb 341 */
bogdanm 66:9c8f0e3462fb 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
bogdanm 66:9c8f0e3462fb 343 {
bogdanm 66:9c8f0e3462fb 344 __ASM volatile ("cpsid i" : : : "memory");
bogdanm 66:9c8f0e3462fb 345 }
bogdanm 66:9c8f0e3462fb 346
bogdanm 66:9c8f0e3462fb 347
bogdanm 66:9c8f0e3462fb 348 /** \brief Get Control Register
bogdanm 66:9c8f0e3462fb 349
bogdanm 66:9c8f0e3462fb 350 This function returns the content of the Control Register.
bogdanm 66:9c8f0e3462fb 351
bogdanm 66:9c8f0e3462fb 352 \return Control Register value
bogdanm 66:9c8f0e3462fb 353 */
bogdanm 66:9c8f0e3462fb 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 66:9c8f0e3462fb 355 {
bogdanm 66:9c8f0e3462fb 356 uint32_t result;
bogdanm 66:9c8f0e3462fb 357
bogdanm 66:9c8f0e3462fb 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
bogdanm 66:9c8f0e3462fb 359 return(result);
bogdanm 66:9c8f0e3462fb 360 }
bogdanm 66:9c8f0e3462fb 361
bogdanm 66:9c8f0e3462fb 362
bogdanm 66:9c8f0e3462fb 363 /** \brief Set Control Register
bogdanm 66:9c8f0e3462fb 364
bogdanm 66:9c8f0e3462fb 365 This function writes the given value to the Control Register.
bogdanm 66:9c8f0e3462fb 366
bogdanm 66:9c8f0e3462fb 367 \param [in] control Control Register value to set
bogdanm 66:9c8f0e3462fb 368 */
bogdanm 66:9c8f0e3462fb 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 66:9c8f0e3462fb 370 {
bogdanm 66:9c8f0e3462fb 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
bogdanm 66:9c8f0e3462fb 372 }
bogdanm 66:9c8f0e3462fb 373
bogdanm 66:9c8f0e3462fb 374
bogdanm 66:9c8f0e3462fb 375 /** \brief Get IPSR Register
bogdanm 66:9c8f0e3462fb 376
bogdanm 66:9c8f0e3462fb 377 This function returns the content of the IPSR Register.
bogdanm 66:9c8f0e3462fb 378
bogdanm 66:9c8f0e3462fb 379 \return IPSR Register value
bogdanm 66:9c8f0e3462fb 380 */
bogdanm 66:9c8f0e3462fb 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 66:9c8f0e3462fb 382 {
bogdanm 66:9c8f0e3462fb 383 uint32_t result;
bogdanm 66:9c8f0e3462fb 384
bogdanm 66:9c8f0e3462fb 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
bogdanm 66:9c8f0e3462fb 386 return(result);
bogdanm 66:9c8f0e3462fb 387 }
bogdanm 66:9c8f0e3462fb 388
bogdanm 66:9c8f0e3462fb 389
bogdanm 66:9c8f0e3462fb 390 /** \brief Get APSR Register
bogdanm 66:9c8f0e3462fb 391
bogdanm 66:9c8f0e3462fb 392 This function returns the content of the APSR Register.
bogdanm 66:9c8f0e3462fb 393
bogdanm 66:9c8f0e3462fb 394 \return APSR Register value
bogdanm 66:9c8f0e3462fb 395 */
bogdanm 66:9c8f0e3462fb 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 66:9c8f0e3462fb 397 {
bogdanm 66:9c8f0e3462fb 398 uint32_t result;
bogdanm 66:9c8f0e3462fb 399
bogdanm 66:9c8f0e3462fb 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
bogdanm 66:9c8f0e3462fb 401 return(result);
bogdanm 66:9c8f0e3462fb 402 }
bogdanm 66:9c8f0e3462fb 403
bogdanm 66:9c8f0e3462fb 404
bogdanm 66:9c8f0e3462fb 405 /** \brief Get xPSR Register
bogdanm 66:9c8f0e3462fb 406
bogdanm 66:9c8f0e3462fb 407 This function returns the content of the xPSR Register.
bogdanm 66:9c8f0e3462fb 408
bogdanm 66:9c8f0e3462fb 409 \return xPSR Register value
bogdanm 66:9c8f0e3462fb 410 */
bogdanm 66:9c8f0e3462fb 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 66:9c8f0e3462fb 412 {
bogdanm 66:9c8f0e3462fb 413 uint32_t result;
bogdanm 66:9c8f0e3462fb 414
bogdanm 66:9c8f0e3462fb 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
bogdanm 66:9c8f0e3462fb 416 return(result);
bogdanm 66:9c8f0e3462fb 417 }
bogdanm 66:9c8f0e3462fb 418
bogdanm 66:9c8f0e3462fb 419
bogdanm 66:9c8f0e3462fb 420 /** \brief Get Process Stack Pointer
bogdanm 66:9c8f0e3462fb 421
bogdanm 66:9c8f0e3462fb 422 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 66:9c8f0e3462fb 423
bogdanm 66:9c8f0e3462fb 424 \return PSP Register value
bogdanm 66:9c8f0e3462fb 425 */
bogdanm 66:9c8f0e3462fb 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 66:9c8f0e3462fb 427 {
bogdanm 66:9c8f0e3462fb 428 register uint32_t result;
bogdanm 66:9c8f0e3462fb 429
bogdanm 66:9c8f0e3462fb 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
bogdanm 66:9c8f0e3462fb 431 return(result);
bogdanm 66:9c8f0e3462fb 432 }
bogdanm 66:9c8f0e3462fb 433
bogdanm 66:9c8f0e3462fb 434
bogdanm 66:9c8f0e3462fb 435 /** \brief Set Process Stack Pointer
bogdanm 66:9c8f0e3462fb 436
bogdanm 66:9c8f0e3462fb 437 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 66:9c8f0e3462fb 438
bogdanm 66:9c8f0e3462fb 439 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 66:9c8f0e3462fb 440 */
bogdanm 66:9c8f0e3462fb 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 66:9c8f0e3462fb 442 {
bogdanm 66:9c8f0e3462fb 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
bogdanm 66:9c8f0e3462fb 444 }
bogdanm 66:9c8f0e3462fb 445
bogdanm 66:9c8f0e3462fb 446
bogdanm 66:9c8f0e3462fb 447 /** \brief Get Main Stack Pointer
bogdanm 66:9c8f0e3462fb 448
bogdanm 66:9c8f0e3462fb 449 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 66:9c8f0e3462fb 450
bogdanm 66:9c8f0e3462fb 451 \return MSP Register value
bogdanm 66:9c8f0e3462fb 452 */
bogdanm 66:9c8f0e3462fb 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 66:9c8f0e3462fb 454 {
bogdanm 66:9c8f0e3462fb 455 register uint32_t result;
bogdanm 66:9c8f0e3462fb 456
bogdanm 66:9c8f0e3462fb 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
bogdanm 66:9c8f0e3462fb 458 return(result);
bogdanm 66:9c8f0e3462fb 459 }
bogdanm 66:9c8f0e3462fb 460
bogdanm 66:9c8f0e3462fb 461
bogdanm 66:9c8f0e3462fb 462 /** \brief Set Main Stack Pointer
bogdanm 66:9c8f0e3462fb 463
bogdanm 66:9c8f0e3462fb 464 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 66:9c8f0e3462fb 465
bogdanm 66:9c8f0e3462fb 466 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 66:9c8f0e3462fb 467 */
bogdanm 66:9c8f0e3462fb 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 66:9c8f0e3462fb 469 {
bogdanm 66:9c8f0e3462fb 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
bogdanm 66:9c8f0e3462fb 471 }
bogdanm 66:9c8f0e3462fb 472
bogdanm 66:9c8f0e3462fb 473
bogdanm 66:9c8f0e3462fb 474 /** \brief Get Priority Mask
bogdanm 66:9c8f0e3462fb 475
bogdanm 66:9c8f0e3462fb 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 66:9c8f0e3462fb 477
bogdanm 66:9c8f0e3462fb 478 \return Priority Mask value
bogdanm 66:9c8f0e3462fb 479 */
bogdanm 66:9c8f0e3462fb 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 66:9c8f0e3462fb 481 {
bogdanm 66:9c8f0e3462fb 482 uint32_t result;
bogdanm 66:9c8f0e3462fb 483
bogdanm 66:9c8f0e3462fb 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
bogdanm 66:9c8f0e3462fb 485 return(result);
bogdanm 66:9c8f0e3462fb 486 }
bogdanm 66:9c8f0e3462fb 487
bogdanm 66:9c8f0e3462fb 488
bogdanm 66:9c8f0e3462fb 489 /** \brief Set Priority Mask
bogdanm 66:9c8f0e3462fb 490
bogdanm 66:9c8f0e3462fb 491 This function assigns the given value to the Priority Mask Register.
bogdanm 66:9c8f0e3462fb 492
bogdanm 66:9c8f0e3462fb 493 \param [in] priMask Priority Mask
bogdanm 66:9c8f0e3462fb 494 */
bogdanm 66:9c8f0e3462fb 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 66:9c8f0e3462fb 496 {
bogdanm 66:9c8f0e3462fb 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
bogdanm 66:9c8f0e3462fb 498 }
bogdanm 66:9c8f0e3462fb 499
bogdanm 66:9c8f0e3462fb 500
bogdanm 66:9c8f0e3462fb 501 #if (__CORTEX_M >= 0x03)
bogdanm 66:9c8f0e3462fb 502
bogdanm 66:9c8f0e3462fb 503 /** \brief Enable FIQ
bogdanm 66:9c8f0e3462fb 504
bogdanm 66:9c8f0e3462fb 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 66:9c8f0e3462fb 506 Can only be executed in Privileged modes.
bogdanm 66:9c8f0e3462fb 507 */
bogdanm 66:9c8f0e3462fb 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
bogdanm 66:9c8f0e3462fb 509 {
bogdanm 66:9c8f0e3462fb 510 __ASM volatile ("cpsie f" : : : "memory");
bogdanm 66:9c8f0e3462fb 511 }
bogdanm 66:9c8f0e3462fb 512
bogdanm 66:9c8f0e3462fb 513
bogdanm 66:9c8f0e3462fb 514 /** \brief Disable FIQ
bogdanm 66:9c8f0e3462fb 515
bogdanm 66:9c8f0e3462fb 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 66:9c8f0e3462fb 517 Can only be executed in Privileged modes.
bogdanm 66:9c8f0e3462fb 518 */
bogdanm 66:9c8f0e3462fb 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
bogdanm 66:9c8f0e3462fb 520 {
bogdanm 66:9c8f0e3462fb 521 __ASM volatile ("cpsid f" : : : "memory");
bogdanm 66:9c8f0e3462fb 522 }
bogdanm 66:9c8f0e3462fb 523
bogdanm 66:9c8f0e3462fb 524
bogdanm 66:9c8f0e3462fb 525 /** \brief Get Base Priority
bogdanm 66:9c8f0e3462fb 526
bogdanm 66:9c8f0e3462fb 527 This function returns the current value of the Base Priority register.
bogdanm 66:9c8f0e3462fb 528
bogdanm 66:9c8f0e3462fb 529 \return Base Priority register value
bogdanm 66:9c8f0e3462fb 530 */
bogdanm 66:9c8f0e3462fb 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 66:9c8f0e3462fb 532 {
bogdanm 66:9c8f0e3462fb 533 uint32_t result;
bogdanm 66:9c8f0e3462fb 534
Kojto 110:165afa46840b 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
bogdanm 66:9c8f0e3462fb 536 return(result);
bogdanm 66:9c8f0e3462fb 537 }
bogdanm 66:9c8f0e3462fb 538
bogdanm 66:9c8f0e3462fb 539
bogdanm 66:9c8f0e3462fb 540 /** \brief Set Base Priority
bogdanm 66:9c8f0e3462fb 541
bogdanm 66:9c8f0e3462fb 542 This function assigns the given value to the Base Priority register.
bogdanm 66:9c8f0e3462fb 543
bogdanm 66:9c8f0e3462fb 544 \param [in] basePri Base Priority value to set
bogdanm 66:9c8f0e3462fb 545 */
bogdanm 66:9c8f0e3462fb 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
bogdanm 66:9c8f0e3462fb 547 {
bogdanm 66:9c8f0e3462fb 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
bogdanm 66:9c8f0e3462fb 549 }
bogdanm 66:9c8f0e3462fb 550
bogdanm 66:9c8f0e3462fb 551
Kojto 110:165afa46840b 552 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 553
Kojto 110:165afa46840b 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 555 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 556
Kojto 110:165afa46840b 557 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 558 */
Kojto 110:165afa46840b 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Kojto 110:165afa46840b 560 {
Kojto 110:165afa46840b 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Kojto 110:165afa46840b 562 }
Kojto 110:165afa46840b 563
Kojto 110:165afa46840b 564
bogdanm 66:9c8f0e3462fb 565 /** \brief Get Fault Mask
bogdanm 66:9c8f0e3462fb 566
bogdanm 66:9c8f0e3462fb 567 This function returns the current value of the Fault Mask register.
bogdanm 66:9c8f0e3462fb 568
bogdanm 66:9c8f0e3462fb 569 \return Fault Mask register value
bogdanm 66:9c8f0e3462fb 570 */
bogdanm 66:9c8f0e3462fb 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 66:9c8f0e3462fb 572 {
bogdanm 66:9c8f0e3462fb 573 uint32_t result;
bogdanm 66:9c8f0e3462fb 574
bogdanm 66:9c8f0e3462fb 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
bogdanm 66:9c8f0e3462fb 576 return(result);
bogdanm 66:9c8f0e3462fb 577 }
bogdanm 66:9c8f0e3462fb 578
bogdanm 66:9c8f0e3462fb 579
bogdanm 66:9c8f0e3462fb 580 /** \brief Set Fault Mask
bogdanm 66:9c8f0e3462fb 581
bogdanm 66:9c8f0e3462fb 582 This function assigns the given value to the Fault Mask register.
bogdanm 66:9c8f0e3462fb 583
bogdanm 66:9c8f0e3462fb 584 \param [in] faultMask Fault Mask value to set
bogdanm 66:9c8f0e3462fb 585 */
bogdanm 66:9c8f0e3462fb 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 66:9c8f0e3462fb 587 {
bogdanm 66:9c8f0e3462fb 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
bogdanm 66:9c8f0e3462fb 589 }
bogdanm 66:9c8f0e3462fb 590
bogdanm 66:9c8f0e3462fb 591 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 66:9c8f0e3462fb 592
bogdanm 66:9c8f0e3462fb 593
Kojto 110:165afa46840b 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 66:9c8f0e3462fb 595
bogdanm 66:9c8f0e3462fb 596 /** \brief Get FPSCR
bogdanm 66:9c8f0e3462fb 597
bogdanm 66:9c8f0e3462fb 598 This function returns the current value of the Floating Point Status/Control register.
bogdanm 66:9c8f0e3462fb 599
bogdanm 66:9c8f0e3462fb 600 \return Floating Point Status/Control register value
bogdanm 66:9c8f0e3462fb 601 */
bogdanm 66:9c8f0e3462fb 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 66:9c8f0e3462fb 603 {
bogdanm 66:9c8f0e3462fb 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 66:9c8f0e3462fb 605 uint32_t result;
bogdanm 66:9c8f0e3462fb 606
bogdanm 66:9c8f0e3462fb 607 /* Empty asm statement works as a scheduling barrier */
bogdanm 66:9c8f0e3462fb 608 __ASM volatile ("");
bogdanm 66:9c8f0e3462fb 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
bogdanm 66:9c8f0e3462fb 610 __ASM volatile ("");
bogdanm 66:9c8f0e3462fb 611 return(result);
bogdanm 66:9c8f0e3462fb 612 #else
bogdanm 66:9c8f0e3462fb 613 return(0);
bogdanm 66:9c8f0e3462fb 614 #endif
bogdanm 66:9c8f0e3462fb 615 }
bogdanm 66:9c8f0e3462fb 616
bogdanm 66:9c8f0e3462fb 617
bogdanm 66:9c8f0e3462fb 618 /** \brief Set FPSCR
bogdanm 66:9c8f0e3462fb 619
bogdanm 66:9c8f0e3462fb 620 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 66:9c8f0e3462fb 621
bogdanm 66:9c8f0e3462fb 622 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 66:9c8f0e3462fb 623 */
bogdanm 66:9c8f0e3462fb 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 66:9c8f0e3462fb 625 {
bogdanm 66:9c8f0e3462fb 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 66:9c8f0e3462fb 627 /* Empty asm statement works as a scheduling barrier */
bogdanm 66:9c8f0e3462fb 628 __ASM volatile ("");
bogdanm 66:9c8f0e3462fb 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
bogdanm 66:9c8f0e3462fb 630 __ASM volatile ("");
bogdanm 66:9c8f0e3462fb 631 #endif
bogdanm 66:9c8f0e3462fb 632 }
bogdanm 66:9c8f0e3462fb 633
Kojto 110:165afa46840b 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 110:165afa46840b 635
Kojto 110:165afa46840b 636
Kojto 110:165afa46840b 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 110:165afa46840b 638 /* IAR iccarm specific functions */
Kojto 110:165afa46840b 639 #include <cmsis_iar.h>
Kojto 110:165afa46840b 640
Kojto 110:165afa46840b 641
Kojto 110:165afa46840b 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 110:165afa46840b 643 /* TI CCS specific functions */
Kojto 110:165afa46840b 644 #include <cmsis_ccs.h>
bogdanm 66:9c8f0e3462fb 645
bogdanm 66:9c8f0e3462fb 646
bogdanm 66:9c8f0e3462fb 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 66:9c8f0e3462fb 648 /* TASKING carm specific functions */
bogdanm 66:9c8f0e3462fb 649 /*
bogdanm 66:9c8f0e3462fb 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 110:165afa46840b 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 66:9c8f0e3462fb 652 * Including the CMSIS ones.
bogdanm 66:9c8f0e3462fb 653 */
bogdanm 66:9c8f0e3462fb 654
Kojto 110:165afa46840b 655
Kojto 110:165afa46840b 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 110:165afa46840b 657 /* Cosmic specific functions */
Kojto 110:165afa46840b 658 #include <cmsis_csm.h>
Kojto 110:165afa46840b 659
bogdanm 66:9c8f0e3462fb 660 #endif
bogdanm 66:9c8f0e3462fb 661
bogdanm 66:9c8f0e3462fb 662 /*@} end of CMSIS_Core_RegAccFunctions */
bogdanm 66:9c8f0e3462fb 663
bogdanm 66:9c8f0e3462fb 664 #endif /* __CORE_CMFUNC_H */