The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
129:0ab6a29f35bf
Child:
136:ef9c61f8c49f
Release 134 of the mbed library

Ports for Upcoming Targets


Fixes and Changes

3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488
3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492
3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503
3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504
3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539
3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540
3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438
3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519
3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544
3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546
3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551
3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558
3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563
3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567
3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 129:0ab6a29f35bf 1 /**************************************************************************//**
<> 129:0ab6a29f35bf 2 * @file core_cmSecureAccess.h
<> 129:0ab6a29f35bf 3 * @brief CMSIS Cortex-M Core Secure Access Header File
<> 129:0ab6a29f35bf 4 * @version XXX
<> 129:0ab6a29f35bf 5 * @date 10. June 2016
<> 129:0ab6a29f35bf 6 *
<> 129:0ab6a29f35bf 7 * @note
<> 129:0ab6a29f35bf 8 *
<> 129:0ab6a29f35bf 9 ******************************************************************************/
<> 129:0ab6a29f35bf 10 /* Copyright (c) 2016 ARM LIMITED
<> 129:0ab6a29f35bf 11
<> 129:0ab6a29f35bf 12 All rights reserved.
<> 129:0ab6a29f35bf 13 Redistribution and use in source and binary forms, with or without
<> 129:0ab6a29f35bf 14 modification, are permitted provided that the following conditions are met:
<> 129:0ab6a29f35bf 15 - Redistributions of source code must retain the above copyright
<> 129:0ab6a29f35bf 16 notice, this list of conditions and the following disclaimer.
<> 129:0ab6a29f35bf 17 - Redistributions in binary form must reproduce the above copyright
<> 129:0ab6a29f35bf 18 notice, this list of conditions and the following disclaimer in the
<> 129:0ab6a29f35bf 19 documentation and/or other materials provided with the distribution.
<> 129:0ab6a29f35bf 20 - Neither the name of ARM nor the names of its contributors may be used
<> 129:0ab6a29f35bf 21 to endorse or promote products derived from this software without
<> 129:0ab6a29f35bf 22 specific prior written permission.
<> 129:0ab6a29f35bf 23 *
<> 129:0ab6a29f35bf 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 129:0ab6a29f35bf 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 129:0ab6a29f35bf 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
<> 129:0ab6a29f35bf 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
<> 129:0ab6a29f35bf 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
<> 129:0ab6a29f35bf 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
<> 129:0ab6a29f35bf 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
<> 129:0ab6a29f35bf 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
<> 129:0ab6a29f35bf 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
<> 129:0ab6a29f35bf 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
<> 129:0ab6a29f35bf 34 POSSIBILITY OF SUCH DAMAGE.
<> 129:0ab6a29f35bf 35 ---------------------------------------------------------------------------*/
<> 129:0ab6a29f35bf 36
<> 129:0ab6a29f35bf 37
<> 129:0ab6a29f35bf 38 #ifndef __CORE_CM_SECURE_ACCESS_H
<> 129:0ab6a29f35bf 39 #define __CORE_CM_SECURE_ACCESS_H
<> 129:0ab6a29f35bf 40
<> 129:0ab6a29f35bf 41
<> 129:0ab6a29f35bf 42 /* ########################### Core Secure Access ########################### */
<> 129:0ab6a29f35bf 43
<> 129:0ab6a29f35bf 44 #ifdef FEATURE_UVISOR
<> 129:0ab6a29f35bf 45 #include "uvisor-lib.h"
<> 129:0ab6a29f35bf 46
<> 129:0ab6a29f35bf 47 /* Secure uVisor implementation. */
<> 129:0ab6a29f35bf 48
<> 129:0ab6a29f35bf 49 /** Set the value at the target address.
<> 129:0ab6a29f35bf 50 *
<> 129:0ab6a29f35bf 51 * Equivalent to: `*address = value`.
<> 129:0ab6a29f35bf 52 * @param address[in] Target address
<> 129:0ab6a29f35bf 53 * @param value[in] Value to write at the address location.
<> 129:0ab6a29f35bf 54 */
<> 129:0ab6a29f35bf 55 #define SECURE_WRITE(address, value) \
<> 129:0ab6a29f35bf 56 uvisor_write(main, UVISOR_RGW_SHARED, address, value, UVISOR_RGW_OP_WRITE, 0xFFFFFFFFUL)
<> 129:0ab6a29f35bf 57
<> 129:0ab6a29f35bf 58 /** Get the value at the target address.
<> 129:0ab6a29f35bf 59 *
<> 129:0ab6a29f35bf 60 * @param address[in] Target address
<> 129:0ab6a29f35bf 61 * @returns The value `*address`.
<> 129:0ab6a29f35bf 62 */
<> 129:0ab6a29f35bf 63 #define SECURE_READ(address) \
<> 129:0ab6a29f35bf 64 uvisor_read(main, UVISOR_RGW_SHARED, address, UVISOR_RGW_OP_READ, 0xFFFFFFFFUL)
<> 129:0ab6a29f35bf 65
<> 129:0ab6a29f35bf 66 /** Get the selected bits at the target address.
<> 129:0ab6a29f35bf 67 *
<> 129:0ab6a29f35bf 68 * @param address[in] Target address
<> 129:0ab6a29f35bf 69 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 70 * @returns The value `*address & mask`.
<> 129:0ab6a29f35bf 71 */
<> 129:0ab6a29f35bf 72 #define SECURE_BITS_GET(address, mask) \
<> 129:0ab6a29f35bf 73 UVISOR_BITS_GET(main, UVISOR_RGW_SHARED, address, mask)
<> 129:0ab6a29f35bf 74
<> 129:0ab6a29f35bf 75 /** Check the selected bits at the target address.
<> 129:0ab6a29f35bf 76 *
<> 129:0ab6a29f35bf 77 * @param address[in] Address at which to check the bits
<> 129:0ab6a29f35bf 78 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 79 * @returns The value `((*address & mask) == mask)`.
<> 129:0ab6a29f35bf 80 */
<> 129:0ab6a29f35bf 81 #define SECURE_BITS_CHECK(address, mask) \
<> 129:0ab6a29f35bf 82 UVISOR_BITS_CHECK(main, UVISOR_RGW_SHARED, address, mask)
<> 129:0ab6a29f35bf 83
<> 129:0ab6a29f35bf 84 /** Set the selected bits to 1 at the target address.
<> 129:0ab6a29f35bf 85 *
<> 129:0ab6a29f35bf 86 * Equivalent to: `*address |= mask`.
<> 129:0ab6a29f35bf 87 * @param address[in] Target address
<> 129:0ab6a29f35bf 88 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 89 */
<> 129:0ab6a29f35bf 90 #define SECURE_BITS_SET(address, mask) \
<> 129:0ab6a29f35bf 91 UVISOR_BITS_SET(main, UVISOR_RGW_SHARED, address, mask)
<> 129:0ab6a29f35bf 92
<> 129:0ab6a29f35bf 93 /** Clear the selected bits at the target address.
<> 129:0ab6a29f35bf 94 *
<> 129:0ab6a29f35bf 95 * Equivalent to: `*address &= ~mask`.
<> 129:0ab6a29f35bf 96 * @param address[in] Target address
<> 129:0ab6a29f35bf 97 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 98 */
<> 129:0ab6a29f35bf 99 #define SECURE_BITS_CLEAR(address, mask) \
<> 129:0ab6a29f35bf 100 UVISOR_BITS_CLEAR(main, UVISOR_RGW_SHARED, address, mask)
<> 129:0ab6a29f35bf 101
<> 129:0ab6a29f35bf 102 /** Set the selected bits at the target address to the given value.
<> 129:0ab6a29f35bf 103 *
<> 129:0ab6a29f35bf 104 * Equivalent to: `*address = (*address & ~mask) | (value & mask)`.
<> 129:0ab6a29f35bf 105 * @param address[in] Target address
<> 129:0ab6a29f35bf 106 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 107 * @param value[in] Value to write at the address location. Note: The value
<> 129:0ab6a29f35bf 108 * must be already shifted to the correct bit position
<> 129:0ab6a29f35bf 109 */
<> 129:0ab6a29f35bf 110 #define SECURE_BITS_SET_VALUE(address, mask, value) \
<> 129:0ab6a29f35bf 111 UVISOR_BITS_SET_VALUE(main, UVISOR_RGW_SHARED, address, mask, value)
<> 129:0ab6a29f35bf 112
<> 129:0ab6a29f35bf 113 /** Toggle the selected bits at the target address.
<> 129:0ab6a29f35bf 114 *
<> 129:0ab6a29f35bf 115 * Equivalent to: `*address ^= mask`.
<> 129:0ab6a29f35bf 116 * @param address[in] Target address
<> 129:0ab6a29f35bf 117 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 118 */
<> 129:0ab6a29f35bf 119 #define SECURE_BITS_TOGGLE(address, mask) \
<> 129:0ab6a29f35bf 120 UVISOR_BITS_TOGGLE(main, UVISOR_RGW_SHARED, address, mask)
<> 129:0ab6a29f35bf 121
<> 129:0ab6a29f35bf 122 #else
<> 129:0ab6a29f35bf 123
<> 129:0ab6a29f35bf 124 /* Insecure fallback implementation. */
<> 129:0ab6a29f35bf 125
<> 129:0ab6a29f35bf 126 /** Set the value at the target address.
<> 129:0ab6a29f35bf 127 *
<> 129:0ab6a29f35bf 128 * Equivalent to: `*address = value`.
<> 129:0ab6a29f35bf 129 * @param address[in] Target address
<> 129:0ab6a29f35bf 130 * @param value[in] Value to write at the address location.
<> 129:0ab6a29f35bf 131 */
<> 129:0ab6a29f35bf 132 #define SECURE_WRITE(address, value) \
<> 129:0ab6a29f35bf 133 *(address) = (value)
<> 129:0ab6a29f35bf 134
<> 129:0ab6a29f35bf 135 /** Get the value at the target address.
<> 129:0ab6a29f35bf 136 *
<> 129:0ab6a29f35bf 137 * @param address[in] Target address
<> 129:0ab6a29f35bf 138 * @returns The value `*address`.
<> 129:0ab6a29f35bf 139 */
<> 129:0ab6a29f35bf 140 #define SECURE_READ(address) \
<> 129:0ab6a29f35bf 141 (*(address))
<> 129:0ab6a29f35bf 142
<> 129:0ab6a29f35bf 143 /** Get the selected bits at the target address.
<> 129:0ab6a29f35bf 144 *
<> 129:0ab6a29f35bf 145 * @param address[in] Target address
<> 129:0ab6a29f35bf 146 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 147 * @returns The value `*address & mask`.
<> 129:0ab6a29f35bf 148 */
<> 129:0ab6a29f35bf 149 #define SECURE_BITS_GET(address, mask) \
<> 129:0ab6a29f35bf 150 (*(address) & (mask))
<> 129:0ab6a29f35bf 151
<> 129:0ab6a29f35bf 152 /** Check the selected bits at the target address.
<> 129:0ab6a29f35bf 153 *
<> 129:0ab6a29f35bf 154 * @param address[in] Address at which to check the bits
<> 129:0ab6a29f35bf 155 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 156 * @returns The value `((*address & mask) == mask)`.
<> 129:0ab6a29f35bf 157 */
<> 129:0ab6a29f35bf 158 #define SECURE_BITS_CHECK(address, mask) \
<> 129:0ab6a29f35bf 159 ((*(address) & (mask)) == (mask))
<> 129:0ab6a29f35bf 160
<> 129:0ab6a29f35bf 161 /** Set the selected bits to 1 at the target address.
<> 129:0ab6a29f35bf 162 *
<> 129:0ab6a29f35bf 163 * Equivalent to: `*address |= mask`.
<> 129:0ab6a29f35bf 164 * @param address[in] Target address
<> 129:0ab6a29f35bf 165 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 166 */
<> 129:0ab6a29f35bf 167 #define SECURE_BITS_SET(address, mask) \
<> 129:0ab6a29f35bf 168 *(address) |= (mask)
<> 129:0ab6a29f35bf 169
<> 129:0ab6a29f35bf 170 /** Clear the selected bits at the target address.
<> 129:0ab6a29f35bf 171 *
<> 129:0ab6a29f35bf 172 * Equivalent to: `*address &= ~mask`.
<> 129:0ab6a29f35bf 173 * @param address[in] Target address
<> 129:0ab6a29f35bf 174 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 175 */
<> 129:0ab6a29f35bf 176 #define SECURE_BITS_CLEAR(address, mask) \
<> 129:0ab6a29f35bf 177 *(address) &= ~(mask)
<> 129:0ab6a29f35bf 178
<> 129:0ab6a29f35bf 179 /** Set the selected bits at the target address to the given value.
<> 129:0ab6a29f35bf 180 *
<> 129:0ab6a29f35bf 181 * Equivalent to: `*address = (*address & ~mask) | (value & mask)`.
<> 129:0ab6a29f35bf 182 * @param address[in] Target address
<> 129:0ab6a29f35bf 183 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 184 * @param value[in] Value to write at the address location. Note: The value
<> 129:0ab6a29f35bf 185 * must be already shifted to the correct bit position
<> 129:0ab6a29f35bf 186 */
<> 129:0ab6a29f35bf 187 #define SECURE_BITS_SET_VALUE(address, mask, value) \
<> 129:0ab6a29f35bf 188 *(address) = (*(address) & ~(mask)) | ((value) & (mask))
<> 129:0ab6a29f35bf 189
<> 129:0ab6a29f35bf 190 /** Toggle the selected bits at the target address.
<> 129:0ab6a29f35bf 191 *
<> 129:0ab6a29f35bf 192 * Equivalent to: `*address ^= mask`.
<> 129:0ab6a29f35bf 193 * @param address[in] Target address
<> 129:0ab6a29f35bf 194 * @param mask[in] Bits to select out of the target address
<> 129:0ab6a29f35bf 195 */
<> 129:0ab6a29f35bf 196 #define SECURE_BITS_TOGGLE(address, mask) \
<> 129:0ab6a29f35bf 197 *(address) ^= (mask)
<> 129:0ab6a29f35bf 198
<> 129:0ab6a29f35bf 199 #endif
<> 129:0ab6a29f35bf 200
<> 129:0ab6a29f35bf 201 #endif /* __CORE_CM_SECURE_ACCESS_H */