mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_DISCO_L053C8/core_ca9.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
115:87f2f5183dfb 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 99:dbbf35b96557 1 /**************************************************************************//**
Kojto 99:dbbf35b96557 2 * @file core_ca9.h
Kojto 99:dbbf35b96557 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
Kojto 99:dbbf35b96557 4 * @version
Kojto 99:dbbf35b96557 5 * @date 25 March 2013
Kojto 99:dbbf35b96557 6 *
Kojto 99:dbbf35b96557 7 * @note
Kojto 99:dbbf35b96557 8 *
Kojto 99:dbbf35b96557 9 ******************************************************************************/
Kojto 99:dbbf35b96557 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
Kojto 99:dbbf35b96557 11
Kojto 99:dbbf35b96557 12 All rights reserved.
Kojto 99:dbbf35b96557 13 Redistribution and use in source and binary forms, with or without
Kojto 99:dbbf35b96557 14 modification, are permitted provided that the following conditions are met:
Kojto 99:dbbf35b96557 15 - Redistributions of source code must retain the above copyright
Kojto 99:dbbf35b96557 16 notice, this list of conditions and the following disclaimer.
Kojto 99:dbbf35b96557 17 - Redistributions in binary form must reproduce the above copyright
Kojto 99:dbbf35b96557 18 notice, this list of conditions and the following disclaimer in the
Kojto 99:dbbf35b96557 19 documentation and/or other materials provided with the distribution.
Kojto 99:dbbf35b96557 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 99:dbbf35b96557 21 to endorse or promote products derived from this software without
Kojto 99:dbbf35b96557 22 specific prior written permission.
Kojto 99:dbbf35b96557 23 *
Kojto 99:dbbf35b96557 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 99:dbbf35b96557 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 99:dbbf35b96557 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 99:dbbf35b96557 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 99:dbbf35b96557 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 99:dbbf35b96557 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 99:dbbf35b96557 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 99:dbbf35b96557 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 99:dbbf35b96557 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 99:dbbf35b96557 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 99:dbbf35b96557 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 99:dbbf35b96557 35 ---------------------------------------------------------------------------*/
Kojto 99:dbbf35b96557 36
Kojto 99:dbbf35b96557 37
Kojto 99:dbbf35b96557 38 #if defined ( __ICCARM__ )
Kojto 99:dbbf35b96557 39 #pragma system_include /* treat file as system include file for MISRA check */
Kojto 99:dbbf35b96557 40 #endif
Kojto 99:dbbf35b96557 41
Kojto 99:dbbf35b96557 42 #ifdef __cplusplus
Kojto 99:dbbf35b96557 43 extern "C" {
Kojto 99:dbbf35b96557 44 #endif
Kojto 99:dbbf35b96557 45
Kojto 99:dbbf35b96557 46 #ifndef __CORE_CA9_H_GENERIC
Kojto 99:dbbf35b96557 47 #define __CORE_CA9_H_GENERIC
Kojto 99:dbbf35b96557 48
Kojto 99:dbbf35b96557 49
Kojto 99:dbbf35b96557 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
Kojto 99:dbbf35b96557 51 CMSIS violates the following MISRA-C:2004 rules:
Kojto 99:dbbf35b96557 52
Kojto 99:dbbf35b96557 53 \li Required Rule 8.5, object/function definition in header file.<br>
Kojto 99:dbbf35b96557 54 Function definitions in header files are used to allow 'inlining'.
Kojto 99:dbbf35b96557 55
Kojto 99:dbbf35b96557 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Kojto 99:dbbf35b96557 57 Unions are used for effective representation of core registers.
Kojto 99:dbbf35b96557 58
Kojto 99:dbbf35b96557 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
Kojto 99:dbbf35b96557 60 Function-like macros are used to allow more efficient code.
Kojto 99:dbbf35b96557 61 */
Kojto 99:dbbf35b96557 62
Kojto 99:dbbf35b96557 63
Kojto 99:dbbf35b96557 64 /*******************************************************************************
Kojto 99:dbbf35b96557 65 * CMSIS definitions
Kojto 99:dbbf35b96557 66 ******************************************************************************/
Kojto 99:dbbf35b96557 67 /** \ingroup Cortex_A9
Kojto 99:dbbf35b96557 68 @{
Kojto 99:dbbf35b96557 69 */
Kojto 99:dbbf35b96557 70
Kojto 99:dbbf35b96557 71 /* CMSIS CA9 definitions */
Kojto 99:dbbf35b96557 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
Kojto 99:dbbf35b96557 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
Kojto 99:dbbf35b96557 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
Kojto 99:dbbf35b96557 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
Kojto 99:dbbf35b96557 76
Kojto 99:dbbf35b96557 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
Kojto 99:dbbf35b96557 78
Kojto 99:dbbf35b96557 79
Kojto 99:dbbf35b96557 80 #if defined ( __CC_ARM )
Kojto 99:dbbf35b96557 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
Kojto 99:dbbf35b96557 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
Kojto 99:dbbf35b96557 83 #define __STATIC_INLINE static __inline
Kojto 99:dbbf35b96557 84 #define __STATIC_ASM static __asm
Kojto 99:dbbf35b96557 85
Kojto 99:dbbf35b96557 86 #elif defined ( __ICCARM__ )
Kojto 99:dbbf35b96557 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
Kojto 99:dbbf35b96557 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
Kojto 99:dbbf35b96557 89 #define __STATIC_INLINE static inline
Kojto 99:dbbf35b96557 90 #define __STATIC_ASM static __asm
Kojto 99:dbbf35b96557 91
Kojto 115:87f2f5183dfb 92 #include <stdint.h>
Kojto 115:87f2f5183dfb 93 inline uint32_t __get_PSR(void) {
Kojto 115:87f2f5183dfb 94 __ASM("mrs r0, cpsr");
Kojto 115:87f2f5183dfb 95 }
Kojto 115:87f2f5183dfb 96
Kojto 99:dbbf35b96557 97 #elif defined ( __TMS470__ )
Kojto 99:dbbf35b96557 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
Kojto 99:dbbf35b96557 99 #define __STATIC_INLINE static inline
Kojto 99:dbbf35b96557 100 #define __STATIC_ASM static __asm
Kojto 99:dbbf35b96557 101
Kojto 99:dbbf35b96557 102 #elif defined ( __GNUC__ )
Kojto 99:dbbf35b96557 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
Kojto 99:dbbf35b96557 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
Kojto 99:dbbf35b96557 105 #define __STATIC_INLINE static inline
Kojto 99:dbbf35b96557 106 #define __STATIC_ASM static __asm
Kojto 99:dbbf35b96557 107
Kojto 99:dbbf35b96557 108 #elif defined ( __TASKING__ )
Kojto 99:dbbf35b96557 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
Kojto 99:dbbf35b96557 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
Kojto 99:dbbf35b96557 111 #define __STATIC_INLINE static inline
Kojto 99:dbbf35b96557 112 #define __STATIC_ASM static __asm
Kojto 99:dbbf35b96557 113
Kojto 99:dbbf35b96557 114 #endif
Kojto 99:dbbf35b96557 115
Kojto 99:dbbf35b96557 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
Kojto 99:dbbf35b96557 117 */
Kojto 99:dbbf35b96557 118 #if defined ( __CC_ARM )
Kojto 99:dbbf35b96557 119 #if defined __TARGET_FPU_VFP
Kojto 99:dbbf35b96557 120 #if (__FPU_PRESENT == 1)
Kojto 99:dbbf35b96557 121 #define __FPU_USED 1
Kojto 99:dbbf35b96557 122 #else
Kojto 99:dbbf35b96557 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 99:dbbf35b96557 124 #define __FPU_USED 0
Kojto 99:dbbf35b96557 125 #endif
Kojto 99:dbbf35b96557 126 #else
Kojto 99:dbbf35b96557 127 #define __FPU_USED 0
Kojto 99:dbbf35b96557 128 #endif
Kojto 99:dbbf35b96557 129
Kojto 99:dbbf35b96557 130 #elif defined ( __ICCARM__ )
Kojto 99:dbbf35b96557 131 #if defined __ARMVFP__
Kojto 99:dbbf35b96557 132 #if (__FPU_PRESENT == 1)
Kojto 99:dbbf35b96557 133 #define __FPU_USED 1
Kojto 99:dbbf35b96557 134 #else
Kojto 99:dbbf35b96557 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 99:dbbf35b96557 136 #define __FPU_USED 0
Kojto 99:dbbf35b96557 137 #endif
Kojto 99:dbbf35b96557 138 #else
Kojto 99:dbbf35b96557 139 #define __FPU_USED 0
Kojto 99:dbbf35b96557 140 #endif
Kojto 99:dbbf35b96557 141
Kojto 99:dbbf35b96557 142 #elif defined ( __TMS470__ )
Kojto 99:dbbf35b96557 143 #if defined __TI_VFP_SUPPORT__
Kojto 99:dbbf35b96557 144 #if (__FPU_PRESENT == 1)
Kojto 99:dbbf35b96557 145 #define __FPU_USED 1
Kojto 99:dbbf35b96557 146 #else
Kojto 99:dbbf35b96557 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 99:dbbf35b96557 148 #define __FPU_USED 0
Kojto 99:dbbf35b96557 149 #endif
Kojto 99:dbbf35b96557 150 #else
Kojto 99:dbbf35b96557 151 #define __FPU_USED 0
Kojto 99:dbbf35b96557 152 #endif
Kojto 99:dbbf35b96557 153
Kojto 99:dbbf35b96557 154 #elif defined ( __GNUC__ )
Kojto 99:dbbf35b96557 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
Kojto 99:dbbf35b96557 156 #if (__FPU_PRESENT == 1)
Kojto 99:dbbf35b96557 157 #define __FPU_USED 1
Kojto 99:dbbf35b96557 158 #else
Kojto 99:dbbf35b96557 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 99:dbbf35b96557 160 #define __FPU_USED 0
Kojto 99:dbbf35b96557 161 #endif
Kojto 99:dbbf35b96557 162 #else
Kojto 99:dbbf35b96557 163 #define __FPU_USED 0
Kojto 99:dbbf35b96557 164 #endif
Kojto 99:dbbf35b96557 165
Kojto 99:dbbf35b96557 166 #elif defined ( __TASKING__ )
Kojto 99:dbbf35b96557 167 #if defined __FPU_VFP__
Kojto 99:dbbf35b96557 168 #if (__FPU_PRESENT == 1)
Kojto 99:dbbf35b96557 169 #define __FPU_USED 1
Kojto 99:dbbf35b96557 170 #else
Kojto 99:dbbf35b96557 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 99:dbbf35b96557 172 #define __FPU_USED 0
Kojto 99:dbbf35b96557 173 #endif
Kojto 99:dbbf35b96557 174 #else
Kojto 99:dbbf35b96557 175 #define __FPU_USED 0
Kojto 99:dbbf35b96557 176 #endif
Kojto 99:dbbf35b96557 177 #endif
Kojto 99:dbbf35b96557 178
Kojto 99:dbbf35b96557 179 #include <stdint.h> /*!< standard types definitions */
Kojto 99:dbbf35b96557 180 #include "core_caInstr.h" /*!< Core Instruction Access */
Kojto 99:dbbf35b96557 181 #include "core_caFunc.h" /*!< Core Function Access */
Kojto 99:dbbf35b96557 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
Kojto 99:dbbf35b96557 183
Kojto 99:dbbf35b96557 184 #endif /* __CORE_CA9_H_GENERIC */
Kojto 99:dbbf35b96557 185
Kojto 99:dbbf35b96557 186 #ifndef __CMSIS_GENERIC
Kojto 99:dbbf35b96557 187
Kojto 99:dbbf35b96557 188 #ifndef __CORE_CA9_H_DEPENDANT
Kojto 99:dbbf35b96557 189 #define __CORE_CA9_H_DEPENDANT
Kojto 99:dbbf35b96557 190
Kojto 99:dbbf35b96557 191 /* check device defines and use defaults */
Kojto 99:dbbf35b96557 192 #if defined __CHECK_DEVICE_DEFINES
Kojto 99:dbbf35b96557 193 #ifndef __CA9_REV
Kojto 99:dbbf35b96557 194 #define __CA9_REV 0x0000
Kojto 99:dbbf35b96557 195 #warning "__CA9_REV not defined in device header file; using default!"
Kojto 99:dbbf35b96557 196 #endif
Kojto 99:dbbf35b96557 197
Kojto 99:dbbf35b96557 198 #ifndef __FPU_PRESENT
Kojto 99:dbbf35b96557 199 #define __FPU_PRESENT 1
Kojto 99:dbbf35b96557 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
Kojto 99:dbbf35b96557 201 #endif
Kojto 99:dbbf35b96557 202
Kojto 99:dbbf35b96557 203 #ifndef __Vendor_SysTickConfig
Kojto 99:dbbf35b96557 204 #define __Vendor_SysTickConfig 1
Kojto 99:dbbf35b96557 205 #endif
Kojto 99:dbbf35b96557 206
Kojto 99:dbbf35b96557 207 #if __Vendor_SysTickConfig == 0
Kojto 99:dbbf35b96557 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
Kojto 99:dbbf35b96557 209 #endif
Kojto 99:dbbf35b96557 210 #endif
Kojto 99:dbbf35b96557 211
Kojto 99:dbbf35b96557 212 /* IO definitions (access restrictions to peripheral registers) */
Kojto 99:dbbf35b96557 213 /**
Kojto 99:dbbf35b96557 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
Kojto 99:dbbf35b96557 215
Kojto 99:dbbf35b96557 216 <strong>IO Type Qualifiers</strong> are used
Kojto 99:dbbf35b96557 217 \li to specify the access to peripheral variables.
Kojto 99:dbbf35b96557 218 \li for automatic generation of peripheral register debug information.
Kojto 99:dbbf35b96557 219 */
Kojto 99:dbbf35b96557 220 #ifdef __cplusplus
Kojto 99:dbbf35b96557 221 #define __I volatile /*!< Defines 'read only' permissions */
Kojto 99:dbbf35b96557 222 #else
Kojto 99:dbbf35b96557 223 #define __I volatile const /*!< Defines 'read only' permissions */
Kojto 99:dbbf35b96557 224 #endif
Kojto 99:dbbf35b96557 225 #define __O volatile /*!< Defines 'write only' permissions */
Kojto 99:dbbf35b96557 226 #define __IO volatile /*!< Defines 'read / write' permissions */
Kojto 99:dbbf35b96557 227
Kojto 99:dbbf35b96557 228 /*@} end of group Cortex_A9 */
Kojto 99:dbbf35b96557 229
Kojto 99:dbbf35b96557 230
Kojto 99:dbbf35b96557 231 /*******************************************************************************
Kojto 99:dbbf35b96557 232 * Register Abstraction
Kojto 99:dbbf35b96557 233 ******************************************************************************/
Kojto 99:dbbf35b96557 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
Kojto 99:dbbf35b96557 235 \brief Type definitions and defines for Cortex-A processor based devices.
Kojto 99:dbbf35b96557 236 */
Kojto 99:dbbf35b96557 237
Kojto 99:dbbf35b96557 238 /** \ingroup CMSIS_core_register
Kojto 99:dbbf35b96557 239 \defgroup CMSIS_CORE Status and Control Registers
Kojto 99:dbbf35b96557 240 \brief Core Register type definitions.
Kojto 99:dbbf35b96557 241 @{
Kojto 99:dbbf35b96557 242 */
Kojto 99:dbbf35b96557 243
Kojto 99:dbbf35b96557 244 /** \brief Union type to access the Application Program Status Register (APSR).
Kojto 99:dbbf35b96557 245 */
Kojto 99:dbbf35b96557 246 typedef union
Kojto 99:dbbf35b96557 247 {
Kojto 99:dbbf35b96557 248 struct
Kojto 99:dbbf35b96557 249 {
Kojto 99:dbbf35b96557 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
Kojto 99:dbbf35b96557 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
Kojto 99:dbbf35b96557 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
Kojto 99:dbbf35b96557 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
Kojto 99:dbbf35b96557 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
Kojto 99:dbbf35b96557 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
Kojto 99:dbbf35b96557 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
Kojto 99:dbbf35b96557 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
Kojto 99:dbbf35b96557 258 } b; /*!< Structure used for bit access */
Kojto 99:dbbf35b96557 259 uint32_t w; /*!< Type used for word access */
Kojto 99:dbbf35b96557 260 } APSR_Type;
Kojto 99:dbbf35b96557 261
Kojto 99:dbbf35b96557 262
Kojto 99:dbbf35b96557 263 /*@} end of group CMSIS_CORE */
Kojto 99:dbbf35b96557 264
Kojto 99:dbbf35b96557 265 /*@} end of CMSIS_Core_FPUFunctions */
Kojto 99:dbbf35b96557 266
Kojto 99:dbbf35b96557 267
Kojto 99:dbbf35b96557 268 #endif /* __CORE_CA9_H_GENERIC */
Kojto 99:dbbf35b96557 269
Kojto 99:dbbf35b96557 270 #endif /* __CMSIS_GENERIC */
Kojto 99:dbbf35b96557 271
Kojto 99:dbbf35b96557 272 #ifdef __cplusplus
Kojto 99:dbbf35b96557 273 }
Kojto 99:dbbf35b96557 274
Kojto 99:dbbf35b96557 275
Kojto 99:dbbf35b96557 276 #endif