mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_ARM_MPS2_M7/core_ca9.h@134:ad3be0349dc5, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 12:05:23 2017 +0000
Revision:
134:ad3be0349dc5
Parent:
115:87f2f5183dfb 
Release 134 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488

3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492

3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503

3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504

3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539

3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540

3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438

3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519

3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544

3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546

3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551

3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558

3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563

3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567

3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 102:da0ca467f8b5 1 /**************************************************************************//**
Kojto 102:da0ca467f8b5 2 * @file core_ca9.h
Kojto 102:da0ca467f8b5 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
Kojto 102:da0ca467f8b5 4 * @version
Kojto 102:da0ca467f8b5 5 * @date 25 March 2013
Kojto 102:da0ca467f8b5 6 *
Kojto 102:da0ca467f8b5 7 * @note
Kojto 102:da0ca467f8b5 8 *
Kojto 102:da0ca467f8b5 9 ******************************************************************************/
Kojto 102:da0ca467f8b5 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
Kojto 102:da0ca467f8b5 11
Kojto 102:da0ca467f8b5 12 All rights reserved.
Kojto 102:da0ca467f8b5 13 Redistribution and use in source and binary forms, with or without
Kojto 102:da0ca467f8b5 14 modification, are permitted provided that the following conditions are met:
Kojto 102:da0ca467f8b5 15 - Redistributions of source code must retain the above copyright
Kojto 102:da0ca467f8b5 16 notice, this list of conditions and the following disclaimer.
Kojto 102:da0ca467f8b5 17 - Redistributions in binary form must reproduce the above copyright
Kojto 102:da0ca467f8b5 18 notice, this list of conditions and the following disclaimer in the
Kojto 102:da0ca467f8b5 19 documentation and/or other materials provided with the distribution.
Kojto 102:da0ca467f8b5 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 102:da0ca467f8b5 21 to endorse or promote products derived from this software without
Kojto 102:da0ca467f8b5 22 specific prior written permission.
Kojto 102:da0ca467f8b5 23 *
Kojto 102:da0ca467f8b5 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 102:da0ca467f8b5 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 102:da0ca467f8b5 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 102:da0ca467f8b5 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 102:da0ca467f8b5 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 102:da0ca467f8b5 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 102:da0ca467f8b5 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 102:da0ca467f8b5 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 102:da0ca467f8b5 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 102:da0ca467f8b5 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 102:da0ca467f8b5 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 102:da0ca467f8b5 35 ---------------------------------------------------------------------------*/
Kojto 102:da0ca467f8b5 36
Kojto 102:da0ca467f8b5 37
Kojto 102:da0ca467f8b5 38 #if defined ( __ICCARM__ )
Kojto 102:da0ca467f8b5 39 #pragma system_include /* treat file as system include file for MISRA check */
Kojto 102:da0ca467f8b5 40 #endif
Kojto 102:da0ca467f8b5 41
Kojto 102:da0ca467f8b5 42 #ifdef __cplusplus
Kojto 102:da0ca467f8b5 43 extern "C" {
Kojto 102:da0ca467f8b5 44 #endif
Kojto 102:da0ca467f8b5 45
Kojto 102:da0ca467f8b5 46 #ifndef __CORE_CA9_H_GENERIC
Kojto 102:da0ca467f8b5 47 #define __CORE_CA9_H_GENERIC
Kojto 102:da0ca467f8b5 48
Kojto 102:da0ca467f8b5 49
Kojto 102:da0ca467f8b5 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
Kojto 102:da0ca467f8b5 51 CMSIS violates the following MISRA-C:2004 rules:
Kojto 102:da0ca467f8b5 52
Kojto 102:da0ca467f8b5 53 \li Required Rule 8.5, object/function definition in header file.<br>
Kojto 102:da0ca467f8b5 54 Function definitions in header files are used to allow 'inlining'.
Kojto 102:da0ca467f8b5 55
Kojto 102:da0ca467f8b5 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Kojto 102:da0ca467f8b5 57 Unions are used for effective representation of core registers.
Kojto 102:da0ca467f8b5 58
Kojto 102:da0ca467f8b5 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
Kojto 102:da0ca467f8b5 60 Function-like macros are used to allow more efficient code.
Kojto 102:da0ca467f8b5 61 */
Kojto 102:da0ca467f8b5 62
Kojto 102:da0ca467f8b5 63
Kojto 102:da0ca467f8b5 64 /*******************************************************************************
Kojto 102:da0ca467f8b5 65 * CMSIS definitions
Kojto 102:da0ca467f8b5 66 ******************************************************************************/
Kojto 102:da0ca467f8b5 67 /** \ingroup Cortex_A9
Kojto 102:da0ca467f8b5 68 @{
Kojto 102:da0ca467f8b5 69 */
Kojto 102:da0ca467f8b5 70
Kojto 102:da0ca467f8b5 71 /* CMSIS CA9 definitions */
Kojto 102:da0ca467f8b5 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
Kojto 102:da0ca467f8b5 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
Kojto 102:da0ca467f8b5 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
Kojto 102:da0ca467f8b5 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
Kojto 102:da0ca467f8b5 76
Kojto 102:da0ca467f8b5 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
Kojto 102:da0ca467f8b5 78
Kojto 102:da0ca467f8b5 79
Kojto 102:da0ca467f8b5 80 #if defined ( __CC_ARM )
Kojto 102:da0ca467f8b5 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
Kojto 102:da0ca467f8b5 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
Kojto 102:da0ca467f8b5 83 #define __STATIC_INLINE static __inline
Kojto 102:da0ca467f8b5 84 #define __STATIC_ASM static __asm
Kojto 102:da0ca467f8b5 85
Kojto 102:da0ca467f8b5 86 #elif defined ( __ICCARM__ )
Kojto 102:da0ca467f8b5 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
Kojto 102:da0ca467f8b5 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
Kojto 102:da0ca467f8b5 89 #define __STATIC_INLINE static inline
Kojto 102:da0ca467f8b5 90 #define __STATIC_ASM static __asm
Kojto 102:da0ca467f8b5 91
Kojto 115:87f2f5183dfb 92 #include <stdint.h>
Kojto 115:87f2f5183dfb 93 inline uint32_t __get_PSR(void) {
Kojto 115:87f2f5183dfb 94 __ASM("mrs r0, cpsr");
Kojto 115:87f2f5183dfb 95 }
Kojto 115:87f2f5183dfb 96
Kojto 102:da0ca467f8b5 97 #elif defined ( __TMS470__ )
Kojto 102:da0ca467f8b5 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
Kojto 102:da0ca467f8b5 99 #define __STATIC_INLINE static inline
Kojto 102:da0ca467f8b5 100 #define __STATIC_ASM static __asm
Kojto 102:da0ca467f8b5 101
Kojto 102:da0ca467f8b5 102 #elif defined ( __GNUC__ )
Kojto 102:da0ca467f8b5 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
Kojto 102:da0ca467f8b5 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
Kojto 102:da0ca467f8b5 105 #define __STATIC_INLINE static inline
Kojto 102:da0ca467f8b5 106 #define __STATIC_ASM static __asm
Kojto 102:da0ca467f8b5 107
Kojto 102:da0ca467f8b5 108 #elif defined ( __TASKING__ )
Kojto 102:da0ca467f8b5 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
Kojto 102:da0ca467f8b5 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
Kojto 102:da0ca467f8b5 111 #define __STATIC_INLINE static inline
Kojto 102:da0ca467f8b5 112 #define __STATIC_ASM static __asm
Kojto 102:da0ca467f8b5 113
Kojto 102:da0ca467f8b5 114 #endif
Kojto 102:da0ca467f8b5 115
Kojto 102:da0ca467f8b5 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
Kojto 102:da0ca467f8b5 117 */
Kojto 102:da0ca467f8b5 118 #if defined ( __CC_ARM )
Kojto 102:da0ca467f8b5 119 #if defined __TARGET_FPU_VFP
Kojto 102:da0ca467f8b5 120 #if (__FPU_PRESENT == 1)
Kojto 102:da0ca467f8b5 121 #define __FPU_USED 1
Kojto 102:da0ca467f8b5 122 #else
Kojto 102:da0ca467f8b5 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 102:da0ca467f8b5 124 #define __FPU_USED 0
Kojto 102:da0ca467f8b5 125 #endif
Kojto 102:da0ca467f8b5 126 #else
Kojto 102:da0ca467f8b5 127 #define __FPU_USED 0
Kojto 102:da0ca467f8b5 128 #endif
Kojto 102:da0ca467f8b5 129
Kojto 102:da0ca467f8b5 130 #elif defined ( __ICCARM__ )
Kojto 102:da0ca467f8b5 131 #if defined __ARMVFP__
Kojto 102:da0ca467f8b5 132 #if (__FPU_PRESENT == 1)
Kojto 102:da0ca467f8b5 133 #define __FPU_USED 1
Kojto 102:da0ca467f8b5 134 #else
Kojto 102:da0ca467f8b5 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 102:da0ca467f8b5 136 #define __FPU_USED 0
Kojto 102:da0ca467f8b5 137 #endif
Kojto 102:da0ca467f8b5 138 #else
Kojto 102:da0ca467f8b5 139 #define __FPU_USED 0
Kojto 102:da0ca467f8b5 140 #endif
Kojto 102:da0ca467f8b5 141
Kojto 102:da0ca467f8b5 142 #elif defined ( __TMS470__ )
Kojto 102:da0ca467f8b5 143 #if defined __TI_VFP_SUPPORT__
Kojto 102:da0ca467f8b5 144 #if (__FPU_PRESENT == 1)
Kojto 102:da0ca467f8b5 145 #define __FPU_USED 1
Kojto 102:da0ca467f8b5 146 #else
Kojto 102:da0ca467f8b5 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 102:da0ca467f8b5 148 #define __FPU_USED 0
Kojto 102:da0ca467f8b5 149 #endif
Kojto 102:da0ca467f8b5 150 #else
Kojto 102:da0ca467f8b5 151 #define __FPU_USED 0
Kojto 102:da0ca467f8b5 152 #endif
Kojto 102:da0ca467f8b5 153
Kojto 102:da0ca467f8b5 154 #elif defined ( __GNUC__ )
Kojto 102:da0ca467f8b5 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
Kojto 102:da0ca467f8b5 156 #if (__FPU_PRESENT == 1)
Kojto 102:da0ca467f8b5 157 #define __FPU_USED 1
Kojto 102:da0ca467f8b5 158 #else
Kojto 102:da0ca467f8b5 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 102:da0ca467f8b5 160 #define __FPU_USED 0
Kojto 102:da0ca467f8b5 161 #endif
Kojto 102:da0ca467f8b5 162 #else
Kojto 102:da0ca467f8b5 163 #define __FPU_USED 0
Kojto 102:da0ca467f8b5 164 #endif
Kojto 102:da0ca467f8b5 165
Kojto 102:da0ca467f8b5 166 #elif defined ( __TASKING__ )
Kojto 102:da0ca467f8b5 167 #if defined __FPU_VFP__
Kojto 102:da0ca467f8b5 168 #if (__FPU_PRESENT == 1)
Kojto 102:da0ca467f8b5 169 #define __FPU_USED 1
Kojto 102:da0ca467f8b5 170 #else
Kojto 102:da0ca467f8b5 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 102:da0ca467f8b5 172 #define __FPU_USED 0
Kojto 102:da0ca467f8b5 173 #endif
Kojto 102:da0ca467f8b5 174 #else
Kojto 102:da0ca467f8b5 175 #define __FPU_USED 0
Kojto 102:da0ca467f8b5 176 #endif
Kojto 102:da0ca467f8b5 177 #endif
Kojto 102:da0ca467f8b5 178
Kojto 102:da0ca467f8b5 179 #include <stdint.h> /*!< standard types definitions */
Kojto 102:da0ca467f8b5 180 #include "core_caInstr.h" /*!< Core Instruction Access */
Kojto 102:da0ca467f8b5 181 #include "core_caFunc.h" /*!< Core Function Access */
Kojto 102:da0ca467f8b5 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
Kojto 102:da0ca467f8b5 183
Kojto 102:da0ca467f8b5 184 #endif /* __CORE_CA9_H_GENERIC */
Kojto 102:da0ca467f8b5 185
Kojto 102:da0ca467f8b5 186 #ifndef __CMSIS_GENERIC
Kojto 102:da0ca467f8b5 187
Kojto 102:da0ca467f8b5 188 #ifndef __CORE_CA9_H_DEPENDANT
Kojto 102:da0ca467f8b5 189 #define __CORE_CA9_H_DEPENDANT
Kojto 102:da0ca467f8b5 190
Kojto 102:da0ca467f8b5 191 /* check device defines and use defaults */
Kojto 102:da0ca467f8b5 192 #if defined __CHECK_DEVICE_DEFINES
Kojto 102:da0ca467f8b5 193 #ifndef __CA9_REV
Kojto 102:da0ca467f8b5 194 #define __CA9_REV 0x0000
Kojto 102:da0ca467f8b5 195 #warning "__CA9_REV not defined in device header file; using default!"
Kojto 102:da0ca467f8b5 196 #endif
Kojto 102:da0ca467f8b5 197
Kojto 102:da0ca467f8b5 198 #ifndef __FPU_PRESENT
Kojto 102:da0ca467f8b5 199 #define __FPU_PRESENT 1
Kojto 102:da0ca467f8b5 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
Kojto 102:da0ca467f8b5 201 #endif
Kojto 102:da0ca467f8b5 202
Kojto 102:da0ca467f8b5 203 #ifndef __Vendor_SysTickConfig
Kojto 102:da0ca467f8b5 204 #define __Vendor_SysTickConfig 1
Kojto 102:da0ca467f8b5 205 #endif
Kojto 102:da0ca467f8b5 206
Kojto 102:da0ca467f8b5 207 #if __Vendor_SysTickConfig == 0
Kojto 102:da0ca467f8b5 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
Kojto 102:da0ca467f8b5 209 #endif
Kojto 102:da0ca467f8b5 210 #endif
Kojto 102:da0ca467f8b5 211
Kojto 102:da0ca467f8b5 212 /* IO definitions (access restrictions to peripheral registers) */
Kojto 102:da0ca467f8b5 213 /**
Kojto 102:da0ca467f8b5 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
Kojto 102:da0ca467f8b5 215
Kojto 102:da0ca467f8b5 216 <strong>IO Type Qualifiers</strong> are used
Kojto 102:da0ca467f8b5 217 \li to specify the access to peripheral variables.
Kojto 102:da0ca467f8b5 218 \li for automatic generation of peripheral register debug information.
Kojto 102:da0ca467f8b5 219 */
Kojto 102:da0ca467f8b5 220 #ifdef __cplusplus
Kojto 102:da0ca467f8b5 221 #define __I volatile /*!< Defines 'read only' permissions */
Kojto 102:da0ca467f8b5 222 #else
Kojto 102:da0ca467f8b5 223 #define __I volatile const /*!< Defines 'read only' permissions */
Kojto 102:da0ca467f8b5 224 #endif
Kojto 102:da0ca467f8b5 225 #define __O volatile /*!< Defines 'write only' permissions */
Kojto 102:da0ca467f8b5 226 #define __IO volatile /*!< Defines 'read / write' permissions */
Kojto 102:da0ca467f8b5 227
Kojto 102:da0ca467f8b5 228 /*@} end of group Cortex_A9 */
Kojto 102:da0ca467f8b5 229
Kojto 102:da0ca467f8b5 230
Kojto 102:da0ca467f8b5 231 /*******************************************************************************
Kojto 102:da0ca467f8b5 232 * Register Abstraction
Kojto 102:da0ca467f8b5 233 ******************************************************************************/
Kojto 102:da0ca467f8b5 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
Kojto 102:da0ca467f8b5 235 \brief Type definitions and defines for Cortex-A processor based devices.
Kojto 102:da0ca467f8b5 236 */
Kojto 102:da0ca467f8b5 237
Kojto 102:da0ca467f8b5 238 /** \ingroup CMSIS_core_register
Kojto 102:da0ca467f8b5 239 \defgroup CMSIS_CORE Status and Control Registers
Kojto 102:da0ca467f8b5 240 \brief Core Register type definitions.
Kojto 102:da0ca467f8b5 241 @{
Kojto 102:da0ca467f8b5 242 */
Kojto 102:da0ca467f8b5 243
Kojto 102:da0ca467f8b5 244 /** \brief Union type to access the Application Program Status Register (APSR).
Kojto 102:da0ca467f8b5 245 */
Kojto 102:da0ca467f8b5 246 typedef union
Kojto 102:da0ca467f8b5 247 {
Kojto 102:da0ca467f8b5 248 struct
Kojto 102:da0ca467f8b5 249 {
Kojto 102:da0ca467f8b5 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
Kojto 102:da0ca467f8b5 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
Kojto 102:da0ca467f8b5 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
Kojto 102:da0ca467f8b5 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
Kojto 102:da0ca467f8b5 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
Kojto 102:da0ca467f8b5 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
Kojto 102:da0ca467f8b5 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
Kojto 102:da0ca467f8b5 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
Kojto 102:da0ca467f8b5 258 } b; /*!< Structure used for bit access */
Kojto 102:da0ca467f8b5 259 uint32_t w; /*!< Type used for word access */
Kojto 102:da0ca467f8b5 260 } APSR_Type;
Kojto 102:da0ca467f8b5 261
Kojto 102:da0ca467f8b5 262
Kojto 102:da0ca467f8b5 263 /*@} end of group CMSIS_CORE */
Kojto 102:da0ca467f8b5 264
Kojto 102:da0ca467f8b5 265 /*@} end of CMSIS_Core_FPUFunctions */
Kojto 102:da0ca467f8b5 266
Kojto 102:da0ca467f8b5 267
Kojto 102:da0ca467f8b5 268 #endif /* __CORE_CA9_H_GENERIC */
Kojto 102:da0ca467f8b5 269
Kojto 102:da0ca467f8b5 270 #endif /* __CMSIS_GENERIC */
Kojto 102:da0ca467f8b5 271
Kojto 102:da0ca467f8b5 272 #ifdef __cplusplus
Kojto 102:da0ca467f8b5 273 }
Kojto 102:da0ca467f8b5 274
Kojto 102:da0ca467f8b5 275
Kojto 102:da0ca467f8b5 276 #endif