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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

drivers/SPISlave.h@147:a97add6d7e64, 2017-07-19 (annotated)

Committer:
Kojto
Date:
Wed Jul 19 16:46:19 2017 +0100
Revision:
147:a97add6d7e64
Parent:
146:22da6e220af6 
Release 147 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /* mbed Microcontroller Library
<> 128:9bcdf88f62b0 2 * Copyright (c) 2006-2013 ARM Limited
<> 128:9bcdf88f62b0 3 *
<> 128:9bcdf88f62b0 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 128:9bcdf88f62b0 5 * you may not use this file except in compliance with the License.
<> 128:9bcdf88f62b0 6 * You may obtain a copy of the License at
<> 128:9bcdf88f62b0 7 *
<> 128:9bcdf88f62b0 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 128:9bcdf88f62b0 9 *
<> 128:9bcdf88f62b0 10 * Unless required by applicable law or agreed to in writing, software
<> 128:9bcdf88f62b0 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 128:9bcdf88f62b0 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 128:9bcdf88f62b0 13 * See the License for the specific language governing permissions and
<> 128:9bcdf88f62b0 14 * limitations under the License.
<> 128:9bcdf88f62b0 15 */
<> 128:9bcdf88f62b0 16 #ifndef MBED_SPISLAVE_H
<> 128:9bcdf88f62b0 17 #define MBED_SPISLAVE_H
<> 128:9bcdf88f62b0 18
<> 128:9bcdf88f62b0 19 #include "platform/platform.h"
AnnaBridge 146:22da6e220af6 20 #include "platform/NonCopyable.h"
<> 128:9bcdf88f62b0 21
AnnaBridge 145:64910690c574 22 #if defined (DEVICE_SPISLAVE) || defined(DOXYGEN_ONLY)
<> 128:9bcdf88f62b0 23
<> 128:9bcdf88f62b0 24 #include "hal/spi_api.h"
<> 128:9bcdf88f62b0 25
<> 128:9bcdf88f62b0 26 namespace mbed {
<> 128:9bcdf88f62b0 27 /** \addtogroup drivers */
<> 128:9bcdf88f62b0 28
<> 128:9bcdf88f62b0 29 /** A SPI slave, used for communicating with a SPI Master device
<> 128:9bcdf88f62b0 30 *
<> 128:9bcdf88f62b0 31 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
<> 128:9bcdf88f62b0 32 *
AnnaBridge 145:64910690c574 33 * @note Synchronization level: Not protected
<> 128:9bcdf88f62b0 34 *
<> 128:9bcdf88f62b0 35 * Example:
<> 128:9bcdf88f62b0 36 * @code
<> 128:9bcdf88f62b0 37 * // Reply to a SPI master as slave
<> 128:9bcdf88f62b0 38 *
<> 128:9bcdf88f62b0 39 * #include "mbed.h"
<> 128:9bcdf88f62b0 40 *
<> 128:9bcdf88f62b0 41 * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
<> 128:9bcdf88f62b0 42 *
<> 128:9bcdf88f62b0 43 * int main() {
<> 128:9bcdf88f62b0 44 * device.reply(0x00); // Prime SPI with first reply
<> 128:9bcdf88f62b0 45 * while(1) {
<> 128:9bcdf88f62b0 46 * if(device.receive()) {
<> 128:9bcdf88f62b0 47 * int v = device.read(); // Read byte from master
<> 128:9bcdf88f62b0 48 * v = (v + 1) % 0x100; // Add one to it, modulo 256
<> 128:9bcdf88f62b0 49 * device.reply(v); // Make this the next reply
<> 128:9bcdf88f62b0 50 * }
<> 128:9bcdf88f62b0 51 * }
<> 128:9bcdf88f62b0 52 * }
<> 128:9bcdf88f62b0 53 * @endcode
AnnaBridge 145:64910690c574 54 * @ingroup drivers
<> 128:9bcdf88f62b0 55 */
AnnaBridge 146:22da6e220af6 56 class SPISlave : private NonCopyable<SPISlave> {
<> 128:9bcdf88f62b0 57
<> 128:9bcdf88f62b0 58 public:
<> 128:9bcdf88f62b0 59
<> 128:9bcdf88f62b0 60 /** Create a SPI slave connected to the specified pins
<> 128:9bcdf88f62b0 61 *
<> 128:9bcdf88f62b0 62 * mosi or miso can be specfied as NC if not used
<> 128:9bcdf88f62b0 63 *
<> 128:9bcdf88f62b0 64 * @param mosi SPI Master Out, Slave In pin
<> 128:9bcdf88f62b0 65 * @param miso SPI Master In, Slave Out pin
<> 128:9bcdf88f62b0 66 * @param sclk SPI Clock pin
<> 128:9bcdf88f62b0 67 * @param ssel SPI chip select pin
<> 128:9bcdf88f62b0 68 */
<> 128:9bcdf88f62b0 69 SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
<> 128:9bcdf88f62b0 70
<> 128:9bcdf88f62b0 71 /** Configure the data transmission format
<> 128:9bcdf88f62b0 72 *
<> 128:9bcdf88f62b0 73 * @param bits Number of bits per SPI frame (4 - 16)
<> 128:9bcdf88f62b0 74 * @param mode Clock polarity and phase mode (0 - 3)
<> 128:9bcdf88f62b0 75 *
<> 128:9bcdf88f62b0 76 * @code
<> 128:9bcdf88f62b0 77 * mode | POL PHA
<> 128:9bcdf88f62b0 78 * -----+--------
<> 128:9bcdf88f62b0 79 * 0 | 0 0
<> 128:9bcdf88f62b0 80 * 1 | 0 1
<> 128:9bcdf88f62b0 81 * 2 | 1 0
<> 128:9bcdf88f62b0 82 * 3 | 1 1
<> 128:9bcdf88f62b0 83 * @endcode
<> 128:9bcdf88f62b0 84 */
<> 128:9bcdf88f62b0 85 void format(int bits, int mode = 0);
<> 128:9bcdf88f62b0 86
<> 128:9bcdf88f62b0 87 /** Set the spi bus clock frequency
<> 128:9bcdf88f62b0 88 *
<> 128:9bcdf88f62b0 89 * @param hz SCLK frequency in hz (default = 1MHz)
<> 128:9bcdf88f62b0 90 */
<> 128:9bcdf88f62b0 91 void frequency(int hz = 1000000);
<> 128:9bcdf88f62b0 92
<> 128:9bcdf88f62b0 93 /** Polls the SPI to see if data has been received
<> 128:9bcdf88f62b0 94 *
<> 128:9bcdf88f62b0 95 * @returns
<> 128:9bcdf88f62b0 96 * 0 if no data,
<> 128:9bcdf88f62b0 97 * 1 otherwise
<> 128:9bcdf88f62b0 98 */
<> 128:9bcdf88f62b0 99 int receive(void);
<> 128:9bcdf88f62b0 100
<> 128:9bcdf88f62b0 101 /** Retrieve data from receive buffer as slave
<> 128:9bcdf88f62b0 102 *
<> 128:9bcdf88f62b0 103 * @returns
<> 128:9bcdf88f62b0 104 * the data in the receive buffer
<> 128:9bcdf88f62b0 105 */
<> 128:9bcdf88f62b0 106 int read(void);
<> 128:9bcdf88f62b0 107
<> 128:9bcdf88f62b0 108 /** Fill the transmission buffer with the value to be written out
<> 128:9bcdf88f62b0 109 * as slave on the next received message from the master.
<> 128:9bcdf88f62b0 110 *
<> 128:9bcdf88f62b0 111 * @param value the data to be transmitted next
<> 128:9bcdf88f62b0 112 */
<> 128:9bcdf88f62b0 113 void reply(int value);
<> 128:9bcdf88f62b0 114
<> 128:9bcdf88f62b0 115 protected:
<> 128:9bcdf88f62b0 116 spi_t _spi;
<> 128:9bcdf88f62b0 117
<> 128:9bcdf88f62b0 118 int _bits;
<> 128:9bcdf88f62b0 119 int _mode;
<> 128:9bcdf88f62b0 120 int _hz;
<> 128:9bcdf88f62b0 121 };
<> 128:9bcdf88f62b0 122
<> 128:9bcdf88f62b0 123 } // namespace mbed
<> 128:9bcdf88f62b0 124
<> 128:9bcdf88f62b0 125 #endif
<> 128:9bcdf88f62b0 126
<> 128:9bcdf88f62b0 127 #endif