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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

drivers/SPI.h@147:a97add6d7e64, 2017-07-19 (annotated)

Committer:
Kojto
Date:
Wed Jul 19 16:46:19 2017 +0100
Revision:
147:a97add6d7e64
Parent:
146:22da6e220af6
Child:
148:fd96258d940d
Release 147 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /* mbed Microcontroller Library
<> 128:9bcdf88f62b0 2 * Copyright (c) 2006-2015 ARM Limited
<> 128:9bcdf88f62b0 3 *
<> 128:9bcdf88f62b0 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 128:9bcdf88f62b0 5 * you may not use this file except in compliance with the License.
<> 128:9bcdf88f62b0 6 * You may obtain a copy of the License at
<> 128:9bcdf88f62b0 7 *
<> 128:9bcdf88f62b0 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 128:9bcdf88f62b0 9 *
<> 128:9bcdf88f62b0 10 * Unless required by applicable law or agreed to in writing, software
<> 128:9bcdf88f62b0 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 128:9bcdf88f62b0 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 128:9bcdf88f62b0 13 * See the License for the specific language governing permissions and
<> 128:9bcdf88f62b0 14 * limitations under the License.
<> 128:9bcdf88f62b0 15 */
<> 128:9bcdf88f62b0 16 #ifndef MBED_SPI_H
<> 128:9bcdf88f62b0 17 #define MBED_SPI_H
<> 128:9bcdf88f62b0 18
<> 128:9bcdf88f62b0 19 #include "platform/platform.h"
<> 128:9bcdf88f62b0 20
AnnaBridge 145:64910690c574 21 #if defined (DEVICE_SPI) || defined(DOXYGEN_ONLY)
<> 128:9bcdf88f62b0 22
<> 128:9bcdf88f62b0 23 #include "platform/PlatformMutex.h"
<> 128:9bcdf88f62b0 24 #include "hal/spi_api.h"
<> 128:9bcdf88f62b0 25 #include "platform/SingletonPtr.h"
AnnaBridge 146:22da6e220af6 26 #include "platform/NonCopyable.h"
<> 128:9bcdf88f62b0 27
<> 128:9bcdf88f62b0 28 #if DEVICE_SPI_ASYNCH
<> 128:9bcdf88f62b0 29 #include "platform/CThunk.h"
<> 128:9bcdf88f62b0 30 #include "hal/dma_api.h"
<> 128:9bcdf88f62b0 31 #include "platform/CircularBuffer.h"
<> 128:9bcdf88f62b0 32 #include "platform/FunctionPointer.h"
<> 128:9bcdf88f62b0 33 #include "platform/Transaction.h"
<> 128:9bcdf88f62b0 34 #endif
<> 128:9bcdf88f62b0 35
<> 128:9bcdf88f62b0 36 namespace mbed {
<> 128:9bcdf88f62b0 37 /** \addtogroup drivers */
<> 128:9bcdf88f62b0 38
<> 128:9bcdf88f62b0 39 /** A SPI Master, used for communicating with SPI slave devices
<> 128:9bcdf88f62b0 40 *
<> 128:9bcdf88f62b0 41 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
<> 128:9bcdf88f62b0 42 *
<> 128:9bcdf88f62b0 43 * Most SPI devices will also require Chip Select and Reset signals. These
AnnaBridge 145:64910690c574 44 * can be controlled using DigitalOut pins
<> 128:9bcdf88f62b0 45 *
AnnaBridge 145:64910690c574 46 * @note Synchronization level: Thread safe
<> 128:9bcdf88f62b0 47 *
<> 128:9bcdf88f62b0 48 * Example:
<> 128:9bcdf88f62b0 49 * @code
<> 128:9bcdf88f62b0 50 * // Send a byte to a SPI slave, and record the response
<> 128:9bcdf88f62b0 51 *
<> 128:9bcdf88f62b0 52 * #include "mbed.h"
<> 128:9bcdf88f62b0 53 *
<> 128:9bcdf88f62b0 54 * // hardware ssel (where applicable)
<> 128:9bcdf88f62b0 55 * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
<> 128:9bcdf88f62b0 56 *
<> 128:9bcdf88f62b0 57 * // software ssel
<> 128:9bcdf88f62b0 58 * SPI device(p5, p6, p7); // mosi, miso, sclk
<> 128:9bcdf88f62b0 59 * DigitalOut cs(p8); // ssel
<> 128:9bcdf88f62b0 60 *
<> 128:9bcdf88f62b0 61 * int main() {
<> 128:9bcdf88f62b0 62 * // hardware ssel (where applicable)
<> 128:9bcdf88f62b0 63 * //int response = device.write(0xFF);
<> 128:9bcdf88f62b0 64 *
<> 128:9bcdf88f62b0 65 * device.lock();
<> 128:9bcdf88f62b0 66 * // software ssel
<> 128:9bcdf88f62b0 67 * cs = 0;
<> 128:9bcdf88f62b0 68 * int response = device.write(0xFF);
<> 128:9bcdf88f62b0 69 * cs = 1;
<> 128:9bcdf88f62b0 70 * device.unlock();
<> 128:9bcdf88f62b0 71 *
<> 128:9bcdf88f62b0 72 * }
<> 128:9bcdf88f62b0 73 * @endcode
AnnaBridge 145:64910690c574 74 * @ingroup drivers
<> 128:9bcdf88f62b0 75 */
AnnaBridge 146:22da6e220af6 76 class SPI : private NonCopyable<SPI> {
<> 128:9bcdf88f62b0 77
<> 128:9bcdf88f62b0 78 public:
<> 128:9bcdf88f62b0 79
<> 128:9bcdf88f62b0 80 /** Create a SPI master connected to the specified pins
<> 128:9bcdf88f62b0 81 *
<> 128:9bcdf88f62b0 82 * mosi or miso can be specfied as NC if not used
<> 128:9bcdf88f62b0 83 *
<> 128:9bcdf88f62b0 84 * @param mosi SPI Master Out, Slave In pin
<> 128:9bcdf88f62b0 85 * @param miso SPI Master In, Slave Out pin
<> 128:9bcdf88f62b0 86 * @param sclk SPI Clock pin
<> 128:9bcdf88f62b0 87 * @param ssel SPI chip select pin
<> 128:9bcdf88f62b0 88 */
<> 128:9bcdf88f62b0 89 SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
<> 128:9bcdf88f62b0 90
<> 128:9bcdf88f62b0 91 /** Configure the data transmission format
<> 128:9bcdf88f62b0 92 *
<> 128:9bcdf88f62b0 93 * @param bits Number of bits per SPI frame (4 - 16)
<> 128:9bcdf88f62b0 94 * @param mode Clock polarity and phase mode (0 - 3)
<> 128:9bcdf88f62b0 95 *
<> 128:9bcdf88f62b0 96 * @code
<> 128:9bcdf88f62b0 97 * mode | POL PHA
<> 128:9bcdf88f62b0 98 * -----+--------
<> 128:9bcdf88f62b0 99 * 0 | 0 0
<> 128:9bcdf88f62b0 100 * 1 | 0 1
<> 128:9bcdf88f62b0 101 * 2 | 1 0
<> 128:9bcdf88f62b0 102 * 3 | 1 1
<> 128:9bcdf88f62b0 103 * @endcode
<> 128:9bcdf88f62b0 104 */
<> 128:9bcdf88f62b0 105 void format(int bits, int mode = 0);
<> 128:9bcdf88f62b0 106
<> 128:9bcdf88f62b0 107 /** Set the spi bus clock frequency
<> 128:9bcdf88f62b0 108 *
<> 128:9bcdf88f62b0 109 * @param hz SCLK frequency in hz (default = 1MHz)
<> 128:9bcdf88f62b0 110 */
<> 128:9bcdf88f62b0 111 void frequency(int hz = 1000000);
<> 128:9bcdf88f62b0 112
<> 128:9bcdf88f62b0 113 /** Write to the SPI Slave and return the response
<> 128:9bcdf88f62b0 114 *
<> 128:9bcdf88f62b0 115 * @param value Data to be sent to the SPI slave
<> 128:9bcdf88f62b0 116 *
<> 128:9bcdf88f62b0 117 * @returns
<> 128:9bcdf88f62b0 118 * Response from the SPI slave
AnnaBridge 145:64910690c574 119 */
<> 128:9bcdf88f62b0 120 virtual int write(int value);
<> 128:9bcdf88f62b0 121
AnnaBridge 145:64910690c574 122 /** Write to the SPI Slave and obtain the response
AnnaBridge 145:64910690c574 123 *
AnnaBridge 145:64910690c574 124 * The total number of bytes sent and recieved will be the maximum of
AnnaBridge 145:64910690c574 125 * tx_length and rx_length. The bytes written will be padded with the
AnnaBridge 145:64910690c574 126 * value 0xff.
AnnaBridge 145:64910690c574 127 *
AnnaBridge 145:64910690c574 128 * @param tx_buffer Pointer to the byte-array of data to write to the device
AnnaBridge 145:64910690c574 129 * @param tx_length Number of bytes to write, may be zero
AnnaBridge 145:64910690c574 130 * @param rx_buffer Pointer to the byte-array of data to read from the device
AnnaBridge 145:64910690c574 131 * @param rx_length Number of bytes to read, may be zero
AnnaBridge 145:64910690c574 132 * @returns
AnnaBridge 145:64910690c574 133 * The number of bytes written and read from the device. This is
AnnaBridge 145:64910690c574 134 * maximum of tx_length and rx_length.
AnnaBridge 145:64910690c574 135 */
AnnaBridge 145:64910690c574 136 virtual int write(const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length);
AnnaBridge 145:64910690c574 137
<> 128:9bcdf88f62b0 138 /** Acquire exclusive access to this SPI bus
<> 128:9bcdf88f62b0 139 */
<> 128:9bcdf88f62b0 140 virtual void lock(void);
<> 128:9bcdf88f62b0 141
<> 128:9bcdf88f62b0 142 /** Release exclusive access to this SPI bus
<> 128:9bcdf88f62b0 143 */
<> 128:9bcdf88f62b0 144 virtual void unlock(void);
<> 128:9bcdf88f62b0 145
<> 128:9bcdf88f62b0 146 #if DEVICE_SPI_ASYNCH
<> 128:9bcdf88f62b0 147
<> 128:9bcdf88f62b0 148 /** Start non-blocking SPI transfer using 8bit buffers.
<> 128:9bcdf88f62b0 149 *
<> 128:9bcdf88f62b0 150 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
<> 128:9bcdf88f62b0 151 * the default SPI value is sent
<> 128:9bcdf88f62b0 152 * @param tx_length The length of TX buffer in bytes
<> 128:9bcdf88f62b0 153 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
<> 128:9bcdf88f62b0 154 * received data are ignored
<> 128:9bcdf88f62b0 155 * @param rx_length The length of RX buffer in bytes
<> 128:9bcdf88f62b0 156 * @param callback The event callback function
<> 128:9bcdf88f62b0 157 * @param event The logical OR of events to modify. Look at spi hal header file for SPI events.
<> 128:9bcdf88f62b0 158 * @return Zero if the transfer has started, or -1 if SPI peripheral is busy
<> 128:9bcdf88f62b0 159 */
<> 128:9bcdf88f62b0 160 template<typename Type>
<> 128:9bcdf88f62b0 161 int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t& callback, int event = SPI_EVENT_COMPLETE) {
<> 128:9bcdf88f62b0 162 if (spi_active(&_spi)) {
<> 128:9bcdf88f62b0 163 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
<> 128:9bcdf88f62b0 164 }
<> 128:9bcdf88f62b0 165 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
<> 128:9bcdf88f62b0 166 return 0;
<> 128:9bcdf88f62b0 167 }
<> 128:9bcdf88f62b0 168
<> 128:9bcdf88f62b0 169 /** Abort the on-going SPI transfer, and continue with transfer's in the queue if any.
<> 128:9bcdf88f62b0 170 */
<> 128:9bcdf88f62b0 171 void abort_transfer();
<> 128:9bcdf88f62b0 172
<> 128:9bcdf88f62b0 173 /** Clear the transaction buffer
<> 128:9bcdf88f62b0 174 */
<> 128:9bcdf88f62b0 175 void clear_transfer_buffer();
<> 128:9bcdf88f62b0 176
<> 128:9bcdf88f62b0 177 /** Clear the transaction buffer and abort on-going transfer.
<> 128:9bcdf88f62b0 178 */
<> 128:9bcdf88f62b0 179 void abort_all_transfers();
<> 128:9bcdf88f62b0 180
<> 128:9bcdf88f62b0 181 /** Configure DMA usage suggestion for non-blocking transfers
<> 128:9bcdf88f62b0 182 *
<> 128:9bcdf88f62b0 183 * @param usage The usage DMA hint for peripheral
<> 128:9bcdf88f62b0 184 * @return Zero if the usage was set, -1 if a transaction is on-going
<> 128:9bcdf88f62b0 185 */
<> 128:9bcdf88f62b0 186 int set_dma_usage(DMAUsage usage);
<> 128:9bcdf88f62b0 187
<> 128:9bcdf88f62b0 188 protected:
<> 128:9bcdf88f62b0 189 /** SPI IRQ handler
<> 128:9bcdf88f62b0 190 *
<> 128:9bcdf88f62b0 191 */
<> 128:9bcdf88f62b0 192 void irq_handler_asynch(void);
<> 128:9bcdf88f62b0 193
<> 128:9bcdf88f62b0 194 /** Common transfer method
<> 128:9bcdf88f62b0 195 *
<> 128:9bcdf88f62b0 196 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
<> 128:9bcdf88f62b0 197 * the default SPI value is sent
<> 128:9bcdf88f62b0 198 * @param tx_length The length of TX buffer in bytes
<> 128:9bcdf88f62b0 199 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
<> 128:9bcdf88f62b0 200 * received data are ignored
<> 128:9bcdf88f62b0 201 * @param rx_length The length of RX buffer in bytes
<> 128:9bcdf88f62b0 202 * @param bit_width The buffers element width
<> 128:9bcdf88f62b0 203 * @param callback The event callback function
<> 128:9bcdf88f62b0 204 * @param event The logical OR of events to modify
<> 128:9bcdf88f62b0 205 * @return Zero if the transfer has started or was added to the queue, or -1 if SPI peripheral is busy/buffer is full
<> 128:9bcdf88f62b0 206 */
<> 128:9bcdf88f62b0 207 int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
<> 128:9bcdf88f62b0 208
<> 128:9bcdf88f62b0 209 /**
<> 128:9bcdf88f62b0 210 *
<> 128:9bcdf88f62b0 211 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
<> 128:9bcdf88f62b0 212 * the default SPI value is sent
<> 128:9bcdf88f62b0 213 * @param tx_length The length of TX buffer in bytes
<> 128:9bcdf88f62b0 214 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
<> 128:9bcdf88f62b0 215 * received data are ignored
<> 128:9bcdf88f62b0 216 * @param rx_length The length of RX buffer in bytes
<> 128:9bcdf88f62b0 217 * @param bit_width The buffers element width
<> 128:9bcdf88f62b0 218 * @param callback The event callback function
<> 128:9bcdf88f62b0 219 * @param event The logical OR of events to modify
<> 128:9bcdf88f62b0 220 * @return Zero if a transfer was added to the queue, or -1 if the queue is full
<> 128:9bcdf88f62b0 221 */
<> 128:9bcdf88f62b0 222 int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
<> 128:9bcdf88f62b0 223
<> 128:9bcdf88f62b0 224 /** Configures a callback, spi peripheral and initiate a new transfer
<> 128:9bcdf88f62b0 225 *
<> 128:9bcdf88f62b0 226 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
<> 128:9bcdf88f62b0 227 * the default SPI value is sent
<> 128:9bcdf88f62b0 228 * @param tx_length The length of TX buffer in bytes
<> 128:9bcdf88f62b0 229 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
<> 128:9bcdf88f62b0 230 * received data are ignored
<> 128:9bcdf88f62b0 231 * @param rx_length The length of RX buffer in bytes
<> 128:9bcdf88f62b0 232 * @param bit_width The buffers element width
<> 128:9bcdf88f62b0 233 * @param callback The event callback function
<> 128:9bcdf88f62b0 234 * @param event The logical OR of events to modify
<> 128:9bcdf88f62b0 235 */
<> 128:9bcdf88f62b0 236 void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
<> 128:9bcdf88f62b0 237
<> 128:9bcdf88f62b0 238 #if TRANSACTION_QUEUE_SIZE_SPI
<> 128:9bcdf88f62b0 239
<> 128:9bcdf88f62b0 240 /** Start a new transaction
<> 128:9bcdf88f62b0 241 *
<> 128:9bcdf88f62b0 242 * @param data Transaction data
<> 128:9bcdf88f62b0 243 */
<> 128:9bcdf88f62b0 244 void start_transaction(transaction_t *data);
<> 128:9bcdf88f62b0 245
<> 128:9bcdf88f62b0 246 /** Dequeue a transaction
<> 128:9bcdf88f62b0 247 *
<> 128:9bcdf88f62b0 248 */
<> 128:9bcdf88f62b0 249 void dequeue_transaction();
<> 128:9bcdf88f62b0 250 static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
<> 128:9bcdf88f62b0 251 #endif
<> 128:9bcdf88f62b0 252
<> 128:9bcdf88f62b0 253 #endif
<> 128:9bcdf88f62b0 254
<> 128:9bcdf88f62b0 255 public:
<> 128:9bcdf88f62b0 256 virtual ~SPI() {
<> 128:9bcdf88f62b0 257 }
<> 128:9bcdf88f62b0 258
<> 128:9bcdf88f62b0 259 protected:
<> 128:9bcdf88f62b0 260 spi_t _spi;
<> 128:9bcdf88f62b0 261
<> 128:9bcdf88f62b0 262 #if DEVICE_SPI_ASYNCH
<> 128:9bcdf88f62b0 263 CThunk<SPI> _irq;
<> 128:9bcdf88f62b0 264 event_callback_t _callback;
<> 128:9bcdf88f62b0 265 DMAUsage _usage;
<> 128:9bcdf88f62b0 266 #endif
<> 128:9bcdf88f62b0 267
<> 128:9bcdf88f62b0 268 void aquire(void);
<> 128:9bcdf88f62b0 269 static SPI *_owner;
<> 128:9bcdf88f62b0 270 static SingletonPtr<PlatformMutex> _mutex;
<> 128:9bcdf88f62b0 271 int _bits;
<> 128:9bcdf88f62b0 272 int _mode;
<> 128:9bcdf88f62b0 273 int _hz;
Kojto 147:a97add6d7e64 274
Kojto 147:a97add6d7e64 275 private:
Kojto 147:a97add6d7e64 276 /* Private acquire function without locking/unlocking
Kojto 147:a97add6d7e64 277 * Implemented in order to avoid duplicate locking and boost performance
Kojto 147:a97add6d7e64 278 */
Kojto 147:a97add6d7e64 279 void _acquire(void);
<> 128:9bcdf88f62b0 280 };
<> 128:9bcdf88f62b0 281
<> 128:9bcdf88f62b0 282 } // namespace mbed
<> 128:9bcdf88f62b0 283
<> 128:9bcdf88f62b0 284 #endif
<> 128:9bcdf88f62b0 285
<> 128:9bcdf88f62b0 286 #endif