The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
Kojto
Date:
Wed Jul 19 16:46:19 2017 +0100
Revision:
147:a97add6d7e64
Parent:
93:e188a91d3eaa
Release 147 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 76:824293ae5e43 1 /* mbed Microcontroller Library
bogdanm 76:824293ae5e43 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 76:824293ae5e43 3 *
bogdanm 76:824293ae5e43 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 76:824293ae5e43 5 * you may not use this file except in compliance with the License.
bogdanm 76:824293ae5e43 6 * You may obtain a copy of the License at
bogdanm 76:824293ae5e43 7 *
bogdanm 76:824293ae5e43 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 76:824293ae5e43 9 *
bogdanm 76:824293ae5e43 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 76:824293ae5e43 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 76:824293ae5e43 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 76:824293ae5e43 13 * See the License for the specific language governing permissions and
bogdanm 76:824293ae5e43 14 * limitations under the License.
bogdanm 76:824293ae5e43 15 */
bogdanm 76:824293ae5e43 16 #ifndef MBED_CLK_FREQS_H
bogdanm 76:824293ae5e43 17 #define MBED_CLK_FREQS_H
bogdanm 76:824293ae5e43 18
bogdanm 76:824293ae5e43 19 #ifdef __cplusplus
bogdanm 76:824293ae5e43 20 extern "C" {
bogdanm 76:824293ae5e43 21 #endif
bogdanm 76:824293ae5e43 22
emilmont 77:869cf507173a 23 #include "PeripheralPins.h"
emilmont 77:869cf507173a 24
bogdanm 76:824293ae5e43 25 //Get the peripheral bus clock frequency
bogdanm 76:824293ae5e43 26 static inline uint32_t bus_frequency(void) {
Kojto 90:cb3d968589d8 27 return (SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1));
Kojto 90:cb3d968589d8 28 }
Kojto 90:cb3d968589d8 29
Kojto 90:cb3d968589d8 30 #if defined(TARGET_KL43Z)
Kojto 90:cb3d968589d8 31
Kojto 90:cb3d968589d8 32 static inline uint32_t extosc_frequency(void) {
Kojto 90:cb3d968589d8 33 return CPU_XTAL_CLK_HZ;
bogdanm 76:824293ae5e43 34 }
bogdanm 76:824293ae5e43 35
Kojto 93:e188a91d3eaa 36 static inline uint32_t fastirc_frequency(void) {
Kojto 93:e188a91d3eaa 37 return CPU_INT_FAST_CLK_HZ;
Kojto 93:e188a91d3eaa 38 }
Kojto 93:e188a91d3eaa 39
Kojto 90:cb3d968589d8 40 static inline uint32_t mcgirc_frequency(void) {
Kojto 90:cb3d968589d8 41 uint32_t mcgirc_clock = 0;
Kojto 90:cb3d968589d8 42
Kojto 90:cb3d968589d8 43 if (MCG->C1 & MCG_C1_IREFSTEN_MASK) {
Kojto 90:cb3d968589d8 44 mcgirc_clock = (MCG->C2 & MCG_C2_IRCS_MASK) ? 8000000u : 2000000u;
Kojto 90:cb3d968589d8 45 mcgirc_clock /= 1u + ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT);
Kojto 90:cb3d968589d8 46 mcgirc_clock /= 1u + (MCG->MC & MCG_MC_LIRC_DIV2_MASK);
Kojto 90:cb3d968589d8 47 }
Kojto 90:cb3d968589d8 48
Kojto 90:cb3d968589d8 49 return mcgirc_clock;
Kojto 90:cb3d968589d8 50 }
Kojto 90:cb3d968589d8 51
Kojto 90:cb3d968589d8 52 #else
Kojto 90:cb3d968589d8 53
bogdanm 76:824293ae5e43 54 //Get external oscillator (crystal) frequency
bogdanm 76:824293ae5e43 55 static uint32_t extosc_frequency(void) {
bogdanm 76:824293ae5e43 56 uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
bogdanm 76:824293ae5e43 57
bogdanm 76:824293ae5e43 58 if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(2)) //MCG clock = external reference clock
bogdanm 76:824293ae5e43 59 return MCGClock;
Kojto 93:e188a91d3eaa 60
emilmont 77:869cf507173a 61 uint32_t divider, multiplier;
Kojto 90:cb3d968589d8 62 #ifdef MCG_C5_PLLCLKEN0_MASK //PLL available
bogdanm 76:824293ae5e43 63 if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0)) { //PLL/FLL is selected
bogdanm 76:824293ae5e43 64 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected
emilmont 77:869cf507173a 65 #endif
bogdanm 76:824293ae5e43 66 if ((MCG->S & MCG_S_IREFST_MASK) == 0x0u) { //FLL uses external reference
bogdanm 76:824293ae5e43 67 divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT));
bogdanm 76:824293ae5e43 68 if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u)
bogdanm 76:824293ae5e43 69 divider <<= 5u;
bogdanm 76:824293ae5e43 70 /* Select correct multiplier to calculate the MCG output clock */
bogdanm 76:824293ae5e43 71 switch (MCG->C4 & (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) {
bogdanm 76:824293ae5e43 72 case 0x0u:
bogdanm 76:824293ae5e43 73 multiplier = 640u;
bogdanm 76:824293ae5e43 74 break;
bogdanm 76:824293ae5e43 75 case 0x20u:
bogdanm 76:824293ae5e43 76 multiplier = 1280u;
bogdanm 76:824293ae5e43 77 break;
bogdanm 76:824293ae5e43 78 case 0x40u:
bogdanm 76:824293ae5e43 79 multiplier = 1920u;
bogdanm 76:824293ae5e43 80 break;
bogdanm 76:824293ae5e43 81 case 0x60u:
bogdanm 76:824293ae5e43 82 multiplier = 2560u;
bogdanm 76:824293ae5e43 83 break;
bogdanm 76:824293ae5e43 84 case 0x80u:
bogdanm 76:824293ae5e43 85 multiplier = 732u;
bogdanm 76:824293ae5e43 86 break;
bogdanm 76:824293ae5e43 87 case 0xA0u:
bogdanm 76:824293ae5e43 88 multiplier = 1464u;
bogdanm 76:824293ae5e43 89 break;
bogdanm 76:824293ae5e43 90 case 0xC0u:
bogdanm 76:824293ae5e43 91 multiplier = 2197u;
bogdanm 76:824293ae5e43 92 break;
bogdanm 76:824293ae5e43 93 case 0xE0u:
bogdanm 76:824293ae5e43 94 default:
bogdanm 76:824293ae5e43 95 multiplier = 2929u;
bogdanm 76:824293ae5e43 96 break;
bogdanm 76:824293ae5e43 97 }
Kojto 93:e188a91d3eaa 98
bogdanm 76:824293ae5e43 99 return MCGClock * divider / multiplier;
bogdanm 76:824293ae5e43 100 }
emilmont 77:869cf507173a 101 #ifdef MCG_C5_PLLCLKEN0_MASK
bogdanm 76:824293ae5e43 102 } else { //PLL is selected
bogdanm 76:824293ae5e43 103 divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
Kojto 93:e188a91d3eaa 104 multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u);
Kojto 93:e188a91d3eaa 105 return MCGClock * divider / multiplier;
bogdanm 76:824293ae5e43 106 }
bogdanm 76:824293ae5e43 107 }
emilmont 77:869cf507173a 108 #endif
Kojto 93:e188a91d3eaa 109
bogdanm 76:824293ae5e43 110 //In all other cases either there is no crystal or we cannot determine it
bogdanm 76:824293ae5e43 111 //For example when the FLL is running on the internal reference, and there is also an
bogdanm 76:824293ae5e43 112 //external crystal. However these are unlikely situations
bogdanm 76:824293ae5e43 113 return 0;
bogdanm 76:824293ae5e43 114 }
bogdanm 76:824293ae5e43 115
emilmont 77:869cf507173a 116 //Get MCG PLL/2 or FLL frequency, depending on which one is active, sets PLLFLLSEL bit
Kojto 93:e188a91d3eaa 117 static uint32_t mcgpllfll_frequency(void) {
emilmont 77:869cf507173a 118 if ((MCG->C1 & MCG_C1_CLKS_MASK) != MCG_C1_CLKS(0)) //PLL/FLL is not selected
emilmont 77:869cf507173a 119 return 0;
Kojto 93:e188a91d3eaa 120
emilmont 77:869cf507173a 121 uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
emilmont 77:869cf507173a 122 #ifdef MCG_C5_PLLCLKEN0_MASK
emilmont 77:869cf507173a 123 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected
emilmont 77:869cf507173a 124 SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; //MCG peripheral clock is FLL output
emilmont 77:869cf507173a 125 #endif
emilmont 77:869cf507173a 126 return MCGClock;
emilmont 77:869cf507173a 127 #ifdef MCG_C5_PLLCLKEN0_MASK
emilmont 77:869cf507173a 128 } else { //PLL is selected
emilmont 77:869cf507173a 129 SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; //MCG peripheral clock is PLL output
emilmont 77:869cf507173a 130 return (MCGClock >> 1);
emilmont 77:869cf507173a 131 }
emilmont 77:869cf507173a 132 #endif
Kojto 93:e188a91d3eaa 133
Kojto 93:e188a91d3eaa 134 //It is possible the SystemCoreClock isn't running on the PLL, and the PLL is still active
emilmont 77:869cf507173a 135 //for the peripherals, this is however an unlikely setup
emilmont 77:869cf507173a 136 }
bogdanm 76:824293ae5e43 137
Kojto 90:cb3d968589d8 138 #endif
Kojto 90:cb3d968589d8 139
bogdanm 76:824293ae5e43 140 #ifdef __cplusplus
bogdanm 76:824293ae5e43 141 }
bogdanm 76:824293ae5e43 142 #endif
bogdanm 76:824293ae5e43 143
bogdanm 76:824293ae5e43 144 #endif