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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_DISCO_F413ZH/cmsis_armclang.h@147:a97add6d7e64, 2017-07-19 (annotated)

Committer:
Kojto
Date:
Wed Jul 19 16:46:19 2017 +0100
Revision:
147:a97add6d7e64
Parent:
146:22da6e220af6
Child:
160:5571c4ff569f
Release 147 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 146:22da6e220af6 1 /**************************************************************************//**
AnnaBridge 146:22da6e220af6 2 * @file cmsis_armclang.h
AnnaBridge 146:22da6e220af6 3 * @brief CMSIS compiler ARMCLANG (ARM compiler V6) header file
AnnaBridge 146:22da6e220af6 4 * @version V5.0.3
AnnaBridge 146:22da6e220af6 5 * @date 27. March 2017
AnnaBridge 146:22da6e220af6 6 ******************************************************************************/
AnnaBridge 146:22da6e220af6 7 /*
AnnaBridge 146:22da6e220af6 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge 146:22da6e220af6 9 *
AnnaBridge 146:22da6e220af6 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 146:22da6e220af6 11 *
AnnaBridge 146:22da6e220af6 12 * Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge 146:22da6e220af6 13 * not use this file except in compliance with the License.
AnnaBridge 146:22da6e220af6 14 * You may obtain a copy of the License at
AnnaBridge 146:22da6e220af6 15 *
AnnaBridge 146:22da6e220af6 16 * www.apache.org/licenses/LICENSE-2.0
AnnaBridge 146:22da6e220af6 17 *
AnnaBridge 146:22da6e220af6 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 146:22da6e220af6 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge 146:22da6e220af6 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 146:22da6e220af6 21 * See the License for the specific language governing permissions and
AnnaBridge 146:22da6e220af6 22 * limitations under the License.
AnnaBridge 146:22da6e220af6 23 */
AnnaBridge 146:22da6e220af6 24
AnnaBridge 146:22da6e220af6 25 //lint -esym(9058, IRQn) disable MISRA 2012 Rule 2.4 for IRQn
AnnaBridge 146:22da6e220af6 26
AnnaBridge 146:22da6e220af6 27 #ifndef __CMSIS_ARMCLANG_H
AnnaBridge 146:22da6e220af6 28 #define __CMSIS_ARMCLANG_H
AnnaBridge 146:22da6e220af6 29
AnnaBridge 146:22da6e220af6 30 #ifndef __ARM_COMPAT_H
AnnaBridge 146:22da6e220af6 31 #include <arm_compat.h> /* Compatibility header for ARM Compiler 5 intrinsics */
AnnaBridge 146:22da6e220af6 32 #endif
AnnaBridge 146:22da6e220af6 33
AnnaBridge 146:22da6e220af6 34 /* CMSIS compiler specific defines */
AnnaBridge 146:22da6e220af6 35 #ifndef __ASM
AnnaBridge 146:22da6e220af6 36 #define __ASM __asm
AnnaBridge 146:22da6e220af6 37 #endif
AnnaBridge 146:22da6e220af6 38 #ifndef __INLINE
AnnaBridge 146:22da6e220af6 39 #define __INLINE __inline
AnnaBridge 146:22da6e220af6 40 #endif
AnnaBridge 146:22da6e220af6 41 #ifndef __STATIC_INLINE
AnnaBridge 146:22da6e220af6 42 #define __STATIC_INLINE static __inline
AnnaBridge 146:22da6e220af6 43 #endif
AnnaBridge 146:22da6e220af6 44 #ifndef __NO_RETURN
AnnaBridge 146:22da6e220af6 45 #define __NO_RETURN __attribute__((noreturn))
AnnaBridge 146:22da6e220af6 46 #endif
AnnaBridge 146:22da6e220af6 47 #ifndef __USED
AnnaBridge 146:22da6e220af6 48 #define __USED __attribute__((used))
AnnaBridge 146:22da6e220af6 49 #endif
AnnaBridge 146:22da6e220af6 50 #ifndef __WEAK
AnnaBridge 146:22da6e220af6 51 #define __WEAK __attribute__((weak))
AnnaBridge 146:22da6e220af6 52 #endif
AnnaBridge 146:22da6e220af6 53 #ifndef __PACKED
AnnaBridge 146:22da6e220af6 54 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 146:22da6e220af6 55 #endif
AnnaBridge 146:22da6e220af6 56 #ifndef __PACKED_STRUCT
AnnaBridge 146:22da6e220af6 57 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 146:22da6e220af6 58 #endif
AnnaBridge 146:22da6e220af6 59 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 146:22da6e220af6 60 #pragma clang diagnostic push
AnnaBridge 146:22da6e220af6 61 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 146:22da6e220af6 62 //lint -esym(9058, T_UINT32) disable MISRA 2012 Rule 2.4 for T_UINT32
AnnaBridge 146:22da6e220af6 63 struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge 146:22da6e220af6 64 #pragma clang diagnostic pop
AnnaBridge 146:22da6e220af6 65 #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge 146:22da6e220af6 66 #endif
AnnaBridge 146:22da6e220af6 67 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 146:22da6e220af6 68 #pragma clang diagnostic push
AnnaBridge 146:22da6e220af6 69 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 146:22da6e220af6 70 //lint -esym(9058, T_UINT16_WRITE) disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE
AnnaBridge 146:22da6e220af6 71 __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge 146:22da6e220af6 72 #pragma clang diagnostic pop
AnnaBridge 146:22da6e220af6 73 #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 146:22da6e220af6 74 #endif
AnnaBridge 146:22da6e220af6 75 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 146:22da6e220af6 76 #pragma clang diagnostic push
AnnaBridge 146:22da6e220af6 77 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 146:22da6e220af6 78 //lint -esym(9058, T_UINT16_READ) disable MISRA 2012 Rule 2.4 for T_UINT16_READ
AnnaBridge 146:22da6e220af6 79 __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge 146:22da6e220af6 80 #pragma clang diagnostic pop
AnnaBridge 146:22da6e220af6 81 #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
AnnaBridge 146:22da6e220af6 82 #endif
AnnaBridge 146:22da6e220af6 83 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 146:22da6e220af6 84 #pragma clang diagnostic push
AnnaBridge 146:22da6e220af6 85 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 146:22da6e220af6 86 //lint -esym(9058, T_UINT32_WRITE) disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE
AnnaBridge 146:22da6e220af6 87 __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge 146:22da6e220af6 88 #pragma clang diagnostic pop
AnnaBridge 146:22da6e220af6 89 #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
AnnaBridge 146:22da6e220af6 90 #endif
AnnaBridge 146:22da6e220af6 91 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 146:22da6e220af6 92 #pragma clang diagnostic push
AnnaBridge 146:22da6e220af6 93 #pragma clang diagnostic ignored "-Wpacked"
AnnaBridge 146:22da6e220af6 94 __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge 146:22da6e220af6 95 #pragma clang diagnostic pop
AnnaBridge 146:22da6e220af6 96 #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
AnnaBridge 146:22da6e220af6 97 #endif
AnnaBridge 146:22da6e220af6 98 #ifndef __ALIGNED
AnnaBridge 146:22da6e220af6 99 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 146:22da6e220af6 100 #endif
AnnaBridge 146:22da6e220af6 101
AnnaBridge 146:22da6e220af6 102
AnnaBridge 146:22da6e220af6 103 /* ########################### Core Function Access ########################### */
AnnaBridge 146:22da6e220af6 104 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 146:22da6e220af6 105 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 146:22da6e220af6 106 @{
AnnaBridge 146:22da6e220af6 107 */
AnnaBridge 146:22da6e220af6 108
AnnaBridge 146:22da6e220af6 109 /**
AnnaBridge 146:22da6e220af6 110 \brief Enable IRQ Interrupts
AnnaBridge 146:22da6e220af6 111 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 146:22da6e220af6 112 Can only be executed in Privileged modes.
AnnaBridge 146:22da6e220af6 113 */
AnnaBridge 146:22da6e220af6 114 /* intrinsic void __enable_irq(); see arm_compat.h */
AnnaBridge 146:22da6e220af6 115
AnnaBridge 146:22da6e220af6 116
AnnaBridge 146:22da6e220af6 117 /**
AnnaBridge 146:22da6e220af6 118 \brief Disable IRQ Interrupts
AnnaBridge 146:22da6e220af6 119 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 146:22da6e220af6 120 Can only be executed in Privileged modes.
AnnaBridge 146:22da6e220af6 121 */
AnnaBridge 146:22da6e220af6 122 /* intrinsic void __disable_irq(); see arm_compat.h */
AnnaBridge 146:22da6e220af6 123
AnnaBridge 146:22da6e220af6 124
AnnaBridge 146:22da6e220af6 125 /**
AnnaBridge 146:22da6e220af6 126 \brief Get Control Register
AnnaBridge 146:22da6e220af6 127 \details Returns the content of the Control Register.
AnnaBridge 146:22da6e220af6 128 \return Control Register value
AnnaBridge 146:22da6e220af6 129 */
AnnaBridge 146:22da6e220af6 130 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 146:22da6e220af6 131 {
AnnaBridge 146:22da6e220af6 132 uint32_t result;
AnnaBridge 146:22da6e220af6 133
AnnaBridge 146:22da6e220af6 134 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 146:22da6e220af6 135 return(result);
AnnaBridge 146:22da6e220af6 136 }
AnnaBridge 146:22da6e220af6 137
AnnaBridge 146:22da6e220af6 138
AnnaBridge 146:22da6e220af6 139 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 140 /**
AnnaBridge 146:22da6e220af6 141 \brief Get Control Register (non-secure)
AnnaBridge 146:22da6e220af6 142 \details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge 146:22da6e220af6 143 \return non-secure Control Register value
AnnaBridge 146:22da6e220af6 144 */
AnnaBridge 146:22da6e220af6 145 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 146:22da6e220af6 146 {
AnnaBridge 146:22da6e220af6 147 uint32_t result;
AnnaBridge 146:22da6e220af6 148
AnnaBridge 146:22da6e220af6 149 __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge 146:22da6e220af6 150 return(result);
AnnaBridge 146:22da6e220af6 151 }
AnnaBridge 146:22da6e220af6 152 #endif
AnnaBridge 146:22da6e220af6 153
AnnaBridge 146:22da6e220af6 154
AnnaBridge 146:22da6e220af6 155 /**
AnnaBridge 146:22da6e220af6 156 \brief Set Control Register
AnnaBridge 146:22da6e220af6 157 \details Writes the given value to the Control Register.
AnnaBridge 146:22da6e220af6 158 \param [in] control Control Register value to set
AnnaBridge 146:22da6e220af6 159 */
AnnaBridge 146:22da6e220af6 160 __attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 146:22da6e220af6 161 {
AnnaBridge 146:22da6e220af6 162 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 146:22da6e220af6 163 }
AnnaBridge 146:22da6e220af6 164
AnnaBridge 146:22da6e220af6 165
AnnaBridge 146:22da6e220af6 166 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 167 /**
AnnaBridge 146:22da6e220af6 168 \brief Set Control Register (non-secure)
AnnaBridge 146:22da6e220af6 169 \details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge 146:22da6e220af6 170 \param [in] control Control Register value to set
AnnaBridge 146:22da6e220af6 171 */
AnnaBridge 146:22da6e220af6 172 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge 146:22da6e220af6 173 {
AnnaBridge 146:22da6e220af6 174 __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge 146:22da6e220af6 175 }
AnnaBridge 146:22da6e220af6 176 #endif
AnnaBridge 146:22da6e220af6 177
AnnaBridge 146:22da6e220af6 178
AnnaBridge 146:22da6e220af6 179 /**
AnnaBridge 146:22da6e220af6 180 \brief Get IPSR Register
AnnaBridge 146:22da6e220af6 181 \details Returns the content of the IPSR Register.
AnnaBridge 146:22da6e220af6 182 \return IPSR Register value
AnnaBridge 146:22da6e220af6 183 */
AnnaBridge 146:22da6e220af6 184 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 146:22da6e220af6 185 {
AnnaBridge 146:22da6e220af6 186 uint32_t result;
AnnaBridge 146:22da6e220af6 187
AnnaBridge 146:22da6e220af6 188 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 146:22da6e220af6 189 return(result);
AnnaBridge 146:22da6e220af6 190 }
AnnaBridge 146:22da6e220af6 191
AnnaBridge 146:22da6e220af6 192
AnnaBridge 146:22da6e220af6 193 /**
AnnaBridge 146:22da6e220af6 194 \brief Get APSR Register
AnnaBridge 146:22da6e220af6 195 \details Returns the content of the APSR Register.
AnnaBridge 146:22da6e220af6 196 \return APSR Register value
AnnaBridge 146:22da6e220af6 197 */
AnnaBridge 146:22da6e220af6 198 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 146:22da6e220af6 199 {
AnnaBridge 146:22da6e220af6 200 uint32_t result;
AnnaBridge 146:22da6e220af6 201
AnnaBridge 146:22da6e220af6 202 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 146:22da6e220af6 203 return(result);
AnnaBridge 146:22da6e220af6 204 }
AnnaBridge 146:22da6e220af6 205
AnnaBridge 146:22da6e220af6 206
AnnaBridge 146:22da6e220af6 207 /**
AnnaBridge 146:22da6e220af6 208 \brief Get xPSR Register
AnnaBridge 146:22da6e220af6 209 \details Returns the content of the xPSR Register.
AnnaBridge 146:22da6e220af6 210 \return xPSR Register value
AnnaBridge 146:22da6e220af6 211 */
AnnaBridge 146:22da6e220af6 212 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 146:22da6e220af6 213 {
AnnaBridge 146:22da6e220af6 214 uint32_t result;
AnnaBridge 146:22da6e220af6 215
AnnaBridge 146:22da6e220af6 216 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 146:22da6e220af6 217 return(result);
AnnaBridge 146:22da6e220af6 218 }
AnnaBridge 146:22da6e220af6 219
AnnaBridge 146:22da6e220af6 220
AnnaBridge 146:22da6e220af6 221 /**
AnnaBridge 146:22da6e220af6 222 \brief Get Process Stack Pointer
AnnaBridge 146:22da6e220af6 223 \details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 146:22da6e220af6 224 \return PSP Register value
AnnaBridge 146:22da6e220af6 225 */
AnnaBridge 146:22da6e220af6 226 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 146:22da6e220af6 227 {
AnnaBridge 146:22da6e220af6 228 register uint32_t result;
AnnaBridge 146:22da6e220af6 229
AnnaBridge 146:22da6e220af6 230 __ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge 146:22da6e220af6 231 return(result);
AnnaBridge 146:22da6e220af6 232 }
AnnaBridge 146:22da6e220af6 233
AnnaBridge 146:22da6e220af6 234
AnnaBridge 146:22da6e220af6 235 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 236 /**
AnnaBridge 146:22da6e220af6 237 \brief Get Process Stack Pointer (non-secure)
AnnaBridge 146:22da6e220af6 238 \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 146:22da6e220af6 239 \return PSP Register value
AnnaBridge 146:22da6e220af6 240 */
AnnaBridge 146:22da6e220af6 241 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 146:22da6e220af6 242 {
AnnaBridge 146:22da6e220af6 243 register uint32_t result;
AnnaBridge 146:22da6e220af6 244
AnnaBridge 146:22da6e220af6 245 __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge 146:22da6e220af6 246 return(result);
AnnaBridge 146:22da6e220af6 247 }
AnnaBridge 146:22da6e220af6 248 #endif
AnnaBridge 146:22da6e220af6 249
AnnaBridge 146:22da6e220af6 250
AnnaBridge 146:22da6e220af6 251 /**
AnnaBridge 146:22da6e220af6 252 \brief Set Process Stack Pointer
AnnaBridge 146:22da6e220af6 253 \details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 146:22da6e220af6 254 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 146:22da6e220af6 255 */
AnnaBridge 146:22da6e220af6 256 __attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 146:22da6e220af6 257 {
AnnaBridge 146:22da6e220af6 258 __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge 146:22da6e220af6 259 }
AnnaBridge 146:22da6e220af6 260
AnnaBridge 146:22da6e220af6 261
AnnaBridge 146:22da6e220af6 262 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 263 /**
AnnaBridge 146:22da6e220af6 264 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 146:22da6e220af6 265 \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge 146:22da6e220af6 266 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 146:22da6e220af6 267 */
AnnaBridge 146:22da6e220af6 268 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge 146:22da6e220af6 269 {
AnnaBridge 146:22da6e220af6 270 __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge 146:22da6e220af6 271 }
AnnaBridge 146:22da6e220af6 272 #endif
AnnaBridge 146:22da6e220af6 273
AnnaBridge 146:22da6e220af6 274
AnnaBridge 146:22da6e220af6 275 /**
AnnaBridge 146:22da6e220af6 276 \brief Get Main Stack Pointer
AnnaBridge 146:22da6e220af6 277 \details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 146:22da6e220af6 278 \return MSP Register value
AnnaBridge 146:22da6e220af6 279 */
AnnaBridge 146:22da6e220af6 280 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 146:22da6e220af6 281 {
AnnaBridge 146:22da6e220af6 282 register uint32_t result;
AnnaBridge 146:22da6e220af6 283
AnnaBridge 146:22da6e220af6 284 __ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge 146:22da6e220af6 285 return(result);
AnnaBridge 146:22da6e220af6 286 }
AnnaBridge 146:22da6e220af6 287
AnnaBridge 146:22da6e220af6 288
AnnaBridge 146:22da6e220af6 289 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 290 /**
AnnaBridge 146:22da6e220af6 291 \brief Get Main Stack Pointer (non-secure)
AnnaBridge 146:22da6e220af6 292 \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 146:22da6e220af6 293 \return MSP Register value
AnnaBridge 146:22da6e220af6 294 */
AnnaBridge 146:22da6e220af6 295 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 146:22da6e220af6 296 {
AnnaBridge 146:22da6e220af6 297 register uint32_t result;
AnnaBridge 146:22da6e220af6 298
AnnaBridge 146:22da6e220af6 299 __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge 146:22da6e220af6 300 return(result);
AnnaBridge 146:22da6e220af6 301 }
AnnaBridge 146:22da6e220af6 302 #endif
AnnaBridge 146:22da6e220af6 303
AnnaBridge 146:22da6e220af6 304
AnnaBridge 146:22da6e220af6 305 /**
AnnaBridge 146:22da6e220af6 306 \brief Set Main Stack Pointer
AnnaBridge 146:22da6e220af6 307 \details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 146:22da6e220af6 308 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 146:22da6e220af6 309 */
AnnaBridge 146:22da6e220af6 310 __attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 146:22da6e220af6 311 {
AnnaBridge 146:22da6e220af6 312 __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge 146:22da6e220af6 313 }
AnnaBridge 146:22da6e220af6 314
AnnaBridge 146:22da6e220af6 315
AnnaBridge 146:22da6e220af6 316 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 317 /**
AnnaBridge 146:22da6e220af6 318 \brief Set Main Stack Pointer (non-secure)
AnnaBridge 146:22da6e220af6 319 \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge 146:22da6e220af6 320 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 146:22da6e220af6 321 */
AnnaBridge 146:22da6e220af6 322 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge 146:22da6e220af6 323 {
AnnaBridge 146:22da6e220af6 324 __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge 146:22da6e220af6 325 }
AnnaBridge 146:22da6e220af6 326 #endif
AnnaBridge 146:22da6e220af6 327
AnnaBridge 146:22da6e220af6 328
AnnaBridge 146:22da6e220af6 329 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 330 /**
AnnaBridge 146:22da6e220af6 331 \brief Get Stack Pointer (non-secure)
AnnaBridge 146:22da6e220af6 332 \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 146:22da6e220af6 333 \return SP Register value
AnnaBridge 146:22da6e220af6 334 */
AnnaBridge 146:22da6e220af6 335 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge 146:22da6e220af6 336 {
AnnaBridge 146:22da6e220af6 337 register uint32_t result;
AnnaBridge 146:22da6e220af6 338
AnnaBridge 146:22da6e220af6 339 __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge 146:22da6e220af6 340 return(result);
AnnaBridge 146:22da6e220af6 341 }
AnnaBridge 146:22da6e220af6 342
AnnaBridge 146:22da6e220af6 343
AnnaBridge 146:22da6e220af6 344 /**
AnnaBridge 146:22da6e220af6 345 \brief Set Stack Pointer (non-secure)
AnnaBridge 146:22da6e220af6 346 \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge 146:22da6e220af6 347 \param [in] topOfStack Stack Pointer value to set
AnnaBridge 146:22da6e220af6 348 */
AnnaBridge 146:22da6e220af6 349 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge 146:22da6e220af6 350 {
AnnaBridge 146:22da6e220af6 351 __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge 146:22da6e220af6 352 }
AnnaBridge 146:22da6e220af6 353 #endif
AnnaBridge 146:22da6e220af6 354
AnnaBridge 146:22da6e220af6 355
AnnaBridge 146:22da6e220af6 356 /**
AnnaBridge 146:22da6e220af6 357 \brief Get Priority Mask
AnnaBridge 146:22da6e220af6 358 \details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 146:22da6e220af6 359 \return Priority Mask value
AnnaBridge 146:22da6e220af6 360 */
AnnaBridge 146:22da6e220af6 361 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 146:22da6e220af6 362 {
AnnaBridge 146:22da6e220af6 363 uint32_t result;
AnnaBridge 146:22da6e220af6 364
AnnaBridge 146:22da6e220af6 365 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 146:22da6e220af6 366 return(result);
AnnaBridge 146:22da6e220af6 367 }
AnnaBridge 146:22da6e220af6 368
AnnaBridge 146:22da6e220af6 369
AnnaBridge 146:22da6e220af6 370 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 371 /**
AnnaBridge 146:22da6e220af6 372 \brief Get Priority Mask (non-secure)
AnnaBridge 146:22da6e220af6 373 \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge 146:22da6e220af6 374 \return Priority Mask value
AnnaBridge 146:22da6e220af6 375 */
AnnaBridge 146:22da6e220af6 376 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 146:22da6e220af6 377 {
AnnaBridge 146:22da6e220af6 378 uint32_t result;
AnnaBridge 146:22da6e220af6 379
AnnaBridge 146:22da6e220af6 380 __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge 146:22da6e220af6 381 return(result);
AnnaBridge 146:22da6e220af6 382 }
AnnaBridge 146:22da6e220af6 383 #endif
AnnaBridge 146:22da6e220af6 384
AnnaBridge 146:22da6e220af6 385
AnnaBridge 146:22da6e220af6 386 /**
AnnaBridge 146:22da6e220af6 387 \brief Set Priority Mask
AnnaBridge 146:22da6e220af6 388 \details Assigns the given value to the Priority Mask Register.
AnnaBridge 146:22da6e220af6 389 \param [in] priMask Priority Mask
AnnaBridge 146:22da6e220af6 390 */
AnnaBridge 146:22da6e220af6 391 __attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 146:22da6e220af6 392 {
AnnaBridge 146:22da6e220af6 393 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 146:22da6e220af6 394 }
AnnaBridge 146:22da6e220af6 395
AnnaBridge 146:22da6e220af6 396
AnnaBridge 146:22da6e220af6 397 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 398 /**
AnnaBridge 146:22da6e220af6 399 \brief Set Priority Mask (non-secure)
AnnaBridge 146:22da6e220af6 400 \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge 146:22da6e220af6 401 \param [in] priMask Priority Mask
AnnaBridge 146:22da6e220af6 402 */
AnnaBridge 146:22da6e220af6 403 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge 146:22da6e220af6 404 {
AnnaBridge 146:22da6e220af6 405 __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge 146:22da6e220af6 406 }
AnnaBridge 146:22da6e220af6 407 #endif
AnnaBridge 146:22da6e220af6 408
AnnaBridge 146:22da6e220af6 409
AnnaBridge 146:22da6e220af6 410 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 146:22da6e220af6 411 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 146:22da6e220af6 412 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 146:22da6e220af6 413 /**
AnnaBridge 146:22da6e220af6 414 \brief Enable FIQ
AnnaBridge 146:22da6e220af6 415 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 146:22da6e220af6 416 Can only be executed in Privileged modes.
AnnaBridge 146:22da6e220af6 417 */
AnnaBridge 146:22da6e220af6 418 #define __enable_fault_irq __enable_fiq /* see arm_compat.h */
AnnaBridge 146:22da6e220af6 419
AnnaBridge 146:22da6e220af6 420
AnnaBridge 146:22da6e220af6 421 /**
AnnaBridge 146:22da6e220af6 422 \brief Disable FIQ
AnnaBridge 146:22da6e220af6 423 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 146:22da6e220af6 424 Can only be executed in Privileged modes.
AnnaBridge 146:22da6e220af6 425 */
AnnaBridge 146:22da6e220af6 426 #define __disable_fault_irq __disable_fiq /* see arm_compat.h */
AnnaBridge 146:22da6e220af6 427
AnnaBridge 146:22da6e220af6 428
AnnaBridge 146:22da6e220af6 429 /**
AnnaBridge 146:22da6e220af6 430 \brief Get Base Priority
AnnaBridge 146:22da6e220af6 431 \details Returns the current value of the Base Priority register.
AnnaBridge 146:22da6e220af6 432 \return Base Priority register value
AnnaBridge 146:22da6e220af6 433 */
AnnaBridge 146:22da6e220af6 434 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 146:22da6e220af6 435 {
AnnaBridge 146:22da6e220af6 436 uint32_t result;
AnnaBridge 146:22da6e220af6 437
AnnaBridge 146:22da6e220af6 438 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 146:22da6e220af6 439 return(result);
AnnaBridge 146:22da6e220af6 440 }
AnnaBridge 146:22da6e220af6 441
AnnaBridge 146:22da6e220af6 442
AnnaBridge 146:22da6e220af6 443 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 444 /**
AnnaBridge 146:22da6e220af6 445 \brief Get Base Priority (non-secure)
AnnaBridge 146:22da6e220af6 446 \details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge 146:22da6e220af6 447 \return Base Priority register value
AnnaBridge 146:22da6e220af6 448 */
AnnaBridge 146:22da6e220af6 449 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 146:22da6e220af6 450 {
AnnaBridge 146:22da6e220af6 451 uint32_t result;
AnnaBridge 146:22da6e220af6 452
AnnaBridge 146:22da6e220af6 453 __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge 146:22da6e220af6 454 return(result);
AnnaBridge 146:22da6e220af6 455 }
AnnaBridge 146:22da6e220af6 456 #endif
AnnaBridge 146:22da6e220af6 457
AnnaBridge 146:22da6e220af6 458
AnnaBridge 146:22da6e220af6 459 /**
AnnaBridge 146:22da6e220af6 460 \brief Set Base Priority
AnnaBridge 146:22da6e220af6 461 \details Assigns the given value to the Base Priority register.
AnnaBridge 146:22da6e220af6 462 \param [in] basePri Base Priority value to set
AnnaBridge 146:22da6e220af6 463 */
AnnaBridge 146:22da6e220af6 464 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 146:22da6e220af6 465 {
AnnaBridge 146:22da6e220af6 466 __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge 146:22da6e220af6 467 }
AnnaBridge 146:22da6e220af6 468
AnnaBridge 146:22da6e220af6 469
AnnaBridge 146:22da6e220af6 470 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 471 /**
AnnaBridge 146:22da6e220af6 472 \brief Set Base Priority (non-secure)
AnnaBridge 146:22da6e220af6 473 \details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge 146:22da6e220af6 474 \param [in] basePri Base Priority value to set
AnnaBridge 146:22da6e220af6 475 */
AnnaBridge 146:22da6e220af6 476 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge 146:22da6e220af6 477 {
AnnaBridge 146:22da6e220af6 478 __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge 146:22da6e220af6 479 }
AnnaBridge 146:22da6e220af6 480 #endif
AnnaBridge 146:22da6e220af6 481
AnnaBridge 146:22da6e220af6 482
AnnaBridge 146:22da6e220af6 483 /**
AnnaBridge 146:22da6e220af6 484 \brief Set Base Priority with condition
AnnaBridge 146:22da6e220af6 485 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 146:22da6e220af6 486 or the new value increases the BASEPRI priority level.
AnnaBridge 146:22da6e220af6 487 \param [in] basePri Base Priority value to set
AnnaBridge 146:22da6e220af6 488 */
AnnaBridge 146:22da6e220af6 489 __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 146:22da6e220af6 490 {
AnnaBridge 146:22da6e220af6 491 __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge 146:22da6e220af6 492 }
AnnaBridge 146:22da6e220af6 493
AnnaBridge 146:22da6e220af6 494
AnnaBridge 146:22da6e220af6 495 /**
AnnaBridge 146:22da6e220af6 496 \brief Get Fault Mask
AnnaBridge 146:22da6e220af6 497 \details Returns the current value of the Fault Mask register.
AnnaBridge 146:22da6e220af6 498 \return Fault Mask register value
AnnaBridge 146:22da6e220af6 499 */
AnnaBridge 146:22da6e220af6 500 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 146:22da6e220af6 501 {
AnnaBridge 146:22da6e220af6 502 uint32_t result;
AnnaBridge 146:22da6e220af6 503
AnnaBridge 146:22da6e220af6 504 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 146:22da6e220af6 505 return(result);
AnnaBridge 146:22da6e220af6 506 }
AnnaBridge 146:22da6e220af6 507
AnnaBridge 146:22da6e220af6 508
AnnaBridge 146:22da6e220af6 509 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 510 /**
AnnaBridge 146:22da6e220af6 511 \brief Get Fault Mask (non-secure)
AnnaBridge 146:22da6e220af6 512 \details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge 146:22da6e220af6 513 \return Fault Mask register value
AnnaBridge 146:22da6e220af6 514 */
AnnaBridge 146:22da6e220af6 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 146:22da6e220af6 516 {
AnnaBridge 146:22da6e220af6 517 uint32_t result;
AnnaBridge 146:22da6e220af6 518
AnnaBridge 146:22da6e220af6 519 __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge 146:22da6e220af6 520 return(result);
AnnaBridge 146:22da6e220af6 521 }
AnnaBridge 146:22da6e220af6 522 #endif
AnnaBridge 146:22da6e220af6 523
AnnaBridge 146:22da6e220af6 524
AnnaBridge 146:22da6e220af6 525 /**
AnnaBridge 146:22da6e220af6 526 \brief Set Fault Mask
AnnaBridge 146:22da6e220af6 527 \details Assigns the given value to the Fault Mask register.
AnnaBridge 146:22da6e220af6 528 \param [in] faultMask Fault Mask value to set
AnnaBridge 146:22da6e220af6 529 */
AnnaBridge 146:22da6e220af6 530 __attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 146:22da6e220af6 531 {
AnnaBridge 146:22da6e220af6 532 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 146:22da6e220af6 533 }
AnnaBridge 146:22da6e220af6 534
AnnaBridge 146:22da6e220af6 535
AnnaBridge 146:22da6e220af6 536 #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge 146:22da6e220af6 537 /**
AnnaBridge 146:22da6e220af6 538 \brief Set Fault Mask (non-secure)
AnnaBridge 146:22da6e220af6 539 \details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge 146:22da6e220af6 540 \param [in] faultMask Fault Mask value to set
AnnaBridge 146:22da6e220af6 541 */
AnnaBridge 146:22da6e220af6 542 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge 146:22da6e220af6 543 {
AnnaBridge 146:22da6e220af6 544 __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge 146:22da6e220af6 545 }
AnnaBridge 146:22da6e220af6 546 #endif
AnnaBridge 146:22da6e220af6 547
AnnaBridge 146:22da6e220af6 548 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 146:22da6e220af6 549 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 146:22da6e220af6 550 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 146:22da6e220af6 551
AnnaBridge 146:22da6e220af6 552
AnnaBridge 146:22da6e220af6 553 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 146:22da6e220af6 554 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 146:22da6e220af6 555
AnnaBridge 146:22da6e220af6 556 /**
AnnaBridge 146:22da6e220af6 557 \brief Get Process Stack Pointer Limit
AnnaBridge 146:22da6e220af6 558 \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 146:22da6e220af6 559 \return PSPLIM Register value
AnnaBridge 146:22da6e220af6 560 */
AnnaBridge 146:22da6e220af6 561 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge 146:22da6e220af6 562 {
AnnaBridge 146:22da6e220af6 563 register uint32_t result;
AnnaBridge 146:22da6e220af6 564
AnnaBridge 146:22da6e220af6 565 __ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge 146:22da6e220af6 566 return(result);
AnnaBridge 146:22da6e220af6 567 }
AnnaBridge 146:22da6e220af6 568
AnnaBridge 146:22da6e220af6 569
AnnaBridge 146:22da6e220af6 570 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 146:22da6e220af6 571 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 146:22da6e220af6 572 /**
AnnaBridge 146:22da6e220af6 573 \brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge 146:22da6e220af6 574 \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 146:22da6e220af6 575 \return PSPLIM Register value
AnnaBridge 146:22da6e220af6 576 */
AnnaBridge 146:22da6e220af6 577 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 146:22da6e220af6 578 {
AnnaBridge 146:22da6e220af6 579 register uint32_t result;
AnnaBridge 146:22da6e220af6 580
AnnaBridge 146:22da6e220af6 581 __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge 146:22da6e220af6 582 return(result);
AnnaBridge 146:22da6e220af6 583 }
AnnaBridge 146:22da6e220af6 584 #endif
AnnaBridge 146:22da6e220af6 585
AnnaBridge 146:22da6e220af6 586
AnnaBridge 146:22da6e220af6 587 /**
AnnaBridge 146:22da6e220af6 588 \brief Set Process Stack Pointer Limit
AnnaBridge 146:22da6e220af6 589 \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge 146:22da6e220af6 590 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 146:22da6e220af6 591 */
AnnaBridge 146:22da6e220af6 592 __attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge 146:22da6e220af6 593 {
AnnaBridge 146:22da6e220af6 594 __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge 146:22da6e220af6 595 }
AnnaBridge 146:22da6e220af6 596
AnnaBridge 146:22da6e220af6 597
AnnaBridge 146:22da6e220af6 598 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 146:22da6e220af6 599 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 146:22da6e220af6 600 /**
AnnaBridge 146:22da6e220af6 601 \brief Set Process Stack Pointer (non-secure)
AnnaBridge 146:22da6e220af6 602 \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge 146:22da6e220af6 603 \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge 146:22da6e220af6 604 */
AnnaBridge 146:22da6e220af6 605 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge 146:22da6e220af6 606 {
AnnaBridge 146:22da6e220af6 607 __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge 146:22da6e220af6 608 }
AnnaBridge 146:22da6e220af6 609 #endif
AnnaBridge 146:22da6e220af6 610
AnnaBridge 146:22da6e220af6 611
AnnaBridge 146:22da6e220af6 612 /**
AnnaBridge 146:22da6e220af6 613 \brief Get Main Stack Pointer Limit
AnnaBridge 146:22da6e220af6 614 \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 146:22da6e220af6 615 \return MSPLIM Register value
AnnaBridge 146:22da6e220af6 616 */
AnnaBridge 146:22da6e220af6 617 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge 146:22da6e220af6 618 {
AnnaBridge 146:22da6e220af6 619 register uint32_t result;
AnnaBridge 146:22da6e220af6 620
AnnaBridge 146:22da6e220af6 621 __ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge 146:22da6e220af6 622
AnnaBridge 146:22da6e220af6 623 return(result);
AnnaBridge 146:22da6e220af6 624 }
AnnaBridge 146:22da6e220af6 625
AnnaBridge 146:22da6e220af6 626
AnnaBridge 146:22da6e220af6 627 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 146:22da6e220af6 628 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 146:22da6e220af6 629 /**
AnnaBridge 146:22da6e220af6 630 \brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge 146:22da6e220af6 631 \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge 146:22da6e220af6 632 \return MSPLIM Register value
AnnaBridge 146:22da6e220af6 633 */
AnnaBridge 146:22da6e220af6 634 __attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 146:22da6e220af6 635 {
AnnaBridge 146:22da6e220af6 636 register uint32_t result;
AnnaBridge 146:22da6e220af6 637
AnnaBridge 146:22da6e220af6 638 __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge 146:22da6e220af6 639 return(result);
AnnaBridge 146:22da6e220af6 640 }
AnnaBridge 146:22da6e220af6 641 #endif
AnnaBridge 146:22da6e220af6 642
AnnaBridge 146:22da6e220af6 643
AnnaBridge 146:22da6e220af6 644 /**
AnnaBridge 146:22da6e220af6 645 \brief Set Main Stack Pointer Limit
AnnaBridge 146:22da6e220af6 646 \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge 146:22da6e220af6 647 \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge 146:22da6e220af6 648 */
AnnaBridge 146:22da6e220af6 649 __attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge 146:22da6e220af6 650 {
AnnaBridge 146:22da6e220af6 651 __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 146:22da6e220af6 652 }
AnnaBridge 146:22da6e220af6 653
AnnaBridge 146:22da6e220af6 654
AnnaBridge 146:22da6e220af6 655 #if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge 146:22da6e220af6 656 (defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 146:22da6e220af6 657 /**
AnnaBridge 146:22da6e220af6 658 \brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge 146:22da6e220af6 659 \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge 146:22da6e220af6 660 \param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge 146:22da6e220af6 661 */
AnnaBridge 146:22da6e220af6 662 __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge 146:22da6e220af6 663 {
AnnaBridge 146:22da6e220af6 664 __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge 146:22da6e220af6 665 }
AnnaBridge 146:22da6e220af6 666 #endif
AnnaBridge 146:22da6e220af6 667
AnnaBridge 146:22da6e220af6 668 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 146:22da6e220af6 669 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 146:22da6e220af6 670
AnnaBridge 146:22da6e220af6 671
AnnaBridge 146:22da6e220af6 672 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 146:22da6e220af6 673 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 146:22da6e220af6 674
AnnaBridge 146:22da6e220af6 675 /**
AnnaBridge 146:22da6e220af6 676 \brief Get FPSCR
AnnaBridge 146:22da6e220af6 677 \details Returns the current value of the Floating Point Status/Control register.
AnnaBridge 146:22da6e220af6 678 \return Floating Point Status/Control register value
AnnaBridge 146:22da6e220af6 679 */
AnnaBridge 146:22da6e220af6 680 /* #define __get_FPSCR __builtin_arm_get_fpscr */
AnnaBridge 146:22da6e220af6 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
AnnaBridge 146:22da6e220af6 682 {
AnnaBridge 146:22da6e220af6 683 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 146:22da6e220af6 684 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 146:22da6e220af6 685 uint32_t result;
AnnaBridge 146:22da6e220af6 686
AnnaBridge 146:22da6e220af6 687 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge 146:22da6e220af6 688 return(result);
AnnaBridge 146:22da6e220af6 689 #else
AnnaBridge 146:22da6e220af6 690 return(0U);
AnnaBridge 146:22da6e220af6 691 #endif
AnnaBridge 146:22da6e220af6 692 }
AnnaBridge 146:22da6e220af6 693
AnnaBridge 146:22da6e220af6 694
AnnaBridge 146:22da6e220af6 695 /**
AnnaBridge 146:22da6e220af6 696 \brief Set FPSCR
AnnaBridge 146:22da6e220af6 697 \details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge 146:22da6e220af6 698 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 146:22da6e220af6 699 */
AnnaBridge 146:22da6e220af6 700 /* #define __set_FPSCR __builtin_arm_set_fpscr */
AnnaBridge 146:22da6e220af6 701 __attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge 146:22da6e220af6 702 {
AnnaBridge 146:22da6e220af6 703 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 146:22da6e220af6 704 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 146:22da6e220af6 705 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "memory");
AnnaBridge 146:22da6e220af6 706 #else
AnnaBridge 146:22da6e220af6 707 (void)fpscr;
AnnaBridge 146:22da6e220af6 708 #endif
AnnaBridge 146:22da6e220af6 709 }
AnnaBridge 146:22da6e220af6 710
AnnaBridge 146:22da6e220af6 711 #endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 146:22da6e220af6 712 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 146:22da6e220af6 713
AnnaBridge 146:22da6e220af6 714
AnnaBridge 146:22da6e220af6 715
AnnaBridge 146:22da6e220af6 716 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 146:22da6e220af6 717
AnnaBridge 146:22da6e220af6 718
AnnaBridge 146:22da6e220af6 719 /* ########################## Core Instruction Access ######################### */
AnnaBridge 146:22da6e220af6 720 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge 146:22da6e220af6 721 Access to dedicated instructions
AnnaBridge 146:22da6e220af6 722 @{
AnnaBridge 146:22da6e220af6 723 */
AnnaBridge 146:22da6e220af6 724
AnnaBridge 146:22da6e220af6 725 /* Define macros for porting to both thumb1 and thumb2.
AnnaBridge 146:22da6e220af6 726 * For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge 146:22da6e220af6 727 * Otherwise, use general registers, specified by constraint "r" */
AnnaBridge 146:22da6e220af6 728 #if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge 146:22da6e220af6 729 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge 146:22da6e220af6 730 #define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge 146:22da6e220af6 731 #else
AnnaBridge 146:22da6e220af6 732 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge 146:22da6e220af6 733 #define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge 146:22da6e220af6 734 #endif
AnnaBridge 146:22da6e220af6 735
AnnaBridge 146:22da6e220af6 736 /**
AnnaBridge 146:22da6e220af6 737 \brief No Operation
AnnaBridge 146:22da6e220af6 738 \details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge 146:22da6e220af6 739 */
AnnaBridge 146:22da6e220af6 740 #define __NOP __builtin_arm_nop
AnnaBridge 146:22da6e220af6 741
AnnaBridge 146:22da6e220af6 742 /**
AnnaBridge 146:22da6e220af6 743 \brief Wait For Interrupt
AnnaBridge 146:22da6e220af6 744 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge 146:22da6e220af6 745 */
AnnaBridge 146:22da6e220af6 746 #define __WFI __builtin_arm_wfi
AnnaBridge 146:22da6e220af6 747
AnnaBridge 146:22da6e220af6 748
AnnaBridge 146:22da6e220af6 749 /**
AnnaBridge 146:22da6e220af6 750 \brief Wait For Event
AnnaBridge 146:22da6e220af6 751 \details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge 146:22da6e220af6 752 a low-power state until one of a number of events occurs.
AnnaBridge 146:22da6e220af6 753 */
AnnaBridge 146:22da6e220af6 754 #define __WFE __builtin_arm_wfe
AnnaBridge 146:22da6e220af6 755
AnnaBridge 146:22da6e220af6 756
AnnaBridge 146:22da6e220af6 757 /**
AnnaBridge 146:22da6e220af6 758 \brief Send Event
AnnaBridge 146:22da6e220af6 759 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge 146:22da6e220af6 760 */
AnnaBridge 146:22da6e220af6 761 #define __SEV __builtin_arm_sev
AnnaBridge 146:22da6e220af6 762
AnnaBridge 146:22da6e220af6 763
AnnaBridge 146:22da6e220af6 764 /**
AnnaBridge 146:22da6e220af6 765 \brief Instruction Synchronization Barrier
AnnaBridge 146:22da6e220af6 766 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge 146:22da6e220af6 767 so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge 146:22da6e220af6 768 after the instruction has been completed.
AnnaBridge 146:22da6e220af6 769 */
AnnaBridge 146:22da6e220af6 770 #define __ISB() __builtin_arm_isb(0xF);
AnnaBridge 146:22da6e220af6 771
AnnaBridge 146:22da6e220af6 772 /**
AnnaBridge 146:22da6e220af6 773 \brief Data Synchronization Barrier
AnnaBridge 146:22da6e220af6 774 \details Acts as a special kind of Data Memory Barrier.
AnnaBridge 146:22da6e220af6 775 It completes when all explicit memory accesses before this instruction complete.
AnnaBridge 146:22da6e220af6 776 */
AnnaBridge 146:22da6e220af6 777 #define __DSB() __builtin_arm_dsb(0xF);
AnnaBridge 146:22da6e220af6 778
AnnaBridge 146:22da6e220af6 779
AnnaBridge 146:22da6e220af6 780 /**
AnnaBridge 146:22da6e220af6 781 \brief Data Memory Barrier
AnnaBridge 146:22da6e220af6 782 \details Ensures the apparent order of the explicit memory operations before
AnnaBridge 146:22da6e220af6 783 and after the instruction, without ensuring their completion.
AnnaBridge 146:22da6e220af6 784 */
AnnaBridge 146:22da6e220af6 785 #define __DMB() __builtin_arm_dmb(0xF);
AnnaBridge 146:22da6e220af6 786
AnnaBridge 146:22da6e220af6 787
AnnaBridge 146:22da6e220af6 788 /**
AnnaBridge 146:22da6e220af6 789 \brief Reverse byte order (32 bit)
AnnaBridge 146:22da6e220af6 790 \details Reverses the byte order in integer value.
AnnaBridge 146:22da6e220af6 791 \param [in] value Value to reverse
AnnaBridge 146:22da6e220af6 792 \return Reversed value
AnnaBridge 146:22da6e220af6 793 */
AnnaBridge 146:22da6e220af6 794 #define __REV __builtin_bswap32
AnnaBridge 146:22da6e220af6 795
AnnaBridge 146:22da6e220af6 796
AnnaBridge 146:22da6e220af6 797 /**
AnnaBridge 146:22da6e220af6 798 \brief Reverse byte order (16 bit)
AnnaBridge 146:22da6e220af6 799 \details Reverses the byte order in two unsigned short values.
AnnaBridge 146:22da6e220af6 800 \param [in] value Value to reverse
AnnaBridge 146:22da6e220af6 801 \return Reversed value
AnnaBridge 146:22da6e220af6 802 */
AnnaBridge 146:22da6e220af6 803 #define __REV16 __builtin_bswap16 /* ToDo ARMCLANG: check if __builtin_bswap16 could be used */
AnnaBridge 146:22da6e220af6 804 #if 0
AnnaBridge 146:22da6e220af6 805 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
AnnaBridge 146:22da6e220af6 806 {
AnnaBridge 146:22da6e220af6 807 uint32_t result;
AnnaBridge 146:22da6e220af6 808
AnnaBridge 146:22da6e220af6 809 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 146:22da6e220af6 810 return(result);
AnnaBridge 146:22da6e220af6 811 }
AnnaBridge 146:22da6e220af6 812 #endif
AnnaBridge 146:22da6e220af6 813
AnnaBridge 146:22da6e220af6 814
AnnaBridge 146:22da6e220af6 815 /**
AnnaBridge 146:22da6e220af6 816 \brief Reverse byte order in signed short value
AnnaBridge 146:22da6e220af6 817 \details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge 146:22da6e220af6 818 \param [in] value Value to reverse
AnnaBridge 146:22da6e220af6 819 \return Reversed value
AnnaBridge 146:22da6e220af6 820 */
AnnaBridge 146:22da6e220af6 821 /* ToDo ARMCLANG: check if __builtin_bswap16 could be used */
AnnaBridge 146:22da6e220af6 822 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
AnnaBridge 146:22da6e220af6 823 {
AnnaBridge 146:22da6e220af6 824 int32_t result;
AnnaBridge 146:22da6e220af6 825
AnnaBridge 146:22da6e220af6 826 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 146:22da6e220af6 827 return(result);
AnnaBridge 146:22da6e220af6 828 }
AnnaBridge 146:22da6e220af6 829
AnnaBridge 146:22da6e220af6 830
AnnaBridge 146:22da6e220af6 831 /**
AnnaBridge 146:22da6e220af6 832 \brief Rotate Right in unsigned value (32 bit)
AnnaBridge 146:22da6e220af6 833 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge 146:22da6e220af6 834 \param [in] op1 Value to rotate
AnnaBridge 146:22da6e220af6 835 \param [in] op2 Number of Bits to rotate
AnnaBridge 146:22da6e220af6 836 \return Rotated value
AnnaBridge 146:22da6e220af6 837 */
AnnaBridge 146:22da6e220af6 838 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 839 {
AnnaBridge 146:22da6e220af6 840 return (op1 >> op2) | (op1 << (32U - op2));
AnnaBridge 146:22da6e220af6 841 }
AnnaBridge 146:22da6e220af6 842
AnnaBridge 146:22da6e220af6 843
AnnaBridge 146:22da6e220af6 844 /**
AnnaBridge 146:22da6e220af6 845 \brief Breakpoint
AnnaBridge 146:22da6e220af6 846 \details Causes the processor to enter Debug state.
AnnaBridge 146:22da6e220af6 847 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge 146:22da6e220af6 848 \param [in] value is ignored by the processor.
AnnaBridge 146:22da6e220af6 849 If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge 146:22da6e220af6 850 */
AnnaBridge 146:22da6e220af6 851 #define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge 146:22da6e220af6 852
AnnaBridge 146:22da6e220af6 853
AnnaBridge 146:22da6e220af6 854 /**
AnnaBridge 146:22da6e220af6 855 \brief Reverse bit order of value
AnnaBridge 146:22da6e220af6 856 \details Reverses the bit order of the given value.
AnnaBridge 146:22da6e220af6 857 \param [in] value Value to reverse
AnnaBridge 146:22da6e220af6 858 \return Reversed value
AnnaBridge 146:22da6e220af6 859 */
AnnaBridge 146:22da6e220af6 860 /* ToDo ARMCLANG: check if __builtin_arm_rbit is supported */
AnnaBridge 146:22da6e220af6 861 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
AnnaBridge 146:22da6e220af6 862 {
AnnaBridge 146:22da6e220af6 863 uint32_t result;
AnnaBridge 146:22da6e220af6 864
AnnaBridge 146:22da6e220af6 865 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 146:22da6e220af6 866 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 146:22da6e220af6 867 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 146:22da6e220af6 868 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
AnnaBridge 146:22da6e220af6 869 #else
AnnaBridge 146:22da6e220af6 870 int32_t s = (4 /*sizeof(v)*/ * 8) - 1; /* extra shift needed at end */
AnnaBridge 146:22da6e220af6 871
AnnaBridge 146:22da6e220af6 872 result = value; /* r will be reversed bits of v; first get LSB of v */
AnnaBridge 146:22da6e220af6 873 for (value >>= 1U; value; value >>= 1U)
AnnaBridge 146:22da6e220af6 874 {
AnnaBridge 146:22da6e220af6 875 result <<= 1U;
AnnaBridge 146:22da6e220af6 876 result |= value & 1U;
AnnaBridge 146:22da6e220af6 877 s--;
AnnaBridge 146:22da6e220af6 878 }
AnnaBridge 146:22da6e220af6 879 result <<= s; /* shift when v's highest bits are zero */
AnnaBridge 146:22da6e220af6 880 #endif
AnnaBridge 146:22da6e220af6 881 return(result);
AnnaBridge 146:22da6e220af6 882 }
AnnaBridge 146:22da6e220af6 883
AnnaBridge 146:22da6e220af6 884
AnnaBridge 146:22da6e220af6 885 /**
AnnaBridge 146:22da6e220af6 886 \brief Count leading zeros
AnnaBridge 146:22da6e220af6 887 \details Counts the number of leading zeros of a data value.
AnnaBridge 146:22da6e220af6 888 \param [in] value Value to count the leading zeros
AnnaBridge 146:22da6e220af6 889 \return number of leading zeros in value
AnnaBridge 146:22da6e220af6 890 */
AnnaBridge 146:22da6e220af6 891 #define __CLZ __builtin_clz
AnnaBridge 146:22da6e220af6 892
AnnaBridge 146:22da6e220af6 893
AnnaBridge 146:22da6e220af6 894 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 146:22da6e220af6 895 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 146:22da6e220af6 896 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 146:22da6e220af6 897 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 146:22da6e220af6 898 /**
AnnaBridge 146:22da6e220af6 899 \brief LDR Exclusive (8 bit)
AnnaBridge 146:22da6e220af6 900 \details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge 146:22da6e220af6 901 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 902 \return value of type uint8_t at (*ptr)
AnnaBridge 146:22da6e220af6 903 */
AnnaBridge 146:22da6e220af6 904 #define __LDREXB (uint8_t)__builtin_arm_ldrex
AnnaBridge 146:22da6e220af6 905
AnnaBridge 146:22da6e220af6 906
AnnaBridge 146:22da6e220af6 907 /**
AnnaBridge 146:22da6e220af6 908 \brief LDR Exclusive (16 bit)
AnnaBridge 146:22da6e220af6 909 \details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge 146:22da6e220af6 910 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 911 \return value of type uint16_t at (*ptr)
AnnaBridge 146:22da6e220af6 912 */
AnnaBridge 146:22da6e220af6 913 #define __LDREXH (uint16_t)__builtin_arm_ldrex
AnnaBridge 146:22da6e220af6 914
AnnaBridge 146:22da6e220af6 915
AnnaBridge 146:22da6e220af6 916 /**
AnnaBridge 146:22da6e220af6 917 \brief LDR Exclusive (32 bit)
AnnaBridge 146:22da6e220af6 918 \details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge 146:22da6e220af6 919 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 920 \return value of type uint32_t at (*ptr)
AnnaBridge 146:22da6e220af6 921 */
AnnaBridge 146:22da6e220af6 922 #define __LDREXW (uint32_t)__builtin_arm_ldrex
AnnaBridge 146:22da6e220af6 923
AnnaBridge 146:22da6e220af6 924
AnnaBridge 146:22da6e220af6 925 /**
AnnaBridge 146:22da6e220af6 926 \brief STR Exclusive (8 bit)
AnnaBridge 146:22da6e220af6 927 \details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge 146:22da6e220af6 928 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 929 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 930 \return 0 Function succeeded
AnnaBridge 146:22da6e220af6 931 \return 1 Function failed
AnnaBridge 146:22da6e220af6 932 */
AnnaBridge 146:22da6e220af6 933 #define __STREXB (uint32_t)__builtin_arm_strex
AnnaBridge 146:22da6e220af6 934
AnnaBridge 146:22da6e220af6 935
AnnaBridge 146:22da6e220af6 936 /**
AnnaBridge 146:22da6e220af6 937 \brief STR Exclusive (16 bit)
AnnaBridge 146:22da6e220af6 938 \details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge 146:22da6e220af6 939 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 940 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 941 \return 0 Function succeeded
AnnaBridge 146:22da6e220af6 942 \return 1 Function failed
AnnaBridge 146:22da6e220af6 943 */
AnnaBridge 146:22da6e220af6 944 #define __STREXH (uint32_t)__builtin_arm_strex
AnnaBridge 146:22da6e220af6 945
AnnaBridge 146:22da6e220af6 946
AnnaBridge 146:22da6e220af6 947 /**
AnnaBridge 146:22da6e220af6 948 \brief STR Exclusive (32 bit)
AnnaBridge 146:22da6e220af6 949 \details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge 146:22da6e220af6 950 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 951 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 952 \return 0 Function succeeded
AnnaBridge 146:22da6e220af6 953 \return 1 Function failed
AnnaBridge 146:22da6e220af6 954 */
AnnaBridge 146:22da6e220af6 955 #define __STREXW (uint32_t)__builtin_arm_strex
AnnaBridge 146:22da6e220af6 956
AnnaBridge 146:22da6e220af6 957
AnnaBridge 146:22da6e220af6 958 /**
AnnaBridge 146:22da6e220af6 959 \brief Remove the exclusive lock
AnnaBridge 146:22da6e220af6 960 \details Removes the exclusive lock which is created by LDREX.
AnnaBridge 146:22da6e220af6 961 */
AnnaBridge 146:22da6e220af6 962 #define __CLREX __builtin_arm_clrex
AnnaBridge 146:22da6e220af6 963
AnnaBridge 146:22da6e220af6 964 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 146:22da6e220af6 965 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 146:22da6e220af6 966 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 146:22da6e220af6 967 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 146:22da6e220af6 968
AnnaBridge 146:22da6e220af6 969
AnnaBridge 146:22da6e220af6 970 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 146:22da6e220af6 971 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 146:22da6e220af6 972 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge 146:22da6e220af6 973 /**
AnnaBridge 146:22da6e220af6 974 \brief Signed Saturate
AnnaBridge 146:22da6e220af6 975 \details Saturates a signed value.
AnnaBridge 146:22da6e220af6 976 \param [in] value Value to be saturated
AnnaBridge 146:22da6e220af6 977 \param [in] sat Bit position to saturate to (1..32)
AnnaBridge 146:22da6e220af6 978 \return Saturated value
AnnaBridge 146:22da6e220af6 979 */
AnnaBridge 146:22da6e220af6 980 #define __SSAT __builtin_arm_ssat
AnnaBridge 146:22da6e220af6 981
AnnaBridge 146:22da6e220af6 982
AnnaBridge 146:22da6e220af6 983 /**
AnnaBridge 146:22da6e220af6 984 \brief Unsigned Saturate
AnnaBridge 146:22da6e220af6 985 \details Saturates an unsigned value.
AnnaBridge 146:22da6e220af6 986 \param [in] value Value to be saturated
AnnaBridge 146:22da6e220af6 987 \param [in] sat Bit position to saturate to (0..31)
AnnaBridge 146:22da6e220af6 988 \return Saturated value
AnnaBridge 146:22da6e220af6 989 */
AnnaBridge 146:22da6e220af6 990 #define __USAT __builtin_arm_usat
AnnaBridge 146:22da6e220af6 991
AnnaBridge 146:22da6e220af6 992
AnnaBridge 146:22da6e220af6 993 /**
AnnaBridge 146:22da6e220af6 994 \brief Rotate Right with Extend (32 bit)
AnnaBridge 146:22da6e220af6 995 \details Moves each bit of a bitstring right by one bit.
AnnaBridge 146:22da6e220af6 996 The carry input is shifted in at the left end of the bitstring.
AnnaBridge 146:22da6e220af6 997 \param [in] value Value to rotate
AnnaBridge 146:22da6e220af6 998 \return Rotated value
AnnaBridge 146:22da6e220af6 999 */
AnnaBridge 146:22da6e220af6 1000 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge 146:22da6e220af6 1001 {
AnnaBridge 146:22da6e220af6 1002 uint32_t result;
AnnaBridge 146:22da6e220af6 1003
AnnaBridge 146:22da6e220af6 1004 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge 146:22da6e220af6 1005 return(result);
AnnaBridge 146:22da6e220af6 1006 }
AnnaBridge 146:22da6e220af6 1007
AnnaBridge 146:22da6e220af6 1008
AnnaBridge 146:22da6e220af6 1009 /**
AnnaBridge 146:22da6e220af6 1010 \brief LDRT Unprivileged (8 bit)
AnnaBridge 146:22da6e220af6 1011 \details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge 146:22da6e220af6 1012 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 1013 \return value of type uint8_t at (*ptr)
AnnaBridge 146:22da6e220af6 1014 */
AnnaBridge 146:22da6e220af6 1015 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge 146:22da6e220af6 1016 {
AnnaBridge 146:22da6e220af6 1017 uint32_t result;
AnnaBridge 146:22da6e220af6 1018
AnnaBridge 146:22da6e220af6 1019 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 146:22da6e220af6 1020 return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge 146:22da6e220af6 1021 }
AnnaBridge 146:22da6e220af6 1022
AnnaBridge 146:22da6e220af6 1023
AnnaBridge 146:22da6e220af6 1024 /**
AnnaBridge 146:22da6e220af6 1025 \brief LDRT Unprivileged (16 bit)
AnnaBridge 146:22da6e220af6 1026 \details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge 146:22da6e220af6 1027 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 1028 \return value of type uint16_t at (*ptr)
AnnaBridge 146:22da6e220af6 1029 */
AnnaBridge 146:22da6e220af6 1030 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge 146:22da6e220af6 1031 {
AnnaBridge 146:22da6e220af6 1032 uint32_t result;
AnnaBridge 146:22da6e220af6 1033
AnnaBridge 146:22da6e220af6 1034 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 146:22da6e220af6 1035 return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge 146:22da6e220af6 1036 }
AnnaBridge 146:22da6e220af6 1037
AnnaBridge 146:22da6e220af6 1038
AnnaBridge 146:22da6e220af6 1039 /**
AnnaBridge 146:22da6e220af6 1040 \brief LDRT Unprivileged (32 bit)
AnnaBridge 146:22da6e220af6 1041 \details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge 146:22da6e220af6 1042 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 1043 \return value of type uint32_t at (*ptr)
AnnaBridge 146:22da6e220af6 1044 */
AnnaBridge 146:22da6e220af6 1045 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge 146:22da6e220af6 1046 {
AnnaBridge 146:22da6e220af6 1047 uint32_t result;
AnnaBridge 146:22da6e220af6 1048
AnnaBridge 146:22da6e220af6 1049 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 146:22da6e220af6 1050 return(result);
AnnaBridge 146:22da6e220af6 1051 }
AnnaBridge 146:22da6e220af6 1052
AnnaBridge 146:22da6e220af6 1053
AnnaBridge 146:22da6e220af6 1054 /**
AnnaBridge 146:22da6e220af6 1055 \brief STRT Unprivileged (8 bit)
AnnaBridge 146:22da6e220af6 1056 \details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge 146:22da6e220af6 1057 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 1058 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 1059 */
AnnaBridge 146:22da6e220af6 1060 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 146:22da6e220af6 1061 {
AnnaBridge 146:22da6e220af6 1062 __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 146:22da6e220af6 1063 }
AnnaBridge 146:22da6e220af6 1064
AnnaBridge 146:22da6e220af6 1065
AnnaBridge 146:22da6e220af6 1066 /**
AnnaBridge 146:22da6e220af6 1067 \brief STRT Unprivileged (16 bit)
AnnaBridge 146:22da6e220af6 1068 \details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge 146:22da6e220af6 1069 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 1070 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 1071 */
AnnaBridge 146:22da6e220af6 1072 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 146:22da6e220af6 1073 {
AnnaBridge 146:22da6e220af6 1074 __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 146:22da6e220af6 1075 }
AnnaBridge 146:22da6e220af6 1076
AnnaBridge 146:22da6e220af6 1077
AnnaBridge 146:22da6e220af6 1078 /**
AnnaBridge 146:22da6e220af6 1079 \brief STRT Unprivileged (32 bit)
AnnaBridge 146:22da6e220af6 1080 \details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge 146:22da6e220af6 1081 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 1082 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 1083 */
AnnaBridge 146:22da6e220af6 1084 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 146:22da6e220af6 1085 {
AnnaBridge 146:22da6e220af6 1086 __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge 146:22da6e220af6 1087 }
AnnaBridge 146:22da6e220af6 1088
AnnaBridge 146:22da6e220af6 1089 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
AnnaBridge 146:22da6e220af6 1090 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
AnnaBridge 146:22da6e220af6 1091 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge 146:22da6e220af6 1092
AnnaBridge 146:22da6e220af6 1093
AnnaBridge 146:22da6e220af6 1094 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 146:22da6e220af6 1095 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 146:22da6e220af6 1096 /**
AnnaBridge 146:22da6e220af6 1097 \brief Load-Acquire (8 bit)
AnnaBridge 146:22da6e220af6 1098 \details Executes a LDAB instruction for 8 bit value.
AnnaBridge 146:22da6e220af6 1099 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 1100 \return value of type uint8_t at (*ptr)
AnnaBridge 146:22da6e220af6 1101 */
AnnaBridge 146:22da6e220af6 1102 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 146:22da6e220af6 1103 {
AnnaBridge 146:22da6e220af6 1104 uint32_t result;
AnnaBridge 146:22da6e220af6 1105
AnnaBridge 146:22da6e220af6 1106 __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 146:22da6e220af6 1107 return ((uint8_t) result);
AnnaBridge 146:22da6e220af6 1108 }
AnnaBridge 146:22da6e220af6 1109
AnnaBridge 146:22da6e220af6 1110
AnnaBridge 146:22da6e220af6 1111 /**
AnnaBridge 146:22da6e220af6 1112 \brief Load-Acquire (16 bit)
AnnaBridge 146:22da6e220af6 1113 \details Executes a LDAH instruction for 16 bit values.
AnnaBridge 146:22da6e220af6 1114 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 1115 \return value of type uint16_t at (*ptr)
AnnaBridge 146:22da6e220af6 1116 */
AnnaBridge 146:22da6e220af6 1117 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 146:22da6e220af6 1118 {
AnnaBridge 146:22da6e220af6 1119 uint32_t result;
AnnaBridge 146:22da6e220af6 1120
AnnaBridge 146:22da6e220af6 1121 __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 146:22da6e220af6 1122 return ((uint16_t) result);
AnnaBridge 146:22da6e220af6 1123 }
AnnaBridge 146:22da6e220af6 1124
AnnaBridge 146:22da6e220af6 1125
AnnaBridge 146:22da6e220af6 1126 /**
AnnaBridge 146:22da6e220af6 1127 \brief Load-Acquire (32 bit)
AnnaBridge 146:22da6e220af6 1128 \details Executes a LDA instruction for 32 bit values.
AnnaBridge 146:22da6e220af6 1129 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 1130 \return value of type uint32_t at (*ptr)
AnnaBridge 146:22da6e220af6 1131 */
AnnaBridge 146:22da6e220af6 1132 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 146:22da6e220af6 1133 {
AnnaBridge 146:22da6e220af6 1134 uint32_t result;
AnnaBridge 146:22da6e220af6 1135
AnnaBridge 146:22da6e220af6 1136 __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge 146:22da6e220af6 1137 return(result);
AnnaBridge 146:22da6e220af6 1138 }
AnnaBridge 146:22da6e220af6 1139
AnnaBridge 146:22da6e220af6 1140
AnnaBridge 146:22da6e220af6 1141 /**
AnnaBridge 146:22da6e220af6 1142 \brief Store-Release (8 bit)
AnnaBridge 146:22da6e220af6 1143 \details Executes a STLB instruction for 8 bit values.
AnnaBridge 146:22da6e220af6 1144 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 1145 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 1146 */
AnnaBridge 146:22da6e220af6 1147 __attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 146:22da6e220af6 1148 {
AnnaBridge 146:22da6e220af6 1149 __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 146:22da6e220af6 1150 }
AnnaBridge 146:22da6e220af6 1151
AnnaBridge 146:22da6e220af6 1152
AnnaBridge 146:22da6e220af6 1153 /**
AnnaBridge 146:22da6e220af6 1154 \brief Store-Release (16 bit)
AnnaBridge 146:22da6e220af6 1155 \details Executes a STLH instruction for 16 bit values.
AnnaBridge 146:22da6e220af6 1156 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 1157 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 1158 */
AnnaBridge 146:22da6e220af6 1159 __attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 146:22da6e220af6 1160 {
AnnaBridge 146:22da6e220af6 1161 __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 146:22da6e220af6 1162 }
AnnaBridge 146:22da6e220af6 1163
AnnaBridge 146:22da6e220af6 1164
AnnaBridge 146:22da6e220af6 1165 /**
AnnaBridge 146:22da6e220af6 1166 \brief Store-Release (32 bit)
AnnaBridge 146:22da6e220af6 1167 \details Executes a STL instruction for 32 bit values.
AnnaBridge 146:22da6e220af6 1168 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 1169 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 1170 */
AnnaBridge 146:22da6e220af6 1171 __attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 146:22da6e220af6 1172 {
AnnaBridge 146:22da6e220af6 1173 __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge 146:22da6e220af6 1174 }
AnnaBridge 146:22da6e220af6 1175
AnnaBridge 146:22da6e220af6 1176
AnnaBridge 146:22da6e220af6 1177 /**
AnnaBridge 146:22da6e220af6 1178 \brief Load-Acquire Exclusive (8 bit)
AnnaBridge 146:22da6e220af6 1179 \details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge 146:22da6e220af6 1180 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 1181 \return value of type uint8_t at (*ptr)
AnnaBridge 146:22da6e220af6 1182 */
AnnaBridge 146:22da6e220af6 1183 #define __LDAEXB (uint8_t)__builtin_arm_ldaex
AnnaBridge 146:22da6e220af6 1184
AnnaBridge 146:22da6e220af6 1185
AnnaBridge 146:22da6e220af6 1186 /**
AnnaBridge 146:22da6e220af6 1187 \brief Load-Acquire Exclusive (16 bit)
AnnaBridge 146:22da6e220af6 1188 \details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge 146:22da6e220af6 1189 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 1190 \return value of type uint16_t at (*ptr)
AnnaBridge 146:22da6e220af6 1191 */
AnnaBridge 146:22da6e220af6 1192 #define __LDAEXH (uint16_t)__builtin_arm_ldaex
AnnaBridge 146:22da6e220af6 1193
AnnaBridge 146:22da6e220af6 1194
AnnaBridge 146:22da6e220af6 1195 /**
AnnaBridge 146:22da6e220af6 1196 \brief Load-Acquire Exclusive (32 bit)
AnnaBridge 146:22da6e220af6 1197 \details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge 146:22da6e220af6 1198 \param [in] ptr Pointer to data
AnnaBridge 146:22da6e220af6 1199 \return value of type uint32_t at (*ptr)
AnnaBridge 146:22da6e220af6 1200 */
AnnaBridge 146:22da6e220af6 1201 #define __LDAEX (uint32_t)__builtin_arm_ldaex
AnnaBridge 146:22da6e220af6 1202
AnnaBridge 146:22da6e220af6 1203
AnnaBridge 146:22da6e220af6 1204 /**
AnnaBridge 146:22da6e220af6 1205 \brief Store-Release Exclusive (8 bit)
AnnaBridge 146:22da6e220af6 1206 \details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge 146:22da6e220af6 1207 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 1208 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 1209 \return 0 Function succeeded
AnnaBridge 146:22da6e220af6 1210 \return 1 Function failed
AnnaBridge 146:22da6e220af6 1211 */
AnnaBridge 146:22da6e220af6 1212 #define __STLEXB (uint32_t)__builtin_arm_stlex
AnnaBridge 146:22da6e220af6 1213
AnnaBridge 146:22da6e220af6 1214
AnnaBridge 146:22da6e220af6 1215 /**
AnnaBridge 146:22da6e220af6 1216 \brief Store-Release Exclusive (16 bit)
AnnaBridge 146:22da6e220af6 1217 \details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge 146:22da6e220af6 1218 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 1219 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 1220 \return 0 Function succeeded
AnnaBridge 146:22da6e220af6 1221 \return 1 Function failed
AnnaBridge 146:22da6e220af6 1222 */
AnnaBridge 146:22da6e220af6 1223 #define __STLEXH (uint32_t)__builtin_arm_stlex
AnnaBridge 146:22da6e220af6 1224
AnnaBridge 146:22da6e220af6 1225
AnnaBridge 146:22da6e220af6 1226 /**
AnnaBridge 146:22da6e220af6 1227 \brief Store-Release Exclusive (32 bit)
AnnaBridge 146:22da6e220af6 1228 \details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge 146:22da6e220af6 1229 \param [in] value Value to store
AnnaBridge 146:22da6e220af6 1230 \param [in] ptr Pointer to location
AnnaBridge 146:22da6e220af6 1231 \return 0 Function succeeded
AnnaBridge 146:22da6e220af6 1232 \return 1 Function failed
AnnaBridge 146:22da6e220af6 1233 */
AnnaBridge 146:22da6e220af6 1234 #define __STLEX (uint32_t)__builtin_arm_stlex
AnnaBridge 146:22da6e220af6 1235
AnnaBridge 146:22da6e220af6 1236 #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 146:22da6e220af6 1237 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge 146:22da6e220af6 1238
AnnaBridge 146:22da6e220af6 1239 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge 146:22da6e220af6 1240
AnnaBridge 146:22da6e220af6 1241
AnnaBridge 146:22da6e220af6 1242 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 146:22da6e220af6 1243 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 146:22da6e220af6 1244 Access to dedicated SIMD instructions
AnnaBridge 146:22da6e220af6 1245 @{
AnnaBridge 146:22da6e220af6 1246 */
AnnaBridge 146:22da6e220af6 1247
AnnaBridge 146:22da6e220af6 1248 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
AnnaBridge 146:22da6e220af6 1249
AnnaBridge 146:22da6e220af6 1250 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1251 {
AnnaBridge 146:22da6e220af6 1252 uint32_t result;
AnnaBridge 146:22da6e220af6 1253
AnnaBridge 146:22da6e220af6 1254 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1255 return(result);
AnnaBridge 146:22da6e220af6 1256 }
AnnaBridge 146:22da6e220af6 1257
AnnaBridge 146:22da6e220af6 1258 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1259 {
AnnaBridge 146:22da6e220af6 1260 uint32_t result;
AnnaBridge 146:22da6e220af6 1261
AnnaBridge 146:22da6e220af6 1262 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1263 return(result);
AnnaBridge 146:22da6e220af6 1264 }
AnnaBridge 146:22da6e220af6 1265
AnnaBridge 146:22da6e220af6 1266 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1267 {
AnnaBridge 146:22da6e220af6 1268 uint32_t result;
AnnaBridge 146:22da6e220af6 1269
AnnaBridge 146:22da6e220af6 1270 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1271 return(result);
AnnaBridge 146:22da6e220af6 1272 }
AnnaBridge 146:22da6e220af6 1273
AnnaBridge 146:22da6e220af6 1274 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1275 {
AnnaBridge 146:22da6e220af6 1276 uint32_t result;
AnnaBridge 146:22da6e220af6 1277
AnnaBridge 146:22da6e220af6 1278 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1279 return(result);
AnnaBridge 146:22da6e220af6 1280 }
AnnaBridge 146:22da6e220af6 1281
AnnaBridge 146:22da6e220af6 1282 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1283 {
AnnaBridge 146:22da6e220af6 1284 uint32_t result;
AnnaBridge 146:22da6e220af6 1285
AnnaBridge 146:22da6e220af6 1286 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1287 return(result);
AnnaBridge 146:22da6e220af6 1288 }
AnnaBridge 146:22da6e220af6 1289
AnnaBridge 146:22da6e220af6 1290 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1291 {
AnnaBridge 146:22da6e220af6 1292 uint32_t result;
AnnaBridge 146:22da6e220af6 1293
AnnaBridge 146:22da6e220af6 1294 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1295 return(result);
AnnaBridge 146:22da6e220af6 1296 }
AnnaBridge 146:22da6e220af6 1297
AnnaBridge 146:22da6e220af6 1298
AnnaBridge 146:22da6e220af6 1299 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1300 {
AnnaBridge 146:22da6e220af6 1301 uint32_t result;
AnnaBridge 146:22da6e220af6 1302
AnnaBridge 146:22da6e220af6 1303 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1304 return(result);
AnnaBridge 146:22da6e220af6 1305 }
AnnaBridge 146:22da6e220af6 1306
AnnaBridge 146:22da6e220af6 1307 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1308 {
AnnaBridge 146:22da6e220af6 1309 uint32_t result;
AnnaBridge 146:22da6e220af6 1310
AnnaBridge 146:22da6e220af6 1311 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1312 return(result);
AnnaBridge 146:22da6e220af6 1313 }
AnnaBridge 146:22da6e220af6 1314
AnnaBridge 146:22da6e220af6 1315 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1316 {
AnnaBridge 146:22da6e220af6 1317 uint32_t result;
AnnaBridge 146:22da6e220af6 1318
AnnaBridge 146:22da6e220af6 1319 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1320 return(result);
AnnaBridge 146:22da6e220af6 1321 }
AnnaBridge 146:22da6e220af6 1322
AnnaBridge 146:22da6e220af6 1323 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1324 {
AnnaBridge 146:22da6e220af6 1325 uint32_t result;
AnnaBridge 146:22da6e220af6 1326
AnnaBridge 146:22da6e220af6 1327 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1328 return(result);
AnnaBridge 146:22da6e220af6 1329 }
AnnaBridge 146:22da6e220af6 1330
AnnaBridge 146:22da6e220af6 1331 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1332 {
AnnaBridge 146:22da6e220af6 1333 uint32_t result;
AnnaBridge 146:22da6e220af6 1334
AnnaBridge 146:22da6e220af6 1335 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1336 return(result);
AnnaBridge 146:22da6e220af6 1337 }
AnnaBridge 146:22da6e220af6 1338
AnnaBridge 146:22da6e220af6 1339 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1340 {
AnnaBridge 146:22da6e220af6 1341 uint32_t result;
AnnaBridge 146:22da6e220af6 1342
AnnaBridge 146:22da6e220af6 1343 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1344 return(result);
AnnaBridge 146:22da6e220af6 1345 }
AnnaBridge 146:22da6e220af6 1346
AnnaBridge 146:22da6e220af6 1347
AnnaBridge 146:22da6e220af6 1348 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1349 {
AnnaBridge 146:22da6e220af6 1350 uint32_t result;
AnnaBridge 146:22da6e220af6 1351
AnnaBridge 146:22da6e220af6 1352 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1353 return(result);
AnnaBridge 146:22da6e220af6 1354 }
AnnaBridge 146:22da6e220af6 1355
AnnaBridge 146:22da6e220af6 1356 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1357 {
AnnaBridge 146:22da6e220af6 1358 uint32_t result;
AnnaBridge 146:22da6e220af6 1359
AnnaBridge 146:22da6e220af6 1360 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1361 return(result);
AnnaBridge 146:22da6e220af6 1362 }
AnnaBridge 146:22da6e220af6 1363
AnnaBridge 146:22da6e220af6 1364 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1365 {
AnnaBridge 146:22da6e220af6 1366 uint32_t result;
AnnaBridge 146:22da6e220af6 1367
AnnaBridge 146:22da6e220af6 1368 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1369 return(result);
AnnaBridge 146:22da6e220af6 1370 }
AnnaBridge 146:22da6e220af6 1371
AnnaBridge 146:22da6e220af6 1372 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1373 {
AnnaBridge 146:22da6e220af6 1374 uint32_t result;
AnnaBridge 146:22da6e220af6 1375
AnnaBridge 146:22da6e220af6 1376 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1377 return(result);
AnnaBridge 146:22da6e220af6 1378 }
AnnaBridge 146:22da6e220af6 1379
AnnaBridge 146:22da6e220af6 1380 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1381 {
AnnaBridge 146:22da6e220af6 1382 uint32_t result;
AnnaBridge 146:22da6e220af6 1383
AnnaBridge 146:22da6e220af6 1384 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1385 return(result);
AnnaBridge 146:22da6e220af6 1386 }
AnnaBridge 146:22da6e220af6 1387
AnnaBridge 146:22da6e220af6 1388 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1389 {
AnnaBridge 146:22da6e220af6 1390 uint32_t result;
AnnaBridge 146:22da6e220af6 1391
AnnaBridge 146:22da6e220af6 1392 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1393 return(result);
AnnaBridge 146:22da6e220af6 1394 }
AnnaBridge 146:22da6e220af6 1395
AnnaBridge 146:22da6e220af6 1396 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1397 {
AnnaBridge 146:22da6e220af6 1398 uint32_t result;
AnnaBridge 146:22da6e220af6 1399
AnnaBridge 146:22da6e220af6 1400 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1401 return(result);
AnnaBridge 146:22da6e220af6 1402 }
AnnaBridge 146:22da6e220af6 1403
AnnaBridge 146:22da6e220af6 1404 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1405 {
AnnaBridge 146:22da6e220af6 1406 uint32_t result;
AnnaBridge 146:22da6e220af6 1407
AnnaBridge 146:22da6e220af6 1408 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1409 return(result);
AnnaBridge 146:22da6e220af6 1410 }
AnnaBridge 146:22da6e220af6 1411
AnnaBridge 146:22da6e220af6 1412 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1413 {
AnnaBridge 146:22da6e220af6 1414 uint32_t result;
AnnaBridge 146:22da6e220af6 1415
AnnaBridge 146:22da6e220af6 1416 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1417 return(result);
AnnaBridge 146:22da6e220af6 1418 }
AnnaBridge 146:22da6e220af6 1419
AnnaBridge 146:22da6e220af6 1420 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1421 {
AnnaBridge 146:22da6e220af6 1422 uint32_t result;
AnnaBridge 146:22da6e220af6 1423
AnnaBridge 146:22da6e220af6 1424 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1425 return(result);
AnnaBridge 146:22da6e220af6 1426 }
AnnaBridge 146:22da6e220af6 1427
AnnaBridge 146:22da6e220af6 1428 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1429 {
AnnaBridge 146:22da6e220af6 1430 uint32_t result;
AnnaBridge 146:22da6e220af6 1431
AnnaBridge 146:22da6e220af6 1432 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1433 return(result);
AnnaBridge 146:22da6e220af6 1434 }
AnnaBridge 146:22da6e220af6 1435
AnnaBridge 146:22da6e220af6 1436 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1437 {
AnnaBridge 146:22da6e220af6 1438 uint32_t result;
AnnaBridge 146:22da6e220af6 1439
AnnaBridge 146:22da6e220af6 1440 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1441 return(result);
AnnaBridge 146:22da6e220af6 1442 }
AnnaBridge 146:22da6e220af6 1443
AnnaBridge 146:22da6e220af6 1444 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1445 {
AnnaBridge 146:22da6e220af6 1446 uint32_t result;
AnnaBridge 146:22da6e220af6 1447
AnnaBridge 146:22da6e220af6 1448 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1449 return(result);
AnnaBridge 146:22da6e220af6 1450 }
AnnaBridge 146:22da6e220af6 1451
AnnaBridge 146:22da6e220af6 1452 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1453 {
AnnaBridge 146:22da6e220af6 1454 uint32_t result;
AnnaBridge 146:22da6e220af6 1455
AnnaBridge 146:22da6e220af6 1456 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1457 return(result);
AnnaBridge 146:22da6e220af6 1458 }
AnnaBridge 146:22da6e220af6 1459
AnnaBridge 146:22da6e220af6 1460 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1461 {
AnnaBridge 146:22da6e220af6 1462 uint32_t result;
AnnaBridge 146:22da6e220af6 1463
AnnaBridge 146:22da6e220af6 1464 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1465 return(result);
AnnaBridge 146:22da6e220af6 1466 }
AnnaBridge 146:22da6e220af6 1467
AnnaBridge 146:22da6e220af6 1468 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1469 {
AnnaBridge 146:22da6e220af6 1470 uint32_t result;
AnnaBridge 146:22da6e220af6 1471
AnnaBridge 146:22da6e220af6 1472 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1473 return(result);
AnnaBridge 146:22da6e220af6 1474 }
AnnaBridge 146:22da6e220af6 1475
AnnaBridge 146:22da6e220af6 1476 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1477 {
AnnaBridge 146:22da6e220af6 1478 uint32_t result;
AnnaBridge 146:22da6e220af6 1479
AnnaBridge 146:22da6e220af6 1480 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1481 return(result);
AnnaBridge 146:22da6e220af6 1482 }
AnnaBridge 146:22da6e220af6 1483
AnnaBridge 146:22da6e220af6 1484 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1485 {
AnnaBridge 146:22da6e220af6 1486 uint32_t result;
AnnaBridge 146:22da6e220af6 1487
AnnaBridge 146:22da6e220af6 1488 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1489 return(result);
AnnaBridge 146:22da6e220af6 1490 }
AnnaBridge 146:22da6e220af6 1491
AnnaBridge 146:22da6e220af6 1492 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1493 {
AnnaBridge 146:22da6e220af6 1494 uint32_t result;
AnnaBridge 146:22da6e220af6 1495
AnnaBridge 146:22da6e220af6 1496 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1497 return(result);
AnnaBridge 146:22da6e220af6 1498 }
AnnaBridge 146:22da6e220af6 1499
AnnaBridge 146:22da6e220af6 1500 __attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1501 {
AnnaBridge 146:22da6e220af6 1502 uint32_t result;
AnnaBridge 146:22da6e220af6 1503
AnnaBridge 146:22da6e220af6 1504 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1505 return(result);
AnnaBridge 146:22da6e220af6 1506 }
AnnaBridge 146:22da6e220af6 1507
AnnaBridge 146:22da6e220af6 1508 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1509 {
AnnaBridge 146:22da6e220af6 1510 uint32_t result;
AnnaBridge 146:22da6e220af6 1511
AnnaBridge 146:22da6e220af6 1512 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1513 return(result);
AnnaBridge 146:22da6e220af6 1514 }
AnnaBridge 146:22da6e220af6 1515
AnnaBridge 146:22da6e220af6 1516 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1517 {
AnnaBridge 146:22da6e220af6 1518 uint32_t result;
AnnaBridge 146:22da6e220af6 1519
AnnaBridge 146:22da6e220af6 1520 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1521 return(result);
AnnaBridge 146:22da6e220af6 1522 }
AnnaBridge 146:22da6e220af6 1523
AnnaBridge 146:22da6e220af6 1524 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1525 {
AnnaBridge 146:22da6e220af6 1526 uint32_t result;
AnnaBridge 146:22da6e220af6 1527
AnnaBridge 146:22da6e220af6 1528 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1529 return(result);
AnnaBridge 146:22da6e220af6 1530 }
AnnaBridge 146:22da6e220af6 1531
AnnaBridge 146:22da6e220af6 1532 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1533 {
AnnaBridge 146:22da6e220af6 1534 uint32_t result;
AnnaBridge 146:22da6e220af6 1535
AnnaBridge 146:22da6e220af6 1536 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1537 return(result);
AnnaBridge 146:22da6e220af6 1538 }
AnnaBridge 146:22da6e220af6 1539
AnnaBridge 146:22da6e220af6 1540 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1541 {
AnnaBridge 146:22da6e220af6 1542 uint32_t result;
AnnaBridge 146:22da6e220af6 1543
AnnaBridge 146:22da6e220af6 1544 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1545 return(result);
AnnaBridge 146:22da6e220af6 1546 }
AnnaBridge 146:22da6e220af6 1547
AnnaBridge 146:22da6e220af6 1548 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 146:22da6e220af6 1549 {
AnnaBridge 146:22da6e220af6 1550 uint32_t result;
AnnaBridge 146:22da6e220af6 1551
AnnaBridge 146:22da6e220af6 1552 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 146:22da6e220af6 1553 return(result);
AnnaBridge 146:22da6e220af6 1554 }
AnnaBridge 146:22da6e220af6 1555
AnnaBridge 146:22da6e220af6 1556 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 146:22da6e220af6 1557 ({ \
AnnaBridge 146:22da6e220af6 1558 int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 146:22da6e220af6 1559 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 146:22da6e220af6 1560 __RES; \
AnnaBridge 146:22da6e220af6 1561 })
AnnaBridge 146:22da6e220af6 1562
AnnaBridge 146:22da6e220af6 1563 #define __USAT16(ARG1,ARG2) \
AnnaBridge 146:22da6e220af6 1564 ({ \
AnnaBridge 146:22da6e220af6 1565 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 146:22da6e220af6 1566 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 146:22da6e220af6 1567 __RES; \
AnnaBridge 146:22da6e220af6 1568 })
AnnaBridge 146:22da6e220af6 1569
AnnaBridge 146:22da6e220af6 1570 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 146:22da6e220af6 1571 {
AnnaBridge 146:22da6e220af6 1572 uint32_t result;
AnnaBridge 146:22da6e220af6 1573
AnnaBridge 146:22da6e220af6 1574 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 146:22da6e220af6 1575 return(result);
AnnaBridge 146:22da6e220af6 1576 }
AnnaBridge 146:22da6e220af6 1577
AnnaBridge 146:22da6e220af6 1578 __attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1579 {
AnnaBridge 146:22da6e220af6 1580 uint32_t result;
AnnaBridge 146:22da6e220af6 1581
AnnaBridge 146:22da6e220af6 1582 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1583 return(result);
AnnaBridge 146:22da6e220af6 1584 }
AnnaBridge 146:22da6e220af6 1585
AnnaBridge 146:22da6e220af6 1586 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 146:22da6e220af6 1587 {
AnnaBridge 146:22da6e220af6 1588 uint32_t result;
AnnaBridge 146:22da6e220af6 1589
AnnaBridge 146:22da6e220af6 1590 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 146:22da6e220af6 1591 return(result);
AnnaBridge 146:22da6e220af6 1592 }
AnnaBridge 146:22da6e220af6 1593
AnnaBridge 146:22da6e220af6 1594 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1595 {
AnnaBridge 146:22da6e220af6 1596 uint32_t result;
AnnaBridge 146:22da6e220af6 1597
AnnaBridge 146:22da6e220af6 1598 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1599 return(result);
AnnaBridge 146:22da6e220af6 1600 }
AnnaBridge 146:22da6e220af6 1601
AnnaBridge 146:22da6e220af6 1602 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1603 {
AnnaBridge 146:22da6e220af6 1604 uint32_t result;
AnnaBridge 146:22da6e220af6 1605
AnnaBridge 146:22da6e220af6 1606 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1607 return(result);
AnnaBridge 146:22da6e220af6 1608 }
AnnaBridge 146:22da6e220af6 1609
AnnaBridge 146:22da6e220af6 1610 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1611 {
AnnaBridge 146:22da6e220af6 1612 uint32_t result;
AnnaBridge 146:22da6e220af6 1613
AnnaBridge 146:22da6e220af6 1614 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1615 return(result);
AnnaBridge 146:22da6e220af6 1616 }
AnnaBridge 146:22da6e220af6 1617
AnnaBridge 146:22da6e220af6 1618 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 146:22da6e220af6 1619 {
AnnaBridge 146:22da6e220af6 1620 uint32_t result;
AnnaBridge 146:22da6e220af6 1621
AnnaBridge 146:22da6e220af6 1622 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 146:22da6e220af6 1623 return(result);
AnnaBridge 146:22da6e220af6 1624 }
AnnaBridge 146:22da6e220af6 1625
AnnaBridge 146:22da6e220af6 1626 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 146:22da6e220af6 1627 {
AnnaBridge 146:22da6e220af6 1628 uint32_t result;
AnnaBridge 146:22da6e220af6 1629
AnnaBridge 146:22da6e220af6 1630 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 146:22da6e220af6 1631 return(result);
AnnaBridge 146:22da6e220af6 1632 }
AnnaBridge 146:22da6e220af6 1633
AnnaBridge 146:22da6e220af6 1634 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 146:22da6e220af6 1635 {
AnnaBridge 146:22da6e220af6 1636 union llreg_u{
AnnaBridge 146:22da6e220af6 1637 uint32_t w32[2];
AnnaBridge 146:22da6e220af6 1638 uint64_t w64;
AnnaBridge 146:22da6e220af6 1639 } llr;
AnnaBridge 146:22da6e220af6 1640 llr.w64 = acc;
AnnaBridge 146:22da6e220af6 1641
AnnaBridge 146:22da6e220af6 1642 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 146:22da6e220af6 1643 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 146:22da6e220af6 1644 #else /* Big endian */
AnnaBridge 146:22da6e220af6 1645 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 146:22da6e220af6 1646 #endif
AnnaBridge 146:22da6e220af6 1647
AnnaBridge 146:22da6e220af6 1648 return(llr.w64);
AnnaBridge 146:22da6e220af6 1649 }
AnnaBridge 146:22da6e220af6 1650
AnnaBridge 146:22da6e220af6 1651 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 146:22da6e220af6 1652 {
AnnaBridge 146:22da6e220af6 1653 union llreg_u{
AnnaBridge 146:22da6e220af6 1654 uint32_t w32[2];
AnnaBridge 146:22da6e220af6 1655 uint64_t w64;
AnnaBridge 146:22da6e220af6 1656 } llr;
AnnaBridge 146:22da6e220af6 1657 llr.w64 = acc;
AnnaBridge 146:22da6e220af6 1658
AnnaBridge 146:22da6e220af6 1659 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 146:22da6e220af6 1660 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 146:22da6e220af6 1661 #else /* Big endian */
AnnaBridge 146:22da6e220af6 1662 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 146:22da6e220af6 1663 #endif
AnnaBridge 146:22da6e220af6 1664
AnnaBridge 146:22da6e220af6 1665 return(llr.w64);
AnnaBridge 146:22da6e220af6 1666 }
AnnaBridge 146:22da6e220af6 1667
AnnaBridge 146:22da6e220af6 1668 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1669 {
AnnaBridge 146:22da6e220af6 1670 uint32_t result;
AnnaBridge 146:22da6e220af6 1671
AnnaBridge 146:22da6e220af6 1672 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1673 return(result);
AnnaBridge 146:22da6e220af6 1674 }
AnnaBridge 146:22da6e220af6 1675
AnnaBridge 146:22da6e220af6 1676 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1677 {
AnnaBridge 146:22da6e220af6 1678 uint32_t result;
AnnaBridge 146:22da6e220af6 1679
AnnaBridge 146:22da6e220af6 1680 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1681 return(result);
AnnaBridge 146:22da6e220af6 1682 }
AnnaBridge 146:22da6e220af6 1683
AnnaBridge 146:22da6e220af6 1684 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 146:22da6e220af6 1685 {
AnnaBridge 146:22da6e220af6 1686 uint32_t result;
AnnaBridge 146:22da6e220af6 1687
AnnaBridge 146:22da6e220af6 1688 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 146:22da6e220af6 1689 return(result);
AnnaBridge 146:22da6e220af6 1690 }
AnnaBridge 146:22da6e220af6 1691
AnnaBridge 146:22da6e220af6 1692 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 146:22da6e220af6 1693 {
AnnaBridge 146:22da6e220af6 1694 uint32_t result;
AnnaBridge 146:22da6e220af6 1695
AnnaBridge 146:22da6e220af6 1696 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 146:22da6e220af6 1697 return(result);
AnnaBridge 146:22da6e220af6 1698 }
AnnaBridge 146:22da6e220af6 1699
AnnaBridge 146:22da6e220af6 1700 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 146:22da6e220af6 1701 {
AnnaBridge 146:22da6e220af6 1702 union llreg_u{
AnnaBridge 146:22da6e220af6 1703 uint32_t w32[2];
AnnaBridge 146:22da6e220af6 1704 uint64_t w64;
AnnaBridge 146:22da6e220af6 1705 } llr;
AnnaBridge 146:22da6e220af6 1706 llr.w64 = acc;
AnnaBridge 146:22da6e220af6 1707
AnnaBridge 146:22da6e220af6 1708 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 146:22da6e220af6 1709 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 146:22da6e220af6 1710 #else /* Big endian */
AnnaBridge 146:22da6e220af6 1711 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 146:22da6e220af6 1712 #endif
AnnaBridge 146:22da6e220af6 1713
AnnaBridge 146:22da6e220af6 1714 return(llr.w64);
AnnaBridge 146:22da6e220af6 1715 }
AnnaBridge 146:22da6e220af6 1716
AnnaBridge 146:22da6e220af6 1717 __attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge 146:22da6e220af6 1718 {
AnnaBridge 146:22da6e220af6 1719 union llreg_u{
AnnaBridge 146:22da6e220af6 1720 uint32_t w32[2];
AnnaBridge 146:22da6e220af6 1721 uint64_t w64;
AnnaBridge 146:22da6e220af6 1722 } llr;
AnnaBridge 146:22da6e220af6 1723 llr.w64 = acc;
AnnaBridge 146:22da6e220af6 1724
AnnaBridge 146:22da6e220af6 1725 #ifndef __ARMEB__ /* Little endian */
AnnaBridge 146:22da6e220af6 1726 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge 146:22da6e220af6 1727 #else /* Big endian */
AnnaBridge 146:22da6e220af6 1728 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge 146:22da6e220af6 1729 #endif
AnnaBridge 146:22da6e220af6 1730
AnnaBridge 146:22da6e220af6 1731 return(llr.w64);
AnnaBridge 146:22da6e220af6 1732 }
AnnaBridge 146:22da6e220af6 1733
AnnaBridge 146:22da6e220af6 1734 __attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 146:22da6e220af6 1735 {
AnnaBridge 146:22da6e220af6 1736 uint32_t result;
AnnaBridge 146:22da6e220af6 1737
AnnaBridge 146:22da6e220af6 1738 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1739 return(result);
AnnaBridge 146:22da6e220af6 1740 }
AnnaBridge 146:22da6e220af6 1741
AnnaBridge 146:22da6e220af6 1742 __attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge 146:22da6e220af6 1743 {
AnnaBridge 146:22da6e220af6 1744 int32_t result;
AnnaBridge 146:22da6e220af6 1745
AnnaBridge 146:22da6e220af6 1746 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1747 return(result);
AnnaBridge 146:22da6e220af6 1748 }
AnnaBridge 146:22da6e220af6 1749
AnnaBridge 146:22da6e220af6 1750 __attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge 146:22da6e220af6 1751 {
AnnaBridge 146:22da6e220af6 1752 int32_t result;
AnnaBridge 146:22da6e220af6 1753
AnnaBridge 146:22da6e220af6 1754 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 146:22da6e220af6 1755 return(result);
AnnaBridge 146:22da6e220af6 1756 }
AnnaBridge 146:22da6e220af6 1757
AnnaBridge 146:22da6e220af6 1758 #if 0
AnnaBridge 146:22da6e220af6 1759 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 146:22da6e220af6 1760 ({ \
AnnaBridge 146:22da6e220af6 1761 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 146:22da6e220af6 1762 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 146:22da6e220af6 1763 __RES; \
AnnaBridge 146:22da6e220af6 1764 })
AnnaBridge 146:22da6e220af6 1765
AnnaBridge 146:22da6e220af6 1766 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 146:22da6e220af6 1767 ({ \
AnnaBridge 146:22da6e220af6 1768 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 146:22da6e220af6 1769 if (ARG3 == 0) \
AnnaBridge 146:22da6e220af6 1770 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 146:22da6e220af6 1771 else \
AnnaBridge 146:22da6e220af6 1772 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 146:22da6e220af6 1773 __RES; \
AnnaBridge 146:22da6e220af6 1774 })
AnnaBridge 146:22da6e220af6 1775 #endif
AnnaBridge 146:22da6e220af6 1776
AnnaBridge 146:22da6e220af6 1777 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 146:22da6e220af6 1778 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 146:22da6e220af6 1779
AnnaBridge 146:22da6e220af6 1780 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 146:22da6e220af6 1781 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 146:22da6e220af6 1782
AnnaBridge 146:22da6e220af6 1783 __attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 146:22da6e220af6 1784 {
AnnaBridge 146:22da6e220af6 1785 int32_t result;
AnnaBridge 146:22da6e220af6 1786
AnnaBridge 146:22da6e220af6 1787 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 146:22da6e220af6 1788 return(result);
AnnaBridge 146:22da6e220af6 1789 }
AnnaBridge 146:22da6e220af6 1790
AnnaBridge 146:22da6e220af6 1791 #endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge 146:22da6e220af6 1792 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 146:22da6e220af6 1793
AnnaBridge 146:22da6e220af6 1794
AnnaBridge 146:22da6e220af6 1795 #endif /* __CMSIS_ARMCLANG_H */