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TARGET_UBLOX_EVA_NINA/core_caInstr.h@132:9baf128c2fab, 2016-12-20 (annotated)
- Committer:
- <>
- Date:
- Tue Dec 20 15:36:52 2016 +0000
- Revision:
- 132:9baf128c2fab
Release 132 of the mbed library
Ports for Upcoming Targets
3241: Add support for FRDM-KW41 https://github.com/ARMmbed/mbed-os/pull/3241
3291: Adding mbed enabled Maker board with NINA-B1 and EVA-M8Q https://github.com/ARMmbed/mbed-os/pull/3291
Fixes and Changes
3062: TARGET_STM :USB device FS https://github.com/ARMmbed/mbed-os/pull/3062
3213: STM32: Refactor us_ticker.c + hal_tick.c files https://github.com/ARMmbed/mbed-os/pull/3213
3288: Dev spi asynch l0l1 https://github.com/ARMmbed/mbed-os/pull/3288
3289: Bug fix of initial value of interrupt edge in "gpio_irq_init" function. https://github.com/ARMmbed/mbed-os/pull/3289
3302: STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels https://github.com/ARMmbed/mbed-os/pull/3302
3320: STM32 - Add ADC_VREF label https://github.com/ARMmbed/mbed-os/pull/3320
3321: no HSE available by default for NUCLEO_L432KC https://github.com/ARMmbed/mbed-os/pull/3321
3352: ublox eva nina - fix line endings https://github.com/ARMmbed/mbed-os/pull/3352
3322: DISCO_L053C8 doesn't support LSE https://github.com/ARMmbed/mbed-os/pull/3322
3345: STM32 - Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions https://github.com/ARMmbed/mbed-os/pull/3345
3309: [NUC472/M453] Fix CI failed tests https://github.com/ARMmbed/mbed-os/pull/3309
3157: [Silicon Labs] Adding support for EFR32MG1 wireless SoC https://github.com/ARMmbed/mbed-os/pull/3157
3301: I2C - correct return values for write functions (docs) - part 1 https://github.com/ARMmbed/mbed-os/pull/3301
3303: Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor https://github.com/ARMmbed/mbed-os/pull/3303
3304: STM32L476: no HSE is present in NUCLEO and DISCO boards https://github.com/ARMmbed/mbed-os/pull/3304
3318: Register map changes for RevG https://github.com/ARMmbed/mbed-os/pull/3318
3317: NUCLEO_F429ZI has integrated LSE https://github.com/ARMmbed/mbed-os/pull/3317
3312: K64F: SPI Asynch API implementation https://github.com/ARMmbed/mbed-os/pull/3312
3324: Dev i2c common code https://github.com/ARMmbed/mbed-os/pull/3324
3369: Add CAN2 missing pins for connector CN12 https://github.com/ARMmbed/mbed-os/pull/3369
3377: STM32 NUCLEO-L152RE Update system core clock to 32MHz https://github.com/ARMmbed/mbed-os/pull/3377
3378: K66F: Enable LWIP feature https://github.com/ARMmbed/mbed-os/pull/3378
3382: [MAX32620] Fixing serial readable function. https://github.com/ARMmbed/mbed-os/pull/3382
3399: NUCLEO_F103RB - Add SERIAL_FC feature https://github.com/ARMmbed/mbed-os/pull/3399
3409: STM32L1 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3409
3416: Renames i2c_api.c for STM32F1 targets to fix IAR exporter https://github.com/ARMmbed/mbed-os/pull/3416
3348: Fix frequency function of CAN driver. https://github.com/ARMmbed/mbed-os/pull/3348
3366: NUCLEO_F412ZG - Add new platform https://github.com/ARMmbed/mbed-os/pull/3366
3379: STM32F0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3379
3393: ISR register never re-evaluated in HAL_DMA_PollForTransfer for STM32F4 https://github.com/ARMmbed/mbed-os/pull/3393
3408: STM32F7 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3408
3411: STM32L0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3411
3424: STM32F4 - FIX to add the update of hdma->State variable https://github.com/ARMmbed/mbed-os/pull/3424
3427: Fix stm i2c slave https://github.com/ARMmbed/mbed-os/pull/3427
3429: Fix stm i2c fix init https://github.com/ARMmbed/mbed-os/pull/3429
3434: [NUC472/M453] Fix stuck in lp_ticker_init and other updates https://github.com/ARMmbed/mbed-os/pull/3434
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| <> | 132:9baf128c2fab | 1 | /**************************************************************************//** |
| <> | 132:9baf128c2fab | 2 | * @file core_caInstr.h |
| <> | 132:9baf128c2fab | 3 | * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File |
| <> | 132:9baf128c2fab | 4 | * @version |
| <> | 132:9baf128c2fab | 5 | * @date 04. December 2012 |
| <> | 132:9baf128c2fab | 6 | * |
| <> | 132:9baf128c2fab | 7 | * @note |
| <> | 132:9baf128c2fab | 8 | * |
| <> | 132:9baf128c2fab | 9 | ******************************************************************************/ |
| <> | 132:9baf128c2fab | 10 | /* Copyright (c) 2009 - 2012 ARM LIMITED |
| <> | 132:9baf128c2fab | 11 | |
| <> | 132:9baf128c2fab | 12 | All rights reserved. |
| <> | 132:9baf128c2fab | 13 | Redistribution and use in source and binary forms, with or without |
| <> | 132:9baf128c2fab | 14 | modification, are permitted provided that the following conditions are met: |
| <> | 132:9baf128c2fab | 15 | - Redistributions of source code must retain the above copyright |
| <> | 132:9baf128c2fab | 16 | notice, this list of conditions and the following disclaimer. |
| <> | 132:9baf128c2fab | 17 | - Redistributions in binary form must reproduce the above copyright |
| <> | 132:9baf128c2fab | 18 | notice, this list of conditions and the following disclaimer in the |
| <> | 132:9baf128c2fab | 19 | documentation and/or other materials provided with the distribution. |
| <> | 132:9baf128c2fab | 20 | - Neither the name of ARM nor the names of its contributors may be used |
| <> | 132:9baf128c2fab | 21 | to endorse or promote products derived from this software without |
| <> | 132:9baf128c2fab | 22 | specific prior written permission. |
| <> | 132:9baf128c2fab | 23 | * |
| <> | 132:9baf128c2fab | 24 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| <> | 132:9baf128c2fab | 25 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| <> | 132:9baf128c2fab | 26 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| <> | 132:9baf128c2fab | 27 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
| <> | 132:9baf128c2fab | 28 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| <> | 132:9baf128c2fab | 29 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| <> | 132:9baf128c2fab | 30 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| <> | 132:9baf128c2fab | 31 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| <> | 132:9baf128c2fab | 32 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| <> | 132:9baf128c2fab | 33 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| <> | 132:9baf128c2fab | 34 | POSSIBILITY OF SUCH DAMAGE. |
| <> | 132:9baf128c2fab | 35 | ---------------------------------------------------------------------------*/ |
| <> | 132:9baf128c2fab | 36 | |
| <> | 132:9baf128c2fab | 37 | #ifndef __CORE_CAINSTR_H__ |
| <> | 132:9baf128c2fab | 38 | #define __CORE_CAINSTR_H__ |
| <> | 132:9baf128c2fab | 39 | |
| <> | 132:9baf128c2fab | 40 | #define __CORTEX_M 0x3 |
| <> | 132:9baf128c2fab | 41 | #include "core_cmInstr.h" |
| <> | 132:9baf128c2fab | 42 | #undef __CORTEX_M |
| <> | 132:9baf128c2fab | 43 | |
| <> | 132:9baf128c2fab | 44 | #endif |
| <> | 132:9baf128c2fab | 45 |
