The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
<>
Date:
Tue Dec 20 15:36:52 2016 +0000
Revision:
132:9baf128c2fab
Child:
140:97feb9bacc10
Release 132 of the mbed library

Ports for Upcoming Targets

3241: Add support for FRDM-KW41 https://github.com/ARMmbed/mbed-os/pull/3241
3291: Adding mbed enabled Maker board with NINA-B1 and EVA-M8Q https://github.com/ARMmbed/mbed-os/pull/3291

Fixes and Changes

3062: TARGET_STM :USB device FS https://github.com/ARMmbed/mbed-os/pull/3062
3213: STM32: Refactor us_ticker.c + hal_tick.c files https://github.com/ARMmbed/mbed-os/pull/3213
3288: Dev spi asynch l0l1 https://github.com/ARMmbed/mbed-os/pull/3288
3289: Bug fix of initial value of interrupt edge in "gpio_irq_init" function. https://github.com/ARMmbed/mbed-os/pull/3289
3302: STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels https://github.com/ARMmbed/mbed-os/pull/3302
3320: STM32 - Add ADC_VREF label https://github.com/ARMmbed/mbed-os/pull/3320
3321: no HSE available by default for NUCLEO_L432KC https://github.com/ARMmbed/mbed-os/pull/3321
3352: ublox eva nina - fix line endings https://github.com/ARMmbed/mbed-os/pull/3352
3322: DISCO_L053C8 doesn't support LSE https://github.com/ARMmbed/mbed-os/pull/3322
3345: STM32 - Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions https://github.com/ARMmbed/mbed-os/pull/3345
3309: [NUC472/M453] Fix CI failed tests https://github.com/ARMmbed/mbed-os/pull/3309
3157: [Silicon Labs] Adding support for EFR32MG1 wireless SoC https://github.com/ARMmbed/mbed-os/pull/3157
3301: I2C - correct return values for write functions (docs) - part 1 https://github.com/ARMmbed/mbed-os/pull/3301
3303: Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor https://github.com/ARMmbed/mbed-os/pull/3303
3304: STM32L476: no HSE is present in NUCLEO and DISCO boards https://github.com/ARMmbed/mbed-os/pull/3304
3318: Register map changes for RevG https://github.com/ARMmbed/mbed-os/pull/3318
3317: NUCLEO_F429ZI has integrated LSE https://github.com/ARMmbed/mbed-os/pull/3317
3312: K64F: SPI Asynch API implementation https://github.com/ARMmbed/mbed-os/pull/3312
3324: Dev i2c common code https://github.com/ARMmbed/mbed-os/pull/3324
3369: Add CAN2 missing pins for connector CN12 https://github.com/ARMmbed/mbed-os/pull/3369
3377: STM32 NUCLEO-L152RE Update system core clock to 32MHz https://github.com/ARMmbed/mbed-os/pull/3377
3378: K66F: Enable LWIP feature https://github.com/ARMmbed/mbed-os/pull/3378
3382: [MAX32620] Fixing serial readable function. https://github.com/ARMmbed/mbed-os/pull/3382
3399: NUCLEO_F103RB - Add SERIAL_FC feature https://github.com/ARMmbed/mbed-os/pull/3399
3409: STM32L1 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3409
3416: Renames i2c_api.c for STM32F1 targets to fix IAR exporter https://github.com/ARMmbed/mbed-os/pull/3416
3348: Fix frequency function of CAN driver. https://github.com/ARMmbed/mbed-os/pull/3348
3366: NUCLEO_F412ZG - Add new platform https://github.com/ARMmbed/mbed-os/pull/3366
3379: STM32F0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3379
3393: ISR register never re-evaluated in HAL_DMA_PollForTransfer for STM32F4 https://github.com/ARMmbed/mbed-os/pull/3393
3408: STM32F7 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3408
3411: STM32L0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3411
3424: STM32F4 - FIX to add the update of hdma->State variable https://github.com/ARMmbed/mbed-os/pull/3424
3427: Fix stm i2c slave https://github.com/ARMmbed/mbed-os/pull/3427
3429: Fix stm i2c fix init https://github.com/ARMmbed/mbed-os/pull/3429
3434: [NUC472/M453] Fix stuck in lp_ticker_init and other updates https://github.com/ARMmbed/mbed-os/pull/3434

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 132:9baf128c2fab 1 /*
<> 132:9baf128c2fab 2 ** ###################################################################
<> 132:9baf128c2fab 3 ** Processor: MKW41Z512VHT4
<> 132:9baf128c2fab 4 ** Compiler: GNU C Compiler
<> 132:9baf128c2fab 5 ** Reference manual: MKW41Z512RM Rev. 0.1, 04/2016
<> 132:9baf128c2fab 6 ** Version: rev. 1.0, 2015-09-23
<> 132:9baf128c2fab 7 ** Build: b160720
<> 132:9baf128c2fab 8 **
<> 132:9baf128c2fab 9 ** Abstract:
<> 132:9baf128c2fab 10 ** Linker file for the GNU C Compiler
<> 132:9baf128c2fab 11 **
<> 132:9baf128c2fab 12 ** Copyright (c) 2016 Freescale Semiconductor, Inc.
<> 132:9baf128c2fab 13 ** All rights reserved.
<> 132:9baf128c2fab 14 **
<> 132:9baf128c2fab 15 ** Redistribution and use in source and binary forms, with or without modification,
<> 132:9baf128c2fab 16 ** are permitted provided that the following conditions are met:
<> 132:9baf128c2fab 17 **
<> 132:9baf128c2fab 18 ** o Redistributions of source code must retain the above copyright notice, this list
<> 132:9baf128c2fab 19 ** of conditions and the following disclaimer.
<> 132:9baf128c2fab 20 **
<> 132:9baf128c2fab 21 ** o Redistributions in binary form must reproduce the above copyright notice, this
<> 132:9baf128c2fab 22 ** list of conditions and the following disclaimer in the documentation and/or
<> 132:9baf128c2fab 23 ** other materials provided with the distribution.
<> 132:9baf128c2fab 24 **
<> 132:9baf128c2fab 25 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 132:9baf128c2fab 26 ** contributors may be used to endorse or promote products derived from this
<> 132:9baf128c2fab 27 ** software without specific prior written permission.
<> 132:9baf128c2fab 28 **
<> 132:9baf128c2fab 29 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 132:9baf128c2fab 30 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 132:9baf128c2fab 31 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 132:9baf128c2fab 32 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 132:9baf128c2fab 33 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 132:9baf128c2fab 34 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 132:9baf128c2fab 35 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 132:9baf128c2fab 36 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 132:9baf128c2fab 37 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 132:9baf128c2fab 38 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 132:9baf128c2fab 39 **
<> 132:9baf128c2fab 40 ** http: www.freescale.com
<> 132:9baf128c2fab 41 ** mail: support@freescale.com
<> 132:9baf128c2fab 42 **
<> 132:9baf128c2fab 43 ** ###################################################################
<> 132:9baf128c2fab 44 */
<> 132:9baf128c2fab 45
<> 132:9baf128c2fab 46 /* Entry Point */
<> 132:9baf128c2fab 47 ENTRY(Reset_Handler)
<> 132:9baf128c2fab 48
<> 132:9baf128c2fab 49 __ram_vector_table__ = 1;
<> 132:9baf128c2fab 50
<> 132:9baf128c2fab 51 /* Heap 1/4 of ram and stack 1/8 */
<> 132:9baf128c2fab 52 __stack_size__ = 0x4000;
<> 132:9baf128c2fab 53 __heap_size__ = 0x8000;
<> 132:9baf128c2fab 54
<> 132:9baf128c2fab 55 HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
<> 132:9baf128c2fab 56 STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
<> 132:9baf128c2fab 57 M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0200 : 0x0;
<> 132:9baf128c2fab 58
<> 132:9baf128c2fab 59 /* Specify the memory areas */
<> 132:9baf128c2fab 60 MEMORY
<> 132:9baf128c2fab 61 {
<> 132:9baf128c2fab 62 m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000200
<> 132:9baf128c2fab 63 m_flash_config (RX) : ORIGIN = 0x00000400, LENGTH = 0x00000010
<> 132:9baf128c2fab 64 m_text (RX) : ORIGIN = 0x00000410, LENGTH = 0x0007FBF0
<> 132:9baf128c2fab 65 m_data (RW) : ORIGIN = 0x1FFF8000, LENGTH = 0x00020000
<> 132:9baf128c2fab 66 }
<> 132:9baf128c2fab 67
<> 132:9baf128c2fab 68 /* Define output sections */
<> 132:9baf128c2fab 69 SECTIONS
<> 132:9baf128c2fab 70 {
<> 132:9baf128c2fab 71 /* The startup code goes first into internal flash */
<> 132:9baf128c2fab 72 .interrupts :
<> 132:9baf128c2fab 73 {
<> 132:9baf128c2fab 74 __VECTOR_TABLE = .;
<> 132:9baf128c2fab 75 . = ALIGN(4);
<> 132:9baf128c2fab 76 KEEP(*(.isr_vector)) /* Startup code */
<> 132:9baf128c2fab 77 . = ALIGN(4);
<> 132:9baf128c2fab 78 } > m_interrupts
<> 132:9baf128c2fab 79
<> 132:9baf128c2fab 80 .flash_config :
<> 132:9baf128c2fab 81 {
<> 132:9baf128c2fab 82 . = ALIGN(4);
<> 132:9baf128c2fab 83 KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */
<> 132:9baf128c2fab 84 . = ALIGN(4);
<> 132:9baf128c2fab 85 } > m_flash_config
<> 132:9baf128c2fab 86
<> 132:9baf128c2fab 87 /* The program code and other data goes into internal flash */
<> 132:9baf128c2fab 88 .text :
<> 132:9baf128c2fab 89 {
<> 132:9baf128c2fab 90 . = ALIGN(4);
<> 132:9baf128c2fab 91 *(.text) /* .text sections (code) */
<> 132:9baf128c2fab 92 *(.text*) /* .text* sections (code) */
<> 132:9baf128c2fab 93 *(.rodata) /* .rodata sections (constants, strings, etc.) */
<> 132:9baf128c2fab 94 *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
<> 132:9baf128c2fab 95 *(.glue_7) /* glue arm to thumb code */
<> 132:9baf128c2fab 96 *(.glue_7t) /* glue thumb to arm code */
<> 132:9baf128c2fab 97 *(.eh_frame)
<> 132:9baf128c2fab 98 KEEP (*(.init))
<> 132:9baf128c2fab 99 KEEP (*(.fini))
<> 132:9baf128c2fab 100 . = ALIGN(4);
<> 132:9baf128c2fab 101 } > m_text
<> 132:9baf128c2fab 102
<> 132:9baf128c2fab 103 .ARM.extab :
<> 132:9baf128c2fab 104 {
<> 132:9baf128c2fab 105 *(.ARM.extab* .gnu.linkonce.armextab.*)
<> 132:9baf128c2fab 106 } > m_text
<> 132:9baf128c2fab 107
<> 132:9baf128c2fab 108 .ARM :
<> 132:9baf128c2fab 109 {
<> 132:9baf128c2fab 110 __exidx_start = .;
<> 132:9baf128c2fab 111 *(.ARM.exidx*)
<> 132:9baf128c2fab 112 __exidx_end = .;
<> 132:9baf128c2fab 113 } > m_text
<> 132:9baf128c2fab 114
<> 132:9baf128c2fab 115 .ctors :
<> 132:9baf128c2fab 116 {
<> 132:9baf128c2fab 117 __CTOR_LIST__ = .;
<> 132:9baf128c2fab 118 /* gcc uses crtbegin.o to find the start of
<> 132:9baf128c2fab 119 the constructors, so we make sure it is
<> 132:9baf128c2fab 120 first. Because this is a wildcard, it
<> 132:9baf128c2fab 121 doesn't matter if the user does not
<> 132:9baf128c2fab 122 actually link against crtbegin.o; the
<> 132:9baf128c2fab 123 linker won't look for a file to match a
<> 132:9baf128c2fab 124 wildcard. The wildcard also means that it
<> 132:9baf128c2fab 125 doesn't matter which directory crtbegin.o
<> 132:9baf128c2fab 126 is in. */
<> 132:9baf128c2fab 127 KEEP (*crtbegin.o(.ctors))
<> 132:9baf128c2fab 128 KEEP (*crtbegin?.o(.ctors))
<> 132:9baf128c2fab 129 /* We don't want to include the .ctor section from
<> 132:9baf128c2fab 130 from the crtend.o file until after the sorted ctors.
<> 132:9baf128c2fab 131 The .ctor section from the crtend file contains the
<> 132:9baf128c2fab 132 end of ctors marker and it must be last */
<> 132:9baf128c2fab 133 KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
<> 132:9baf128c2fab 134 KEEP (*(SORT(.ctors.*)))
<> 132:9baf128c2fab 135 KEEP (*(.ctors))
<> 132:9baf128c2fab 136 __CTOR_END__ = .;
<> 132:9baf128c2fab 137 } > m_text
<> 132:9baf128c2fab 138
<> 132:9baf128c2fab 139 .dtors :
<> 132:9baf128c2fab 140 {
<> 132:9baf128c2fab 141 __DTOR_LIST__ = .;
<> 132:9baf128c2fab 142 KEEP (*crtbegin.o(.dtors))
<> 132:9baf128c2fab 143 KEEP (*crtbegin?.o(.dtors))
<> 132:9baf128c2fab 144 KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
<> 132:9baf128c2fab 145 KEEP (*(SORT(.dtors.*)))
<> 132:9baf128c2fab 146 KEEP (*(.dtors))
<> 132:9baf128c2fab 147 __DTOR_END__ = .;
<> 132:9baf128c2fab 148 } > m_text
<> 132:9baf128c2fab 149
<> 132:9baf128c2fab 150 .preinit_array :
<> 132:9baf128c2fab 151 {
<> 132:9baf128c2fab 152 PROVIDE_HIDDEN (__preinit_array_start = .);
<> 132:9baf128c2fab 153 KEEP (*(.preinit_array*))
<> 132:9baf128c2fab 154 PROVIDE_HIDDEN (__preinit_array_end = .);
<> 132:9baf128c2fab 155 } > m_text
<> 132:9baf128c2fab 156
<> 132:9baf128c2fab 157 .init_array :
<> 132:9baf128c2fab 158 {
<> 132:9baf128c2fab 159 PROVIDE_HIDDEN (__init_array_start = .);
<> 132:9baf128c2fab 160 KEEP (*(SORT(.init_array.*)))
<> 132:9baf128c2fab 161 KEEP (*(.init_array*))
<> 132:9baf128c2fab 162 PROVIDE_HIDDEN (__init_array_end = .);
<> 132:9baf128c2fab 163 } > m_text
<> 132:9baf128c2fab 164
<> 132:9baf128c2fab 165 .fini_array :
<> 132:9baf128c2fab 166 {
<> 132:9baf128c2fab 167 PROVIDE_HIDDEN (__fini_array_start = .);
<> 132:9baf128c2fab 168 KEEP (*(SORT(.fini_array.*)))
<> 132:9baf128c2fab 169 KEEP (*(.fini_array*))
<> 132:9baf128c2fab 170 PROVIDE_HIDDEN (__fini_array_end = .);
<> 132:9baf128c2fab 171 } > m_text
<> 132:9baf128c2fab 172
<> 132:9baf128c2fab 173 __etext = .; /* define a global symbol at end of code */
<> 132:9baf128c2fab 174 __DATA_ROM = .; /* Symbol is used by startup for data initialization */
<> 132:9baf128c2fab 175
<> 132:9baf128c2fab 176 /* reserve MTB memory at the beginning of m_data */
<> 132:9baf128c2fab 177 .mtb : /* MTB buffer address as defined by the hardware */
<> 132:9baf128c2fab 178 {
<> 132:9baf128c2fab 179 . = ALIGN(8);
<> 132:9baf128c2fab 180 _mtb_start = .;
<> 132:9baf128c2fab 181 KEEP(*(.mtb_buf)) /* need to KEEP Micro Trace Buffer as not referenced by application */
<> 132:9baf128c2fab 182 . = ALIGN(8);
<> 132:9baf128c2fab 183 _mtb_end = .;
<> 132:9baf128c2fab 184 } > m_data
<> 132:9baf128c2fab 185
<> 132:9baf128c2fab 186 .interrupts_ram :
<> 132:9baf128c2fab 187 {
<> 132:9baf128c2fab 188 . = ALIGN(4);
<> 132:9baf128c2fab 189 __VECTOR_RAM__ = .;
<> 132:9baf128c2fab 190 __interrupts_ram_start__ = .; /* Create a global symbol at data start */
<> 132:9baf128c2fab 191 *(.m_interrupts_ram) /* This is a user defined section */
<> 132:9baf128c2fab 192 . += M_VECTOR_RAM_SIZE;
<> 132:9baf128c2fab 193 . = ALIGN(4);
<> 132:9baf128c2fab 194 __interrupts_ram_end__ = .; /* Define a global symbol at data end */
<> 132:9baf128c2fab 195 } > m_data
<> 132:9baf128c2fab 196
<> 132:9baf128c2fab 197 __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
<> 132:9baf128c2fab 198 __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
<> 132:9baf128c2fab 199
<> 132:9baf128c2fab 200 .data : AT(__DATA_ROM)
<> 132:9baf128c2fab 201 {
<> 132:9baf128c2fab 202 . = ALIGN(4);
<> 132:9baf128c2fab 203 __DATA_RAM = .;
<> 132:9baf128c2fab 204 __data_start__ = .; /* create a global symbol at data start */
<> 132:9baf128c2fab 205 *(.data) /* .data sections */
<> 132:9baf128c2fab 206 *(.data*) /* .data* sections */
<> 132:9baf128c2fab 207 KEEP(*(.jcr*))
<> 132:9baf128c2fab 208 . = ALIGN(4);
<> 132:9baf128c2fab 209 __data_end__ = .; /* define a global symbol at data end */
<> 132:9baf128c2fab 210 } > m_data
<> 132:9baf128c2fab 211
<> 132:9baf128c2fab 212 __DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
<> 132:9baf128c2fab 213 text_end = ORIGIN(m_text) + LENGTH(m_text);
<> 132:9baf128c2fab 214 ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
<> 132:9baf128c2fab 215
<> 132:9baf128c2fab 216 /* Uninitialized data section */
<> 132:9baf128c2fab 217 .bss :
<> 132:9baf128c2fab 218 {
<> 132:9baf128c2fab 219 /* This is used by the startup in order to initialize the .bss section */
<> 132:9baf128c2fab 220 . = ALIGN(4);
<> 132:9baf128c2fab 221 __START_BSS = .;
<> 132:9baf128c2fab 222 __bss_start__ = .;
<> 132:9baf128c2fab 223 *(.bss)
<> 132:9baf128c2fab 224 *(.bss*)
<> 132:9baf128c2fab 225 *(COMMON)
<> 132:9baf128c2fab 226 . = ALIGN(4);
<> 132:9baf128c2fab 227 __bss_end__ = .;
<> 132:9baf128c2fab 228 __END_BSS = .;
<> 132:9baf128c2fab 229 } > m_data
<> 132:9baf128c2fab 230
<> 132:9baf128c2fab 231 .heap :
<> 132:9baf128c2fab 232 {
<> 132:9baf128c2fab 233 . = ALIGN(8);
<> 132:9baf128c2fab 234 __end__ = .;
<> 132:9baf128c2fab 235 PROVIDE(end = .);
<> 132:9baf128c2fab 236 __HeapBase = .;
<> 132:9baf128c2fab 237 . += HEAP_SIZE;
<> 132:9baf128c2fab 238 __HeapLimit = .;
<> 132:9baf128c2fab 239 __heap_limit = .; /* Add for _sbrk */
<> 132:9baf128c2fab 240 } > m_data
<> 132:9baf128c2fab 241
<> 132:9baf128c2fab 242 .stack :
<> 132:9baf128c2fab 243 {
<> 132:9baf128c2fab 244 . = ALIGN(8);
<> 132:9baf128c2fab 245 . += STACK_SIZE;
<> 132:9baf128c2fab 246 } > m_data
<> 132:9baf128c2fab 247
<> 132:9baf128c2fab 248
<> 132:9baf128c2fab 249 /* Initializes stack on the end of block */
<> 132:9baf128c2fab 250 __StackTop = ORIGIN(m_data) + LENGTH(m_data);
<> 132:9baf128c2fab 251 __StackLimit = __StackTop - STACK_SIZE;
<> 132:9baf128c2fab 252 PROVIDE(__stack = __StackTop);
<> 132:9baf128c2fab 253
<> 132:9baf128c2fab 254 .ARM.attributes 0 : { *(.ARM.attributes) }
<> 132:9baf128c2fab 255
<> 132:9baf128c2fab 256 ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
<> 132:9baf128c2fab 257 }
<> 132:9baf128c2fab 258