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TARGET_EFM32HG_STK3400/TARGET_Silicon_Labs/mbed_rtx.h@132:9baf128c2fab, 2016-12-20 (annotated)
- Committer:
- <>
- Date:
- Tue Dec 20 15:36:52 2016 +0000
- Revision:
- 132:9baf128c2fab
- Parent:
- 128:9bcdf88f62b0
- Child:
- 139:856d2700e60b
Release 132 of the mbed library
Ports for Upcoming Targets
3241: Add support for FRDM-KW41 https://github.com/ARMmbed/mbed-os/pull/3241
3291: Adding mbed enabled Maker board with NINA-B1 and EVA-M8Q https://github.com/ARMmbed/mbed-os/pull/3291
Fixes and Changes
3062: TARGET_STM :USB device FS https://github.com/ARMmbed/mbed-os/pull/3062
3213: STM32: Refactor us_ticker.c + hal_tick.c files https://github.com/ARMmbed/mbed-os/pull/3213
3288: Dev spi asynch l0l1 https://github.com/ARMmbed/mbed-os/pull/3288
3289: Bug fix of initial value of interrupt edge in "gpio_irq_init" function. https://github.com/ARMmbed/mbed-os/pull/3289
3302: STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels https://github.com/ARMmbed/mbed-os/pull/3302
3320: STM32 - Add ADC_VREF label https://github.com/ARMmbed/mbed-os/pull/3320
3321: no HSE available by default for NUCLEO_L432KC https://github.com/ARMmbed/mbed-os/pull/3321
3352: ublox eva nina - fix line endings https://github.com/ARMmbed/mbed-os/pull/3352
3322: DISCO_L053C8 doesn't support LSE https://github.com/ARMmbed/mbed-os/pull/3322
3345: STM32 - Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions https://github.com/ARMmbed/mbed-os/pull/3345
3309: [NUC472/M453] Fix CI failed tests https://github.com/ARMmbed/mbed-os/pull/3309
3157: [Silicon Labs] Adding support for EFR32MG1 wireless SoC https://github.com/ARMmbed/mbed-os/pull/3157
3301: I2C - correct return values for write functions (docs) - part 1 https://github.com/ARMmbed/mbed-os/pull/3301
3303: Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor https://github.com/ARMmbed/mbed-os/pull/3303
3304: STM32L476: no HSE is present in NUCLEO and DISCO boards https://github.com/ARMmbed/mbed-os/pull/3304
3318: Register map changes for RevG https://github.com/ARMmbed/mbed-os/pull/3318
3317: NUCLEO_F429ZI has integrated LSE https://github.com/ARMmbed/mbed-os/pull/3317
3312: K64F: SPI Asynch API implementation https://github.com/ARMmbed/mbed-os/pull/3312
3324: Dev i2c common code https://github.com/ARMmbed/mbed-os/pull/3324
3369: Add CAN2 missing pins for connector CN12 https://github.com/ARMmbed/mbed-os/pull/3369
3377: STM32 NUCLEO-L152RE Update system core clock to 32MHz https://github.com/ARMmbed/mbed-os/pull/3377
3378: K66F: Enable LWIP feature https://github.com/ARMmbed/mbed-os/pull/3378
3382: [MAX32620] Fixing serial readable function. https://github.com/ARMmbed/mbed-os/pull/3382
3399: NUCLEO_F103RB - Add SERIAL_FC feature https://github.com/ARMmbed/mbed-os/pull/3399
3409: STM32L1 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3409
3416: Renames i2c_api.c for STM32F1 targets to fix IAR exporter https://github.com/ARMmbed/mbed-os/pull/3416
3348: Fix frequency function of CAN driver. https://github.com/ARMmbed/mbed-os/pull/3348
3366: NUCLEO_F412ZG - Add new platform https://github.com/ARMmbed/mbed-os/pull/3366
3379: STM32F0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3379
3393: ISR register never re-evaluated in HAL_DMA_PollForTransfer for STM32F4 https://github.com/ARMmbed/mbed-os/pull/3393
3408: STM32F7 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3408
3411: STM32L0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3411
3424: STM32F4 - FIX to add the update of hdma->State variable https://github.com/ARMmbed/mbed-os/pull/3424
3427: Fix stm i2c slave https://github.com/ARMmbed/mbed-os/pull/3427
3429: Fix stm i2c fix init https://github.com/ARMmbed/mbed-os/pull/3429
3434: [NUC472/M453] Fix stuck in lp_ticker_init and other updates https://github.com/ARMmbed/mbed-os/pull/3434
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| <> | 128:9bcdf88f62b0 | 1 | /* mbed Microcontroller Library |
| <> | 128:9bcdf88f62b0 | 2 | * Copyright (c) 2016 ARM Limited |
| <> | 128:9bcdf88f62b0 | 3 | * |
| <> | 128:9bcdf88f62b0 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| <> | 128:9bcdf88f62b0 | 5 | * you may not use this file except in compliance with the License. |
| <> | 128:9bcdf88f62b0 | 6 | * You may obtain a copy of the License at |
| <> | 128:9bcdf88f62b0 | 7 | * |
| <> | 128:9bcdf88f62b0 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| <> | 128:9bcdf88f62b0 | 9 | * |
| <> | 128:9bcdf88f62b0 | 10 | * Unless required by applicable law or agreed to in writing, software |
| <> | 128:9bcdf88f62b0 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| <> | 128:9bcdf88f62b0 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| <> | 128:9bcdf88f62b0 | 13 | * See the License for the specific language governing permissions and |
| <> | 128:9bcdf88f62b0 | 14 | * limitations under the License. |
| <> | 128:9bcdf88f62b0 | 15 | */ |
| <> | 128:9bcdf88f62b0 | 16 | |
| <> | 128:9bcdf88f62b0 | 17 | #ifndef MBED_MBED_RTX_H |
| <> | 128:9bcdf88f62b0 | 18 | #define MBED_MBED_RTX_H |
| <> | 128:9bcdf88f62b0 | 19 | |
| <> | 128:9bcdf88f62b0 | 20 | #include "clocking.h" |
| <> | 128:9bcdf88f62b0 | 21 | |
| <> | 128:9bcdf88f62b0 | 22 | #ifndef OS_CLOCK |
| <> | 128:9bcdf88f62b0 | 23 | #define OS_CLOCK REFERENCE_FREQUENCY |
| <> | 128:9bcdf88f62b0 | 24 | #endif |
| <> | 128:9bcdf88f62b0 | 25 | |
| <> | 132:9baf128c2fab | 26 | #if defined(__CC_ARM) |
| <> | 132:9baf128c2fab | 27 | extern uint32_t HEAP$$Base; |
| <> | 132:9baf128c2fab | 28 | extern uint32_t HEAP$$Limit; |
| <> | 132:9baf128c2fab | 29 | extern uint32_t STACK$$Limit; |
| <> | 132:9baf128c2fab | 30 | extern uint32_t STACK$$Base; |
| <> | 132:9baf128c2fab | 31 | #ifndef INITIAL_SP |
| <> | 132:9baf128c2fab | 32 | #define INITIAL_SP ((uint32_t)&STACK$$Limit) |
| <> | 132:9baf128c2fab | 33 | #endif |
| <> | 132:9baf128c2fab | 34 | #define ISR_STACK_START ((uint32_t)&STACK$$Base) |
| <> | 132:9baf128c2fab | 35 | #define ISR_STACK_SIZE ((uint32_t) ((uint32_t)&STACK$$Limit - (uint32_t)&STACK$$Base)) |
| <> | 132:9baf128c2fab | 36 | #define HEAP_START ((unsigned char*) ((uint32_t)&HEAP$$Base)) |
| <> | 132:9baf128c2fab | 37 | #define HEAP_SIZE ((uint32_t) ((uint32_t)&HEAP$$Limit - (uint32_t)&HEAP$$Base)) |
| <> | 132:9baf128c2fab | 38 | #endif |
| <> | 132:9baf128c2fab | 39 | |
| <> | 128:9bcdf88f62b0 | 40 | #if defined(TARGET_EFM32GG_STK3700) |
| <> | 128:9bcdf88f62b0 | 41 | |
| <> | 128:9bcdf88f62b0 | 42 | #ifndef INITIAL_SP |
| <> | 128:9bcdf88f62b0 | 43 | #define INITIAL_SP (0x20020000UL) |
| <> | 128:9bcdf88f62b0 | 44 | #endif |
| <> | 128:9bcdf88f62b0 | 45 | |
| <> | 128:9bcdf88f62b0 | 46 | #ifndef OS_TASKCNT |
| <> | 128:9bcdf88f62b0 | 47 | #define OS_TASKCNT 14 |
| <> | 128:9bcdf88f62b0 | 48 | #endif |
| <> | 128:9bcdf88f62b0 | 49 | #ifndef OS_MAINSTKSIZE |
| <> | 128:9bcdf88f62b0 | 50 | #define OS_MAINSTKSIZE 256 |
| <> | 128:9bcdf88f62b0 | 51 | #endif |
| <> | 128:9bcdf88f62b0 | 52 | |
| <> | 128:9bcdf88f62b0 | 53 | #elif defined(TARGET_EFM32HG_STK3400) |
| <> | 128:9bcdf88f62b0 | 54 | |
| <> | 128:9bcdf88f62b0 | 55 | #ifndef INITIAL_SP |
| <> | 128:9bcdf88f62b0 | 56 | #define INITIAL_SP (0x20002000UL) |
| <> | 128:9bcdf88f62b0 | 57 | #endif |
| <> | 128:9bcdf88f62b0 | 58 | |
| <> | 128:9bcdf88f62b0 | 59 | #ifndef OS_TASKCNT |
| <> | 128:9bcdf88f62b0 | 60 | #define OS_TASKCNT 6 |
| <> | 128:9bcdf88f62b0 | 61 | #endif |
| <> | 128:9bcdf88f62b0 | 62 | #ifndef OS_MAINSTKSIZE |
| <> | 128:9bcdf88f62b0 | 63 | #define OS_MAINSTKSIZE 112 |
| <> | 128:9bcdf88f62b0 | 64 | #endif |
| <> | 128:9bcdf88f62b0 | 65 | |
| <> | 128:9bcdf88f62b0 | 66 | #elif defined(TARGET_EFM32LG_STK3600) |
| <> | 128:9bcdf88f62b0 | 67 | |
| <> | 128:9bcdf88f62b0 | 68 | #ifndef INITIAL_SP |
| <> | 128:9bcdf88f62b0 | 69 | #define INITIAL_SP (0x20008000UL) |
| <> | 128:9bcdf88f62b0 | 70 | #endif |
| <> | 128:9bcdf88f62b0 | 71 | |
| <> | 128:9bcdf88f62b0 | 72 | #ifndef OS_TASKCNT |
| <> | 128:9bcdf88f62b0 | 73 | #define OS_TASKCNT 14 |
| <> | 128:9bcdf88f62b0 | 74 | #endif |
| <> | 128:9bcdf88f62b0 | 75 | #ifndef OS_MAINSTKSIZE |
| <> | 128:9bcdf88f62b0 | 76 | #define OS_MAINSTKSIZE 128 |
| <> | 128:9bcdf88f62b0 | 77 | #endif |
| <> | 128:9bcdf88f62b0 | 78 | |
| <> | 128:9bcdf88f62b0 | 79 | #elif defined(TARGET_EFM32PG_STK3401) |
| <> | 128:9bcdf88f62b0 | 80 | |
| <> | 128:9bcdf88f62b0 | 81 | #ifndef INITIAL_SP |
| <> | 128:9bcdf88f62b0 | 82 | #define INITIAL_SP (0x20008000UL) |
| <> | 128:9bcdf88f62b0 | 83 | #endif |
| <> | 128:9bcdf88f62b0 | 84 | |
| <> | 128:9bcdf88f62b0 | 85 | #ifndef OS_TASKCNT |
| <> | 128:9bcdf88f62b0 | 86 | #define OS_TASKCNT 14 |
| <> | 128:9bcdf88f62b0 | 87 | #endif |
| <> | 128:9bcdf88f62b0 | 88 | #ifndef OS_MAINSTKSIZE |
| <> | 128:9bcdf88f62b0 | 89 | #define OS_MAINSTKSIZE 128 |
| <> | 128:9bcdf88f62b0 | 90 | #endif |
| <> | 128:9bcdf88f62b0 | 91 | |
| <> | 128:9bcdf88f62b0 | 92 | #elif defined(TARGET_EFM32WG_STK3800) |
| <> | 128:9bcdf88f62b0 | 93 | |
| <> | 128:9bcdf88f62b0 | 94 | #ifndef INITIAL_SP |
| <> | 128:9bcdf88f62b0 | 95 | #define INITIAL_SP (0x20008000UL) |
| <> | 128:9bcdf88f62b0 | 96 | #endif |
| <> | 128:9bcdf88f62b0 | 97 | |
| <> | 128:9bcdf88f62b0 | 98 | #ifndef OS_TASKCNT |
| <> | 128:9bcdf88f62b0 | 99 | #define OS_TASKCNT 14 |
| <> | 128:9bcdf88f62b0 | 100 | #endif |
| <> | 128:9bcdf88f62b0 | 101 | #ifndef OS_MAINSTKSIZE |
| <> | 128:9bcdf88f62b0 | 102 | #define OS_MAINSTKSIZE 128 |
| <> | 128:9bcdf88f62b0 | 103 | #endif |
| <> | 128:9bcdf88f62b0 | 104 | |
| <> | 132:9baf128c2fab | 105 | #elif defined(TARGET_EFR32MG1) |
| <> | 132:9baf128c2fab | 106 | |
| <> | 132:9baf128c2fab | 107 | #ifndef INITIAL_SP |
| <> | 132:9baf128c2fab | 108 | #define INITIAL_SP (0x20007C00UL) |
| <> | 132:9baf128c2fab | 109 | #endif |
| <> | 132:9baf128c2fab | 110 | |
| <> | 132:9baf128c2fab | 111 | #ifndef OS_TASKCNT |
| <> | 132:9baf128c2fab | 112 | #define OS_TASKCNT 5 |
| <> | 132:9baf128c2fab | 113 | #endif |
| <> | 132:9baf128c2fab | 114 | #ifndef OS_MAINSTKSIZE |
| <> | 132:9baf128c2fab | 115 | #define OS_MAINSTKSIZE 256 |
| <> | 132:9baf128c2fab | 116 | #endif |
| <> | 132:9baf128c2fab | 117 | |
| <> | 128:9bcdf88f62b0 | 118 | #endif |
| <> | 128:9bcdf88f62b0 | 119 | |
| <> | 128:9bcdf88f62b0 | 120 | #endif // MBED_MBED_RTX_H |
