The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
<>
Date:
Wed Apr 12 16:07:08 2017 +0100
Revision:
140:97feb9bacc10
Parent:
111:4336505e4b1c
Release 140 of the mbed library

Ports for Upcoming Targets

3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841
3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992

Fixes and Changes

3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951
4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021
3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979
3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the https://github.com/ARMmbed/mbed-os/pull/3990
4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003
4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012
4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020
4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065
4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014
4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030
4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109
3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 111:4336505e4b1c 1 /**************************************************************************//**
Kojto 111:4336505e4b1c 2 * @file core_cmFunc.h
Kojto 111:4336505e4b1c 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 111:4336505e4b1c 4 * @version V4.10
Kojto 111:4336505e4b1c 5 * @date 18. March 2015
Kojto 111:4336505e4b1c 6 *
Kojto 111:4336505e4b1c 7 * @note
Kojto 111:4336505e4b1c 8 *
Kojto 111:4336505e4b1c 9 ******************************************************************************/
Kojto 111:4336505e4b1c 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
Kojto 111:4336505e4b1c 11
Kojto 111:4336505e4b1c 12 All rights reserved.
Kojto 111:4336505e4b1c 13 Redistribution and use in source and binary forms, with or without
Kojto 111:4336505e4b1c 14 modification, are permitted provided that the following conditions are met:
Kojto 111:4336505e4b1c 15 - Redistributions of source code must retain the above copyright
Kojto 111:4336505e4b1c 16 notice, this list of conditions and the following disclaimer.
Kojto 111:4336505e4b1c 17 - Redistributions in binary form must reproduce the above copyright
Kojto 111:4336505e4b1c 18 notice, this list of conditions and the following disclaimer in the
Kojto 111:4336505e4b1c 19 documentation and/or other materials provided with the distribution.
Kojto 111:4336505e4b1c 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 111:4336505e4b1c 21 to endorse or promote products derived from this software without
Kojto 111:4336505e4b1c 22 specific prior written permission.
Kojto 111:4336505e4b1c 23 *
Kojto 111:4336505e4b1c 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 111:4336505e4b1c 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 111:4336505e4b1c 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 111:4336505e4b1c 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 111:4336505e4b1c 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 111:4336505e4b1c 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 111:4336505e4b1c 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 111:4336505e4b1c 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 111:4336505e4b1c 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 111:4336505e4b1c 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 111:4336505e4b1c 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 111:4336505e4b1c 35 ---------------------------------------------------------------------------*/
Kojto 111:4336505e4b1c 36
Kojto 111:4336505e4b1c 37
Kojto 111:4336505e4b1c 38 #ifndef __CORE_CMFUNC_H
Kojto 111:4336505e4b1c 39 #define __CORE_CMFUNC_H
Kojto 111:4336505e4b1c 40
Kojto 111:4336505e4b1c 41
Kojto 111:4336505e4b1c 42 /* ########################### Core Function Access ########################### */
Kojto 111:4336505e4b1c 43 /** \ingroup CMSIS_Core_FunctionInterface
Kojto 111:4336505e4b1c 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Kojto 111:4336505e4b1c 45 @{
Kojto 111:4336505e4b1c 46 */
Kojto 111:4336505e4b1c 47
Kojto 111:4336505e4b1c 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Kojto 111:4336505e4b1c 49 /* ARM armcc specific functions */
Kojto 111:4336505e4b1c 50
Kojto 111:4336505e4b1c 51 #if (__ARMCC_VERSION < 400677)
Kojto 111:4336505e4b1c 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Kojto 111:4336505e4b1c 53 #endif
Kojto 111:4336505e4b1c 54
Kojto 111:4336505e4b1c 55 /* intrinsic void __enable_irq(); */
Kojto 111:4336505e4b1c 56 /* intrinsic void __disable_irq(); */
Kojto 111:4336505e4b1c 57
Kojto 111:4336505e4b1c 58 /** \brief Get Control Register
Kojto 111:4336505e4b1c 59
Kojto 111:4336505e4b1c 60 This function returns the content of the Control Register.
Kojto 111:4336505e4b1c 61
Kojto 111:4336505e4b1c 62 \return Control Register value
Kojto 111:4336505e4b1c 63 */
Kojto 111:4336505e4b1c 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 111:4336505e4b1c 65 {
Kojto 111:4336505e4b1c 66 register uint32_t __regControl __ASM("control");
Kojto 111:4336505e4b1c 67 return(__regControl);
Kojto 111:4336505e4b1c 68 }
Kojto 111:4336505e4b1c 69
Kojto 111:4336505e4b1c 70
Kojto 111:4336505e4b1c 71 /** \brief Set Control Register
Kojto 111:4336505e4b1c 72
Kojto 111:4336505e4b1c 73 This function writes the given value to the Control Register.
Kojto 111:4336505e4b1c 74
Kojto 111:4336505e4b1c 75 \param [in] control Control Register value to set
Kojto 111:4336505e4b1c 76 */
Kojto 111:4336505e4b1c 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 111:4336505e4b1c 78 {
Kojto 111:4336505e4b1c 79 register uint32_t __regControl __ASM("control");
Kojto 111:4336505e4b1c 80 __regControl = control;
Kojto 111:4336505e4b1c 81 }
Kojto 111:4336505e4b1c 82
Kojto 111:4336505e4b1c 83
Kojto 111:4336505e4b1c 84 /** \brief Get IPSR Register
Kojto 111:4336505e4b1c 85
Kojto 111:4336505e4b1c 86 This function returns the content of the IPSR Register.
Kojto 111:4336505e4b1c 87
Kojto 111:4336505e4b1c 88 \return IPSR Register value
Kojto 111:4336505e4b1c 89 */
Kojto 111:4336505e4b1c 90 __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 111:4336505e4b1c 91 {
Kojto 111:4336505e4b1c 92 register uint32_t __regIPSR __ASM("ipsr");
Kojto 111:4336505e4b1c 93 return(__regIPSR);
Kojto 111:4336505e4b1c 94 }
Kojto 111:4336505e4b1c 95
Kojto 111:4336505e4b1c 96
Kojto 111:4336505e4b1c 97 /** \brief Get APSR Register
Kojto 111:4336505e4b1c 98
Kojto 111:4336505e4b1c 99 This function returns the content of the APSR Register.
Kojto 111:4336505e4b1c 100
Kojto 111:4336505e4b1c 101 \return APSR Register value
Kojto 111:4336505e4b1c 102 */
Kojto 111:4336505e4b1c 103 __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 111:4336505e4b1c 104 {
Kojto 111:4336505e4b1c 105 register uint32_t __regAPSR __ASM("apsr");
Kojto 111:4336505e4b1c 106 return(__regAPSR);
Kojto 111:4336505e4b1c 107 }
Kojto 111:4336505e4b1c 108
Kojto 111:4336505e4b1c 109
Kojto 111:4336505e4b1c 110 /** \brief Get xPSR Register
Kojto 111:4336505e4b1c 111
Kojto 111:4336505e4b1c 112 This function returns the content of the xPSR Register.
Kojto 111:4336505e4b1c 113
Kojto 111:4336505e4b1c 114 \return xPSR Register value
Kojto 111:4336505e4b1c 115 */
Kojto 111:4336505e4b1c 116 __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 111:4336505e4b1c 117 {
Kojto 111:4336505e4b1c 118 register uint32_t __regXPSR __ASM("xpsr");
Kojto 111:4336505e4b1c 119 return(__regXPSR);
Kojto 111:4336505e4b1c 120 }
Kojto 111:4336505e4b1c 121
Kojto 111:4336505e4b1c 122
Kojto 111:4336505e4b1c 123 /** \brief Get Process Stack Pointer
Kojto 111:4336505e4b1c 124
Kojto 111:4336505e4b1c 125 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 111:4336505e4b1c 126
Kojto 111:4336505e4b1c 127 \return PSP Register value
Kojto 111:4336505e4b1c 128 */
Kojto 111:4336505e4b1c 129 __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 111:4336505e4b1c 130 {
Kojto 111:4336505e4b1c 131 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 111:4336505e4b1c 132 return(__regProcessStackPointer);
Kojto 111:4336505e4b1c 133 }
Kojto 111:4336505e4b1c 134
Kojto 111:4336505e4b1c 135
Kojto 111:4336505e4b1c 136 /** \brief Set Process Stack Pointer
Kojto 111:4336505e4b1c 137
Kojto 111:4336505e4b1c 138 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 111:4336505e4b1c 139
Kojto 111:4336505e4b1c 140 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 111:4336505e4b1c 141 */
Kojto 111:4336505e4b1c 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 111:4336505e4b1c 143 {
Kojto 111:4336505e4b1c 144 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 111:4336505e4b1c 145 __regProcessStackPointer = topOfProcStack;
Kojto 111:4336505e4b1c 146 }
Kojto 111:4336505e4b1c 147
Kojto 111:4336505e4b1c 148
Kojto 111:4336505e4b1c 149 /** \brief Get Main Stack Pointer
Kojto 111:4336505e4b1c 150
Kojto 111:4336505e4b1c 151 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 111:4336505e4b1c 152
Kojto 111:4336505e4b1c 153 \return MSP Register value
Kojto 111:4336505e4b1c 154 */
Kojto 111:4336505e4b1c 155 __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 111:4336505e4b1c 156 {
Kojto 111:4336505e4b1c 157 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 111:4336505e4b1c 158 return(__regMainStackPointer);
Kojto 111:4336505e4b1c 159 }
Kojto 111:4336505e4b1c 160
Kojto 111:4336505e4b1c 161
Kojto 111:4336505e4b1c 162 /** \brief Set Main Stack Pointer
Kojto 111:4336505e4b1c 163
Kojto 111:4336505e4b1c 164 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 111:4336505e4b1c 165
Kojto 111:4336505e4b1c 166 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 111:4336505e4b1c 167 */
Kojto 111:4336505e4b1c 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 111:4336505e4b1c 169 {
Kojto 111:4336505e4b1c 170 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 111:4336505e4b1c 171 __regMainStackPointer = topOfMainStack;
Kojto 111:4336505e4b1c 172 }
Kojto 111:4336505e4b1c 173
Kojto 111:4336505e4b1c 174
Kojto 111:4336505e4b1c 175 /** \brief Get Priority Mask
Kojto 111:4336505e4b1c 176
Kojto 111:4336505e4b1c 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 111:4336505e4b1c 178
Kojto 111:4336505e4b1c 179 \return Priority Mask value
Kojto 111:4336505e4b1c 180 */
Kojto 111:4336505e4b1c 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 111:4336505e4b1c 182 {
Kojto 111:4336505e4b1c 183 register uint32_t __regPriMask __ASM("primask");
Kojto 111:4336505e4b1c 184 return(__regPriMask);
Kojto 111:4336505e4b1c 185 }
Kojto 111:4336505e4b1c 186
Kojto 111:4336505e4b1c 187
Kojto 111:4336505e4b1c 188 /** \brief Set Priority Mask
Kojto 111:4336505e4b1c 189
Kojto 111:4336505e4b1c 190 This function assigns the given value to the Priority Mask Register.
Kojto 111:4336505e4b1c 191
Kojto 111:4336505e4b1c 192 \param [in] priMask Priority Mask
Kojto 111:4336505e4b1c 193 */
Kojto 111:4336505e4b1c 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 111:4336505e4b1c 195 {
Kojto 111:4336505e4b1c 196 register uint32_t __regPriMask __ASM("primask");
Kojto 111:4336505e4b1c 197 __regPriMask = (priMask);
Kojto 111:4336505e4b1c 198 }
Kojto 111:4336505e4b1c 199
Kojto 111:4336505e4b1c 200
Kojto 111:4336505e4b1c 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 111:4336505e4b1c 202
Kojto 111:4336505e4b1c 203 /** \brief Enable FIQ
Kojto 111:4336505e4b1c 204
Kojto 111:4336505e4b1c 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 111:4336505e4b1c 206 Can only be executed in Privileged modes.
Kojto 111:4336505e4b1c 207 */
Kojto 111:4336505e4b1c 208 #define __enable_fault_irq __enable_fiq
Kojto 111:4336505e4b1c 209
Kojto 111:4336505e4b1c 210
Kojto 111:4336505e4b1c 211 /** \brief Disable FIQ
Kojto 111:4336505e4b1c 212
Kojto 111:4336505e4b1c 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 111:4336505e4b1c 214 Can only be executed in Privileged modes.
Kojto 111:4336505e4b1c 215 */
Kojto 111:4336505e4b1c 216 #define __disable_fault_irq __disable_fiq
Kojto 111:4336505e4b1c 217
Kojto 111:4336505e4b1c 218
Kojto 111:4336505e4b1c 219 /** \brief Get Base Priority
Kojto 111:4336505e4b1c 220
Kojto 111:4336505e4b1c 221 This function returns the current value of the Base Priority register.
Kojto 111:4336505e4b1c 222
Kojto 111:4336505e4b1c 223 \return Base Priority register value
Kojto 111:4336505e4b1c 224 */
Kojto 111:4336505e4b1c 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 111:4336505e4b1c 226 {
Kojto 111:4336505e4b1c 227 register uint32_t __regBasePri __ASM("basepri");
Kojto 111:4336505e4b1c 228 return(__regBasePri);
Kojto 111:4336505e4b1c 229 }
Kojto 111:4336505e4b1c 230
Kojto 111:4336505e4b1c 231
Kojto 111:4336505e4b1c 232 /** \brief Set Base Priority
Kojto 111:4336505e4b1c 233
Kojto 111:4336505e4b1c 234 This function assigns the given value to the Base Priority register.
Kojto 111:4336505e4b1c 235
Kojto 111:4336505e4b1c 236 \param [in] basePri Base Priority value to set
Kojto 111:4336505e4b1c 237 */
Kojto 111:4336505e4b1c 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
Kojto 111:4336505e4b1c 239 {
Kojto 111:4336505e4b1c 240 register uint32_t __regBasePri __ASM("basepri");
Kojto 111:4336505e4b1c 241 __regBasePri = (basePri & 0xff);
Kojto 111:4336505e4b1c 242 }
Kojto 111:4336505e4b1c 243
Kojto 111:4336505e4b1c 244
Kojto 111:4336505e4b1c 245 /** \brief Set Base Priority with condition
Kojto 111:4336505e4b1c 246
Kojto 111:4336505e4b1c 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 111:4336505e4b1c 248 or the new value increases the BASEPRI priority level.
Kojto 111:4336505e4b1c 249
Kojto 111:4336505e4b1c 250 \param [in] basePri Base Priority value to set
Kojto 111:4336505e4b1c 251 */
Kojto 111:4336505e4b1c 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 111:4336505e4b1c 253 {
Kojto 111:4336505e4b1c 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Kojto 111:4336505e4b1c 255 __regBasePriMax = (basePri & 0xff);
Kojto 111:4336505e4b1c 256 }
Kojto 111:4336505e4b1c 257
Kojto 111:4336505e4b1c 258
Kojto 111:4336505e4b1c 259 /** \brief Get Fault Mask
Kojto 111:4336505e4b1c 260
Kojto 111:4336505e4b1c 261 This function returns the current value of the Fault Mask register.
Kojto 111:4336505e4b1c 262
Kojto 111:4336505e4b1c 263 \return Fault Mask register value
Kojto 111:4336505e4b1c 264 */
Kojto 111:4336505e4b1c 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 111:4336505e4b1c 266 {
Kojto 111:4336505e4b1c 267 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 111:4336505e4b1c 268 return(__regFaultMask);
Kojto 111:4336505e4b1c 269 }
Kojto 111:4336505e4b1c 270
Kojto 111:4336505e4b1c 271
Kojto 111:4336505e4b1c 272 /** \brief Set Fault Mask
Kojto 111:4336505e4b1c 273
Kojto 111:4336505e4b1c 274 This function assigns the given value to the Fault Mask register.
Kojto 111:4336505e4b1c 275
Kojto 111:4336505e4b1c 276 \param [in] faultMask Fault Mask value to set
Kojto 111:4336505e4b1c 277 */
Kojto 111:4336505e4b1c 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 111:4336505e4b1c 279 {
Kojto 111:4336505e4b1c 280 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 111:4336505e4b1c 281 __regFaultMask = (faultMask & (uint32_t)1);
Kojto 111:4336505e4b1c 282 }
Kojto 111:4336505e4b1c 283
Kojto 111:4336505e4b1c 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Kojto 111:4336505e4b1c 285
Kojto 111:4336505e4b1c 286
Kojto 111:4336505e4b1c 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Kojto 111:4336505e4b1c 288
Kojto 111:4336505e4b1c 289 /** \brief Get FPSCR
Kojto 111:4336505e4b1c 290
Kojto 111:4336505e4b1c 291 This function returns the current value of the Floating Point Status/Control register.
Kojto 111:4336505e4b1c 292
Kojto 111:4336505e4b1c 293 \return Floating Point Status/Control register value
Kojto 111:4336505e4b1c 294 */
Kojto 111:4336505e4b1c 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 111:4336505e4b1c 296 {
Kojto 111:4336505e4b1c 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 111:4336505e4b1c 298 register uint32_t __regfpscr __ASM("fpscr");
Kojto 111:4336505e4b1c 299 return(__regfpscr);
Kojto 111:4336505e4b1c 300 #else
Kojto 111:4336505e4b1c 301 return(0);
Kojto 111:4336505e4b1c 302 #endif
Kojto 111:4336505e4b1c 303 }
Kojto 111:4336505e4b1c 304
Kojto 111:4336505e4b1c 305
Kojto 111:4336505e4b1c 306 /** \brief Set FPSCR
Kojto 111:4336505e4b1c 307
Kojto 111:4336505e4b1c 308 This function assigns the given value to the Floating Point Status/Control register.
Kojto 111:4336505e4b1c 309
Kojto 111:4336505e4b1c 310 \param [in] fpscr Floating Point Status/Control value to set
Kojto 111:4336505e4b1c 311 */
Kojto 111:4336505e4b1c 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 111:4336505e4b1c 313 {
Kojto 111:4336505e4b1c 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 111:4336505e4b1c 315 register uint32_t __regfpscr __ASM("fpscr");
Kojto 111:4336505e4b1c 316 __regfpscr = (fpscr);
Kojto 111:4336505e4b1c 317 #endif
Kojto 111:4336505e4b1c 318 }
Kojto 111:4336505e4b1c 319
Kojto 111:4336505e4b1c 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 111:4336505e4b1c 321
Kojto 111:4336505e4b1c 322
Kojto 111:4336505e4b1c 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Kojto 111:4336505e4b1c 324 /* GNU gcc specific functions */
Kojto 111:4336505e4b1c 325
Kojto 111:4336505e4b1c 326 /** \brief Enable IRQ Interrupts
Kojto 111:4336505e4b1c 327
Kojto 111:4336505e4b1c 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Kojto 111:4336505e4b1c 329 Can only be executed in Privileged modes.
Kojto 111:4336505e4b1c 330 */
Kojto 111:4336505e4b1c 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
Kojto 111:4336505e4b1c 332 {
Kojto 111:4336505e4b1c 333 __ASM volatile ("cpsie i" : : : "memory");
Kojto 111:4336505e4b1c 334 }
Kojto 111:4336505e4b1c 335
Kojto 111:4336505e4b1c 336
Kojto 111:4336505e4b1c 337 /** \brief Disable IRQ Interrupts
Kojto 111:4336505e4b1c 338
Kojto 111:4336505e4b1c 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
Kojto 111:4336505e4b1c 340 Can only be executed in Privileged modes.
Kojto 111:4336505e4b1c 341 */
Kojto 111:4336505e4b1c 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
Kojto 111:4336505e4b1c 343 {
Kojto 111:4336505e4b1c 344 __ASM volatile ("cpsid i" : : : "memory");
Kojto 111:4336505e4b1c 345 }
Kojto 111:4336505e4b1c 346
Kojto 111:4336505e4b1c 347
Kojto 111:4336505e4b1c 348 /** \brief Get Control Register
Kojto 111:4336505e4b1c 349
Kojto 111:4336505e4b1c 350 This function returns the content of the Control Register.
Kojto 111:4336505e4b1c 351
Kojto 111:4336505e4b1c 352 \return Control Register value
Kojto 111:4336505e4b1c 353 */
Kojto 111:4336505e4b1c 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 111:4336505e4b1c 355 {
Kojto 111:4336505e4b1c 356 uint32_t result;
Kojto 111:4336505e4b1c 357
Kojto 111:4336505e4b1c 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
Kojto 111:4336505e4b1c 359 return(result);
Kojto 111:4336505e4b1c 360 }
Kojto 111:4336505e4b1c 361
Kojto 111:4336505e4b1c 362
Kojto 111:4336505e4b1c 363 /** \brief Set Control Register
Kojto 111:4336505e4b1c 364
Kojto 111:4336505e4b1c 365 This function writes the given value to the Control Register.
Kojto 111:4336505e4b1c 366
Kojto 111:4336505e4b1c 367 \param [in] control Control Register value to set
Kojto 111:4336505e4b1c 368 */
Kojto 111:4336505e4b1c 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 111:4336505e4b1c 370 {
Kojto 111:4336505e4b1c 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
Kojto 111:4336505e4b1c 372 }
Kojto 111:4336505e4b1c 373
Kojto 111:4336505e4b1c 374
Kojto 111:4336505e4b1c 375 /** \brief Get IPSR Register
Kojto 111:4336505e4b1c 376
Kojto 111:4336505e4b1c 377 This function returns the content of the IPSR Register.
Kojto 111:4336505e4b1c 378
Kojto 111:4336505e4b1c 379 \return IPSR Register value
Kojto 111:4336505e4b1c 380 */
Kojto 111:4336505e4b1c 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 111:4336505e4b1c 382 {
Kojto 111:4336505e4b1c 383 uint32_t result;
Kojto 111:4336505e4b1c 384
Kojto 111:4336505e4b1c 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Kojto 111:4336505e4b1c 386 return(result);
Kojto 111:4336505e4b1c 387 }
Kojto 111:4336505e4b1c 388
Kojto 111:4336505e4b1c 389
Kojto 111:4336505e4b1c 390 /** \brief Get APSR Register
Kojto 111:4336505e4b1c 391
Kojto 111:4336505e4b1c 392 This function returns the content of the APSR Register.
Kojto 111:4336505e4b1c 393
Kojto 111:4336505e4b1c 394 \return APSR Register value
Kojto 111:4336505e4b1c 395 */
Kojto 111:4336505e4b1c 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 111:4336505e4b1c 397 {
Kojto 111:4336505e4b1c 398 uint32_t result;
Kojto 111:4336505e4b1c 399
Kojto 111:4336505e4b1c 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Kojto 111:4336505e4b1c 401 return(result);
Kojto 111:4336505e4b1c 402 }
Kojto 111:4336505e4b1c 403
Kojto 111:4336505e4b1c 404
Kojto 111:4336505e4b1c 405 /** \brief Get xPSR Register
Kojto 111:4336505e4b1c 406
Kojto 111:4336505e4b1c 407 This function returns the content of the xPSR Register.
Kojto 111:4336505e4b1c 408
Kojto 111:4336505e4b1c 409 \return xPSR Register value
Kojto 111:4336505e4b1c 410 */
Kojto 111:4336505e4b1c 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 111:4336505e4b1c 412 {
Kojto 111:4336505e4b1c 413 uint32_t result;
Kojto 111:4336505e4b1c 414
Kojto 111:4336505e4b1c 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Kojto 111:4336505e4b1c 416 return(result);
Kojto 111:4336505e4b1c 417 }
Kojto 111:4336505e4b1c 418
Kojto 111:4336505e4b1c 419
Kojto 111:4336505e4b1c 420 /** \brief Get Process Stack Pointer
Kojto 111:4336505e4b1c 421
Kojto 111:4336505e4b1c 422 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 111:4336505e4b1c 423
Kojto 111:4336505e4b1c 424 \return PSP Register value
Kojto 111:4336505e4b1c 425 */
Kojto 111:4336505e4b1c 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 111:4336505e4b1c 427 {
Kojto 111:4336505e4b1c 428 register uint32_t result;
Kojto 111:4336505e4b1c 429
Kojto 111:4336505e4b1c 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
Kojto 111:4336505e4b1c 431 return(result);
Kojto 111:4336505e4b1c 432 }
Kojto 111:4336505e4b1c 433
Kojto 111:4336505e4b1c 434
Kojto 111:4336505e4b1c 435 /** \brief Set Process Stack Pointer
Kojto 111:4336505e4b1c 436
Kojto 111:4336505e4b1c 437 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 111:4336505e4b1c 438
Kojto 111:4336505e4b1c 439 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 111:4336505e4b1c 440 */
Kojto 111:4336505e4b1c 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 111:4336505e4b1c 442 {
Kojto 111:4336505e4b1c 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
Kojto 111:4336505e4b1c 444 }
Kojto 111:4336505e4b1c 445
Kojto 111:4336505e4b1c 446
Kojto 111:4336505e4b1c 447 /** \brief Get Main Stack Pointer
Kojto 111:4336505e4b1c 448
Kojto 111:4336505e4b1c 449 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 111:4336505e4b1c 450
Kojto 111:4336505e4b1c 451 \return MSP Register value
Kojto 111:4336505e4b1c 452 */
Kojto 111:4336505e4b1c 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 111:4336505e4b1c 454 {
Kojto 111:4336505e4b1c 455 register uint32_t result;
Kojto 111:4336505e4b1c 456
Kojto 111:4336505e4b1c 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
Kojto 111:4336505e4b1c 458 return(result);
Kojto 111:4336505e4b1c 459 }
Kojto 111:4336505e4b1c 460
Kojto 111:4336505e4b1c 461
Kojto 111:4336505e4b1c 462 /** \brief Set Main Stack Pointer
Kojto 111:4336505e4b1c 463
Kojto 111:4336505e4b1c 464 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 111:4336505e4b1c 465
Kojto 111:4336505e4b1c 466 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 111:4336505e4b1c 467 */
Kojto 111:4336505e4b1c 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 111:4336505e4b1c 469 {
Kojto 111:4336505e4b1c 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
Kojto 111:4336505e4b1c 471 }
Kojto 111:4336505e4b1c 472
Kojto 111:4336505e4b1c 473
Kojto 111:4336505e4b1c 474 /** \brief Get Priority Mask
Kojto 111:4336505e4b1c 475
Kojto 111:4336505e4b1c 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 111:4336505e4b1c 477
Kojto 111:4336505e4b1c 478 \return Priority Mask value
Kojto 111:4336505e4b1c 479 */
Kojto 111:4336505e4b1c 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 111:4336505e4b1c 481 {
Kojto 111:4336505e4b1c 482 uint32_t result;
Kojto 111:4336505e4b1c 483
Kojto 111:4336505e4b1c 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Kojto 111:4336505e4b1c 485 return(result);
Kojto 111:4336505e4b1c 486 }
Kojto 111:4336505e4b1c 487
Kojto 111:4336505e4b1c 488
Kojto 111:4336505e4b1c 489 /** \brief Set Priority Mask
Kojto 111:4336505e4b1c 490
Kojto 111:4336505e4b1c 491 This function assigns the given value to the Priority Mask Register.
Kojto 111:4336505e4b1c 492
Kojto 111:4336505e4b1c 493 \param [in] priMask Priority Mask
Kojto 111:4336505e4b1c 494 */
Kojto 111:4336505e4b1c 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 111:4336505e4b1c 496 {
Kojto 111:4336505e4b1c 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
Kojto 111:4336505e4b1c 498 }
Kojto 111:4336505e4b1c 499
Kojto 111:4336505e4b1c 500
Kojto 111:4336505e4b1c 501 #if (__CORTEX_M >= 0x03)
Kojto 111:4336505e4b1c 502
Kojto 111:4336505e4b1c 503 /** \brief Enable FIQ
Kojto 111:4336505e4b1c 504
Kojto 111:4336505e4b1c 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 111:4336505e4b1c 506 Can only be executed in Privileged modes.
Kojto 111:4336505e4b1c 507 */
Kojto 111:4336505e4b1c 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
Kojto 111:4336505e4b1c 509 {
Kojto 111:4336505e4b1c 510 __ASM volatile ("cpsie f" : : : "memory");
Kojto 111:4336505e4b1c 511 }
Kojto 111:4336505e4b1c 512
Kojto 111:4336505e4b1c 513
Kojto 111:4336505e4b1c 514 /** \brief Disable FIQ
Kojto 111:4336505e4b1c 515
Kojto 111:4336505e4b1c 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 111:4336505e4b1c 517 Can only be executed in Privileged modes.
Kojto 111:4336505e4b1c 518 */
Kojto 111:4336505e4b1c 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
Kojto 111:4336505e4b1c 520 {
Kojto 111:4336505e4b1c 521 __ASM volatile ("cpsid f" : : : "memory");
Kojto 111:4336505e4b1c 522 }
Kojto 111:4336505e4b1c 523
Kojto 111:4336505e4b1c 524
Kojto 111:4336505e4b1c 525 /** \brief Get Base Priority
Kojto 111:4336505e4b1c 526
Kojto 111:4336505e4b1c 527 This function returns the current value of the Base Priority register.
Kojto 111:4336505e4b1c 528
Kojto 111:4336505e4b1c 529 \return Base Priority register value
Kojto 111:4336505e4b1c 530 */
Kojto 111:4336505e4b1c 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 111:4336505e4b1c 532 {
Kojto 111:4336505e4b1c 533 uint32_t result;
Kojto 111:4336505e4b1c 534
Kojto 111:4336505e4b1c 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
Kojto 111:4336505e4b1c 536 return(result);
Kojto 111:4336505e4b1c 537 }
Kojto 111:4336505e4b1c 538
Kojto 111:4336505e4b1c 539
Kojto 111:4336505e4b1c 540 /** \brief Set Base Priority
Kojto 111:4336505e4b1c 541
Kojto 111:4336505e4b1c 542 This function assigns the given value to the Base Priority register.
Kojto 111:4336505e4b1c 543
Kojto 111:4336505e4b1c 544 \param [in] basePri Base Priority value to set
Kojto 111:4336505e4b1c 545 */
Kojto 111:4336505e4b1c 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
Kojto 111:4336505e4b1c 547 {
Kojto 111:4336505e4b1c 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
Kojto 111:4336505e4b1c 549 }
Kojto 111:4336505e4b1c 550
Kojto 111:4336505e4b1c 551
Kojto 111:4336505e4b1c 552 /** \brief Set Base Priority with condition
Kojto 111:4336505e4b1c 553
Kojto 111:4336505e4b1c 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 111:4336505e4b1c 555 or the new value increases the BASEPRI priority level.
Kojto 111:4336505e4b1c 556
Kojto 111:4336505e4b1c 557 \param [in] basePri Base Priority value to set
Kojto 111:4336505e4b1c 558 */
Kojto 111:4336505e4b1c 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Kojto 111:4336505e4b1c 560 {
Kojto 111:4336505e4b1c 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Kojto 111:4336505e4b1c 562 }
Kojto 111:4336505e4b1c 563
Kojto 111:4336505e4b1c 564
Kojto 111:4336505e4b1c 565 /** \brief Get Fault Mask
Kojto 111:4336505e4b1c 566
Kojto 111:4336505e4b1c 567 This function returns the current value of the Fault Mask register.
Kojto 111:4336505e4b1c 568
Kojto 111:4336505e4b1c 569 \return Fault Mask register value
Kojto 111:4336505e4b1c 570 */
Kojto 111:4336505e4b1c 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 111:4336505e4b1c 572 {
Kojto 111:4336505e4b1c 573 uint32_t result;
Kojto 111:4336505e4b1c 574
Kojto 111:4336505e4b1c 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Kojto 111:4336505e4b1c 576 return(result);
Kojto 111:4336505e4b1c 577 }
Kojto 111:4336505e4b1c 578
Kojto 111:4336505e4b1c 579
Kojto 111:4336505e4b1c 580 /** \brief Set Fault Mask
Kojto 111:4336505e4b1c 581
Kojto 111:4336505e4b1c 582 This function assigns the given value to the Fault Mask register.
Kojto 111:4336505e4b1c 583
Kojto 111:4336505e4b1c 584 \param [in] faultMask Fault Mask value to set
Kojto 111:4336505e4b1c 585 */
Kojto 111:4336505e4b1c 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 111:4336505e4b1c 587 {
Kojto 111:4336505e4b1c 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
Kojto 111:4336505e4b1c 589 }
Kojto 111:4336505e4b1c 590
Kojto 111:4336505e4b1c 591 #endif /* (__CORTEX_M >= 0x03) */
Kojto 111:4336505e4b1c 592
Kojto 111:4336505e4b1c 593
Kojto 111:4336505e4b1c 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Kojto 111:4336505e4b1c 595
Kojto 111:4336505e4b1c 596 /** \brief Get FPSCR
Kojto 111:4336505e4b1c 597
Kojto 111:4336505e4b1c 598 This function returns the current value of the Floating Point Status/Control register.
Kojto 111:4336505e4b1c 599
Kojto 111:4336505e4b1c 600 \return Floating Point Status/Control register value
Kojto 111:4336505e4b1c 601 */
Kojto 111:4336505e4b1c 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 111:4336505e4b1c 603 {
Kojto 111:4336505e4b1c 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 111:4336505e4b1c 605 uint32_t result;
Kojto 111:4336505e4b1c 606
Kojto 111:4336505e4b1c 607 /* Empty asm statement works as a scheduling barrier */
Kojto 111:4336505e4b1c 608 __ASM volatile ("");
Kojto 111:4336505e4b1c 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
Kojto 111:4336505e4b1c 610 __ASM volatile ("");
Kojto 111:4336505e4b1c 611 return(result);
Kojto 111:4336505e4b1c 612 #else
Kojto 111:4336505e4b1c 613 return(0);
Kojto 111:4336505e4b1c 614 #endif
Kojto 111:4336505e4b1c 615 }
Kojto 111:4336505e4b1c 616
Kojto 111:4336505e4b1c 617
Kojto 111:4336505e4b1c 618 /** \brief Set FPSCR
Kojto 111:4336505e4b1c 619
Kojto 111:4336505e4b1c 620 This function assigns the given value to the Floating Point Status/Control register.
Kojto 111:4336505e4b1c 621
Kojto 111:4336505e4b1c 622 \param [in] fpscr Floating Point Status/Control value to set
Kojto 111:4336505e4b1c 623 */
Kojto 111:4336505e4b1c 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 111:4336505e4b1c 625 {
Kojto 111:4336505e4b1c 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 111:4336505e4b1c 627 /* Empty asm statement works as a scheduling barrier */
Kojto 111:4336505e4b1c 628 __ASM volatile ("");
Kojto 111:4336505e4b1c 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
Kojto 111:4336505e4b1c 630 __ASM volatile ("");
Kojto 111:4336505e4b1c 631 #endif
Kojto 111:4336505e4b1c 632 }
Kojto 111:4336505e4b1c 633
Kojto 111:4336505e4b1c 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 111:4336505e4b1c 635
Kojto 111:4336505e4b1c 636
Kojto 111:4336505e4b1c 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 111:4336505e4b1c 638 /* IAR iccarm specific functions */
Kojto 111:4336505e4b1c 639 #include <cmsis_iar.h>
Kojto 111:4336505e4b1c 640
Kojto 111:4336505e4b1c 641
Kojto 111:4336505e4b1c 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 111:4336505e4b1c 643 /* TI CCS specific functions */
Kojto 111:4336505e4b1c 644 #include <cmsis_ccs.h>
Kojto 111:4336505e4b1c 645
Kojto 111:4336505e4b1c 646
Kojto 111:4336505e4b1c 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Kojto 111:4336505e4b1c 648 /* TASKING carm specific functions */
Kojto 111:4336505e4b1c 649 /*
Kojto 111:4336505e4b1c 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 111:4336505e4b1c 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
Kojto 111:4336505e4b1c 652 * Including the CMSIS ones.
Kojto 111:4336505e4b1c 653 */
Kojto 111:4336505e4b1c 654
Kojto 111:4336505e4b1c 655
Kojto 111:4336505e4b1c 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 111:4336505e4b1c 657 /* Cosmic specific functions */
Kojto 111:4336505e4b1c 658 #include <cmsis_csm.h>
Kojto 111:4336505e4b1c 659
Kojto 111:4336505e4b1c 660 #endif
Kojto 111:4336505e4b1c 661
Kojto 111:4336505e4b1c 662 /*@} end of CMSIS_Core_RegAccFunctions */
Kojto 111:4336505e4b1c 663
Kojto 111:4336505e4b1c 664 #endif /* __CORE_CMFUNC_H */