mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_SAMR21G18A/core_ca9.h@140:97feb9bacc10, 2017-04-12 (annotated)

Committer:
<>
Date:
Wed Apr 12 16:07:08 2017 +0100
Revision:
140:97feb9bacc10
Parent:
115:87f2f5183dfb 
Release 140 of the mbed library



Ports for Upcoming Targets



3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841

3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992



Fixes and Changes



3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951

4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021

3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979

3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the  https://github.com/ARMmbed/mbed-os/pull/3990

4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003

4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012

4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020

4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065

4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014

4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030

4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109

3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 111:4336505e4b1c 1 /**************************************************************************//**
Kojto 111:4336505e4b1c 2 * @file core_ca9.h
Kojto 111:4336505e4b1c 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
Kojto 111:4336505e4b1c 4 * @version
Kojto 111:4336505e4b1c 5 * @date 25 March 2013
Kojto 111:4336505e4b1c 6 *
Kojto 111:4336505e4b1c 7 * @note
Kojto 111:4336505e4b1c 8 *
Kojto 111:4336505e4b1c 9 ******************************************************************************/
Kojto 111:4336505e4b1c 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
Kojto 111:4336505e4b1c 11
Kojto 111:4336505e4b1c 12 All rights reserved.
Kojto 111:4336505e4b1c 13 Redistribution and use in source and binary forms, with or without
Kojto 111:4336505e4b1c 14 modification, are permitted provided that the following conditions are met:
Kojto 111:4336505e4b1c 15 - Redistributions of source code must retain the above copyright
Kojto 111:4336505e4b1c 16 notice, this list of conditions and the following disclaimer.
Kojto 111:4336505e4b1c 17 - Redistributions in binary form must reproduce the above copyright
Kojto 111:4336505e4b1c 18 notice, this list of conditions and the following disclaimer in the
Kojto 111:4336505e4b1c 19 documentation and/or other materials provided with the distribution.
Kojto 111:4336505e4b1c 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 111:4336505e4b1c 21 to endorse or promote products derived from this software without
Kojto 111:4336505e4b1c 22 specific prior written permission.
Kojto 111:4336505e4b1c 23 *
Kojto 111:4336505e4b1c 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 111:4336505e4b1c 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 111:4336505e4b1c 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 111:4336505e4b1c 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 111:4336505e4b1c 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 111:4336505e4b1c 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 111:4336505e4b1c 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 111:4336505e4b1c 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 111:4336505e4b1c 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 111:4336505e4b1c 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 111:4336505e4b1c 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 111:4336505e4b1c 35 ---------------------------------------------------------------------------*/
Kojto 111:4336505e4b1c 36
Kojto 111:4336505e4b1c 37
Kojto 111:4336505e4b1c 38 #if defined ( __ICCARM__ )
Kojto 111:4336505e4b1c 39 #pragma system_include /* treat file as system include file for MISRA check */
Kojto 111:4336505e4b1c 40 #endif
Kojto 111:4336505e4b1c 41
Kojto 111:4336505e4b1c 42 #ifdef __cplusplus
Kojto 111:4336505e4b1c 43 extern "C" {
Kojto 111:4336505e4b1c 44 #endif
Kojto 111:4336505e4b1c 45
Kojto 111:4336505e4b1c 46 #ifndef __CORE_CA9_H_GENERIC
Kojto 111:4336505e4b1c 47 #define __CORE_CA9_H_GENERIC
Kojto 111:4336505e4b1c 48
Kojto 111:4336505e4b1c 49
Kojto 111:4336505e4b1c 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
Kojto 111:4336505e4b1c 51 CMSIS violates the following MISRA-C:2004 rules:
Kojto 111:4336505e4b1c 52
Kojto 111:4336505e4b1c 53 \li Required Rule 8.5, object/function definition in header file.<br>
Kojto 111:4336505e4b1c 54 Function definitions in header files are used to allow 'inlining'.
Kojto 111:4336505e4b1c 55
Kojto 111:4336505e4b1c 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Kojto 111:4336505e4b1c 57 Unions are used for effective representation of core registers.
Kojto 111:4336505e4b1c 58
Kojto 111:4336505e4b1c 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
Kojto 111:4336505e4b1c 60 Function-like macros are used to allow more efficient code.
Kojto 111:4336505e4b1c 61 */
Kojto 111:4336505e4b1c 62
Kojto 111:4336505e4b1c 63
Kojto 111:4336505e4b1c 64 /*******************************************************************************
Kojto 111:4336505e4b1c 65 * CMSIS definitions
Kojto 111:4336505e4b1c 66 ******************************************************************************/
Kojto 111:4336505e4b1c 67 /** \ingroup Cortex_A9
Kojto 111:4336505e4b1c 68 @{
Kojto 111:4336505e4b1c 69 */
Kojto 111:4336505e4b1c 70
Kojto 111:4336505e4b1c 71 /* CMSIS CA9 definitions */
Kojto 111:4336505e4b1c 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
Kojto 111:4336505e4b1c 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
Kojto 111:4336505e4b1c 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
Kojto 111:4336505e4b1c 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
Kojto 111:4336505e4b1c 76
Kojto 111:4336505e4b1c 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
Kojto 111:4336505e4b1c 78
Kojto 111:4336505e4b1c 79
Kojto 111:4336505e4b1c 80 #if defined ( __CC_ARM )
Kojto 111:4336505e4b1c 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
Kojto 111:4336505e4b1c 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
Kojto 111:4336505e4b1c 83 #define __STATIC_INLINE static __inline
Kojto 111:4336505e4b1c 84 #define __STATIC_ASM static __asm
Kojto 111:4336505e4b1c 85
Kojto 111:4336505e4b1c 86 #elif defined ( __ICCARM__ )
Kojto 111:4336505e4b1c 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
Kojto 111:4336505e4b1c 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
Kojto 111:4336505e4b1c 89 #define __STATIC_INLINE static inline
Kojto 111:4336505e4b1c 90 #define __STATIC_ASM static __asm
Kojto 111:4336505e4b1c 91
Kojto 115:87f2f5183dfb 92 #include <stdint.h>
Kojto 115:87f2f5183dfb 93 inline uint32_t __get_PSR(void) {
Kojto 115:87f2f5183dfb 94 __ASM("mrs r0, cpsr");
Kojto 115:87f2f5183dfb 95 }
Kojto 115:87f2f5183dfb 96
Kojto 111:4336505e4b1c 97 #elif defined ( __TMS470__ )
Kojto 111:4336505e4b1c 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
Kojto 111:4336505e4b1c 99 #define __STATIC_INLINE static inline
Kojto 111:4336505e4b1c 100 #define __STATIC_ASM static __asm
Kojto 111:4336505e4b1c 101
Kojto 111:4336505e4b1c 102 #elif defined ( __GNUC__ )
Kojto 111:4336505e4b1c 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
Kojto 111:4336505e4b1c 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
Kojto 111:4336505e4b1c 105 #define __STATIC_INLINE static inline
Kojto 111:4336505e4b1c 106 #define __STATIC_ASM static __asm
Kojto 111:4336505e4b1c 107
Kojto 111:4336505e4b1c 108 #elif defined ( __TASKING__ )
Kojto 111:4336505e4b1c 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
Kojto 111:4336505e4b1c 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
Kojto 111:4336505e4b1c 111 #define __STATIC_INLINE static inline
Kojto 111:4336505e4b1c 112 #define __STATIC_ASM static __asm
Kojto 111:4336505e4b1c 113
Kojto 111:4336505e4b1c 114 #endif
Kojto 111:4336505e4b1c 115
Kojto 111:4336505e4b1c 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
Kojto 111:4336505e4b1c 117 */
Kojto 111:4336505e4b1c 118 #if defined ( __CC_ARM )
Kojto 111:4336505e4b1c 119 #if defined __TARGET_FPU_VFP
Kojto 111:4336505e4b1c 120 #if (__FPU_PRESENT == 1)
Kojto 111:4336505e4b1c 121 #define __FPU_USED 1
Kojto 111:4336505e4b1c 122 #else
Kojto 111:4336505e4b1c 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 111:4336505e4b1c 124 #define __FPU_USED 0
Kojto 111:4336505e4b1c 125 #endif
Kojto 111:4336505e4b1c 126 #else
Kojto 111:4336505e4b1c 127 #define __FPU_USED 0
Kojto 111:4336505e4b1c 128 #endif
Kojto 111:4336505e4b1c 129
Kojto 111:4336505e4b1c 130 #elif defined ( __ICCARM__ )
Kojto 111:4336505e4b1c 131 #if defined __ARMVFP__
Kojto 111:4336505e4b1c 132 #if (__FPU_PRESENT == 1)
Kojto 111:4336505e4b1c 133 #define __FPU_USED 1
Kojto 111:4336505e4b1c 134 #else
Kojto 111:4336505e4b1c 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 111:4336505e4b1c 136 #define __FPU_USED 0
Kojto 111:4336505e4b1c 137 #endif
Kojto 111:4336505e4b1c 138 #else
Kojto 111:4336505e4b1c 139 #define __FPU_USED 0
Kojto 111:4336505e4b1c 140 #endif
Kojto 111:4336505e4b1c 141
Kojto 111:4336505e4b1c 142 #elif defined ( __TMS470__ )
Kojto 111:4336505e4b1c 143 #if defined __TI_VFP_SUPPORT__
Kojto 111:4336505e4b1c 144 #if (__FPU_PRESENT == 1)
Kojto 111:4336505e4b1c 145 #define __FPU_USED 1
Kojto 111:4336505e4b1c 146 #else
Kojto 111:4336505e4b1c 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 111:4336505e4b1c 148 #define __FPU_USED 0
Kojto 111:4336505e4b1c 149 #endif
Kojto 111:4336505e4b1c 150 #else
Kojto 111:4336505e4b1c 151 #define __FPU_USED 0
Kojto 111:4336505e4b1c 152 #endif
Kojto 111:4336505e4b1c 153
Kojto 111:4336505e4b1c 154 #elif defined ( __GNUC__ )
Kojto 111:4336505e4b1c 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
Kojto 111:4336505e4b1c 156 #if (__FPU_PRESENT == 1)
Kojto 111:4336505e4b1c 157 #define __FPU_USED 1
Kojto 111:4336505e4b1c 158 #else
Kojto 111:4336505e4b1c 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 111:4336505e4b1c 160 #define __FPU_USED 0
Kojto 111:4336505e4b1c 161 #endif
Kojto 111:4336505e4b1c 162 #else
Kojto 111:4336505e4b1c 163 #define __FPU_USED 0
Kojto 111:4336505e4b1c 164 #endif
Kojto 111:4336505e4b1c 165
Kojto 111:4336505e4b1c 166 #elif defined ( __TASKING__ )
Kojto 111:4336505e4b1c 167 #if defined __FPU_VFP__
Kojto 111:4336505e4b1c 168 #if (__FPU_PRESENT == 1)
Kojto 111:4336505e4b1c 169 #define __FPU_USED 1
Kojto 111:4336505e4b1c 170 #else
Kojto 111:4336505e4b1c 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
Kojto 111:4336505e4b1c 172 #define __FPU_USED 0
Kojto 111:4336505e4b1c 173 #endif
Kojto 111:4336505e4b1c 174 #else
Kojto 111:4336505e4b1c 175 #define __FPU_USED 0
Kojto 111:4336505e4b1c 176 #endif
Kojto 111:4336505e4b1c 177 #endif
Kojto 111:4336505e4b1c 178
Kojto 111:4336505e4b1c 179 #include <stdint.h> /*!< standard types definitions */
Kojto 111:4336505e4b1c 180 #include "core_caInstr.h" /*!< Core Instruction Access */
Kojto 111:4336505e4b1c 181 #include "core_caFunc.h" /*!< Core Function Access */
Kojto 111:4336505e4b1c 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
Kojto 111:4336505e4b1c 183
Kojto 111:4336505e4b1c 184 #endif /* __CORE_CA9_H_GENERIC */
Kojto 111:4336505e4b1c 185
Kojto 111:4336505e4b1c 186 #ifndef __CMSIS_GENERIC
Kojto 111:4336505e4b1c 187
Kojto 111:4336505e4b1c 188 #ifndef __CORE_CA9_H_DEPENDANT
Kojto 111:4336505e4b1c 189 #define __CORE_CA9_H_DEPENDANT
Kojto 111:4336505e4b1c 190
Kojto 111:4336505e4b1c 191 /* check device defines and use defaults */
Kojto 111:4336505e4b1c 192 #if defined __CHECK_DEVICE_DEFINES
Kojto 111:4336505e4b1c 193 #ifndef __CA9_REV
Kojto 111:4336505e4b1c 194 #define __CA9_REV 0x0000
Kojto 111:4336505e4b1c 195 #warning "__CA9_REV not defined in device header file; using default!"
Kojto 111:4336505e4b1c 196 #endif
Kojto 111:4336505e4b1c 197
Kojto 111:4336505e4b1c 198 #ifndef __FPU_PRESENT
Kojto 111:4336505e4b1c 199 #define __FPU_PRESENT 1
Kojto 111:4336505e4b1c 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
Kojto 111:4336505e4b1c 201 #endif
Kojto 111:4336505e4b1c 202
Kojto 111:4336505e4b1c 203 #ifndef __Vendor_SysTickConfig
Kojto 111:4336505e4b1c 204 #define __Vendor_SysTickConfig 1
Kojto 111:4336505e4b1c 205 #endif
Kojto 111:4336505e4b1c 206
Kojto 111:4336505e4b1c 207 #if __Vendor_SysTickConfig == 0
Kojto 111:4336505e4b1c 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
Kojto 111:4336505e4b1c 209 #endif
Kojto 111:4336505e4b1c 210 #endif
Kojto 111:4336505e4b1c 211
Kojto 111:4336505e4b1c 212 /* IO definitions (access restrictions to peripheral registers) */
Kojto 111:4336505e4b1c 213 /**
Kojto 111:4336505e4b1c 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
Kojto 111:4336505e4b1c 215
Kojto 111:4336505e4b1c 216 <strong>IO Type Qualifiers</strong> are used
Kojto 111:4336505e4b1c 217 \li to specify the access to peripheral variables.
Kojto 111:4336505e4b1c 218 \li for automatic generation of peripheral register debug information.
Kojto 111:4336505e4b1c 219 */
Kojto 111:4336505e4b1c 220 #ifdef __cplusplus
Kojto 111:4336505e4b1c 221 #define __I volatile /*!< Defines 'read only' permissions */
Kojto 111:4336505e4b1c 222 #else
Kojto 111:4336505e4b1c 223 #define __I volatile const /*!< Defines 'read only' permissions */
Kojto 111:4336505e4b1c 224 #endif
Kojto 111:4336505e4b1c 225 #define __O volatile /*!< Defines 'write only' permissions */
Kojto 111:4336505e4b1c 226 #define __IO volatile /*!< Defines 'read / write' permissions */
Kojto 111:4336505e4b1c 227
Kojto 111:4336505e4b1c 228 /*@} end of group Cortex_A9 */
Kojto 111:4336505e4b1c 229
Kojto 111:4336505e4b1c 230
Kojto 111:4336505e4b1c 231 /*******************************************************************************
Kojto 111:4336505e4b1c 232 * Register Abstraction
Kojto 111:4336505e4b1c 233 ******************************************************************************/
Kojto 111:4336505e4b1c 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
Kojto 111:4336505e4b1c 235 \brief Type definitions and defines for Cortex-A processor based devices.
Kojto 111:4336505e4b1c 236 */
Kojto 111:4336505e4b1c 237
Kojto 111:4336505e4b1c 238 /** \ingroup CMSIS_core_register
Kojto 111:4336505e4b1c 239 \defgroup CMSIS_CORE Status and Control Registers
Kojto 111:4336505e4b1c 240 \brief Core Register type definitions.
Kojto 111:4336505e4b1c 241 @{
Kojto 111:4336505e4b1c 242 */
Kojto 111:4336505e4b1c 243
Kojto 111:4336505e4b1c 244 /** \brief Union type to access the Application Program Status Register (APSR).
Kojto 111:4336505e4b1c 245 */
Kojto 111:4336505e4b1c 246 typedef union
Kojto 111:4336505e4b1c 247 {
Kojto 111:4336505e4b1c 248 struct
Kojto 111:4336505e4b1c 249 {
Kojto 111:4336505e4b1c 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
Kojto 111:4336505e4b1c 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
Kojto 111:4336505e4b1c 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
Kojto 111:4336505e4b1c 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
Kojto 111:4336505e4b1c 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
Kojto 111:4336505e4b1c 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
Kojto 111:4336505e4b1c 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
Kojto 111:4336505e4b1c 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
Kojto 111:4336505e4b1c 258 } b; /*!< Structure used for bit access */
Kojto 111:4336505e4b1c 259 uint32_t w; /*!< Type used for word access */
Kojto 111:4336505e4b1c 260 } APSR_Type;
Kojto 111:4336505e4b1c 261
Kojto 111:4336505e4b1c 262
Kojto 111:4336505e4b1c 263 /*@} end of group CMSIS_CORE */
Kojto 111:4336505e4b1c 264
Kojto 111:4336505e4b1c 265 /*@} end of CMSIS_Core_FPUFunctions */
Kojto 111:4336505e4b1c 266
Kojto 111:4336505e4b1c 267
Kojto 111:4336505e4b1c 268 #endif /* __CORE_CA9_H_GENERIC */
Kojto 111:4336505e4b1c 269
Kojto 111:4336505e4b1c 270 #endif /* __CMSIS_GENERIC */
Kojto 111:4336505e4b1c 271
Kojto 111:4336505e4b1c 272 #ifdef __cplusplus
Kojto 111:4336505e4b1c 273 }
Kojto 111:4336505e4b1c 274
Kojto 111:4336505e4b1c 275
Kojto 111:4336505e4b1c 276 #endif