mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_KL46Z/core_cm4_simd.h@140:97feb9bacc10, 2017-04-12 (annotated)

Committer:
<>
Date:
Wed Apr 12 16:07:08 2017 +0100
Revision:
140:97feb9bacc10
Parent:
73:1efda918f0ba 
Release 140 of the mbed library



Ports for Upcoming Targets



3841: Add nRf52840 target https://github.com/ARMmbed/mbed-os/pull/3841

3992: Introducing UBLOX_C030 platform. https://github.com/ARMmbed/mbed-os/pull/3992



Fixes and Changes



3951: [NUCLEO_F303ZE] Correct ARDUINO pin https://github.com/ARMmbed/mbed-os/pull/3951

4021: Fixing a macro to detect when RTOS was in use for the NRF52840_DK https://github.com/ARMmbed/mbed-os/pull/4021

3979: KW24D: Add missing SPI defines and Arduino connector definitions https://github.com/ARMmbed/mbed-os/pull/3979

3990: UBLOX_C027: construct a ticker-based wait, rather than calling wait_ms(), in the  https://github.com/ARMmbed/mbed-os/pull/3990

4003: Fixed OBOE in async serial tx for NRF52 target, fixes #4002 https://github.com/ARMmbed/mbed-os/pull/4003

4012: STM32: Correct I2C master error handling https://github.com/ARMmbed/mbed-os/pull/4012

4020: NUCLEO_L011K4 remove unsupported tool chain files https://github.com/ARMmbed/mbed-os/pull/4020

4065: K66F: Move bss section to m_data_2 Section https://github.com/ARMmbed/mbed-os/pull/4065

4014: Issue 3763: Reduce heap allocation in the GCC linker file https://github.com/ARMmbed/mbed-os/pull/4014

4030: [STM32L0] reduce IAR heap and stack size for small targets https://github.com/ARMmbed/mbed-os/pull/4030

4109: NUCLEO_L476RG : minor serial pin update https://github.com/ARMmbed/mbed-os/pull/4109

3982: Ticker - kl25z bugfix for handling events in the past https://github.com/ARMmbed/mbed-os/pull/3982

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 73:1efda918f0ba 1 /**************************************************************************//**
bogdanm 73:1efda918f0ba 2 * @file core_cm4_simd.h
bogdanm 73:1efda918f0ba 3 * @brief CMSIS Cortex-M4 SIMD Header File
bogdanm 73:1efda918f0ba 4 * @version V3.20
bogdanm 73:1efda918f0ba 5 * @date 25. February 2013
bogdanm 73:1efda918f0ba 6 *
bogdanm 73:1efda918f0ba 7 * @note
bogdanm 73:1efda918f0ba 8 *
bogdanm 73:1efda918f0ba 9 ******************************************************************************/
bogdanm 73:1efda918f0ba 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 73:1efda918f0ba 11
bogdanm 73:1efda918f0ba 12 All rights reserved.
bogdanm 73:1efda918f0ba 13 Redistribution and use in source and binary forms, with or without
bogdanm 73:1efda918f0ba 14 modification, are permitted provided that the following conditions are met:
bogdanm 73:1efda918f0ba 15 - Redistributions of source code must retain the above copyright
bogdanm 73:1efda918f0ba 16 notice, this list of conditions and the following disclaimer.
bogdanm 73:1efda918f0ba 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 73:1efda918f0ba 18 notice, this list of conditions and the following disclaimer in the
bogdanm 73:1efda918f0ba 19 documentation and/or other materials provided with the distribution.
bogdanm 73:1efda918f0ba 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 73:1efda918f0ba 21 to endorse or promote products derived from this software without
bogdanm 73:1efda918f0ba 22 specific prior written permission.
bogdanm 73:1efda918f0ba 23 *
bogdanm 73:1efda918f0ba 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 73:1efda918f0ba 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 73:1efda918f0ba 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 73:1efda918f0ba 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 73:1efda918f0ba 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 73:1efda918f0ba 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 73:1efda918f0ba 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 73:1efda918f0ba 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 73:1efda918f0ba 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 73:1efda918f0ba 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 73:1efda918f0ba 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 73:1efda918f0ba 35 ---------------------------------------------------------------------------*/
bogdanm 73:1efda918f0ba 36
bogdanm 73:1efda918f0ba 37
bogdanm 73:1efda918f0ba 38 #ifdef __cplusplus
bogdanm 73:1efda918f0ba 39 extern "C" {
bogdanm 73:1efda918f0ba 40 #endif
bogdanm 73:1efda918f0ba 41
bogdanm 73:1efda918f0ba 42 #ifndef __CORE_CM4_SIMD_H
bogdanm 73:1efda918f0ba 43 #define __CORE_CM4_SIMD_H
bogdanm 73:1efda918f0ba 44
bogdanm 73:1efda918f0ba 45
bogdanm 73:1efda918f0ba 46 /*******************************************************************************
bogdanm 73:1efda918f0ba 47 * Hardware Abstraction Layer
bogdanm 73:1efda918f0ba 48 ******************************************************************************/
bogdanm 73:1efda918f0ba 49
bogdanm 73:1efda918f0ba 50
bogdanm 73:1efda918f0ba 51 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 73:1efda918f0ba 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 73:1efda918f0ba 53 Access to dedicated SIMD instructions
bogdanm 73:1efda918f0ba 54 @{
bogdanm 73:1efda918f0ba 55 */
bogdanm 73:1efda918f0ba 56
bogdanm 73:1efda918f0ba 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 73:1efda918f0ba 58 /* ARM armcc specific functions */
bogdanm 73:1efda918f0ba 59
bogdanm 73:1efda918f0ba 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 73:1efda918f0ba 61 #define __SADD8 __sadd8
bogdanm 73:1efda918f0ba 62 #define __QADD8 __qadd8
bogdanm 73:1efda918f0ba 63 #define __SHADD8 __shadd8
bogdanm 73:1efda918f0ba 64 #define __UADD8 __uadd8
bogdanm 73:1efda918f0ba 65 #define __UQADD8 __uqadd8
bogdanm 73:1efda918f0ba 66 #define __UHADD8 __uhadd8
bogdanm 73:1efda918f0ba 67 #define __SSUB8 __ssub8
bogdanm 73:1efda918f0ba 68 #define __QSUB8 __qsub8
bogdanm 73:1efda918f0ba 69 #define __SHSUB8 __shsub8
bogdanm 73:1efda918f0ba 70 #define __USUB8 __usub8
bogdanm 73:1efda918f0ba 71 #define __UQSUB8 __uqsub8
bogdanm 73:1efda918f0ba 72 #define __UHSUB8 __uhsub8
bogdanm 73:1efda918f0ba 73 #define __SADD16 __sadd16
bogdanm 73:1efda918f0ba 74 #define __QADD16 __qadd16
bogdanm 73:1efda918f0ba 75 #define __SHADD16 __shadd16
bogdanm 73:1efda918f0ba 76 #define __UADD16 __uadd16
bogdanm 73:1efda918f0ba 77 #define __UQADD16 __uqadd16
bogdanm 73:1efda918f0ba 78 #define __UHADD16 __uhadd16
bogdanm 73:1efda918f0ba 79 #define __SSUB16 __ssub16
bogdanm 73:1efda918f0ba 80 #define __QSUB16 __qsub16
bogdanm 73:1efda918f0ba 81 #define __SHSUB16 __shsub16
bogdanm 73:1efda918f0ba 82 #define __USUB16 __usub16
bogdanm 73:1efda918f0ba 83 #define __UQSUB16 __uqsub16
bogdanm 73:1efda918f0ba 84 #define __UHSUB16 __uhsub16
bogdanm 73:1efda918f0ba 85 #define __SASX __sasx
bogdanm 73:1efda918f0ba 86 #define __QASX __qasx
bogdanm 73:1efda918f0ba 87 #define __SHASX __shasx
bogdanm 73:1efda918f0ba 88 #define __UASX __uasx
bogdanm 73:1efda918f0ba 89 #define __UQASX __uqasx
bogdanm 73:1efda918f0ba 90 #define __UHASX __uhasx
bogdanm 73:1efda918f0ba 91 #define __SSAX __ssax
bogdanm 73:1efda918f0ba 92 #define __QSAX __qsax
bogdanm 73:1efda918f0ba 93 #define __SHSAX __shsax
bogdanm 73:1efda918f0ba 94 #define __USAX __usax
bogdanm 73:1efda918f0ba 95 #define __UQSAX __uqsax
bogdanm 73:1efda918f0ba 96 #define __UHSAX __uhsax
bogdanm 73:1efda918f0ba 97 #define __USAD8 __usad8
bogdanm 73:1efda918f0ba 98 #define __USADA8 __usada8
bogdanm 73:1efda918f0ba 99 #define __SSAT16 __ssat16
bogdanm 73:1efda918f0ba 100 #define __USAT16 __usat16
bogdanm 73:1efda918f0ba 101 #define __UXTB16 __uxtb16
bogdanm 73:1efda918f0ba 102 #define __UXTAB16 __uxtab16
bogdanm 73:1efda918f0ba 103 #define __SXTB16 __sxtb16
bogdanm 73:1efda918f0ba 104 #define __SXTAB16 __sxtab16
bogdanm 73:1efda918f0ba 105 #define __SMUAD __smuad
bogdanm 73:1efda918f0ba 106 #define __SMUADX __smuadx
bogdanm 73:1efda918f0ba 107 #define __SMLAD __smlad
bogdanm 73:1efda918f0ba 108 #define __SMLADX __smladx
bogdanm 73:1efda918f0ba 109 #define __SMLALD __smlald
bogdanm 73:1efda918f0ba 110 #define __SMLALDX __smlaldx
bogdanm 73:1efda918f0ba 111 #define __SMUSD __smusd
bogdanm 73:1efda918f0ba 112 #define __SMUSDX __smusdx
bogdanm 73:1efda918f0ba 113 #define __SMLSD __smlsd
bogdanm 73:1efda918f0ba 114 #define __SMLSDX __smlsdx
bogdanm 73:1efda918f0ba 115 #define __SMLSLD __smlsld
bogdanm 73:1efda918f0ba 116 #define __SMLSLDX __smlsldx
bogdanm 73:1efda918f0ba 117 #define __SEL __sel
bogdanm 73:1efda918f0ba 118 #define __QADD __qadd
bogdanm 73:1efda918f0ba 119 #define __QSUB __qsub
bogdanm 73:1efda918f0ba 120
bogdanm 73:1efda918f0ba 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 73:1efda918f0ba 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 73:1efda918f0ba 123
bogdanm 73:1efda918f0ba 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 73:1efda918f0ba 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 73:1efda918f0ba 126
bogdanm 73:1efda918f0ba 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 73:1efda918f0ba 128 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 73:1efda918f0ba 129
bogdanm 73:1efda918f0ba 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 73:1efda918f0ba 131
bogdanm 73:1efda918f0ba 132
bogdanm 73:1efda918f0ba 133
bogdanm 73:1efda918f0ba 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 73:1efda918f0ba 135 /* IAR iccarm specific functions */
bogdanm 73:1efda918f0ba 136
bogdanm 73:1efda918f0ba 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 73:1efda918f0ba 138 #include <cmsis_iar.h>
bogdanm 73:1efda918f0ba 139
bogdanm 73:1efda918f0ba 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 73:1efda918f0ba 141
bogdanm 73:1efda918f0ba 142
bogdanm 73:1efda918f0ba 143
bogdanm 73:1efda918f0ba 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 73:1efda918f0ba 145 /* TI CCS specific functions */
bogdanm 73:1efda918f0ba 146
bogdanm 73:1efda918f0ba 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 73:1efda918f0ba 148 #include <cmsis_ccs.h>
bogdanm 73:1efda918f0ba 149
bogdanm 73:1efda918f0ba 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 73:1efda918f0ba 151
bogdanm 73:1efda918f0ba 152
bogdanm 73:1efda918f0ba 153
bogdanm 73:1efda918f0ba 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 73:1efda918f0ba 155 /* GNU gcc specific functions */
bogdanm 73:1efda918f0ba 156
bogdanm 73:1efda918f0ba 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 73:1efda918f0ba 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 159 {
bogdanm 73:1efda918f0ba 160 uint32_t result;
bogdanm 73:1efda918f0ba 161
bogdanm 73:1efda918f0ba 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 163 return(result);
bogdanm 73:1efda918f0ba 164 }
bogdanm 73:1efda918f0ba 165
bogdanm 73:1efda918f0ba 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 167 {
bogdanm 73:1efda918f0ba 168 uint32_t result;
bogdanm 73:1efda918f0ba 169
bogdanm 73:1efda918f0ba 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 171 return(result);
bogdanm 73:1efda918f0ba 172 }
bogdanm 73:1efda918f0ba 173
bogdanm 73:1efda918f0ba 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 175 {
bogdanm 73:1efda918f0ba 176 uint32_t result;
bogdanm 73:1efda918f0ba 177
bogdanm 73:1efda918f0ba 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 179 return(result);
bogdanm 73:1efda918f0ba 180 }
bogdanm 73:1efda918f0ba 181
bogdanm 73:1efda918f0ba 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 183 {
bogdanm 73:1efda918f0ba 184 uint32_t result;
bogdanm 73:1efda918f0ba 185
bogdanm 73:1efda918f0ba 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 187 return(result);
bogdanm 73:1efda918f0ba 188 }
bogdanm 73:1efda918f0ba 189
bogdanm 73:1efda918f0ba 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 191 {
bogdanm 73:1efda918f0ba 192 uint32_t result;
bogdanm 73:1efda918f0ba 193
bogdanm 73:1efda918f0ba 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 195 return(result);
bogdanm 73:1efda918f0ba 196 }
bogdanm 73:1efda918f0ba 197
bogdanm 73:1efda918f0ba 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 199 {
bogdanm 73:1efda918f0ba 200 uint32_t result;
bogdanm 73:1efda918f0ba 201
bogdanm 73:1efda918f0ba 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 203 return(result);
bogdanm 73:1efda918f0ba 204 }
bogdanm 73:1efda918f0ba 205
bogdanm 73:1efda918f0ba 206
bogdanm 73:1efda918f0ba 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 208 {
bogdanm 73:1efda918f0ba 209 uint32_t result;
bogdanm 73:1efda918f0ba 210
bogdanm 73:1efda918f0ba 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 212 return(result);
bogdanm 73:1efda918f0ba 213 }
bogdanm 73:1efda918f0ba 214
bogdanm 73:1efda918f0ba 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 216 {
bogdanm 73:1efda918f0ba 217 uint32_t result;
bogdanm 73:1efda918f0ba 218
bogdanm 73:1efda918f0ba 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 220 return(result);
bogdanm 73:1efda918f0ba 221 }
bogdanm 73:1efda918f0ba 222
bogdanm 73:1efda918f0ba 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 224 {
bogdanm 73:1efda918f0ba 225 uint32_t result;
bogdanm 73:1efda918f0ba 226
bogdanm 73:1efda918f0ba 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 228 return(result);
bogdanm 73:1efda918f0ba 229 }
bogdanm 73:1efda918f0ba 230
bogdanm 73:1efda918f0ba 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 232 {
bogdanm 73:1efda918f0ba 233 uint32_t result;
bogdanm 73:1efda918f0ba 234
bogdanm 73:1efda918f0ba 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 236 return(result);
bogdanm 73:1efda918f0ba 237 }
bogdanm 73:1efda918f0ba 238
bogdanm 73:1efda918f0ba 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 240 {
bogdanm 73:1efda918f0ba 241 uint32_t result;
bogdanm 73:1efda918f0ba 242
bogdanm 73:1efda918f0ba 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 244 return(result);
bogdanm 73:1efda918f0ba 245 }
bogdanm 73:1efda918f0ba 246
bogdanm 73:1efda918f0ba 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 248 {
bogdanm 73:1efda918f0ba 249 uint32_t result;
bogdanm 73:1efda918f0ba 250
bogdanm 73:1efda918f0ba 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 252 return(result);
bogdanm 73:1efda918f0ba 253 }
bogdanm 73:1efda918f0ba 254
bogdanm 73:1efda918f0ba 255
bogdanm 73:1efda918f0ba 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 257 {
bogdanm 73:1efda918f0ba 258 uint32_t result;
bogdanm 73:1efda918f0ba 259
bogdanm 73:1efda918f0ba 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 261 return(result);
bogdanm 73:1efda918f0ba 262 }
bogdanm 73:1efda918f0ba 263
bogdanm 73:1efda918f0ba 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 265 {
bogdanm 73:1efda918f0ba 266 uint32_t result;
bogdanm 73:1efda918f0ba 267
bogdanm 73:1efda918f0ba 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 269 return(result);
bogdanm 73:1efda918f0ba 270 }
bogdanm 73:1efda918f0ba 271
bogdanm 73:1efda918f0ba 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 273 {
bogdanm 73:1efda918f0ba 274 uint32_t result;
bogdanm 73:1efda918f0ba 275
bogdanm 73:1efda918f0ba 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 277 return(result);
bogdanm 73:1efda918f0ba 278 }
bogdanm 73:1efda918f0ba 279
bogdanm 73:1efda918f0ba 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 281 {
bogdanm 73:1efda918f0ba 282 uint32_t result;
bogdanm 73:1efda918f0ba 283
bogdanm 73:1efda918f0ba 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 285 return(result);
bogdanm 73:1efda918f0ba 286 }
bogdanm 73:1efda918f0ba 287
bogdanm 73:1efda918f0ba 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 289 {
bogdanm 73:1efda918f0ba 290 uint32_t result;
bogdanm 73:1efda918f0ba 291
bogdanm 73:1efda918f0ba 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 293 return(result);
bogdanm 73:1efda918f0ba 294 }
bogdanm 73:1efda918f0ba 295
bogdanm 73:1efda918f0ba 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 297 {
bogdanm 73:1efda918f0ba 298 uint32_t result;
bogdanm 73:1efda918f0ba 299
bogdanm 73:1efda918f0ba 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 301 return(result);
bogdanm 73:1efda918f0ba 302 }
bogdanm 73:1efda918f0ba 303
bogdanm 73:1efda918f0ba 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 305 {
bogdanm 73:1efda918f0ba 306 uint32_t result;
bogdanm 73:1efda918f0ba 307
bogdanm 73:1efda918f0ba 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 309 return(result);
bogdanm 73:1efda918f0ba 310 }
bogdanm 73:1efda918f0ba 311
bogdanm 73:1efda918f0ba 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 313 {
bogdanm 73:1efda918f0ba 314 uint32_t result;
bogdanm 73:1efda918f0ba 315
bogdanm 73:1efda918f0ba 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 317 return(result);
bogdanm 73:1efda918f0ba 318 }
bogdanm 73:1efda918f0ba 319
bogdanm 73:1efda918f0ba 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 321 {
bogdanm 73:1efda918f0ba 322 uint32_t result;
bogdanm 73:1efda918f0ba 323
bogdanm 73:1efda918f0ba 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 325 return(result);
bogdanm 73:1efda918f0ba 326 }
bogdanm 73:1efda918f0ba 327
bogdanm 73:1efda918f0ba 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 329 {
bogdanm 73:1efda918f0ba 330 uint32_t result;
bogdanm 73:1efda918f0ba 331
bogdanm 73:1efda918f0ba 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 333 return(result);
bogdanm 73:1efda918f0ba 334 }
bogdanm 73:1efda918f0ba 335
bogdanm 73:1efda918f0ba 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 337 {
bogdanm 73:1efda918f0ba 338 uint32_t result;
bogdanm 73:1efda918f0ba 339
bogdanm 73:1efda918f0ba 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 341 return(result);
bogdanm 73:1efda918f0ba 342 }
bogdanm 73:1efda918f0ba 343
bogdanm 73:1efda918f0ba 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 345 {
bogdanm 73:1efda918f0ba 346 uint32_t result;
bogdanm 73:1efda918f0ba 347
bogdanm 73:1efda918f0ba 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 349 return(result);
bogdanm 73:1efda918f0ba 350 }
bogdanm 73:1efda918f0ba 351
bogdanm 73:1efda918f0ba 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 353 {
bogdanm 73:1efda918f0ba 354 uint32_t result;
bogdanm 73:1efda918f0ba 355
bogdanm 73:1efda918f0ba 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 357 return(result);
bogdanm 73:1efda918f0ba 358 }
bogdanm 73:1efda918f0ba 359
bogdanm 73:1efda918f0ba 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 361 {
bogdanm 73:1efda918f0ba 362 uint32_t result;
bogdanm 73:1efda918f0ba 363
bogdanm 73:1efda918f0ba 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 365 return(result);
bogdanm 73:1efda918f0ba 366 }
bogdanm 73:1efda918f0ba 367
bogdanm 73:1efda918f0ba 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 369 {
bogdanm 73:1efda918f0ba 370 uint32_t result;
bogdanm 73:1efda918f0ba 371
bogdanm 73:1efda918f0ba 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 373 return(result);
bogdanm 73:1efda918f0ba 374 }
bogdanm 73:1efda918f0ba 375
bogdanm 73:1efda918f0ba 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 377 {
bogdanm 73:1efda918f0ba 378 uint32_t result;
bogdanm 73:1efda918f0ba 379
bogdanm 73:1efda918f0ba 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 381 return(result);
bogdanm 73:1efda918f0ba 382 }
bogdanm 73:1efda918f0ba 383
bogdanm 73:1efda918f0ba 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 385 {
bogdanm 73:1efda918f0ba 386 uint32_t result;
bogdanm 73:1efda918f0ba 387
bogdanm 73:1efda918f0ba 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 389 return(result);
bogdanm 73:1efda918f0ba 390 }
bogdanm 73:1efda918f0ba 391
bogdanm 73:1efda918f0ba 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 393 {
bogdanm 73:1efda918f0ba 394 uint32_t result;
bogdanm 73:1efda918f0ba 395
bogdanm 73:1efda918f0ba 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 397 return(result);
bogdanm 73:1efda918f0ba 398 }
bogdanm 73:1efda918f0ba 399
bogdanm 73:1efda918f0ba 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 401 {
bogdanm 73:1efda918f0ba 402 uint32_t result;
bogdanm 73:1efda918f0ba 403
bogdanm 73:1efda918f0ba 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 405 return(result);
bogdanm 73:1efda918f0ba 406 }
bogdanm 73:1efda918f0ba 407
bogdanm 73:1efda918f0ba 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 409 {
bogdanm 73:1efda918f0ba 410 uint32_t result;
bogdanm 73:1efda918f0ba 411
bogdanm 73:1efda918f0ba 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 413 return(result);
bogdanm 73:1efda918f0ba 414 }
bogdanm 73:1efda918f0ba 415
bogdanm 73:1efda918f0ba 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 417 {
bogdanm 73:1efda918f0ba 418 uint32_t result;
bogdanm 73:1efda918f0ba 419
bogdanm 73:1efda918f0ba 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 421 return(result);
bogdanm 73:1efda918f0ba 422 }
bogdanm 73:1efda918f0ba 423
bogdanm 73:1efda918f0ba 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 425 {
bogdanm 73:1efda918f0ba 426 uint32_t result;
bogdanm 73:1efda918f0ba 427
bogdanm 73:1efda918f0ba 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 429 return(result);
bogdanm 73:1efda918f0ba 430 }
bogdanm 73:1efda918f0ba 431
bogdanm 73:1efda918f0ba 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 433 {
bogdanm 73:1efda918f0ba 434 uint32_t result;
bogdanm 73:1efda918f0ba 435
bogdanm 73:1efda918f0ba 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 437 return(result);
bogdanm 73:1efda918f0ba 438 }
bogdanm 73:1efda918f0ba 439
bogdanm 73:1efda918f0ba 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 441 {
bogdanm 73:1efda918f0ba 442 uint32_t result;
bogdanm 73:1efda918f0ba 443
bogdanm 73:1efda918f0ba 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 445 return(result);
bogdanm 73:1efda918f0ba 446 }
bogdanm 73:1efda918f0ba 447
bogdanm 73:1efda918f0ba 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 449 {
bogdanm 73:1efda918f0ba 450 uint32_t result;
bogdanm 73:1efda918f0ba 451
bogdanm 73:1efda918f0ba 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 453 return(result);
bogdanm 73:1efda918f0ba 454 }
bogdanm 73:1efda918f0ba 455
bogdanm 73:1efda918f0ba 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 73:1efda918f0ba 457 {
bogdanm 73:1efda918f0ba 458 uint32_t result;
bogdanm 73:1efda918f0ba 459
bogdanm 73:1efda918f0ba 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 73:1efda918f0ba 461 return(result);
bogdanm 73:1efda918f0ba 462 }
bogdanm 73:1efda918f0ba 463
bogdanm 73:1efda918f0ba 464 #define __SSAT16(ARG1,ARG2) \
bogdanm 73:1efda918f0ba 465 ({ \
bogdanm 73:1efda918f0ba 466 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 73:1efda918f0ba 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 73:1efda918f0ba 468 __RES; \
bogdanm 73:1efda918f0ba 469 })
bogdanm 73:1efda918f0ba 470
bogdanm 73:1efda918f0ba 471 #define __USAT16(ARG1,ARG2) \
bogdanm 73:1efda918f0ba 472 ({ \
bogdanm 73:1efda918f0ba 473 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 73:1efda918f0ba 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 73:1efda918f0ba 475 __RES; \
bogdanm 73:1efda918f0ba 476 })
bogdanm 73:1efda918f0ba 477
bogdanm 73:1efda918f0ba 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 73:1efda918f0ba 479 {
bogdanm 73:1efda918f0ba 480 uint32_t result;
bogdanm 73:1efda918f0ba 481
bogdanm 73:1efda918f0ba 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 73:1efda918f0ba 483 return(result);
bogdanm 73:1efda918f0ba 484 }
bogdanm 73:1efda918f0ba 485
bogdanm 73:1efda918f0ba 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 487 {
bogdanm 73:1efda918f0ba 488 uint32_t result;
bogdanm 73:1efda918f0ba 489
bogdanm 73:1efda918f0ba 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 491 return(result);
bogdanm 73:1efda918f0ba 492 }
bogdanm 73:1efda918f0ba 493
bogdanm 73:1efda918f0ba 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 73:1efda918f0ba 495 {
bogdanm 73:1efda918f0ba 496 uint32_t result;
bogdanm 73:1efda918f0ba 497
bogdanm 73:1efda918f0ba 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 73:1efda918f0ba 499 return(result);
bogdanm 73:1efda918f0ba 500 }
bogdanm 73:1efda918f0ba 501
bogdanm 73:1efda918f0ba 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 503 {
bogdanm 73:1efda918f0ba 504 uint32_t result;
bogdanm 73:1efda918f0ba 505
bogdanm 73:1efda918f0ba 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 507 return(result);
bogdanm 73:1efda918f0ba 508 }
bogdanm 73:1efda918f0ba 509
bogdanm 73:1efda918f0ba 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 511 {
bogdanm 73:1efda918f0ba 512 uint32_t result;
bogdanm 73:1efda918f0ba 513
bogdanm 73:1efda918f0ba 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 515 return(result);
bogdanm 73:1efda918f0ba 516 }
bogdanm 73:1efda918f0ba 517
bogdanm 73:1efda918f0ba 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 519 {
bogdanm 73:1efda918f0ba 520 uint32_t result;
bogdanm 73:1efda918f0ba 521
bogdanm 73:1efda918f0ba 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 523 return(result);
bogdanm 73:1efda918f0ba 524 }
bogdanm 73:1efda918f0ba 525
bogdanm 73:1efda918f0ba 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 73:1efda918f0ba 527 {
bogdanm 73:1efda918f0ba 528 uint32_t result;
bogdanm 73:1efda918f0ba 529
bogdanm 73:1efda918f0ba 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 73:1efda918f0ba 531 return(result);
bogdanm 73:1efda918f0ba 532 }
bogdanm 73:1efda918f0ba 533
bogdanm 73:1efda918f0ba 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 73:1efda918f0ba 535 {
bogdanm 73:1efda918f0ba 536 uint32_t result;
bogdanm 73:1efda918f0ba 537
bogdanm 73:1efda918f0ba 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 73:1efda918f0ba 539 return(result);
bogdanm 73:1efda918f0ba 540 }
bogdanm 73:1efda918f0ba 541
bogdanm 73:1efda918f0ba 542 #define __SMLALD(ARG1,ARG2,ARG3) \
bogdanm 73:1efda918f0ba 543 ({ \
bogdanm 73:1efda918f0ba 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 73:1efda918f0ba 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 73:1efda918f0ba 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 73:1efda918f0ba 547 })
bogdanm 73:1efda918f0ba 548
bogdanm 73:1efda918f0ba 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
bogdanm 73:1efda918f0ba 550 ({ \
bogdanm 73:1efda918f0ba 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 73:1efda918f0ba 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 73:1efda918f0ba 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 73:1efda918f0ba 554 })
bogdanm 73:1efda918f0ba 555
bogdanm 73:1efda918f0ba 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 557 {
bogdanm 73:1efda918f0ba 558 uint32_t result;
bogdanm 73:1efda918f0ba 559
bogdanm 73:1efda918f0ba 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 561 return(result);
bogdanm 73:1efda918f0ba 562 }
bogdanm 73:1efda918f0ba 563
bogdanm 73:1efda918f0ba 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 565 {
bogdanm 73:1efda918f0ba 566 uint32_t result;
bogdanm 73:1efda918f0ba 567
bogdanm 73:1efda918f0ba 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 569 return(result);
bogdanm 73:1efda918f0ba 570 }
bogdanm 73:1efda918f0ba 571
bogdanm 73:1efda918f0ba 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 73:1efda918f0ba 573 {
bogdanm 73:1efda918f0ba 574 uint32_t result;
bogdanm 73:1efda918f0ba 575
bogdanm 73:1efda918f0ba 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 73:1efda918f0ba 577 return(result);
bogdanm 73:1efda918f0ba 578 }
bogdanm 73:1efda918f0ba 579
bogdanm 73:1efda918f0ba 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 73:1efda918f0ba 581 {
bogdanm 73:1efda918f0ba 582 uint32_t result;
bogdanm 73:1efda918f0ba 583
bogdanm 73:1efda918f0ba 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 73:1efda918f0ba 585 return(result);
bogdanm 73:1efda918f0ba 586 }
bogdanm 73:1efda918f0ba 587
bogdanm 73:1efda918f0ba 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
bogdanm 73:1efda918f0ba 589 ({ \
bogdanm 73:1efda918f0ba 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 73:1efda918f0ba 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 73:1efda918f0ba 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 73:1efda918f0ba 593 })
bogdanm 73:1efda918f0ba 594
bogdanm 73:1efda918f0ba 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
bogdanm 73:1efda918f0ba 596 ({ \
bogdanm 73:1efda918f0ba 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 73:1efda918f0ba 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 73:1efda918f0ba 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 73:1efda918f0ba 600 })
bogdanm 73:1efda918f0ba 601
bogdanm 73:1efda918f0ba 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 603 {
bogdanm 73:1efda918f0ba 604 uint32_t result;
bogdanm 73:1efda918f0ba 605
bogdanm 73:1efda918f0ba 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 607 return(result);
bogdanm 73:1efda918f0ba 608 }
bogdanm 73:1efda918f0ba 609
bogdanm 73:1efda918f0ba 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 611 {
bogdanm 73:1efda918f0ba 612 uint32_t result;
bogdanm 73:1efda918f0ba 613
bogdanm 73:1efda918f0ba 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 615 return(result);
bogdanm 73:1efda918f0ba 616 }
bogdanm 73:1efda918f0ba 617
bogdanm 73:1efda918f0ba 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 619 {
bogdanm 73:1efda918f0ba 620 uint32_t result;
bogdanm 73:1efda918f0ba 621
bogdanm 73:1efda918f0ba 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 73:1efda918f0ba 623 return(result);
bogdanm 73:1efda918f0ba 624 }
bogdanm 73:1efda918f0ba 625
bogdanm 73:1efda918f0ba 626 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 73:1efda918f0ba 627 ({ \
bogdanm 73:1efda918f0ba 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 73:1efda918f0ba 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 73:1efda918f0ba 630 __RES; \
bogdanm 73:1efda918f0ba 631 })
bogdanm 73:1efda918f0ba 632
bogdanm 73:1efda918f0ba 633 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 73:1efda918f0ba 634 ({ \
bogdanm 73:1efda918f0ba 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 73:1efda918f0ba 636 if (ARG3 == 0) \
bogdanm 73:1efda918f0ba 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 73:1efda918f0ba 638 else \
bogdanm 73:1efda918f0ba 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 73:1efda918f0ba 640 __RES; \
bogdanm 73:1efda918f0ba 641 })
bogdanm 73:1efda918f0ba 642
bogdanm 73:1efda918f0ba 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 73:1efda918f0ba 644 {
bogdanm 73:1efda918f0ba 645 int32_t result;
bogdanm 73:1efda918f0ba 646
bogdanm 73:1efda918f0ba 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 73:1efda918f0ba 648 return(result);
bogdanm 73:1efda918f0ba 649 }
bogdanm 73:1efda918f0ba 650
bogdanm 73:1efda918f0ba 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 73:1efda918f0ba 652
bogdanm 73:1efda918f0ba 653
bogdanm 73:1efda918f0ba 654
bogdanm 73:1efda918f0ba 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 73:1efda918f0ba 656 /* TASKING carm specific functions */
bogdanm 73:1efda918f0ba 657
bogdanm 73:1efda918f0ba 658
bogdanm 73:1efda918f0ba 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 73:1efda918f0ba 660 /* not yet supported */
bogdanm 73:1efda918f0ba 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 73:1efda918f0ba 662
bogdanm 73:1efda918f0ba 663
bogdanm 73:1efda918f0ba 664 #endif
bogdanm 73:1efda918f0ba 665
bogdanm 73:1efda918f0ba 666 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 73:1efda918f0ba 667
bogdanm 73:1efda918f0ba 668
bogdanm 73:1efda918f0ba 669 #endif /* __CORE_CM4_SIMD_H */
bogdanm 73:1efda918f0ba 670
bogdanm 73:1efda918f0ba 671 #ifdef __cplusplus
bogdanm 73:1efda918f0ba 672 }
bogdanm 73:1efda918f0ba 673 #endif