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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_TB_SENSE_1/core_ca_mmu.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
142:4eea097334d6 
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Anna Bridge 142:4eea097334d6 1 ;/**************************************************************************//**
Anna Bridge 142:4eea097334d6 2 ; * @file core_ca_mmu.h
Anna Bridge 142:4eea097334d6 3 ; * @brief MMU Startup File for A9_MP Device Series
Anna Bridge 142:4eea097334d6 4 ; * @version V1.01
Anna Bridge 142:4eea097334d6 5 ; * @date 10 Sept 2014
Anna Bridge 142:4eea097334d6 6 ; *
Anna Bridge 142:4eea097334d6 7 ; * @note
Anna Bridge 142:4eea097334d6 8 ; *
Anna Bridge 142:4eea097334d6 9 ; ******************************************************************************/
Anna Bridge 142:4eea097334d6 10 ;/* Copyright (c) 2012-2014 ARM LIMITED
Anna Bridge 142:4eea097334d6 11 ;
Anna Bridge 142:4eea097334d6 12 ; All rights reserved.
Anna Bridge 142:4eea097334d6 13 ; Redistribution and use in source and binary forms, with or without
Anna Bridge 142:4eea097334d6 14 ; modification, are permitted provided that the following conditions are met:
Anna Bridge 142:4eea097334d6 15 ; - Redistributions of source code must retain the above copyright
Anna Bridge 142:4eea097334d6 16 ; notice, this list of conditions and the following disclaimer.
Anna Bridge 142:4eea097334d6 17 ; - Redistributions in binary form must reproduce the above copyright
Anna Bridge 142:4eea097334d6 18 ; notice, this list of conditions and the following disclaimer in the
Anna Bridge 142:4eea097334d6 19 ; documentation and/or other materials provided with the distribution.
Anna Bridge 142:4eea097334d6 20 ; - Neither the name of ARM nor the names of its contributors may be used
Anna Bridge 142:4eea097334d6 21 ; to endorse or promote products derived from this software without
Anna Bridge 142:4eea097334d6 22 ; specific prior written permission.
Anna Bridge 142:4eea097334d6 23 ; *
Anna Bridge 142:4eea097334d6 24 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Anna Bridge 142:4eea097334d6 25 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Anna Bridge 142:4eea097334d6 26 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Anna Bridge 142:4eea097334d6 27 ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Anna Bridge 142:4eea097334d6 28 ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Anna Bridge 142:4eea097334d6 29 ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Anna Bridge 142:4eea097334d6 30 ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Anna Bridge 142:4eea097334d6 31 ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Anna Bridge 142:4eea097334d6 32 ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Anna Bridge 142:4eea097334d6 33 ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Anna Bridge 142:4eea097334d6 34 ; POSSIBILITY OF SUCH DAMAGE.
Anna Bridge 142:4eea097334d6 35 ; ---------------------------------------------------------------------------*/
Anna Bridge 142:4eea097334d6 36
Anna Bridge 142:4eea097334d6 37 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 38 extern "C" {
Anna Bridge 142:4eea097334d6 39 #endif
Anna Bridge 142:4eea097334d6 40
Anna Bridge 142:4eea097334d6 41 #ifndef _MMU_FUNC_H
Anna Bridge 142:4eea097334d6 42 #define _MMU_FUNC_H
Anna Bridge 142:4eea097334d6 43
Anna Bridge 142:4eea097334d6 44 #define SECTION_DESCRIPTOR (0x2)
Anna Bridge 142:4eea097334d6 45 #define SECTION_MASK (0xFFFFFFFC)
Anna Bridge 142:4eea097334d6 46
Anna Bridge 142:4eea097334d6 47 #define SECTION_TEXCB_MASK (0xFFFF8FF3)
Anna Bridge 142:4eea097334d6 48 #define SECTION_B_SHIFT (2)
Anna Bridge 142:4eea097334d6 49 #define SECTION_C_SHIFT (3)
Anna Bridge 142:4eea097334d6 50 #define SECTION_TEX0_SHIFT (12)
Anna Bridge 142:4eea097334d6 51 #define SECTION_TEX1_SHIFT (13)
Anna Bridge 142:4eea097334d6 52 #define SECTION_TEX2_SHIFT (14)
Anna Bridge 142:4eea097334d6 53
Anna Bridge 142:4eea097334d6 54 #define SECTION_XN_MASK (0xFFFFFFEF)
Anna Bridge 142:4eea097334d6 55 #define SECTION_XN_SHIFT (4)
Anna Bridge 142:4eea097334d6 56
Anna Bridge 142:4eea097334d6 57 #define SECTION_DOMAIN_MASK (0xFFFFFE1F)
Anna Bridge 142:4eea097334d6 58 #define SECTION_DOMAIN_SHIFT (5)
Anna Bridge 142:4eea097334d6 59
Anna Bridge 142:4eea097334d6 60 #define SECTION_P_MASK (0xFFFFFDFF)
Anna Bridge 142:4eea097334d6 61 #define SECTION_P_SHIFT (9)
Anna Bridge 142:4eea097334d6 62
Anna Bridge 142:4eea097334d6 63 #define SECTION_AP_MASK (0xFFFF73FF)
Anna Bridge 142:4eea097334d6 64 #define SECTION_AP_SHIFT (10)
Anna Bridge 142:4eea097334d6 65 #define SECTION_AP2_SHIFT (15)
Anna Bridge 142:4eea097334d6 66
Anna Bridge 142:4eea097334d6 67 #define SECTION_S_MASK (0xFFFEFFFF)
Anna Bridge 142:4eea097334d6 68 #define SECTION_S_SHIFT (16)
Anna Bridge 142:4eea097334d6 69
Anna Bridge 142:4eea097334d6 70 #define SECTION_NG_MASK (0xFFFDFFFF)
Anna Bridge 142:4eea097334d6 71 #define SECTION_NG_SHIFT (17)
Anna Bridge 142:4eea097334d6 72
Anna Bridge 142:4eea097334d6 73 #define SECTION_NS_MASK (0xFFF7FFFF)
Anna Bridge 142:4eea097334d6 74 #define SECTION_NS_SHIFT (19)
Anna Bridge 142:4eea097334d6 75
Anna Bridge 142:4eea097334d6 76
Anna Bridge 142:4eea097334d6 77 #define PAGE_L1_DESCRIPTOR (0x1)
Anna Bridge 142:4eea097334d6 78 #define PAGE_L1_MASK (0xFFFFFFFC)
Anna Bridge 142:4eea097334d6 79
Anna Bridge 142:4eea097334d6 80 #define PAGE_L2_4K_DESC (0x2)
Anna Bridge 142:4eea097334d6 81 #define PAGE_L2_4K_MASK (0xFFFFFFFD)
Anna Bridge 142:4eea097334d6 82
Anna Bridge 142:4eea097334d6 83 #define PAGE_L2_64K_DESC (0x1)
Anna Bridge 142:4eea097334d6 84 #define PAGE_L2_64K_MASK (0xFFFFFFFC)
Anna Bridge 142:4eea097334d6 85
Anna Bridge 142:4eea097334d6 86 #define PAGE_4K_TEXCB_MASK (0xFFFFFE33)
Anna Bridge 142:4eea097334d6 87 #define PAGE_4K_B_SHIFT (2)
Anna Bridge 142:4eea097334d6 88 #define PAGE_4K_C_SHIFT (3)
Anna Bridge 142:4eea097334d6 89 #define PAGE_4K_TEX0_SHIFT (6)
Anna Bridge 142:4eea097334d6 90 #define PAGE_4K_TEX1_SHIFT (7)
Anna Bridge 142:4eea097334d6 91 #define PAGE_4K_TEX2_SHIFT (8)
Anna Bridge 142:4eea097334d6 92
Anna Bridge 142:4eea097334d6 93 #define PAGE_64K_TEXCB_MASK (0xFFFF8FF3)
Anna Bridge 142:4eea097334d6 94 #define PAGE_64K_B_SHIFT (2)
Anna Bridge 142:4eea097334d6 95 #define PAGE_64K_C_SHIFT (3)
Anna Bridge 142:4eea097334d6 96 #define PAGE_64K_TEX0_SHIFT (12)
Anna Bridge 142:4eea097334d6 97 #define PAGE_64K_TEX1_SHIFT (13)
Anna Bridge 142:4eea097334d6 98 #define PAGE_64K_TEX2_SHIFT (14)
Anna Bridge 142:4eea097334d6 99
Anna Bridge 142:4eea097334d6 100 #define PAGE_TEXCB_MASK (0xFFFF8FF3)
Anna Bridge 142:4eea097334d6 101 #define PAGE_B_SHIFT (2)
Anna Bridge 142:4eea097334d6 102 #define PAGE_C_SHIFT (3)
Anna Bridge 142:4eea097334d6 103 #define PAGE_TEX_SHIFT (12)
Anna Bridge 142:4eea097334d6 104
Anna Bridge 142:4eea097334d6 105 #define PAGE_XN_4K_MASK (0xFFFFFFFE)
Anna Bridge 142:4eea097334d6 106 #define PAGE_XN_4K_SHIFT (0)
Anna Bridge 142:4eea097334d6 107 #define PAGE_XN_64K_MASK (0xFFFF7FFF)
Anna Bridge 142:4eea097334d6 108 #define PAGE_XN_64K_SHIFT (15)
Anna Bridge 142:4eea097334d6 109
Anna Bridge 142:4eea097334d6 110
Anna Bridge 142:4eea097334d6 111 #define PAGE_DOMAIN_MASK (0xFFFFFE1F)
Anna Bridge 142:4eea097334d6 112 #define PAGE_DOMAIN_SHIFT (5)
Anna Bridge 142:4eea097334d6 113
Anna Bridge 142:4eea097334d6 114 #define PAGE_P_MASK (0xFFFFFDFF)
Anna Bridge 142:4eea097334d6 115 #define PAGE_P_SHIFT (9)
Anna Bridge 142:4eea097334d6 116
Anna Bridge 142:4eea097334d6 117 #define PAGE_AP_MASK (0xFFFFFDCF)
Anna Bridge 142:4eea097334d6 118 #define PAGE_AP_SHIFT (4)
Anna Bridge 142:4eea097334d6 119 #define PAGE_AP2_SHIFT (9)
Anna Bridge 142:4eea097334d6 120
Anna Bridge 142:4eea097334d6 121 #define PAGE_S_MASK (0xFFFFFBFF)
Anna Bridge 142:4eea097334d6 122 #define PAGE_S_SHIFT (10)
Anna Bridge 142:4eea097334d6 123
Anna Bridge 142:4eea097334d6 124 #define PAGE_NG_MASK (0xFFFFF7FF)
Anna Bridge 142:4eea097334d6 125 #define PAGE_NG_SHIFT (11)
Anna Bridge 142:4eea097334d6 126
Anna Bridge 142:4eea097334d6 127 #define PAGE_NS_MASK (0xFFFFFFF7)
Anna Bridge 142:4eea097334d6 128 #define PAGE_NS_SHIFT (3)
Anna Bridge 142:4eea097334d6 129
Anna Bridge 142:4eea097334d6 130 #define OFFSET_1M (0x00100000)
Anna Bridge 142:4eea097334d6 131 #define OFFSET_64K (0x00010000)
Anna Bridge 142:4eea097334d6 132 #define OFFSET_4K (0x00001000)
Anna Bridge 142:4eea097334d6 133
Anna Bridge 142:4eea097334d6 134 #define DESCRIPTOR_FAULT (0x00000000)
Anna Bridge 142:4eea097334d6 135
Anna Bridge 142:4eea097334d6 136 /* ########################### MMU Function Access ########################### */
Anna Bridge 142:4eea097334d6 137 /** \ingroup MMU_FunctionInterface
Anna Bridge 142:4eea097334d6 138 \defgroup MMU_Functions MMU Functions Interface
Anna Bridge 142:4eea097334d6 139 @{
Anna Bridge 142:4eea097334d6 140 */
Anna Bridge 142:4eea097334d6 141
Anna Bridge 142:4eea097334d6 142 /* Attributes enumerations */
Anna Bridge 142:4eea097334d6 143
Anna Bridge 142:4eea097334d6 144 /* Region size attributes */
Anna Bridge 142:4eea097334d6 145 typedef enum
Anna Bridge 142:4eea097334d6 146 {
Anna Bridge 142:4eea097334d6 147 SECTION,
Anna Bridge 142:4eea097334d6 148 PAGE_4k,
Anna Bridge 142:4eea097334d6 149 PAGE_64k,
Anna Bridge 142:4eea097334d6 150 } mmu_region_size_Type;
Anna Bridge 142:4eea097334d6 151
Anna Bridge 142:4eea097334d6 152 /* Region type attributes */
Anna Bridge 142:4eea097334d6 153 typedef enum
Anna Bridge 142:4eea097334d6 154 {
Anna Bridge 142:4eea097334d6 155 NORMAL,
Anna Bridge 142:4eea097334d6 156 DEVICE,
Anna Bridge 142:4eea097334d6 157 SHARED_DEVICE,
Anna Bridge 142:4eea097334d6 158 NON_SHARED_DEVICE,
Anna Bridge 142:4eea097334d6 159 STRONGLY_ORDERED
Anna Bridge 142:4eea097334d6 160 } mmu_memory_Type;
Anna Bridge 142:4eea097334d6 161
Anna Bridge 142:4eea097334d6 162 /* Region cacheability attributes */
Anna Bridge 142:4eea097334d6 163 typedef enum
Anna Bridge 142:4eea097334d6 164 {
Anna Bridge 142:4eea097334d6 165 NON_CACHEABLE,
Anna Bridge 142:4eea097334d6 166 WB_WA,
Anna Bridge 142:4eea097334d6 167 WT,
Anna Bridge 142:4eea097334d6 168 WB_NO_WA,
Anna Bridge 142:4eea097334d6 169 } mmu_cacheability_Type;
Anna Bridge 142:4eea097334d6 170
Anna Bridge 142:4eea097334d6 171 /* Region parity check attributes */
Anna Bridge 142:4eea097334d6 172 typedef enum
Anna Bridge 142:4eea097334d6 173 {
Anna Bridge 142:4eea097334d6 174 ECC_DISABLED,
Anna Bridge 142:4eea097334d6 175 ECC_ENABLED,
Anna Bridge 142:4eea097334d6 176 } mmu_ecc_check_Type;
Anna Bridge 142:4eea097334d6 177
Anna Bridge 142:4eea097334d6 178 /* Region execution attributes */
Anna Bridge 142:4eea097334d6 179 typedef enum
Anna Bridge 142:4eea097334d6 180 {
Anna Bridge 142:4eea097334d6 181 EXECUTE,
Anna Bridge 142:4eea097334d6 182 NON_EXECUTE,
Anna Bridge 142:4eea097334d6 183 } mmu_execute_Type;
Anna Bridge 142:4eea097334d6 184
Anna Bridge 142:4eea097334d6 185 /* Region global attributes */
Anna Bridge 142:4eea097334d6 186 typedef enum
Anna Bridge 142:4eea097334d6 187 {
Anna Bridge 142:4eea097334d6 188 GLOBAL,
Anna Bridge 142:4eea097334d6 189 NON_GLOBAL,
Anna Bridge 142:4eea097334d6 190 } mmu_global_Type;
Anna Bridge 142:4eea097334d6 191
Anna Bridge 142:4eea097334d6 192 /* Region shareability attributes */
Anna Bridge 142:4eea097334d6 193 typedef enum
Anna Bridge 142:4eea097334d6 194 {
Anna Bridge 142:4eea097334d6 195 NON_SHARED,
Anna Bridge 142:4eea097334d6 196 SHARED,
Anna Bridge 142:4eea097334d6 197 } mmu_shared_Type;
Anna Bridge 142:4eea097334d6 198
Anna Bridge 142:4eea097334d6 199 /* Region security attributes */
Anna Bridge 142:4eea097334d6 200 typedef enum
Anna Bridge 142:4eea097334d6 201 {
Anna Bridge 142:4eea097334d6 202 SECURE,
Anna Bridge 142:4eea097334d6 203 NON_SECURE,
Anna Bridge 142:4eea097334d6 204 } mmu_secure_Type;
Anna Bridge 142:4eea097334d6 205
Anna Bridge 142:4eea097334d6 206 /* Region access attributes */
Anna Bridge 142:4eea097334d6 207 typedef enum
Anna Bridge 142:4eea097334d6 208 {
Anna Bridge 142:4eea097334d6 209 NO_ACCESS,
Anna Bridge 142:4eea097334d6 210 RW,
Anna Bridge 142:4eea097334d6 211 READ,
Anna Bridge 142:4eea097334d6 212 } mmu_access_Type;
Anna Bridge 142:4eea097334d6 213
Anna Bridge 142:4eea097334d6 214 /* Memory Region definition */
Anna Bridge 142:4eea097334d6 215 typedef struct RegionStruct {
Anna Bridge 142:4eea097334d6 216 mmu_region_size_Type rg_t;
Anna Bridge 142:4eea097334d6 217 mmu_memory_Type mem_t;
Anna Bridge 142:4eea097334d6 218 uint8_t domain;
Anna Bridge 142:4eea097334d6 219 mmu_cacheability_Type inner_norm_t;
Anna Bridge 142:4eea097334d6 220 mmu_cacheability_Type outer_norm_t;
Anna Bridge 142:4eea097334d6 221 mmu_ecc_check_Type e_t;
Anna Bridge 142:4eea097334d6 222 mmu_execute_Type xn_t;
Anna Bridge 142:4eea097334d6 223 mmu_global_Type g_t;
Anna Bridge 142:4eea097334d6 224 mmu_secure_Type sec_t;
Anna Bridge 142:4eea097334d6 225 mmu_access_Type priv_t;
Anna Bridge 142:4eea097334d6 226 mmu_access_Type user_t;
Anna Bridge 142:4eea097334d6 227 mmu_shared_Type sh_t;
Anna Bridge 142:4eea097334d6 228
Anna Bridge 142:4eea097334d6 229 } mmu_region_attributes_Type;
Anna Bridge 142:4eea097334d6 230
Anna Bridge 142:4eea097334d6 231 /** \brief Set section execution-never attribute
Anna Bridge 142:4eea097334d6 232
Anna Bridge 142:4eea097334d6 233 The function sets section execution-never attribute
Anna Bridge 142:4eea097334d6 234
Anna Bridge 142:4eea097334d6 235 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 236 \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE.
Anna Bridge 142:4eea097334d6 237
Anna Bridge 142:4eea097334d6 238 \return 0
Anna Bridge 142:4eea097334d6 239 */
Anna Bridge 142:4eea097334d6 240 __STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn)
Anna Bridge 142:4eea097334d6 241 {
Anna Bridge 142:4eea097334d6 242 *descriptor_l1 &= SECTION_XN_MASK;
Anna Bridge 142:4eea097334d6 243 *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);
Anna Bridge 142:4eea097334d6 244 return 0;
Anna Bridge 142:4eea097334d6 245 }
Anna Bridge 142:4eea097334d6 246
Anna Bridge 142:4eea097334d6 247 /** \brief Set section domain
Anna Bridge 142:4eea097334d6 248
Anna Bridge 142:4eea097334d6 249 The function sets section domain
Anna Bridge 142:4eea097334d6 250
Anna Bridge 142:4eea097334d6 251 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 252 \param [in] domain Section domain
Anna Bridge 142:4eea097334d6 253
Anna Bridge 142:4eea097334d6 254 \return 0
Anna Bridge 142:4eea097334d6 255 */
Anna Bridge 142:4eea097334d6 256 __STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain)
Anna Bridge 142:4eea097334d6 257 {
Anna Bridge 142:4eea097334d6 258 *descriptor_l1 &= SECTION_DOMAIN_MASK;
Anna Bridge 142:4eea097334d6 259 *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);
Anna Bridge 142:4eea097334d6 260 return 0;
Anna Bridge 142:4eea097334d6 261 }
Anna Bridge 142:4eea097334d6 262
Anna Bridge 142:4eea097334d6 263 /** \brief Set section parity check
Anna Bridge 142:4eea097334d6 264
Anna Bridge 142:4eea097334d6 265 The function sets section parity check
Anna Bridge 142:4eea097334d6 266
Anna Bridge 142:4eea097334d6 267 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 268 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
Anna Bridge 142:4eea097334d6 269
Anna Bridge 142:4eea097334d6 270 \return 0
Anna Bridge 142:4eea097334d6 271 */
Anna Bridge 142:4eea097334d6 272 __STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
Anna Bridge 142:4eea097334d6 273 {
Anna Bridge 142:4eea097334d6 274 *descriptor_l1 &= SECTION_P_MASK;
Anna Bridge 142:4eea097334d6 275 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
Anna Bridge 142:4eea097334d6 276 return 0;
Anna Bridge 142:4eea097334d6 277 }
Anna Bridge 142:4eea097334d6 278
Anna Bridge 142:4eea097334d6 279 /** \brief Set section access privileges
Anna Bridge 142:4eea097334d6 280
Anna Bridge 142:4eea097334d6 281 The function sets section access privileges
Anna Bridge 142:4eea097334d6 282
Anna Bridge 142:4eea097334d6 283 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 284 \param [in] user User Level Access: NO_ACCESS, RW, READ
Anna Bridge 142:4eea097334d6 285 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
Anna Bridge 142:4eea097334d6 286 \param [in] afe Access flag enable
Anna Bridge 142:4eea097334d6 287
Anna Bridge 142:4eea097334d6 288 \return 0
Anna Bridge 142:4eea097334d6 289 */
Anna Bridge 142:4eea097334d6 290 __STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
Anna Bridge 142:4eea097334d6 291 {
Anna Bridge 142:4eea097334d6 292 uint32_t ap = 0;
Anna Bridge 142:4eea097334d6 293
Anna Bridge 142:4eea097334d6 294 if (afe == 0) { //full access
Anna Bridge 142:4eea097334d6 295 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
Anna Bridge 142:4eea097334d6 296 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
Anna Bridge 142:4eea097334d6 297 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
Anna Bridge 142:4eea097334d6 298 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
Anna Bridge 142:4eea097334d6 299 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
Anna Bridge 142:4eea097334d6 300 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
Anna Bridge 142:4eea097334d6 301 }
Anna Bridge 142:4eea097334d6 302
Anna Bridge 142:4eea097334d6 303 else { //Simplified access
Anna Bridge 142:4eea097334d6 304 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
Anna Bridge 142:4eea097334d6 305 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
Anna Bridge 142:4eea097334d6 306 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
Anna Bridge 142:4eea097334d6 307 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
Anna Bridge 142:4eea097334d6 308 }
Anna Bridge 142:4eea097334d6 309
Anna Bridge 142:4eea097334d6 310 *descriptor_l1 &= SECTION_AP_MASK;
Anna Bridge 142:4eea097334d6 311 *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;
Anna Bridge 142:4eea097334d6 312 *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;
Anna Bridge 142:4eea097334d6 313
Anna Bridge 142:4eea097334d6 314 return 0;
Anna Bridge 142:4eea097334d6 315 }
Anna Bridge 142:4eea097334d6 316
Anna Bridge 142:4eea097334d6 317 /** \brief Set section shareability
Anna Bridge 142:4eea097334d6 318
Anna Bridge 142:4eea097334d6 319 The function sets section shareability
Anna Bridge 142:4eea097334d6 320
Anna Bridge 142:4eea097334d6 321 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 322 \param [in] s_bit Section shareability: NON_SHARED, SHARED
Anna Bridge 142:4eea097334d6 323
Anna Bridge 142:4eea097334d6 324 \return 0
Anna Bridge 142:4eea097334d6 325 */
Anna Bridge 142:4eea097334d6 326 __STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit)
Anna Bridge 142:4eea097334d6 327 {
Anna Bridge 142:4eea097334d6 328 *descriptor_l1 &= SECTION_S_MASK;
Anna Bridge 142:4eea097334d6 329 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);
Anna Bridge 142:4eea097334d6 330 return 0;
Anna Bridge 142:4eea097334d6 331 }
Anna Bridge 142:4eea097334d6 332
Anna Bridge 142:4eea097334d6 333 /** \brief Set section Global attribute
Anna Bridge 142:4eea097334d6 334
Anna Bridge 142:4eea097334d6 335 The function sets section Global attribute
Anna Bridge 142:4eea097334d6 336
Anna Bridge 142:4eea097334d6 337 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 338 \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL
Anna Bridge 142:4eea097334d6 339
Anna Bridge 142:4eea097334d6 340 \return 0
Anna Bridge 142:4eea097334d6 341 */
Anna Bridge 142:4eea097334d6 342 __STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit)
Anna Bridge 142:4eea097334d6 343 {
Anna Bridge 142:4eea097334d6 344 *descriptor_l1 &= SECTION_NG_MASK;
Anna Bridge 142:4eea097334d6 345 *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);
Anna Bridge 142:4eea097334d6 346 return 0;
Anna Bridge 142:4eea097334d6 347 }
Anna Bridge 142:4eea097334d6 348
Anna Bridge 142:4eea097334d6 349 /** \brief Set section Security attribute
Anna Bridge 142:4eea097334d6 350
Anna Bridge 142:4eea097334d6 351 The function sets section Global attribute
Anna Bridge 142:4eea097334d6 352
Anna Bridge 142:4eea097334d6 353 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 354 \param [in] s_bit Section Security attribute: SECURE, NON_SECURE
Anna Bridge 142:4eea097334d6 355
Anna Bridge 142:4eea097334d6 356 \return 0
Anna Bridge 142:4eea097334d6 357 */
Anna Bridge 142:4eea097334d6 358 __STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
Anna Bridge 142:4eea097334d6 359 {
Anna Bridge 142:4eea097334d6 360 *descriptor_l1 &= SECTION_NS_MASK;
Anna Bridge 142:4eea097334d6 361 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);
Anna Bridge 142:4eea097334d6 362 return 0;
Anna Bridge 142:4eea097334d6 363 }
Anna Bridge 142:4eea097334d6 364
Anna Bridge 142:4eea097334d6 365 /* Page 4k or 64k */
Anna Bridge 142:4eea097334d6 366 /** \brief Set 4k/64k page execution-never attribute
Anna Bridge 142:4eea097334d6 367
Anna Bridge 142:4eea097334d6 368 The function sets 4k/64k page execution-never attribute
Anna Bridge 142:4eea097334d6 369
Anna Bridge 142:4eea097334d6 370 \param [out] descriptor_l2 L2 descriptor.
Anna Bridge 142:4eea097334d6 371 \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE.
Anna Bridge 142:4eea097334d6 372 \param [in] page Page size: PAGE_4k, PAGE_64k,
Anna Bridge 142:4eea097334d6 373
Anna Bridge 142:4eea097334d6 374 \return 0
Anna Bridge 142:4eea097334d6 375 */
Anna Bridge 142:4eea097334d6 376 __STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)
Anna Bridge 142:4eea097334d6 377 {
Anna Bridge 142:4eea097334d6 378 if (page == PAGE_4k)
Anna Bridge 142:4eea097334d6 379 {
Anna Bridge 142:4eea097334d6 380 *descriptor_l2 &= PAGE_XN_4K_MASK;
Anna Bridge 142:4eea097334d6 381 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);
Anna Bridge 142:4eea097334d6 382 }
Anna Bridge 142:4eea097334d6 383 else
Anna Bridge 142:4eea097334d6 384 {
Anna Bridge 142:4eea097334d6 385 *descriptor_l2 &= PAGE_XN_64K_MASK;
Anna Bridge 142:4eea097334d6 386 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);
Anna Bridge 142:4eea097334d6 387 }
Anna Bridge 142:4eea097334d6 388 return 0;
Anna Bridge 142:4eea097334d6 389 }
Anna Bridge 142:4eea097334d6 390
Anna Bridge 142:4eea097334d6 391 /** \brief Set 4k/64k page domain
Anna Bridge 142:4eea097334d6 392
Anna Bridge 142:4eea097334d6 393 The function sets 4k/64k page domain
Anna Bridge 142:4eea097334d6 394
Anna Bridge 142:4eea097334d6 395 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 396 \param [in] domain Page domain
Anna Bridge 142:4eea097334d6 397
Anna Bridge 142:4eea097334d6 398 \return 0
Anna Bridge 142:4eea097334d6 399 */
Anna Bridge 142:4eea097334d6 400 __STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain)
Anna Bridge 142:4eea097334d6 401 {
Anna Bridge 142:4eea097334d6 402 *descriptor_l1 &= PAGE_DOMAIN_MASK;
Anna Bridge 142:4eea097334d6 403 *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);
Anna Bridge 142:4eea097334d6 404 return 0;
Anna Bridge 142:4eea097334d6 405 }
Anna Bridge 142:4eea097334d6 406
Anna Bridge 142:4eea097334d6 407 /** \brief Set 4k/64k page parity check
Anna Bridge 142:4eea097334d6 408
Anna Bridge 142:4eea097334d6 409 The function sets 4k/64k page parity check
Anna Bridge 142:4eea097334d6 410
Anna Bridge 142:4eea097334d6 411 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 412 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
Anna Bridge 142:4eea097334d6 413
Anna Bridge 142:4eea097334d6 414 \return 0
Anna Bridge 142:4eea097334d6 415 */
Anna Bridge 142:4eea097334d6 416 __STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
Anna Bridge 142:4eea097334d6 417 {
Anna Bridge 142:4eea097334d6 418 *descriptor_l1 &= SECTION_P_MASK;
Anna Bridge 142:4eea097334d6 419 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
Anna Bridge 142:4eea097334d6 420 return 0;
Anna Bridge 142:4eea097334d6 421 }
Anna Bridge 142:4eea097334d6 422
Anna Bridge 142:4eea097334d6 423 /** \brief Set 4k/64k page access privileges
Anna Bridge 142:4eea097334d6 424
Anna Bridge 142:4eea097334d6 425 The function sets 4k/64k page access privileges
Anna Bridge 142:4eea097334d6 426
Anna Bridge 142:4eea097334d6 427 \param [out] descriptor_l2 L2 descriptor.
Anna Bridge 142:4eea097334d6 428 \param [in] user User Level Access: NO_ACCESS, RW, READ
Anna Bridge 142:4eea097334d6 429 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
Anna Bridge 142:4eea097334d6 430 \param [in] afe Access flag enable
Anna Bridge 142:4eea097334d6 431
Anna Bridge 142:4eea097334d6 432 \return 0
Anna Bridge 142:4eea097334d6 433 */
Anna Bridge 142:4eea097334d6 434 __STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
Anna Bridge 142:4eea097334d6 435 {
Anna Bridge 142:4eea097334d6 436 uint32_t ap = 0;
Anna Bridge 142:4eea097334d6 437
Anna Bridge 142:4eea097334d6 438 if (afe == 0) { //full access
Anna Bridge 142:4eea097334d6 439 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
Anna Bridge 142:4eea097334d6 440 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
Anna Bridge 142:4eea097334d6 441 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
Anna Bridge 142:4eea097334d6 442 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
Anna Bridge 142:4eea097334d6 443 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
Anna Bridge 142:4eea097334d6 444 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
Anna Bridge 142:4eea097334d6 445 }
Anna Bridge 142:4eea097334d6 446
Anna Bridge 142:4eea097334d6 447 else { //Simplified access
Anna Bridge 142:4eea097334d6 448 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
Anna Bridge 142:4eea097334d6 449 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
Anna Bridge 142:4eea097334d6 450 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
Anna Bridge 142:4eea097334d6 451 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
Anna Bridge 142:4eea097334d6 452 }
Anna Bridge 142:4eea097334d6 453
Anna Bridge 142:4eea097334d6 454 *descriptor_l2 &= PAGE_AP_MASK;
Anna Bridge 142:4eea097334d6 455 *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;
Anna Bridge 142:4eea097334d6 456 *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;
Anna Bridge 142:4eea097334d6 457
Anna Bridge 142:4eea097334d6 458 return 0;
Anna Bridge 142:4eea097334d6 459 }
Anna Bridge 142:4eea097334d6 460
Anna Bridge 142:4eea097334d6 461 /** \brief Set 4k/64k page shareability
Anna Bridge 142:4eea097334d6 462
Anna Bridge 142:4eea097334d6 463 The function sets 4k/64k page shareability
Anna Bridge 142:4eea097334d6 464
Anna Bridge 142:4eea097334d6 465 \param [out] descriptor_l2 L2 descriptor.
Anna Bridge 142:4eea097334d6 466 \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED
Anna Bridge 142:4eea097334d6 467
Anna Bridge 142:4eea097334d6 468 \return 0
Anna Bridge 142:4eea097334d6 469 */
Anna Bridge 142:4eea097334d6 470 __STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit)
Anna Bridge 142:4eea097334d6 471 {
Anna Bridge 142:4eea097334d6 472 *descriptor_l2 &= PAGE_S_MASK;
Anna Bridge 142:4eea097334d6 473 *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);
Anna Bridge 142:4eea097334d6 474 return 0;
Anna Bridge 142:4eea097334d6 475 }
Anna Bridge 142:4eea097334d6 476
Anna Bridge 142:4eea097334d6 477 /** \brief Set 4k/64k page Global attribute
Anna Bridge 142:4eea097334d6 478
Anna Bridge 142:4eea097334d6 479 The function sets 4k/64k page Global attribute
Anna Bridge 142:4eea097334d6 480
Anna Bridge 142:4eea097334d6 481 \param [out] descriptor_l2 L2 descriptor.
Anna Bridge 142:4eea097334d6 482 \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL
Anna Bridge 142:4eea097334d6 483
Anna Bridge 142:4eea097334d6 484 \return 0
Anna Bridge 142:4eea097334d6 485 */
Anna Bridge 142:4eea097334d6 486 __STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit)
Anna Bridge 142:4eea097334d6 487 {
Anna Bridge 142:4eea097334d6 488 *descriptor_l2 &= PAGE_NG_MASK;
Anna Bridge 142:4eea097334d6 489 *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);
Anna Bridge 142:4eea097334d6 490 return 0;
Anna Bridge 142:4eea097334d6 491 }
Anna Bridge 142:4eea097334d6 492
Anna Bridge 142:4eea097334d6 493 /** \brief Set 4k/64k page Security attribute
Anna Bridge 142:4eea097334d6 494
Anna Bridge 142:4eea097334d6 495 The function sets 4k/64k page Global attribute
Anna Bridge 142:4eea097334d6 496
Anna Bridge 142:4eea097334d6 497 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 498 \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE
Anna Bridge 142:4eea097334d6 499
Anna Bridge 142:4eea097334d6 500 \return 0
Anna Bridge 142:4eea097334d6 501 */
Anna Bridge 142:4eea097334d6 502 __STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
Anna Bridge 142:4eea097334d6 503 {
Anna Bridge 142:4eea097334d6 504 *descriptor_l1 &= PAGE_NS_MASK;
Anna Bridge 142:4eea097334d6 505 *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);
Anna Bridge 142:4eea097334d6 506 return 0;
Anna Bridge 142:4eea097334d6 507 }
Anna Bridge 142:4eea097334d6 508
Anna Bridge 142:4eea097334d6 509
Anna Bridge 142:4eea097334d6 510 /** \brief Set Section memory attributes
Anna Bridge 142:4eea097334d6 511
Anna Bridge 142:4eea097334d6 512 The function sets section memory attributes
Anna Bridge 142:4eea097334d6 513
Anna Bridge 142:4eea097334d6 514 \param [out] descriptor_l1 L1 descriptor.
Anna Bridge 142:4eea097334d6 515 \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
Anna Bridge 142:4eea097334d6 516 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
Anna Bridge 142:4eea097334d6 517 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
Anna Bridge 142:4eea097334d6 518
Anna Bridge 142:4eea097334d6 519 \return 0
Anna Bridge 142:4eea097334d6 520 */
Anna Bridge 142:4eea097334d6 521 __STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)
Anna Bridge 142:4eea097334d6 522 {
Anna Bridge 142:4eea097334d6 523 *descriptor_l1 &= SECTION_TEXCB_MASK;
Anna Bridge 142:4eea097334d6 524
Anna Bridge 142:4eea097334d6 525 if (STRONGLY_ORDERED == mem)
Anna Bridge 142:4eea097334d6 526 {
Anna Bridge 142:4eea097334d6 527 return 0;
Anna Bridge 142:4eea097334d6 528 }
Anna Bridge 142:4eea097334d6 529 else if (SHARED_DEVICE == mem)
Anna Bridge 142:4eea097334d6 530 {
Anna Bridge 142:4eea097334d6 531 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
Anna Bridge 142:4eea097334d6 532 }
Anna Bridge 142:4eea097334d6 533 else if (NON_SHARED_DEVICE == mem)
Anna Bridge 142:4eea097334d6 534 {
Anna Bridge 142:4eea097334d6 535 *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);
Anna Bridge 142:4eea097334d6 536 }
Anna Bridge 142:4eea097334d6 537 else if (NORMAL == mem)
Anna Bridge 142:4eea097334d6 538 {
Anna Bridge 142:4eea097334d6 539 *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;
Anna Bridge 142:4eea097334d6 540 switch(inner)
Anna Bridge 142:4eea097334d6 541 {
Anna Bridge 142:4eea097334d6 542 case NON_CACHEABLE:
Anna Bridge 142:4eea097334d6 543 break;
Anna Bridge 142:4eea097334d6 544 case WB_WA:
Anna Bridge 142:4eea097334d6 545 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
Anna Bridge 142:4eea097334d6 546 break;
Anna Bridge 142:4eea097334d6 547 case WT:
Anna Bridge 142:4eea097334d6 548 *descriptor_l1 |= 1 << SECTION_C_SHIFT;
Anna Bridge 142:4eea097334d6 549 break;
Anna Bridge 142:4eea097334d6 550 case WB_NO_WA:
Anna Bridge 142:4eea097334d6 551 *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);
Anna Bridge 142:4eea097334d6 552 break;
Anna Bridge 142:4eea097334d6 553 }
Anna Bridge 142:4eea097334d6 554 switch(outer)
Anna Bridge 142:4eea097334d6 555 {
Anna Bridge 142:4eea097334d6 556 case NON_CACHEABLE:
Anna Bridge 142:4eea097334d6 557 break;
Anna Bridge 142:4eea097334d6 558 case WB_WA:
Anna Bridge 142:4eea097334d6 559 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);
Anna Bridge 142:4eea097334d6 560 break;
Anna Bridge 142:4eea097334d6 561 case WT:
Anna Bridge 142:4eea097334d6 562 *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;
Anna Bridge 142:4eea097334d6 563 break;
Anna Bridge 142:4eea097334d6 564 case WB_NO_WA:
Anna Bridge 142:4eea097334d6 565 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);
Anna Bridge 142:4eea097334d6 566 break;
Anna Bridge 142:4eea097334d6 567 }
Anna Bridge 142:4eea097334d6 568 }
Anna Bridge 142:4eea097334d6 569
Anna Bridge 142:4eea097334d6 570 return 0;
Anna Bridge 142:4eea097334d6 571 }
Anna Bridge 142:4eea097334d6 572
Anna Bridge 142:4eea097334d6 573 /** \brief Set 4k/64k page memory attributes
Anna Bridge 142:4eea097334d6 574
Anna Bridge 142:4eea097334d6 575 The function sets 4k/64k page memory attributes
Anna Bridge 142:4eea097334d6 576
Anna Bridge 142:4eea097334d6 577 \param [out] descriptor_l2 L2 descriptor.
Anna Bridge 142:4eea097334d6 578 \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
Anna Bridge 142:4eea097334d6 579 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
Anna Bridge 142:4eea097334d6 580 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
Anna Bridge 142:4eea097334d6 581
Anna Bridge 142:4eea097334d6 582 \return 0
Anna Bridge 142:4eea097334d6 583 */
Anna Bridge 142:4eea097334d6 584 __STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)
Anna Bridge 142:4eea097334d6 585 {
Anna Bridge 142:4eea097334d6 586 *descriptor_l2 &= PAGE_4K_TEXCB_MASK;
Anna Bridge 142:4eea097334d6 587
Anna Bridge 142:4eea097334d6 588 if (page == PAGE_64k)
Anna Bridge 142:4eea097334d6 589 {
Anna Bridge 142:4eea097334d6 590 //same as section
Anna Bridge 142:4eea097334d6 591 __memory_section(descriptor_l2, mem, outer, inner);
Anna Bridge 142:4eea097334d6 592 }
Anna Bridge 142:4eea097334d6 593 else
Anna Bridge 142:4eea097334d6 594 {
Anna Bridge 142:4eea097334d6 595 if (STRONGLY_ORDERED == mem)
Anna Bridge 142:4eea097334d6 596 {
Anna Bridge 142:4eea097334d6 597 return 0;
Anna Bridge 142:4eea097334d6 598 }
Anna Bridge 142:4eea097334d6 599 else if (SHARED_DEVICE == mem)
Anna Bridge 142:4eea097334d6 600 {
Anna Bridge 142:4eea097334d6 601 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
Anna Bridge 142:4eea097334d6 602 }
Anna Bridge 142:4eea097334d6 603 else if (NON_SHARED_DEVICE == mem)
Anna Bridge 142:4eea097334d6 604 {
Anna Bridge 142:4eea097334d6 605 *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);
Anna Bridge 142:4eea097334d6 606 }
Anna Bridge 142:4eea097334d6 607 else if (NORMAL == mem)
Anna Bridge 142:4eea097334d6 608 {
Anna Bridge 142:4eea097334d6 609 *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;
Anna Bridge 142:4eea097334d6 610 switch(inner)
Anna Bridge 142:4eea097334d6 611 {
Anna Bridge 142:4eea097334d6 612 case NON_CACHEABLE:
Anna Bridge 142:4eea097334d6 613 break;
Anna Bridge 142:4eea097334d6 614 case WB_WA:
Anna Bridge 142:4eea097334d6 615 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
Anna Bridge 142:4eea097334d6 616 break;
Anna Bridge 142:4eea097334d6 617 case WT:
Anna Bridge 142:4eea097334d6 618 *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;
Anna Bridge 142:4eea097334d6 619 break;
Anna Bridge 142:4eea097334d6 620 case WB_NO_WA:
Anna Bridge 142:4eea097334d6 621 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);
Anna Bridge 142:4eea097334d6 622 break;
Anna Bridge 142:4eea097334d6 623 }
Anna Bridge 142:4eea097334d6 624 switch(outer)
Anna Bridge 142:4eea097334d6 625 {
Anna Bridge 142:4eea097334d6 626 case NON_CACHEABLE:
Anna Bridge 142:4eea097334d6 627 break;
Anna Bridge 142:4eea097334d6 628 case WB_WA:
Anna Bridge 142:4eea097334d6 629 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);
Anna Bridge 142:4eea097334d6 630 break;
Anna Bridge 142:4eea097334d6 631 case WT:
Anna Bridge 142:4eea097334d6 632 *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;
Anna Bridge 142:4eea097334d6 633 break;
Anna Bridge 142:4eea097334d6 634 case WB_NO_WA:
Anna Bridge 142:4eea097334d6 635 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT);
Anna Bridge 142:4eea097334d6 636 break;
Anna Bridge 142:4eea097334d6 637 }
Anna Bridge 142:4eea097334d6 638 }
Anna Bridge 142:4eea097334d6 639 }
Anna Bridge 142:4eea097334d6 640
Anna Bridge 142:4eea097334d6 641 return 0;
Anna Bridge 142:4eea097334d6 642 }
Anna Bridge 142:4eea097334d6 643
Anna Bridge 142:4eea097334d6 644 /** \brief Create a L1 section descriptor
Anna Bridge 142:4eea097334d6 645
Anna Bridge 142:4eea097334d6 646 The function creates a section descriptor.
Anna Bridge 142:4eea097334d6 647
Anna Bridge 142:4eea097334d6 648 Assumptions:
Anna Bridge 142:4eea097334d6 649 - 16MB super sections not supported
Anna Bridge 142:4eea097334d6 650 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
Anna Bridge 142:4eea097334d6 651 - Functions always return 0
Anna Bridge 142:4eea097334d6 652
Anna Bridge 142:4eea097334d6 653 \param [out] descriptor L1 descriptor
Anna Bridge 142:4eea097334d6 654 \param [out] descriptor2 L2 descriptor
Anna Bridge 142:4eea097334d6 655 \param [in] reg Section attributes
Anna Bridge 142:4eea097334d6 656
Anna Bridge 142:4eea097334d6 657 \return 0
Anna Bridge 142:4eea097334d6 658 */
Anna Bridge 142:4eea097334d6 659 __STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)
Anna Bridge 142:4eea097334d6 660 {
Anna Bridge 142:4eea097334d6 661 *descriptor = 0;
Anna Bridge 142:4eea097334d6 662
Anna Bridge 142:4eea097334d6 663 __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);
Anna Bridge 142:4eea097334d6 664 __xn_section(descriptor,reg.xn_t);
Anna Bridge 142:4eea097334d6 665 __domain_section(descriptor, reg.domain);
Anna Bridge 142:4eea097334d6 666 __p_section(descriptor, reg.e_t);
Anna Bridge 142:4eea097334d6 667 __ap_section(descriptor, reg.priv_t, reg.user_t, 1);
Anna Bridge 142:4eea097334d6 668 __shared_section(descriptor,reg.sh_t);
Anna Bridge 142:4eea097334d6 669 __global_section(descriptor,reg.g_t);
Anna Bridge 142:4eea097334d6 670 __secure_section(descriptor,reg.sec_t);
Anna Bridge 142:4eea097334d6 671 *descriptor &= SECTION_MASK;
Anna Bridge 142:4eea097334d6 672 *descriptor |= SECTION_DESCRIPTOR;
Anna Bridge 142:4eea097334d6 673
Anna Bridge 142:4eea097334d6 674 return 0;
Anna Bridge 142:4eea097334d6 675
Anna Bridge 142:4eea097334d6 676 }
Anna Bridge 142:4eea097334d6 677
Anna Bridge 142:4eea097334d6 678
Anna Bridge 142:4eea097334d6 679 /** \brief Create a L1 and L2 4k/64k page descriptor
Anna Bridge 142:4eea097334d6 680
Anna Bridge 142:4eea097334d6 681 The function creates a 4k/64k page descriptor.
Anna Bridge 142:4eea097334d6 682 Assumptions:
Anna Bridge 142:4eea097334d6 683 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
Anna Bridge 142:4eea097334d6 684 - Functions always return 0
Anna Bridge 142:4eea097334d6 685
Anna Bridge 142:4eea097334d6 686 \param [out] descriptor L1 descriptor
Anna Bridge 142:4eea097334d6 687 \param [out] descriptor2 L2 descriptor
Anna Bridge 142:4eea097334d6 688 \param [in] reg 4k/64k page attributes
Anna Bridge 142:4eea097334d6 689
Anna Bridge 142:4eea097334d6 690 \return 0
Anna Bridge 142:4eea097334d6 691 */
Anna Bridge 142:4eea097334d6 692 __STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)
Anna Bridge 142:4eea097334d6 693 {
Anna Bridge 142:4eea097334d6 694 *descriptor = 0;
Anna Bridge 142:4eea097334d6 695 *descriptor2 = 0;
Anna Bridge 142:4eea097334d6 696
Anna Bridge 142:4eea097334d6 697 switch (reg.rg_t)
Anna Bridge 142:4eea097334d6 698 {
Anna Bridge 142:4eea097334d6 699 case PAGE_4k:
Anna Bridge 142:4eea097334d6 700 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);
Anna Bridge 142:4eea097334d6 701 __xn_page(descriptor2, reg.xn_t, PAGE_4k);
Anna Bridge 142:4eea097334d6 702 __domain_page(descriptor, reg.domain);
Anna Bridge 142:4eea097334d6 703 __p_page(descriptor, reg.e_t);
Anna Bridge 142:4eea097334d6 704 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
Anna Bridge 142:4eea097334d6 705 __shared_page(descriptor2,reg.sh_t);
Anna Bridge 142:4eea097334d6 706 __global_page(descriptor2,reg.g_t);
Anna Bridge 142:4eea097334d6 707 __secure_page(descriptor,reg.sec_t);
Anna Bridge 142:4eea097334d6 708 *descriptor &= PAGE_L1_MASK;
Anna Bridge 142:4eea097334d6 709 *descriptor |= PAGE_L1_DESCRIPTOR;
Anna Bridge 142:4eea097334d6 710 *descriptor2 &= PAGE_L2_4K_MASK;
Anna Bridge 142:4eea097334d6 711 *descriptor2 |= PAGE_L2_4K_DESC;
Anna Bridge 142:4eea097334d6 712 break;
Anna Bridge 142:4eea097334d6 713
Anna Bridge 142:4eea097334d6 714 case PAGE_64k:
Anna Bridge 142:4eea097334d6 715 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);
Anna Bridge 142:4eea097334d6 716 __xn_page(descriptor2, reg.xn_t, PAGE_64k);
Anna Bridge 142:4eea097334d6 717 __domain_page(descriptor, reg.domain);
Anna Bridge 142:4eea097334d6 718 __p_page(descriptor, reg.e_t);
Anna Bridge 142:4eea097334d6 719 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
Anna Bridge 142:4eea097334d6 720 __shared_page(descriptor2,reg.sh_t);
Anna Bridge 142:4eea097334d6 721 __global_page(descriptor2,reg.g_t);
Anna Bridge 142:4eea097334d6 722 __secure_page(descriptor,reg.sec_t);
Anna Bridge 142:4eea097334d6 723 *descriptor &= PAGE_L1_MASK;
Anna Bridge 142:4eea097334d6 724 *descriptor |= PAGE_L1_DESCRIPTOR;
Anna Bridge 142:4eea097334d6 725 *descriptor2 &= PAGE_L2_64K_MASK;
Anna Bridge 142:4eea097334d6 726 *descriptor2 |= PAGE_L2_64K_DESC;
Anna Bridge 142:4eea097334d6 727 break;
Anna Bridge 142:4eea097334d6 728
Anna Bridge 142:4eea097334d6 729 case SECTION:
Anna Bridge 142:4eea097334d6 730 //error
Anna Bridge 142:4eea097334d6 731 break;
Anna Bridge 142:4eea097334d6 732
Anna Bridge 142:4eea097334d6 733 }
Anna Bridge 142:4eea097334d6 734
Anna Bridge 142:4eea097334d6 735 return 0;
Anna Bridge 142:4eea097334d6 736
Anna Bridge 142:4eea097334d6 737 }
Anna Bridge 142:4eea097334d6 738
Anna Bridge 142:4eea097334d6 739 /** \brief Create a 1MB Section
Anna Bridge 142:4eea097334d6 740
Anna Bridge 142:4eea097334d6 741 \param [in] ttb Translation table base address
Anna Bridge 142:4eea097334d6 742 \param [in] base_address Section base address
Anna Bridge 142:4eea097334d6 743 \param [in] count Number of sections to create
Anna Bridge 142:4eea097334d6 744 \param [in] descriptor_l1 L1 descriptor (region attributes)
Anna Bridge 142:4eea097334d6 745
Anna Bridge 142:4eea097334d6 746 */
Anna Bridge 142:4eea097334d6 747 __STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)
Anna Bridge 142:4eea097334d6 748 {
Anna Bridge 142:4eea097334d6 749 uint32_t offset;
Anna Bridge 142:4eea097334d6 750 uint32_t entry;
Anna Bridge 142:4eea097334d6 751 uint32_t i;
Anna Bridge 142:4eea097334d6 752
Anna Bridge 142:4eea097334d6 753 offset = base_address >> 20;
Anna Bridge 142:4eea097334d6 754 entry = (base_address & 0xFFF00000) | descriptor_l1;
Anna Bridge 142:4eea097334d6 755
Anna Bridge 142:4eea097334d6 756 //4 bytes aligned
Anna Bridge 142:4eea097334d6 757 ttb = ttb + offset;
Anna Bridge 142:4eea097334d6 758
Anna Bridge 142:4eea097334d6 759 for (i = 0; i < count; i++ )
Anna Bridge 142:4eea097334d6 760 {
Anna Bridge 142:4eea097334d6 761 //4 bytes aligned
Anna Bridge 142:4eea097334d6 762 *ttb++ = entry;
Anna Bridge 142:4eea097334d6 763 entry += OFFSET_1M;
Anna Bridge 142:4eea097334d6 764 }
Anna Bridge 142:4eea097334d6 765 }
Anna Bridge 142:4eea097334d6 766
Anna Bridge 142:4eea097334d6 767 /** \brief Create a 4k page entry
Anna Bridge 142:4eea097334d6 768
Anna Bridge 142:4eea097334d6 769 \param [in] ttb L1 table base address
Anna Bridge 142:4eea097334d6 770 \param [in] base_address 4k base address
Anna Bridge 142:4eea097334d6 771 \param [in] count Number of 4k pages to create
Anna Bridge 142:4eea097334d6 772 \param [in] descriptor_l1 L1 descriptor (region attributes)
Anna Bridge 142:4eea097334d6 773 \param [in] ttb_l2 L2 table base address
Anna Bridge 142:4eea097334d6 774 \param [in] descriptor_l2 L2 descriptor (region attributes)
Anna Bridge 142:4eea097334d6 775
Anna Bridge 142:4eea097334d6 776 */
Anna Bridge 142:4eea097334d6 777 __STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
Anna Bridge 142:4eea097334d6 778 {
Anna Bridge 142:4eea097334d6 779
Anna Bridge 142:4eea097334d6 780 uint32_t offset, offset2;
Anna Bridge 142:4eea097334d6 781 uint32_t entry, entry2;
Anna Bridge 142:4eea097334d6 782 uint32_t i;
Anna Bridge 142:4eea097334d6 783
Anna Bridge 142:4eea097334d6 784
Anna Bridge 142:4eea097334d6 785 offset = base_address >> 20;
Anna Bridge 142:4eea097334d6 786 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
Anna Bridge 142:4eea097334d6 787
Anna Bridge 142:4eea097334d6 788 //4 bytes aligned
Anna Bridge 142:4eea097334d6 789 ttb += offset;
Anna Bridge 142:4eea097334d6 790 //create l1_entry
Anna Bridge 142:4eea097334d6 791 *ttb = entry;
Anna Bridge 142:4eea097334d6 792
Anna Bridge 142:4eea097334d6 793 offset2 = (base_address & 0xff000) >> 12;
Anna Bridge 142:4eea097334d6 794 ttb_l2 += offset2;
Anna Bridge 142:4eea097334d6 795 entry2 = (base_address & 0xFFFFF000) | descriptor_l2;
Anna Bridge 142:4eea097334d6 796 for (i = 0; i < count; i++ )
Anna Bridge 142:4eea097334d6 797 {
Anna Bridge 142:4eea097334d6 798 //4 bytes aligned
Anna Bridge 142:4eea097334d6 799 *ttb_l2++ = entry2;
Anna Bridge 142:4eea097334d6 800 entry2 += OFFSET_4K;
Anna Bridge 142:4eea097334d6 801 }
Anna Bridge 142:4eea097334d6 802 }
Anna Bridge 142:4eea097334d6 803
Anna Bridge 142:4eea097334d6 804 /** \brief Create a 64k page entry
Anna Bridge 142:4eea097334d6 805
Anna Bridge 142:4eea097334d6 806 \param [in] ttb L1 table base address
Anna Bridge 142:4eea097334d6 807 \param [in] base_address 64k base address
Anna Bridge 142:4eea097334d6 808 \param [in] count Number of 64k pages to create
Anna Bridge 142:4eea097334d6 809 \param [in] descriptor_l1 L1 descriptor (region attributes)
Anna Bridge 142:4eea097334d6 810 \param [in] ttb_l2 L2 table base address
Anna Bridge 142:4eea097334d6 811 \param [in] descriptor_l2 L2 descriptor (region attributes)
Anna Bridge 142:4eea097334d6 812
Anna Bridge 142:4eea097334d6 813 */
Anna Bridge 142:4eea097334d6 814 __STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
Anna Bridge 142:4eea097334d6 815 {
Anna Bridge 142:4eea097334d6 816 uint32_t offset, offset2;
Anna Bridge 142:4eea097334d6 817 uint32_t entry, entry2;
Anna Bridge 142:4eea097334d6 818 uint32_t i,j;
Anna Bridge 142:4eea097334d6 819
Anna Bridge 142:4eea097334d6 820
Anna Bridge 142:4eea097334d6 821 offset = base_address >> 20;
Anna Bridge 142:4eea097334d6 822 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
Anna Bridge 142:4eea097334d6 823
Anna Bridge 142:4eea097334d6 824 //4 bytes aligned
Anna Bridge 142:4eea097334d6 825 ttb += offset;
Anna Bridge 142:4eea097334d6 826 //create l1_entry
Anna Bridge 142:4eea097334d6 827 *ttb = entry;
Anna Bridge 142:4eea097334d6 828
Anna Bridge 142:4eea097334d6 829 offset2 = (base_address & 0xff000) >> 12;
Anna Bridge 142:4eea097334d6 830 ttb_l2 += offset2;
Anna Bridge 142:4eea097334d6 831 entry2 = (base_address & 0xFFFF0000) | descriptor_l2;
Anna Bridge 142:4eea097334d6 832 for (i = 0; i < count; i++ )
Anna Bridge 142:4eea097334d6 833 {
Anna Bridge 142:4eea097334d6 834 //create 16 entries
Anna Bridge 142:4eea097334d6 835 for (j = 0; j < 16; j++)
Anna Bridge 142:4eea097334d6 836 //4 bytes aligned
Anna Bridge 142:4eea097334d6 837 *ttb_l2++ = entry2;
Anna Bridge 142:4eea097334d6 838 entry2 += OFFSET_64K;
Anna Bridge 142:4eea097334d6 839 }
Anna Bridge 142:4eea097334d6 840 }
Anna Bridge 142:4eea097334d6 841
Anna Bridge 142:4eea097334d6 842 /*@} end of MMU_Functions */
Anna Bridge 142:4eea097334d6 843 #endif
Anna Bridge 142:4eea097334d6 844
Anna Bridge 142:4eea097334d6 845 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 846 }
Anna Bridge 142:4eea097334d6 847 #endif