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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_RO359B/core_cm4_simd.h@143:86740a56073b, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 143:86740a56073b 1 /**************************************************************************//**
AnnaBridge 143:86740a56073b 2 * @file core_cm4_simd.h
AnnaBridge 143:86740a56073b 3 * @brief CMSIS Cortex-M4 SIMD Header File
AnnaBridge 143:86740a56073b 4 * @version V3.20
AnnaBridge 143:86740a56073b 5 * @date 25. February 2013
AnnaBridge 143:86740a56073b 6 *
AnnaBridge 143:86740a56073b 7 * @note
AnnaBridge 143:86740a56073b 8 *
AnnaBridge 143:86740a56073b 9 ******************************************************************************/
AnnaBridge 143:86740a56073b 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
AnnaBridge 143:86740a56073b 11
AnnaBridge 143:86740a56073b 12 All rights reserved.
AnnaBridge 143:86740a56073b 13 Redistribution and use in source and binary forms, with or without
AnnaBridge 143:86740a56073b 14 modification, are permitted provided that the following conditions are met:
AnnaBridge 143:86740a56073b 15 - Redistributions of source code must retain the above copyright
AnnaBridge 143:86740a56073b 16 notice, this list of conditions and the following disclaimer.
AnnaBridge 143:86740a56073b 17 - Redistributions in binary form must reproduce the above copyright
AnnaBridge 143:86740a56073b 18 notice, this list of conditions and the following disclaimer in the
AnnaBridge 143:86740a56073b 19 documentation and/or other materials provided with the distribution.
AnnaBridge 143:86740a56073b 20 - Neither the name of ARM nor the names of its contributors may be used
AnnaBridge 143:86740a56073b 21 to endorse or promote products derived from this software without
AnnaBridge 143:86740a56073b 22 specific prior written permission.
AnnaBridge 143:86740a56073b 23 *
AnnaBridge 143:86740a56073b 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 143:86740a56073b 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 143:86740a56073b 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
AnnaBridge 143:86740a56073b 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
AnnaBridge 143:86740a56073b 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
AnnaBridge 143:86740a56073b 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
AnnaBridge 143:86740a56073b 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
AnnaBridge 143:86740a56073b 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
AnnaBridge 143:86740a56073b 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
AnnaBridge 143:86740a56073b 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
AnnaBridge 143:86740a56073b 34 POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 143:86740a56073b 35 ---------------------------------------------------------------------------*/
AnnaBridge 143:86740a56073b 36
AnnaBridge 143:86740a56073b 37
AnnaBridge 143:86740a56073b 38 #ifdef __cplusplus
AnnaBridge 143:86740a56073b 39 extern "C" {
AnnaBridge 143:86740a56073b 40 #endif
AnnaBridge 143:86740a56073b 41
AnnaBridge 143:86740a56073b 42 #ifndef __CORE_CM4_SIMD_H
AnnaBridge 143:86740a56073b 43 #define __CORE_CM4_SIMD_H
AnnaBridge 143:86740a56073b 44
AnnaBridge 143:86740a56073b 45
AnnaBridge 143:86740a56073b 46 /*******************************************************************************
AnnaBridge 143:86740a56073b 47 * Hardware Abstraction Layer
AnnaBridge 143:86740a56073b 48 ******************************************************************************/
AnnaBridge 143:86740a56073b 49
AnnaBridge 143:86740a56073b 50
AnnaBridge 143:86740a56073b 51 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 143:86740a56073b 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 143:86740a56073b 53 Access to dedicated SIMD instructions
AnnaBridge 143:86740a56073b 54 @{
AnnaBridge 143:86740a56073b 55 */
AnnaBridge 143:86740a56073b 56
AnnaBridge 143:86740a56073b 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
AnnaBridge 143:86740a56073b 58 /* ARM armcc specific functions */
AnnaBridge 143:86740a56073b 59
AnnaBridge 143:86740a56073b 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 143:86740a56073b 61 #define __SADD8 __sadd8
AnnaBridge 143:86740a56073b 62 #define __QADD8 __qadd8
AnnaBridge 143:86740a56073b 63 #define __SHADD8 __shadd8
AnnaBridge 143:86740a56073b 64 #define __UADD8 __uadd8
AnnaBridge 143:86740a56073b 65 #define __UQADD8 __uqadd8
AnnaBridge 143:86740a56073b 66 #define __UHADD8 __uhadd8
AnnaBridge 143:86740a56073b 67 #define __SSUB8 __ssub8
AnnaBridge 143:86740a56073b 68 #define __QSUB8 __qsub8
AnnaBridge 143:86740a56073b 69 #define __SHSUB8 __shsub8
AnnaBridge 143:86740a56073b 70 #define __USUB8 __usub8
AnnaBridge 143:86740a56073b 71 #define __UQSUB8 __uqsub8
AnnaBridge 143:86740a56073b 72 #define __UHSUB8 __uhsub8
AnnaBridge 143:86740a56073b 73 #define __SADD16 __sadd16
AnnaBridge 143:86740a56073b 74 #define __QADD16 __qadd16
AnnaBridge 143:86740a56073b 75 #define __SHADD16 __shadd16
AnnaBridge 143:86740a56073b 76 #define __UADD16 __uadd16
AnnaBridge 143:86740a56073b 77 #define __UQADD16 __uqadd16
AnnaBridge 143:86740a56073b 78 #define __UHADD16 __uhadd16
AnnaBridge 143:86740a56073b 79 #define __SSUB16 __ssub16
AnnaBridge 143:86740a56073b 80 #define __QSUB16 __qsub16
AnnaBridge 143:86740a56073b 81 #define __SHSUB16 __shsub16
AnnaBridge 143:86740a56073b 82 #define __USUB16 __usub16
AnnaBridge 143:86740a56073b 83 #define __UQSUB16 __uqsub16
AnnaBridge 143:86740a56073b 84 #define __UHSUB16 __uhsub16
AnnaBridge 143:86740a56073b 85 #define __SASX __sasx
AnnaBridge 143:86740a56073b 86 #define __QASX __qasx
AnnaBridge 143:86740a56073b 87 #define __SHASX __shasx
AnnaBridge 143:86740a56073b 88 #define __UASX __uasx
AnnaBridge 143:86740a56073b 89 #define __UQASX __uqasx
AnnaBridge 143:86740a56073b 90 #define __UHASX __uhasx
AnnaBridge 143:86740a56073b 91 #define __SSAX __ssax
AnnaBridge 143:86740a56073b 92 #define __QSAX __qsax
AnnaBridge 143:86740a56073b 93 #define __SHSAX __shsax
AnnaBridge 143:86740a56073b 94 #define __USAX __usax
AnnaBridge 143:86740a56073b 95 #define __UQSAX __uqsax
AnnaBridge 143:86740a56073b 96 #define __UHSAX __uhsax
AnnaBridge 143:86740a56073b 97 #define __USAD8 __usad8
AnnaBridge 143:86740a56073b 98 #define __USADA8 __usada8
AnnaBridge 143:86740a56073b 99 #define __SSAT16 __ssat16
AnnaBridge 143:86740a56073b 100 #define __USAT16 __usat16
AnnaBridge 143:86740a56073b 101 #define __UXTB16 __uxtb16
AnnaBridge 143:86740a56073b 102 #define __UXTAB16 __uxtab16
AnnaBridge 143:86740a56073b 103 #define __SXTB16 __sxtb16
AnnaBridge 143:86740a56073b 104 #define __SXTAB16 __sxtab16
AnnaBridge 143:86740a56073b 105 #define __SMUAD __smuad
AnnaBridge 143:86740a56073b 106 #define __SMUADX __smuadx
AnnaBridge 143:86740a56073b 107 #define __SMLAD __smlad
AnnaBridge 143:86740a56073b 108 #define __SMLADX __smladx
AnnaBridge 143:86740a56073b 109 #define __SMLALD __smlald
AnnaBridge 143:86740a56073b 110 #define __SMLALDX __smlaldx
AnnaBridge 143:86740a56073b 111 #define __SMUSD __smusd
AnnaBridge 143:86740a56073b 112 #define __SMUSDX __smusdx
AnnaBridge 143:86740a56073b 113 #define __SMLSD __smlsd
AnnaBridge 143:86740a56073b 114 #define __SMLSDX __smlsdx
AnnaBridge 143:86740a56073b 115 #define __SMLSLD __smlsld
AnnaBridge 143:86740a56073b 116 #define __SMLSLDX __smlsldx
AnnaBridge 143:86740a56073b 117 #define __SEL __sel
AnnaBridge 143:86740a56073b 118 #define __QADD __qadd
AnnaBridge 143:86740a56073b 119 #define __QSUB __qsub
AnnaBridge 143:86740a56073b 120
AnnaBridge 143:86740a56073b 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 143:86740a56073b 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 143:86740a56073b 123
AnnaBridge 143:86740a56073b 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 143:86740a56073b 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 143:86740a56073b 126
AnnaBridge 143:86740a56073b 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
AnnaBridge 143:86740a56073b 128 ((int64_t)(ARG3) << 32) ) >> 32))
AnnaBridge 143:86740a56073b 129
AnnaBridge 143:86740a56073b 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 143:86740a56073b 131
AnnaBridge 143:86740a56073b 132
AnnaBridge 143:86740a56073b 133
AnnaBridge 143:86740a56073b 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
AnnaBridge 143:86740a56073b 135 /* IAR iccarm specific functions */
AnnaBridge 143:86740a56073b 136
AnnaBridge 143:86740a56073b 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 143:86740a56073b 138 #include <cmsis_iar.h>
AnnaBridge 143:86740a56073b 139
AnnaBridge 143:86740a56073b 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 143:86740a56073b 141
AnnaBridge 143:86740a56073b 142
AnnaBridge 143:86740a56073b 143
AnnaBridge 143:86740a56073b 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
AnnaBridge 143:86740a56073b 145 /* TI CCS specific functions */
AnnaBridge 143:86740a56073b 146
AnnaBridge 143:86740a56073b 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 143:86740a56073b 148 #include <cmsis_ccs.h>
AnnaBridge 143:86740a56073b 149
AnnaBridge 143:86740a56073b 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 143:86740a56073b 151
AnnaBridge 143:86740a56073b 152
AnnaBridge 143:86740a56073b 153
AnnaBridge 143:86740a56073b 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
AnnaBridge 143:86740a56073b 155 /* GNU gcc specific functions */
AnnaBridge 143:86740a56073b 156
AnnaBridge 143:86740a56073b 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 143:86740a56073b 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 159 {
AnnaBridge 143:86740a56073b 160 uint32_t result;
AnnaBridge 143:86740a56073b 161
AnnaBridge 143:86740a56073b 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 163 return(result);
AnnaBridge 143:86740a56073b 164 }
AnnaBridge 143:86740a56073b 165
AnnaBridge 143:86740a56073b 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 167 {
AnnaBridge 143:86740a56073b 168 uint32_t result;
AnnaBridge 143:86740a56073b 169
AnnaBridge 143:86740a56073b 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 171 return(result);
AnnaBridge 143:86740a56073b 172 }
AnnaBridge 143:86740a56073b 173
AnnaBridge 143:86740a56073b 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 175 {
AnnaBridge 143:86740a56073b 176 uint32_t result;
AnnaBridge 143:86740a56073b 177
AnnaBridge 143:86740a56073b 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 179 return(result);
AnnaBridge 143:86740a56073b 180 }
AnnaBridge 143:86740a56073b 181
AnnaBridge 143:86740a56073b 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 183 {
AnnaBridge 143:86740a56073b 184 uint32_t result;
AnnaBridge 143:86740a56073b 185
AnnaBridge 143:86740a56073b 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 187 return(result);
AnnaBridge 143:86740a56073b 188 }
AnnaBridge 143:86740a56073b 189
AnnaBridge 143:86740a56073b 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 191 {
AnnaBridge 143:86740a56073b 192 uint32_t result;
AnnaBridge 143:86740a56073b 193
AnnaBridge 143:86740a56073b 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 195 return(result);
AnnaBridge 143:86740a56073b 196 }
AnnaBridge 143:86740a56073b 197
AnnaBridge 143:86740a56073b 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 199 {
AnnaBridge 143:86740a56073b 200 uint32_t result;
AnnaBridge 143:86740a56073b 201
AnnaBridge 143:86740a56073b 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 203 return(result);
AnnaBridge 143:86740a56073b 204 }
AnnaBridge 143:86740a56073b 205
AnnaBridge 143:86740a56073b 206
AnnaBridge 143:86740a56073b 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 208 {
AnnaBridge 143:86740a56073b 209 uint32_t result;
AnnaBridge 143:86740a56073b 210
AnnaBridge 143:86740a56073b 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 212 return(result);
AnnaBridge 143:86740a56073b 213 }
AnnaBridge 143:86740a56073b 214
AnnaBridge 143:86740a56073b 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 216 {
AnnaBridge 143:86740a56073b 217 uint32_t result;
AnnaBridge 143:86740a56073b 218
AnnaBridge 143:86740a56073b 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 220 return(result);
AnnaBridge 143:86740a56073b 221 }
AnnaBridge 143:86740a56073b 222
AnnaBridge 143:86740a56073b 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 224 {
AnnaBridge 143:86740a56073b 225 uint32_t result;
AnnaBridge 143:86740a56073b 226
AnnaBridge 143:86740a56073b 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 228 return(result);
AnnaBridge 143:86740a56073b 229 }
AnnaBridge 143:86740a56073b 230
AnnaBridge 143:86740a56073b 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 232 {
AnnaBridge 143:86740a56073b 233 uint32_t result;
AnnaBridge 143:86740a56073b 234
AnnaBridge 143:86740a56073b 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 236 return(result);
AnnaBridge 143:86740a56073b 237 }
AnnaBridge 143:86740a56073b 238
AnnaBridge 143:86740a56073b 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 240 {
AnnaBridge 143:86740a56073b 241 uint32_t result;
AnnaBridge 143:86740a56073b 242
AnnaBridge 143:86740a56073b 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 244 return(result);
AnnaBridge 143:86740a56073b 245 }
AnnaBridge 143:86740a56073b 246
AnnaBridge 143:86740a56073b 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 248 {
AnnaBridge 143:86740a56073b 249 uint32_t result;
AnnaBridge 143:86740a56073b 250
AnnaBridge 143:86740a56073b 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 252 return(result);
AnnaBridge 143:86740a56073b 253 }
AnnaBridge 143:86740a56073b 254
AnnaBridge 143:86740a56073b 255
AnnaBridge 143:86740a56073b 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 257 {
AnnaBridge 143:86740a56073b 258 uint32_t result;
AnnaBridge 143:86740a56073b 259
AnnaBridge 143:86740a56073b 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 261 return(result);
AnnaBridge 143:86740a56073b 262 }
AnnaBridge 143:86740a56073b 263
AnnaBridge 143:86740a56073b 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 265 {
AnnaBridge 143:86740a56073b 266 uint32_t result;
AnnaBridge 143:86740a56073b 267
AnnaBridge 143:86740a56073b 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 269 return(result);
AnnaBridge 143:86740a56073b 270 }
AnnaBridge 143:86740a56073b 271
AnnaBridge 143:86740a56073b 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 273 {
AnnaBridge 143:86740a56073b 274 uint32_t result;
AnnaBridge 143:86740a56073b 275
AnnaBridge 143:86740a56073b 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 277 return(result);
AnnaBridge 143:86740a56073b 278 }
AnnaBridge 143:86740a56073b 279
AnnaBridge 143:86740a56073b 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 281 {
AnnaBridge 143:86740a56073b 282 uint32_t result;
AnnaBridge 143:86740a56073b 283
AnnaBridge 143:86740a56073b 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 285 return(result);
AnnaBridge 143:86740a56073b 286 }
AnnaBridge 143:86740a56073b 287
AnnaBridge 143:86740a56073b 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 289 {
AnnaBridge 143:86740a56073b 290 uint32_t result;
AnnaBridge 143:86740a56073b 291
AnnaBridge 143:86740a56073b 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 293 return(result);
AnnaBridge 143:86740a56073b 294 }
AnnaBridge 143:86740a56073b 295
AnnaBridge 143:86740a56073b 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 297 {
AnnaBridge 143:86740a56073b 298 uint32_t result;
AnnaBridge 143:86740a56073b 299
AnnaBridge 143:86740a56073b 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 301 return(result);
AnnaBridge 143:86740a56073b 302 }
AnnaBridge 143:86740a56073b 303
AnnaBridge 143:86740a56073b 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 305 {
AnnaBridge 143:86740a56073b 306 uint32_t result;
AnnaBridge 143:86740a56073b 307
AnnaBridge 143:86740a56073b 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 309 return(result);
AnnaBridge 143:86740a56073b 310 }
AnnaBridge 143:86740a56073b 311
AnnaBridge 143:86740a56073b 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 313 {
AnnaBridge 143:86740a56073b 314 uint32_t result;
AnnaBridge 143:86740a56073b 315
AnnaBridge 143:86740a56073b 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 317 return(result);
AnnaBridge 143:86740a56073b 318 }
AnnaBridge 143:86740a56073b 319
AnnaBridge 143:86740a56073b 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 321 {
AnnaBridge 143:86740a56073b 322 uint32_t result;
AnnaBridge 143:86740a56073b 323
AnnaBridge 143:86740a56073b 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 325 return(result);
AnnaBridge 143:86740a56073b 326 }
AnnaBridge 143:86740a56073b 327
AnnaBridge 143:86740a56073b 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 329 {
AnnaBridge 143:86740a56073b 330 uint32_t result;
AnnaBridge 143:86740a56073b 331
AnnaBridge 143:86740a56073b 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 333 return(result);
AnnaBridge 143:86740a56073b 334 }
AnnaBridge 143:86740a56073b 335
AnnaBridge 143:86740a56073b 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 337 {
AnnaBridge 143:86740a56073b 338 uint32_t result;
AnnaBridge 143:86740a56073b 339
AnnaBridge 143:86740a56073b 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 341 return(result);
AnnaBridge 143:86740a56073b 342 }
AnnaBridge 143:86740a56073b 343
AnnaBridge 143:86740a56073b 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 345 {
AnnaBridge 143:86740a56073b 346 uint32_t result;
AnnaBridge 143:86740a56073b 347
AnnaBridge 143:86740a56073b 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 349 return(result);
AnnaBridge 143:86740a56073b 350 }
AnnaBridge 143:86740a56073b 351
AnnaBridge 143:86740a56073b 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 353 {
AnnaBridge 143:86740a56073b 354 uint32_t result;
AnnaBridge 143:86740a56073b 355
AnnaBridge 143:86740a56073b 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 357 return(result);
AnnaBridge 143:86740a56073b 358 }
AnnaBridge 143:86740a56073b 359
AnnaBridge 143:86740a56073b 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 361 {
AnnaBridge 143:86740a56073b 362 uint32_t result;
AnnaBridge 143:86740a56073b 363
AnnaBridge 143:86740a56073b 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 365 return(result);
AnnaBridge 143:86740a56073b 366 }
AnnaBridge 143:86740a56073b 367
AnnaBridge 143:86740a56073b 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 369 {
AnnaBridge 143:86740a56073b 370 uint32_t result;
AnnaBridge 143:86740a56073b 371
AnnaBridge 143:86740a56073b 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 373 return(result);
AnnaBridge 143:86740a56073b 374 }
AnnaBridge 143:86740a56073b 375
AnnaBridge 143:86740a56073b 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 377 {
AnnaBridge 143:86740a56073b 378 uint32_t result;
AnnaBridge 143:86740a56073b 379
AnnaBridge 143:86740a56073b 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 381 return(result);
AnnaBridge 143:86740a56073b 382 }
AnnaBridge 143:86740a56073b 383
AnnaBridge 143:86740a56073b 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 385 {
AnnaBridge 143:86740a56073b 386 uint32_t result;
AnnaBridge 143:86740a56073b 387
AnnaBridge 143:86740a56073b 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 389 return(result);
AnnaBridge 143:86740a56073b 390 }
AnnaBridge 143:86740a56073b 391
AnnaBridge 143:86740a56073b 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 393 {
AnnaBridge 143:86740a56073b 394 uint32_t result;
AnnaBridge 143:86740a56073b 395
AnnaBridge 143:86740a56073b 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 397 return(result);
AnnaBridge 143:86740a56073b 398 }
AnnaBridge 143:86740a56073b 399
AnnaBridge 143:86740a56073b 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 401 {
AnnaBridge 143:86740a56073b 402 uint32_t result;
AnnaBridge 143:86740a56073b 403
AnnaBridge 143:86740a56073b 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 405 return(result);
AnnaBridge 143:86740a56073b 406 }
AnnaBridge 143:86740a56073b 407
AnnaBridge 143:86740a56073b 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 409 {
AnnaBridge 143:86740a56073b 410 uint32_t result;
AnnaBridge 143:86740a56073b 411
AnnaBridge 143:86740a56073b 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 413 return(result);
AnnaBridge 143:86740a56073b 414 }
AnnaBridge 143:86740a56073b 415
AnnaBridge 143:86740a56073b 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 417 {
AnnaBridge 143:86740a56073b 418 uint32_t result;
AnnaBridge 143:86740a56073b 419
AnnaBridge 143:86740a56073b 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 421 return(result);
AnnaBridge 143:86740a56073b 422 }
AnnaBridge 143:86740a56073b 423
AnnaBridge 143:86740a56073b 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 425 {
AnnaBridge 143:86740a56073b 426 uint32_t result;
AnnaBridge 143:86740a56073b 427
AnnaBridge 143:86740a56073b 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 429 return(result);
AnnaBridge 143:86740a56073b 430 }
AnnaBridge 143:86740a56073b 431
AnnaBridge 143:86740a56073b 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 433 {
AnnaBridge 143:86740a56073b 434 uint32_t result;
AnnaBridge 143:86740a56073b 435
AnnaBridge 143:86740a56073b 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 437 return(result);
AnnaBridge 143:86740a56073b 438 }
AnnaBridge 143:86740a56073b 439
AnnaBridge 143:86740a56073b 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 441 {
AnnaBridge 143:86740a56073b 442 uint32_t result;
AnnaBridge 143:86740a56073b 443
AnnaBridge 143:86740a56073b 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 445 return(result);
AnnaBridge 143:86740a56073b 446 }
AnnaBridge 143:86740a56073b 447
AnnaBridge 143:86740a56073b 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 449 {
AnnaBridge 143:86740a56073b 450 uint32_t result;
AnnaBridge 143:86740a56073b 451
AnnaBridge 143:86740a56073b 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 453 return(result);
AnnaBridge 143:86740a56073b 454 }
AnnaBridge 143:86740a56073b 455
AnnaBridge 143:86740a56073b 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 143:86740a56073b 457 {
AnnaBridge 143:86740a56073b 458 uint32_t result;
AnnaBridge 143:86740a56073b 459
AnnaBridge 143:86740a56073b 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 143:86740a56073b 461 return(result);
AnnaBridge 143:86740a56073b 462 }
AnnaBridge 143:86740a56073b 463
AnnaBridge 143:86740a56073b 464 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 143:86740a56073b 465 ({ \
AnnaBridge 143:86740a56073b 466 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 143:86740a56073b 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 143:86740a56073b 468 __RES; \
AnnaBridge 143:86740a56073b 469 })
AnnaBridge 143:86740a56073b 470
AnnaBridge 143:86740a56073b 471 #define __USAT16(ARG1,ARG2) \
AnnaBridge 143:86740a56073b 472 ({ \
AnnaBridge 143:86740a56073b 473 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 143:86740a56073b 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 143:86740a56073b 475 __RES; \
AnnaBridge 143:86740a56073b 476 })
AnnaBridge 143:86740a56073b 477
AnnaBridge 143:86740a56073b 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 143:86740a56073b 479 {
AnnaBridge 143:86740a56073b 480 uint32_t result;
AnnaBridge 143:86740a56073b 481
AnnaBridge 143:86740a56073b 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 143:86740a56073b 483 return(result);
AnnaBridge 143:86740a56073b 484 }
AnnaBridge 143:86740a56073b 485
AnnaBridge 143:86740a56073b 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 487 {
AnnaBridge 143:86740a56073b 488 uint32_t result;
AnnaBridge 143:86740a56073b 489
AnnaBridge 143:86740a56073b 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 491 return(result);
AnnaBridge 143:86740a56073b 492 }
AnnaBridge 143:86740a56073b 493
AnnaBridge 143:86740a56073b 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 143:86740a56073b 495 {
AnnaBridge 143:86740a56073b 496 uint32_t result;
AnnaBridge 143:86740a56073b 497
AnnaBridge 143:86740a56073b 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 143:86740a56073b 499 return(result);
AnnaBridge 143:86740a56073b 500 }
AnnaBridge 143:86740a56073b 501
AnnaBridge 143:86740a56073b 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 503 {
AnnaBridge 143:86740a56073b 504 uint32_t result;
AnnaBridge 143:86740a56073b 505
AnnaBridge 143:86740a56073b 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 507 return(result);
AnnaBridge 143:86740a56073b 508 }
AnnaBridge 143:86740a56073b 509
AnnaBridge 143:86740a56073b 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 511 {
AnnaBridge 143:86740a56073b 512 uint32_t result;
AnnaBridge 143:86740a56073b 513
AnnaBridge 143:86740a56073b 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 515 return(result);
AnnaBridge 143:86740a56073b 516 }
AnnaBridge 143:86740a56073b 517
AnnaBridge 143:86740a56073b 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 519 {
AnnaBridge 143:86740a56073b 520 uint32_t result;
AnnaBridge 143:86740a56073b 521
AnnaBridge 143:86740a56073b 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 523 return(result);
AnnaBridge 143:86740a56073b 524 }
AnnaBridge 143:86740a56073b 525
AnnaBridge 143:86740a56073b 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 143:86740a56073b 527 {
AnnaBridge 143:86740a56073b 528 uint32_t result;
AnnaBridge 143:86740a56073b 529
AnnaBridge 143:86740a56073b 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 143:86740a56073b 531 return(result);
AnnaBridge 143:86740a56073b 532 }
AnnaBridge 143:86740a56073b 533
AnnaBridge 143:86740a56073b 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 143:86740a56073b 535 {
AnnaBridge 143:86740a56073b 536 uint32_t result;
AnnaBridge 143:86740a56073b 537
AnnaBridge 143:86740a56073b 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 143:86740a56073b 539 return(result);
AnnaBridge 143:86740a56073b 540 }
AnnaBridge 143:86740a56073b 541
AnnaBridge 143:86740a56073b 542 #define __SMLALD(ARG1,ARG2,ARG3) \
AnnaBridge 143:86740a56073b 543 ({ \
AnnaBridge 143:86740a56073b 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
AnnaBridge 143:86740a56073b 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
AnnaBridge 143:86740a56073b 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
AnnaBridge 143:86740a56073b 547 })
AnnaBridge 143:86740a56073b 548
AnnaBridge 143:86740a56073b 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
AnnaBridge 143:86740a56073b 550 ({ \
AnnaBridge 143:86740a56073b 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
AnnaBridge 143:86740a56073b 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
AnnaBridge 143:86740a56073b 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
AnnaBridge 143:86740a56073b 554 })
AnnaBridge 143:86740a56073b 555
AnnaBridge 143:86740a56073b 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 557 {
AnnaBridge 143:86740a56073b 558 uint32_t result;
AnnaBridge 143:86740a56073b 559
AnnaBridge 143:86740a56073b 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 561 return(result);
AnnaBridge 143:86740a56073b 562 }
AnnaBridge 143:86740a56073b 563
AnnaBridge 143:86740a56073b 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 565 {
AnnaBridge 143:86740a56073b 566 uint32_t result;
AnnaBridge 143:86740a56073b 567
AnnaBridge 143:86740a56073b 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 569 return(result);
AnnaBridge 143:86740a56073b 570 }
AnnaBridge 143:86740a56073b 571
AnnaBridge 143:86740a56073b 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 143:86740a56073b 573 {
AnnaBridge 143:86740a56073b 574 uint32_t result;
AnnaBridge 143:86740a56073b 575
AnnaBridge 143:86740a56073b 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 143:86740a56073b 577 return(result);
AnnaBridge 143:86740a56073b 578 }
AnnaBridge 143:86740a56073b 579
AnnaBridge 143:86740a56073b 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 143:86740a56073b 581 {
AnnaBridge 143:86740a56073b 582 uint32_t result;
AnnaBridge 143:86740a56073b 583
AnnaBridge 143:86740a56073b 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 143:86740a56073b 585 return(result);
AnnaBridge 143:86740a56073b 586 }
AnnaBridge 143:86740a56073b 587
AnnaBridge 143:86740a56073b 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
AnnaBridge 143:86740a56073b 589 ({ \
AnnaBridge 143:86740a56073b 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
AnnaBridge 143:86740a56073b 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
AnnaBridge 143:86740a56073b 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
AnnaBridge 143:86740a56073b 593 })
AnnaBridge 143:86740a56073b 594
AnnaBridge 143:86740a56073b 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
AnnaBridge 143:86740a56073b 596 ({ \
AnnaBridge 143:86740a56073b 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
AnnaBridge 143:86740a56073b 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
AnnaBridge 143:86740a56073b 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
AnnaBridge 143:86740a56073b 600 })
AnnaBridge 143:86740a56073b 601
AnnaBridge 143:86740a56073b 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 603 {
AnnaBridge 143:86740a56073b 604 uint32_t result;
AnnaBridge 143:86740a56073b 605
AnnaBridge 143:86740a56073b 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 607 return(result);
AnnaBridge 143:86740a56073b 608 }
AnnaBridge 143:86740a56073b 609
AnnaBridge 143:86740a56073b 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 611 {
AnnaBridge 143:86740a56073b 612 uint32_t result;
AnnaBridge 143:86740a56073b 613
AnnaBridge 143:86740a56073b 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 615 return(result);
AnnaBridge 143:86740a56073b 616 }
AnnaBridge 143:86740a56073b 617
AnnaBridge 143:86740a56073b 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
AnnaBridge 143:86740a56073b 619 {
AnnaBridge 143:86740a56073b 620 uint32_t result;
AnnaBridge 143:86740a56073b 621
AnnaBridge 143:86740a56073b 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 143:86740a56073b 623 return(result);
AnnaBridge 143:86740a56073b 624 }
AnnaBridge 143:86740a56073b 625
AnnaBridge 143:86740a56073b 626 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 143:86740a56073b 627 ({ \
AnnaBridge 143:86740a56073b 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 143:86740a56073b 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 143:86740a56073b 630 __RES; \
AnnaBridge 143:86740a56073b 631 })
AnnaBridge 143:86740a56073b 632
AnnaBridge 143:86740a56073b 633 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 143:86740a56073b 634 ({ \
AnnaBridge 143:86740a56073b 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 143:86740a56073b 636 if (ARG3 == 0) \
AnnaBridge 143:86740a56073b 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 143:86740a56073b 638 else \
AnnaBridge 143:86740a56073b 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 143:86740a56073b 640 __RES; \
AnnaBridge 143:86740a56073b 641 })
AnnaBridge 143:86740a56073b 642
AnnaBridge 143:86740a56073b 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 143:86740a56073b 644 {
AnnaBridge 143:86740a56073b 645 int32_t result;
AnnaBridge 143:86740a56073b 646
AnnaBridge 143:86740a56073b 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 143:86740a56073b 648 return(result);
AnnaBridge 143:86740a56073b 649 }
AnnaBridge 143:86740a56073b 650
AnnaBridge 143:86740a56073b 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 143:86740a56073b 652
AnnaBridge 143:86740a56073b 653
AnnaBridge 143:86740a56073b 654
AnnaBridge 143:86740a56073b 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
AnnaBridge 143:86740a56073b 656 /* TASKING carm specific functions */
AnnaBridge 143:86740a56073b 657
AnnaBridge 143:86740a56073b 658
AnnaBridge 143:86740a56073b 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 143:86740a56073b 660 /* not yet supported */
AnnaBridge 143:86740a56073b 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 143:86740a56073b 662
AnnaBridge 143:86740a56073b 663
AnnaBridge 143:86740a56073b 664 #endif
AnnaBridge 143:86740a56073b 665
AnnaBridge 143:86740a56073b 666 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 143:86740a56073b 667
AnnaBridge 143:86740a56073b 668
AnnaBridge 143:86740a56073b 669 #endif /* __CORE_CM4_SIMD_H */
AnnaBridge 143:86740a56073b 670
AnnaBridge 143:86740a56073b 671 #ifdef __cplusplus
AnnaBridge 143:86740a56073b 672 }
AnnaBridge 143:86740a56073b 673 #endif