The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
AnnaBridge
Date:
Fri May 26 12:30:20 2017 +0100
Revision:
143:86740a56073b
Parent:
89:552587b429a1
Release 143 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 88:9327015d4013 1 /**************************************************************************//**
bogdanm 88:9327015d4013 2 * @file core_cm4_simd.h
bogdanm 88:9327015d4013 3 * @brief CMSIS Cortex-M4 SIMD Header File
bogdanm 88:9327015d4013 4 * @version V3.20
bogdanm 88:9327015d4013 5 * @date 25. February 2013
bogdanm 88:9327015d4013 6 *
bogdanm 88:9327015d4013 7 * @note
bogdanm 88:9327015d4013 8 *
bogdanm 88:9327015d4013 9 ******************************************************************************/
bogdanm 88:9327015d4013 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 88:9327015d4013 11
bogdanm 88:9327015d4013 12 All rights reserved.
bogdanm 88:9327015d4013 13 Redistribution and use in source and binary forms, with or without
bogdanm 88:9327015d4013 14 modification, are permitted provided that the following conditions are met:
bogdanm 88:9327015d4013 15 - Redistributions of source code must retain the above copyright
bogdanm 88:9327015d4013 16 notice, this list of conditions and the following disclaimer.
bogdanm 88:9327015d4013 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 88:9327015d4013 18 notice, this list of conditions and the following disclaimer in the
bogdanm 88:9327015d4013 19 documentation and/or other materials provided with the distribution.
bogdanm 88:9327015d4013 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 88:9327015d4013 21 to endorse or promote products derived from this software without
bogdanm 88:9327015d4013 22 specific prior written permission.
bogdanm 88:9327015d4013 23 *
bogdanm 88:9327015d4013 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 88:9327015d4013 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 88:9327015d4013 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 88:9327015d4013 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 88:9327015d4013 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 88:9327015d4013 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 88:9327015d4013 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 88:9327015d4013 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 88:9327015d4013 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 88:9327015d4013 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 88:9327015d4013 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 88:9327015d4013 35 ---------------------------------------------------------------------------*/
bogdanm 88:9327015d4013 36
bogdanm 88:9327015d4013 37
bogdanm 88:9327015d4013 38 #ifdef __cplusplus
bogdanm 88:9327015d4013 39 extern "C" {
bogdanm 88:9327015d4013 40 #endif
bogdanm 88:9327015d4013 41
bogdanm 88:9327015d4013 42 #ifndef __CORE_CM4_SIMD_H
bogdanm 88:9327015d4013 43 #define __CORE_CM4_SIMD_H
bogdanm 88:9327015d4013 44
bogdanm 88:9327015d4013 45
bogdanm 88:9327015d4013 46 /*******************************************************************************
bogdanm 88:9327015d4013 47 * Hardware Abstraction Layer
bogdanm 88:9327015d4013 48 ******************************************************************************/
bogdanm 88:9327015d4013 49
bogdanm 88:9327015d4013 50
bogdanm 88:9327015d4013 51 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 88:9327015d4013 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 88:9327015d4013 53 Access to dedicated SIMD instructions
bogdanm 88:9327015d4013 54 @{
bogdanm 88:9327015d4013 55 */
bogdanm 88:9327015d4013 56
bogdanm 88:9327015d4013 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 88:9327015d4013 58 /* ARM armcc specific functions */
bogdanm 88:9327015d4013 59
bogdanm 88:9327015d4013 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 88:9327015d4013 61 #define __SADD8 __sadd8
bogdanm 88:9327015d4013 62 #define __QADD8 __qadd8
bogdanm 88:9327015d4013 63 #define __SHADD8 __shadd8
bogdanm 88:9327015d4013 64 #define __UADD8 __uadd8
bogdanm 88:9327015d4013 65 #define __UQADD8 __uqadd8
bogdanm 88:9327015d4013 66 #define __UHADD8 __uhadd8
bogdanm 88:9327015d4013 67 #define __SSUB8 __ssub8
bogdanm 88:9327015d4013 68 #define __QSUB8 __qsub8
bogdanm 88:9327015d4013 69 #define __SHSUB8 __shsub8
bogdanm 88:9327015d4013 70 #define __USUB8 __usub8
bogdanm 88:9327015d4013 71 #define __UQSUB8 __uqsub8
bogdanm 88:9327015d4013 72 #define __UHSUB8 __uhsub8
bogdanm 88:9327015d4013 73 #define __SADD16 __sadd16
bogdanm 88:9327015d4013 74 #define __QADD16 __qadd16
bogdanm 88:9327015d4013 75 #define __SHADD16 __shadd16
bogdanm 88:9327015d4013 76 #define __UADD16 __uadd16
bogdanm 88:9327015d4013 77 #define __UQADD16 __uqadd16
bogdanm 88:9327015d4013 78 #define __UHADD16 __uhadd16
bogdanm 88:9327015d4013 79 #define __SSUB16 __ssub16
bogdanm 88:9327015d4013 80 #define __QSUB16 __qsub16
bogdanm 88:9327015d4013 81 #define __SHSUB16 __shsub16
bogdanm 88:9327015d4013 82 #define __USUB16 __usub16
bogdanm 88:9327015d4013 83 #define __UQSUB16 __uqsub16
bogdanm 88:9327015d4013 84 #define __UHSUB16 __uhsub16
bogdanm 88:9327015d4013 85 #define __SASX __sasx
bogdanm 88:9327015d4013 86 #define __QASX __qasx
bogdanm 88:9327015d4013 87 #define __SHASX __shasx
bogdanm 88:9327015d4013 88 #define __UASX __uasx
bogdanm 88:9327015d4013 89 #define __UQASX __uqasx
bogdanm 88:9327015d4013 90 #define __UHASX __uhasx
bogdanm 88:9327015d4013 91 #define __SSAX __ssax
bogdanm 88:9327015d4013 92 #define __QSAX __qsax
bogdanm 88:9327015d4013 93 #define __SHSAX __shsax
bogdanm 88:9327015d4013 94 #define __USAX __usax
bogdanm 88:9327015d4013 95 #define __UQSAX __uqsax
bogdanm 88:9327015d4013 96 #define __UHSAX __uhsax
bogdanm 88:9327015d4013 97 #define __USAD8 __usad8
bogdanm 88:9327015d4013 98 #define __USADA8 __usada8
bogdanm 88:9327015d4013 99 #define __SSAT16 __ssat16
bogdanm 88:9327015d4013 100 #define __USAT16 __usat16
bogdanm 88:9327015d4013 101 #define __UXTB16 __uxtb16
bogdanm 88:9327015d4013 102 #define __UXTAB16 __uxtab16
bogdanm 88:9327015d4013 103 #define __SXTB16 __sxtb16
bogdanm 88:9327015d4013 104 #define __SXTAB16 __sxtab16
bogdanm 88:9327015d4013 105 #define __SMUAD __smuad
bogdanm 88:9327015d4013 106 #define __SMUADX __smuadx
bogdanm 88:9327015d4013 107 #define __SMLAD __smlad
bogdanm 88:9327015d4013 108 #define __SMLADX __smladx
bogdanm 88:9327015d4013 109 #define __SMLALD __smlald
bogdanm 88:9327015d4013 110 #define __SMLALDX __smlaldx
bogdanm 88:9327015d4013 111 #define __SMUSD __smusd
bogdanm 88:9327015d4013 112 #define __SMUSDX __smusdx
bogdanm 88:9327015d4013 113 #define __SMLSD __smlsd
bogdanm 88:9327015d4013 114 #define __SMLSDX __smlsdx
bogdanm 88:9327015d4013 115 #define __SMLSLD __smlsld
bogdanm 88:9327015d4013 116 #define __SMLSLDX __smlsldx
bogdanm 88:9327015d4013 117 #define __SEL __sel
bogdanm 88:9327015d4013 118 #define __QADD __qadd
bogdanm 88:9327015d4013 119 #define __QSUB __qsub
bogdanm 88:9327015d4013 120
bogdanm 88:9327015d4013 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 88:9327015d4013 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 88:9327015d4013 123
bogdanm 88:9327015d4013 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 88:9327015d4013 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 88:9327015d4013 126
bogdanm 88:9327015d4013 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 88:9327015d4013 128 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 88:9327015d4013 129
bogdanm 88:9327015d4013 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 88:9327015d4013 131
bogdanm 88:9327015d4013 132
bogdanm 88:9327015d4013 133
bogdanm 88:9327015d4013 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 88:9327015d4013 135 /* IAR iccarm specific functions */
bogdanm 88:9327015d4013 136
bogdanm 88:9327015d4013 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 88:9327015d4013 138 #include <cmsis_iar.h>
bogdanm 88:9327015d4013 139
bogdanm 88:9327015d4013 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 88:9327015d4013 141
bogdanm 88:9327015d4013 142
bogdanm 88:9327015d4013 143
bogdanm 88:9327015d4013 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 88:9327015d4013 145 /* TI CCS specific functions */
bogdanm 88:9327015d4013 146
bogdanm 88:9327015d4013 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 88:9327015d4013 148 #include <cmsis_ccs.h>
bogdanm 88:9327015d4013 149
bogdanm 88:9327015d4013 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 88:9327015d4013 151
bogdanm 88:9327015d4013 152
bogdanm 88:9327015d4013 153
bogdanm 88:9327015d4013 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 88:9327015d4013 155 /* GNU gcc specific functions */
bogdanm 88:9327015d4013 156
bogdanm 88:9327015d4013 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 88:9327015d4013 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 159 {
bogdanm 88:9327015d4013 160 uint32_t result;
bogdanm 88:9327015d4013 161
bogdanm 88:9327015d4013 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 163 return(result);
bogdanm 88:9327015d4013 164 }
bogdanm 88:9327015d4013 165
bogdanm 88:9327015d4013 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 167 {
bogdanm 88:9327015d4013 168 uint32_t result;
bogdanm 88:9327015d4013 169
bogdanm 88:9327015d4013 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 171 return(result);
bogdanm 88:9327015d4013 172 }
bogdanm 88:9327015d4013 173
bogdanm 88:9327015d4013 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 175 {
bogdanm 88:9327015d4013 176 uint32_t result;
bogdanm 88:9327015d4013 177
bogdanm 88:9327015d4013 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 179 return(result);
bogdanm 88:9327015d4013 180 }
bogdanm 88:9327015d4013 181
bogdanm 88:9327015d4013 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 183 {
bogdanm 88:9327015d4013 184 uint32_t result;
bogdanm 88:9327015d4013 185
bogdanm 88:9327015d4013 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 187 return(result);
bogdanm 88:9327015d4013 188 }
bogdanm 88:9327015d4013 189
bogdanm 88:9327015d4013 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 191 {
bogdanm 88:9327015d4013 192 uint32_t result;
bogdanm 88:9327015d4013 193
bogdanm 88:9327015d4013 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 195 return(result);
bogdanm 88:9327015d4013 196 }
bogdanm 88:9327015d4013 197
bogdanm 88:9327015d4013 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 199 {
bogdanm 88:9327015d4013 200 uint32_t result;
bogdanm 88:9327015d4013 201
bogdanm 88:9327015d4013 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 203 return(result);
bogdanm 88:9327015d4013 204 }
bogdanm 88:9327015d4013 205
bogdanm 88:9327015d4013 206
bogdanm 88:9327015d4013 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 208 {
bogdanm 88:9327015d4013 209 uint32_t result;
bogdanm 88:9327015d4013 210
bogdanm 88:9327015d4013 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 212 return(result);
bogdanm 88:9327015d4013 213 }
bogdanm 88:9327015d4013 214
bogdanm 88:9327015d4013 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 216 {
bogdanm 88:9327015d4013 217 uint32_t result;
bogdanm 88:9327015d4013 218
bogdanm 88:9327015d4013 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 220 return(result);
bogdanm 88:9327015d4013 221 }
bogdanm 88:9327015d4013 222
bogdanm 88:9327015d4013 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 224 {
bogdanm 88:9327015d4013 225 uint32_t result;
bogdanm 88:9327015d4013 226
bogdanm 88:9327015d4013 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 228 return(result);
bogdanm 88:9327015d4013 229 }
bogdanm 88:9327015d4013 230
bogdanm 88:9327015d4013 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 232 {
bogdanm 88:9327015d4013 233 uint32_t result;
bogdanm 88:9327015d4013 234
bogdanm 88:9327015d4013 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 236 return(result);
bogdanm 88:9327015d4013 237 }
bogdanm 88:9327015d4013 238
bogdanm 88:9327015d4013 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 240 {
bogdanm 88:9327015d4013 241 uint32_t result;
bogdanm 88:9327015d4013 242
bogdanm 88:9327015d4013 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 244 return(result);
bogdanm 88:9327015d4013 245 }
bogdanm 88:9327015d4013 246
bogdanm 88:9327015d4013 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 248 {
bogdanm 88:9327015d4013 249 uint32_t result;
bogdanm 88:9327015d4013 250
bogdanm 88:9327015d4013 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 252 return(result);
bogdanm 88:9327015d4013 253 }
bogdanm 88:9327015d4013 254
bogdanm 88:9327015d4013 255
bogdanm 88:9327015d4013 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 257 {
bogdanm 88:9327015d4013 258 uint32_t result;
bogdanm 88:9327015d4013 259
bogdanm 88:9327015d4013 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 261 return(result);
bogdanm 88:9327015d4013 262 }
bogdanm 88:9327015d4013 263
bogdanm 88:9327015d4013 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 265 {
bogdanm 88:9327015d4013 266 uint32_t result;
bogdanm 88:9327015d4013 267
bogdanm 88:9327015d4013 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 269 return(result);
bogdanm 88:9327015d4013 270 }
bogdanm 88:9327015d4013 271
bogdanm 88:9327015d4013 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 273 {
bogdanm 88:9327015d4013 274 uint32_t result;
bogdanm 88:9327015d4013 275
bogdanm 88:9327015d4013 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 277 return(result);
bogdanm 88:9327015d4013 278 }
bogdanm 88:9327015d4013 279
bogdanm 88:9327015d4013 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 281 {
bogdanm 88:9327015d4013 282 uint32_t result;
bogdanm 88:9327015d4013 283
bogdanm 88:9327015d4013 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 285 return(result);
bogdanm 88:9327015d4013 286 }
bogdanm 88:9327015d4013 287
bogdanm 88:9327015d4013 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 289 {
bogdanm 88:9327015d4013 290 uint32_t result;
bogdanm 88:9327015d4013 291
bogdanm 88:9327015d4013 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 293 return(result);
bogdanm 88:9327015d4013 294 }
bogdanm 88:9327015d4013 295
bogdanm 88:9327015d4013 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 297 {
bogdanm 88:9327015d4013 298 uint32_t result;
bogdanm 88:9327015d4013 299
bogdanm 88:9327015d4013 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 301 return(result);
bogdanm 88:9327015d4013 302 }
bogdanm 88:9327015d4013 303
bogdanm 88:9327015d4013 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 305 {
bogdanm 88:9327015d4013 306 uint32_t result;
bogdanm 88:9327015d4013 307
bogdanm 88:9327015d4013 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 309 return(result);
bogdanm 88:9327015d4013 310 }
bogdanm 88:9327015d4013 311
bogdanm 88:9327015d4013 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 313 {
bogdanm 88:9327015d4013 314 uint32_t result;
bogdanm 88:9327015d4013 315
bogdanm 88:9327015d4013 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 317 return(result);
bogdanm 88:9327015d4013 318 }
bogdanm 88:9327015d4013 319
bogdanm 88:9327015d4013 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 321 {
bogdanm 88:9327015d4013 322 uint32_t result;
bogdanm 88:9327015d4013 323
bogdanm 88:9327015d4013 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 325 return(result);
bogdanm 88:9327015d4013 326 }
bogdanm 88:9327015d4013 327
bogdanm 88:9327015d4013 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 329 {
bogdanm 88:9327015d4013 330 uint32_t result;
bogdanm 88:9327015d4013 331
bogdanm 88:9327015d4013 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 333 return(result);
bogdanm 88:9327015d4013 334 }
bogdanm 88:9327015d4013 335
bogdanm 88:9327015d4013 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 337 {
bogdanm 88:9327015d4013 338 uint32_t result;
bogdanm 88:9327015d4013 339
bogdanm 88:9327015d4013 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 341 return(result);
bogdanm 88:9327015d4013 342 }
bogdanm 88:9327015d4013 343
bogdanm 88:9327015d4013 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 345 {
bogdanm 88:9327015d4013 346 uint32_t result;
bogdanm 88:9327015d4013 347
bogdanm 88:9327015d4013 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 349 return(result);
bogdanm 88:9327015d4013 350 }
bogdanm 88:9327015d4013 351
bogdanm 88:9327015d4013 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 353 {
bogdanm 88:9327015d4013 354 uint32_t result;
bogdanm 88:9327015d4013 355
bogdanm 88:9327015d4013 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 357 return(result);
bogdanm 88:9327015d4013 358 }
bogdanm 88:9327015d4013 359
bogdanm 88:9327015d4013 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 361 {
bogdanm 88:9327015d4013 362 uint32_t result;
bogdanm 88:9327015d4013 363
bogdanm 88:9327015d4013 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 365 return(result);
bogdanm 88:9327015d4013 366 }
bogdanm 88:9327015d4013 367
bogdanm 88:9327015d4013 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 369 {
bogdanm 88:9327015d4013 370 uint32_t result;
bogdanm 88:9327015d4013 371
bogdanm 88:9327015d4013 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 373 return(result);
bogdanm 88:9327015d4013 374 }
bogdanm 88:9327015d4013 375
bogdanm 88:9327015d4013 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 377 {
bogdanm 88:9327015d4013 378 uint32_t result;
bogdanm 88:9327015d4013 379
bogdanm 88:9327015d4013 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 381 return(result);
bogdanm 88:9327015d4013 382 }
bogdanm 88:9327015d4013 383
bogdanm 88:9327015d4013 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 385 {
bogdanm 88:9327015d4013 386 uint32_t result;
bogdanm 88:9327015d4013 387
bogdanm 88:9327015d4013 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 389 return(result);
bogdanm 88:9327015d4013 390 }
bogdanm 88:9327015d4013 391
bogdanm 88:9327015d4013 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 393 {
bogdanm 88:9327015d4013 394 uint32_t result;
bogdanm 88:9327015d4013 395
bogdanm 88:9327015d4013 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 397 return(result);
bogdanm 88:9327015d4013 398 }
bogdanm 88:9327015d4013 399
bogdanm 88:9327015d4013 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 401 {
bogdanm 88:9327015d4013 402 uint32_t result;
bogdanm 88:9327015d4013 403
bogdanm 88:9327015d4013 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 405 return(result);
bogdanm 88:9327015d4013 406 }
bogdanm 88:9327015d4013 407
bogdanm 88:9327015d4013 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 409 {
bogdanm 88:9327015d4013 410 uint32_t result;
bogdanm 88:9327015d4013 411
bogdanm 88:9327015d4013 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 413 return(result);
bogdanm 88:9327015d4013 414 }
bogdanm 88:9327015d4013 415
bogdanm 88:9327015d4013 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 417 {
bogdanm 88:9327015d4013 418 uint32_t result;
bogdanm 88:9327015d4013 419
bogdanm 88:9327015d4013 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 421 return(result);
bogdanm 88:9327015d4013 422 }
bogdanm 88:9327015d4013 423
bogdanm 88:9327015d4013 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 425 {
bogdanm 88:9327015d4013 426 uint32_t result;
bogdanm 88:9327015d4013 427
bogdanm 88:9327015d4013 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 429 return(result);
bogdanm 88:9327015d4013 430 }
bogdanm 88:9327015d4013 431
bogdanm 88:9327015d4013 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 433 {
bogdanm 88:9327015d4013 434 uint32_t result;
bogdanm 88:9327015d4013 435
bogdanm 88:9327015d4013 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 437 return(result);
bogdanm 88:9327015d4013 438 }
bogdanm 88:9327015d4013 439
bogdanm 88:9327015d4013 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 441 {
bogdanm 88:9327015d4013 442 uint32_t result;
bogdanm 88:9327015d4013 443
bogdanm 88:9327015d4013 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 445 return(result);
bogdanm 88:9327015d4013 446 }
bogdanm 88:9327015d4013 447
bogdanm 88:9327015d4013 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 449 {
bogdanm 88:9327015d4013 450 uint32_t result;
bogdanm 88:9327015d4013 451
bogdanm 88:9327015d4013 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 453 return(result);
bogdanm 88:9327015d4013 454 }
bogdanm 88:9327015d4013 455
bogdanm 88:9327015d4013 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 88:9327015d4013 457 {
bogdanm 88:9327015d4013 458 uint32_t result;
bogdanm 88:9327015d4013 459
bogdanm 88:9327015d4013 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 88:9327015d4013 461 return(result);
bogdanm 88:9327015d4013 462 }
bogdanm 88:9327015d4013 463
bogdanm 88:9327015d4013 464 #define __SSAT16(ARG1,ARG2) \
bogdanm 88:9327015d4013 465 ({ \
bogdanm 88:9327015d4013 466 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 88:9327015d4013 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 88:9327015d4013 468 __RES; \
bogdanm 88:9327015d4013 469 })
bogdanm 88:9327015d4013 470
bogdanm 88:9327015d4013 471 #define __USAT16(ARG1,ARG2) \
bogdanm 88:9327015d4013 472 ({ \
bogdanm 88:9327015d4013 473 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 88:9327015d4013 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 88:9327015d4013 475 __RES; \
bogdanm 88:9327015d4013 476 })
bogdanm 88:9327015d4013 477
bogdanm 88:9327015d4013 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 88:9327015d4013 479 {
bogdanm 88:9327015d4013 480 uint32_t result;
bogdanm 88:9327015d4013 481
bogdanm 88:9327015d4013 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 88:9327015d4013 483 return(result);
bogdanm 88:9327015d4013 484 }
bogdanm 88:9327015d4013 485
bogdanm 88:9327015d4013 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 487 {
bogdanm 88:9327015d4013 488 uint32_t result;
bogdanm 88:9327015d4013 489
bogdanm 88:9327015d4013 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 491 return(result);
bogdanm 88:9327015d4013 492 }
bogdanm 88:9327015d4013 493
bogdanm 88:9327015d4013 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 88:9327015d4013 495 {
bogdanm 88:9327015d4013 496 uint32_t result;
bogdanm 88:9327015d4013 497
bogdanm 88:9327015d4013 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 88:9327015d4013 499 return(result);
bogdanm 88:9327015d4013 500 }
bogdanm 88:9327015d4013 501
bogdanm 88:9327015d4013 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 503 {
bogdanm 88:9327015d4013 504 uint32_t result;
bogdanm 88:9327015d4013 505
bogdanm 88:9327015d4013 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 507 return(result);
bogdanm 88:9327015d4013 508 }
bogdanm 88:9327015d4013 509
bogdanm 88:9327015d4013 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 511 {
bogdanm 88:9327015d4013 512 uint32_t result;
bogdanm 88:9327015d4013 513
bogdanm 88:9327015d4013 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 515 return(result);
bogdanm 88:9327015d4013 516 }
bogdanm 88:9327015d4013 517
bogdanm 88:9327015d4013 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 519 {
bogdanm 88:9327015d4013 520 uint32_t result;
bogdanm 88:9327015d4013 521
bogdanm 88:9327015d4013 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 523 return(result);
bogdanm 88:9327015d4013 524 }
bogdanm 88:9327015d4013 525
bogdanm 88:9327015d4013 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 88:9327015d4013 527 {
bogdanm 88:9327015d4013 528 uint32_t result;
bogdanm 88:9327015d4013 529
bogdanm 88:9327015d4013 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 88:9327015d4013 531 return(result);
bogdanm 88:9327015d4013 532 }
bogdanm 88:9327015d4013 533
bogdanm 88:9327015d4013 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 88:9327015d4013 535 {
bogdanm 88:9327015d4013 536 uint32_t result;
bogdanm 88:9327015d4013 537
bogdanm 88:9327015d4013 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 88:9327015d4013 539 return(result);
bogdanm 88:9327015d4013 540 }
bogdanm 88:9327015d4013 541
bogdanm 88:9327015d4013 542 #define __SMLALD(ARG1,ARG2,ARG3) \
bogdanm 88:9327015d4013 543 ({ \
bogdanm 88:9327015d4013 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 88:9327015d4013 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 88:9327015d4013 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 88:9327015d4013 547 })
bogdanm 88:9327015d4013 548
bogdanm 88:9327015d4013 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
bogdanm 88:9327015d4013 550 ({ \
bogdanm 88:9327015d4013 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 88:9327015d4013 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 88:9327015d4013 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 88:9327015d4013 554 })
bogdanm 88:9327015d4013 555
bogdanm 88:9327015d4013 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 557 {
bogdanm 88:9327015d4013 558 uint32_t result;
bogdanm 88:9327015d4013 559
bogdanm 88:9327015d4013 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 561 return(result);
bogdanm 88:9327015d4013 562 }
bogdanm 88:9327015d4013 563
bogdanm 88:9327015d4013 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 565 {
bogdanm 88:9327015d4013 566 uint32_t result;
bogdanm 88:9327015d4013 567
bogdanm 88:9327015d4013 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 569 return(result);
bogdanm 88:9327015d4013 570 }
bogdanm 88:9327015d4013 571
bogdanm 88:9327015d4013 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 88:9327015d4013 573 {
bogdanm 88:9327015d4013 574 uint32_t result;
bogdanm 88:9327015d4013 575
bogdanm 88:9327015d4013 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 88:9327015d4013 577 return(result);
bogdanm 88:9327015d4013 578 }
bogdanm 88:9327015d4013 579
bogdanm 88:9327015d4013 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 88:9327015d4013 581 {
bogdanm 88:9327015d4013 582 uint32_t result;
bogdanm 88:9327015d4013 583
bogdanm 88:9327015d4013 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 88:9327015d4013 585 return(result);
bogdanm 88:9327015d4013 586 }
bogdanm 88:9327015d4013 587
bogdanm 88:9327015d4013 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
bogdanm 88:9327015d4013 589 ({ \
bogdanm 88:9327015d4013 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 88:9327015d4013 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 88:9327015d4013 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 88:9327015d4013 593 })
bogdanm 88:9327015d4013 594
bogdanm 88:9327015d4013 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
bogdanm 88:9327015d4013 596 ({ \
bogdanm 88:9327015d4013 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 88:9327015d4013 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 88:9327015d4013 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 88:9327015d4013 600 })
bogdanm 88:9327015d4013 601
bogdanm 88:9327015d4013 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 603 {
bogdanm 88:9327015d4013 604 uint32_t result;
bogdanm 88:9327015d4013 605
bogdanm 88:9327015d4013 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 607 return(result);
bogdanm 88:9327015d4013 608 }
bogdanm 88:9327015d4013 609
bogdanm 88:9327015d4013 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 611 {
bogdanm 88:9327015d4013 612 uint32_t result;
bogdanm 88:9327015d4013 613
bogdanm 88:9327015d4013 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 615 return(result);
bogdanm 88:9327015d4013 616 }
bogdanm 88:9327015d4013 617
bogdanm 88:9327015d4013 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 619 {
bogdanm 88:9327015d4013 620 uint32_t result;
bogdanm 88:9327015d4013 621
bogdanm 88:9327015d4013 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 88:9327015d4013 623 return(result);
bogdanm 88:9327015d4013 624 }
bogdanm 88:9327015d4013 625
bogdanm 88:9327015d4013 626 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 88:9327015d4013 627 ({ \
bogdanm 88:9327015d4013 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 88:9327015d4013 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 88:9327015d4013 630 __RES; \
bogdanm 88:9327015d4013 631 })
bogdanm 88:9327015d4013 632
bogdanm 88:9327015d4013 633 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 88:9327015d4013 634 ({ \
bogdanm 88:9327015d4013 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 88:9327015d4013 636 if (ARG3 == 0) \
bogdanm 88:9327015d4013 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 88:9327015d4013 638 else \
bogdanm 88:9327015d4013 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 88:9327015d4013 640 __RES; \
bogdanm 88:9327015d4013 641 })
bogdanm 88:9327015d4013 642
bogdanm 88:9327015d4013 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 88:9327015d4013 644 {
bogdanm 88:9327015d4013 645 int32_t result;
bogdanm 88:9327015d4013 646
bogdanm 88:9327015d4013 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 88:9327015d4013 648 return(result);
bogdanm 88:9327015d4013 649 }
bogdanm 88:9327015d4013 650
bogdanm 88:9327015d4013 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 88:9327015d4013 652
bogdanm 88:9327015d4013 653
bogdanm 88:9327015d4013 654
bogdanm 88:9327015d4013 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 88:9327015d4013 656 /* TASKING carm specific functions */
bogdanm 88:9327015d4013 657
bogdanm 88:9327015d4013 658
bogdanm 88:9327015d4013 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 88:9327015d4013 660 /* not yet supported */
bogdanm 88:9327015d4013 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 88:9327015d4013 662
bogdanm 88:9327015d4013 663
bogdanm 88:9327015d4013 664 #endif
bogdanm 88:9327015d4013 665
bogdanm 88:9327015d4013 666 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 88:9327015d4013 667
bogdanm 88:9327015d4013 668
bogdanm 88:9327015d4013 669 #endif /* __CORE_CM4_SIMD_H */
bogdanm 88:9327015d4013 670
bogdanm 88:9327015d4013 671 #ifdef __cplusplus
bogdanm 88:9327015d4013 672 }
bogdanm 88:9327015d4013 673 #endif