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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_APPNEARME_MICRONFCBOARD/core_cmInstr.h@101:7cff1c4259d7, 2015-06-09 (annotated)

Committer:
Kojto
Date:
Tue Jun 09 14:29:26 2015 +0100
Revision:
101:7cff1c4259d7
Release 101 of the mbed library



Changes:

- new platform: APPNEARME_MICRONFCBOARD, MTS_DRAGONFLY_F411RE, MAX32600MBED, WIZwiki_W7500

- Silabs memory optimization in gpio, pwm fixes

- SPI  - ssel documentation fixes and its use

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /**************************************************************************//**
Kojto 101:7cff1c4259d7 2 * @file core_cmInstr.h
Kojto 101:7cff1c4259d7 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
Kojto 101:7cff1c4259d7 4 * @version V3.20
Kojto 101:7cff1c4259d7 5 * @date 05. March 2013
Kojto 101:7cff1c4259d7 6 *
Kojto 101:7cff1c4259d7 7 * @note
Kojto 101:7cff1c4259d7 8 *
Kojto 101:7cff1c4259d7 9 ******************************************************************************/
Kojto 101:7cff1c4259d7 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
Kojto 101:7cff1c4259d7 11
Kojto 101:7cff1c4259d7 12 All rights reserved.
Kojto 101:7cff1c4259d7 13 Redistribution and use in source and binary forms, with or without
Kojto 101:7cff1c4259d7 14 modification, are permitted provided that the following conditions are met:
Kojto 101:7cff1c4259d7 15 - Redistributions of source code must retain the above copyright
Kojto 101:7cff1c4259d7 16 notice, this list of conditions and the following disclaimer.
Kojto 101:7cff1c4259d7 17 - Redistributions in binary form must reproduce the above copyright
Kojto 101:7cff1c4259d7 18 notice, this list of conditions and the following disclaimer in the
Kojto 101:7cff1c4259d7 19 documentation and/or other materials provided with the distribution.
Kojto 101:7cff1c4259d7 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 101:7cff1c4259d7 21 to endorse or promote products derived from this software without
Kojto 101:7cff1c4259d7 22 specific prior written permission.
Kojto 101:7cff1c4259d7 23 *
Kojto 101:7cff1c4259d7 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 101:7cff1c4259d7 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 101:7cff1c4259d7 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 101:7cff1c4259d7 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 101:7cff1c4259d7 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 101:7cff1c4259d7 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 101:7cff1c4259d7 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 101:7cff1c4259d7 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 101:7cff1c4259d7 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 101:7cff1c4259d7 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 101:7cff1c4259d7 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 101:7cff1c4259d7 35 ---------------------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 36
Kojto 101:7cff1c4259d7 37
Kojto 101:7cff1c4259d7 38 #ifndef __CORE_CMINSTR_H
Kojto 101:7cff1c4259d7 39 #define __CORE_CMINSTR_H
Kojto 101:7cff1c4259d7 40
Kojto 101:7cff1c4259d7 41
Kojto 101:7cff1c4259d7 42 /* ########################## Core Instruction Access ######################### */
Kojto 101:7cff1c4259d7 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Kojto 101:7cff1c4259d7 44 Access to dedicated instructions
Kojto 101:7cff1c4259d7 45 @{
Kojto 101:7cff1c4259d7 46 */
Kojto 101:7cff1c4259d7 47
Kojto 101:7cff1c4259d7 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Kojto 101:7cff1c4259d7 49 /* ARM armcc specific functions */
Kojto 101:7cff1c4259d7 50
Kojto 101:7cff1c4259d7 51 #if (__ARMCC_VERSION < 400677)
Kojto 101:7cff1c4259d7 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Kojto 101:7cff1c4259d7 53 #endif
Kojto 101:7cff1c4259d7 54
Kojto 101:7cff1c4259d7 55
Kojto 101:7cff1c4259d7 56 /** \brief No Operation
Kojto 101:7cff1c4259d7 57
Kojto 101:7cff1c4259d7 58 No Operation does nothing. This instruction can be used for code alignment purposes.
Kojto 101:7cff1c4259d7 59 */
Kojto 101:7cff1c4259d7 60 #define __NOP __nop
Kojto 101:7cff1c4259d7 61
Kojto 101:7cff1c4259d7 62
Kojto 101:7cff1c4259d7 63 /** \brief Wait For Interrupt
Kojto 101:7cff1c4259d7 64
Kojto 101:7cff1c4259d7 65 Wait For Interrupt is a hint instruction that suspends execution
Kojto 101:7cff1c4259d7 66 until one of a number of events occurs.
Kojto 101:7cff1c4259d7 67 */
Kojto 101:7cff1c4259d7 68 #define __WFI __wfi
Kojto 101:7cff1c4259d7 69
Kojto 101:7cff1c4259d7 70
Kojto 101:7cff1c4259d7 71 /** \brief Wait For Event
Kojto 101:7cff1c4259d7 72
Kojto 101:7cff1c4259d7 73 Wait For Event is a hint instruction that permits the processor to enter
Kojto 101:7cff1c4259d7 74 a low-power state until one of a number of events occurs.
Kojto 101:7cff1c4259d7 75 */
Kojto 101:7cff1c4259d7 76 #define __WFE __wfe
Kojto 101:7cff1c4259d7 77
Kojto 101:7cff1c4259d7 78
Kojto 101:7cff1c4259d7 79 /** \brief Send Event
Kojto 101:7cff1c4259d7 80
Kojto 101:7cff1c4259d7 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Kojto 101:7cff1c4259d7 82 */
Kojto 101:7cff1c4259d7 83 #define __SEV __sev
Kojto 101:7cff1c4259d7 84
Kojto 101:7cff1c4259d7 85
Kojto 101:7cff1c4259d7 86 /** \brief Instruction Synchronization Barrier
Kojto 101:7cff1c4259d7 87
Kojto 101:7cff1c4259d7 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
Kojto 101:7cff1c4259d7 89 so that all instructions following the ISB are fetched from cache or
Kojto 101:7cff1c4259d7 90 memory, after the instruction has been completed.
Kojto 101:7cff1c4259d7 91 */
Kojto 101:7cff1c4259d7 92 #define __ISB() __isb(0xF)
Kojto 101:7cff1c4259d7 93
Kojto 101:7cff1c4259d7 94
Kojto 101:7cff1c4259d7 95 /** \brief Data Synchronization Barrier
Kojto 101:7cff1c4259d7 96
Kojto 101:7cff1c4259d7 97 This function acts as a special kind of Data Memory Barrier.
Kojto 101:7cff1c4259d7 98 It completes when all explicit memory accesses before this instruction complete.
Kojto 101:7cff1c4259d7 99 */
Kojto 101:7cff1c4259d7 100 #define __DSB() __dsb(0xF)
Kojto 101:7cff1c4259d7 101
Kojto 101:7cff1c4259d7 102
Kojto 101:7cff1c4259d7 103 /** \brief Data Memory Barrier
Kojto 101:7cff1c4259d7 104
Kojto 101:7cff1c4259d7 105 This function ensures the apparent order of the explicit memory operations before
Kojto 101:7cff1c4259d7 106 and after the instruction, without ensuring their completion.
Kojto 101:7cff1c4259d7 107 */
Kojto 101:7cff1c4259d7 108 #define __DMB() __dmb(0xF)
Kojto 101:7cff1c4259d7 109
Kojto 101:7cff1c4259d7 110
Kojto 101:7cff1c4259d7 111 /** \brief Reverse byte order (32 bit)
Kojto 101:7cff1c4259d7 112
Kojto 101:7cff1c4259d7 113 This function reverses the byte order in integer value.
Kojto 101:7cff1c4259d7 114
Kojto 101:7cff1c4259d7 115 \param [in] value Value to reverse
Kojto 101:7cff1c4259d7 116 \return Reversed value
Kojto 101:7cff1c4259d7 117 */
Kojto 101:7cff1c4259d7 118 #define __REV __rev
Kojto 101:7cff1c4259d7 119
Kojto 101:7cff1c4259d7 120
Kojto 101:7cff1c4259d7 121 /** \brief Reverse byte order (16 bit)
Kojto 101:7cff1c4259d7 122
Kojto 101:7cff1c4259d7 123 This function reverses the byte order in two unsigned short values.
Kojto 101:7cff1c4259d7 124
Kojto 101:7cff1c4259d7 125 \param [in] value Value to reverse
Kojto 101:7cff1c4259d7 126 \return Reversed value
Kojto 101:7cff1c4259d7 127 */
Kojto 101:7cff1c4259d7 128 #ifndef __NO_EMBEDDED_ASM
Kojto 101:7cff1c4259d7 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
Kojto 101:7cff1c4259d7 130 {
Kojto 101:7cff1c4259d7 131 rev16 r0, r0
Kojto 101:7cff1c4259d7 132 bx lr
Kojto 101:7cff1c4259d7 133 }
Kojto 101:7cff1c4259d7 134 #endif
Kojto 101:7cff1c4259d7 135
Kojto 101:7cff1c4259d7 136 /** \brief Reverse byte order in signed short value
Kojto 101:7cff1c4259d7 137
Kojto 101:7cff1c4259d7 138 This function reverses the byte order in a signed short value with sign extension to integer.
Kojto 101:7cff1c4259d7 139
Kojto 101:7cff1c4259d7 140 \param [in] value Value to reverse
Kojto 101:7cff1c4259d7 141 \return Reversed value
Kojto 101:7cff1c4259d7 142 */
Kojto 101:7cff1c4259d7 143 #ifndef __NO_EMBEDDED_ASM
Kojto 101:7cff1c4259d7 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
Kojto 101:7cff1c4259d7 145 {
Kojto 101:7cff1c4259d7 146 revsh r0, r0
Kojto 101:7cff1c4259d7 147 bx lr
Kojto 101:7cff1c4259d7 148 }
Kojto 101:7cff1c4259d7 149 #endif
Kojto 101:7cff1c4259d7 150
Kojto 101:7cff1c4259d7 151
Kojto 101:7cff1c4259d7 152 /** \brief Rotate Right in unsigned value (32 bit)
Kojto 101:7cff1c4259d7 153
Kojto 101:7cff1c4259d7 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
Kojto 101:7cff1c4259d7 155
Kojto 101:7cff1c4259d7 156 \param [in] value Value to rotate
Kojto 101:7cff1c4259d7 157 \param [in] value Number of Bits to rotate
Kojto 101:7cff1c4259d7 158 \return Rotated value
Kojto 101:7cff1c4259d7 159 */
Kojto 101:7cff1c4259d7 160 #define __ROR __ror
Kojto 101:7cff1c4259d7 161
Kojto 101:7cff1c4259d7 162
Kojto 101:7cff1c4259d7 163 /** \brief Breakpoint
Kojto 101:7cff1c4259d7 164
Kojto 101:7cff1c4259d7 165 This function causes the processor to enter Debug state.
Kojto 101:7cff1c4259d7 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
Kojto 101:7cff1c4259d7 167
Kojto 101:7cff1c4259d7 168 \param [in] value is ignored by the processor.
Kojto 101:7cff1c4259d7 169 If required, a debugger can use it to store additional information about the breakpoint.
Kojto 101:7cff1c4259d7 170 */
Kojto 101:7cff1c4259d7 171 #define __BKPT(value) __breakpoint(value)
Kojto 101:7cff1c4259d7 172
Kojto 101:7cff1c4259d7 173
Kojto 101:7cff1c4259d7 174 #if (__CORTEX_M >= 0x03)
Kojto 101:7cff1c4259d7 175
Kojto 101:7cff1c4259d7 176 /** \brief Reverse bit order of value
Kojto 101:7cff1c4259d7 177
Kojto 101:7cff1c4259d7 178 This function reverses the bit order of the given value.
Kojto 101:7cff1c4259d7 179
Kojto 101:7cff1c4259d7 180 \param [in] value Value to reverse
Kojto 101:7cff1c4259d7 181 \return Reversed value
Kojto 101:7cff1c4259d7 182 */
Kojto 101:7cff1c4259d7 183 #define __RBIT __rbit
Kojto 101:7cff1c4259d7 184
Kojto 101:7cff1c4259d7 185
Kojto 101:7cff1c4259d7 186 /** \brief LDR Exclusive (8 bit)
Kojto 101:7cff1c4259d7 187
Kojto 101:7cff1c4259d7 188 This function performs a exclusive LDR command for 8 bit value.
Kojto 101:7cff1c4259d7 189
Kojto 101:7cff1c4259d7 190 \param [in] ptr Pointer to data
Kojto 101:7cff1c4259d7 191 \return value of type uint8_t at (*ptr)
Kojto 101:7cff1c4259d7 192 */
Kojto 101:7cff1c4259d7 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
Kojto 101:7cff1c4259d7 194
Kojto 101:7cff1c4259d7 195
Kojto 101:7cff1c4259d7 196 /** \brief LDR Exclusive (16 bit)
Kojto 101:7cff1c4259d7 197
Kojto 101:7cff1c4259d7 198 This function performs a exclusive LDR command for 16 bit values.
Kojto 101:7cff1c4259d7 199
Kojto 101:7cff1c4259d7 200 \param [in] ptr Pointer to data
Kojto 101:7cff1c4259d7 201 \return value of type uint16_t at (*ptr)
Kojto 101:7cff1c4259d7 202 */
Kojto 101:7cff1c4259d7 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
Kojto 101:7cff1c4259d7 204
Kojto 101:7cff1c4259d7 205
Kojto 101:7cff1c4259d7 206 /** \brief LDR Exclusive (32 bit)
Kojto 101:7cff1c4259d7 207
Kojto 101:7cff1c4259d7 208 This function performs a exclusive LDR command for 32 bit values.
Kojto 101:7cff1c4259d7 209
Kojto 101:7cff1c4259d7 210 \param [in] ptr Pointer to data
Kojto 101:7cff1c4259d7 211 \return value of type uint32_t at (*ptr)
Kojto 101:7cff1c4259d7 212 */
Kojto 101:7cff1c4259d7 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
Kojto 101:7cff1c4259d7 214
Kojto 101:7cff1c4259d7 215
Kojto 101:7cff1c4259d7 216 /** \brief STR Exclusive (8 bit)
Kojto 101:7cff1c4259d7 217
Kojto 101:7cff1c4259d7 218 This function performs a exclusive STR command for 8 bit values.
Kojto 101:7cff1c4259d7 219
Kojto 101:7cff1c4259d7 220 \param [in] value Value to store
Kojto 101:7cff1c4259d7 221 \param [in] ptr Pointer to location
Kojto 101:7cff1c4259d7 222 \return 0 Function succeeded
Kojto 101:7cff1c4259d7 223 \return 1 Function failed
Kojto 101:7cff1c4259d7 224 */
Kojto 101:7cff1c4259d7 225 #define __STREXB(value, ptr) __strex(value, ptr)
Kojto 101:7cff1c4259d7 226
Kojto 101:7cff1c4259d7 227
Kojto 101:7cff1c4259d7 228 /** \brief STR Exclusive (16 bit)
Kojto 101:7cff1c4259d7 229
Kojto 101:7cff1c4259d7 230 This function performs a exclusive STR command for 16 bit values.
Kojto 101:7cff1c4259d7 231
Kojto 101:7cff1c4259d7 232 \param [in] value Value to store
Kojto 101:7cff1c4259d7 233 \param [in] ptr Pointer to location
Kojto 101:7cff1c4259d7 234 \return 0 Function succeeded
Kojto 101:7cff1c4259d7 235 \return 1 Function failed
Kojto 101:7cff1c4259d7 236 */
Kojto 101:7cff1c4259d7 237 #define __STREXH(value, ptr) __strex(value, ptr)
Kojto 101:7cff1c4259d7 238
Kojto 101:7cff1c4259d7 239
Kojto 101:7cff1c4259d7 240 /** \brief STR Exclusive (32 bit)
Kojto 101:7cff1c4259d7 241
Kojto 101:7cff1c4259d7 242 This function performs a exclusive STR command for 32 bit values.
Kojto 101:7cff1c4259d7 243
Kojto 101:7cff1c4259d7 244 \param [in] value Value to store
Kojto 101:7cff1c4259d7 245 \param [in] ptr Pointer to location
Kojto 101:7cff1c4259d7 246 \return 0 Function succeeded
Kojto 101:7cff1c4259d7 247 \return 1 Function failed
Kojto 101:7cff1c4259d7 248 */
Kojto 101:7cff1c4259d7 249 #define __STREXW(value, ptr) __strex(value, ptr)
Kojto 101:7cff1c4259d7 250
Kojto 101:7cff1c4259d7 251
Kojto 101:7cff1c4259d7 252 /** \brief Remove the exclusive lock
Kojto 101:7cff1c4259d7 253
Kojto 101:7cff1c4259d7 254 This function removes the exclusive lock which is created by LDREX.
Kojto 101:7cff1c4259d7 255
Kojto 101:7cff1c4259d7 256 */
Kojto 101:7cff1c4259d7 257 #define __CLREX __clrex
Kojto 101:7cff1c4259d7 258
Kojto 101:7cff1c4259d7 259
Kojto 101:7cff1c4259d7 260 /** \brief Signed Saturate
Kojto 101:7cff1c4259d7 261
Kojto 101:7cff1c4259d7 262 This function saturates a signed value.
Kojto 101:7cff1c4259d7 263
Kojto 101:7cff1c4259d7 264 \param [in] value Value to be saturated
Kojto 101:7cff1c4259d7 265 \param [in] sat Bit position to saturate to (1..32)
Kojto 101:7cff1c4259d7 266 \return Saturated value
Kojto 101:7cff1c4259d7 267 */
Kojto 101:7cff1c4259d7 268 #define __SSAT __ssat
Kojto 101:7cff1c4259d7 269
Kojto 101:7cff1c4259d7 270
Kojto 101:7cff1c4259d7 271 /** \brief Unsigned Saturate
Kojto 101:7cff1c4259d7 272
Kojto 101:7cff1c4259d7 273 This function saturates an unsigned value.
Kojto 101:7cff1c4259d7 274
Kojto 101:7cff1c4259d7 275 \param [in] value Value to be saturated
Kojto 101:7cff1c4259d7 276 \param [in] sat Bit position to saturate to (0..31)
Kojto 101:7cff1c4259d7 277 \return Saturated value
Kojto 101:7cff1c4259d7 278 */
Kojto 101:7cff1c4259d7 279 #define __USAT __usat
Kojto 101:7cff1c4259d7 280
Kojto 101:7cff1c4259d7 281
Kojto 101:7cff1c4259d7 282 /** \brief Count leading zeros
Kojto 101:7cff1c4259d7 283
Kojto 101:7cff1c4259d7 284 This function counts the number of leading zeros of a data value.
Kojto 101:7cff1c4259d7 285
Kojto 101:7cff1c4259d7 286 \param [in] value Value to count the leading zeros
Kojto 101:7cff1c4259d7 287 \return number of leading zeros in value
Kojto 101:7cff1c4259d7 288 */
Kojto 101:7cff1c4259d7 289 #define __CLZ __clz
Kojto 101:7cff1c4259d7 290
Kojto 101:7cff1c4259d7 291 #endif /* (__CORTEX_M >= 0x03) */
Kojto 101:7cff1c4259d7 292
Kojto 101:7cff1c4259d7 293
Kojto 101:7cff1c4259d7 294
Kojto 101:7cff1c4259d7 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 101:7cff1c4259d7 296 /* IAR iccarm specific functions */
Kojto 101:7cff1c4259d7 297
Kojto 101:7cff1c4259d7 298 #include <cmsis_iar.h>
Kojto 101:7cff1c4259d7 299
Kojto 101:7cff1c4259d7 300
Kojto 101:7cff1c4259d7 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 101:7cff1c4259d7 302 /* TI CCS specific functions */
Kojto 101:7cff1c4259d7 303
Kojto 101:7cff1c4259d7 304 #include <cmsis_ccs.h>
Kojto 101:7cff1c4259d7 305
Kojto 101:7cff1c4259d7 306
Kojto 101:7cff1c4259d7 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Kojto 101:7cff1c4259d7 308 /* GNU gcc specific functions */
Kojto 101:7cff1c4259d7 309
Kojto 101:7cff1c4259d7 310 /* Define macros for porting to both thumb1 and thumb2.
Kojto 101:7cff1c4259d7 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
Kojto 101:7cff1c4259d7 312 * Otherwise, use general registers, specified by constrant "r" */
Kojto 101:7cff1c4259d7 313 #if defined (__thumb__) && !defined (__thumb2__)
Kojto 101:7cff1c4259d7 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
Kojto 101:7cff1c4259d7 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
Kojto 101:7cff1c4259d7 316 #else
Kojto 101:7cff1c4259d7 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
Kojto 101:7cff1c4259d7 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
Kojto 101:7cff1c4259d7 319 #endif
Kojto 101:7cff1c4259d7 320
Kojto 101:7cff1c4259d7 321 /** \brief No Operation
Kojto 101:7cff1c4259d7 322
Kojto 101:7cff1c4259d7 323 No Operation does nothing. This instruction can be used for code alignment purposes.
Kojto 101:7cff1c4259d7 324 */
Kojto 101:7cff1c4259d7 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
Kojto 101:7cff1c4259d7 326 {
Kojto 101:7cff1c4259d7 327 __ASM volatile ("nop");
Kojto 101:7cff1c4259d7 328 }
Kojto 101:7cff1c4259d7 329
Kojto 101:7cff1c4259d7 330
Kojto 101:7cff1c4259d7 331 /** \brief Wait For Interrupt
Kojto 101:7cff1c4259d7 332
Kojto 101:7cff1c4259d7 333 Wait For Interrupt is a hint instruction that suspends execution
Kojto 101:7cff1c4259d7 334 until one of a number of events occurs.
Kojto 101:7cff1c4259d7 335 */
Kojto 101:7cff1c4259d7 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
Kojto 101:7cff1c4259d7 337 {
Kojto 101:7cff1c4259d7 338 __ASM volatile ("wfi");
Kojto 101:7cff1c4259d7 339 }
Kojto 101:7cff1c4259d7 340
Kojto 101:7cff1c4259d7 341
Kojto 101:7cff1c4259d7 342 /** \brief Wait For Event
Kojto 101:7cff1c4259d7 343
Kojto 101:7cff1c4259d7 344 Wait For Event is a hint instruction that permits the processor to enter
Kojto 101:7cff1c4259d7 345 a low-power state until one of a number of events occurs.
Kojto 101:7cff1c4259d7 346 */
Kojto 101:7cff1c4259d7 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
Kojto 101:7cff1c4259d7 348 {
Kojto 101:7cff1c4259d7 349 __ASM volatile ("wfe");
Kojto 101:7cff1c4259d7 350 }
Kojto 101:7cff1c4259d7 351
Kojto 101:7cff1c4259d7 352
Kojto 101:7cff1c4259d7 353 /** \brief Send Event
Kojto 101:7cff1c4259d7 354
Kojto 101:7cff1c4259d7 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Kojto 101:7cff1c4259d7 356 */
Kojto 101:7cff1c4259d7 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
Kojto 101:7cff1c4259d7 358 {
Kojto 101:7cff1c4259d7 359 __ASM volatile ("sev");
Kojto 101:7cff1c4259d7 360 }
Kojto 101:7cff1c4259d7 361
Kojto 101:7cff1c4259d7 362
Kojto 101:7cff1c4259d7 363 /** \brief Instruction Synchronization Barrier
Kojto 101:7cff1c4259d7 364
Kojto 101:7cff1c4259d7 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
Kojto 101:7cff1c4259d7 366 so that all instructions following the ISB are fetched from cache or
Kojto 101:7cff1c4259d7 367 memory, after the instruction has been completed.
Kojto 101:7cff1c4259d7 368 */
Kojto 101:7cff1c4259d7 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
Kojto 101:7cff1c4259d7 370 {
Kojto 101:7cff1c4259d7 371 __ASM volatile ("isb");
Kojto 101:7cff1c4259d7 372 }
Kojto 101:7cff1c4259d7 373
Kojto 101:7cff1c4259d7 374
Kojto 101:7cff1c4259d7 375 /** \brief Data Synchronization Barrier
Kojto 101:7cff1c4259d7 376
Kojto 101:7cff1c4259d7 377 This function acts as a special kind of Data Memory Barrier.
Kojto 101:7cff1c4259d7 378 It completes when all explicit memory accesses before this instruction complete.
Kojto 101:7cff1c4259d7 379 */
Kojto 101:7cff1c4259d7 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
Kojto 101:7cff1c4259d7 381 {
Kojto 101:7cff1c4259d7 382 __ASM volatile ("dsb");
Kojto 101:7cff1c4259d7 383 }
Kojto 101:7cff1c4259d7 384
Kojto 101:7cff1c4259d7 385
Kojto 101:7cff1c4259d7 386 /** \brief Data Memory Barrier
Kojto 101:7cff1c4259d7 387
Kojto 101:7cff1c4259d7 388 This function ensures the apparent order of the explicit memory operations before
Kojto 101:7cff1c4259d7 389 and after the instruction, without ensuring their completion.
Kojto 101:7cff1c4259d7 390 */
Kojto 101:7cff1c4259d7 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
Kojto 101:7cff1c4259d7 392 {
Kojto 101:7cff1c4259d7 393 __ASM volatile ("dmb");
Kojto 101:7cff1c4259d7 394 }
Kojto 101:7cff1c4259d7 395
Kojto 101:7cff1c4259d7 396
Kojto 101:7cff1c4259d7 397 /** \brief Reverse byte order (32 bit)
Kojto 101:7cff1c4259d7 398
Kojto 101:7cff1c4259d7 399 This function reverses the byte order in integer value.
Kojto 101:7cff1c4259d7 400
Kojto 101:7cff1c4259d7 401 \param [in] value Value to reverse
Kojto 101:7cff1c4259d7 402 \return Reversed value
Kojto 101:7cff1c4259d7 403 */
Kojto 101:7cff1c4259d7 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
Kojto 101:7cff1c4259d7 405 {
Kojto 101:7cff1c4259d7 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
Kojto 101:7cff1c4259d7 407 return __builtin_bswap32(value);
Kojto 101:7cff1c4259d7 408 #else
Kojto 101:7cff1c4259d7 409 uint32_t result;
Kojto 101:7cff1c4259d7 410
Kojto 101:7cff1c4259d7 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Kojto 101:7cff1c4259d7 412 return(result);
Kojto 101:7cff1c4259d7 413 #endif
Kojto 101:7cff1c4259d7 414 }
Kojto 101:7cff1c4259d7 415
Kojto 101:7cff1c4259d7 416
Kojto 101:7cff1c4259d7 417 /** \brief Reverse byte order (16 bit)
Kojto 101:7cff1c4259d7 418
Kojto 101:7cff1c4259d7 419 This function reverses the byte order in two unsigned short values.
Kojto 101:7cff1c4259d7 420
Kojto 101:7cff1c4259d7 421 \param [in] value Value to reverse
Kojto 101:7cff1c4259d7 422 \return Reversed value
Kojto 101:7cff1c4259d7 423 */
Kojto 101:7cff1c4259d7 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
Kojto 101:7cff1c4259d7 425 {
Kojto 101:7cff1c4259d7 426 uint32_t result;
Kojto 101:7cff1c4259d7 427
Kojto 101:7cff1c4259d7 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Kojto 101:7cff1c4259d7 429 return(result);
Kojto 101:7cff1c4259d7 430 }
Kojto 101:7cff1c4259d7 431
Kojto 101:7cff1c4259d7 432
Kojto 101:7cff1c4259d7 433 /** \brief Reverse byte order in signed short value
Kojto 101:7cff1c4259d7 434
Kojto 101:7cff1c4259d7 435 This function reverses the byte order in a signed short value with sign extension to integer.
Kojto 101:7cff1c4259d7 436
Kojto 101:7cff1c4259d7 437 \param [in] value Value to reverse
Kojto 101:7cff1c4259d7 438 \return Reversed value
Kojto 101:7cff1c4259d7 439 */
Kojto 101:7cff1c4259d7 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
Kojto 101:7cff1c4259d7 441 {
Kojto 101:7cff1c4259d7 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 101:7cff1c4259d7 443 return (short)__builtin_bswap16(value);
Kojto 101:7cff1c4259d7 444 #else
Kojto 101:7cff1c4259d7 445 uint32_t result;
Kojto 101:7cff1c4259d7 446
Kojto 101:7cff1c4259d7 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Kojto 101:7cff1c4259d7 448 return(result);
Kojto 101:7cff1c4259d7 449 #endif
Kojto 101:7cff1c4259d7 450 }
Kojto 101:7cff1c4259d7 451
Kojto 101:7cff1c4259d7 452
Kojto 101:7cff1c4259d7 453 /** \brief Rotate Right in unsigned value (32 bit)
Kojto 101:7cff1c4259d7 454
Kojto 101:7cff1c4259d7 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
Kojto 101:7cff1c4259d7 456
Kojto 101:7cff1c4259d7 457 \param [in] value Value to rotate
Kojto 101:7cff1c4259d7 458 \param [in] value Number of Bits to rotate
Kojto 101:7cff1c4259d7 459 \return Rotated value
Kojto 101:7cff1c4259d7 460 */
Kojto 101:7cff1c4259d7 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
Kojto 101:7cff1c4259d7 462 {
Kojto 101:7cff1c4259d7 463 return (op1 >> op2) | (op1 << (32 - op2));
Kojto 101:7cff1c4259d7 464 }
Kojto 101:7cff1c4259d7 465
Kojto 101:7cff1c4259d7 466
Kojto 101:7cff1c4259d7 467 /** \brief Breakpoint
Kojto 101:7cff1c4259d7 468
Kojto 101:7cff1c4259d7 469 This function causes the processor to enter Debug state.
Kojto 101:7cff1c4259d7 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
Kojto 101:7cff1c4259d7 471
Kojto 101:7cff1c4259d7 472 \param [in] value is ignored by the processor.
Kojto 101:7cff1c4259d7 473 If required, a debugger can use it to store additional information about the breakpoint.
Kojto 101:7cff1c4259d7 474 */
Kojto 101:7cff1c4259d7 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
Kojto 101:7cff1c4259d7 476
Kojto 101:7cff1c4259d7 477
Kojto 101:7cff1c4259d7 478 #if (__CORTEX_M >= 0x03)
Kojto 101:7cff1c4259d7 479
Kojto 101:7cff1c4259d7 480 /** \brief Reverse bit order of value
Kojto 101:7cff1c4259d7 481
Kojto 101:7cff1c4259d7 482 This function reverses the bit order of the given value.
Kojto 101:7cff1c4259d7 483
Kojto 101:7cff1c4259d7 484 \param [in] value Value to reverse
Kojto 101:7cff1c4259d7 485 \return Reversed value
Kojto 101:7cff1c4259d7 486 */
Kojto 101:7cff1c4259d7 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
Kojto 101:7cff1c4259d7 488 {
Kojto 101:7cff1c4259d7 489 uint32_t result;
Kojto 101:7cff1c4259d7 490
Kojto 101:7cff1c4259d7 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
Kojto 101:7cff1c4259d7 492 return(result);
Kojto 101:7cff1c4259d7 493 }
Kojto 101:7cff1c4259d7 494
Kojto 101:7cff1c4259d7 495
Kojto 101:7cff1c4259d7 496 /** \brief LDR Exclusive (8 bit)
Kojto 101:7cff1c4259d7 497
Kojto 101:7cff1c4259d7 498 This function performs a exclusive LDR command for 8 bit value.
Kojto 101:7cff1c4259d7 499
Kojto 101:7cff1c4259d7 500 \param [in] ptr Pointer to data
Kojto 101:7cff1c4259d7 501 \return value of type uint8_t at (*ptr)
Kojto 101:7cff1c4259d7 502 */
Kojto 101:7cff1c4259d7 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
Kojto 101:7cff1c4259d7 504 {
Kojto 101:7cff1c4259d7 505 uint32_t result;
Kojto 101:7cff1c4259d7 506
Kojto 101:7cff1c4259d7 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 101:7cff1c4259d7 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 101:7cff1c4259d7 509 #else
Kojto 101:7cff1c4259d7 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Kojto 101:7cff1c4259d7 511 accepted by assembler. So has to use following less efficient pattern.
Kojto 101:7cff1c4259d7 512 */
Kojto 101:7cff1c4259d7 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Kojto 101:7cff1c4259d7 514 #endif
Kojto 101:7cff1c4259d7 515 return(result);
Kojto 101:7cff1c4259d7 516 }
Kojto 101:7cff1c4259d7 517
Kojto 101:7cff1c4259d7 518
Kojto 101:7cff1c4259d7 519 /** \brief LDR Exclusive (16 bit)
Kojto 101:7cff1c4259d7 520
Kojto 101:7cff1c4259d7 521 This function performs a exclusive LDR command for 16 bit values.
Kojto 101:7cff1c4259d7 522
Kojto 101:7cff1c4259d7 523 \param [in] ptr Pointer to data
Kojto 101:7cff1c4259d7 524 \return value of type uint16_t at (*ptr)
Kojto 101:7cff1c4259d7 525 */
Kojto 101:7cff1c4259d7 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
Kojto 101:7cff1c4259d7 527 {
Kojto 101:7cff1c4259d7 528 uint32_t result;
Kojto 101:7cff1c4259d7 529
Kojto 101:7cff1c4259d7 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 101:7cff1c4259d7 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 101:7cff1c4259d7 532 #else
Kojto 101:7cff1c4259d7 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Kojto 101:7cff1c4259d7 534 accepted by assembler. So has to use following less efficient pattern.
Kojto 101:7cff1c4259d7 535 */
Kojto 101:7cff1c4259d7 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Kojto 101:7cff1c4259d7 537 #endif
Kojto 101:7cff1c4259d7 538 return(result);
Kojto 101:7cff1c4259d7 539 }
Kojto 101:7cff1c4259d7 540
Kojto 101:7cff1c4259d7 541
Kojto 101:7cff1c4259d7 542 /** \brief LDR Exclusive (32 bit)
Kojto 101:7cff1c4259d7 543
Kojto 101:7cff1c4259d7 544 This function performs a exclusive LDR command for 32 bit values.
Kojto 101:7cff1c4259d7 545
Kojto 101:7cff1c4259d7 546 \param [in] ptr Pointer to data
Kojto 101:7cff1c4259d7 547 \return value of type uint32_t at (*ptr)
Kojto 101:7cff1c4259d7 548 */
Kojto 101:7cff1c4259d7 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
Kojto 101:7cff1c4259d7 550 {
Kojto 101:7cff1c4259d7 551 uint32_t result;
Kojto 101:7cff1c4259d7 552
Kojto 101:7cff1c4259d7 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 101:7cff1c4259d7 554 return(result);
Kojto 101:7cff1c4259d7 555 }
Kojto 101:7cff1c4259d7 556
Kojto 101:7cff1c4259d7 557
Kojto 101:7cff1c4259d7 558 /** \brief STR Exclusive (8 bit)
Kojto 101:7cff1c4259d7 559
Kojto 101:7cff1c4259d7 560 This function performs a exclusive STR command for 8 bit values.
Kojto 101:7cff1c4259d7 561
Kojto 101:7cff1c4259d7 562 \param [in] value Value to store
Kojto 101:7cff1c4259d7 563 \param [in] ptr Pointer to location
Kojto 101:7cff1c4259d7 564 \return 0 Function succeeded
Kojto 101:7cff1c4259d7 565 \return 1 Function failed
Kojto 101:7cff1c4259d7 566 */
Kojto 101:7cff1c4259d7 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
Kojto 101:7cff1c4259d7 568 {
Kojto 101:7cff1c4259d7 569 uint32_t result;
Kojto 101:7cff1c4259d7 570
Kojto 101:7cff1c4259d7 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Kojto 101:7cff1c4259d7 572 return(result);
Kojto 101:7cff1c4259d7 573 }
Kojto 101:7cff1c4259d7 574
Kojto 101:7cff1c4259d7 575
Kojto 101:7cff1c4259d7 576 /** \brief STR Exclusive (16 bit)
Kojto 101:7cff1c4259d7 577
Kojto 101:7cff1c4259d7 578 This function performs a exclusive STR command for 16 bit values.
Kojto 101:7cff1c4259d7 579
Kojto 101:7cff1c4259d7 580 \param [in] value Value to store
Kojto 101:7cff1c4259d7 581 \param [in] ptr Pointer to location
Kojto 101:7cff1c4259d7 582 \return 0 Function succeeded
Kojto 101:7cff1c4259d7 583 \return 1 Function failed
Kojto 101:7cff1c4259d7 584 */
Kojto 101:7cff1c4259d7 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
Kojto 101:7cff1c4259d7 586 {
Kojto 101:7cff1c4259d7 587 uint32_t result;
Kojto 101:7cff1c4259d7 588
Kojto 101:7cff1c4259d7 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Kojto 101:7cff1c4259d7 590 return(result);
Kojto 101:7cff1c4259d7 591 }
Kojto 101:7cff1c4259d7 592
Kojto 101:7cff1c4259d7 593
Kojto 101:7cff1c4259d7 594 /** \brief STR Exclusive (32 bit)
Kojto 101:7cff1c4259d7 595
Kojto 101:7cff1c4259d7 596 This function performs a exclusive STR command for 32 bit values.
Kojto 101:7cff1c4259d7 597
Kojto 101:7cff1c4259d7 598 \param [in] value Value to store
Kojto 101:7cff1c4259d7 599 \param [in] ptr Pointer to location
Kojto 101:7cff1c4259d7 600 \return 0 Function succeeded
Kojto 101:7cff1c4259d7 601 \return 1 Function failed
Kojto 101:7cff1c4259d7 602 */
Kojto 101:7cff1c4259d7 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
Kojto 101:7cff1c4259d7 604 {
Kojto 101:7cff1c4259d7 605 uint32_t result;
Kojto 101:7cff1c4259d7 606
Kojto 101:7cff1c4259d7 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Kojto 101:7cff1c4259d7 608 return(result);
Kojto 101:7cff1c4259d7 609 }
Kojto 101:7cff1c4259d7 610
Kojto 101:7cff1c4259d7 611
Kojto 101:7cff1c4259d7 612 /** \brief Remove the exclusive lock
Kojto 101:7cff1c4259d7 613
Kojto 101:7cff1c4259d7 614 This function removes the exclusive lock which is created by LDREX.
Kojto 101:7cff1c4259d7 615
Kojto 101:7cff1c4259d7 616 */
Kojto 101:7cff1c4259d7 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
Kojto 101:7cff1c4259d7 618 {
Kojto 101:7cff1c4259d7 619 __ASM volatile ("clrex" ::: "memory");
Kojto 101:7cff1c4259d7 620 }
Kojto 101:7cff1c4259d7 621
Kojto 101:7cff1c4259d7 622
Kojto 101:7cff1c4259d7 623 /** \brief Signed Saturate
Kojto 101:7cff1c4259d7 624
Kojto 101:7cff1c4259d7 625 This function saturates a signed value.
Kojto 101:7cff1c4259d7 626
Kojto 101:7cff1c4259d7 627 \param [in] value Value to be saturated
Kojto 101:7cff1c4259d7 628 \param [in] sat Bit position to saturate to (1..32)
Kojto 101:7cff1c4259d7 629 \return Saturated value
Kojto 101:7cff1c4259d7 630 */
Kojto 101:7cff1c4259d7 631 #define __SSAT(ARG1,ARG2) \
Kojto 101:7cff1c4259d7 632 ({ \
Kojto 101:7cff1c4259d7 633 uint32_t __RES, __ARG1 = (ARG1); \
Kojto 101:7cff1c4259d7 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Kojto 101:7cff1c4259d7 635 __RES; \
Kojto 101:7cff1c4259d7 636 })
Kojto 101:7cff1c4259d7 637
Kojto 101:7cff1c4259d7 638
Kojto 101:7cff1c4259d7 639 /** \brief Unsigned Saturate
Kojto 101:7cff1c4259d7 640
Kojto 101:7cff1c4259d7 641 This function saturates an unsigned value.
Kojto 101:7cff1c4259d7 642
Kojto 101:7cff1c4259d7 643 \param [in] value Value to be saturated
Kojto 101:7cff1c4259d7 644 \param [in] sat Bit position to saturate to (0..31)
Kojto 101:7cff1c4259d7 645 \return Saturated value
Kojto 101:7cff1c4259d7 646 */
Kojto 101:7cff1c4259d7 647 #define __USAT(ARG1,ARG2) \
Kojto 101:7cff1c4259d7 648 ({ \
Kojto 101:7cff1c4259d7 649 uint32_t __RES, __ARG1 = (ARG1); \
Kojto 101:7cff1c4259d7 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Kojto 101:7cff1c4259d7 651 __RES; \
Kojto 101:7cff1c4259d7 652 })
Kojto 101:7cff1c4259d7 653
Kojto 101:7cff1c4259d7 654
Kojto 101:7cff1c4259d7 655 /** \brief Count leading zeros
Kojto 101:7cff1c4259d7 656
Kojto 101:7cff1c4259d7 657 This function counts the number of leading zeros of a data value.
Kojto 101:7cff1c4259d7 658
Kojto 101:7cff1c4259d7 659 \param [in] value Value to count the leading zeros
Kojto 101:7cff1c4259d7 660 \return number of leading zeros in value
Kojto 101:7cff1c4259d7 661 */
Kojto 101:7cff1c4259d7 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
Kojto 101:7cff1c4259d7 663 {
Kojto 101:7cff1c4259d7 664 uint32_t result;
Kojto 101:7cff1c4259d7 665
Kojto 101:7cff1c4259d7 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
Kojto 101:7cff1c4259d7 667 return(result);
Kojto 101:7cff1c4259d7 668 }
Kojto 101:7cff1c4259d7 669
Kojto 101:7cff1c4259d7 670 #endif /* (__CORTEX_M >= 0x03) */
Kojto 101:7cff1c4259d7 671
Kojto 101:7cff1c4259d7 672
Kojto 101:7cff1c4259d7 673
Kojto 101:7cff1c4259d7 674
Kojto 101:7cff1c4259d7 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Kojto 101:7cff1c4259d7 676 /* TASKING carm specific functions */
Kojto 101:7cff1c4259d7 677
Kojto 101:7cff1c4259d7 678 /*
Kojto 101:7cff1c4259d7 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 101:7cff1c4259d7 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
Kojto 101:7cff1c4259d7 681 * Including the CMSIS ones.
Kojto 101:7cff1c4259d7 682 */
Kojto 101:7cff1c4259d7 683
Kojto 101:7cff1c4259d7 684 #endif
Kojto 101:7cff1c4259d7 685
Kojto 101:7cff1c4259d7 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
Kojto 101:7cff1c4259d7 687
Kojto 101:7cff1c4259d7 688 #endif /* __CORE_CMINSTR_H */