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TARGET_NUMAKER_PFM_M453/TOOLCHAIN_ARM_MICRO/M453.sct@141:794e51388b66, 2017-04-28 (annotated)
- Committer:
- Anna Bridge
- Date:
- Fri Apr 28 13:09:19 2017 +0100
- Revision:
- 141:794e51388b66
- Parent:
- 130:d75b3fe1f5cb
Release 141 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
4008: [NUC472/M453] Support Bootloader and FlashIAP https://github.com/ARMmbed/mbed-os/pull/4008
4102: Add SCL and SDA defs for I2C[0-2]; redefine I2C_[SCL,SDA] to I2C2 https://github.com/ARMmbed/mbed-os/pull/4102
4118: STM32F4 Internal ADC channels rework https://github.com/ARMmbed/mbed-os/pull/4118
4126: STM32F4 : remove SERIAL_TX and SERIAL_RX from available pins https://github.com/ARMmbed/mbed-os/pull/4126
4148: Revert "STM32F4 Internal ADC channels rework" https://github.com/ARMmbed/mbed-os/pull/4148
4152: STM32F4 Internal ADC channels rework https://github.com/ARMmbed/mbed-os/pull/4152
4074: [Silicon Labs] Update pinout https://github.com/ARMmbed/mbed-os/pull/4074
4133: U-BLOX_C030: Default XTAL is now 12MHz onboard. Option to use Debug 8MHz https://github.com/ARMmbed/mbed-os/pull/4133
4142: EFM32: Fixed `pwmout_all_inactive` being inversed https://github.com/ARMmbed/mbed-os/pull/4142
4016: [NRF5]: fix rtc overflow-while-set-timestamp issue https://github.com/ARMmbed/mbed-os/pull/4016
4031: STM32 increase IAR heap size for big RAM targets https://github.com/ARMmbed/mbed-os/pull/4031
4137: MCUXpresso: Update ARM linker files to eliminate reserving RAM for stack & heap https://github.com/ARMmbed/mbed-os/pull/4137
4176: STM32L4 Internal ADC channels rework https://github.com/ARMmbed/mbed-os/pull/4176
4154: STM32F7 Internal ADC channels rework https://github.com/ARMmbed/mbed-os/pull/4154
4174: [NRF52840]: fix rtc overflow-while-set-timestamp issue https://github.com/ARMmbed/mbed-os/pull/4174
4180: [UBLOX_C030] create target hierarchy for the specific versions of the C030 board https://github.com/ARMmbed/mbed-os/pull/4180
4153: STM32F2: Internal ADC channels rework https://github.com/ARMmbed/mbed-os/pull/4153
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Anna Bridge |
141:794e51388b66 | 1 | #! armcc -E |
<> | 128:9bcdf88f62b0 | 2 | |
Anna Bridge |
141:794e51388b66 | 3 | #if !defined(MBED_APP_START) |
Anna Bridge |
141:794e51388b66 | 4 | #define MBED_APP_START 0x00000000 |
Anna Bridge |
141:794e51388b66 | 5 | #endif |
Anna Bridge |
141:794e51388b66 | 6 | |
Anna Bridge |
141:794e51388b66 | 7 | #if !defined(MBED_APP_SIZE) |
Anna Bridge |
141:794e51388b66 | 8 | #define MBED_APP_SIZE 0x00040000 |
Anna Bridge |
141:794e51388b66 | 9 | #endif |
Anna Bridge |
141:794e51388b66 | 10 | |
Anna Bridge |
141:794e51388b66 | 11 | LR_IROM1 MBED_APP_START { |
Anna Bridge |
141:794e51388b66 | 12 | ER_IROM1 MBED_APP_START { ; load address = execution address |
<> | 128:9bcdf88f62b0 | 13 | *(RESET, +First) |
<> | 128:9bcdf88f62b0 | 14 | *(InRoot$$Sections) |
<> | 128:9bcdf88f62b0 | 15 | .ANY (+RO) |
<> | 128:9bcdf88f62b0 | 16 | } |
<> | 128:9bcdf88f62b0 | 17 | |
<> | 128:9bcdf88f62b0 | 18 | ;UVISOR AlignExpr(+0, 16) { ; 16 byte-aligned |
<> | 128:9bcdf88f62b0 | 19 | ; uvisor-lib.a (+RW +ZI) |
<> | 128:9bcdf88f62b0 | 20 | ;} |
<> | 128:9bcdf88f62b0 | 21 | |
<> | 130:d75b3fe1f5cb | 22 | ARM_LIB_STACK 0x20000000 EMPTY 0x800 { |
<> | 128:9bcdf88f62b0 | 23 | } |
<> | 128:9bcdf88f62b0 | 24 | |
<> | 130:d75b3fe1f5cb | 25 | ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 64)) { ; Reserve for vectors |
<> | 128:9bcdf88f62b0 | 26 | } |
<> | 128:9bcdf88f62b0 | 27 | |
<> | 128:9bcdf88f62b0 | 28 | RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned |
<> | 128:9bcdf88f62b0 | 29 | .ANY (+RW +ZI) |
<> | 128:9bcdf88f62b0 | 30 | } |
<> | 128:9bcdf88f62b0 | 31 | |
<> | 128:9bcdf88f62b0 | 32 | ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x8000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { |
<> | 128:9bcdf88f62b0 | 33 | } |
<> | 128:9bcdf88f62b0 | 34 | } |
Anna Bridge |
141:794e51388b66 | 35 | ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 256 KB APROM |
<> | 128:9bcdf88f62b0 | 36 | ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20008000) ; 32 KB SRAM |
<> | 128:9bcdf88f62b0 | 37 |