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TARGET_NUCLEO_L4R5ZI_P/TOOLCHAIN_IAR/stm32l4xx_ll_pwr.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	172:65be27845400	1	/**
AnnaBridge	172:65be27845400	2	******************************************************************************
AnnaBridge	172:65be27845400	3	* @file stm32l4xx_ll_pwr.h
AnnaBridge	172:65be27845400	4	* @author MCD Application Team
AnnaBridge	172:65be27845400	5	* @brief Header file of PWR LL module.
AnnaBridge	172:65be27845400	6	******************************************************************************
AnnaBridge	172:65be27845400	7	* @attention
AnnaBridge	172:65be27845400	8	*
AnnaBridge	172:65be27845400	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	172:65be27845400	10	*
AnnaBridge	172:65be27845400	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	172:65be27845400	12	* are permitted provided that the following conditions are met:
AnnaBridge	172:65be27845400	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	172:65be27845400	14	* this list of conditions and the following disclaimer.
AnnaBridge	172:65be27845400	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	172:65be27845400	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	172:65be27845400	17	* and/or other materials provided with the distribution.
AnnaBridge	172:65be27845400	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	172:65be27845400	19	* may be used to endorse or promote products derived from this software
AnnaBridge	172:65be27845400	20	* without specific prior written permission.
AnnaBridge	172:65be27845400	21	*
AnnaBridge	172:65be27845400	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	172:65be27845400	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	172:65be27845400	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	172:65be27845400	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	172:65be27845400	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	172:65be27845400	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	172:65be27845400	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	172:65be27845400	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	172:65be27845400	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	172:65be27845400	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	172:65be27845400	32	*
AnnaBridge	172:65be27845400	33	******************************************************************************
AnnaBridge	172:65be27845400	34	*/
AnnaBridge	172:65be27845400	35
AnnaBridge	172:65be27845400	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	172:65be27845400	37	#ifndef __STM32L4xx_LL_PWR_H
AnnaBridge	172:65be27845400	38	#define __STM32L4xx_LL_PWR_H
AnnaBridge	172:65be27845400	39
AnnaBridge	172:65be27845400	40	#ifdef __cplusplus
AnnaBridge	172:65be27845400	41	extern "C" {
AnnaBridge	172:65be27845400	42	#endif
AnnaBridge	172:65be27845400	43
AnnaBridge	172:65be27845400	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	172:65be27845400	45	#include "stm32l4xx.h"
AnnaBridge	172:65be27845400	46
AnnaBridge	172:65be27845400	47	/** @addtogroup STM32L4xx_LL_Driver
AnnaBridge	172:65be27845400	48	* @{
AnnaBridge	172:65be27845400	49	*/
AnnaBridge	172:65be27845400	50
AnnaBridge	172:65be27845400	51	#if defined(PWR)
AnnaBridge	172:65be27845400	52
AnnaBridge	172:65be27845400	53	/** @defgroup PWR_LL PWR
AnnaBridge	172:65be27845400	54	* @{
AnnaBridge	172:65be27845400	55	*/
AnnaBridge	172:65be27845400	56
AnnaBridge	172:65be27845400	57	/* Private types -------------------------------------------------------------*/
AnnaBridge	172:65be27845400	58	/* Private variables ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	59
AnnaBridge	172:65be27845400	60	/* Private constants ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	61
AnnaBridge	172:65be27845400	62	/* Private macros ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	63
AnnaBridge	172:65be27845400	64	/* Exported types ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	65	/* Exported constants --------------------------------------------------------*/
AnnaBridge	172:65be27845400	66	/** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
AnnaBridge	172:65be27845400	67	* @{
AnnaBridge	172:65be27845400	68	*/
AnnaBridge	172:65be27845400	69
AnnaBridge	172:65be27845400	70	/** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge	172:65be27845400	71	* @brief Flags defines which can be used with LL_PWR_WriteReg function
AnnaBridge	172:65be27845400	72	* @{
AnnaBridge	172:65be27845400	73	*/
AnnaBridge	172:65be27845400	74	#define LL_PWR_SCR_CSBF PWR_SCR_CSBF
AnnaBridge	172:65be27845400	75	#define LL_PWR_SCR_CWUF PWR_SCR_CWUF
AnnaBridge	172:65be27845400	76	#define LL_PWR_SCR_CWUF5 PWR_SCR_CWUF5
AnnaBridge	172:65be27845400	77	#define LL_PWR_SCR_CWUF4 PWR_SCR_CWUF4
AnnaBridge	172:65be27845400	78	#define LL_PWR_SCR_CWUF3 PWR_SCR_CWUF3
AnnaBridge	172:65be27845400	79	#define LL_PWR_SCR_CWUF2 PWR_SCR_CWUF2
AnnaBridge	172:65be27845400	80	#define LL_PWR_SCR_CWUF1 PWR_SCR_CWUF1
AnnaBridge	172:65be27845400	81	/**
AnnaBridge	172:65be27845400	82	* @}
AnnaBridge	172:65be27845400	83	*/
AnnaBridge	172:65be27845400	84
AnnaBridge	172:65be27845400	85	/** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	172:65be27845400	86	* @brief Flags defines which can be used with LL_PWR_ReadReg function
AnnaBridge	172:65be27845400	87	* @{
AnnaBridge	172:65be27845400	88	*/
AnnaBridge	172:65be27845400	89	#define LL_PWR_SR1_WUFI PWR_SR1_WUFI
AnnaBridge	172:65be27845400	90	#define LL_PWR_SR1_SBF PWR_SR1_SBF
AnnaBridge	172:65be27845400	91	#define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
AnnaBridge	172:65be27845400	92	#define LL_PWR_SR1_WUF4 PWR_SR1_WUF4
AnnaBridge	172:65be27845400	93	#define LL_PWR_SR1_WUF3 PWR_SR1_WUF3
AnnaBridge	172:65be27845400	94	#define LL_PWR_SR1_WUF2 PWR_SR1_WUF2
AnnaBridge	172:65be27845400	95	#define LL_PWR_SR1_WUF1 PWR_SR1_WUF1
AnnaBridge	172:65be27845400	96	#if defined(PWR_SR2_PVMO4)
AnnaBridge	172:65be27845400	97	#define LL_PWR_SR2_PVMO4 PWR_SR2_PVMO4
AnnaBridge	172:65be27845400	98	#endif /* PWR_SR2_PVMO4 */
AnnaBridge	172:65be27845400	99	#if defined(PWR_SR2_PVMO3)
AnnaBridge	172:65be27845400	100	#define LL_PWR_SR2_PVMO3 PWR_SR2_PVMO3
AnnaBridge	172:65be27845400	101	#endif /* PWR_SR2_PVMO3 */
AnnaBridge	172:65be27845400	102	#if defined(PWR_SR2_PVMO2)
AnnaBridge	172:65be27845400	103	#define LL_PWR_SR2_PVMO2 PWR_SR2_PVMO2
AnnaBridge	172:65be27845400	104	#endif /* PWR_SR2_PVMO2 */
AnnaBridge	172:65be27845400	105	#if defined(PWR_SR2_PVMO1)
AnnaBridge	172:65be27845400	106	#define LL_PWR_SR2_PVMO1 PWR_SR2_PVMO1
AnnaBridge	172:65be27845400	107	#endif /* PWR_SR2_PVMO1 */
AnnaBridge	172:65be27845400	108	#define LL_PWR_SR2_PVDO PWR_SR2_PVDO
AnnaBridge	172:65be27845400	109	#define LL_PWR_SR2_VOSF PWR_SR2_VOSF
AnnaBridge	172:65be27845400	110	#define LL_PWR_SR2_REGLPF PWR_SR2_REGLPF
AnnaBridge	172:65be27845400	111	#define LL_PWR_SR2_REGLPS PWR_SR2_REGLPS
AnnaBridge	172:65be27845400	112	/**
AnnaBridge	172:65be27845400	113	* @}
AnnaBridge	172:65be27845400	114	*/
AnnaBridge	172:65be27845400	115
AnnaBridge	172:65be27845400	116	/** @defgroup PWR_LL_EC_REGU_VOLTAGE REGU VOLTAGE
AnnaBridge	172:65be27845400	117	* @{
AnnaBridge	172:65be27845400	118	*/
AnnaBridge	172:65be27845400	119	#define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR1_VOS_0)
AnnaBridge	172:65be27845400	120	#define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR1_VOS_1)
AnnaBridge	172:65be27845400	121	/**
AnnaBridge	172:65be27845400	122	* @}
AnnaBridge	172:65be27845400	123	*/
AnnaBridge	172:65be27845400	124
AnnaBridge	172:65be27845400	125	/** @defgroup PWR_LL_EC_MODE_PWR MODE PWR
AnnaBridge	172:65be27845400	126	* @{
AnnaBridge	172:65be27845400	127	*/
AnnaBridge	172:65be27845400	128	#define LL_PWR_MODE_STOP0 (PWR_CR1_LPMS_STOP0)
AnnaBridge	172:65be27845400	129	#define LL_PWR_MODE_STOP1 (PWR_CR1_LPMS_STOP1)
AnnaBridge	172:65be27845400	130	#define LL_PWR_MODE_STOP2 (PWR_CR1_LPMS_STOP2)
AnnaBridge	172:65be27845400	131	#define LL_PWR_MODE_STANDBY (PWR_CR1_LPMS_STANDBY)
AnnaBridge	172:65be27845400	132	#define LL_PWR_MODE_SHUTDOWN (PWR_CR1_LPMS_SHUTDOWN)
AnnaBridge	172:65be27845400	133	/**
AnnaBridge	172:65be27845400	134	* @}
AnnaBridge	172:65be27845400	135	*/
AnnaBridge	172:65be27845400	136
AnnaBridge	172:65be27845400	137	/** @defgroup PWR_LL_EC_PVM_VDDUSB_1 Peripheral voltage monitoring
AnnaBridge	172:65be27845400	138	* @{
AnnaBridge	172:65be27845400	139	*/
AnnaBridge	172:65be27845400	140	#if defined(PWR_CR2_PVME1)
AnnaBridge	172:65be27845400	141	#define LL_PWR_PVM_VDDUSB_1_2V (PWR_CR2_PVME1) /* Monitoring VDDUSB vs. 1.2V */
AnnaBridge	172:65be27845400	142	#endif
AnnaBridge	172:65be27845400	143	#if defined(PWR_CR2_PVME2)
AnnaBridge	172:65be27845400	144	#define LL_PWR_PVM_VDDIO2_0_9V (PWR_CR2_PVME2) /* Monitoring VDDIO2 vs. 0.9V */
AnnaBridge	172:65be27845400	145	#endif
AnnaBridge	172:65be27845400	146	#if defined(PWR_CR2_PVME3)
AnnaBridge	172:65be27845400	147	#define LL_PWR_PVM_VDDA_1_62V (PWR_CR2_PVME3) /* Monitoring VDDA vs. 1.62V */
AnnaBridge	172:65be27845400	148	#endif
AnnaBridge	172:65be27845400	149	#if defined(PWR_CR2_PVME4)
AnnaBridge	172:65be27845400	150	#define LL_PWR_PVM_VDDA_2_2V (PWR_CR2_PVME4) /* Monitoring VDDA vs. 2.2V */
AnnaBridge	172:65be27845400	151	#endif
AnnaBridge	172:65be27845400	152	/**
AnnaBridge	172:65be27845400	153	* @}
AnnaBridge	172:65be27845400	154	*/
AnnaBridge	172:65be27845400	155
AnnaBridge	172:65be27845400	156	/** @defgroup PWR_LL_EC_PVDLEVEL PVDLEVEL
AnnaBridge	172:65be27845400	157	* @{
AnnaBridge	172:65be27845400	158	*/
AnnaBridge	172:65be27845400	159	#define LL_PWR_PVDLEVEL_0 (PWR_CR2_PLS_LEV0) /* VPVD0 around 2.0 V */
AnnaBridge	172:65be27845400	160	#define LL_PWR_PVDLEVEL_1 (PWR_CR2_PLS_LEV1) /* VPVD1 around 2.2 V */
AnnaBridge	172:65be27845400	161	#define LL_PWR_PVDLEVEL_2 (PWR_CR2_PLS_LEV2) /* VPVD2 around 2.4 V */
AnnaBridge	172:65be27845400	162	#define LL_PWR_PVDLEVEL_3 (PWR_CR2_PLS_LEV3) /* VPVD3 around 2.5 V */
AnnaBridge	172:65be27845400	163	#define LL_PWR_PVDLEVEL_4 (PWR_CR2_PLS_LEV4) /* VPVD4 around 2.6 V */
AnnaBridge	172:65be27845400	164	#define LL_PWR_PVDLEVEL_5 (PWR_CR2_PLS_LEV5) /* VPVD5 around 2.8 V */
AnnaBridge	172:65be27845400	165	#define LL_PWR_PVDLEVEL_6 (PWR_CR2_PLS_LEV6) /* VPVD6 around 2.9 V */
AnnaBridge	172:65be27845400	166	#define LL_PWR_PVDLEVEL_7 (PWR_CR2_PLS_LEV7) /* External input analog voltage (Compare internally to VREFINT) */
AnnaBridge	172:65be27845400	167	/**
AnnaBridge	172:65be27845400	168	* @}
AnnaBridge	172:65be27845400	169	*/
AnnaBridge	172:65be27845400	170
AnnaBridge	172:65be27845400	171	/** @defgroup PWR_LL_EC_WAKEUP WAKEUP
AnnaBridge	172:65be27845400	172	* @{
AnnaBridge	172:65be27845400	173	*/
AnnaBridge	172:65be27845400	174	#define LL_PWR_WAKEUP_PIN1 (PWR_CR3_EWUP1)
AnnaBridge	172:65be27845400	175	#define LL_PWR_WAKEUP_PIN2 (PWR_CR3_EWUP2)
AnnaBridge	172:65be27845400	176	#define LL_PWR_WAKEUP_PIN3 (PWR_CR3_EWUP3)
AnnaBridge	172:65be27845400	177	#define LL_PWR_WAKEUP_PIN4 (PWR_CR3_EWUP4)
AnnaBridge	172:65be27845400	178	#define LL_PWR_WAKEUP_PIN5 (PWR_CR3_EWUP5)
AnnaBridge	172:65be27845400	179	/**
AnnaBridge	172:65be27845400	180	* @}
AnnaBridge	172:65be27845400	181	*/
AnnaBridge	172:65be27845400	182
AnnaBridge	172:65be27845400	183	/** @defgroup PWR_LL_EC_BATT_CHARG_RESISTOR BATT CHARG RESISTOR
AnnaBridge	172:65be27845400	184	* @{
AnnaBridge	172:65be27845400	185	*/
AnnaBridge	172:65be27845400	186	#define LL_PWR_BATT_CHARG_RESISTOR_5K (0x00000000U)
AnnaBridge	172:65be27845400	187	#define LL_PWR_BATT_CHARGRESISTOR_1_5K (PWR_CR4_VBRS)
AnnaBridge	172:65be27845400	188	/**
AnnaBridge	172:65be27845400	189	* @}
AnnaBridge	172:65be27845400	190	*/
AnnaBridge	172:65be27845400	191
AnnaBridge	172:65be27845400	192	/** @defgroup PWR_LL_EC_GPIO GPIO
AnnaBridge	172:65be27845400	193	* @{
AnnaBridge	172:65be27845400	194	*/
AnnaBridge	172:65be27845400	195	#define LL_PWR_GPIO_A ((uint32_t)(&(PWR->PUCRA)))
AnnaBridge	172:65be27845400	196	#define LL_PWR_GPIO_B ((uint32_t)(&(PWR->PUCRB)))
AnnaBridge	172:65be27845400	197	#define LL_PWR_GPIO_C ((uint32_t)(&(PWR->PUCRC)))
AnnaBridge	172:65be27845400	198	#define LL_PWR_GPIO_D ((uint32_t)(&(PWR->PUCRD)))
AnnaBridge	172:65be27845400	199	#define LL_PWR_GPIO_E ((uint32_t)(&(PWR->PUCRE)))
AnnaBridge	172:65be27845400	200	#if defined(GPIOF)
AnnaBridge	172:65be27845400	201	#define LL_PWR_GPIO_F ((uint32_t)(&(PWR->PUCRF)))
AnnaBridge	172:65be27845400	202	#endif
AnnaBridge	172:65be27845400	203	#if defined(GPIOG)
AnnaBridge	172:65be27845400	204	#define LL_PWR_GPIO_G ((uint32_t)(&(PWR->PUCRG)))
AnnaBridge	172:65be27845400	205	#endif
AnnaBridge	172:65be27845400	206	#if defined(GPIOH)
AnnaBridge	172:65be27845400	207	#define LL_PWR_GPIO_H ((uint32_t)(&(PWR->PUCRH)))
AnnaBridge	172:65be27845400	208	#endif
AnnaBridge	172:65be27845400	209	#if defined(GPIOI)
AnnaBridge	172:65be27845400	210	#define LL_PWR_GPIO_I ((uint32_t)(&(PWR->PUCRI)))
AnnaBridge	172:65be27845400	211	#endif
AnnaBridge	172:65be27845400	212	/**
AnnaBridge	172:65be27845400	213	* @}
AnnaBridge	172:65be27845400	214	*/
AnnaBridge	172:65be27845400	215
AnnaBridge	172:65be27845400	216	/** @defgroup PWR_LL_EC_GPIO_BIT GPIO BIT
AnnaBridge	172:65be27845400	217	* @{
AnnaBridge	172:65be27845400	218	*/
AnnaBridge	172:65be27845400	219	#define LL_PWR_GPIO_BIT_0 (0x00000001U)
AnnaBridge	172:65be27845400	220	#define LL_PWR_GPIO_BIT_1 (0x00000002U)
AnnaBridge	172:65be27845400	221	#define LL_PWR_GPIO_BIT_2 (0x00000004U)
AnnaBridge	172:65be27845400	222	#define LL_PWR_GPIO_BIT_3 (0x00000008U)
AnnaBridge	172:65be27845400	223	#define LL_PWR_GPIO_BIT_4 (0x00000010U)
AnnaBridge	172:65be27845400	224	#define LL_PWR_GPIO_BIT_5 (0x00000020U)
AnnaBridge	172:65be27845400	225	#define LL_PWR_GPIO_BIT_6 (0x00000040U)
AnnaBridge	172:65be27845400	226	#define LL_PWR_GPIO_BIT_7 (0x00000080U)
AnnaBridge	172:65be27845400	227	#define LL_PWR_GPIO_BIT_8 (0x00000100U)
AnnaBridge	172:65be27845400	228	#define LL_PWR_GPIO_BIT_9 (0x00000200U)
AnnaBridge	172:65be27845400	229	#define LL_PWR_GPIO_BIT_10 (0x00000400U)
AnnaBridge	172:65be27845400	230	#define LL_PWR_GPIO_BIT_11 (0x00000800U)
AnnaBridge	172:65be27845400	231	#define LL_PWR_GPIO_BIT_12 (0x00001000U)
AnnaBridge	172:65be27845400	232	#define LL_PWR_GPIO_BIT_13 (0x00002000U)
AnnaBridge	172:65be27845400	233	#define LL_PWR_GPIO_BIT_14 (0x00004000U)
AnnaBridge	172:65be27845400	234	#define LL_PWR_GPIO_BIT_15 (0x00008000U)
AnnaBridge	172:65be27845400	235	/**
AnnaBridge	172:65be27845400	236	* @}
AnnaBridge	172:65be27845400	237	*/
AnnaBridge	172:65be27845400	238
AnnaBridge	172:65be27845400	239	/**
AnnaBridge	172:65be27845400	240	* @}
AnnaBridge	172:65be27845400	241	*/
AnnaBridge	172:65be27845400	242
AnnaBridge	172:65be27845400	243	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	244	/** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
AnnaBridge	172:65be27845400	245	* @{
AnnaBridge	172:65be27845400	246	*/
AnnaBridge	172:65be27845400	247
AnnaBridge	172:65be27845400	248	/** @defgroup PWR_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	172:65be27845400	249	* @{
AnnaBridge	172:65be27845400	250	*/
AnnaBridge	172:65be27845400	251
AnnaBridge	172:65be27845400	252	/**
AnnaBridge	172:65be27845400	253	* @brief Write a value in PWR register
AnnaBridge	172:65be27845400	254	* @param __REG__ Register to be written
AnnaBridge	172:65be27845400	255	* @param __VALUE__ Value to be written in the register
AnnaBridge	172:65be27845400	256	* @retval None
AnnaBridge	172:65be27845400	257	*/
AnnaBridge	172:65be27845400	258	#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
AnnaBridge	172:65be27845400	259
AnnaBridge	172:65be27845400	260	/**
AnnaBridge	172:65be27845400	261	* @brief Read a value in PWR register
AnnaBridge	172:65be27845400	262	* @param __REG__ Register to be read
AnnaBridge	172:65be27845400	263	* @retval Register value
AnnaBridge	172:65be27845400	264	*/
AnnaBridge	172:65be27845400	265	#define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
AnnaBridge	172:65be27845400	266	/**
AnnaBridge	172:65be27845400	267	* @}
AnnaBridge	172:65be27845400	268	*/
AnnaBridge	172:65be27845400	269
AnnaBridge	172:65be27845400	270	/**
AnnaBridge	172:65be27845400	271	* @}
AnnaBridge	172:65be27845400	272	*/
AnnaBridge	172:65be27845400	273
AnnaBridge	172:65be27845400	274
AnnaBridge	172:65be27845400	275	/* Exported functions --------------------------------------------------------*/
AnnaBridge	172:65be27845400	276	/** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
AnnaBridge	172:65be27845400	277	* @{
AnnaBridge	172:65be27845400	278	*/
AnnaBridge	172:65be27845400	279
AnnaBridge	172:65be27845400	280	/** @defgroup PWR_LL_EF_Configuration Configuration
AnnaBridge	172:65be27845400	281	* @{
AnnaBridge	172:65be27845400	282	*/
AnnaBridge	172:65be27845400	283
AnnaBridge	172:65be27845400	284	/**
AnnaBridge	172:65be27845400	285	* @brief Switch the regulator from main mode to low-power mode
AnnaBridge	172:65be27845400	286	* @rmtoll CR1 LPR LL_PWR_EnableLowPowerRunMode
AnnaBridge	172:65be27845400	287	* @retval None
AnnaBridge	172:65be27845400	288	*/
AnnaBridge	172:65be27845400	289	__STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void)
AnnaBridge	172:65be27845400	290	{
AnnaBridge	172:65be27845400	291	SET_BIT(PWR->CR1, PWR_CR1_LPR);
AnnaBridge	172:65be27845400	292	}
AnnaBridge	172:65be27845400	293
AnnaBridge	172:65be27845400	294	/**
AnnaBridge	172:65be27845400	295	* @brief Switch the regulator from low-power mode to main mode
AnnaBridge	172:65be27845400	296	* @rmtoll CR1 LPR LL_PWR_DisableLowPowerRunMode
AnnaBridge	172:65be27845400	297	* @retval None
AnnaBridge	172:65be27845400	298	*/
AnnaBridge	172:65be27845400	299	__STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void)
AnnaBridge	172:65be27845400	300	{
AnnaBridge	172:65be27845400	301	CLEAR_BIT(PWR->CR1, PWR_CR1_LPR);
AnnaBridge	172:65be27845400	302	}
AnnaBridge	172:65be27845400	303
AnnaBridge	172:65be27845400	304	/**
AnnaBridge	172:65be27845400	305	* @brief Switch from run main mode to run low-power mode.
AnnaBridge	172:65be27845400	306	* @rmtoll CR1 LPR LL_PWR_EnterLowPowerRunMode
AnnaBridge	172:65be27845400	307	* @retval None
AnnaBridge	172:65be27845400	308	*/
AnnaBridge	172:65be27845400	309	__STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void)
AnnaBridge	172:65be27845400	310	{
AnnaBridge	172:65be27845400	311	LL_PWR_EnableLowPowerRunMode();
AnnaBridge	172:65be27845400	312	}
AnnaBridge	172:65be27845400	313
AnnaBridge	172:65be27845400	314	/**
AnnaBridge	172:65be27845400	315	* @brief Switch from run main mode to low-power mode.
AnnaBridge	172:65be27845400	316	* @rmtoll CR1 LPR LL_PWR_ExitLowPowerRunMode
AnnaBridge	172:65be27845400	317	* @retval None
AnnaBridge	172:65be27845400	318	*/
AnnaBridge	172:65be27845400	319	__STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void)
AnnaBridge	172:65be27845400	320	{
AnnaBridge	172:65be27845400	321	LL_PWR_DisableLowPowerRunMode();
AnnaBridge	172:65be27845400	322	}
AnnaBridge	172:65be27845400	323
AnnaBridge	172:65be27845400	324	/**
AnnaBridge	172:65be27845400	325	* @brief Check if the regulator is in low-power mode
AnnaBridge	172:65be27845400	326	* @rmtoll CR1 LPR LL_PWR_IsEnabledLowPowerRunMode
AnnaBridge	172:65be27845400	327	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	328	*/
AnnaBridge	172:65be27845400	329	__STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void)
AnnaBridge	172:65be27845400	330	{
AnnaBridge	172:65be27845400	331	return (READ_BIT(PWR->CR1, PWR_CR1_LPR) == (PWR_CR1_LPR));
AnnaBridge	172:65be27845400	332	}
AnnaBridge	172:65be27845400	333
AnnaBridge	172:65be27845400	334	/**
AnnaBridge	172:65be27845400	335	* @brief Set the main internal regulator output voltage
AnnaBridge	172:65be27845400	336	* @note This configuration may be completed with LL_PWR_EnableRange1BoostMode() on STM32L4Rx/STM32L4Sx devices.
AnnaBridge	172:65be27845400	337	* @rmtoll CR1 VOS LL_PWR_SetRegulVoltageScaling
AnnaBridge	172:65be27845400	338	* @param VoltageScaling This parameter can be one of the following values:
AnnaBridge	172:65be27845400	339	* @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
AnnaBridge	172:65be27845400	340	* @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
AnnaBridge	172:65be27845400	341	* @retval None
AnnaBridge	172:65be27845400	342	*/
AnnaBridge	172:65be27845400	343	__STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
AnnaBridge	172:65be27845400	344	{
AnnaBridge	172:65be27845400	345	MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling);
AnnaBridge	172:65be27845400	346	}
AnnaBridge	172:65be27845400	347
AnnaBridge	172:65be27845400	348	/**
AnnaBridge	172:65be27845400	349	* @brief Get the main internal regulator output voltage
AnnaBridge	172:65be27845400	350	* @rmtoll CR1 VOS LL_PWR_GetRegulVoltageScaling
AnnaBridge	172:65be27845400	351	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	352	* @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
AnnaBridge	172:65be27845400	353	* @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
AnnaBridge	172:65be27845400	354	*/
AnnaBridge	172:65be27845400	355	__STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void)
AnnaBridge	172:65be27845400	356	{
AnnaBridge	172:65be27845400	357	return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_VOS));
AnnaBridge	172:65be27845400	358	}
AnnaBridge	172:65be27845400	359
AnnaBridge	172:65be27845400	360	#if defined(PWR_CR5_R1MODE)
AnnaBridge	172:65be27845400	361	/**
AnnaBridge	172:65be27845400	362	* @brief Enable main regulator voltage range 1 boost mode
AnnaBridge	172:65be27845400	363	* @rmtoll CR5 R1MODE LL_PWR_EnableRange1BoostMode
AnnaBridge	172:65be27845400	364	* @retval None
AnnaBridge	172:65be27845400	365	*/
AnnaBridge	172:65be27845400	366	__STATIC_INLINE void LL_PWR_EnableRange1BoostMode(void)
AnnaBridge	172:65be27845400	367	{
AnnaBridge	172:65be27845400	368	CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE);
AnnaBridge	172:65be27845400	369	}
AnnaBridge	172:65be27845400	370
AnnaBridge	172:65be27845400	371	/**
AnnaBridge	172:65be27845400	372	* @brief Disable main regulator voltage range 1 boost mode
AnnaBridge	172:65be27845400	373	* @rmtoll CR5 R1MODE LL_PWR_DisableRange1BoostMode
AnnaBridge	172:65be27845400	374	* @retval None
AnnaBridge	172:65be27845400	375	*/
AnnaBridge	172:65be27845400	376	__STATIC_INLINE void LL_PWR_DisableRange1BoostMode(void)
AnnaBridge	172:65be27845400	377	{
AnnaBridge	172:65be27845400	378	SET_BIT(PWR->CR5, PWR_CR5_R1MODE);
AnnaBridge	172:65be27845400	379	}
AnnaBridge	172:65be27845400	380
AnnaBridge	172:65be27845400	381	/**
AnnaBridge	172:65be27845400	382	* @brief Check if the main regulator voltage range 1 boost mode is enabled
AnnaBridge	172:65be27845400	383	* @rmtoll CR5 R1MODE LL_PWR_IsEnabledRange1BoostMode
AnnaBridge	172:65be27845400	384	* @retval Inverted state of bit (0 or 1).
AnnaBridge	172:65be27845400	385	*/
AnnaBridge	172:65be27845400	386	__STATIC_INLINE uint32_t LL_PWR_IsEnabledRange1BoostMode(void)
AnnaBridge	172:65be27845400	387	{
AnnaBridge	172:65be27845400	388	return (READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == RESET);
AnnaBridge	172:65be27845400	389	}
AnnaBridge	172:65be27845400	390	#endif /* PWR_CR5_R1MODE */
AnnaBridge	172:65be27845400	391
AnnaBridge	172:65be27845400	392	/**
AnnaBridge	172:65be27845400	393	* @brief Enable access to the backup domain
AnnaBridge	172:65be27845400	394	* @rmtoll CR1 DBP LL_PWR_EnableBkUpAccess
AnnaBridge	172:65be27845400	395	* @retval None
AnnaBridge	172:65be27845400	396	*/
AnnaBridge	172:65be27845400	397	__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
AnnaBridge	172:65be27845400	398	{
AnnaBridge	172:65be27845400	399	SET_BIT(PWR->CR1, PWR_CR1_DBP);
AnnaBridge	172:65be27845400	400	}
AnnaBridge	172:65be27845400	401
AnnaBridge	172:65be27845400	402	/**
AnnaBridge	172:65be27845400	403	* @brief Disable access to the backup domain
AnnaBridge	172:65be27845400	404	* @rmtoll CR1 DBP LL_PWR_DisableBkUpAccess
AnnaBridge	172:65be27845400	405	* @retval None
AnnaBridge	172:65be27845400	406	*/
AnnaBridge	172:65be27845400	407	__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
AnnaBridge	172:65be27845400	408	{
AnnaBridge	172:65be27845400	409	CLEAR_BIT(PWR->CR1, PWR_CR1_DBP);
AnnaBridge	172:65be27845400	410	}
AnnaBridge	172:65be27845400	411
AnnaBridge	172:65be27845400	412	/**
AnnaBridge	172:65be27845400	413	* @brief Check if the backup domain is enabled
AnnaBridge	172:65be27845400	414	* @rmtoll CR1 DBP LL_PWR_IsEnabledBkUpAccess
AnnaBridge	172:65be27845400	415	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	416	*/
AnnaBridge	172:65be27845400	417	__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
AnnaBridge	172:65be27845400	418	{
AnnaBridge	172:65be27845400	419	return (READ_BIT(PWR->CR1, PWR_CR1_DBP) == (PWR_CR1_DBP));
AnnaBridge	172:65be27845400	420	}
AnnaBridge	172:65be27845400	421
AnnaBridge	172:65be27845400	422	/**
AnnaBridge	172:65be27845400	423	* @brief Set Low-Power mode
AnnaBridge	172:65be27845400	424	* @rmtoll CR1 LPMS LL_PWR_SetPowerMode
AnnaBridge	172:65be27845400	425	* @param LowPowerMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	426	* @arg @ref LL_PWR_MODE_STOP0
AnnaBridge	172:65be27845400	427	* @arg @ref LL_PWR_MODE_STOP1
AnnaBridge	172:65be27845400	428	* @arg @ref LL_PWR_MODE_STOP2
AnnaBridge	172:65be27845400	429	* @arg @ref LL_PWR_MODE_STANDBY
AnnaBridge	172:65be27845400	430	* @arg @ref LL_PWR_MODE_SHUTDOWN
AnnaBridge	172:65be27845400	431	* @retval None
AnnaBridge	172:65be27845400	432	*/
AnnaBridge	172:65be27845400	433	__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t LowPowerMode)
AnnaBridge	172:65be27845400	434	{
AnnaBridge	172:65be27845400	435	MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, LowPowerMode);
AnnaBridge	172:65be27845400	436	}
AnnaBridge	172:65be27845400	437
AnnaBridge	172:65be27845400	438	/**
AnnaBridge	172:65be27845400	439	* @brief Get Low-Power mode
AnnaBridge	172:65be27845400	440	* @rmtoll CR1 LPMS LL_PWR_GetPowerMode
AnnaBridge	172:65be27845400	441	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	442	* @arg @ref LL_PWR_MODE_STOP0
AnnaBridge	172:65be27845400	443	* @arg @ref LL_PWR_MODE_STOP1
AnnaBridge	172:65be27845400	444	* @arg @ref LL_PWR_MODE_STOP2
AnnaBridge	172:65be27845400	445	* @arg @ref LL_PWR_MODE_STANDBY
AnnaBridge	172:65be27845400	446	* @arg @ref LL_PWR_MODE_SHUTDOWN
AnnaBridge	172:65be27845400	447	*/
AnnaBridge	172:65be27845400	448	__STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
AnnaBridge	172:65be27845400	449	{
AnnaBridge	172:65be27845400	450	return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_LPMS));
AnnaBridge	172:65be27845400	451	}
AnnaBridge	172:65be27845400	452
AnnaBridge	172:65be27845400	453	#if defined(PWR_CR1_RRSTP)
AnnaBridge	172:65be27845400	454	/**
AnnaBridge	172:65be27845400	455	* @brief Enable SRAM3 content retention in Stop mode
AnnaBridge	172:65be27845400	456	* @rmtoll CR1 RRSTP LL_PWR_EnableSRAM3Retention
AnnaBridge	172:65be27845400	457	* @retval None
AnnaBridge	172:65be27845400	458	*/
AnnaBridge	172:65be27845400	459	__STATIC_INLINE void LL_PWR_EnableSRAM3Retention(void)
AnnaBridge	172:65be27845400	460	{
AnnaBridge	172:65be27845400	461	SET_BIT(PWR->CR1, PWR_CR1_RRSTP);
AnnaBridge	172:65be27845400	462	}
AnnaBridge	172:65be27845400	463
AnnaBridge	172:65be27845400	464	/**
AnnaBridge	172:65be27845400	465	* @brief Disable SRAM3 content retention in Stop mode
AnnaBridge	172:65be27845400	466	* @rmtoll CR1 RRSTP LL_PWR_DisableSRAM3Retention
AnnaBridge	172:65be27845400	467	* @retval None
AnnaBridge	172:65be27845400	468	*/
AnnaBridge	172:65be27845400	469	__STATIC_INLINE void LL_PWR_DisableSRAM3Retention(void)
AnnaBridge	172:65be27845400	470	{
AnnaBridge	172:65be27845400	471	CLEAR_BIT(PWR->CR1, PWR_CR1_RRSTP);
AnnaBridge	172:65be27845400	472	}
AnnaBridge	172:65be27845400	473
AnnaBridge	172:65be27845400	474	/**
AnnaBridge	172:65be27845400	475	* @brief Check if SRAM3 content retention in Stop mode is enabled
AnnaBridge	172:65be27845400	476	* @rmtoll CR1 RRSTP LL_PWR_IsEnabledSRAM3Retention
AnnaBridge	172:65be27845400	477	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	478	*/
AnnaBridge	172:65be27845400	479	__STATIC_INLINE uint32_t LL_PWR_IsEnabledSRAM3Retention(void)
AnnaBridge	172:65be27845400	480	{
AnnaBridge	172:65be27845400	481	return (READ_BIT(PWR->CR1, PWR_CR1_RRSTP) == (PWR_CR1_RRSTP));
AnnaBridge	172:65be27845400	482	}
AnnaBridge	172:65be27845400	483	#endif /* PWR_CR1_RRSTP */
AnnaBridge	172:65be27845400	484
AnnaBridge	172:65be27845400	485	#if defined(PWR_CR3_DSIPDEN)
AnnaBridge	172:65be27845400	486	/**
AnnaBridge	172:65be27845400	487	* @brief Enable pull-down activation on DSI pins
AnnaBridge	172:65be27845400	488	* @rmtoll CR3 DSIPDEN LL_PWR_EnableDSIPinsPDActivation
AnnaBridge	172:65be27845400	489	* @retval None
AnnaBridge	172:65be27845400	490	*/
AnnaBridge	172:65be27845400	491	__STATIC_INLINE void LL_PWR_EnableDSIPinsPDActivation(void)
AnnaBridge	172:65be27845400	492	{
AnnaBridge	172:65be27845400	493	SET_BIT(PWR->CR3, PWR_CR3_DSIPDEN);
AnnaBridge	172:65be27845400	494	}
AnnaBridge	172:65be27845400	495
AnnaBridge	172:65be27845400	496	/**
AnnaBridge	172:65be27845400	497	* @brief Disable pull-down activation on DSI pins
AnnaBridge	172:65be27845400	498	* @rmtoll CR3 DSIPDEN LL_PWR_DisableDSIPinsPDActivation
AnnaBridge	172:65be27845400	499	* @retval None
AnnaBridge	172:65be27845400	500	*/
AnnaBridge	172:65be27845400	501	__STATIC_INLINE void LL_PWR_DisableDSIPinsPDActivation(void)
AnnaBridge	172:65be27845400	502	{
AnnaBridge	172:65be27845400	503	CLEAR_BIT(PWR->CR3, PWR_CR3_DSIPDEN);
AnnaBridge	172:65be27845400	504	}
AnnaBridge	172:65be27845400	505
AnnaBridge	172:65be27845400	506	/**
AnnaBridge	172:65be27845400	507	* @brief Check if pull-down activation on DSI pins is enabled
AnnaBridge	172:65be27845400	508	* @rmtoll CR3 DSIPDEN LL_PWR_IsEnabledDSIPinsPDActivation
AnnaBridge	172:65be27845400	509	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	510	*/
AnnaBridge	172:65be27845400	511	__STATIC_INLINE uint32_t LL_PWR_IsEnabledDSIPinsPDActivation(void)
AnnaBridge	172:65be27845400	512	{
AnnaBridge	172:65be27845400	513	return (READ_BIT(PWR->CR3, PWR_CR3_DSIPDEN) == (PWR_CR3_DSIPDEN));
AnnaBridge	172:65be27845400	514	}
AnnaBridge	172:65be27845400	515	#endif /* PWR_CR3_DSIPDEN */
AnnaBridge	172:65be27845400	516
AnnaBridge	172:65be27845400	517	#if defined(PWR_CR2_PVME1)
AnnaBridge	172:65be27845400	518	/**
AnnaBridge	172:65be27845400	519	* @brief Enable VDDUSB supply
AnnaBridge	172:65be27845400	520	* @rmtoll CR2 USV LL_PWR_EnableVddUSB
AnnaBridge	172:65be27845400	521	* @retval None
AnnaBridge	172:65be27845400	522	*/
AnnaBridge	172:65be27845400	523	__STATIC_INLINE void LL_PWR_EnableVddUSB(void)
AnnaBridge	172:65be27845400	524	{
AnnaBridge	172:65be27845400	525	SET_BIT(PWR->CR2, PWR_CR2_USV);
AnnaBridge	172:65be27845400	526	}
AnnaBridge	172:65be27845400	527
AnnaBridge	172:65be27845400	528	/**
AnnaBridge	172:65be27845400	529	* @brief Disable VDDUSB supply
AnnaBridge	172:65be27845400	530	* @rmtoll CR2 USV LL_PWR_DisableVddUSB
AnnaBridge	172:65be27845400	531	* @retval None
AnnaBridge	172:65be27845400	532	*/
AnnaBridge	172:65be27845400	533	__STATIC_INLINE void LL_PWR_DisableVddUSB(void)
AnnaBridge	172:65be27845400	534	{
AnnaBridge	172:65be27845400	535	CLEAR_BIT(PWR->CR2, PWR_CR2_USV);
AnnaBridge	172:65be27845400	536	}
AnnaBridge	172:65be27845400	537
AnnaBridge	172:65be27845400	538	/**
AnnaBridge	172:65be27845400	539	* @brief Check if VDDUSB supply is enabled
AnnaBridge	172:65be27845400	540	* @rmtoll CR2 USV LL_PWR_IsEnabledVddUSB
AnnaBridge	172:65be27845400	541	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	542	*/
AnnaBridge	172:65be27845400	543	__STATIC_INLINE uint32_t LL_PWR_IsEnabledVddUSB(void)
AnnaBridge	172:65be27845400	544	{
AnnaBridge	172:65be27845400	545	return (READ_BIT(PWR->CR2, PWR_CR2_USV) == (PWR_CR2_USV));
AnnaBridge	172:65be27845400	546	}
AnnaBridge	172:65be27845400	547	#endif
AnnaBridge	172:65be27845400	548
AnnaBridge	172:65be27845400	549	#if defined(PWR_CR2_IOSV)
AnnaBridge	172:65be27845400	550	/**
AnnaBridge	172:65be27845400	551	* @brief Enable VDDIO2 supply
AnnaBridge	172:65be27845400	552	* @rmtoll CR2 IOSV LL_PWR_EnableVddIO2
AnnaBridge	172:65be27845400	553	* @retval None
AnnaBridge	172:65be27845400	554	*/
AnnaBridge	172:65be27845400	555	__STATIC_INLINE void LL_PWR_EnableVddIO2(void)
AnnaBridge	172:65be27845400	556	{
AnnaBridge	172:65be27845400	557	SET_BIT(PWR->CR2, PWR_CR2_IOSV);
AnnaBridge	172:65be27845400	558	}
AnnaBridge	172:65be27845400	559
AnnaBridge	172:65be27845400	560	/**
AnnaBridge	172:65be27845400	561	* @brief Disable VDDIO2 supply
AnnaBridge	172:65be27845400	562	* @rmtoll CR2 IOSV LL_PWR_DisableVddIO2
AnnaBridge	172:65be27845400	563	* @retval None
AnnaBridge	172:65be27845400	564	*/
AnnaBridge	172:65be27845400	565	__STATIC_INLINE void LL_PWR_DisableVddIO2(void)
AnnaBridge	172:65be27845400	566	{
AnnaBridge	172:65be27845400	567	CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV);
AnnaBridge	172:65be27845400	568	}
AnnaBridge	172:65be27845400	569
AnnaBridge	172:65be27845400	570	/**
AnnaBridge	172:65be27845400	571	* @brief Check if VDDIO2 supply is enabled
AnnaBridge	172:65be27845400	572	* @rmtoll CR2 IOSV LL_PWR_IsEnabledVddIO2
AnnaBridge	172:65be27845400	573	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	574	*/
AnnaBridge	172:65be27845400	575	__STATIC_INLINE uint32_t LL_PWR_IsEnabledVddIO2(void)
AnnaBridge	172:65be27845400	576	{
AnnaBridge	172:65be27845400	577	return (READ_BIT(PWR->CR2, PWR_CR2_IOSV) == (PWR_CR2_IOSV));
AnnaBridge	172:65be27845400	578	}
AnnaBridge	172:65be27845400	579	#endif
AnnaBridge	172:65be27845400	580
AnnaBridge	172:65be27845400	581	/**
AnnaBridge	172:65be27845400	582	* @brief Enable the Power Voltage Monitoring on a peripheral
AnnaBridge	172:65be27845400	583	* @rmtoll CR2 PVME1 LL_PWR_EnablePVM\n
AnnaBridge	172:65be27845400	584	* CR2 PVME2 LL_PWR_EnablePVM\n
AnnaBridge	172:65be27845400	585	* CR2 PVME3 LL_PWR_EnablePVM\n
AnnaBridge	172:65be27845400	586	* CR2 PVME4 LL_PWR_EnablePVM
AnnaBridge	172:65be27845400	587	* @param PeriphVoltage This parameter can be one of the following values:
AnnaBridge	172:65be27845400	588	* @arg @ref LL_PWR_PVM_VDDUSB_1_2V (*)
AnnaBridge	172:65be27845400	589	* @arg @ref LL_PWR_PVM_VDDIO2_0_9V (*)
AnnaBridge	172:65be27845400	590	* @arg @ref LL_PWR_PVM_VDDA_1_62V
AnnaBridge	172:65be27845400	591	* @arg @ref LL_PWR_PVM_VDDA_2_2V
AnnaBridge	172:65be27845400	592	*
AnnaBridge	172:65be27845400	593	* (*) value not defined in all devices
AnnaBridge	172:65be27845400	594	* @retval None
AnnaBridge	172:65be27845400	595	*/
AnnaBridge	172:65be27845400	596	__STATIC_INLINE void LL_PWR_EnablePVM(uint32_t PeriphVoltage)
AnnaBridge	172:65be27845400	597	{
AnnaBridge	172:65be27845400	598	SET_BIT(PWR->CR2, PeriphVoltage);
AnnaBridge	172:65be27845400	599	}
AnnaBridge	172:65be27845400	600
AnnaBridge	172:65be27845400	601	/**
AnnaBridge	172:65be27845400	602	* @brief Disable the Power Voltage Monitoring on a peripheral
AnnaBridge	172:65be27845400	603	* @rmtoll CR2 PVME1 LL_PWR_DisablePVM\n
AnnaBridge	172:65be27845400	604	* CR2 PVME2 LL_PWR_DisablePVM\n
AnnaBridge	172:65be27845400	605	* CR2 PVME3 LL_PWR_DisablePVM\n
AnnaBridge	172:65be27845400	606	* CR2 PVME4 LL_PWR_DisablePVM
AnnaBridge	172:65be27845400	607	* @param PeriphVoltage This parameter can be one of the following values:
AnnaBridge	172:65be27845400	608	* @arg @ref LL_PWR_PVM_VDDUSB_1_2V (*)
AnnaBridge	172:65be27845400	609	* @arg @ref LL_PWR_PVM_VDDIO2_0_9V (*)
AnnaBridge	172:65be27845400	610	* @arg @ref LL_PWR_PVM_VDDA_1_62V
AnnaBridge	172:65be27845400	611	* @arg @ref LL_PWR_PVM_VDDA_2_2V
AnnaBridge	172:65be27845400	612	*
AnnaBridge	172:65be27845400	613	* (*) value not defined in all devices
AnnaBridge	172:65be27845400	614	* @retval None
AnnaBridge	172:65be27845400	615	*/
AnnaBridge	172:65be27845400	616	__STATIC_INLINE void LL_PWR_DisablePVM(uint32_t PeriphVoltage)
AnnaBridge	172:65be27845400	617	{
AnnaBridge	172:65be27845400	618	CLEAR_BIT(PWR->CR2, PeriphVoltage);
AnnaBridge	172:65be27845400	619	}
AnnaBridge	172:65be27845400	620
AnnaBridge	172:65be27845400	621	/**
AnnaBridge	172:65be27845400	622	* @brief Check if Power Voltage Monitoring is enabled on a peripheral
AnnaBridge	172:65be27845400	623	* @rmtoll CR2 PVME1 LL_PWR_IsEnabledPVM\n
AnnaBridge	172:65be27845400	624	* CR2 PVME2 LL_PWR_IsEnabledPVM\n
AnnaBridge	172:65be27845400	625	* CR2 PVME3 LL_PWR_IsEnabledPVM\n
AnnaBridge	172:65be27845400	626	* CR2 PVME4 LL_PWR_IsEnabledPVM
AnnaBridge	172:65be27845400	627	* @param PeriphVoltage This parameter can be one of the following values:
AnnaBridge	172:65be27845400	628	* @arg @ref LL_PWR_PVM_VDDUSB_1_2V (*)
AnnaBridge	172:65be27845400	629	* @arg @ref LL_PWR_PVM_VDDIO2_0_9V (*)
AnnaBridge	172:65be27845400	630	* @arg @ref LL_PWR_PVM_VDDA_1_62V
AnnaBridge	172:65be27845400	631	* @arg @ref LL_PWR_PVM_VDDA_2_2V
AnnaBridge	172:65be27845400	632	*
AnnaBridge	172:65be27845400	633	* (*) value not defined in all devices
AnnaBridge	172:65be27845400	634	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	635	*/
AnnaBridge	172:65be27845400	636	__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVM(uint32_t PeriphVoltage)
AnnaBridge	172:65be27845400	637	{
AnnaBridge	172:65be27845400	638	return (READ_BIT(PWR->CR2, PeriphVoltage) == (PeriphVoltage));
AnnaBridge	172:65be27845400	639	}
AnnaBridge	172:65be27845400	640
AnnaBridge	172:65be27845400	641	/**
AnnaBridge	172:65be27845400	642	* @brief Configure the voltage threshold detected by the Power Voltage Detector
AnnaBridge	172:65be27845400	643	* @rmtoll CR2 PLS LL_PWR_SetPVDLevel
AnnaBridge	172:65be27845400	644	* @param PVDLevel This parameter can be one of the following values:
AnnaBridge	172:65be27845400	645	* @arg @ref LL_PWR_PVDLEVEL_0
AnnaBridge	172:65be27845400	646	* @arg @ref LL_PWR_PVDLEVEL_1
AnnaBridge	172:65be27845400	647	* @arg @ref LL_PWR_PVDLEVEL_2
AnnaBridge	172:65be27845400	648	* @arg @ref LL_PWR_PVDLEVEL_3
AnnaBridge	172:65be27845400	649	* @arg @ref LL_PWR_PVDLEVEL_4
AnnaBridge	172:65be27845400	650	* @arg @ref LL_PWR_PVDLEVEL_5
AnnaBridge	172:65be27845400	651	* @arg @ref LL_PWR_PVDLEVEL_6
AnnaBridge	172:65be27845400	652	* @arg @ref LL_PWR_PVDLEVEL_7
AnnaBridge	172:65be27845400	653	* @retval None
AnnaBridge	172:65be27845400	654	*/
AnnaBridge	172:65be27845400	655	__STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
AnnaBridge	172:65be27845400	656	{
AnnaBridge	172:65be27845400	657	MODIFY_REG(PWR->CR2, PWR_CR2_PLS, PVDLevel);
AnnaBridge	172:65be27845400	658	}
AnnaBridge	172:65be27845400	659
AnnaBridge	172:65be27845400	660	/**
AnnaBridge	172:65be27845400	661	* @brief Get the voltage threshold detection
AnnaBridge	172:65be27845400	662	* @rmtoll CR2 PLS LL_PWR_GetPVDLevel
AnnaBridge	172:65be27845400	663	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	664	* @arg @ref LL_PWR_PVDLEVEL_0
AnnaBridge	172:65be27845400	665	* @arg @ref LL_PWR_PVDLEVEL_1
AnnaBridge	172:65be27845400	666	* @arg @ref LL_PWR_PVDLEVEL_2
AnnaBridge	172:65be27845400	667	* @arg @ref LL_PWR_PVDLEVEL_3
AnnaBridge	172:65be27845400	668	* @arg @ref LL_PWR_PVDLEVEL_4
AnnaBridge	172:65be27845400	669	* @arg @ref LL_PWR_PVDLEVEL_5
AnnaBridge	172:65be27845400	670	* @arg @ref LL_PWR_PVDLEVEL_6
AnnaBridge	172:65be27845400	671	* @arg @ref LL_PWR_PVDLEVEL_7
AnnaBridge	172:65be27845400	672	*/
AnnaBridge	172:65be27845400	673	__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
AnnaBridge	172:65be27845400	674	{
AnnaBridge	172:65be27845400	675	return (uint32_t)(READ_BIT(PWR->CR2, PWR_CR2_PLS));
AnnaBridge	172:65be27845400	676	}
AnnaBridge	172:65be27845400	677
AnnaBridge	172:65be27845400	678	/**
AnnaBridge	172:65be27845400	679	* @brief Enable Power Voltage Detector
AnnaBridge	172:65be27845400	680	* @rmtoll CR2 PVDE LL_PWR_EnablePVD
AnnaBridge	172:65be27845400	681	* @retval None
AnnaBridge	172:65be27845400	682	*/
AnnaBridge	172:65be27845400	683	__STATIC_INLINE void LL_PWR_EnablePVD(void)
AnnaBridge	172:65be27845400	684	{
AnnaBridge	172:65be27845400	685	SET_BIT(PWR->CR2, PWR_CR2_PVDE);
AnnaBridge	172:65be27845400	686	}
AnnaBridge	172:65be27845400	687
AnnaBridge	172:65be27845400	688	/**
AnnaBridge	172:65be27845400	689	* @brief Disable Power Voltage Detector
AnnaBridge	172:65be27845400	690	* @rmtoll CR2 PVDE LL_PWR_DisablePVD
AnnaBridge	172:65be27845400	691	* @retval None
AnnaBridge	172:65be27845400	692	*/
AnnaBridge	172:65be27845400	693	__STATIC_INLINE void LL_PWR_DisablePVD(void)
AnnaBridge	172:65be27845400	694	{
AnnaBridge	172:65be27845400	695	CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE);
AnnaBridge	172:65be27845400	696	}
AnnaBridge	172:65be27845400	697
AnnaBridge	172:65be27845400	698	/**
AnnaBridge	172:65be27845400	699	* @brief Check if Power Voltage Detector is enabled
AnnaBridge	172:65be27845400	700	* @rmtoll CR2 PVDE LL_PWR_IsEnabledPVD
AnnaBridge	172:65be27845400	701	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	702	*/
AnnaBridge	172:65be27845400	703	__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
AnnaBridge	172:65be27845400	704	{
AnnaBridge	172:65be27845400	705	return (READ_BIT(PWR->CR2, PWR_CR2_PVDE) == (PWR_CR2_PVDE));
AnnaBridge	172:65be27845400	706	}
AnnaBridge	172:65be27845400	707
AnnaBridge	172:65be27845400	708	/**
AnnaBridge	172:65be27845400	709	* @brief Enable Internal Wake-up line
AnnaBridge	172:65be27845400	710	* @rmtoll CR3 EIWF LL_PWR_EnableInternWU
AnnaBridge	172:65be27845400	711	* @retval None
AnnaBridge	172:65be27845400	712	*/
AnnaBridge	172:65be27845400	713	__STATIC_INLINE void LL_PWR_EnableInternWU(void)
AnnaBridge	172:65be27845400	714	{
AnnaBridge	172:65be27845400	715	SET_BIT(PWR->CR3, PWR_CR3_EIWF);
AnnaBridge	172:65be27845400	716	}
AnnaBridge	172:65be27845400	717
AnnaBridge	172:65be27845400	718	/**
AnnaBridge	172:65be27845400	719	* @brief Disable Internal Wake-up line
AnnaBridge	172:65be27845400	720	* @rmtoll CR3 EIWF LL_PWR_DisableInternWU
AnnaBridge	172:65be27845400	721	* @retval None
AnnaBridge	172:65be27845400	722	*/
AnnaBridge	172:65be27845400	723	__STATIC_INLINE void LL_PWR_DisableInternWU(void)
AnnaBridge	172:65be27845400	724	{
AnnaBridge	172:65be27845400	725	CLEAR_BIT(PWR->CR3, PWR_CR3_EIWF);
AnnaBridge	172:65be27845400	726	}
AnnaBridge	172:65be27845400	727
AnnaBridge	172:65be27845400	728	/**
AnnaBridge	172:65be27845400	729	* @brief Check if Internal Wake-up line is enabled
AnnaBridge	172:65be27845400	730	* @rmtoll CR3 EIWF LL_PWR_IsEnabledInternWU
AnnaBridge	172:65be27845400	731	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	732	*/
AnnaBridge	172:65be27845400	733	__STATIC_INLINE uint32_t LL_PWR_IsEnabledInternWU(void)
AnnaBridge	172:65be27845400	734	{
AnnaBridge	172:65be27845400	735	return (READ_BIT(PWR->CR3, PWR_CR3_EIWF) == (PWR_CR3_EIWF));
AnnaBridge	172:65be27845400	736	}
AnnaBridge	172:65be27845400	737
AnnaBridge	172:65be27845400	738	/**
AnnaBridge	172:65be27845400	739	* @brief Enable pull-up and pull-down configuration
AnnaBridge	172:65be27845400	740	* @rmtoll CR3 APC LL_PWR_EnablePUPDCfg
AnnaBridge	172:65be27845400	741	* @retval None
AnnaBridge	172:65be27845400	742	*/
AnnaBridge	172:65be27845400	743	__STATIC_INLINE void LL_PWR_EnablePUPDCfg(void)
AnnaBridge	172:65be27845400	744	{
AnnaBridge	172:65be27845400	745	SET_BIT(PWR->CR3, PWR_CR3_APC);
AnnaBridge	172:65be27845400	746	}
AnnaBridge	172:65be27845400	747
AnnaBridge	172:65be27845400	748	/**
AnnaBridge	172:65be27845400	749	* @brief Disable pull-up and pull-down configuration
AnnaBridge	172:65be27845400	750	* @rmtoll CR3 APC LL_PWR_DisablePUPDCfg
AnnaBridge	172:65be27845400	751	* @retval None
AnnaBridge	172:65be27845400	752	*/
AnnaBridge	172:65be27845400	753	__STATIC_INLINE void LL_PWR_DisablePUPDCfg(void)
AnnaBridge	172:65be27845400	754	{
AnnaBridge	172:65be27845400	755	CLEAR_BIT(PWR->CR3, PWR_CR3_APC);
AnnaBridge	172:65be27845400	756	}
AnnaBridge	172:65be27845400	757
AnnaBridge	172:65be27845400	758	/**
AnnaBridge	172:65be27845400	759	* @brief Check if pull-up and pull-down configuration is enabled
AnnaBridge	172:65be27845400	760	* @rmtoll CR3 APC LL_PWR_IsEnabledPUPDCfg
AnnaBridge	172:65be27845400	761	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	762	*/
AnnaBridge	172:65be27845400	763	__STATIC_INLINE uint32_t LL_PWR_IsEnabledPUPDCfg(void)
AnnaBridge	172:65be27845400	764	{
AnnaBridge	172:65be27845400	765	return (READ_BIT(PWR->CR3, PWR_CR3_APC) == (PWR_CR3_APC));
AnnaBridge	172:65be27845400	766	}
AnnaBridge	172:65be27845400	767
AnnaBridge	172:65be27845400	768	#if defined(PWR_CR3_DSIPDEN)
AnnaBridge	172:65be27845400	769	/**
AnnaBridge	172:65be27845400	770	* @brief Enable pull-down activation on DSI pins
AnnaBridge	172:65be27845400	771	* @rmtoll CR3 DSIPDEN LL_PWR_EnableDSIPullDown
AnnaBridge	172:65be27845400	772	* @retval None
AnnaBridge	172:65be27845400	773	*/
AnnaBridge	172:65be27845400	774	__STATIC_INLINE void LL_PWR_EnableDSIPullDown(void)
AnnaBridge	172:65be27845400	775	{
AnnaBridge	172:65be27845400	776	SET_BIT(PWR->CR3, PWR_CR3_DSIPDEN);
AnnaBridge	172:65be27845400	777	}
AnnaBridge	172:65be27845400	778
AnnaBridge	172:65be27845400	779	/**
AnnaBridge	172:65be27845400	780	* @brief Disable pull-down activation on DSI pins
AnnaBridge	172:65be27845400	781	* @rmtoll CR3 DSIPDEN LL_PWR_DisableDSIPullDown
AnnaBridge	172:65be27845400	782	* @retval None
AnnaBridge	172:65be27845400	783	*/
AnnaBridge	172:65be27845400	784	__STATIC_INLINE void LL_PWR_DisableDSIPullDown(void)
AnnaBridge	172:65be27845400	785	{
AnnaBridge	172:65be27845400	786	CLEAR_BIT(PWR->CR3, PWR_CR3_DSIPDEN);
AnnaBridge	172:65be27845400	787	}
AnnaBridge	172:65be27845400	788
AnnaBridge	172:65be27845400	789	/**
AnnaBridge	172:65be27845400	790	* @brief Check if pull-down activation on DSI pins is enabled
AnnaBridge	172:65be27845400	791	* @rmtoll CR3 DSIPDEN LL_PWR_IsEnabledDSIPullDown
AnnaBridge	172:65be27845400	792	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	793	*/
AnnaBridge	172:65be27845400	794	__STATIC_INLINE uint32_t LL_PWR_IsEnabledDSIPullDown(void)
AnnaBridge	172:65be27845400	795	{
AnnaBridge	172:65be27845400	796	return (READ_BIT(PWR->CR3, PWR_CR3_DSIPDEN) == (PWR_CR3_DSIPDEN));
AnnaBridge	172:65be27845400	797	}
AnnaBridge	172:65be27845400	798	#endif /* PWR_CR3_DSIPDEN */
AnnaBridge	172:65be27845400	799
AnnaBridge	172:65be27845400	800	/**
AnnaBridge	172:65be27845400	801	* @brief Enable SRAM2 content retention in Standby mode
AnnaBridge	172:65be27845400	802	* @rmtoll CR3 RRS LL_PWR_EnableSRAM2Retention
AnnaBridge	172:65be27845400	803	* @retval None
AnnaBridge	172:65be27845400	804	*/
AnnaBridge	172:65be27845400	805	__STATIC_INLINE void LL_PWR_EnableSRAM2Retention(void)
AnnaBridge	172:65be27845400	806	{
AnnaBridge	172:65be27845400	807	SET_BIT(PWR->CR3, PWR_CR3_RRS);
AnnaBridge	172:65be27845400	808	}
AnnaBridge	172:65be27845400	809
AnnaBridge	172:65be27845400	810	/**
AnnaBridge	172:65be27845400	811	* @brief Disable SRAM2 content retention in Standby mode
AnnaBridge	172:65be27845400	812	* @rmtoll CR3 RRS LL_PWR_DisableSRAM2Retention
AnnaBridge	172:65be27845400	813	* @retval None
AnnaBridge	172:65be27845400	814	*/
AnnaBridge	172:65be27845400	815	__STATIC_INLINE void LL_PWR_DisableSRAM2Retention(void)
AnnaBridge	172:65be27845400	816	{
AnnaBridge	172:65be27845400	817	CLEAR_BIT(PWR->CR3, PWR_CR3_RRS);
AnnaBridge	172:65be27845400	818	}
AnnaBridge	172:65be27845400	819
AnnaBridge	172:65be27845400	820	/**
AnnaBridge	172:65be27845400	821	* @brief Check if SRAM2 content retention in Standby mode is enabled
AnnaBridge	172:65be27845400	822	* @rmtoll CR3 RRS LL_PWR_IsEnabledSRAM2Retention
AnnaBridge	172:65be27845400	823	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	824	*/
AnnaBridge	172:65be27845400	825	__STATIC_INLINE uint32_t LL_PWR_IsEnabledSRAM2Retention(void)
AnnaBridge	172:65be27845400	826	{
AnnaBridge	172:65be27845400	827	return (READ_BIT(PWR->CR3, PWR_CR3_RRS) == (PWR_CR3_RRS));
AnnaBridge	172:65be27845400	828	}
AnnaBridge	172:65be27845400	829
AnnaBridge	172:65be27845400	830	/**
AnnaBridge	172:65be27845400	831	* @brief Enable the WakeUp PINx functionality
AnnaBridge	172:65be27845400	832	* @rmtoll CR3 EWUP1 LL_PWR_EnableWakeUpPin\n
AnnaBridge	172:65be27845400	833	* CR3 EWUP2 LL_PWR_EnableWakeUpPin\n
AnnaBridge	172:65be27845400	834	* CR3 EWUP3 LL_PWR_EnableWakeUpPin\n
AnnaBridge	172:65be27845400	835	* CR3 EWUP4 LL_PWR_EnableWakeUpPin\n
AnnaBridge	172:65be27845400	836	* CR3 EWUP5 LL_PWR_EnableWakeUpPin\n
AnnaBridge	172:65be27845400	837	* @param WakeUpPin This parameter can be one of the following values:
AnnaBridge	172:65be27845400	838	* @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge	172:65be27845400	839	* @arg @ref LL_PWR_WAKEUP_PIN2
AnnaBridge	172:65be27845400	840	* @arg @ref LL_PWR_WAKEUP_PIN3
AnnaBridge	172:65be27845400	841	* @arg @ref LL_PWR_WAKEUP_PIN4
AnnaBridge	172:65be27845400	842	* @arg @ref LL_PWR_WAKEUP_PIN5
AnnaBridge	172:65be27845400	843	* @retval None
AnnaBridge	172:65be27845400	844	*/
AnnaBridge	172:65be27845400	845	__STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
AnnaBridge	172:65be27845400	846	{
AnnaBridge	172:65be27845400	847	SET_BIT(PWR->CR3, WakeUpPin);
AnnaBridge	172:65be27845400	848	}
AnnaBridge	172:65be27845400	849
AnnaBridge	172:65be27845400	850	/**
AnnaBridge	172:65be27845400	851	* @brief Disable the WakeUp PINx functionality
AnnaBridge	172:65be27845400	852	* @rmtoll CR3 EWUP1 LL_PWR_DisableWakeUpPin\n
AnnaBridge	172:65be27845400	853	* CR3 EWUP2 LL_PWR_DisableWakeUpPin\n
AnnaBridge	172:65be27845400	854	* CR3 EWUP3 LL_PWR_DisableWakeUpPin\n
AnnaBridge	172:65be27845400	855	* CR3 EWUP4 LL_PWR_DisableWakeUpPin\n
AnnaBridge	172:65be27845400	856	* CR3 EWUP5 LL_PWR_DisableWakeUpPin\n
AnnaBridge	172:65be27845400	857	* @param WakeUpPin This parameter can be one of the following values:
AnnaBridge	172:65be27845400	858	* @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge	172:65be27845400	859	* @arg @ref LL_PWR_WAKEUP_PIN2
AnnaBridge	172:65be27845400	860	* @arg @ref LL_PWR_WAKEUP_PIN3
AnnaBridge	172:65be27845400	861	* @arg @ref LL_PWR_WAKEUP_PIN4
AnnaBridge	172:65be27845400	862	* @arg @ref LL_PWR_WAKEUP_PIN5
AnnaBridge	172:65be27845400	863	* @retval None
AnnaBridge	172:65be27845400	864	*/
AnnaBridge	172:65be27845400	865	__STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
AnnaBridge	172:65be27845400	866	{
AnnaBridge	172:65be27845400	867	CLEAR_BIT(PWR->CR3, WakeUpPin);
AnnaBridge	172:65be27845400	868	}
AnnaBridge	172:65be27845400	869
AnnaBridge	172:65be27845400	870	/**
AnnaBridge	172:65be27845400	871	* @brief Check if the WakeUp PINx functionality is enabled
AnnaBridge	172:65be27845400	872	* @rmtoll CR3 EWUP1 LL_PWR_IsEnabledWakeUpPin\n
AnnaBridge	172:65be27845400	873	* CR3 EWUP2 LL_PWR_IsEnabledWakeUpPin\n
AnnaBridge	172:65be27845400	874	* CR3 EWUP3 LL_PWR_IsEnabledWakeUpPin\n
AnnaBridge	172:65be27845400	875	* CR3 EWUP4 LL_PWR_IsEnabledWakeUpPin\n
AnnaBridge	172:65be27845400	876	* CR3 EWUP5 LL_PWR_IsEnabledWakeUpPin\n
AnnaBridge	172:65be27845400	877	* @param WakeUpPin This parameter can be one of the following values:
AnnaBridge	172:65be27845400	878	* @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge	172:65be27845400	879	* @arg @ref LL_PWR_WAKEUP_PIN2
AnnaBridge	172:65be27845400	880	* @arg @ref LL_PWR_WAKEUP_PIN3
AnnaBridge	172:65be27845400	881	* @arg @ref LL_PWR_WAKEUP_PIN4
AnnaBridge	172:65be27845400	882	* @arg @ref LL_PWR_WAKEUP_PIN5
AnnaBridge	172:65be27845400	883	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	884	*/
AnnaBridge	172:65be27845400	885	__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
AnnaBridge	172:65be27845400	886	{
AnnaBridge	172:65be27845400	887	return (READ_BIT(PWR->CR3, WakeUpPin) == (WakeUpPin));
AnnaBridge	172:65be27845400	888	}
AnnaBridge	172:65be27845400	889
AnnaBridge	172:65be27845400	890	/**
AnnaBridge	172:65be27845400	891	* @brief Set the resistor impedance
AnnaBridge	172:65be27845400	892	* @rmtoll CR4 VBRS LL_PWR_SetBattChargResistor
AnnaBridge	172:65be27845400	893	* @param Resistor This parameter can be one of the following values:
AnnaBridge	172:65be27845400	894	* @arg @ref LL_PWR_BATT_CHARG_RESISTOR_5K
AnnaBridge	172:65be27845400	895	* @arg @ref LL_PWR_BATT_CHARGRESISTOR_1_5K
AnnaBridge	172:65be27845400	896	* @retval None
AnnaBridge	172:65be27845400	897	*/
AnnaBridge	172:65be27845400	898	__STATIC_INLINE void LL_PWR_SetBattChargResistor(uint32_t Resistor)
AnnaBridge	172:65be27845400	899	{
AnnaBridge	172:65be27845400	900	MODIFY_REG(PWR->CR4, PWR_CR4_VBRS, Resistor);
AnnaBridge	172:65be27845400	901	}
AnnaBridge	172:65be27845400	902
AnnaBridge	172:65be27845400	903	/**
AnnaBridge	172:65be27845400	904	* @brief Get the resistor impedance
AnnaBridge	172:65be27845400	905	* @rmtoll CR4 VBRS LL_PWR_GetBattChargResistor
AnnaBridge	172:65be27845400	906	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	907	* @arg @ref LL_PWR_BATT_CHARG_RESISTOR_5K
AnnaBridge	172:65be27845400	908	* @arg @ref LL_PWR_BATT_CHARGRESISTOR_1_5K
AnnaBridge	172:65be27845400	909	*/
AnnaBridge	172:65be27845400	910	__STATIC_INLINE uint32_t LL_PWR_GetBattChargResistor(void)
AnnaBridge	172:65be27845400	911	{
AnnaBridge	172:65be27845400	912	return (uint32_t)(READ_BIT(PWR->CR4, PWR_CR4_VBRS));
AnnaBridge	172:65be27845400	913	}
AnnaBridge	172:65be27845400	914
AnnaBridge	172:65be27845400	915	/**
AnnaBridge	172:65be27845400	916	* @brief Enable battery charging
AnnaBridge	172:65be27845400	917	* @rmtoll CR4 VBE LL_PWR_EnableBatteryCharging
AnnaBridge	172:65be27845400	918	* @retval None
AnnaBridge	172:65be27845400	919	*/
AnnaBridge	172:65be27845400	920	__STATIC_INLINE void LL_PWR_EnableBatteryCharging(void)
AnnaBridge	172:65be27845400	921	{
AnnaBridge	172:65be27845400	922	SET_BIT(PWR->CR4, PWR_CR4_VBE);
AnnaBridge	172:65be27845400	923	}
AnnaBridge	172:65be27845400	924
AnnaBridge	172:65be27845400	925	/**
AnnaBridge	172:65be27845400	926	* @brief Disable battery charging
AnnaBridge	172:65be27845400	927	* @rmtoll CR4 VBE LL_PWR_DisableBatteryCharging
AnnaBridge	172:65be27845400	928	* @retval None
AnnaBridge	172:65be27845400	929	*/
AnnaBridge	172:65be27845400	930	__STATIC_INLINE void LL_PWR_DisableBatteryCharging(void)
AnnaBridge	172:65be27845400	931	{
AnnaBridge	172:65be27845400	932	CLEAR_BIT(PWR->CR4, PWR_CR4_VBE);
AnnaBridge	172:65be27845400	933	}
AnnaBridge	172:65be27845400	934
AnnaBridge	172:65be27845400	935	/**
AnnaBridge	172:65be27845400	936	* @brief Check if battery charging is enabled
AnnaBridge	172:65be27845400	937	* @rmtoll CR4 VBE LL_PWR_IsEnabledBatteryCharging
AnnaBridge	172:65be27845400	938	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	939	*/
AnnaBridge	172:65be27845400	940	__STATIC_INLINE uint32_t LL_PWR_IsEnabledBatteryCharging(void)
AnnaBridge	172:65be27845400	941	{
AnnaBridge	172:65be27845400	942	return (READ_BIT(PWR->CR4, PWR_CR4_VBE) == (PWR_CR4_VBE));
AnnaBridge	172:65be27845400	943	}
AnnaBridge	172:65be27845400	944
AnnaBridge	172:65be27845400	945	/**
AnnaBridge	172:65be27845400	946	* @brief Set the Wake-Up pin polarity low for the event detection
AnnaBridge	172:65be27845400	947	* @rmtoll CR4 WP1 LL_PWR_SetWakeUpPinPolarityLow\n
AnnaBridge	172:65be27845400	948	* CR4 WP2 LL_PWR_SetWakeUpPinPolarityLow\n
AnnaBridge	172:65be27845400	949	* CR4 WP3 LL_PWR_SetWakeUpPinPolarityLow\n
AnnaBridge	172:65be27845400	950	* CR4 WP4 LL_PWR_SetWakeUpPinPolarityLow\n
AnnaBridge	172:65be27845400	951	* CR4 WP5 LL_PWR_SetWakeUpPinPolarityLow
AnnaBridge	172:65be27845400	952	* @param WakeUpPin This parameter can be one of the following values:
AnnaBridge	172:65be27845400	953	* @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge	172:65be27845400	954	* @arg @ref LL_PWR_WAKEUP_PIN2
AnnaBridge	172:65be27845400	955	* @arg @ref LL_PWR_WAKEUP_PIN3
AnnaBridge	172:65be27845400	956	* @arg @ref LL_PWR_WAKEUP_PIN4
AnnaBridge	172:65be27845400	957	* @arg @ref LL_PWR_WAKEUP_PIN5
AnnaBridge	172:65be27845400	958	* @retval None
AnnaBridge	172:65be27845400	959	*/
AnnaBridge	172:65be27845400	960	__STATIC_INLINE void LL_PWR_SetWakeUpPinPolarityLow(uint32_t WakeUpPin)
AnnaBridge	172:65be27845400	961	{
AnnaBridge	172:65be27845400	962	SET_BIT(PWR->CR4, WakeUpPin);
AnnaBridge	172:65be27845400	963	}
AnnaBridge	172:65be27845400	964
AnnaBridge	172:65be27845400	965	/**
AnnaBridge	172:65be27845400	966	* @brief Set the Wake-Up pin polarity high for the event detection
AnnaBridge	172:65be27845400	967	* @rmtoll CR4 WP1 LL_PWR_SetWakeUpPinPolarityHigh\n
AnnaBridge	172:65be27845400	968	* CR4 WP2 LL_PWR_SetWakeUpPinPolarityHigh\n
AnnaBridge	172:65be27845400	969	* CR4 WP3 LL_PWR_SetWakeUpPinPolarityHigh\n
AnnaBridge	172:65be27845400	970	* CR4 WP4 LL_PWR_SetWakeUpPinPolarityHigh\n
AnnaBridge	172:65be27845400	971	* CR4 WP5 LL_PWR_SetWakeUpPinPolarityHigh
AnnaBridge	172:65be27845400	972	* @param WakeUpPin This parameter can be one of the following values:
AnnaBridge	172:65be27845400	973	* @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge	172:65be27845400	974	* @arg @ref LL_PWR_WAKEUP_PIN2
AnnaBridge	172:65be27845400	975	* @arg @ref LL_PWR_WAKEUP_PIN3
AnnaBridge	172:65be27845400	976	* @arg @ref LL_PWR_WAKEUP_PIN4
AnnaBridge	172:65be27845400	977	* @arg @ref LL_PWR_WAKEUP_PIN5
AnnaBridge	172:65be27845400	978	* @retval None
AnnaBridge	172:65be27845400	979	*/
AnnaBridge	172:65be27845400	980	__STATIC_INLINE void LL_PWR_SetWakeUpPinPolarityHigh(uint32_t WakeUpPin)
AnnaBridge	172:65be27845400	981	{
AnnaBridge	172:65be27845400	982	CLEAR_BIT(PWR->CR4, WakeUpPin);
AnnaBridge	172:65be27845400	983	}
AnnaBridge	172:65be27845400	984
AnnaBridge	172:65be27845400	985	/**
AnnaBridge	172:65be27845400	986	* @brief Get the Wake-Up pin polarity for the event detection
AnnaBridge	172:65be27845400	987	* @rmtoll CR4 WP1 LL_PWR_IsWakeUpPinPolarityLow\n
AnnaBridge	172:65be27845400	988	* CR4 WP2 LL_PWR_IsWakeUpPinPolarityLow\n
AnnaBridge	172:65be27845400	989	* CR4 WP3 LL_PWR_IsWakeUpPinPolarityLow\n
AnnaBridge	172:65be27845400	990	* CR4 WP4 LL_PWR_IsWakeUpPinPolarityLow\n
AnnaBridge	172:65be27845400	991	* CR4 WP5 LL_PWR_IsWakeUpPinPolarityLow
AnnaBridge	172:65be27845400	992	* @param WakeUpPin This parameter can be one of the following values:
AnnaBridge	172:65be27845400	993	* @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge	172:65be27845400	994	* @arg @ref LL_PWR_WAKEUP_PIN2
AnnaBridge	172:65be27845400	995	* @arg @ref LL_PWR_WAKEUP_PIN3
AnnaBridge	172:65be27845400	996	* @arg @ref LL_PWR_WAKEUP_PIN4
AnnaBridge	172:65be27845400	997	* @arg @ref LL_PWR_WAKEUP_PIN5
AnnaBridge	172:65be27845400	998	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	999	*/
AnnaBridge	172:65be27845400	1000	__STATIC_INLINE uint32_t LL_PWR_IsWakeUpPinPolarityLow(uint32_t WakeUpPin)
AnnaBridge	172:65be27845400	1001	{
AnnaBridge	172:65be27845400	1002	return (READ_BIT(PWR->CR4, WakeUpPin) == (WakeUpPin));
AnnaBridge	172:65be27845400	1003	}
AnnaBridge	172:65be27845400	1004
AnnaBridge	172:65be27845400	1005	/**
AnnaBridge	172:65be27845400	1006	* @brief Enable GPIO pull-up state in Standby and Shutdown modes
AnnaBridge	172:65be27845400	1007	* @rmtoll PUCRA PU0-15 LL_PWR_EnableGPIOPullUp\n
AnnaBridge	172:65be27845400	1008	* PUCRB PU0-15 LL_PWR_EnableGPIOPullUp\n
AnnaBridge	172:65be27845400	1009	* PUCRC PU0-15 LL_PWR_EnableGPIOPullUp\n
AnnaBridge	172:65be27845400	1010	* PUCRD PU0-15 LL_PWR_EnableGPIOPullUp\n
AnnaBridge	172:65be27845400	1011	* PUCRE PU0-15 LL_PWR_EnableGPIOPullUp\n
AnnaBridge	172:65be27845400	1012	* PUCRF PU0-15 LL_PWR_EnableGPIOPullUp\n
AnnaBridge	172:65be27845400	1013	* PUCRG PU0-15 LL_PWR_EnableGPIOPullUp\n
AnnaBridge	172:65be27845400	1014	* PUCRH PU0-15 LL_PWR_EnableGPIOPullUp\n
AnnaBridge	172:65be27845400	1015	* PUCRI PU0-11 LL_PWR_EnableGPIOPullUp
AnnaBridge	172:65be27845400	1016	* @param GPIO This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1017	* @arg @ref LL_PWR_GPIO_A
AnnaBridge	172:65be27845400	1018	* @arg @ref LL_PWR_GPIO_B
AnnaBridge	172:65be27845400	1019	* @arg @ref LL_PWR_GPIO_C
AnnaBridge	172:65be27845400	1020	* @arg @ref LL_PWR_GPIO_D
AnnaBridge	172:65be27845400	1021	* @arg @ref LL_PWR_GPIO_E
AnnaBridge	172:65be27845400	1022	* @arg @ref LL_PWR_GPIO_F (*)
AnnaBridge	172:65be27845400	1023	* @arg @ref LL_PWR_GPIO_G (*)
AnnaBridge	172:65be27845400	1024	* @arg @ref LL_PWR_GPIO_H
AnnaBridge	172:65be27845400	1025	* @arg @ref LL_PWR_GPIO_I (*)
AnnaBridge	172:65be27845400	1026	*
AnnaBridge	172:65be27845400	1027	* (*) value not defined in all devices
AnnaBridge	172:65be27845400	1028	* @param GPIONumber This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1029	* @arg @ref LL_PWR_GPIO_BIT_0
AnnaBridge	172:65be27845400	1030	* @arg @ref LL_PWR_GPIO_BIT_1
AnnaBridge	172:65be27845400	1031	* @arg @ref LL_PWR_GPIO_BIT_2
AnnaBridge	172:65be27845400	1032	* @arg @ref LL_PWR_GPIO_BIT_3
AnnaBridge	172:65be27845400	1033	* @arg @ref LL_PWR_GPIO_BIT_4
AnnaBridge	172:65be27845400	1034	* @arg @ref LL_PWR_GPIO_BIT_5
AnnaBridge	172:65be27845400	1035	* @arg @ref LL_PWR_GPIO_BIT_6
AnnaBridge	172:65be27845400	1036	* @arg @ref LL_PWR_GPIO_BIT_7
AnnaBridge	172:65be27845400	1037	* @arg @ref LL_PWR_GPIO_BIT_8
AnnaBridge	172:65be27845400	1038	* @arg @ref LL_PWR_GPIO_BIT_9
AnnaBridge	172:65be27845400	1039	* @arg @ref LL_PWR_GPIO_BIT_10
AnnaBridge	172:65be27845400	1040	* @arg @ref LL_PWR_GPIO_BIT_11
AnnaBridge	172:65be27845400	1041	* @arg @ref LL_PWR_GPIO_BIT_12
AnnaBridge	172:65be27845400	1042	* @arg @ref LL_PWR_GPIO_BIT_13
AnnaBridge	172:65be27845400	1043	* @arg @ref LL_PWR_GPIO_BIT_14
AnnaBridge	172:65be27845400	1044	* @arg @ref LL_PWR_GPIO_BIT_15
AnnaBridge	172:65be27845400	1045	* @retval None
AnnaBridge	172:65be27845400	1046	*/
AnnaBridge	172:65be27845400	1047	__STATIC_INLINE void LL_PWR_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
AnnaBridge	172:65be27845400	1048	{
AnnaBridge	172:65be27845400	1049	SET_BIT(((uint32_t )GPIO), GPIONumber);
AnnaBridge	172:65be27845400	1050	}
AnnaBridge	172:65be27845400	1051
AnnaBridge	172:65be27845400	1052	/**
AnnaBridge	172:65be27845400	1053	* @brief Disable GPIO pull-up state in Standby and Shutdown modes
AnnaBridge	172:65be27845400	1054	* @rmtoll PUCRA PU0-15 LL_PWR_DisableGPIOPullUp\n
AnnaBridge	172:65be27845400	1055	* PUCRB PU0-15 LL_PWR_DisableGPIOPullUp\n
AnnaBridge	172:65be27845400	1056	* PUCRC PU0-15 LL_PWR_DisableGPIOPullUp\n
AnnaBridge	172:65be27845400	1057	* PUCRD PU0-15 LL_PWR_DisableGPIOPullUp\n
AnnaBridge	172:65be27845400	1058	* PUCRE PU0-15 LL_PWR_DisableGPIOPullUp\n
AnnaBridge	172:65be27845400	1059	* PUCRF PU0-15 LL_PWR_DisableGPIOPullUp\n
AnnaBridge	172:65be27845400	1060	* PUCRG PU0-15 LL_PWR_DisableGPIOPullUp\n
AnnaBridge	172:65be27845400	1061	* PUCRH PU0-15 LL_PWR_DisableGPIOPullUp\n
AnnaBridge	172:65be27845400	1062	* PUCRI PU0-11 LL_PWR_DisableGPIOPullUp
AnnaBridge	172:65be27845400	1063	* @param GPIO This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1064	* @arg @ref LL_PWR_GPIO_A
AnnaBridge	172:65be27845400	1065	* @arg @ref LL_PWR_GPIO_B
AnnaBridge	172:65be27845400	1066	* @arg @ref LL_PWR_GPIO_C
AnnaBridge	172:65be27845400	1067	* @arg @ref LL_PWR_GPIO_D
AnnaBridge	172:65be27845400	1068	* @arg @ref LL_PWR_GPIO_E
AnnaBridge	172:65be27845400	1069	* @arg @ref LL_PWR_GPIO_F (*)
AnnaBridge	172:65be27845400	1070	* @arg @ref LL_PWR_GPIO_G (*)
AnnaBridge	172:65be27845400	1071	* @arg @ref LL_PWR_GPIO_H
AnnaBridge	172:65be27845400	1072	* @arg @ref LL_PWR_GPIO_I (*)
AnnaBridge	172:65be27845400	1073	*
AnnaBridge	172:65be27845400	1074	* (*) value not defined in all devices
AnnaBridge	172:65be27845400	1075	* @param GPIONumber This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1076	* @arg @ref LL_PWR_GPIO_BIT_0
AnnaBridge	172:65be27845400	1077	* @arg @ref LL_PWR_GPIO_BIT_1
AnnaBridge	172:65be27845400	1078	* @arg @ref LL_PWR_GPIO_BIT_2
AnnaBridge	172:65be27845400	1079	* @arg @ref LL_PWR_GPIO_BIT_3
AnnaBridge	172:65be27845400	1080	* @arg @ref LL_PWR_GPIO_BIT_4
AnnaBridge	172:65be27845400	1081	* @arg @ref LL_PWR_GPIO_BIT_5
AnnaBridge	172:65be27845400	1082	* @arg @ref LL_PWR_GPIO_BIT_6
AnnaBridge	172:65be27845400	1083	* @arg @ref LL_PWR_GPIO_BIT_7
AnnaBridge	172:65be27845400	1084	* @arg @ref LL_PWR_GPIO_BIT_8
AnnaBridge	172:65be27845400	1085	* @arg @ref LL_PWR_GPIO_BIT_9
AnnaBridge	172:65be27845400	1086	* @arg @ref LL_PWR_GPIO_BIT_10
AnnaBridge	172:65be27845400	1087	* @arg @ref LL_PWR_GPIO_BIT_11
AnnaBridge	172:65be27845400	1088	* @arg @ref LL_PWR_GPIO_BIT_12
AnnaBridge	172:65be27845400	1089	* @arg @ref LL_PWR_GPIO_BIT_13
AnnaBridge	172:65be27845400	1090	* @arg @ref LL_PWR_GPIO_BIT_14
AnnaBridge	172:65be27845400	1091	* @arg @ref LL_PWR_GPIO_BIT_15
AnnaBridge	172:65be27845400	1092	* @retval None
AnnaBridge	172:65be27845400	1093	*/
AnnaBridge	172:65be27845400	1094	__STATIC_INLINE void LL_PWR_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
AnnaBridge	172:65be27845400	1095	{
AnnaBridge	172:65be27845400	1096	CLEAR_BIT(((uint32_t )GPIO), GPIONumber);
AnnaBridge	172:65be27845400	1097	}
AnnaBridge	172:65be27845400	1098
AnnaBridge	172:65be27845400	1099	/**
AnnaBridge	172:65be27845400	1100	* @brief Check if GPIO pull-up state is enabled
AnnaBridge	172:65be27845400	1101	* @rmtoll PUCRA PU0-15 LL_PWR_IsEnabledGPIOPullUp\n
AnnaBridge	172:65be27845400	1102	* PUCRB PU0-15 LL_PWR_IsEnabledGPIOPullUp\n
AnnaBridge	172:65be27845400	1103	* PUCRC PU0-15 LL_PWR_IsEnabledGPIOPullUp\n
AnnaBridge	172:65be27845400	1104	* PUCRD PU0-15 LL_PWR_IsEnabledGPIOPullUp\n
AnnaBridge	172:65be27845400	1105	* PUCRE PU0-15 LL_PWR_IsEnabledGPIOPullUp\n
AnnaBridge	172:65be27845400	1106	* PUCRF PU0-15 LL_PWR_IsEnabledGPIOPullUp\n
AnnaBridge	172:65be27845400	1107	* PUCRG PU0-15 LL_PWR_IsEnabledGPIOPullUp\n
AnnaBridge	172:65be27845400	1108	* PUCRH PU0-15 LL_PWR_IsEnabledGPIOPullUp\n
AnnaBridge	172:65be27845400	1109	* PUCRI PU0-11 LL_PWR_IsEnabledGPIOPullUp
AnnaBridge	172:65be27845400	1110	* @param GPIO This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1111	* @arg @ref LL_PWR_GPIO_A
AnnaBridge	172:65be27845400	1112	* @arg @ref LL_PWR_GPIO_B
AnnaBridge	172:65be27845400	1113	* @arg @ref LL_PWR_GPIO_C
AnnaBridge	172:65be27845400	1114	* @arg @ref LL_PWR_GPIO_D
AnnaBridge	172:65be27845400	1115	* @arg @ref LL_PWR_GPIO_E
AnnaBridge	172:65be27845400	1116	* @arg @ref LL_PWR_GPIO_F (*)
AnnaBridge	172:65be27845400	1117	* @arg @ref LL_PWR_GPIO_G (*)
AnnaBridge	172:65be27845400	1118	* @arg @ref LL_PWR_GPIO_H
AnnaBridge	172:65be27845400	1119	* @arg @ref LL_PWR_GPIO_I (*)
AnnaBridge	172:65be27845400	1120	*
AnnaBridge	172:65be27845400	1121	* (*) value not defined in all devices
AnnaBridge	172:65be27845400	1122	* @param GPIONumber This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1123	* @arg @ref LL_PWR_GPIO_BIT_0
AnnaBridge	172:65be27845400	1124	* @arg @ref LL_PWR_GPIO_BIT_1
AnnaBridge	172:65be27845400	1125	* @arg @ref LL_PWR_GPIO_BIT_2
AnnaBridge	172:65be27845400	1126	* @arg @ref LL_PWR_GPIO_BIT_3
AnnaBridge	172:65be27845400	1127	* @arg @ref LL_PWR_GPIO_BIT_4
AnnaBridge	172:65be27845400	1128	* @arg @ref LL_PWR_GPIO_BIT_5
AnnaBridge	172:65be27845400	1129	* @arg @ref LL_PWR_GPIO_BIT_6
AnnaBridge	172:65be27845400	1130	* @arg @ref LL_PWR_GPIO_BIT_7
AnnaBridge	172:65be27845400	1131	* @arg @ref LL_PWR_GPIO_BIT_8
AnnaBridge	172:65be27845400	1132	* @arg @ref LL_PWR_GPIO_BIT_9
AnnaBridge	172:65be27845400	1133	* @arg @ref LL_PWR_GPIO_BIT_10
AnnaBridge	172:65be27845400	1134	* @arg @ref LL_PWR_GPIO_BIT_11
AnnaBridge	172:65be27845400	1135	* @arg @ref LL_PWR_GPIO_BIT_12
AnnaBridge	172:65be27845400	1136	* @arg @ref LL_PWR_GPIO_BIT_13
AnnaBridge	172:65be27845400	1137	* @arg @ref LL_PWR_GPIO_BIT_14
AnnaBridge	172:65be27845400	1138	* @arg @ref LL_PWR_GPIO_BIT_15
AnnaBridge	172:65be27845400	1139	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1140	*/
AnnaBridge	172:65be27845400	1141	__STATIC_INLINE uint32_t LL_PWR_IsEnabledGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
AnnaBridge	172:65be27845400	1142	{
AnnaBridge	172:65be27845400	1143	return (READ_BIT(((uint32_t )(GPIO)), GPIONumber) == (GPIONumber));
AnnaBridge	172:65be27845400	1144	}
AnnaBridge	172:65be27845400	1145
AnnaBridge	172:65be27845400	1146	/**
AnnaBridge	172:65be27845400	1147	* @brief Enable GPIO pull-down state in Standby and Shutdown modes
AnnaBridge	172:65be27845400	1148	* @rmtoll PDCRA PD0-15 LL_PWR_EnableGPIOPullDown\n
AnnaBridge	172:65be27845400	1149	* PDCRB PD0-15 LL_PWR_EnableGPIOPullDown\n
AnnaBridge	172:65be27845400	1150	* PDCRC PD0-15 LL_PWR_EnableGPIOPullDown\n
AnnaBridge	172:65be27845400	1151	* PDCRD PD0-15 LL_PWR_EnableGPIOPullDown\n
AnnaBridge	172:65be27845400	1152	* PDCRE PD0-15 LL_PWR_EnableGPIOPullDown\n
AnnaBridge	172:65be27845400	1153	* PDCRF PD0-15 LL_PWR_EnableGPIOPullDown\n
AnnaBridge	172:65be27845400	1154	* PDCRG PD0-15 LL_PWR_EnableGPIOPullDown\n
AnnaBridge	172:65be27845400	1155	* PDCRH PD0-15 LL_PWR_EnableGPIOPullDown\n
AnnaBridge	172:65be27845400	1156	* PDCRI PD0-11 LL_PWR_EnableGPIOPullDown
AnnaBridge	172:65be27845400	1157	* @param GPIO This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1158	* @arg @ref LL_PWR_GPIO_A
AnnaBridge	172:65be27845400	1159	* @arg @ref LL_PWR_GPIO_B
AnnaBridge	172:65be27845400	1160	* @arg @ref LL_PWR_GPIO_C
AnnaBridge	172:65be27845400	1161	* @arg @ref LL_PWR_GPIO_D
AnnaBridge	172:65be27845400	1162	* @arg @ref LL_PWR_GPIO_E
AnnaBridge	172:65be27845400	1163	* @arg @ref LL_PWR_GPIO_F (*)
AnnaBridge	172:65be27845400	1164	* @arg @ref LL_PWR_GPIO_G (*)
AnnaBridge	172:65be27845400	1165	* @arg @ref LL_PWR_GPIO_H
AnnaBridge	172:65be27845400	1166	* @arg @ref LL_PWR_GPIO_I (*)
AnnaBridge	172:65be27845400	1167	*
AnnaBridge	172:65be27845400	1168	* (*) value not defined in all devices
AnnaBridge	172:65be27845400	1169	* @param GPIONumber This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1170	* @arg @ref LL_PWR_GPIO_BIT_0
AnnaBridge	172:65be27845400	1171	* @arg @ref LL_PWR_GPIO_BIT_1
AnnaBridge	172:65be27845400	1172	* @arg @ref LL_PWR_GPIO_BIT_2
AnnaBridge	172:65be27845400	1173	* @arg @ref LL_PWR_GPIO_BIT_3
AnnaBridge	172:65be27845400	1174	* @arg @ref LL_PWR_GPIO_BIT_4
AnnaBridge	172:65be27845400	1175	* @arg @ref LL_PWR_GPIO_BIT_5
AnnaBridge	172:65be27845400	1176	* @arg @ref LL_PWR_GPIO_BIT_6
AnnaBridge	172:65be27845400	1177	* @arg @ref LL_PWR_GPIO_BIT_7
AnnaBridge	172:65be27845400	1178	* @arg @ref LL_PWR_GPIO_BIT_8
AnnaBridge	172:65be27845400	1179	* @arg @ref LL_PWR_GPIO_BIT_9
AnnaBridge	172:65be27845400	1180	* @arg @ref LL_PWR_GPIO_BIT_10
AnnaBridge	172:65be27845400	1181	* @arg @ref LL_PWR_GPIO_BIT_11
AnnaBridge	172:65be27845400	1182	* @arg @ref LL_PWR_GPIO_BIT_12
AnnaBridge	172:65be27845400	1183	* @arg @ref LL_PWR_GPIO_BIT_13
AnnaBridge	172:65be27845400	1184	* @arg @ref LL_PWR_GPIO_BIT_14
AnnaBridge	172:65be27845400	1185	* @arg @ref LL_PWR_GPIO_BIT_15
AnnaBridge	172:65be27845400	1186	* @retval None
AnnaBridge	172:65be27845400	1187	*/
AnnaBridge	172:65be27845400	1188	__STATIC_INLINE void LL_PWR_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
AnnaBridge	172:65be27845400	1189	{
AnnaBridge	172:65be27845400	1190	register uint32_t temp = (uint32_t)(GPIO) + 4;
AnnaBridge	172:65be27845400	1191	SET_BIT(((uint32_t )(temp)), GPIONumber);
AnnaBridge	172:65be27845400	1192	}
AnnaBridge	172:65be27845400	1193
AnnaBridge	172:65be27845400	1194	/**
AnnaBridge	172:65be27845400	1195	* @brief Disable GPIO pull-down state in Standby and Shutdown modes
AnnaBridge	172:65be27845400	1196	* @rmtoll PDCRA PD0-15 LL_PWR_DisableGPIOPullDown\n
AnnaBridge	172:65be27845400	1197	* PDCRB PD0-15 LL_PWR_DisableGPIOPullDown\n
AnnaBridge	172:65be27845400	1198	* PDCRC PD0-15 LL_PWR_DisableGPIOPullDown\n
AnnaBridge	172:65be27845400	1199	* PDCRD PD0-15 LL_PWR_DisableGPIOPullDown\n
AnnaBridge	172:65be27845400	1200	* PDCRE PD0-15 LL_PWR_DisableGPIOPullDown\n
AnnaBridge	172:65be27845400	1201	* PDCRF PD0-15 LL_PWR_DisableGPIOPullDown\n
AnnaBridge	172:65be27845400	1202	* PDCRG PD0-15 LL_PWR_DisableGPIOPullDown\n
AnnaBridge	172:65be27845400	1203	* PDCRH PD0-15 LL_PWR_DisableGPIOPullDown\n
AnnaBridge	172:65be27845400	1204	* PDCRI PD0-11 LL_PWR_DisableGPIOPullDown
AnnaBridge	172:65be27845400	1205	* @param GPIO This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1206	* @arg @ref LL_PWR_GPIO_A
AnnaBridge	172:65be27845400	1207	* @arg @ref LL_PWR_GPIO_B
AnnaBridge	172:65be27845400	1208	* @arg @ref LL_PWR_GPIO_C
AnnaBridge	172:65be27845400	1209	* @arg @ref LL_PWR_GPIO_D
AnnaBridge	172:65be27845400	1210	* @arg @ref LL_PWR_GPIO_E
AnnaBridge	172:65be27845400	1211	* @arg @ref LL_PWR_GPIO_F (*)
AnnaBridge	172:65be27845400	1212	* @arg @ref LL_PWR_GPIO_G (*)
AnnaBridge	172:65be27845400	1213	* @arg @ref LL_PWR_GPIO_H
AnnaBridge	172:65be27845400	1214	* @arg @ref LL_PWR_GPIO_I (*)
AnnaBridge	172:65be27845400	1215	*
AnnaBridge	172:65be27845400	1216	* (*) value not defined in all devices
AnnaBridge	172:65be27845400	1217	* @param GPIONumber This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1218	* @arg @ref LL_PWR_GPIO_BIT_0
AnnaBridge	172:65be27845400	1219	* @arg @ref LL_PWR_GPIO_BIT_1
AnnaBridge	172:65be27845400	1220	* @arg @ref LL_PWR_GPIO_BIT_2
AnnaBridge	172:65be27845400	1221	* @arg @ref LL_PWR_GPIO_BIT_3
AnnaBridge	172:65be27845400	1222	* @arg @ref LL_PWR_GPIO_BIT_4
AnnaBridge	172:65be27845400	1223	* @arg @ref LL_PWR_GPIO_BIT_5
AnnaBridge	172:65be27845400	1224	* @arg @ref LL_PWR_GPIO_BIT_6
AnnaBridge	172:65be27845400	1225	* @arg @ref LL_PWR_GPIO_BIT_7
AnnaBridge	172:65be27845400	1226	* @arg @ref LL_PWR_GPIO_BIT_8
AnnaBridge	172:65be27845400	1227	* @arg @ref LL_PWR_GPIO_BIT_9
AnnaBridge	172:65be27845400	1228	* @arg @ref LL_PWR_GPIO_BIT_10
AnnaBridge	172:65be27845400	1229	* @arg @ref LL_PWR_GPIO_BIT_11
AnnaBridge	172:65be27845400	1230	* @arg @ref LL_PWR_GPIO_BIT_12
AnnaBridge	172:65be27845400	1231	* @arg @ref LL_PWR_GPIO_BIT_13
AnnaBridge	172:65be27845400	1232	* @arg @ref LL_PWR_GPIO_BIT_14
AnnaBridge	172:65be27845400	1233	* @arg @ref LL_PWR_GPIO_BIT_15
AnnaBridge	172:65be27845400	1234	* @retval None
AnnaBridge	172:65be27845400	1235	*/
AnnaBridge	172:65be27845400	1236	__STATIC_INLINE void LL_PWR_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
AnnaBridge	172:65be27845400	1237	{
AnnaBridge	172:65be27845400	1238	register uint32_t temp = (uint32_t)(GPIO) + 4;
AnnaBridge	172:65be27845400	1239	CLEAR_BIT(((uint32_t )(temp)), GPIONumber);
AnnaBridge	172:65be27845400	1240	}
AnnaBridge	172:65be27845400	1241
AnnaBridge	172:65be27845400	1242	/**
AnnaBridge	172:65be27845400	1243	* @brief Check if GPIO pull-down state is enabled
AnnaBridge	172:65be27845400	1244	* @rmtoll PDCRA PD0-15 LL_PWR_IsEnabledGPIOPullDown\n
AnnaBridge	172:65be27845400	1245	* PDCRB PD0-15 LL_PWR_IsEnabledGPIOPullDown\n
AnnaBridge	172:65be27845400	1246	* PDCRC PD0-15 LL_PWR_IsEnabledGPIOPullDown\n
AnnaBridge	172:65be27845400	1247	* PDCRD PD0-15 LL_PWR_IsEnabledGPIOPullDown\n
AnnaBridge	172:65be27845400	1248	* PDCRE PD0-15 LL_PWR_IsEnabledGPIOPullDown\n
AnnaBridge	172:65be27845400	1249	* PDCRF PD0-15 LL_PWR_IsEnabledGPIOPullDown\n
AnnaBridge	172:65be27845400	1250	* PDCRG PD0-15 LL_PWR_IsEnabledGPIOPullDown\n
AnnaBridge	172:65be27845400	1251	* PDCRH PD0-15 LL_PWR_IsEnabledGPIOPullDown\n
AnnaBridge	172:65be27845400	1252	* PDCRI PD0-11 LL_PWR_IsEnabledGPIOPullDown
AnnaBridge	172:65be27845400	1253	* @param GPIO This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1254	* @arg @ref LL_PWR_GPIO_A
AnnaBridge	172:65be27845400	1255	* @arg @ref LL_PWR_GPIO_B
AnnaBridge	172:65be27845400	1256	* @arg @ref LL_PWR_GPIO_C
AnnaBridge	172:65be27845400	1257	* @arg @ref LL_PWR_GPIO_D
AnnaBridge	172:65be27845400	1258	* @arg @ref LL_PWR_GPIO_E
AnnaBridge	172:65be27845400	1259	* @arg @ref LL_PWR_GPIO_F (*)
AnnaBridge	172:65be27845400	1260	* @arg @ref LL_PWR_GPIO_G (*)
AnnaBridge	172:65be27845400	1261	* @arg @ref LL_PWR_GPIO_H
AnnaBridge	172:65be27845400	1262	* @arg @ref LL_PWR_GPIO_I (*)
AnnaBridge	172:65be27845400	1263	*
AnnaBridge	172:65be27845400	1264	* (*) value not defined in all devices
AnnaBridge	172:65be27845400	1265	* @param GPIONumber This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1266	* @arg @ref LL_PWR_GPIO_BIT_0
AnnaBridge	172:65be27845400	1267	* @arg @ref LL_PWR_GPIO_BIT_1
AnnaBridge	172:65be27845400	1268	* @arg @ref LL_PWR_GPIO_BIT_2
AnnaBridge	172:65be27845400	1269	* @arg @ref LL_PWR_GPIO_BIT_3
AnnaBridge	172:65be27845400	1270	* @arg @ref LL_PWR_GPIO_BIT_4
AnnaBridge	172:65be27845400	1271	* @arg @ref LL_PWR_GPIO_BIT_5
AnnaBridge	172:65be27845400	1272	* @arg @ref LL_PWR_GPIO_BIT_6
AnnaBridge	172:65be27845400	1273	* @arg @ref LL_PWR_GPIO_BIT_7
AnnaBridge	172:65be27845400	1274	* @arg @ref LL_PWR_GPIO_BIT_8
AnnaBridge	172:65be27845400	1275	* @arg @ref LL_PWR_GPIO_BIT_9
AnnaBridge	172:65be27845400	1276	* @arg @ref LL_PWR_GPIO_BIT_10
AnnaBridge	172:65be27845400	1277	* @arg @ref LL_PWR_GPIO_BIT_11
AnnaBridge	172:65be27845400	1278	* @arg @ref LL_PWR_GPIO_BIT_12
AnnaBridge	172:65be27845400	1279	* @arg @ref LL_PWR_GPIO_BIT_13
AnnaBridge	172:65be27845400	1280	* @arg @ref LL_PWR_GPIO_BIT_14
AnnaBridge	172:65be27845400	1281	* @arg @ref LL_PWR_GPIO_BIT_15
AnnaBridge	172:65be27845400	1282	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1283	*/
AnnaBridge	172:65be27845400	1284	__STATIC_INLINE uint32_t LL_PWR_IsEnabledGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
AnnaBridge	172:65be27845400	1285	{
AnnaBridge	172:65be27845400	1286	register uint32_t temp = (uint32_t)(GPIO) + 4;
AnnaBridge	172:65be27845400	1287	return (READ_BIT(((uint32_t )(temp)), GPIONumber) == (GPIONumber));
AnnaBridge	172:65be27845400	1288	}
AnnaBridge	172:65be27845400	1289
AnnaBridge	172:65be27845400	1290	/**
AnnaBridge	172:65be27845400	1291	* @}
AnnaBridge	172:65be27845400	1292	*/
AnnaBridge	172:65be27845400	1293
AnnaBridge	172:65be27845400	1294	/** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
AnnaBridge	172:65be27845400	1295	* @{
AnnaBridge	172:65be27845400	1296	*/
AnnaBridge	172:65be27845400	1297
AnnaBridge	172:65be27845400	1298	/**
AnnaBridge	172:65be27845400	1299	* @brief Get Internal Wake-up line Flag
AnnaBridge	172:65be27845400	1300	* @rmtoll SR1 WUFI LL_PWR_IsActiveFlag_InternWU
AnnaBridge	172:65be27845400	1301	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1302	*/
AnnaBridge	172:65be27845400	1303	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_InternWU(void)
AnnaBridge	172:65be27845400	1304	{
AnnaBridge	172:65be27845400	1305	return (READ_BIT(PWR->SR1, PWR_SR1_WUFI) == (PWR_SR1_WUFI));
AnnaBridge	172:65be27845400	1306	}
AnnaBridge	172:65be27845400	1307
AnnaBridge	172:65be27845400	1308	/**
AnnaBridge	172:65be27845400	1309	* @brief Get Stand-By Flag
AnnaBridge	172:65be27845400	1310	* @rmtoll SR1 SBF LL_PWR_IsActiveFlag_SB
AnnaBridge	172:65be27845400	1311	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1312	*/
AnnaBridge	172:65be27845400	1313	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
AnnaBridge	172:65be27845400	1314	{
AnnaBridge	172:65be27845400	1315	return (READ_BIT(PWR->SR1, PWR_SR1_SBF) == (PWR_SR1_SBF));
AnnaBridge	172:65be27845400	1316	}
AnnaBridge	172:65be27845400	1317
AnnaBridge	172:65be27845400	1318	/**
AnnaBridge	172:65be27845400	1319	* @brief Get Wake-up Flag 5
AnnaBridge	172:65be27845400	1320	* @rmtoll SR1 WUF5 LL_PWR_IsActiveFlag_WU5
AnnaBridge	172:65be27845400	1321	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1322	*/
AnnaBridge	172:65be27845400	1323	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU5(void)
AnnaBridge	172:65be27845400	1324	{
AnnaBridge	172:65be27845400	1325	return (READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5));
AnnaBridge	172:65be27845400	1326	}
AnnaBridge	172:65be27845400	1327
AnnaBridge	172:65be27845400	1328	/**
AnnaBridge	172:65be27845400	1329	* @brief Get Wake-up Flag 4
AnnaBridge	172:65be27845400	1330	* @rmtoll SR1 WUF4 LL_PWR_IsActiveFlag_WU4
AnnaBridge	172:65be27845400	1331	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1332	*/
AnnaBridge	172:65be27845400	1333	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU4(void)
AnnaBridge	172:65be27845400	1334	{
AnnaBridge	172:65be27845400	1335	return (READ_BIT(PWR->SR1, PWR_SR1_WUF4) == (PWR_SR1_WUF4));
AnnaBridge	172:65be27845400	1336	}
AnnaBridge	172:65be27845400	1337
AnnaBridge	172:65be27845400	1338	/**
AnnaBridge	172:65be27845400	1339	* @brief Get Wake-up Flag 3
AnnaBridge	172:65be27845400	1340	* @rmtoll SR1 WUF3 LL_PWR_IsActiveFlag_WU3
AnnaBridge	172:65be27845400	1341	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1342	*/
AnnaBridge	172:65be27845400	1343	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU3(void)
AnnaBridge	172:65be27845400	1344	{
AnnaBridge	172:65be27845400	1345	return (READ_BIT(PWR->SR1, PWR_SR1_WUF3) == (PWR_SR1_WUF3));
AnnaBridge	172:65be27845400	1346	}
AnnaBridge	172:65be27845400	1347
AnnaBridge	172:65be27845400	1348	/**
AnnaBridge	172:65be27845400	1349	* @brief Get Wake-up Flag 2
AnnaBridge	172:65be27845400	1350	* @rmtoll SR1 WUF2 LL_PWR_IsActiveFlag_WU2
AnnaBridge	172:65be27845400	1351	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1352	*/
AnnaBridge	172:65be27845400	1353	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU2(void)
AnnaBridge	172:65be27845400	1354	{
AnnaBridge	172:65be27845400	1355	return (READ_BIT(PWR->SR1, PWR_SR1_WUF2) == (PWR_SR1_WUF2));
AnnaBridge	172:65be27845400	1356	}
AnnaBridge	172:65be27845400	1357
AnnaBridge	172:65be27845400	1358	/**
AnnaBridge	172:65be27845400	1359	* @brief Get Wake-up Flag 1
AnnaBridge	172:65be27845400	1360	* @rmtoll SR1 WUF1 LL_PWR_IsActiveFlag_WU1
AnnaBridge	172:65be27845400	1361	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1362	*/
AnnaBridge	172:65be27845400	1363	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU1(void)
AnnaBridge	172:65be27845400	1364	{
AnnaBridge	172:65be27845400	1365	return (READ_BIT(PWR->SR1, PWR_SR1_WUF1) == (PWR_SR1_WUF1));
AnnaBridge	172:65be27845400	1366	}
AnnaBridge	172:65be27845400	1367
AnnaBridge	172:65be27845400	1368	/**
AnnaBridge	172:65be27845400	1369	* @brief Clear Stand-By Flag
AnnaBridge	172:65be27845400	1370	* @rmtoll SCR CSBF LL_PWR_ClearFlag_SB
AnnaBridge	172:65be27845400	1371	* @retval None
AnnaBridge	172:65be27845400	1372	*/
AnnaBridge	172:65be27845400	1373	__STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
AnnaBridge	172:65be27845400	1374	{
AnnaBridge	172:65be27845400	1375	WRITE_REG(PWR->SCR, PWR_SCR_CSBF);
AnnaBridge	172:65be27845400	1376	}
AnnaBridge	172:65be27845400	1377
AnnaBridge	172:65be27845400	1378	/**
AnnaBridge	172:65be27845400	1379	* @brief Clear Wake-up Flags
AnnaBridge	172:65be27845400	1380	* @rmtoll SCR CWUF LL_PWR_ClearFlag_WU
AnnaBridge	172:65be27845400	1381	* @retval None
AnnaBridge	172:65be27845400	1382	*/
AnnaBridge	172:65be27845400	1383	__STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
AnnaBridge	172:65be27845400	1384	{
AnnaBridge	172:65be27845400	1385	WRITE_REG(PWR->SCR, PWR_SCR_CWUF);
AnnaBridge	172:65be27845400	1386	}
AnnaBridge	172:65be27845400	1387
AnnaBridge	172:65be27845400	1388	/**
AnnaBridge	172:65be27845400	1389	* @brief Clear Wake-up Flag 5
AnnaBridge	172:65be27845400	1390	* @rmtoll SCR CWUF5 LL_PWR_ClearFlag_WU5
AnnaBridge	172:65be27845400	1391	* @retval None
AnnaBridge	172:65be27845400	1392	*/
AnnaBridge	172:65be27845400	1393	__STATIC_INLINE void LL_PWR_ClearFlag_WU5(void)
AnnaBridge	172:65be27845400	1394	{
AnnaBridge	172:65be27845400	1395	WRITE_REG(PWR->SCR, PWR_SCR_CWUF5);
AnnaBridge	172:65be27845400	1396	}
AnnaBridge	172:65be27845400	1397
AnnaBridge	172:65be27845400	1398	/**
AnnaBridge	172:65be27845400	1399	* @brief Clear Wake-up Flag 4
AnnaBridge	172:65be27845400	1400	* @rmtoll SCR CWUF4 LL_PWR_ClearFlag_WU4
AnnaBridge	172:65be27845400	1401	* @retval None
AnnaBridge	172:65be27845400	1402	*/
AnnaBridge	172:65be27845400	1403	__STATIC_INLINE void LL_PWR_ClearFlag_WU4(void)
AnnaBridge	172:65be27845400	1404	{
AnnaBridge	172:65be27845400	1405	WRITE_REG(PWR->SCR, PWR_SCR_CWUF4);
AnnaBridge	172:65be27845400	1406	}
AnnaBridge	172:65be27845400	1407
AnnaBridge	172:65be27845400	1408	/**
AnnaBridge	172:65be27845400	1409	* @brief Clear Wake-up Flag 3
AnnaBridge	172:65be27845400	1410	* @rmtoll SCR CWUF3 LL_PWR_ClearFlag_WU3
AnnaBridge	172:65be27845400	1411	* @retval None
AnnaBridge	172:65be27845400	1412	*/
AnnaBridge	172:65be27845400	1413	__STATIC_INLINE void LL_PWR_ClearFlag_WU3(void)
AnnaBridge	172:65be27845400	1414	{
AnnaBridge	172:65be27845400	1415	WRITE_REG(PWR->SCR, PWR_SCR_CWUF3);
AnnaBridge	172:65be27845400	1416	}
AnnaBridge	172:65be27845400	1417
AnnaBridge	172:65be27845400	1418	/**
AnnaBridge	172:65be27845400	1419	* @brief Clear Wake-up Flag 2
AnnaBridge	172:65be27845400	1420	* @rmtoll SCR CWUF2 LL_PWR_ClearFlag_WU2
AnnaBridge	172:65be27845400	1421	* @retval None
AnnaBridge	172:65be27845400	1422	*/
AnnaBridge	172:65be27845400	1423	__STATIC_INLINE void LL_PWR_ClearFlag_WU2(void)
AnnaBridge	172:65be27845400	1424	{
AnnaBridge	172:65be27845400	1425	WRITE_REG(PWR->SCR, PWR_SCR_CWUF2);
AnnaBridge	172:65be27845400	1426	}
AnnaBridge	172:65be27845400	1427
AnnaBridge	172:65be27845400	1428	/**
AnnaBridge	172:65be27845400	1429	* @brief Clear Wake-up Flag 1
AnnaBridge	172:65be27845400	1430	* @rmtoll SCR CWUF1 LL_PWR_ClearFlag_WU1
AnnaBridge	172:65be27845400	1431	* @retval None
AnnaBridge	172:65be27845400	1432	*/
AnnaBridge	172:65be27845400	1433	__STATIC_INLINE void LL_PWR_ClearFlag_WU1(void)
AnnaBridge	172:65be27845400	1434	{
AnnaBridge	172:65be27845400	1435	WRITE_REG(PWR->SCR, PWR_SCR_CWUF1);
AnnaBridge	172:65be27845400	1436	}
AnnaBridge	172:65be27845400	1437
AnnaBridge	172:65be27845400	1438	/**
AnnaBridge	172:65be27845400	1439	* @brief Indicate whether VDDA voltage is below or above PVM4 threshold
AnnaBridge	172:65be27845400	1440	* @rmtoll SR2 PVMO4 LL_PWR_IsActiveFlag_PVMO4
AnnaBridge	172:65be27845400	1441	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1442	*/
AnnaBridge	172:65be27845400	1443	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO4(void)
AnnaBridge	172:65be27845400	1444	{
AnnaBridge	172:65be27845400	1445	return (READ_BIT(PWR->SR2, PWR_SR2_PVMO4) == (PWR_SR2_PVMO4));
AnnaBridge	172:65be27845400	1446	}
AnnaBridge	172:65be27845400	1447
AnnaBridge	172:65be27845400	1448	/**
AnnaBridge	172:65be27845400	1449	* @brief Indicate whether VDDA voltage is below or above PVM3 threshold
AnnaBridge	172:65be27845400	1450	* @rmtoll SR2 PVMO3 LL_PWR_IsActiveFlag_PVMO3
AnnaBridge	172:65be27845400	1451	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1452	*/
AnnaBridge	172:65be27845400	1453	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO3(void)
AnnaBridge	172:65be27845400	1454	{
AnnaBridge	172:65be27845400	1455	return (READ_BIT(PWR->SR2, PWR_SR2_PVMO3) == (PWR_SR2_PVMO3));
AnnaBridge	172:65be27845400	1456	}
AnnaBridge	172:65be27845400	1457
AnnaBridge	172:65be27845400	1458	#if defined(PWR_SR2_PVMO2)
AnnaBridge	172:65be27845400	1459	/**
AnnaBridge	172:65be27845400	1460	* @brief Indicate whether VDDIO2 voltage is below or above PVM2 threshold
AnnaBridge	172:65be27845400	1461	* @rmtoll SR2 PVMO2 LL_PWR_IsActiveFlag_PVMO2
AnnaBridge	172:65be27845400	1462	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1463	*/
AnnaBridge	172:65be27845400	1464	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO2(void)
AnnaBridge	172:65be27845400	1465	{
AnnaBridge	172:65be27845400	1466	return (READ_BIT(PWR->SR2, PWR_SR2_PVMO2) == (PWR_SR2_PVMO2));
AnnaBridge	172:65be27845400	1467	}
AnnaBridge	172:65be27845400	1468	#endif /* PWR_SR2_PVMO2 */
AnnaBridge	172:65be27845400	1469
AnnaBridge	172:65be27845400	1470	#if defined(PWR_SR2_PVMO1)
AnnaBridge	172:65be27845400	1471	/**
AnnaBridge	172:65be27845400	1472	* @brief Indicate whether VDDUSB voltage is below or above PVM1 threshold
AnnaBridge	172:65be27845400	1473	* @rmtoll SR2 PVMO1 LL_PWR_IsActiveFlag_PVMO1
AnnaBridge	172:65be27845400	1474	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1475	*/
AnnaBridge	172:65be27845400	1476	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO1(void)
AnnaBridge	172:65be27845400	1477	{
AnnaBridge	172:65be27845400	1478	return (READ_BIT(PWR->SR2, PWR_SR2_PVMO1) == (PWR_SR2_PVMO1));
AnnaBridge	172:65be27845400	1479	}
AnnaBridge	172:65be27845400	1480	#endif /* PWR_SR2_PVMO1 */
AnnaBridge	172:65be27845400	1481
AnnaBridge	172:65be27845400	1482	/**
AnnaBridge	172:65be27845400	1483	* @brief Indicate whether VDD voltage is below or above the selected PVD threshold
AnnaBridge	172:65be27845400	1484	* @rmtoll SR2 PVDO LL_PWR_IsActiveFlag_PVDO
AnnaBridge	172:65be27845400	1485	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1486	*/
AnnaBridge	172:65be27845400	1487	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
AnnaBridge	172:65be27845400	1488	{
AnnaBridge	172:65be27845400	1489	return (READ_BIT(PWR->SR2, PWR_SR2_PVDO) == (PWR_SR2_PVDO));
AnnaBridge	172:65be27845400	1490	}
AnnaBridge	172:65be27845400	1491
AnnaBridge	172:65be27845400	1492	/**
AnnaBridge	172:65be27845400	1493	* @brief Indicate whether the regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level
AnnaBridge	172:65be27845400	1494	* @rmtoll SR2 VOSF LL_PWR_IsActiveFlag_VOS
AnnaBridge	172:65be27845400	1495	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1496	*/
AnnaBridge	172:65be27845400	1497	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void)
AnnaBridge	172:65be27845400	1498	{
AnnaBridge	172:65be27845400	1499	return (READ_BIT(PWR->SR2, PWR_SR2_VOSF) == (PWR_SR2_VOSF));
AnnaBridge	172:65be27845400	1500	}
AnnaBridge	172:65be27845400	1501
AnnaBridge	172:65be27845400	1502	/**
AnnaBridge	172:65be27845400	1503	* @brief Indicate whether the regulator is ready in main mode or is in low-power mode
AnnaBridge	172:65be27845400	1504	* @note Take care, return value "0" means the regulator is ready. Return value "1" means the output voltage range is still changing.
AnnaBridge	172:65be27845400	1505	* @rmtoll SR2 REGLPF LL_PWR_IsActiveFlag_REGLPF
AnnaBridge	172:65be27845400	1506	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1507	*/
AnnaBridge	172:65be27845400	1508	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void)
AnnaBridge	172:65be27845400	1509	{
AnnaBridge	172:65be27845400	1510	return (READ_BIT(PWR->SR2, PWR_SR2_REGLPF) == (PWR_SR2_REGLPF));
AnnaBridge	172:65be27845400	1511	}
AnnaBridge	172:65be27845400	1512
AnnaBridge	172:65be27845400	1513	/**
AnnaBridge	172:65be27845400	1514	* @brief Indicate whether or not the low-power regulator is ready
AnnaBridge	172:65be27845400	1515	* @rmtoll SR2 REGLPS LL_PWR_IsActiveFlag_REGLPS
AnnaBridge	172:65be27845400	1516	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1517	*/
AnnaBridge	172:65be27845400	1518	__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPS(void)
AnnaBridge	172:65be27845400	1519	{
AnnaBridge	172:65be27845400	1520	return (READ_BIT(PWR->SR2, PWR_SR2_REGLPS) == (PWR_SR2_REGLPS));
AnnaBridge	172:65be27845400	1521	}
AnnaBridge	172:65be27845400	1522
AnnaBridge	172:65be27845400	1523	/**
AnnaBridge	172:65be27845400	1524	* @}
AnnaBridge	172:65be27845400	1525	*/
AnnaBridge	172:65be27845400	1526
AnnaBridge	172:65be27845400	1527	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	1528	/** @defgroup PWR_LL_EF_Init De-initialization function
AnnaBridge	172:65be27845400	1529	* @{
AnnaBridge	172:65be27845400	1530	*/
AnnaBridge	172:65be27845400	1531	ErrorStatus LL_PWR_DeInit(void);
AnnaBridge	172:65be27845400	1532	/**
AnnaBridge	172:65be27845400	1533	* @}
AnnaBridge	172:65be27845400	1534	*/
AnnaBridge	172:65be27845400	1535	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	172:65be27845400	1536
AnnaBridge	172:65be27845400	1537	/** @defgroup PWR_LL_EF_Legacy_Functions Legacy functions name
AnnaBridge	172:65be27845400	1538	* @{
AnnaBridge	172:65be27845400	1539	*/
AnnaBridge	172:65be27845400	1540	/* Old functions name kept for legacy purpose, to be replaced by the */
AnnaBridge	172:65be27845400	1541	/* current functions name. */
AnnaBridge	172:65be27845400	1542	#define LL_PWR_IsActiveFlag_VOSF LL_PWR_IsActiveFlag_VOS
AnnaBridge	172:65be27845400	1543	/**
AnnaBridge	172:65be27845400	1544	* @}
AnnaBridge	172:65be27845400	1545	*/
AnnaBridge	172:65be27845400	1546
AnnaBridge	172:65be27845400	1547	/**
AnnaBridge	172:65be27845400	1548	* @}
AnnaBridge	172:65be27845400	1549	*/
AnnaBridge	172:65be27845400	1550
AnnaBridge	172:65be27845400	1551	/**
AnnaBridge	172:65be27845400	1552	* @}
AnnaBridge	172:65be27845400	1553	*/
AnnaBridge	172:65be27845400	1554
AnnaBridge	172:65be27845400	1555	#endif /* defined(PWR) */
AnnaBridge	172:65be27845400	1556
AnnaBridge	172:65be27845400	1557	/**
AnnaBridge	172:65be27845400	1558	* @}
AnnaBridge	172:65be27845400	1559	*/
AnnaBridge	172:65be27845400	1560
AnnaBridge	172:65be27845400	1561	#ifdef __cplusplus
AnnaBridge	172:65be27845400	1562	}
AnnaBridge	172:65be27845400	1563	#endif
AnnaBridge	172:65be27845400	1564
AnnaBridge	172:65be27845400	1565	#endif /* __STM32L4xx_LL_PWR_H */
AnnaBridge	172:65be27845400	1566
AnnaBridge	172:65be27845400	1567	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/