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TARGET_MIMXRT1050_EVK/TOOLCHAIN_IAR/fsl_qtmr.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /*
AnnaBridge 170:e95d10626187 2 * The Clear BSD License
AnnaBridge 161:aa5281ff4a02 3 * Copyright 2017 NXP
AnnaBridge 170:e95d10626187 4 * All rights reserved.
AnnaBridge 170:e95d10626187 5 *
AnnaBridge 161:aa5281ff4a02 6 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 170:e95d10626187 7 * are permitted (subject to the limitations in the disclaimer below) provided
AnnaBridge 170:e95d10626187 8 * that the following conditions are met:
AnnaBridge 161:aa5281ff4a02 9 *
AnnaBridge 161:aa5281ff4a02 10 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 161:aa5281ff4a02 11 * of conditions and the following disclaimer.
AnnaBridge 161:aa5281ff4a02 12 *
AnnaBridge 161:aa5281ff4a02 13 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 161:aa5281ff4a02 14 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 161:aa5281ff4a02 15 * other materials provided with the distribution.
AnnaBridge 161:aa5281ff4a02 16 *
AnnaBridge 161:aa5281ff4a02 17 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 161:aa5281ff4a02 18 * contributors may be used to endorse or promote products derived from this
AnnaBridge 161:aa5281ff4a02 19 * software without specific prior written permission.
AnnaBridge 161:aa5281ff4a02 20 *
AnnaBridge 170:e95d10626187 21 * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
AnnaBridge 161:aa5281ff4a02 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 161:aa5281ff4a02 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 161:aa5281ff4a02 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 161:aa5281ff4a02 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 161:aa5281ff4a02 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 161:aa5281ff4a02 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 161:aa5281ff4a02 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 161:aa5281ff4a02 29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 161:aa5281ff4a02 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 161:aa5281ff4a02 31 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 161:aa5281ff4a02 32 */
AnnaBridge 161:aa5281ff4a02 33 #ifndef _FSL_QTMR_H_
AnnaBridge 161:aa5281ff4a02 34 #define _FSL_QTMR_H_
AnnaBridge 161:aa5281ff4a02 35
AnnaBridge 161:aa5281ff4a02 36 #include "fsl_common.h"
AnnaBridge 161:aa5281ff4a02 37
AnnaBridge 161:aa5281ff4a02 38 /*!
AnnaBridge 161:aa5281ff4a02 39 * @addtogroup qtmr
AnnaBridge 161:aa5281ff4a02 40 * @{
AnnaBridge 161:aa5281ff4a02 41 */
AnnaBridge 161:aa5281ff4a02 42
AnnaBridge 161:aa5281ff4a02 43
AnnaBridge 161:aa5281ff4a02 44 /*******************************************************************************
AnnaBridge 161:aa5281ff4a02 45 * Definitions
AnnaBridge 161:aa5281ff4a02 46 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 47
AnnaBridge 161:aa5281ff4a02 48 /*! @name Driver version */
AnnaBridge 161:aa5281ff4a02 49 /*@{*/
AnnaBridge 161:aa5281ff4a02 50 #define FSL_QTMR_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0 */
AnnaBridge 161:aa5281ff4a02 51 /*@}*/
AnnaBridge 161:aa5281ff4a02 52
AnnaBridge 161:aa5281ff4a02 53 /*! @brief Quad Timer primary clock source selection*/
AnnaBridge 161:aa5281ff4a02 54 typedef enum _qtmr_primary_count_source
AnnaBridge 161:aa5281ff4a02 55 {
AnnaBridge 161:aa5281ff4a02 56 kQTMR_ClockCounter0InputPin = 0, /*!< Use counter 0 input pin */
AnnaBridge 161:aa5281ff4a02 57 kQTMR_ClockCounter1InputPin, /*!< Use counter 1 input pin */
AnnaBridge 161:aa5281ff4a02 58 kQTMR_ClockCounter2InputPin, /*!< Use counter 2 input pin */
AnnaBridge 161:aa5281ff4a02 59 kQTMR_ClockCounter3InputPin, /*!< Use counter 3 input pin */
AnnaBridge 161:aa5281ff4a02 60 kQTMR_ClockCounter0Output, /*!< Use counter 0 output */
AnnaBridge 161:aa5281ff4a02 61 kQTMR_ClockCounter1Output, /*!< Use counter 1 output */
AnnaBridge 161:aa5281ff4a02 62 kQTMR_ClockCounter2Output, /*!< Use counter 2 output */
AnnaBridge 161:aa5281ff4a02 63 kQTMR_ClockCounter3Output, /*!< Use counter 3 output */
AnnaBridge 161:aa5281ff4a02 64 kQTMR_ClockDivide_1, /*!< IP bus clock divide by 1 prescaler */
AnnaBridge 161:aa5281ff4a02 65 kQTMR_ClockDivide_2, /*!< IP bus clock divide by 2 prescaler */
AnnaBridge 161:aa5281ff4a02 66 kQTMR_ClockDivide_4, /*!< IP bus clock divide by 4 prescaler */
AnnaBridge 161:aa5281ff4a02 67 kQTMR_ClockDivide_8, /*!< IP bus clock divide by 8 prescaler */
AnnaBridge 161:aa5281ff4a02 68 kQTMR_ClockDivide_16, /*!< IP bus clock divide by 16 prescaler */
AnnaBridge 161:aa5281ff4a02 69 kQTMR_ClockDivide_32, /*!< IP bus clock divide by 32 prescaler */
AnnaBridge 161:aa5281ff4a02 70 kQTMR_ClockDivide_64, /*!< IP bus clock divide by 64 prescaler */
AnnaBridge 161:aa5281ff4a02 71 kQTMR_ClockDivide_128 /*!< IP bus clock divide by 128 prescaler */
AnnaBridge 161:aa5281ff4a02 72 } qtmr_primary_count_source_t;
AnnaBridge 161:aa5281ff4a02 73
AnnaBridge 161:aa5281ff4a02 74 /*! @brief Quad Timer input sources selection*/
AnnaBridge 161:aa5281ff4a02 75 typedef enum _qtmr_input_source
AnnaBridge 161:aa5281ff4a02 76 {
AnnaBridge 161:aa5281ff4a02 77 kQTMR_Counter0InputPin = 0, /*!< Use counter 0 input pin */
AnnaBridge 161:aa5281ff4a02 78 kQTMR_Counter1InputPin, /*!< Use counter 1 input pin */
AnnaBridge 161:aa5281ff4a02 79 kQTMR_Counter2InputPin, /*!< Use counter 2 input pin */
AnnaBridge 161:aa5281ff4a02 80 kQTMR_Counter3InputPin /*!< Use counter 3 input pin */
AnnaBridge 161:aa5281ff4a02 81 } qtmr_input_source_t;
AnnaBridge 161:aa5281ff4a02 82
AnnaBridge 161:aa5281ff4a02 83 /*! @brief Quad Timer counting mode selection */
AnnaBridge 161:aa5281ff4a02 84 typedef enum _qtmr_counting_mode
AnnaBridge 161:aa5281ff4a02 85 {
AnnaBridge 161:aa5281ff4a02 86 kQTMR_NoOperation = 0, /*!< No operation */
AnnaBridge 161:aa5281ff4a02 87 kQTMR_PriSrcRiseEdge, /*!< Count rising edges or primary source */
AnnaBridge 161:aa5281ff4a02 88 kQTMR_PriSrcRiseAndFallEdge, /*!< Count rising and falling edges of primary source */
AnnaBridge 161:aa5281ff4a02 89 kQTMR_PriSrcRiseEdgeSecInpHigh, /*!< Count rise edges of pri SRC while sec inp high active */
AnnaBridge 161:aa5281ff4a02 90 kQTMR_QuadCountMode, /*!< Quadrature count mode, uses pri and sec sources */
AnnaBridge 161:aa5281ff4a02 91 kQTMR_PriSrcRiseEdgeSecDir, /*!< Count rising edges of pri SRC; sec SRC specifies dir */
AnnaBridge 161:aa5281ff4a02 92 kQTMR_SecSrcTrigPriCnt, /*!< Edge of sec SRC trigger primary count until compare*/
AnnaBridge 161:aa5281ff4a02 93 kQTMR_CascadeCount /*!< Cascaded count mode (up/down) */
AnnaBridge 161:aa5281ff4a02 94 } qtmr_counting_mode_t;
AnnaBridge 161:aa5281ff4a02 95
AnnaBridge 161:aa5281ff4a02 96 /*! @brief Quad Timer output mode selection*/
AnnaBridge 161:aa5281ff4a02 97 typedef enum _qtmr_output_mode
AnnaBridge 161:aa5281ff4a02 98 {
AnnaBridge 161:aa5281ff4a02 99 kQTMR_AssertWhenCountActive = 0, /*!< Assert OFLAG while counter is active*/
AnnaBridge 161:aa5281ff4a02 100 kQTMR_ClearOnCompare, /*!< Clear OFLAG on successful compare */
AnnaBridge 161:aa5281ff4a02 101 kQTMR_SetOnCompare, /*!< Set OFLAG on successful compare */
AnnaBridge 161:aa5281ff4a02 102 kQTMR_ToggleOnCompare, /*!< Toggle OFLAG on successful compare */
AnnaBridge 161:aa5281ff4a02 103 kQTMR_ToggleOnAltCompareReg, /*!< Toggle OFLAG using alternating compare registers */
AnnaBridge 161:aa5281ff4a02 104 kQTMR_SetOnCompareClearOnSecSrcInp, /*!< Set OFLAG on compare, clear on sec SRC input edge */
AnnaBridge 161:aa5281ff4a02 105 kQTMR_SetOnCompareClearOnCountRoll, /*!< Set OFLAG on compare, clear on counter rollover */
AnnaBridge 161:aa5281ff4a02 106 kQTMR_EnableGateClock /*!< Enable gated clock output while count is active */
AnnaBridge 161:aa5281ff4a02 107 } qtmr_output_mode_t;
AnnaBridge 161:aa5281ff4a02 108
AnnaBridge 161:aa5281ff4a02 109 /*! @brief Quad Timer input capture edge mode, rising edge, or falling edge */
AnnaBridge 161:aa5281ff4a02 110 typedef enum _qtmr_input_capture_edge
AnnaBridge 161:aa5281ff4a02 111 {
AnnaBridge 161:aa5281ff4a02 112 kQTMR_NoCapture = 0, /*!< Capture is disabled */
AnnaBridge 161:aa5281ff4a02 113 kQTMR_RisingEdge, /*!< Capture on rising edge (IPS=0) or falling edge (IPS=1)*/
AnnaBridge 161:aa5281ff4a02 114 kQTMR_FallingEdge, /*!< Capture on falling edge (IPS=0) or rising edge (IPS=1)*/
AnnaBridge 161:aa5281ff4a02 115 kQTMR_RisingAndFallingEdge /*!< Capture on both edges */
AnnaBridge 161:aa5281ff4a02 116 } qtmr_input_capture_edge_t;
AnnaBridge 161:aa5281ff4a02 117
AnnaBridge 161:aa5281ff4a02 118 /*! @brief Quad Timer input capture edge mode, rising edge, or falling edge */
AnnaBridge 161:aa5281ff4a02 119 typedef enum _qtmr_preload_control
AnnaBridge 161:aa5281ff4a02 120 {
AnnaBridge 161:aa5281ff4a02 121 kQTMR_NoPreload = 0, /*!< Never preload */
AnnaBridge 161:aa5281ff4a02 122 kQTMR_LoadOnComp1, /*!< Load upon successful compare with value in COMP1 */
AnnaBridge 161:aa5281ff4a02 123 kQTMR_LoadOnComp2 /*!< Load upon successful compare with value in COMP2*/
AnnaBridge 161:aa5281ff4a02 124 } qtmr_preload_control_t;
AnnaBridge 161:aa5281ff4a02 125
AnnaBridge 161:aa5281ff4a02 126 /*! @brief List of Quad Timer run options when in Debug mode */
AnnaBridge 161:aa5281ff4a02 127 typedef enum _qtmr_debug_action
AnnaBridge 161:aa5281ff4a02 128 {
AnnaBridge 161:aa5281ff4a02 129 kQTMR_RunNormalInDebug = 0U, /*!< Continue with normal operation */
AnnaBridge 161:aa5281ff4a02 130 kQTMR_HaltCounter, /*!< Halt counter */
AnnaBridge 161:aa5281ff4a02 131 kQTMR_ForceOutToZero, /*!< Force output to logic 0 */
AnnaBridge 161:aa5281ff4a02 132 kQTMR_HaltCountForceOutZero /*!< Halt counter and force output to logic 0 */
AnnaBridge 161:aa5281ff4a02 133 } qtmr_debug_action_t;
AnnaBridge 161:aa5281ff4a02 134
AnnaBridge 161:aa5281ff4a02 135 /*! @brief List of Quad Timer interrupts */
AnnaBridge 161:aa5281ff4a02 136 typedef enum _qtmr_interrupt_enable
AnnaBridge 161:aa5281ff4a02 137 {
AnnaBridge 161:aa5281ff4a02 138 kQTMR_CompareInterruptEnable = (1U << 0), /*!< Compare interrupt.*/
AnnaBridge 161:aa5281ff4a02 139 kQTMR_Compare1InterruptEnable = (1U << 1), /*!< Compare 1 interrupt.*/
AnnaBridge 161:aa5281ff4a02 140 kQTMR_Compare2InterruptEnable = (1U << 2), /*!< Compare 2 interrupt.*/
AnnaBridge 161:aa5281ff4a02 141 kQTMR_OverflowInterruptEnable = (1U << 3), /*!< Timer overflow interrupt.*/
AnnaBridge 161:aa5281ff4a02 142 kQTMR_EdgeInterruptEnable = (1U << 4) /*!< Input edge interrupt.*/
AnnaBridge 161:aa5281ff4a02 143 } qtmr_interrupt_enable_t;
AnnaBridge 161:aa5281ff4a02 144
AnnaBridge 161:aa5281ff4a02 145 /*! @brief List of Quad Timer flags */
AnnaBridge 161:aa5281ff4a02 146 typedef enum _qtmr_status_flags
AnnaBridge 161:aa5281ff4a02 147 {
AnnaBridge 161:aa5281ff4a02 148 kQTMR_CompareFlag = (1U << 0), /*!< Compare flag */
AnnaBridge 161:aa5281ff4a02 149 kQTMR_Compare1Flag = (1U << 1), /*!< Compare 1 flag */
AnnaBridge 161:aa5281ff4a02 150 kQTMR_Compare2Flag = (1U << 2), /*!< Compare 2 flag */
AnnaBridge 161:aa5281ff4a02 151 kQTMR_OverflowFlag = (1U << 3), /*!< Timer overflow flag */
AnnaBridge 161:aa5281ff4a02 152 kQTMR_EdgeFlag = (1U << 4) /*!< Input edge flag */
AnnaBridge 161:aa5281ff4a02 153 } qtmr_status_flags_t;
AnnaBridge 161:aa5281ff4a02 154
AnnaBridge 161:aa5281ff4a02 155 /*! @brief List of channel selection */
AnnaBridge 161:aa5281ff4a02 156 typedef enum _qtmr_channel_selection
AnnaBridge 161:aa5281ff4a02 157 {
AnnaBridge 161:aa5281ff4a02 158 kQTMR_Channel_0 = 0U, /*!< TMR Channel 0 */
AnnaBridge 161:aa5281ff4a02 159 kQTMR_Channel_1, /*!< TMR Channel 1 */
AnnaBridge 161:aa5281ff4a02 160 kQTMR_Channel_2, /*!< TMR Channel 2 */
AnnaBridge 161:aa5281ff4a02 161 kQTMR_Channel_3, /*!< TMR Channel 3 */
AnnaBridge 161:aa5281ff4a02 162 } qtmr_channel_selection_t;
AnnaBridge 161:aa5281ff4a02 163
AnnaBridge 161:aa5281ff4a02 164 /*! @brief List of Quad Timer DMA enable */
AnnaBridge 161:aa5281ff4a02 165 typedef enum _qtmr_dma_enable
AnnaBridge 161:aa5281ff4a02 166 {
AnnaBridge 161:aa5281ff4a02 167 kQTMR_InputEdgeFlagDmaEnable = (1U << 0), /*!< Input Edge Flag DMA Enable.*/
AnnaBridge 161:aa5281ff4a02 168 kQTMR_ComparatorPreload1DmaEnable = (1U << 1), /*!< Comparator Preload Register 1 DMA Enable.*/
AnnaBridge 161:aa5281ff4a02 169 kQTMR_ComparatorPreload2DmaEnable = (1U << 2), /*!< Comparator Preload Register 2 DMA Enable.*/
AnnaBridge 161:aa5281ff4a02 170 } qtmr_dma_enable_t;
AnnaBridge 161:aa5281ff4a02 171
AnnaBridge 161:aa5281ff4a02 172 /*!
AnnaBridge 161:aa5281ff4a02 173 * @brief Quad Timer config structure
AnnaBridge 161:aa5281ff4a02 174 *
AnnaBridge 161:aa5281ff4a02 175 * This structure holds the configuration settings for the Quad Timer peripheral. To initialize this
AnnaBridge 161:aa5281ff4a02 176 * structure to reasonable defaults, call the QTMR_GetDefaultConfig() function and pass a
AnnaBridge 161:aa5281ff4a02 177 * pointer to your config structure instance.
AnnaBridge 161:aa5281ff4a02 178 *
AnnaBridge 161:aa5281ff4a02 179 * The config struct can be made const so it resides in flash
AnnaBridge 161:aa5281ff4a02 180 */
AnnaBridge 161:aa5281ff4a02 181 typedef struct _qtmr_config
AnnaBridge 161:aa5281ff4a02 182 {
AnnaBridge 161:aa5281ff4a02 183 qtmr_primary_count_source_t primarySource; /*!< Specify the primary count source */
AnnaBridge 161:aa5281ff4a02 184 qtmr_input_source_t secondarySource; /*!< Specify the secondary count source */
AnnaBridge 161:aa5281ff4a02 185 bool enableMasterMode; /*!< true: Broadcast compare function output to other counters;
AnnaBridge 161:aa5281ff4a02 186 false no broadcast */
AnnaBridge 161:aa5281ff4a02 187 bool enableExternalForce; /*!< true: Compare from another counter force state of OFLAG signal
AnnaBridge 161:aa5281ff4a02 188 false: OFLAG controlled by local counter */
AnnaBridge 161:aa5281ff4a02 189 uint8_t faultFilterCount; /*!< Fault filter count */
AnnaBridge 161:aa5281ff4a02 190 uint8_t faultFilterPeriod; /*!< Fault filter period;value of 0 will bypass the filter */
AnnaBridge 161:aa5281ff4a02 191 qtmr_debug_action_t debugMode; /*!< Operation in Debug mode */
AnnaBridge 161:aa5281ff4a02 192 } qtmr_config_t;
AnnaBridge 161:aa5281ff4a02 193
AnnaBridge 161:aa5281ff4a02 194 /*******************************************************************************
AnnaBridge 161:aa5281ff4a02 195 * API
AnnaBridge 161:aa5281ff4a02 196 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 197
AnnaBridge 161:aa5281ff4a02 198 #if defined(__cplusplus)
AnnaBridge 161:aa5281ff4a02 199 extern "C" {
AnnaBridge 161:aa5281ff4a02 200 #endif
AnnaBridge 161:aa5281ff4a02 201
AnnaBridge 161:aa5281ff4a02 202 /*!
AnnaBridge 161:aa5281ff4a02 203 * @name Initialization and deinitialization
AnnaBridge 161:aa5281ff4a02 204 * @{
AnnaBridge 161:aa5281ff4a02 205 */
AnnaBridge 161:aa5281ff4a02 206
AnnaBridge 161:aa5281ff4a02 207 /*!
AnnaBridge 161:aa5281ff4a02 208 * @brief Ungates the Quad Timer clock and configures the peripheral for basic operation.
AnnaBridge 161:aa5281ff4a02 209 *
AnnaBridge 161:aa5281ff4a02 210 * @note This API should be called at the beginning of the application using the Quad Timer driver.
AnnaBridge 161:aa5281ff4a02 211 *
AnnaBridge 161:aa5281ff4a02 212 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 213 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 214 * @param config Pointer to user's Quad Timer config structure
AnnaBridge 161:aa5281ff4a02 215 */
AnnaBridge 161:aa5281ff4a02 216 void QTMR_Init(TMR_Type *base, qtmr_channel_selection_t channel, const qtmr_config_t *config);
AnnaBridge 161:aa5281ff4a02 217
AnnaBridge 161:aa5281ff4a02 218 /*!
AnnaBridge 161:aa5281ff4a02 219 * @brief Stops the counter and gates the Quad Timer clock
AnnaBridge 161:aa5281ff4a02 220 *
AnnaBridge 161:aa5281ff4a02 221 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 222 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 223 */
AnnaBridge 161:aa5281ff4a02 224 void QTMR_Deinit(TMR_Type *base, qtmr_channel_selection_t channel);
AnnaBridge 161:aa5281ff4a02 225
AnnaBridge 161:aa5281ff4a02 226 /*!
AnnaBridge 161:aa5281ff4a02 227 * @brief Fill in the Quad Timer config struct with the default settings
AnnaBridge 161:aa5281ff4a02 228 *
AnnaBridge 161:aa5281ff4a02 229 * The default values are:
AnnaBridge 161:aa5281ff4a02 230 * @code
AnnaBridge 161:aa5281ff4a02 231 * config->debugMode = kQTMR_RunNormalInDebug;
AnnaBridge 161:aa5281ff4a02 232 * config->enableExternalForce = false;
AnnaBridge 161:aa5281ff4a02 233 * config->enableMasterMode = false;
AnnaBridge 161:aa5281ff4a02 234 * config->faultFilterCount = 0;
AnnaBridge 161:aa5281ff4a02 235 * config->faultFilterPeriod = 0;
AnnaBridge 161:aa5281ff4a02 236 * config->primarySource = kQTMR_ClockDivide_2;
AnnaBridge 161:aa5281ff4a02 237 * config->secondarySource = kQTMR_Counter0InputPin;
AnnaBridge 161:aa5281ff4a02 238 * @endcode
AnnaBridge 161:aa5281ff4a02 239 * @param config Pointer to user's Quad Timer config structure.
AnnaBridge 161:aa5281ff4a02 240 */
AnnaBridge 161:aa5281ff4a02 241 void QTMR_GetDefaultConfig(qtmr_config_t *config);
AnnaBridge 161:aa5281ff4a02 242
AnnaBridge 161:aa5281ff4a02 243 /*! @}*/
AnnaBridge 161:aa5281ff4a02 244
AnnaBridge 161:aa5281ff4a02 245 /*!
AnnaBridge 161:aa5281ff4a02 246 * @brief Sets up Quad timer module for PWM signal output.
AnnaBridge 161:aa5281ff4a02 247 *
AnnaBridge 161:aa5281ff4a02 248 * The function initializes the timer module according to the parameters passed in by the user. The
AnnaBridge 161:aa5281ff4a02 249 * function also sets up the value compare registers to match the PWM signal requirements.
AnnaBridge 161:aa5281ff4a02 250 *
AnnaBridge 161:aa5281ff4a02 251 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 252 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 253 * @param pwmFreqHz PWM signal frequency in Hz
AnnaBridge 161:aa5281ff4a02 254 * @param dutyCyclePercent PWM pulse width, value should be between 0 to 100
AnnaBridge 161:aa5281ff4a02 255 * 0=inactive signal(0% duty cycle)...
AnnaBridge 161:aa5281ff4a02 256 * 100=active signal (100% duty cycle)
AnnaBridge 161:aa5281ff4a02 257 * @param outputPolarity true: invert polarity of the output signal, false: no inversion
AnnaBridge 161:aa5281ff4a02 258 * @param srcClock_Hz Main counter clock in Hz.
AnnaBridge 161:aa5281ff4a02 259 *
AnnaBridge 161:aa5281ff4a02 260 * @return Returns an error if there was error setting up the signal.
AnnaBridge 161:aa5281ff4a02 261 */
AnnaBridge 161:aa5281ff4a02 262 status_t QTMR_SetupPwm(
AnnaBridge 161:aa5281ff4a02 263 TMR_Type *base, qtmr_channel_selection_t channel, uint32_t pwmFreqHz, uint8_t dutyCyclePercent, bool outputPolarity, uint32_t srcClock_Hz);
AnnaBridge 161:aa5281ff4a02 264
AnnaBridge 161:aa5281ff4a02 265 /*!
AnnaBridge 161:aa5281ff4a02 266 * @brief Allows the user to count the source clock cycles until a capture event arrives.
AnnaBridge 161:aa5281ff4a02 267 *
AnnaBridge 161:aa5281ff4a02 268 * The count is stored in the capture register.
AnnaBridge 161:aa5281ff4a02 269 *
AnnaBridge 161:aa5281ff4a02 270 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 271 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 272 * @param capturePin Pin through which we receive the input signal to trigger the capture
AnnaBridge 161:aa5281ff4a02 273 * @param inputPolarity true: invert polarity of the input signal, false: no inversion
AnnaBridge 161:aa5281ff4a02 274 * @param reloadOnCapture true: reload the counter when an input capture occurs, false: no reload
AnnaBridge 161:aa5281ff4a02 275 * @param captureMode Specifies which edge of the input signal triggers a capture
AnnaBridge 161:aa5281ff4a02 276 */
AnnaBridge 161:aa5281ff4a02 277 void QTMR_SetupInputCapture(TMR_Type *base,
AnnaBridge 161:aa5281ff4a02 278 qtmr_channel_selection_t channel,
AnnaBridge 161:aa5281ff4a02 279 qtmr_input_source_t capturePin,
AnnaBridge 161:aa5281ff4a02 280 bool inputPolarity,
AnnaBridge 161:aa5281ff4a02 281 bool reloadOnCapture,
AnnaBridge 161:aa5281ff4a02 282 qtmr_input_capture_edge_t captureMode);
AnnaBridge 161:aa5281ff4a02 283
AnnaBridge 161:aa5281ff4a02 284 /*!
AnnaBridge 161:aa5281ff4a02 285 * @name Interrupt Interface
AnnaBridge 161:aa5281ff4a02 286 * @{
AnnaBridge 161:aa5281ff4a02 287 */
AnnaBridge 161:aa5281ff4a02 288
AnnaBridge 161:aa5281ff4a02 289 /*!
AnnaBridge 161:aa5281ff4a02 290 * @brief Enables the selected Quad Timer interrupts
AnnaBridge 161:aa5281ff4a02 291 *
AnnaBridge 161:aa5281ff4a02 292 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 293 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 294 * @param mask The interrupts to enable. This is a logical OR of members of the
AnnaBridge 161:aa5281ff4a02 295 * enumeration ::qtmr_interrupt_enable_t
AnnaBridge 161:aa5281ff4a02 296 */
AnnaBridge 161:aa5281ff4a02 297 void QTMR_EnableInterrupts(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask);
AnnaBridge 161:aa5281ff4a02 298
AnnaBridge 161:aa5281ff4a02 299 /*!
AnnaBridge 161:aa5281ff4a02 300 * @brief Disables the selected Quad Timer interrupts
AnnaBridge 161:aa5281ff4a02 301 *
AnnaBridge 161:aa5281ff4a02 302 * @param base Quad Timer peripheral base addres
AnnaBridge 161:aa5281ff4a02 303 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 304 * @param mask The interrupts to enable. This is a logical OR of members of the
AnnaBridge 161:aa5281ff4a02 305 * enumeration ::qtmr_interrupt_enable_t
AnnaBridge 161:aa5281ff4a02 306 */
AnnaBridge 161:aa5281ff4a02 307 void QTMR_DisableInterrupts(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask);
AnnaBridge 161:aa5281ff4a02 308
AnnaBridge 161:aa5281ff4a02 309 /*!
AnnaBridge 161:aa5281ff4a02 310 * @brief Gets the enabled Quad Timer interrupts
AnnaBridge 161:aa5281ff4a02 311 *
AnnaBridge 161:aa5281ff4a02 312 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 313 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 314 *
AnnaBridge 161:aa5281ff4a02 315 * @return The enabled interrupts. This is the logical OR of members of the
AnnaBridge 161:aa5281ff4a02 316 * enumeration ::qtmr_interrupt_enable_t
AnnaBridge 161:aa5281ff4a02 317 */
AnnaBridge 161:aa5281ff4a02 318 uint32_t QTMR_GetEnabledInterrupts(TMR_Type *base, qtmr_channel_selection_t channel);
AnnaBridge 161:aa5281ff4a02 319
AnnaBridge 161:aa5281ff4a02 320 /*! @}*/
AnnaBridge 161:aa5281ff4a02 321
AnnaBridge 161:aa5281ff4a02 322 /*!
AnnaBridge 161:aa5281ff4a02 323 * @name Status Interface
AnnaBridge 161:aa5281ff4a02 324 * @{
AnnaBridge 161:aa5281ff4a02 325 */
AnnaBridge 161:aa5281ff4a02 326
AnnaBridge 161:aa5281ff4a02 327 /*!
AnnaBridge 161:aa5281ff4a02 328 * @brief Gets the Quad Timer status flags
AnnaBridge 161:aa5281ff4a02 329 *
AnnaBridge 161:aa5281ff4a02 330 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 331 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 332 *
AnnaBridge 161:aa5281ff4a02 333 * @return The status flags. This is the logical OR of members of the
AnnaBridge 161:aa5281ff4a02 334 * enumeration ::qtmr_status_flags_t
AnnaBridge 161:aa5281ff4a02 335 */
AnnaBridge 161:aa5281ff4a02 336 uint32_t QTMR_GetStatus(TMR_Type *base, qtmr_channel_selection_t channel);
AnnaBridge 161:aa5281ff4a02 337
AnnaBridge 161:aa5281ff4a02 338 /*!
AnnaBridge 161:aa5281ff4a02 339 * @brief Clears the Quad Timer status flags.
AnnaBridge 161:aa5281ff4a02 340 *
AnnaBridge 161:aa5281ff4a02 341 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 342 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 343 * @param mask The status flags to clear. This is a logical OR of members of the
AnnaBridge 161:aa5281ff4a02 344 * enumeration ::qtmr_status_flags_t
AnnaBridge 161:aa5281ff4a02 345 */
AnnaBridge 161:aa5281ff4a02 346 void QTMR_ClearStatusFlags(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask);
AnnaBridge 161:aa5281ff4a02 347
AnnaBridge 161:aa5281ff4a02 348 /*! @}*/
AnnaBridge 161:aa5281ff4a02 349
AnnaBridge 161:aa5281ff4a02 350 /*!
AnnaBridge 161:aa5281ff4a02 351 * @name Read and Write the timer period
AnnaBridge 161:aa5281ff4a02 352 * @{
AnnaBridge 161:aa5281ff4a02 353 */
AnnaBridge 161:aa5281ff4a02 354
AnnaBridge 161:aa5281ff4a02 355 /*!
AnnaBridge 161:aa5281ff4a02 356 * @brief Sets the timer period in ticks.
AnnaBridge 161:aa5281ff4a02 357 *
AnnaBridge 161:aa5281ff4a02 358 * Timers counts from initial value till it equals the count value set here. The counter
AnnaBridge 161:aa5281ff4a02 359 * will then reinitialize to the value specified in the Load register.
AnnaBridge 161:aa5281ff4a02 360 *
AnnaBridge 161:aa5281ff4a02 361 * @note
AnnaBridge 161:aa5281ff4a02 362 * 1. This function will write the time period in ticks to COMP1 or COMP2 register
AnnaBridge 161:aa5281ff4a02 363 * depending on the count direction
AnnaBridge 161:aa5281ff4a02 364 * 2. User can call the utility macros provided in fsl_common.h to convert to ticks
AnnaBridge 161:aa5281ff4a02 365 * 3. This function supports cases, providing only primary source clock without secondary source clock.
AnnaBridge 161:aa5281ff4a02 366 *
AnnaBridge 161:aa5281ff4a02 367 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 368 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 369 * @param ticks Timer period in units of ticks
AnnaBridge 161:aa5281ff4a02 370 */
AnnaBridge 161:aa5281ff4a02 371 void QTMR_SetTimerPeriod(TMR_Type *base, qtmr_channel_selection_t channel, uint16_t ticks);
AnnaBridge 161:aa5281ff4a02 372
AnnaBridge 161:aa5281ff4a02 373 /*!
AnnaBridge 161:aa5281ff4a02 374 * @brief Reads the current timer counting value.
AnnaBridge 161:aa5281ff4a02 375 *
AnnaBridge 161:aa5281ff4a02 376 * This function returns the real-time timer counting value, in a range from 0 to a
AnnaBridge 161:aa5281ff4a02 377 * timer period.
AnnaBridge 161:aa5281ff4a02 378 *
AnnaBridge 161:aa5281ff4a02 379 * @note User can call the utility macros provided in fsl_common.h to convert ticks to usec or msec
AnnaBridge 161:aa5281ff4a02 380 *
AnnaBridge 161:aa5281ff4a02 381 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 382 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 383 *
AnnaBridge 161:aa5281ff4a02 384 * @return Current counter value in ticks
AnnaBridge 161:aa5281ff4a02 385 */
AnnaBridge 161:aa5281ff4a02 386 static inline uint16_t QTMR_GetCurrentTimerCount(TMR_Type *base, qtmr_channel_selection_t channel)
AnnaBridge 161:aa5281ff4a02 387 {
AnnaBridge 161:aa5281ff4a02 388 return base->CHANNEL[channel].CNTR;
AnnaBridge 161:aa5281ff4a02 389 }
AnnaBridge 161:aa5281ff4a02 390
AnnaBridge 161:aa5281ff4a02 391 /*! @}*/
AnnaBridge 161:aa5281ff4a02 392
AnnaBridge 161:aa5281ff4a02 393 /*!
AnnaBridge 161:aa5281ff4a02 394 * @name Timer Start and Stop
AnnaBridge 161:aa5281ff4a02 395 * @{
AnnaBridge 161:aa5281ff4a02 396 */
AnnaBridge 161:aa5281ff4a02 397
AnnaBridge 161:aa5281ff4a02 398 /*!
AnnaBridge 161:aa5281ff4a02 399 * @brief Starts the Quad Timer counter.
AnnaBridge 161:aa5281ff4a02 400 *
AnnaBridge 161:aa5281ff4a02 401 *
AnnaBridge 161:aa5281ff4a02 402 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 403 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 404 * @param clockSource Quad Timer clock source
AnnaBridge 161:aa5281ff4a02 405 */
AnnaBridge 161:aa5281ff4a02 406 static inline void QTMR_StartTimer(TMR_Type *base, qtmr_channel_selection_t channel, qtmr_counting_mode_t clockSource)
AnnaBridge 161:aa5281ff4a02 407 {
AnnaBridge 161:aa5281ff4a02 408 uint16_t reg = base->CHANNEL[channel].CTRL;
AnnaBridge 161:aa5281ff4a02 409
AnnaBridge 161:aa5281ff4a02 410 reg &= ~(TMR_CTRL_CM_MASK);
AnnaBridge 161:aa5281ff4a02 411 reg |= TMR_CTRL_CM(clockSource);
AnnaBridge 161:aa5281ff4a02 412 base->CHANNEL[channel].CTRL = reg;
AnnaBridge 161:aa5281ff4a02 413 }
AnnaBridge 161:aa5281ff4a02 414
AnnaBridge 161:aa5281ff4a02 415 /*!
AnnaBridge 161:aa5281ff4a02 416 * @brief Stops the Quad Timer counter.
AnnaBridge 161:aa5281ff4a02 417 *
AnnaBridge 161:aa5281ff4a02 418 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 419 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 420 */
AnnaBridge 161:aa5281ff4a02 421 static inline void QTMR_StopTimer(TMR_Type *base, qtmr_channel_selection_t channel)
AnnaBridge 161:aa5281ff4a02 422 {
AnnaBridge 161:aa5281ff4a02 423 base->CHANNEL[channel].CTRL &= ~TMR_CTRL_CM_MASK;
AnnaBridge 161:aa5281ff4a02 424 }
AnnaBridge 161:aa5281ff4a02 425
AnnaBridge 161:aa5281ff4a02 426 /*! @}*/
AnnaBridge 161:aa5281ff4a02 427
AnnaBridge 161:aa5281ff4a02 428 /*!
AnnaBridge 161:aa5281ff4a02 429 * @name Enable and Disable the Quad Timer DMA
AnnaBridge 161:aa5281ff4a02 430 * @{
AnnaBridge 161:aa5281ff4a02 431 */
AnnaBridge 161:aa5281ff4a02 432
AnnaBridge 161:aa5281ff4a02 433 /*!
AnnaBridge 161:aa5281ff4a02 434 * @brief Enable the Quad Timer DMA.
AnnaBridge 161:aa5281ff4a02 435 *
AnnaBridge 161:aa5281ff4a02 436 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 437 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 438 * @param mask The DMA to enable. This is a logical OR of members of the
AnnaBridge 161:aa5281ff4a02 439 * enumeration ::qtmr_dma_enable_t
AnnaBridge 161:aa5281ff4a02 440 */
AnnaBridge 161:aa5281ff4a02 441 void QTMR_EnableDma(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask);
AnnaBridge 161:aa5281ff4a02 442
AnnaBridge 161:aa5281ff4a02 443 /*!
AnnaBridge 161:aa5281ff4a02 444 * @brief Disable the Quad Timer DMA.
AnnaBridge 161:aa5281ff4a02 445 *
AnnaBridge 161:aa5281ff4a02 446 * @param base Quad Timer peripheral base address
AnnaBridge 161:aa5281ff4a02 447 * @param channel Quad Timer channel number
AnnaBridge 161:aa5281ff4a02 448 * @param mask The DMA to enable. This is a logical OR of members of the
AnnaBridge 161:aa5281ff4a02 449 * enumeration ::qtmr_dma_enable_t
AnnaBridge 161:aa5281ff4a02 450 */
AnnaBridge 161:aa5281ff4a02 451 void QTMR_DisableDma(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask);
AnnaBridge 161:aa5281ff4a02 452
AnnaBridge 161:aa5281ff4a02 453 /*! @}*/
AnnaBridge 161:aa5281ff4a02 454
AnnaBridge 161:aa5281ff4a02 455 #if defined(__cplusplus)
AnnaBridge 161:aa5281ff4a02 456 }
AnnaBridge 161:aa5281ff4a02 457 #endif
AnnaBridge 161:aa5281ff4a02 458
AnnaBridge 161:aa5281ff4a02 459 /*! @}*/
AnnaBridge 161:aa5281ff4a02 460
AnnaBridge 161:aa5281ff4a02 461 #endif /* _FSL_QTMR_H_ */