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TARGET_MIMXRT1050_EVK/TOOLCHAIN_IAR/fsl_phy.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /*
AnnaBridge 170:e95d10626187 2 * The Clear BSD License
AnnaBridge 161:aa5281ff4a02 3 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 161:aa5281ff4a02 4 * Copyright 2016-2017 NXP
AnnaBridge 170:e95d10626187 5 * All rights reserved.
AnnaBridge 170:e95d10626187 6 *
AnnaBridge 161:aa5281ff4a02 7 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 170:e95d10626187 8 * are permitted (subject to the limitations in the disclaimer below) provided
AnnaBridge 170:e95d10626187 9 * that the following conditions are met:
AnnaBridge 161:aa5281ff4a02 10 *
AnnaBridge 161:aa5281ff4a02 11 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 161:aa5281ff4a02 12 * of conditions and the following disclaimer.
AnnaBridge 161:aa5281ff4a02 13 *
AnnaBridge 161:aa5281ff4a02 14 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 161:aa5281ff4a02 15 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 161:aa5281ff4a02 16 * other materials provided with the distribution.
AnnaBridge 161:aa5281ff4a02 17 *
AnnaBridge 161:aa5281ff4a02 18 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 161:aa5281ff4a02 19 * contributors may be used to endorse or promote products derived from this
AnnaBridge 161:aa5281ff4a02 20 * software without specific prior written permission.
AnnaBridge 161:aa5281ff4a02 21 *
AnnaBridge 170:e95d10626187 22 * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
AnnaBridge 161:aa5281ff4a02 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 161:aa5281ff4a02 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 161:aa5281ff4a02 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 161:aa5281ff4a02 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 161:aa5281ff4a02 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 161:aa5281ff4a02 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 161:aa5281ff4a02 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 161:aa5281ff4a02 30 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 161:aa5281ff4a02 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 161:aa5281ff4a02 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 161:aa5281ff4a02 33 */
AnnaBridge 161:aa5281ff4a02 34 #ifndef _FSL_PHY_H_
AnnaBridge 161:aa5281ff4a02 35 #define _FSL_PHY_H_
AnnaBridge 161:aa5281ff4a02 36
AnnaBridge 161:aa5281ff4a02 37 #include "fsl_enet.h"
AnnaBridge 161:aa5281ff4a02 38
AnnaBridge 161:aa5281ff4a02 39 /*!
AnnaBridge 161:aa5281ff4a02 40 * @addtogroup phy_driver
AnnaBridge 161:aa5281ff4a02 41 * @{
AnnaBridge 161:aa5281ff4a02 42 */
AnnaBridge 161:aa5281ff4a02 43
AnnaBridge 161:aa5281ff4a02 44 /*******************************************************************************
AnnaBridge 161:aa5281ff4a02 45 * Definitions
AnnaBridge 161:aa5281ff4a02 46 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 47
AnnaBridge 161:aa5281ff4a02 48 /*! @brief PHY driver version */
AnnaBridge 161:aa5281ff4a02 49 #define FSL_PHY_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
AnnaBridge 161:aa5281ff4a02 50
AnnaBridge 161:aa5281ff4a02 51 /*! @brief Defines the PHY registers. */
AnnaBridge 161:aa5281ff4a02 52 #define PHY_BASICCONTROL_REG 0x00U /*!< The PHY basic control register. */
AnnaBridge 161:aa5281ff4a02 53 #define PHY_BASICSTATUS_REG 0x01U /*!< The PHY basic status register. */
AnnaBridge 161:aa5281ff4a02 54 #define PHY_ID1_REG 0x02U /*!< The PHY ID one register. */
AnnaBridge 161:aa5281ff4a02 55 #define PHY_ID2_REG 0x03U /*!< The PHY ID two register. */
AnnaBridge 161:aa5281ff4a02 56 #define PHY_AUTONEG_ADVERTISE_REG 0x04U /*!< The PHY auto-negotiate advertise register. */
AnnaBridge 161:aa5281ff4a02 57 #define PHY_CONTROL1_REG 0x1EU /*!< The PHY control one register. */
AnnaBridge 161:aa5281ff4a02 58 #define PHY_CONTROL2_REG 0x1FU /*!< The PHY control two register. */
AnnaBridge 161:aa5281ff4a02 59
AnnaBridge 161:aa5281ff4a02 60 #define PHY_CONTROL_ID1 0x22U /*!< The PHY ID1*/
AnnaBridge 161:aa5281ff4a02 61
AnnaBridge 161:aa5281ff4a02 62 /*! @brief Defines the mask flag in basic control register. */
AnnaBridge 161:aa5281ff4a02 63 #define PHY_BCTL_DUPLEX_MASK 0x0100U /*!< The PHY duplex bit mask. */
AnnaBridge 161:aa5281ff4a02 64 #define PHY_BCTL_RESTART_AUTONEG_MASK 0x0200U /*!< The PHY restart auto negotiation mask. */
AnnaBridge 161:aa5281ff4a02 65 #define PHY_BCTL_AUTONEG_MASK 0x1000U /*!< The PHY auto negotiation bit mask. */
AnnaBridge 161:aa5281ff4a02 66 #define PHY_BCTL_SPEED_MASK 0x2000U /*!< The PHY speed bit mask. */
AnnaBridge 161:aa5281ff4a02 67 #define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */
AnnaBridge 161:aa5281ff4a02 68 #define PHY_BCTL_RESET_MASK 0x8000U /*!< The PHY reset bit mask. */
AnnaBridge 161:aa5281ff4a02 69 #define PHY_BCTL_SPEED_100M_MASK 0x2000U /*!< The PHY 100M speed mask. */
AnnaBridge 161:aa5281ff4a02 70
AnnaBridge 161:aa5281ff4a02 71 /*!@brief Defines the mask flag of operation mode in control two register*/
AnnaBridge 161:aa5281ff4a02 72 #define PHY_CTL2_REMOTELOOP_MASK 0x0004U /*!< The PHY remote loopback mask. */
AnnaBridge 161:aa5281ff4a02 73 #define PHY_CTL2_REFCLK_SELECT_MASK 0x0080U /*!< The PHY RMII reference clock select. */
AnnaBridge 161:aa5281ff4a02 74 #define PHY_CTL1_10HALFDUPLEX_MASK 0x0001U /*!< The PHY 10M half duplex mask. */
AnnaBridge 161:aa5281ff4a02 75 #define PHY_CTL1_100HALFDUPLEX_MASK 0x0002U /*!< The PHY 100M half duplex mask. */
AnnaBridge 161:aa5281ff4a02 76 #define PHY_CTL1_10FULLDUPLEX_MASK 0x0005U /*!< The PHY 10M full duplex mask. */
AnnaBridge 161:aa5281ff4a02 77 #define PHY_CTL1_100FULLDUPLEX_MASK 0x0006U /*!< The PHY 100M full duplex mask. */
AnnaBridge 161:aa5281ff4a02 78 #define PHY_CTL1_SPEEDUPLX_MASK 0x0007U /*!< The PHY speed and duplex mask. */
AnnaBridge 161:aa5281ff4a02 79 #define PHY_CTL1_ENERGYDETECT_MASK 0x10U /*!< The PHY signal present on rx differential pair. */
AnnaBridge 161:aa5281ff4a02 80 #define PHY_CTL1_LINKUP_MASK 0x100U /*!< The PHY link up. */
AnnaBridge 161:aa5281ff4a02 81 #define PHY_LINK_READY_MASK (PHY_CTL1_ENERGYDETECT_MASK | PHY_CTL1_LINKUP_MASK)
AnnaBridge 161:aa5281ff4a02 82
AnnaBridge 161:aa5281ff4a02 83 /*! @brief Defines the mask flag in basic status register. */
AnnaBridge 161:aa5281ff4a02 84 #define PHY_BSTATUS_LINKSTATUS_MASK 0x0004U /*!< The PHY link status mask. */
AnnaBridge 161:aa5281ff4a02 85 #define PHY_BSTATUS_AUTONEGABLE_MASK 0x0008U /*!< The PHY auto-negotiation ability mask. */
AnnaBridge 161:aa5281ff4a02 86 #define PHY_BSTATUS_AUTONEGCOMP_MASK 0x0020U /*!< The PHY auto-negotiation complete mask. */
AnnaBridge 161:aa5281ff4a02 87
AnnaBridge 161:aa5281ff4a02 88 /*! @brief Defines the mask flag in PHY auto-negotiation advertise register. */
AnnaBridge 161:aa5281ff4a02 89 #define PHY_100BaseT4_ABILITY_MASK 0x200U /*!< The PHY have the T4 ability. */
AnnaBridge 161:aa5281ff4a02 90 #define PHY_100BASETX_FULLDUPLEX_MASK 0x100U /*!< The PHY has the 100M full duplex ability.*/
AnnaBridge 161:aa5281ff4a02 91 #define PHY_100BASETX_HALFDUPLEX_MASK 0x080U /*!< The PHY has the 100M full duplex ability.*/
AnnaBridge 161:aa5281ff4a02 92 #define PHY_10BASETX_FULLDUPLEX_MASK 0x040U /*!< The PHY has the 10M full duplex ability.*/
AnnaBridge 161:aa5281ff4a02 93 #define PHY_10BASETX_HALFDUPLEX_MASK 0x020U /*!< The PHY has the 10M full duplex ability.*/
AnnaBridge 161:aa5281ff4a02 94
AnnaBridge 161:aa5281ff4a02 95 /*! @brief Defines the PHY status. */
AnnaBridge 161:aa5281ff4a02 96 enum _phy_status
AnnaBridge 161:aa5281ff4a02 97 {
AnnaBridge 161:aa5281ff4a02 98 kStatus_PHY_SMIVisitTimeout = MAKE_STATUS(kStatusGroup_PHY, 1), /*!< ENET PHY SMI visit timeout. */
AnnaBridge 161:aa5281ff4a02 99 kStatus_PHY_AutoNegotiateFail = MAKE_STATUS(kStatusGroup_PHY, 2) /*!< ENET PHY AutoNegotiate Fail. */
AnnaBridge 161:aa5281ff4a02 100 };
AnnaBridge 161:aa5281ff4a02 101
AnnaBridge 161:aa5281ff4a02 102 /*! @brief Defines the PHY link speed. This is align with the speed for ENET MAC. */
AnnaBridge 161:aa5281ff4a02 103 typedef enum _phy_speed
AnnaBridge 161:aa5281ff4a02 104 {
AnnaBridge 161:aa5281ff4a02 105 kPHY_Speed10M = 0U, /*!< ENET PHY 10M speed. */
AnnaBridge 161:aa5281ff4a02 106 kPHY_Speed100M /*!< ENET PHY 100M speed. */
AnnaBridge 161:aa5281ff4a02 107 } phy_speed_t;
AnnaBridge 161:aa5281ff4a02 108
AnnaBridge 161:aa5281ff4a02 109 /*! @brief Defines the PHY link duplex. */
AnnaBridge 161:aa5281ff4a02 110 typedef enum _phy_duplex
AnnaBridge 161:aa5281ff4a02 111 {
AnnaBridge 161:aa5281ff4a02 112 kPHY_HalfDuplex = 0U, /*!< ENET PHY half duplex. */
AnnaBridge 161:aa5281ff4a02 113 kPHY_FullDuplex /*!< ENET PHY full duplex. */
AnnaBridge 161:aa5281ff4a02 114 } phy_duplex_t;
AnnaBridge 161:aa5281ff4a02 115
AnnaBridge 161:aa5281ff4a02 116 /*! @brief Defines the PHY loopback mode. */
AnnaBridge 161:aa5281ff4a02 117 typedef enum _phy_loop
AnnaBridge 161:aa5281ff4a02 118 {
AnnaBridge 161:aa5281ff4a02 119 kPHY_LocalLoop = 0U, /*!< ENET PHY local loopback. */
AnnaBridge 161:aa5281ff4a02 120 kPHY_RemoteLoop /*!< ENET PHY remote loopback. */
AnnaBridge 161:aa5281ff4a02 121 } phy_loop_t;
AnnaBridge 161:aa5281ff4a02 122
AnnaBridge 161:aa5281ff4a02 123 /*******************************************************************************
AnnaBridge 161:aa5281ff4a02 124 * API
AnnaBridge 161:aa5281ff4a02 125 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 126
AnnaBridge 161:aa5281ff4a02 127 #if defined(__cplusplus)
AnnaBridge 161:aa5281ff4a02 128 extern "C" {
AnnaBridge 161:aa5281ff4a02 129 #endif
AnnaBridge 161:aa5281ff4a02 130
AnnaBridge 161:aa5281ff4a02 131 /*!
AnnaBridge 161:aa5281ff4a02 132 * @name PHY Driver
AnnaBridge 161:aa5281ff4a02 133 * @{
AnnaBridge 161:aa5281ff4a02 134 */
AnnaBridge 161:aa5281ff4a02 135
AnnaBridge 161:aa5281ff4a02 136 /*!
AnnaBridge 161:aa5281ff4a02 137 * @brief Initializes PHY.
AnnaBridge 161:aa5281ff4a02 138 *
AnnaBridge 161:aa5281ff4a02 139 * This function initialize the SMI interface and initialize PHY.
AnnaBridge 161:aa5281ff4a02 140 * The SMI is the MII management interface between PHY and MAC, which should be
AnnaBridge 161:aa5281ff4a02 141 * firstly initialized before any other operation for PHY. The PHY initialize with auto-negotiation.
AnnaBridge 161:aa5281ff4a02 142 *
AnnaBridge 161:aa5281ff4a02 143 * @param base ENET peripheral base address.
AnnaBridge 161:aa5281ff4a02 144 * @param phyAddr The PHY address.
AnnaBridge 161:aa5281ff4a02 145 * @param srcClock_Hz The module clock frequency - system clock for MII management interface - SMI.
AnnaBridge 161:aa5281ff4a02 146 * @retval kStatus_Success PHY initialize success
AnnaBridge 161:aa5281ff4a02 147 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 161:aa5281ff4a02 148 * @retval kStatus_PHY_AutoNegotiateFail PHY auto negotiate fail
AnnaBridge 161:aa5281ff4a02 149 */
AnnaBridge 161:aa5281ff4a02 150 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
AnnaBridge 161:aa5281ff4a02 151
AnnaBridge 161:aa5281ff4a02 152 /*!
AnnaBridge 172:65be27845400 153 * @brief Initiates auto negotiation.
AnnaBridge 172:65be27845400 154 *
AnnaBridge 172:65be27845400 155 * @param base ENET peripheral base address.
AnnaBridge 172:65be27845400 156 * @param phyAddr The PHY address.
AnnaBridge 172:65be27845400 157 * @retval kStatus_Success PHY auto negotiation success
AnnaBridge 172:65be27845400 158 * @retval kStatus_PHY_AutoNegotiateFail PHY auto negotiate fail
AnnaBridge 172:65be27845400 159 */
AnnaBridge 172:65be27845400 160 status_t PHY_AutoNegotiation(ENET_Type *base, uint32_t phyAddr);
AnnaBridge 172:65be27845400 161
AnnaBridge 172:65be27845400 162 /*!
AnnaBridge 161:aa5281ff4a02 163 * @brief PHY Write function. This function write data over the SMI to
AnnaBridge 161:aa5281ff4a02 164 * the specified PHY register. This function is called by all PHY interfaces.
AnnaBridge 161:aa5281ff4a02 165 *
AnnaBridge 161:aa5281ff4a02 166 * @param base ENET peripheral base address.
AnnaBridge 161:aa5281ff4a02 167 * @param phyAddr The PHY address.
AnnaBridge 161:aa5281ff4a02 168 * @param phyReg The PHY register.
AnnaBridge 161:aa5281ff4a02 169 * @param data The data written to the PHY register.
AnnaBridge 161:aa5281ff4a02 170 * @retval kStatus_Success PHY write success
AnnaBridge 161:aa5281ff4a02 171 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 161:aa5281ff4a02 172 */
AnnaBridge 161:aa5281ff4a02 173 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
AnnaBridge 161:aa5281ff4a02 174
AnnaBridge 161:aa5281ff4a02 175 /*!
AnnaBridge 161:aa5281ff4a02 176 * @brief PHY Read function. This interface read data over the SMI from the
AnnaBridge 161:aa5281ff4a02 177 * specified PHY register. This function is called by all PHY interfaces.
AnnaBridge 161:aa5281ff4a02 178 *
AnnaBridge 161:aa5281ff4a02 179 * @param base ENET peripheral base address.
AnnaBridge 161:aa5281ff4a02 180 * @param phyAddr The PHY address.
AnnaBridge 161:aa5281ff4a02 181 * @param phyReg The PHY register.
AnnaBridge 161:aa5281ff4a02 182 * @param dataPtr The address to store the data read from the PHY register.
AnnaBridge 161:aa5281ff4a02 183 * @retval kStatus_Success PHY read success
AnnaBridge 161:aa5281ff4a02 184 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 161:aa5281ff4a02 185 */
AnnaBridge 161:aa5281ff4a02 186 status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr);
AnnaBridge 161:aa5281ff4a02 187
AnnaBridge 161:aa5281ff4a02 188 /*!
AnnaBridge 161:aa5281ff4a02 189 * @brief Enables/disables PHY loopback.
AnnaBridge 161:aa5281ff4a02 190 *
AnnaBridge 161:aa5281ff4a02 191 * @param base ENET peripheral base address.
AnnaBridge 161:aa5281ff4a02 192 * @param phyAddr The PHY address.
AnnaBridge 161:aa5281ff4a02 193 * @param mode The loopback mode to be enabled, please see "phy_loop_t".
AnnaBridge 161:aa5281ff4a02 194 * the two loopback mode should not be both set. when one loopback mode is set
AnnaBridge 161:aa5281ff4a02 195 * the other one should be disabled.
AnnaBridge 161:aa5281ff4a02 196 * @param speed PHY speed for loopback mode.
AnnaBridge 161:aa5281ff4a02 197 * @param enable True to enable, false to disable.
AnnaBridge 161:aa5281ff4a02 198 * @retval kStatus_Success PHY loopback success
AnnaBridge 161:aa5281ff4a02 199 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 161:aa5281ff4a02 200 */
AnnaBridge 161:aa5281ff4a02 201 status_t PHY_EnableLoopback(ENET_Type *base, uint32_t phyAddr, phy_loop_t mode, phy_speed_t speed, bool enable);
AnnaBridge 161:aa5281ff4a02 202
AnnaBridge 161:aa5281ff4a02 203 /*!
AnnaBridge 161:aa5281ff4a02 204 * @brief Gets the PHY link status.
AnnaBridge 161:aa5281ff4a02 205 *
AnnaBridge 161:aa5281ff4a02 206 * @param base ENET peripheral base address.
AnnaBridge 161:aa5281ff4a02 207 * @param phyAddr The PHY address.
AnnaBridge 161:aa5281ff4a02 208 * @param status The link up or down status of the PHY.
AnnaBridge 161:aa5281ff4a02 209 * - true the link is up.
AnnaBridge 161:aa5281ff4a02 210 * - false the link is down.
AnnaBridge 161:aa5281ff4a02 211 * @retval kStatus_Success PHY get link status success
AnnaBridge 161:aa5281ff4a02 212 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 161:aa5281ff4a02 213 */
AnnaBridge 161:aa5281ff4a02 214 status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status);
AnnaBridge 161:aa5281ff4a02 215
AnnaBridge 161:aa5281ff4a02 216 /*!
AnnaBridge 161:aa5281ff4a02 217 * @brief Gets the PHY link speed and duplex.
AnnaBridge 161:aa5281ff4a02 218 *
AnnaBridge 161:aa5281ff4a02 219 * @param base ENET peripheral base address.
AnnaBridge 161:aa5281ff4a02 220 * @param phyAddr The PHY address.
AnnaBridge 161:aa5281ff4a02 221 * @param speed The address of PHY link speed.
AnnaBridge 161:aa5281ff4a02 222 * @param duplex The link duplex of PHY.
AnnaBridge 161:aa5281ff4a02 223 * @retval kStatus_Success PHY get link speed and duplex success
AnnaBridge 161:aa5281ff4a02 224 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 161:aa5281ff4a02 225 */
AnnaBridge 161:aa5281ff4a02 226 status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t *duplex);
AnnaBridge 161:aa5281ff4a02 227
AnnaBridge 161:aa5281ff4a02 228 /* @} */
AnnaBridge 161:aa5281ff4a02 229
AnnaBridge 161:aa5281ff4a02 230 #if defined(__cplusplus)
AnnaBridge 161:aa5281ff4a02 231 }
AnnaBridge 161:aa5281ff4a02 232 #endif
AnnaBridge 161:aa5281ff4a02 233
AnnaBridge 161:aa5281ff4a02 234 /*! @}*/
AnnaBridge 161:aa5281ff4a02 235
AnnaBridge 161:aa5281ff4a02 236 #endif /* _FSL_PHY_H_ */