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TARGET_MIMXRT1050_EVK/TOOLCHAIN_IAR/fsl_gpio.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 161:aa5281ff4a02 | 1 | /* |
AnnaBridge | 170:e95d10626187 | 2 | * The Clear BSD License |
AnnaBridge | 161:aa5281ff4a02 | 3 | * Copyright (c) 2016, Freescale Semiconductor, Inc. |
AnnaBridge | 161:aa5281ff4a02 | 4 | * Copyright 2016-2017 NXP |
AnnaBridge | 170:e95d10626187 | 5 | * All rights reserved. |
AnnaBridge | 161:aa5281ff4a02 | 6 | * |
AnnaBridge | 161:aa5281ff4a02 | 7 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 170:e95d10626187 | 8 | * are permitted (subject to the limitations in the disclaimer below) provided |
AnnaBridge | 170:e95d10626187 | 9 | * that the following conditions are met: |
AnnaBridge | 161:aa5281ff4a02 | 10 | * |
AnnaBridge | 161:aa5281ff4a02 | 11 | * o Redistributions of source code must retain the above copyright notice, this list |
AnnaBridge | 161:aa5281ff4a02 | 12 | * of conditions and the following disclaimer. |
AnnaBridge | 161:aa5281ff4a02 | 13 | * |
AnnaBridge | 161:aa5281ff4a02 | 14 | * o Redistributions in binary form must reproduce the above copyright notice, this |
AnnaBridge | 161:aa5281ff4a02 | 15 | * list of conditions and the following disclaimer in the documentation and/or |
AnnaBridge | 161:aa5281ff4a02 | 16 | * other materials provided with the distribution. |
AnnaBridge | 161:aa5281ff4a02 | 17 | * |
AnnaBridge | 161:aa5281ff4a02 | 18 | * o Neither the name of the copyright holder nor the names of its |
AnnaBridge | 161:aa5281ff4a02 | 19 | * contributors may be used to endorse or promote products derived from this |
AnnaBridge | 161:aa5281ff4a02 | 20 | * software without specific prior written permission. |
AnnaBridge | 161:aa5281ff4a02 | 21 | * |
AnnaBridge | 170:e95d10626187 | 22 | * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. |
AnnaBridge | 161:aa5281ff4a02 | 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
AnnaBridge | 161:aa5281ff4a02 | 24 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
AnnaBridge | 161:aa5281ff4a02 | 25 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 161:aa5281ff4a02 | 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
AnnaBridge | 161:aa5281ff4a02 | 27 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
AnnaBridge | 161:aa5281ff4a02 | 28 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
AnnaBridge | 161:aa5281ff4a02 | 29 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
AnnaBridge | 161:aa5281ff4a02 | 30 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
AnnaBridge | 161:aa5281ff4a02 | 31 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
AnnaBridge | 161:aa5281ff4a02 | 32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 161:aa5281ff4a02 | 33 | */ |
AnnaBridge | 161:aa5281ff4a02 | 34 | |
AnnaBridge | 161:aa5281ff4a02 | 35 | #ifndef _FSL_GPIO_H_ |
AnnaBridge | 161:aa5281ff4a02 | 36 | #define _FSL_GPIO_H_ |
AnnaBridge | 161:aa5281ff4a02 | 37 | |
AnnaBridge | 161:aa5281ff4a02 | 38 | #include "fsl_common.h" |
AnnaBridge | 161:aa5281ff4a02 | 39 | |
AnnaBridge | 161:aa5281ff4a02 | 40 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 41 | * @addtogroup gpio_driver |
AnnaBridge | 161:aa5281ff4a02 | 42 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 43 | */ |
AnnaBridge | 161:aa5281ff4a02 | 44 | |
AnnaBridge | 161:aa5281ff4a02 | 45 | /******************************************************************************* |
AnnaBridge | 161:aa5281ff4a02 | 46 | * Definitions |
AnnaBridge | 161:aa5281ff4a02 | 47 | ******************************************************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 48 | |
AnnaBridge | 161:aa5281ff4a02 | 49 | /*! @name Driver version */ |
AnnaBridge | 161:aa5281ff4a02 | 50 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 51 | /*! @brief GPIO driver version 2.0.1. */ |
AnnaBridge | 161:aa5281ff4a02 | 52 | #define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) |
AnnaBridge | 161:aa5281ff4a02 | 53 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 54 | |
AnnaBridge | 161:aa5281ff4a02 | 55 | /*! @brief GPIO direction definition. */ |
AnnaBridge | 161:aa5281ff4a02 | 56 | typedef enum _gpio_pin_direction |
AnnaBridge | 161:aa5281ff4a02 | 57 | { |
AnnaBridge | 170:e95d10626187 | 58 | kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input.*/ |
AnnaBridge | 161:aa5281ff4a02 | 59 | kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output.*/ |
AnnaBridge | 161:aa5281ff4a02 | 60 | } gpio_pin_direction_t; |
AnnaBridge | 161:aa5281ff4a02 | 61 | |
AnnaBridge | 161:aa5281ff4a02 | 62 | /*! @brief GPIO interrupt mode definition. */ |
AnnaBridge | 161:aa5281ff4a02 | 63 | typedef enum _gpio_interrupt_mode |
AnnaBridge | 161:aa5281ff4a02 | 64 | { |
AnnaBridge | 170:e95d10626187 | 65 | kGPIO_NoIntmode = 0U, /*!< Set current pin general IO functionality.*/ |
AnnaBridge | 170:e95d10626187 | 66 | kGPIO_IntLowLevel = 1U, /*!< Set current pin interrupt is low-level sensitive.*/ |
AnnaBridge | 170:e95d10626187 | 67 | kGPIO_IntHighLevel = 2U, /*!< Set current pin interrupt is high-level sensitive.*/ |
AnnaBridge | 170:e95d10626187 | 68 | kGPIO_IntRisingEdge = 3U, /*!< Set current pin interrupt is rising-edge sensitive.*/ |
AnnaBridge | 170:e95d10626187 | 69 | kGPIO_IntFallingEdge = 4U, /*!< Set current pin interrupt is falling-edge sensitive.*/ |
AnnaBridge | 161:aa5281ff4a02 | 70 | kGPIO_IntRisingOrFallingEdge = 5U, /*!< Enable the edge select bit to override the ICR register's configuration.*/ |
AnnaBridge | 161:aa5281ff4a02 | 71 | } gpio_interrupt_mode_t; |
AnnaBridge | 161:aa5281ff4a02 | 72 | |
AnnaBridge | 161:aa5281ff4a02 | 73 | /*! @brief GPIO Init structure definition. */ |
AnnaBridge | 161:aa5281ff4a02 | 74 | typedef struct _gpio_pin_config |
AnnaBridge | 161:aa5281ff4a02 | 75 | { |
AnnaBridge | 170:e95d10626187 | 76 | gpio_pin_direction_t direction; /*!< Specifies the pin direction. */ |
AnnaBridge | 170:e95d10626187 | 77 | uint8_t outputLogic; /*!< Set a default output logic, which has no use in input */ |
AnnaBridge | 170:e95d10626187 | 78 | gpio_interrupt_mode_t |
AnnaBridge | 170:e95d10626187 | 79 | interruptMode; /*!< Specifies the pin interrupt mode, a value of @ref gpio_interrupt_mode_t. */ |
AnnaBridge | 161:aa5281ff4a02 | 80 | } gpio_pin_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 81 | |
AnnaBridge | 161:aa5281ff4a02 | 82 | /******************************************************************************* |
AnnaBridge | 161:aa5281ff4a02 | 83 | * API |
AnnaBridge | 161:aa5281ff4a02 | 84 | ******************************************************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 85 | |
AnnaBridge | 161:aa5281ff4a02 | 86 | #if defined(__cplusplus) |
AnnaBridge | 161:aa5281ff4a02 | 87 | extern "C" { |
AnnaBridge | 161:aa5281ff4a02 | 88 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 89 | |
AnnaBridge | 161:aa5281ff4a02 | 90 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 91 | * @name GPIO Initialization and Configuration functions |
AnnaBridge | 161:aa5281ff4a02 | 92 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 93 | */ |
AnnaBridge | 161:aa5281ff4a02 | 94 | |
AnnaBridge | 161:aa5281ff4a02 | 95 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 96 | * @brief Initializes the GPIO peripheral according to the specified |
AnnaBridge | 161:aa5281ff4a02 | 97 | * parameters in the initConfig. |
AnnaBridge | 161:aa5281ff4a02 | 98 | * |
AnnaBridge | 161:aa5281ff4a02 | 99 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 100 | * @param pin Specifies the pin number |
AnnaBridge | 161:aa5281ff4a02 | 101 | * @param initConfig pointer to a @ref gpio_pin_config_t structure that |
AnnaBridge | 161:aa5281ff4a02 | 102 | * contains the configuration information. |
AnnaBridge | 161:aa5281ff4a02 | 103 | */ |
AnnaBridge | 170:e95d10626187 | 104 | void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *Config); |
AnnaBridge | 161:aa5281ff4a02 | 105 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 106 | |
AnnaBridge | 161:aa5281ff4a02 | 107 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 108 | * @name GPIO Reads and Write Functions |
AnnaBridge | 161:aa5281ff4a02 | 109 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 110 | */ |
AnnaBridge | 161:aa5281ff4a02 | 111 | |
AnnaBridge | 161:aa5281ff4a02 | 112 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 113 | * @brief Sets the output level of the individual GPIO pin to logic 1 or 0. |
AnnaBridge | 161:aa5281ff4a02 | 114 | * |
AnnaBridge | 161:aa5281ff4a02 | 115 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 116 | * @param pin GPIO port pin number. |
AnnaBridge | 161:aa5281ff4a02 | 117 | * @param output GPIOpin output logic level. |
AnnaBridge | 161:aa5281ff4a02 | 118 | * - 0: corresponding pin output low-logic level. |
AnnaBridge | 161:aa5281ff4a02 | 119 | * - 1: corresponding pin output high-logic level. |
AnnaBridge | 161:aa5281ff4a02 | 120 | */ |
AnnaBridge | 170:e95d10626187 | 121 | void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output); |
AnnaBridge | 161:aa5281ff4a02 | 122 | |
AnnaBridge | 161:aa5281ff4a02 | 123 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 124 | * @brief Sets the output level of the individual GPIO pin to logic 1 or 0. |
AnnaBridge | 161:aa5281ff4a02 | 125 | * @deprecated Do not use this function. It has been superceded by @ref GPIO_PinWrite. |
AnnaBridge | 161:aa5281ff4a02 | 126 | */ |
AnnaBridge | 170:e95d10626187 | 127 | static inline void GPIO_WritePinOutput(GPIO_Type *base, uint32_t pin, uint8_t output) |
AnnaBridge | 161:aa5281ff4a02 | 128 | { |
AnnaBridge | 161:aa5281ff4a02 | 129 | GPIO_PinWrite(base, pin, output); |
AnnaBridge | 161:aa5281ff4a02 | 130 | } |
AnnaBridge | 161:aa5281ff4a02 | 131 | |
AnnaBridge | 161:aa5281ff4a02 | 132 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 133 | * @brief Sets the output level of the multiple GPIO pins to the logic 1. |
AnnaBridge | 161:aa5281ff4a02 | 134 | * |
AnnaBridge | 161:aa5281ff4a02 | 135 | * @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.) |
AnnaBridge | 161:aa5281ff4a02 | 136 | * @param mask GPIO pin number macro |
AnnaBridge | 161:aa5281ff4a02 | 137 | */ |
AnnaBridge | 170:e95d10626187 | 138 | static inline void GPIO_PortSet(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 139 | { |
AnnaBridge | 170:e95d10626187 | 140 | #if (defined(FSL_FEATURE_IGPIO_HAS_DR_SET) && (FSL_FEATURE_IGPIO_HAS_DR_SET == 1)) |
AnnaBridge | 170:e95d10626187 | 141 | base->DR_SET = mask; |
AnnaBridge | 170:e95d10626187 | 142 | #else |
AnnaBridge | 161:aa5281ff4a02 | 143 | base->DR |= mask; |
AnnaBridge | 170:e95d10626187 | 144 | #endif /* FSL_FEATURE_IGPIO_HAS_DR_SET */ |
AnnaBridge | 161:aa5281ff4a02 | 145 | } |
AnnaBridge | 161:aa5281ff4a02 | 146 | |
AnnaBridge | 161:aa5281ff4a02 | 147 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 148 | * @brief Sets the output level of the multiple GPIO pins to the logic 1. |
AnnaBridge | 161:aa5281ff4a02 | 149 | * @deprecated Do not use this function. It has been superceded by @ref GPIO_PortSet. |
AnnaBridge | 161:aa5281ff4a02 | 150 | */ |
AnnaBridge | 170:e95d10626187 | 151 | static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 152 | { |
AnnaBridge | 161:aa5281ff4a02 | 153 | GPIO_PortSet(base, mask); |
AnnaBridge | 161:aa5281ff4a02 | 154 | } |
AnnaBridge | 161:aa5281ff4a02 | 155 | |
AnnaBridge | 161:aa5281ff4a02 | 156 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 157 | * @brief Sets the output level of the multiple GPIO pins to the logic 0. |
AnnaBridge | 161:aa5281ff4a02 | 158 | * |
AnnaBridge | 161:aa5281ff4a02 | 159 | * @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.) |
AnnaBridge | 161:aa5281ff4a02 | 160 | * @param mask GPIO pin number macro |
AnnaBridge | 161:aa5281ff4a02 | 161 | */ |
AnnaBridge | 170:e95d10626187 | 162 | static inline void GPIO_PortClear(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 163 | { |
AnnaBridge | 170:e95d10626187 | 164 | #if (defined(FSL_FEATURE_IGPIO_HAS_DR_CLEAR) && (FSL_FEATURE_IGPIO_HAS_DR_CLEAR == 1)) |
AnnaBridge | 170:e95d10626187 | 165 | base->DR_CLEAR = mask; |
AnnaBridge | 170:e95d10626187 | 166 | #else |
AnnaBridge | 161:aa5281ff4a02 | 167 | base->DR &= ~mask; |
AnnaBridge | 170:e95d10626187 | 168 | #endif /* FSL_FEATURE_IGPIO_HAS_DR_CLEAR */ |
AnnaBridge | 161:aa5281ff4a02 | 169 | } |
AnnaBridge | 161:aa5281ff4a02 | 170 | |
AnnaBridge | 161:aa5281ff4a02 | 171 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 172 | * @brief Sets the output level of the multiple GPIO pins to the logic 0. |
AnnaBridge | 161:aa5281ff4a02 | 173 | * @deprecated Do not use this function. It has been superceded by @ref GPIO_PortClear. |
AnnaBridge | 161:aa5281ff4a02 | 174 | */ |
AnnaBridge | 170:e95d10626187 | 175 | static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 176 | { |
AnnaBridge | 161:aa5281ff4a02 | 177 | GPIO_PortClear(base, mask); |
AnnaBridge | 161:aa5281ff4a02 | 178 | } |
AnnaBridge | 161:aa5281ff4a02 | 179 | |
AnnaBridge | 161:aa5281ff4a02 | 180 | /*! |
AnnaBridge | 170:e95d10626187 | 181 | * @brief Reverses the current output logic of the multiple GPIO pins. |
AnnaBridge | 170:e95d10626187 | 182 | * |
AnnaBridge | 170:e95d10626187 | 183 | * @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.) |
AnnaBridge | 170:e95d10626187 | 184 | * @param mask GPIO pin number macro |
AnnaBridge | 170:e95d10626187 | 185 | */ |
AnnaBridge | 170:e95d10626187 | 186 | static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 170:e95d10626187 | 187 | { |
AnnaBridge | 170:e95d10626187 | 188 | #if (defined(FSL_FEATURE_IGPIO_HAS_DR_TOGGLE) && (FSL_FEATURE_IGPIO_HAS_DR_TOGGLE == 1)) |
AnnaBridge | 170:e95d10626187 | 189 | base->DR_TOGGLE = mask; |
AnnaBridge | 170:e95d10626187 | 190 | #endif /* FSL_FEATURE_IGPIO_HAS_DR_TOGGLE */ |
AnnaBridge | 170:e95d10626187 | 191 | } |
AnnaBridge | 170:e95d10626187 | 192 | |
AnnaBridge | 170:e95d10626187 | 193 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 194 | * @brief Reads the current input value of the GPIO port. |
AnnaBridge | 161:aa5281ff4a02 | 195 | * |
AnnaBridge | 161:aa5281ff4a02 | 196 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 197 | * @param pin GPIO port pin number. |
AnnaBridge | 161:aa5281ff4a02 | 198 | * @retval GPIO port input value. |
AnnaBridge | 161:aa5281ff4a02 | 199 | */ |
AnnaBridge | 170:e95d10626187 | 200 | static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t pin) |
AnnaBridge | 161:aa5281ff4a02 | 201 | { |
AnnaBridge | 161:aa5281ff4a02 | 202 | assert(pin < 32); |
AnnaBridge | 161:aa5281ff4a02 | 203 | |
AnnaBridge | 161:aa5281ff4a02 | 204 | return (((base->DR) >> pin) & 0x1U); |
AnnaBridge | 161:aa5281ff4a02 | 205 | } |
AnnaBridge | 161:aa5281ff4a02 | 206 | |
AnnaBridge | 161:aa5281ff4a02 | 207 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 208 | * @brief Reads the current input value of the GPIO port. |
AnnaBridge | 161:aa5281ff4a02 | 209 | * @deprecated Do not use this function. It has been superceded by @ref GPIO_PinRead. |
AnnaBridge | 161:aa5281ff4a02 | 210 | */ |
AnnaBridge | 170:e95d10626187 | 211 | static inline uint32_t GPIO_ReadPinInput(GPIO_Type *base, uint32_t pin) |
AnnaBridge | 161:aa5281ff4a02 | 212 | { |
AnnaBridge | 161:aa5281ff4a02 | 213 | return GPIO_PinRead(base, pin); |
AnnaBridge | 161:aa5281ff4a02 | 214 | } |
AnnaBridge | 161:aa5281ff4a02 | 215 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 216 | |
AnnaBridge | 161:aa5281ff4a02 | 217 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 218 | * @name GPIO Reads Pad Status Functions |
AnnaBridge | 161:aa5281ff4a02 | 219 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 220 | */ |
AnnaBridge | 161:aa5281ff4a02 | 221 | |
AnnaBridge | 170:e95d10626187 | 222 | /*! |
AnnaBridge | 170:e95d10626187 | 223 | * @brief Reads the current GPIO pin pad status. |
AnnaBridge | 170:e95d10626187 | 224 | * |
AnnaBridge | 170:e95d10626187 | 225 | * @param base GPIO base pointer. |
AnnaBridge | 170:e95d10626187 | 226 | * @param pin GPIO port pin number. |
AnnaBridge | 170:e95d10626187 | 227 | * @retval GPIO pin pad status value. |
AnnaBridge | 170:e95d10626187 | 228 | */ |
AnnaBridge | 170:e95d10626187 | 229 | static inline uint8_t GPIO_PinReadPadStatus(GPIO_Type *base, uint32_t pin) |
AnnaBridge | 161:aa5281ff4a02 | 230 | { |
AnnaBridge | 161:aa5281ff4a02 | 231 | assert(pin < 32); |
AnnaBridge | 161:aa5281ff4a02 | 232 | |
AnnaBridge | 161:aa5281ff4a02 | 233 | return (uint8_t)(((base->PSR) >> pin) & 0x1U); |
AnnaBridge | 161:aa5281ff4a02 | 234 | } |
AnnaBridge | 161:aa5281ff4a02 | 235 | |
AnnaBridge | 170:e95d10626187 | 236 | /*! |
AnnaBridge | 170:e95d10626187 | 237 | * @brief Reads the current GPIO pin pad status. |
AnnaBridge | 170:e95d10626187 | 238 | * @deprecated Do not use this function. It has been superceded by @ref GPIO_PinReadPadStatus. |
AnnaBridge | 170:e95d10626187 | 239 | */ |
AnnaBridge | 170:e95d10626187 | 240 | static inline uint8_t GPIO_ReadPadStatus(GPIO_Type *base, uint32_t pin) |
AnnaBridge | 161:aa5281ff4a02 | 241 | { |
AnnaBridge | 161:aa5281ff4a02 | 242 | return GPIO_PinReadPadStatus(base, pin); |
AnnaBridge | 161:aa5281ff4a02 | 243 | } |
AnnaBridge | 170:e95d10626187 | 244 | |
AnnaBridge | 161:aa5281ff4a02 | 245 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 246 | |
AnnaBridge | 161:aa5281ff4a02 | 247 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 248 | * @name Interrupts and flags management functions |
AnnaBridge | 161:aa5281ff4a02 | 249 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 250 | */ |
AnnaBridge | 161:aa5281ff4a02 | 251 | |
AnnaBridge | 161:aa5281ff4a02 | 252 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 253 | * @brief Sets the current pin interrupt mode. |
AnnaBridge | 161:aa5281ff4a02 | 254 | * |
AnnaBridge | 161:aa5281ff4a02 | 255 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 256 | * @param pin GPIO port pin number. |
AnnaBridge | 161:aa5281ff4a02 | 257 | * @param pininterruptMode pointer to a @ref gpio_interrupt_mode_t structure |
AnnaBridge | 161:aa5281ff4a02 | 258 | * that contains the interrupt mode information. |
AnnaBridge | 161:aa5281ff4a02 | 259 | */ |
AnnaBridge | 170:e95d10626187 | 260 | void GPIO_PinSetInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode); |
AnnaBridge | 161:aa5281ff4a02 | 261 | |
AnnaBridge | 161:aa5281ff4a02 | 262 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 263 | * @brief Sets the current pin interrupt mode. |
AnnaBridge | 161:aa5281ff4a02 | 264 | * @deprecated Do not use this function. It has been superceded by @ref GPIO_PinSetInterruptConfig. |
AnnaBridge | 161:aa5281ff4a02 | 265 | */ |
AnnaBridge | 170:e95d10626187 | 266 | static inline void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode) |
AnnaBridge | 161:aa5281ff4a02 | 267 | { |
AnnaBridge | 161:aa5281ff4a02 | 268 | GPIO_PinSetInterruptConfig(base, pin, pinInterruptMode); |
AnnaBridge | 161:aa5281ff4a02 | 269 | } |
AnnaBridge | 161:aa5281ff4a02 | 270 | |
AnnaBridge | 161:aa5281ff4a02 | 271 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 272 | * @brief Enables the specific pin interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 273 | * |
AnnaBridge | 161:aa5281ff4a02 | 274 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 275 | * @param mask GPIO pin number macro. |
AnnaBridge | 161:aa5281ff4a02 | 276 | */ |
AnnaBridge | 170:e95d10626187 | 277 | static inline void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 278 | { |
AnnaBridge | 161:aa5281ff4a02 | 279 | base->IMR |= mask; |
AnnaBridge | 161:aa5281ff4a02 | 280 | } |
AnnaBridge | 161:aa5281ff4a02 | 281 | |
AnnaBridge | 161:aa5281ff4a02 | 282 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 283 | * @brief Enables the specific pin interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 284 | * |
AnnaBridge | 161:aa5281ff4a02 | 285 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 286 | * @param mask GPIO pin number macro. |
AnnaBridge | 161:aa5281ff4a02 | 287 | */ |
AnnaBridge | 170:e95d10626187 | 288 | static inline void GPIO_EnableInterrupts(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 289 | { |
AnnaBridge | 161:aa5281ff4a02 | 290 | GPIO_PortEnableInterrupts(base, mask); |
AnnaBridge | 161:aa5281ff4a02 | 291 | } |
AnnaBridge | 161:aa5281ff4a02 | 292 | |
AnnaBridge | 161:aa5281ff4a02 | 293 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 294 | * @brief Disables the specific pin interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 295 | * |
AnnaBridge | 161:aa5281ff4a02 | 296 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 297 | * @param mask GPIO pin number macro. |
AnnaBridge | 161:aa5281ff4a02 | 298 | */ |
AnnaBridge | 170:e95d10626187 | 299 | static inline void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 300 | { |
AnnaBridge | 161:aa5281ff4a02 | 301 | base->IMR &= ~mask; |
AnnaBridge | 161:aa5281ff4a02 | 302 | } |
AnnaBridge | 161:aa5281ff4a02 | 303 | |
AnnaBridge | 161:aa5281ff4a02 | 304 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 305 | * @brief Disables the specific pin interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 306 | * @deprecated Do not use this function. It has been superceded by @ref GPIO_PortDisableInterrupts. |
AnnaBridge | 161:aa5281ff4a02 | 307 | */ |
AnnaBridge | 170:e95d10626187 | 308 | static inline void GPIO_DisableInterrupts(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 309 | { |
AnnaBridge | 161:aa5281ff4a02 | 310 | GPIO_PortDisableInterrupts(base, mask); |
AnnaBridge | 161:aa5281ff4a02 | 311 | } |
AnnaBridge | 161:aa5281ff4a02 | 312 | |
AnnaBridge | 161:aa5281ff4a02 | 313 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 314 | * @brief Reads individual pin interrupt status. |
AnnaBridge | 161:aa5281ff4a02 | 315 | * |
AnnaBridge | 161:aa5281ff4a02 | 316 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 317 | * @retval current pin interrupt status flag. |
AnnaBridge | 161:aa5281ff4a02 | 318 | */ |
AnnaBridge | 170:e95d10626187 | 319 | static inline uint32_t GPIO_PortGetInterruptFlags(GPIO_Type *base) |
AnnaBridge | 161:aa5281ff4a02 | 320 | { |
AnnaBridge | 161:aa5281ff4a02 | 321 | return base->ISR; |
AnnaBridge | 161:aa5281ff4a02 | 322 | } |
AnnaBridge | 161:aa5281ff4a02 | 323 | |
AnnaBridge | 161:aa5281ff4a02 | 324 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 325 | * @brief Reads individual pin interrupt status. |
AnnaBridge | 161:aa5281ff4a02 | 326 | * |
AnnaBridge | 161:aa5281ff4a02 | 327 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 328 | * @retval current pin interrupt status flag. |
AnnaBridge | 161:aa5281ff4a02 | 329 | */ |
AnnaBridge | 170:e95d10626187 | 330 | static inline uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base) |
AnnaBridge | 161:aa5281ff4a02 | 331 | { |
AnnaBridge | 161:aa5281ff4a02 | 332 | return GPIO_PortGetInterruptFlags(base); |
AnnaBridge | 161:aa5281ff4a02 | 333 | } |
AnnaBridge | 161:aa5281ff4a02 | 334 | |
AnnaBridge | 161:aa5281ff4a02 | 335 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 336 | * @brief Clears pin interrupt flag. Status flags are cleared by |
AnnaBridge | 161:aa5281ff4a02 | 337 | * writing a 1 to the corresponding bit position. |
AnnaBridge | 161:aa5281ff4a02 | 338 | * |
AnnaBridge | 161:aa5281ff4a02 | 339 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 340 | * @param mask GPIO pin number macro. |
AnnaBridge | 161:aa5281ff4a02 | 341 | */ |
AnnaBridge | 170:e95d10626187 | 342 | static inline void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 343 | { |
AnnaBridge | 161:aa5281ff4a02 | 344 | base->ISR = mask; |
AnnaBridge | 161:aa5281ff4a02 | 345 | } |
AnnaBridge | 161:aa5281ff4a02 | 346 | |
AnnaBridge | 161:aa5281ff4a02 | 347 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 348 | * @brief Clears pin interrupt flag. Status flags are cleared by |
AnnaBridge | 161:aa5281ff4a02 | 349 | * writing a 1 to the corresponding bit position. |
AnnaBridge | 161:aa5281ff4a02 | 350 | * |
AnnaBridge | 161:aa5281ff4a02 | 351 | * @param base GPIO base pointer. |
AnnaBridge | 161:aa5281ff4a02 | 352 | * @param mask GPIO pin number macro. |
AnnaBridge | 161:aa5281ff4a02 | 353 | */ |
AnnaBridge | 170:e95d10626187 | 354 | static inline void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 355 | { |
AnnaBridge | 161:aa5281ff4a02 | 356 | GPIO_PortClearInterruptFlags(base, mask); |
AnnaBridge | 161:aa5281ff4a02 | 357 | } |
AnnaBridge | 161:aa5281ff4a02 | 358 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 359 | |
AnnaBridge | 161:aa5281ff4a02 | 360 | #if defined(__cplusplus) |
AnnaBridge | 161:aa5281ff4a02 | 361 | } |
AnnaBridge | 161:aa5281ff4a02 | 362 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 363 | |
AnnaBridge | 161:aa5281ff4a02 | 364 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 365 | * @} |
AnnaBridge | 161:aa5281ff4a02 | 366 | */ |
AnnaBridge | 161:aa5281ff4a02 | 367 | |
AnnaBridge | 161:aa5281ff4a02 | 368 | #endif /* _FSL_GPIO_H_*/ |