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TARGET_MIMXRT1050_EVK/TOOLCHAIN_IAR/fsl_dcdc.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 161:aa5281ff4a02 | 1 | /* |
AnnaBridge | 170:e95d10626187 | 2 | * The Clear BSD License |
AnnaBridge | 161:aa5281ff4a02 | 3 | * Copyright (c) 2017, NXP |
AnnaBridge | 161:aa5281ff4a02 | 4 | * All rights reserved. |
AnnaBridge | 161:aa5281ff4a02 | 5 | * |
AnnaBridge | 170:e95d10626187 | 6 | * |
AnnaBridge | 161:aa5281ff4a02 | 7 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 170:e95d10626187 | 8 | * are permitted (subject to the limitations in the disclaimer below) provided |
AnnaBridge | 170:e95d10626187 | 9 | * that the following conditions are met: |
AnnaBridge | 161:aa5281ff4a02 | 10 | * |
AnnaBridge | 161:aa5281ff4a02 | 11 | * o Redistributions of source code must retain the above copyright notice, this list |
AnnaBridge | 161:aa5281ff4a02 | 12 | * of conditions and the following disclaimer. |
AnnaBridge | 161:aa5281ff4a02 | 13 | * |
AnnaBridge | 161:aa5281ff4a02 | 14 | * o Redistributions in binary form must reproduce the above copyright notice, this |
AnnaBridge | 161:aa5281ff4a02 | 15 | * list of conditions and the following disclaimer in the documentation and/or |
AnnaBridge | 161:aa5281ff4a02 | 16 | * other materials provided with the distribution. |
AnnaBridge | 161:aa5281ff4a02 | 17 | * |
AnnaBridge | 161:aa5281ff4a02 | 18 | * o Neither the name of copyright holder nor the names of its |
AnnaBridge | 161:aa5281ff4a02 | 19 | * contributors may be used to endorse or promote products derived from this |
AnnaBridge | 161:aa5281ff4a02 | 20 | * software without specific prior written permission. |
AnnaBridge | 161:aa5281ff4a02 | 21 | * |
AnnaBridge | 170:e95d10626187 | 22 | * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. |
AnnaBridge | 161:aa5281ff4a02 | 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
AnnaBridge | 161:aa5281ff4a02 | 24 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
AnnaBridge | 161:aa5281ff4a02 | 25 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 161:aa5281ff4a02 | 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
AnnaBridge | 161:aa5281ff4a02 | 27 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
AnnaBridge | 161:aa5281ff4a02 | 28 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
AnnaBridge | 161:aa5281ff4a02 | 29 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
AnnaBridge | 161:aa5281ff4a02 | 30 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
AnnaBridge | 161:aa5281ff4a02 | 31 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
AnnaBridge | 161:aa5281ff4a02 | 32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 161:aa5281ff4a02 | 33 | */ |
AnnaBridge | 161:aa5281ff4a02 | 34 | |
AnnaBridge | 161:aa5281ff4a02 | 35 | #ifndef __FSL_DCDC_H__ |
AnnaBridge | 161:aa5281ff4a02 | 36 | #define __FSL_DCDC_H__ |
AnnaBridge | 161:aa5281ff4a02 | 37 | |
AnnaBridge | 161:aa5281ff4a02 | 38 | #include "fsl_common.h" |
AnnaBridge | 161:aa5281ff4a02 | 39 | |
AnnaBridge | 161:aa5281ff4a02 | 40 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 41 | * @addtogroup dcdc |
AnnaBridge | 161:aa5281ff4a02 | 42 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 43 | */ |
AnnaBridge | 161:aa5281ff4a02 | 44 | |
AnnaBridge | 161:aa5281ff4a02 | 45 | /******************************************************************************* |
AnnaBridge | 161:aa5281ff4a02 | 46 | * Definitions |
AnnaBridge | 161:aa5281ff4a02 | 47 | ******************************************************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 48 | /*! @brief DCDC driver version. */ |
AnnaBridge | 161:aa5281ff4a02 | 49 | #define FSL_DCDC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */ |
AnnaBridge | 161:aa5281ff4a02 | 50 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 51 | * @brief DCDC status flags. |
AnnaBridge | 161:aa5281ff4a02 | 52 | */ |
AnnaBridge | 161:aa5281ff4a02 | 53 | enum _dcdc_status_flags_t |
AnnaBridge | 161:aa5281ff4a02 | 54 | { |
AnnaBridge | 161:aa5281ff4a02 | 55 | kDCDC_LockedOKStatus = (1U << 0U), /*!< Indicate DCDC status. 1'b1: DCDC already settled 1'b0: DCDC is settling. */ |
AnnaBridge | 161:aa5281ff4a02 | 56 | }; |
AnnaBridge | 161:aa5281ff4a02 | 57 | |
AnnaBridge | 161:aa5281ff4a02 | 58 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 59 | * @brief The current bias of low power comparator. |
AnnaBridge | 161:aa5281ff4a02 | 60 | */ |
AnnaBridge | 161:aa5281ff4a02 | 61 | typedef enum _dcdc_comparator_current_bias |
AnnaBridge | 161:aa5281ff4a02 | 62 | { |
AnnaBridge | 161:aa5281ff4a02 | 63 | kDCDC_ComparatorCurrentBias50nA = 0U, /*!< The current bias of low power comparator is 50nA. */ |
AnnaBridge | 161:aa5281ff4a02 | 64 | kDCDC_ComparatorCurrentBias100nA = 1U, /*!< The current bias of low power comparator is 100nA. */ |
AnnaBridge | 161:aa5281ff4a02 | 65 | kDCDC_ComparatorCurrentBias200nA = 2U, /*!< The current bias of low power comparator is 200nA. */ |
AnnaBridge | 161:aa5281ff4a02 | 66 | kDCDC_ComparatorCurrentBias400nA = 3U, /*!< The current bias of low power comparator is 400nA. */ |
AnnaBridge | 161:aa5281ff4a02 | 67 | } dcdc_comparator_current_bias_t; |
AnnaBridge | 161:aa5281ff4a02 | 68 | |
AnnaBridge | 161:aa5281ff4a02 | 69 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 70 | * @brief The threshold of over current detection. |
AnnaBridge | 161:aa5281ff4a02 | 71 | */ |
AnnaBridge | 161:aa5281ff4a02 | 72 | typedef enum _dcdc_over_current_threshold |
AnnaBridge | 161:aa5281ff4a02 | 73 | { |
AnnaBridge | 161:aa5281ff4a02 | 74 | kDCDC_OverCurrentThresholdAlt0 = 0U, /*!< 1A in the run mode, 0.25A in the power save mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 75 | kDCDC_OverCurrentThresholdAlt1 = 1U, /*!< 2A in the run mode, 0.25A in the power save mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 76 | kDCDC_OverCurrentThresholdAlt2 = 2U, /*!< 1A in the run mode, 0.2A in the power save mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 77 | kDCDC_OverCurrentThresholdAlt3 = 3U, /*!< 2A in the run mode, 0.2A in the power save mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 78 | } dcdc_over_current_threshold_t; |
AnnaBridge | 161:aa5281ff4a02 | 79 | |
AnnaBridge | 161:aa5281ff4a02 | 80 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 81 | * @brief The threshold if peak current detection. |
AnnaBridge | 161:aa5281ff4a02 | 82 | */ |
AnnaBridge | 161:aa5281ff4a02 | 83 | typedef enum _dcdc_peak_current_threshold |
AnnaBridge | 161:aa5281ff4a02 | 84 | { |
AnnaBridge | 161:aa5281ff4a02 | 85 | kDCDC_PeakCurrentThresholdAlt0 = 0U, /*!< 150mA peak current threshold. */ |
AnnaBridge | 161:aa5281ff4a02 | 86 | kDCDC_PeakCurrentThresholdAlt1 = 1U, /*!< 250mA peak current threshold. */ |
AnnaBridge | 161:aa5281ff4a02 | 87 | kDCDC_PeakCurrentThresholdAlt2 = 2U, /*!< 350mA peak current threshold. */ |
AnnaBridge | 161:aa5281ff4a02 | 88 | kDCDC_PeakCurrentThresholdAlt3 = 3U, /*!< 450mA peak current threshold. */ |
AnnaBridge | 161:aa5281ff4a02 | 89 | kDCDC_PeakCurrentThresholdAlt4 = 4U, /*!< 550mA peak current threshold. */ |
AnnaBridge | 161:aa5281ff4a02 | 90 | kDCDC_PeakCurrentThresholdAlt5 = 5U, /*!< 650mA peak current threshold. */ |
AnnaBridge | 161:aa5281ff4a02 | 91 | } dcdc_peak_current_threshold_t; |
AnnaBridge | 161:aa5281ff4a02 | 92 | |
AnnaBridge | 161:aa5281ff4a02 | 93 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 94 | * @brief The period of counting the charging times in power save mode. |
AnnaBridge | 161:aa5281ff4a02 | 95 | */ |
AnnaBridge | 161:aa5281ff4a02 | 96 | typedef enum _dcdc_count_charging_time_period |
AnnaBridge | 161:aa5281ff4a02 | 97 | { |
AnnaBridge | 161:aa5281ff4a02 | 98 | kDCDC_CountChargingTimePeriod8Cycle = 0U, /*!< Eight 32k cycle. */ |
AnnaBridge | 161:aa5281ff4a02 | 99 | kDCDC_CountChargingTimePeriod16Cycle = 1U, /*!< Sixteen 32k cycle. */ |
AnnaBridge | 161:aa5281ff4a02 | 100 | } dcdc_count_charging_time_period_t; |
AnnaBridge | 161:aa5281ff4a02 | 101 | |
AnnaBridge | 161:aa5281ff4a02 | 102 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 103 | * @brief The threshold of the counting number of charging times |
AnnaBridge | 161:aa5281ff4a02 | 104 | */ |
AnnaBridge | 161:aa5281ff4a02 | 105 | typedef enum _dcdc_count_charging_time_threshold |
AnnaBridge | 161:aa5281ff4a02 | 106 | { |
AnnaBridge | 161:aa5281ff4a02 | 107 | kDCDC_CountChargingTimeThreshold32 = 0U, /*!< 0x0: 32. */ |
AnnaBridge | 161:aa5281ff4a02 | 108 | kDCDC_CountChargingTimeThreshold64 = 1U, /*!< 0x1: 64. */ |
AnnaBridge | 161:aa5281ff4a02 | 109 | kDCDC_CountChargingTimeThreshold16 = 2U, /*!< 0x2: 16. */ |
AnnaBridge | 161:aa5281ff4a02 | 110 | kDCDC_CountChargingTimeThreshold8 = 3U, /*!< 0x3: 8. */ |
AnnaBridge | 161:aa5281ff4a02 | 111 | } dcdc_count_charging_time_threshold_t; |
AnnaBridge | 161:aa5281ff4a02 | 112 | |
AnnaBridge | 161:aa5281ff4a02 | 113 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 114 | * @brief Oscillator clock option. |
AnnaBridge | 161:aa5281ff4a02 | 115 | */ |
AnnaBridge | 161:aa5281ff4a02 | 116 | typedef enum _dcdc_clock_source |
AnnaBridge | 161:aa5281ff4a02 | 117 | { |
AnnaBridge | 161:aa5281ff4a02 | 118 | kDCDC_ClockAutoSwitch = 0U, /*!< Automatic clock switch from internal oscillator to external clock. */ |
AnnaBridge | 161:aa5281ff4a02 | 119 | kDCDC_ClockInternalOsc = 1U, /*!< Use internal oscillator. */ |
AnnaBridge | 161:aa5281ff4a02 | 120 | kDCDC_ClockExternalOsc = 2U, /*!< Use external 24M crystal oscillator. */ |
AnnaBridge | 161:aa5281ff4a02 | 121 | } dcdc_clock_source_t; |
AnnaBridge | 161:aa5281ff4a02 | 122 | |
AnnaBridge | 161:aa5281ff4a02 | 123 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 124 | * @brief Configuration for DCDC detection. |
AnnaBridge | 161:aa5281ff4a02 | 125 | */ |
AnnaBridge | 161:aa5281ff4a02 | 126 | typedef struct _dcdc_detection_config |
AnnaBridge | 161:aa5281ff4a02 | 127 | { |
AnnaBridge | 161:aa5281ff4a02 | 128 | bool enableXtalokDetection; /*!< Enable xtalok detection circuit. */ |
AnnaBridge | 161:aa5281ff4a02 | 129 | bool powerDownOverVoltageDetection; /*!< Power down over-voltage detection comparator. */ |
AnnaBridge | 161:aa5281ff4a02 | 130 | bool powerDownLowVlotageDetection; /*!< Power down low-voltage detection comparator. */ |
AnnaBridge | 161:aa5281ff4a02 | 131 | bool powerDownOverCurrentDetection; /*!< Power down over-current detection. */ |
AnnaBridge | 161:aa5281ff4a02 | 132 | bool powerDownPeakCurrentDetection; /*!< Power down peak-current detection. */ |
AnnaBridge | 161:aa5281ff4a02 | 133 | bool powerDownZeroCrossDetection; /*!< Power down the zero cross detection function for discontinuous conductor |
AnnaBridge | 161:aa5281ff4a02 | 134 | mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 135 | dcdc_over_current_threshold_t OverCurrentThreshold; /*!< The threshold of over current detection. */ |
AnnaBridge | 161:aa5281ff4a02 | 136 | dcdc_peak_current_threshold_t PeakCurrentThreshold; /*!< The threshold of peak current detection. */ |
AnnaBridge | 161:aa5281ff4a02 | 137 | } dcdc_detection_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 138 | |
AnnaBridge | 161:aa5281ff4a02 | 139 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 140 | * @brief Configuration for the loop control. |
AnnaBridge | 161:aa5281ff4a02 | 141 | */ |
AnnaBridge | 161:aa5281ff4a02 | 142 | typedef struct _dcdc_loop_control_config |
AnnaBridge | 161:aa5281ff4a02 | 143 | { |
AnnaBridge | 161:aa5281ff4a02 | 144 | bool enableCommonHysteresis; /*!< Enable hysteresis in switching converter common mode analog comparators. |
AnnaBridge | 161:aa5281ff4a02 | 145 | This feature will improve transient supply ripple and efficiency. */ |
AnnaBridge | 161:aa5281ff4a02 | 146 | bool enableCommonThresholdDetection; /*!< Increase the threshold detection for common mode analog comparator. */ |
AnnaBridge | 161:aa5281ff4a02 | 147 | bool enableInvertHysteresisSign; /*!< Invert the sign of the hysteresis in DC-DC analog comparators. */ |
AnnaBridge | 161:aa5281ff4a02 | 148 | bool enableRCThresholdDetection; /*!< Increase the threshold detection for RC scale circuit. */ |
AnnaBridge | 161:aa5281ff4a02 | 149 | uint32_t enableRCScaleCircuit; /*!< Available range is 0~7. Enable analog circuit of DC-DC converter to respond |
AnnaBridge | 161:aa5281ff4a02 | 150 | faster under transient load conditions. */ |
AnnaBridge | 161:aa5281ff4a02 | 151 | uint32_t complementFeedForwardStep; /*!< Available range is 0~7. Two's complement feed forward step in duty cycle in |
AnnaBridge | 161:aa5281ff4a02 | 152 | the switching DC-DC converter. Each time this field makes a transition from |
AnnaBridge | 161:aa5281ff4a02 | 153 | 0x0, the loop filter of the DC-DC converter is stepped once by a value |
AnnaBridge | 161:aa5281ff4a02 | 154 | proportional to the change. This can be used to force a certain control loop |
AnnaBridge | 161:aa5281ff4a02 | 155 | behavior, such as improving response under known heavy load transients. */ |
AnnaBridge | 161:aa5281ff4a02 | 156 | uint32_t controlParameterMagnitude; /*!< Available range is 0~15. Magnitude of proportional control parameter in the |
AnnaBridge | 161:aa5281ff4a02 | 157 | switching DC-DC converter control loop. */ |
AnnaBridge | 161:aa5281ff4a02 | 158 | uint32_t integralProportionalRatio; /*!< Available range is 0~3.Ratio of integral control parameter to proportional |
AnnaBridge | 161:aa5281ff4a02 | 159 | control parameter in the switching DC-DC converter, and can be used to |
AnnaBridge | 161:aa5281ff4a02 | 160 | optimize efficiency and loop response. */ |
AnnaBridge | 161:aa5281ff4a02 | 161 | } dcdc_loop_control_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 162 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 163 | * @brief Configuration for DCDC low power. |
AnnaBridge | 161:aa5281ff4a02 | 164 | */ |
AnnaBridge | 161:aa5281ff4a02 | 165 | typedef struct _dcdc_low_power_config |
AnnaBridge | 161:aa5281ff4a02 | 166 | { |
AnnaBridge | 161:aa5281ff4a02 | 167 | bool enableOverloadDetection; /*!< Enable the overload detection in power save mode, if current is larger than the |
AnnaBridge | 161:aa5281ff4a02 | 168 | overloading threshold (typical value is 50 mA), DCDC will switch to the run mode |
AnnaBridge | 161:aa5281ff4a02 | 169 | automatically. */ |
AnnaBridge | 161:aa5281ff4a02 | 170 | bool enableAdjustHystereticValue; /*!< Adjust hysteretic value in low power from 12.5mV to 25mV. */ |
AnnaBridge | 161:aa5281ff4a02 | 171 | dcdc_count_charging_time_period_t |
AnnaBridge | 161:aa5281ff4a02 | 172 | countChargingTimePeriod; /*!< The period of counting the charging times in power save mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 173 | dcdc_count_charging_time_threshold_t |
AnnaBridge | 161:aa5281ff4a02 | 174 | countChargingTimeThreshold; /*!< the threshold of the counting number of charging times during |
AnnaBridge | 161:aa5281ff4a02 | 175 | the period that lp_overload_freq_sel sets in power save mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 176 | } dcdc_low_power_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 177 | |
AnnaBridge | 161:aa5281ff4a02 | 178 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 179 | * @brief Configuration for DCDC internal regulator. |
AnnaBridge | 161:aa5281ff4a02 | 180 | */ |
AnnaBridge | 161:aa5281ff4a02 | 181 | typedef struct _dcdc_internal_regulator_config |
AnnaBridge | 161:aa5281ff4a02 | 182 | { |
AnnaBridge | 161:aa5281ff4a02 | 183 | bool enableLoadResistor; /*!< control the load resistor of the internal regulator of DCDC, the load resistor is |
AnnaBridge | 161:aa5281ff4a02 | 184 | connected as default "true", and need set to "false" to disconnect the load |
AnnaBridge | 161:aa5281ff4a02 | 185 | resistor. */ |
AnnaBridge | 161:aa5281ff4a02 | 186 | uint32_t feedbackPoint; /*!< Available range is 0~3. Select the feedback point of the internal regulator. */ |
AnnaBridge | 161:aa5281ff4a02 | 187 | } dcdc_internal_regulator_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 188 | |
AnnaBridge | 161:aa5281ff4a02 | 189 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 190 | * @brief Configuration for min power setting. |
AnnaBridge | 161:aa5281ff4a02 | 191 | */ |
AnnaBridge | 161:aa5281ff4a02 | 192 | typedef struct _dcdc_min_power_config |
AnnaBridge | 161:aa5281ff4a02 | 193 | { |
AnnaBridge | 161:aa5281ff4a02 | 194 | bool enableUseHalfFreqForContinuous; /*!< Set DCDC clock to half frequency for the continuous mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 195 | } dcdc_min_power_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 196 | #if defined(__cplusplus) |
AnnaBridge | 161:aa5281ff4a02 | 197 | extern "C" { |
AnnaBridge | 161:aa5281ff4a02 | 198 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 199 | |
AnnaBridge | 161:aa5281ff4a02 | 200 | /******************************************************************************* |
AnnaBridge | 161:aa5281ff4a02 | 201 | * API |
AnnaBridge | 161:aa5281ff4a02 | 202 | ******************************************************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 203 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 204 | * @name Initialization and deinitialization |
AnnaBridge | 161:aa5281ff4a02 | 205 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 206 | */ |
AnnaBridge | 161:aa5281ff4a02 | 207 | |
AnnaBridge | 161:aa5281ff4a02 | 208 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 209 | * @brief Enable the access to DCDC registers. |
AnnaBridge | 161:aa5281ff4a02 | 210 | * |
AnnaBridge | 161:aa5281ff4a02 | 211 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 212 | */ |
AnnaBridge | 161:aa5281ff4a02 | 213 | void DCDC_Init(DCDC_Type *base); |
AnnaBridge | 161:aa5281ff4a02 | 214 | |
AnnaBridge | 161:aa5281ff4a02 | 215 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 216 | * @brief Disable the access to DCDC registers. |
AnnaBridge | 161:aa5281ff4a02 | 217 | * |
AnnaBridge | 161:aa5281ff4a02 | 218 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 219 | */ |
AnnaBridge | 161:aa5281ff4a02 | 220 | void DCDC_Deinit(DCDC_Type *base); |
AnnaBridge | 161:aa5281ff4a02 | 221 | |
AnnaBridge | 161:aa5281ff4a02 | 222 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 223 | |
AnnaBridge | 161:aa5281ff4a02 | 224 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 225 | * @name Status |
AnnaBridge | 161:aa5281ff4a02 | 226 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 227 | */ |
AnnaBridge | 161:aa5281ff4a02 | 228 | |
AnnaBridge | 161:aa5281ff4a02 | 229 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 230 | * @brief Get DCDC status flags. |
AnnaBridge | 161:aa5281ff4a02 | 231 | * |
AnnaBridge | 161:aa5281ff4a02 | 232 | * @param base peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 233 | * @return Mask of asserted status flags. See to "_dcdc_status_flags_t". |
AnnaBridge | 161:aa5281ff4a02 | 234 | */ |
AnnaBridge | 161:aa5281ff4a02 | 235 | uint32_t DCDC_GetstatusFlags(DCDC_Type *base); |
AnnaBridge | 161:aa5281ff4a02 | 236 | |
AnnaBridge | 161:aa5281ff4a02 | 237 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 238 | |
AnnaBridge | 161:aa5281ff4a02 | 239 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 240 | * @name Misc control. |
AnnaBridge | 161:aa5281ff4a02 | 241 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 242 | */ |
AnnaBridge | 161:aa5281ff4a02 | 243 | |
AnnaBridge | 161:aa5281ff4a02 | 244 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 245 | * @brief Enable the output range comparator. |
AnnaBridge | 161:aa5281ff4a02 | 246 | * |
AnnaBridge | 161:aa5281ff4a02 | 247 | * The output range comparator is disabled by default. |
AnnaBridge | 161:aa5281ff4a02 | 248 | * |
AnnaBridge | 161:aa5281ff4a02 | 249 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 250 | * @param enable Enable the feature or not. |
AnnaBridge | 161:aa5281ff4a02 | 251 | */ |
AnnaBridge | 161:aa5281ff4a02 | 252 | static inline void DCDC_EnableOutputRangeComparator(DCDC_Type *base, bool enable) |
AnnaBridge | 161:aa5281ff4a02 | 253 | { |
AnnaBridge | 161:aa5281ff4a02 | 254 | if (enable) |
AnnaBridge | 161:aa5281ff4a02 | 255 | { |
AnnaBridge | 161:aa5281ff4a02 | 256 | base->REG0 &= ~DCDC_REG0_PWD_CMP_OFFSET_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 257 | } |
AnnaBridge | 161:aa5281ff4a02 | 258 | else |
AnnaBridge | 161:aa5281ff4a02 | 259 | { |
AnnaBridge | 161:aa5281ff4a02 | 260 | base->REG0 |= DCDC_REG0_PWD_CMP_OFFSET_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 261 | } |
AnnaBridge | 161:aa5281ff4a02 | 262 | } |
AnnaBridge | 161:aa5281ff4a02 | 263 | |
AnnaBridge | 161:aa5281ff4a02 | 264 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 265 | * @brief Configure the DCDC clock source. |
AnnaBridge | 161:aa5281ff4a02 | 266 | * |
AnnaBridge | 161:aa5281ff4a02 | 267 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 268 | * @param clockSource Clock source for DCDC. See to "dcdc_clock_source_t". |
AnnaBridge | 161:aa5281ff4a02 | 269 | */ |
AnnaBridge | 161:aa5281ff4a02 | 270 | void DCDC_SetClockSource(DCDC_Type *base, dcdc_clock_source_t clockSource); |
AnnaBridge | 161:aa5281ff4a02 | 271 | |
AnnaBridge | 161:aa5281ff4a02 | 272 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 273 | * @brief Get the default setting for detection configuration. |
AnnaBridge | 161:aa5281ff4a02 | 274 | * |
AnnaBridge | 161:aa5281ff4a02 | 275 | * The default configuration are set according to responding registers' setting when powered on. |
AnnaBridge | 161:aa5281ff4a02 | 276 | * They are: |
AnnaBridge | 161:aa5281ff4a02 | 277 | * @code |
AnnaBridge | 161:aa5281ff4a02 | 278 | * config->enableXtalokDetection = false; |
AnnaBridge | 161:aa5281ff4a02 | 279 | * config->powerDownOverVoltageDetection = true; |
AnnaBridge | 161:aa5281ff4a02 | 280 | * config->powerDownLowVlotageDetection = false; |
AnnaBridge | 161:aa5281ff4a02 | 281 | * config->powerDownOverCurrentDetection = true; |
AnnaBridge | 161:aa5281ff4a02 | 282 | * config->powerDownPeakCurrentDetection = true; |
AnnaBridge | 161:aa5281ff4a02 | 283 | * config->powerDownZeroCrossDetection = true; |
AnnaBridge | 161:aa5281ff4a02 | 284 | * config->OverCurrentThreshold = kDCDC_OverCurrentThresholdAlt0; |
AnnaBridge | 161:aa5281ff4a02 | 285 | * config->PeakCurrentThreshold = kDCDC_PeakCurrentThresholdAlt0; |
AnnaBridge | 161:aa5281ff4a02 | 286 | * @endcode |
AnnaBridge | 161:aa5281ff4a02 | 287 | * |
AnnaBridge | 161:aa5281ff4a02 | 288 | * @param config Pointer to configuration structure. See to "dcdc_detection_config_t" |
AnnaBridge | 161:aa5281ff4a02 | 289 | */ |
AnnaBridge | 161:aa5281ff4a02 | 290 | void DCDC_GetDefaultDetectionConfig(dcdc_detection_config_t *config); |
AnnaBridge | 161:aa5281ff4a02 | 291 | |
AnnaBridge | 161:aa5281ff4a02 | 292 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 293 | * @breif Configure the DCDC detection. |
AnnaBridge | 161:aa5281ff4a02 | 294 | * |
AnnaBridge | 161:aa5281ff4a02 | 295 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 296 | * @param config Pointer to configuration structure. See to "dcdc_detection_config_t" |
AnnaBridge | 161:aa5281ff4a02 | 297 | */ |
AnnaBridge | 161:aa5281ff4a02 | 298 | void DCDC_SetDetectionConfig(DCDC_Type *base, const dcdc_detection_config_t *config); |
AnnaBridge | 161:aa5281ff4a02 | 299 | |
AnnaBridge | 161:aa5281ff4a02 | 300 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 301 | * @brief Get the default setting for low power configuration. |
AnnaBridge | 161:aa5281ff4a02 | 302 | * |
AnnaBridge | 161:aa5281ff4a02 | 303 | * The default configuration are set according to responding registers' setting when powered on. |
AnnaBridge | 161:aa5281ff4a02 | 304 | * They are: |
AnnaBridge | 161:aa5281ff4a02 | 305 | * @code |
AnnaBridge | 161:aa5281ff4a02 | 306 | * config->enableOverloadDetection = true; |
AnnaBridge | 161:aa5281ff4a02 | 307 | * config->enableAdjustHystereticValue = false; |
AnnaBridge | 161:aa5281ff4a02 | 308 | * config->countChargingTimePeriod = kDCDC_CountChargingTimePeriod8Cycle; |
AnnaBridge | 161:aa5281ff4a02 | 309 | * config->countChargingTimeThreshold = kDCDC_CountChargingTimeThreshold32; |
AnnaBridge | 161:aa5281ff4a02 | 310 | * @endcode |
AnnaBridge | 161:aa5281ff4a02 | 311 | * |
AnnaBridge | 161:aa5281ff4a02 | 312 | * @param config Pointer to configuration structure. See to "dcdc_low_power_config_t" |
AnnaBridge | 161:aa5281ff4a02 | 313 | */ |
AnnaBridge | 161:aa5281ff4a02 | 314 | void DCDC_GetDefaultLowPowerConfig(dcdc_low_power_config_t *config); |
AnnaBridge | 161:aa5281ff4a02 | 315 | |
AnnaBridge | 161:aa5281ff4a02 | 316 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 317 | * @brief Configure the DCDC low power. |
AnnaBridge | 161:aa5281ff4a02 | 318 | * |
AnnaBridge | 161:aa5281ff4a02 | 319 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 320 | * @param config Pointer to configuration structure. See to "dcdc_low_power_config_t". |
AnnaBridge | 161:aa5281ff4a02 | 321 | */ |
AnnaBridge | 161:aa5281ff4a02 | 322 | void DCDC_SetLowPowerConfig(DCDC_Type *base, const dcdc_low_power_config_t *config); |
AnnaBridge | 161:aa5281ff4a02 | 323 | |
AnnaBridge | 161:aa5281ff4a02 | 324 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 325 | * @brief Reset current alert signal. Alert signal is generate by peak current detection. |
AnnaBridge | 161:aa5281ff4a02 | 326 | * |
AnnaBridge | 161:aa5281ff4a02 | 327 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 328 | * @param enable Switcher to reset signal. True means reset signal. False means don't reset signal. |
AnnaBridge | 161:aa5281ff4a02 | 329 | */ |
AnnaBridge | 161:aa5281ff4a02 | 330 | void DCDC_ResetCurrentAlertSignal(DCDC_Type *base, bool enable); |
AnnaBridge | 161:aa5281ff4a02 | 331 | |
AnnaBridge | 161:aa5281ff4a02 | 332 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 333 | * @brief Set the bangap trim value to trim bandgap voltage. |
AnnaBridge | 161:aa5281ff4a02 | 334 | * |
AnnaBridge | 161:aa5281ff4a02 | 335 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 336 | * @param TrimValue The bangap trim value. Available range is 0U-31U. |
AnnaBridge | 161:aa5281ff4a02 | 337 | */ |
AnnaBridge | 161:aa5281ff4a02 | 338 | static inline void DCDC_SetBandgapVoltageTrimValue(DCDC_Type *base, uint32_t trimValue) |
AnnaBridge | 161:aa5281ff4a02 | 339 | { |
AnnaBridge | 161:aa5281ff4a02 | 340 | base->REG1 &= ~DCDC_REG1_VBG_TRIM_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 341 | base->REG1 |= DCDC_REG1_VBG_TRIM(trimValue); |
AnnaBridge | 161:aa5281ff4a02 | 342 | } |
AnnaBridge | 161:aa5281ff4a02 | 343 | |
AnnaBridge | 161:aa5281ff4a02 | 344 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 345 | * @brief Get the default setting for loop control configuration. |
AnnaBridge | 161:aa5281ff4a02 | 346 | * |
AnnaBridge | 161:aa5281ff4a02 | 347 | * The default configuration are set according to responding registers' setting when powered on. |
AnnaBridge | 161:aa5281ff4a02 | 348 | * They are: |
AnnaBridge | 161:aa5281ff4a02 | 349 | * @code |
AnnaBridge | 161:aa5281ff4a02 | 350 | * config->enableCommonHysteresis = false; |
AnnaBridge | 161:aa5281ff4a02 | 351 | * config->enableCommonThresholdDetection = false; |
AnnaBridge | 161:aa5281ff4a02 | 352 | * config->enableInvertHysteresisSign = false; |
AnnaBridge | 161:aa5281ff4a02 | 353 | * config->enableRCThresholdDetection = false; |
AnnaBridge | 161:aa5281ff4a02 | 354 | * config->enableRCScaleCircuit = 0U; |
AnnaBridge | 161:aa5281ff4a02 | 355 | * config->complementFeedForwardStep = 0U; |
AnnaBridge | 161:aa5281ff4a02 | 356 | * config->controlParameterMagnitude = 2U; |
AnnaBridge | 161:aa5281ff4a02 | 357 | * config->integralProportionalRatio = 2U; |
AnnaBridge | 161:aa5281ff4a02 | 358 | * @endcode |
AnnaBridge | 161:aa5281ff4a02 | 359 | * |
AnnaBridge | 161:aa5281ff4a02 | 360 | * @param config Pointer to configuration structure. See to "dcdc_loop_control_config_t" |
AnnaBridge | 161:aa5281ff4a02 | 361 | */ |
AnnaBridge | 161:aa5281ff4a02 | 362 | void DCDC_GetDefaultLoopControlConfig(dcdc_loop_control_config_t *config); |
AnnaBridge | 161:aa5281ff4a02 | 363 | |
AnnaBridge | 161:aa5281ff4a02 | 364 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 365 | * @brief Configure the DCDC loop control. |
AnnaBridge | 161:aa5281ff4a02 | 366 | * |
AnnaBridge | 161:aa5281ff4a02 | 367 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 368 | * @param config Pointer to configuration structure. See to "dcdc_loop_control_config_t". |
AnnaBridge | 161:aa5281ff4a02 | 369 | */ |
AnnaBridge | 161:aa5281ff4a02 | 370 | void DCDC_SetLoopControlConfig(DCDC_Type *base, const dcdc_loop_control_config_t *config); |
AnnaBridge | 161:aa5281ff4a02 | 371 | |
AnnaBridge | 161:aa5281ff4a02 | 372 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 373 | * @brief Configure for the min power. |
AnnaBridge | 161:aa5281ff4a02 | 374 | * |
AnnaBridge | 161:aa5281ff4a02 | 375 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 376 | * @param config Pointer to configuration structure. See to "dcdc_min_power_config_t". |
AnnaBridge | 161:aa5281ff4a02 | 377 | */ |
AnnaBridge | 161:aa5281ff4a02 | 378 | void DCDC_SetMinPowerConfig(DCDC_Type *base, const dcdc_min_power_config_t *config); |
AnnaBridge | 161:aa5281ff4a02 | 379 | |
AnnaBridge | 161:aa5281ff4a02 | 380 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 381 | * @brief Set the current bias of low power comparator. |
AnnaBridge | 161:aa5281ff4a02 | 382 | * |
AnnaBridge | 161:aa5281ff4a02 | 383 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 384 | * @param biasVaule The current bias of low power comparator. Refer to "dcdc_comparator_current_bias_t". |
AnnaBridge | 161:aa5281ff4a02 | 385 | */ |
AnnaBridge | 161:aa5281ff4a02 | 386 | static inline void DCDC_SetLPComparatorBiasValue(DCDC_Type *base, dcdc_comparator_current_bias_t biasVaule) |
AnnaBridge | 161:aa5281ff4a02 | 387 | { |
AnnaBridge | 161:aa5281ff4a02 | 388 | base->REG1 &= ~DCDC_REG1_LP_CMP_ISRC_SEL_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 389 | base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasVaule); |
AnnaBridge | 161:aa5281ff4a02 | 390 | } |
AnnaBridge | 161:aa5281ff4a02 | 391 | |
AnnaBridge | 161:aa5281ff4a02 | 392 | static inline void DCDC_LockTargetVoltage(DCDC_Type *base) |
AnnaBridge | 161:aa5281ff4a02 | 393 | { |
AnnaBridge | 161:aa5281ff4a02 | 394 | base->REG3 |= DCDC_REG3_DISABLE_STEP_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 395 | } |
AnnaBridge | 161:aa5281ff4a02 | 396 | |
AnnaBridge | 161:aa5281ff4a02 | 397 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 398 | * @brief Adjust the target voltage of VDD_SOC in run mode and low power mode. |
AnnaBridge | 161:aa5281ff4a02 | 399 | * |
AnnaBridge | 161:aa5281ff4a02 | 400 | * This function is to adjust the target voltage of DCDC output. Change them and finally wait until the output is |
AnnaBridge | 161:aa5281ff4a02 | 401 | * stabled. |
AnnaBridge | 161:aa5281ff4a02 | 402 | * Set the target value of run mode the same as low power mode before entering power save mode, because DCDC will switch |
AnnaBridge | 161:aa5281ff4a02 | 403 | * back to run mode if it detects the current loading is larger than about 50 mA(typical value). |
AnnaBridge | 161:aa5281ff4a02 | 404 | * |
AnnaBridge | 161:aa5281ff4a02 | 405 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 406 | * @param VDDRun Target value in run mode. 25 mV each step from 0x00 to 0x1F. 00 is for 0.8V, 0x1F is for 1.575V. |
AnnaBridge | 161:aa5281ff4a02 | 407 | * @param VDDStandby Target value in low power mode. 25 mV each step from 0x00 to 0x4. 00 is for 0.9V, 0x4 is for 1.0V. |
AnnaBridge | 161:aa5281ff4a02 | 408 | */ |
AnnaBridge | 161:aa5281ff4a02 | 409 | void DCDC_AdjustTargetVoltage(DCDC_Type *base, uint32_t VDDRun, uint32_t VDDStandby); |
AnnaBridge | 161:aa5281ff4a02 | 410 | |
AnnaBridge | 161:aa5281ff4a02 | 411 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 412 | * @brief Configure the DCDC internal regulator. |
AnnaBridge | 161:aa5281ff4a02 | 413 | * |
AnnaBridge | 161:aa5281ff4a02 | 414 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 415 | * @param config Pointer to configuration structure. See to "dcdc_internal_regulator_config_t". |
AnnaBridge | 161:aa5281ff4a02 | 416 | */ |
AnnaBridge | 161:aa5281ff4a02 | 417 | void DCDC_SetInternalRegulatorConfig(DCDC_Type *base, const dcdc_internal_regulator_config_t *config); |
AnnaBridge | 161:aa5281ff4a02 | 418 | |
AnnaBridge | 161:aa5281ff4a02 | 419 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 420 | * @brief Ajust delay to reduce ground noise. |
AnnaBridge | 161:aa5281ff4a02 | 421 | * |
AnnaBridge | 161:aa5281ff4a02 | 422 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 423 | * @param enable Enable the feature or not. |
AnnaBridge | 161:aa5281ff4a02 | 424 | */ |
AnnaBridge | 161:aa5281ff4a02 | 425 | static inline void DCDC_EnableAdjustDelay(DCDC_Type *base, bool enable) |
AnnaBridge | 161:aa5281ff4a02 | 426 | { |
AnnaBridge | 161:aa5281ff4a02 | 427 | if (enable) |
AnnaBridge | 161:aa5281ff4a02 | 428 | { |
AnnaBridge | 161:aa5281ff4a02 | 429 | base->REG3 |= DCDC_REG3_MISC_DELAY_TIMING_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 430 | } |
AnnaBridge | 161:aa5281ff4a02 | 431 | else |
AnnaBridge | 161:aa5281ff4a02 | 432 | { |
AnnaBridge | 161:aa5281ff4a02 | 433 | base->REG3 &= ~DCDC_REG3_MISC_DELAY_TIMING_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 434 | } |
AnnaBridge | 161:aa5281ff4a02 | 435 | } |
AnnaBridge | 161:aa5281ff4a02 | 436 | |
AnnaBridge | 161:aa5281ff4a02 | 437 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 438 | * @brief Enable/Disable to improve the transition from heavy load to light load. It is valid while zero |
AnnaBridge | 161:aa5281ff4a02 | 439 | * cross detection is enabled. If ouput exceeds the threshold, DCDC would return CCM from DCM. |
AnnaBridge | 161:aa5281ff4a02 | 440 | * |
AnnaBridge | 161:aa5281ff4a02 | 441 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 442 | * @param enable Enable the feature or not. |
AnnaBridge | 161:aa5281ff4a02 | 443 | */ |
AnnaBridge | 161:aa5281ff4a02 | 444 | static inline void DCDC_EnableImproveTransition(DCDC_Type *base, bool enable) |
AnnaBridge | 161:aa5281ff4a02 | 445 | { |
AnnaBridge | 161:aa5281ff4a02 | 446 | if (enable) |
AnnaBridge | 161:aa5281ff4a02 | 447 | { |
AnnaBridge | 161:aa5281ff4a02 | 448 | base->REG2 |= DCDC_REG2_DCM_SET_CTRL_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 449 | } |
AnnaBridge | 161:aa5281ff4a02 | 450 | else |
AnnaBridge | 161:aa5281ff4a02 | 451 | { |
AnnaBridge | 161:aa5281ff4a02 | 452 | base->REG2 &= ~DCDC_REG2_DCM_SET_CTRL_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 453 | } |
AnnaBridge | 161:aa5281ff4a02 | 454 | } |
AnnaBridge | 161:aa5281ff4a02 | 455 | |
AnnaBridge | 161:aa5281ff4a02 | 456 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 457 | |
AnnaBridge | 161:aa5281ff4a02 | 458 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 459 | * @name Application guideline. |
AnnaBridge | 161:aa5281ff4a02 | 460 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 461 | */ |
AnnaBridge | 161:aa5281ff4a02 | 462 | |
AnnaBridge | 161:aa5281ff4a02 | 463 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 464 | * @brief Boot DCDC into DCM(discontinous conduction mode). |
AnnaBridge | 161:aa5281ff4a02 | 465 | * |
AnnaBridge | 161:aa5281ff4a02 | 466 | * pwd_zcd=0x0; |
AnnaBridge | 161:aa5281ff4a02 | 467 | * pwd_cmp_offset=0x0; |
AnnaBridge | 161:aa5281ff4a02 | 468 | * dcdc_loopctrl_en_rcscale=0x3 or 0x5; |
AnnaBridge | 161:aa5281ff4a02 | 469 | * DCM_set_ctrl=1'b1; |
AnnaBridge | 161:aa5281ff4a02 | 470 | * |
AnnaBridge | 161:aa5281ff4a02 | 471 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 472 | */ |
AnnaBridge | 161:aa5281ff4a02 | 473 | void DCDC_BootIntoDCM(DCDC_Type *base); |
AnnaBridge | 161:aa5281ff4a02 | 474 | |
AnnaBridge | 161:aa5281ff4a02 | 475 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 476 | * @brief Boot DCDC into CCM(continous conduction mode). |
AnnaBridge | 161:aa5281ff4a02 | 477 | * |
AnnaBridge | 161:aa5281ff4a02 | 478 | * pwd_zcd=0x1; |
AnnaBridge | 161:aa5281ff4a02 | 479 | * pwd_cmp_offset=0x0; |
AnnaBridge | 161:aa5281ff4a02 | 480 | * dcdc_loopctrl_en_rcscale=0x3; |
AnnaBridge | 161:aa5281ff4a02 | 481 | * |
AnnaBridge | 161:aa5281ff4a02 | 482 | * @param base DCDC peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 483 | */ |
AnnaBridge | 161:aa5281ff4a02 | 484 | void DCDC_BootIntoCCM(DCDC_Type *base); |
AnnaBridge | 161:aa5281ff4a02 | 485 | |
AnnaBridge | 161:aa5281ff4a02 | 486 | #if defined(__cplusplus) |
AnnaBridge | 161:aa5281ff4a02 | 487 | } |
AnnaBridge | 161:aa5281ff4a02 | 488 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 489 | |
AnnaBridge | 161:aa5281ff4a02 | 490 | #endif /* __FSL_DCDC_H__ */ |