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TARGET_MIMXRT1050_EVK/TOOLCHAIN_IAR/fsl_common.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 161:aa5281ff4a02 | 1 | /* |
AnnaBridge | 170:e95d10626187 | 2 | * The Clear BSD License |
AnnaBridge | 161:aa5281ff4a02 | 3 | * Copyright (c) 2015-2016, Freescale Semiconductor, Inc. |
AnnaBridge | 161:aa5281ff4a02 | 4 | * Copyright 2016-2017 NXP |
AnnaBridge | 170:e95d10626187 | 5 | * All rights reserved. |
AnnaBridge | 161:aa5281ff4a02 | 6 | * |
AnnaBridge | 161:aa5281ff4a02 | 7 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 170:e95d10626187 | 8 | * are permitted (subject to the limitations in the disclaimer below) provided |
AnnaBridge | 170:e95d10626187 | 9 | * that the following conditions are met: |
AnnaBridge | 161:aa5281ff4a02 | 10 | * |
AnnaBridge | 161:aa5281ff4a02 | 11 | * o Redistributions of source code must retain the above copyright notice, this list |
AnnaBridge | 161:aa5281ff4a02 | 12 | * of conditions and the following disclaimer. |
AnnaBridge | 161:aa5281ff4a02 | 13 | * |
AnnaBridge | 161:aa5281ff4a02 | 14 | * o Redistributions in binary form must reproduce the above copyright notice, this |
AnnaBridge | 161:aa5281ff4a02 | 15 | * list of conditions and the following disclaimer in the documentation and/or |
AnnaBridge | 161:aa5281ff4a02 | 16 | * other materials provided with the distribution. |
AnnaBridge | 161:aa5281ff4a02 | 17 | * |
AnnaBridge | 161:aa5281ff4a02 | 18 | * o Neither the name of the copyright holder nor the names of its |
AnnaBridge | 161:aa5281ff4a02 | 19 | * contributors may be used to endorse or promote products derived from this |
AnnaBridge | 161:aa5281ff4a02 | 20 | * software without specific prior written permission. |
AnnaBridge | 161:aa5281ff4a02 | 21 | * |
AnnaBridge | 170:e95d10626187 | 22 | * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. |
AnnaBridge | 161:aa5281ff4a02 | 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
AnnaBridge | 161:aa5281ff4a02 | 24 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
AnnaBridge | 161:aa5281ff4a02 | 25 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 161:aa5281ff4a02 | 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
AnnaBridge | 161:aa5281ff4a02 | 27 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
AnnaBridge | 161:aa5281ff4a02 | 28 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
AnnaBridge | 161:aa5281ff4a02 | 29 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
AnnaBridge | 161:aa5281ff4a02 | 30 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
AnnaBridge | 161:aa5281ff4a02 | 31 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
AnnaBridge | 161:aa5281ff4a02 | 32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 161:aa5281ff4a02 | 33 | */ |
AnnaBridge | 161:aa5281ff4a02 | 34 | |
AnnaBridge | 161:aa5281ff4a02 | 35 | #ifndef _FSL_COMMON_H_ |
AnnaBridge | 161:aa5281ff4a02 | 36 | #define _FSL_COMMON_H_ |
AnnaBridge | 161:aa5281ff4a02 | 37 | |
AnnaBridge | 161:aa5281ff4a02 | 38 | #include <assert.h> |
AnnaBridge | 161:aa5281ff4a02 | 39 | #include <stdbool.h> |
AnnaBridge | 161:aa5281ff4a02 | 40 | #include <stdint.h> |
AnnaBridge | 161:aa5281ff4a02 | 41 | #include <string.h> |
AnnaBridge | 161:aa5281ff4a02 | 42 | #include <stdlib.h> |
AnnaBridge | 161:aa5281ff4a02 | 43 | |
AnnaBridge | 161:aa5281ff4a02 | 44 | #if defined(__ICCARM__) |
AnnaBridge | 161:aa5281ff4a02 | 45 | #include <stddef.h> |
AnnaBridge | 161:aa5281ff4a02 | 46 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 47 | |
AnnaBridge | 161:aa5281ff4a02 | 48 | #include "fsl_device_registers.h" |
AnnaBridge | 161:aa5281ff4a02 | 49 | |
AnnaBridge | 161:aa5281ff4a02 | 50 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 51 | * @addtogroup ksdk_common |
AnnaBridge | 161:aa5281ff4a02 | 52 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 53 | */ |
AnnaBridge | 161:aa5281ff4a02 | 54 | |
AnnaBridge | 161:aa5281ff4a02 | 55 | /******************************************************************************* |
AnnaBridge | 161:aa5281ff4a02 | 56 | * Definitions |
AnnaBridge | 161:aa5281ff4a02 | 57 | ******************************************************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 58 | |
AnnaBridge | 161:aa5281ff4a02 | 59 | /*! @brief Construct a status code value from a group and code number. */ |
AnnaBridge | 161:aa5281ff4a02 | 60 | #define MAKE_STATUS(group, code) ((((group)*100) + (code))) |
AnnaBridge | 161:aa5281ff4a02 | 61 | |
AnnaBridge | 161:aa5281ff4a02 | 62 | /*! @brief Construct the version number for drivers. */ |
AnnaBridge | 161:aa5281ff4a02 | 63 | #define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix)) |
AnnaBridge | 161:aa5281ff4a02 | 64 | |
AnnaBridge | 161:aa5281ff4a02 | 65 | /*! @name Driver version */ |
AnnaBridge | 161:aa5281ff4a02 | 66 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 67 | /*! @brief common driver version 2.0.0. */ |
AnnaBridge | 161:aa5281ff4a02 | 68 | #define FSL_COMMON_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) |
AnnaBridge | 161:aa5281ff4a02 | 69 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 70 | |
AnnaBridge | 161:aa5281ff4a02 | 71 | /* Debug console type definition. */ |
AnnaBridge | 170:e95d10626187 | 72 | #define DEBUG_CONSOLE_DEVICE_TYPE_NONE 0U /*!< No debug console. */ |
AnnaBridge | 170:e95d10626187 | 73 | #define DEBUG_CONSOLE_DEVICE_TYPE_UART 1U /*!< Debug console base on UART. */ |
AnnaBridge | 170:e95d10626187 | 74 | #define DEBUG_CONSOLE_DEVICE_TYPE_LPUART 2U /*!< Debug console base on LPUART. */ |
AnnaBridge | 170:e95d10626187 | 75 | #define DEBUG_CONSOLE_DEVICE_TYPE_LPSCI 3U /*!< Debug console base on LPSCI. */ |
AnnaBridge | 170:e95d10626187 | 76 | #define DEBUG_CONSOLE_DEVICE_TYPE_USBCDC 4U /*!< Debug console base on USBCDC. */ |
AnnaBridge | 170:e95d10626187 | 77 | #define DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM 5U /*!< Debug console base on USBCDC. */ |
AnnaBridge | 170:e95d10626187 | 78 | #define DEBUG_CONSOLE_DEVICE_TYPE_IUART 6U /*!< Debug console base on i.MX UART. */ |
AnnaBridge | 170:e95d10626187 | 79 | #define DEBUG_CONSOLE_DEVICE_TYPE_VUSART 7U /*!< Debug console base on LPC_USART. */ |
AnnaBridge | 170:e95d10626187 | 80 | #define DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART 8U /*!< Debug console base on LPC_USART. */ |
AnnaBridge | 170:e95d10626187 | 81 | #define DEBUG_CONSOLE_DEVICE_TYPE_SWO 9U /*!< Debug console base on SWO. */ |
AnnaBridge | 161:aa5281ff4a02 | 82 | |
AnnaBridge | 161:aa5281ff4a02 | 83 | /*! @brief Status group numbers. */ |
AnnaBridge | 161:aa5281ff4a02 | 84 | enum _status_groups |
AnnaBridge | 161:aa5281ff4a02 | 85 | { |
AnnaBridge | 161:aa5281ff4a02 | 86 | kStatusGroup_Generic = 0, /*!< Group number for generic status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 87 | kStatusGroup_FLASH = 1, /*!< Group number for FLASH status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 88 | kStatusGroup_LPSPI = 4, /*!< Group number for LPSPI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 89 | kStatusGroup_FLEXIO_SPI = 5, /*!< Group number for FLEXIO SPI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 90 | kStatusGroup_DSPI = 6, /*!< Group number for DSPI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 91 | kStatusGroup_FLEXIO_UART = 7, /*!< Group number for FLEXIO UART status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 92 | kStatusGroup_FLEXIO_I2C = 8, /*!< Group number for FLEXIO I2C status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 93 | kStatusGroup_LPI2C = 9, /*!< Group number for LPI2C status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 94 | kStatusGroup_UART = 10, /*!< Group number for UART status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 95 | kStatusGroup_I2C = 11, /*!< Group number for UART status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 96 | kStatusGroup_LPSCI = 12, /*!< Group number for LPSCI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 97 | kStatusGroup_LPUART = 13, /*!< Group number for LPUART status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 98 | kStatusGroup_SPI = 14, /*!< Group number for SPI status code.*/ |
AnnaBridge | 161:aa5281ff4a02 | 99 | kStatusGroup_XRDC = 15, /*!< Group number for XRDC status code.*/ |
AnnaBridge | 161:aa5281ff4a02 | 100 | kStatusGroup_SEMA42 = 16, /*!< Group number for SEMA42 status code.*/ |
AnnaBridge | 161:aa5281ff4a02 | 101 | kStatusGroup_SDHC = 17, /*!< Group number for SDHC status code */ |
AnnaBridge | 161:aa5281ff4a02 | 102 | kStatusGroup_SDMMC = 18, /*!< Group number for SDMMC status code */ |
AnnaBridge | 161:aa5281ff4a02 | 103 | kStatusGroup_SAI = 19, /*!< Group number for SAI status code */ |
AnnaBridge | 161:aa5281ff4a02 | 104 | kStatusGroup_MCG = 20, /*!< Group number for MCG status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 105 | kStatusGroup_SCG = 21, /*!< Group number for SCG status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 106 | kStatusGroup_SDSPI = 22, /*!< Group number for SDSPI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 107 | kStatusGroup_FLEXIO_I2S = 23, /*!< Group number for FLEXIO I2S status codes */ |
AnnaBridge | 161:aa5281ff4a02 | 108 | kStatusGroup_FLEXIO_MCULCD = 24, /*!< Group number for FLEXIO LCD status codes */ |
AnnaBridge | 161:aa5281ff4a02 | 109 | kStatusGroup_FLASHIAP = 25, /*!< Group number for FLASHIAP status codes */ |
AnnaBridge | 161:aa5281ff4a02 | 110 | kStatusGroup_FLEXCOMM_I2C = 26, /*!< Group number for FLEXCOMM I2C status codes */ |
AnnaBridge | 161:aa5281ff4a02 | 111 | kStatusGroup_I2S = 27, /*!< Group number for I2S status codes */ |
AnnaBridge | 161:aa5281ff4a02 | 112 | kStatusGroup_IUART = 28, /*!< Group number for IUART status codes */ |
AnnaBridge | 161:aa5281ff4a02 | 113 | kStatusGroup_CSI = 29, /*!< Group number for CSI status codes */ |
AnnaBridge | 161:aa5281ff4a02 | 114 | kStatusGroup_MIPI_DSI = 30, /*!< Group number for MIPI DSI status codes */ |
AnnaBridge | 161:aa5281ff4a02 | 115 | kStatusGroup_SDRAMC = 35, /*!< Group number for SDRAMC status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 116 | kStatusGroup_POWER = 39, /*!< Group number for POWER status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 117 | kStatusGroup_ENET = 40, /*!< Group number for ENET status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 118 | kStatusGroup_PHY = 41, /*!< Group number for PHY status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 119 | kStatusGroup_TRGMUX = 42, /*!< Group number for TRGMUX status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 120 | kStatusGroup_SMARTCARD = 43, /*!< Group number for SMARTCARD status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 121 | kStatusGroup_LMEM = 44, /*!< Group number for LMEM status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 122 | kStatusGroup_QSPI = 45, /*!< Group number for QSPI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 123 | kStatusGroup_DMA = 50, /*!< Group number for DMA status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 124 | kStatusGroup_EDMA = 51, /*!< Group number for EDMA status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 125 | kStatusGroup_DMAMGR = 52, /*!< Group number for DMAMGR status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 126 | kStatusGroup_FLEXCAN = 53, /*!< Group number for FlexCAN status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 127 | kStatusGroup_LTC = 54, /*!< Group number for LTC status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 128 | kStatusGroup_FLEXIO_CAMERA = 55, /*!< Group number for FLEXIO CAMERA status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 129 | kStatusGroup_LPC_SPI = 56, /*!< Group number for LPC_SPI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 130 | kStatusGroup_LPC_USART = 57, /*!< Group number for LPC_USART status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 131 | kStatusGroup_DMIC = 58, /*!< Group number for DMIC status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 132 | kStatusGroup_SDIF = 59, /*!< Group number for SDIF status codes.*/ |
AnnaBridge | 161:aa5281ff4a02 | 133 | kStatusGroup_SPIFI = 60, /*!< Group number for SPIFI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 134 | kStatusGroup_OTP = 61, /*!< Group number for OTP status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 135 | kStatusGroup_MCAN = 62, /*!< Group number for MCAN status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 136 | kStatusGroup_CAAM = 63, /*!< Group number for CAAM status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 137 | kStatusGroup_ECSPI = 64, /*!< Group number for ECSPI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 138 | kStatusGroup_USDHC = 65, /*!< Group number for USDHC status codes.*/ |
AnnaBridge | 161:aa5281ff4a02 | 139 | kStatusGroup_LPC_I2C = 66, /*!< Group number for LPC_I2C status codes.*/ |
AnnaBridge | 161:aa5281ff4a02 | 140 | kStatusGroup_DCP = 67, /*!< Group number for DCP status codes.*/ |
AnnaBridge | 161:aa5281ff4a02 | 141 | kStatusGroup_MSCAN = 68, /*!< Group number for MSCAN status codes.*/ |
AnnaBridge | 161:aa5281ff4a02 | 142 | kStatusGroup_ESAI = 69, /*!< Group number for ESAI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 143 | kStatusGroup_FLEXSPI = 70, /*!< Group number for FLEXSPI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 144 | kStatusGroup_MMDC = 71, /*!< Group number for MMDC status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 145 | kStatusGroup_MICFIL = 72, /*!< Group number for MIC status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 146 | kStatusGroup_SDMA = 73, /*!< Group number for SDMA status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 147 | kStatusGroup_ICS = 74, /*!< Group number for ICS status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 148 | kStatusGroup_SPDIF = 75, /*!< Group number for SPDIF status codes. */ |
AnnaBridge | 170:e95d10626187 | 149 | kStatusGroup_LPC_MINISPI = 76, /*!< Group number for LPC_MINISPI status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 150 | kStatusGroup_NOTIFIER = 98, /*!< Group number for NOTIFIER status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 151 | kStatusGroup_DebugConsole = 99, /*!< Group number for debug console status codes. */ |
AnnaBridge | 170:e95d10626187 | 152 | kStatusGroup_SEMC = 100, /*!< Group number for SEMC status codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 153 | kStatusGroup_ApplicationRangeStart = 101, /*!< Starting number for application groups. */ |
AnnaBridge | 161:aa5281ff4a02 | 154 | }; |
AnnaBridge | 161:aa5281ff4a02 | 155 | |
AnnaBridge | 161:aa5281ff4a02 | 156 | /*! @brief Generic status return codes. */ |
AnnaBridge | 161:aa5281ff4a02 | 157 | enum _generic_status |
AnnaBridge | 161:aa5281ff4a02 | 158 | { |
AnnaBridge | 161:aa5281ff4a02 | 159 | kStatus_Success = MAKE_STATUS(kStatusGroup_Generic, 0), |
AnnaBridge | 161:aa5281ff4a02 | 160 | kStatus_Fail = MAKE_STATUS(kStatusGroup_Generic, 1), |
AnnaBridge | 161:aa5281ff4a02 | 161 | kStatus_ReadOnly = MAKE_STATUS(kStatusGroup_Generic, 2), |
AnnaBridge | 161:aa5281ff4a02 | 162 | kStatus_OutOfRange = MAKE_STATUS(kStatusGroup_Generic, 3), |
AnnaBridge | 161:aa5281ff4a02 | 163 | kStatus_InvalidArgument = MAKE_STATUS(kStatusGroup_Generic, 4), |
AnnaBridge | 161:aa5281ff4a02 | 164 | kStatus_Timeout = MAKE_STATUS(kStatusGroup_Generic, 5), |
AnnaBridge | 161:aa5281ff4a02 | 165 | kStatus_NoTransferInProgress = MAKE_STATUS(kStatusGroup_Generic, 6), |
AnnaBridge | 161:aa5281ff4a02 | 166 | }; |
AnnaBridge | 161:aa5281ff4a02 | 167 | |
AnnaBridge | 161:aa5281ff4a02 | 168 | /*! @brief Type used for all status and error return values. */ |
AnnaBridge | 161:aa5281ff4a02 | 169 | typedef int32_t status_t; |
AnnaBridge | 161:aa5281ff4a02 | 170 | |
AnnaBridge | 161:aa5281ff4a02 | 171 | /* |
AnnaBridge | 161:aa5281ff4a02 | 172 | * The fsl_clock.h is included here because it needs MAKE_VERSION/MAKE_STATUS/status_t |
AnnaBridge | 161:aa5281ff4a02 | 173 | * defined in previous of this file. |
AnnaBridge | 161:aa5281ff4a02 | 174 | */ |
AnnaBridge | 161:aa5281ff4a02 | 175 | #include "fsl_clock.h" |
AnnaBridge | 161:aa5281ff4a02 | 176 | |
AnnaBridge | 161:aa5281ff4a02 | 177 | /* |
AnnaBridge | 161:aa5281ff4a02 | 178 | * Chip level peripheral reset API, for MCUs that implement peripheral reset control external to a peripheral |
AnnaBridge | 161:aa5281ff4a02 | 179 | */ |
AnnaBridge | 161:aa5281ff4a02 | 180 | #if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \ |
AnnaBridge | 161:aa5281ff4a02 | 181 | (defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0))) |
AnnaBridge | 161:aa5281ff4a02 | 182 | #include "fsl_reset.h" |
AnnaBridge | 161:aa5281ff4a02 | 183 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 184 | |
AnnaBridge | 170:e95d10626187 | 185 | /* |
AnnaBridge | 170:e95d10626187 | 186 | * Macro guard for whether to use default weak IRQ implementation in drivers |
AnnaBridge | 170:e95d10626187 | 187 | */ |
AnnaBridge | 170:e95d10626187 | 188 | #ifndef FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ |
AnnaBridge | 170:e95d10626187 | 189 | #define FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ 1 |
AnnaBridge | 170:e95d10626187 | 190 | #endif |
AnnaBridge | 170:e95d10626187 | 191 | |
AnnaBridge | 161:aa5281ff4a02 | 192 | /*! @name Min/max macros */ |
AnnaBridge | 161:aa5281ff4a02 | 193 | /* @{ */ |
AnnaBridge | 161:aa5281ff4a02 | 194 | #if !defined(MIN) |
AnnaBridge | 161:aa5281ff4a02 | 195 | #define MIN(a, b) ((a) < (b) ? (a) : (b)) |
AnnaBridge | 161:aa5281ff4a02 | 196 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 197 | |
AnnaBridge | 161:aa5281ff4a02 | 198 | #if !defined(MAX) |
AnnaBridge | 161:aa5281ff4a02 | 199 | #define MAX(a, b) ((a) > (b) ? (a) : (b)) |
AnnaBridge | 161:aa5281ff4a02 | 200 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 201 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 202 | |
AnnaBridge | 161:aa5281ff4a02 | 203 | /*! @brief Computes the number of elements in an array. */ |
AnnaBridge | 161:aa5281ff4a02 | 204 | #if !defined(ARRAY_SIZE) |
AnnaBridge | 161:aa5281ff4a02 | 205 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) |
AnnaBridge | 161:aa5281ff4a02 | 206 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 207 | |
AnnaBridge | 161:aa5281ff4a02 | 208 | /*! @name UINT16_MAX/UINT32_MAX value */ |
AnnaBridge | 161:aa5281ff4a02 | 209 | /* @{ */ |
AnnaBridge | 161:aa5281ff4a02 | 210 | #if !defined(UINT16_MAX) |
AnnaBridge | 161:aa5281ff4a02 | 211 | #define UINT16_MAX ((uint16_t)-1) |
AnnaBridge | 161:aa5281ff4a02 | 212 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 213 | |
AnnaBridge | 161:aa5281ff4a02 | 214 | #if !defined(UINT32_MAX) |
AnnaBridge | 161:aa5281ff4a02 | 215 | #define UINT32_MAX ((uint32_t)-1) |
AnnaBridge | 161:aa5281ff4a02 | 216 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 217 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 218 | |
AnnaBridge | 161:aa5281ff4a02 | 219 | /*! @name Timer utilities */ |
AnnaBridge | 161:aa5281ff4a02 | 220 | /* @{ */ |
AnnaBridge | 161:aa5281ff4a02 | 221 | /*! Macro to convert a microsecond period to raw count value */ |
AnnaBridge | 161:aa5281ff4a02 | 222 | #define USEC_TO_COUNT(us, clockFreqInHz) (uint64_t)((uint64_t)us * clockFreqInHz / 1000000U) |
AnnaBridge | 161:aa5281ff4a02 | 223 | /*! Macro to convert a raw count value to microsecond */ |
AnnaBridge | 161:aa5281ff4a02 | 224 | #define COUNT_TO_USEC(count, clockFreqInHz) (uint64_t)((uint64_t)count * 1000000U / clockFreqInHz) |
AnnaBridge | 161:aa5281ff4a02 | 225 | |
AnnaBridge | 161:aa5281ff4a02 | 226 | /*! Macro to convert a millisecond period to raw count value */ |
AnnaBridge | 161:aa5281ff4a02 | 227 | #define MSEC_TO_COUNT(ms, clockFreqInHz) (uint64_t)((uint64_t)ms * clockFreqInHz / 1000U) |
AnnaBridge | 161:aa5281ff4a02 | 228 | /*! Macro to convert a raw count value to millisecond */ |
AnnaBridge | 161:aa5281ff4a02 | 229 | #define COUNT_TO_MSEC(count, clockFreqInHz) (uint64_t)((uint64_t)count * 1000U / clockFreqInHz) |
AnnaBridge | 161:aa5281ff4a02 | 230 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 231 | |
AnnaBridge | 161:aa5281ff4a02 | 232 | /*! @name Alignment variable definition macros */ |
AnnaBridge | 161:aa5281ff4a02 | 233 | /* @{ */ |
AnnaBridge | 161:aa5281ff4a02 | 234 | #if (defined(__ICCARM__)) |
AnnaBridge | 161:aa5281ff4a02 | 235 | /** |
AnnaBridge | 161:aa5281ff4a02 | 236 | * Workaround to disable MISRA C message suppress warnings for IAR compiler. |
AnnaBridge | 161:aa5281ff4a02 | 237 | * http://supp.iar.com/Support/?note=24725 |
AnnaBridge | 161:aa5281ff4a02 | 238 | */ |
AnnaBridge | 161:aa5281ff4a02 | 239 | _Pragma("diag_suppress=Pm120") |
AnnaBridge | 161:aa5281ff4a02 | 240 | #define SDK_PRAGMA(x) _Pragma(#x) |
AnnaBridge | 161:aa5281ff4a02 | 241 | _Pragma("diag_error=Pm120") |
AnnaBridge | 161:aa5281ff4a02 | 242 | /*! Macro to define a variable with alignbytes alignment */ |
AnnaBridge | 161:aa5281ff4a02 | 243 | #define SDK_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var |
AnnaBridge | 161:aa5281ff4a02 | 244 | /*! Macro to define a variable with L1 d-cache line size alignment */ |
AnnaBridge | 161:aa5281ff4a02 | 245 | #if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) |
AnnaBridge | 161:aa5281ff4a02 | 246 | #define SDK_L1DCACHE_ALIGN(var) SDK_PRAGMA(data_alignment = FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) var |
AnnaBridge | 161:aa5281ff4a02 | 247 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 248 | /*! Macro to define a variable with L2 cache line size alignment */ |
AnnaBridge | 161:aa5281ff4a02 | 249 | #if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) |
AnnaBridge | 161:aa5281ff4a02 | 250 | #define SDK_L2CACHE_ALIGN(var) SDK_PRAGMA(data_alignment = FSL_FEATURE_L2CACHE_LINESIZE_BYTE) var |
AnnaBridge | 161:aa5281ff4a02 | 251 | #endif |
AnnaBridge | 172:65be27845400 | 252 | #elif defined(__CC_ARM) || defined(__ARMCC_VERSION) |
AnnaBridge | 161:aa5281ff4a02 | 253 | /*! Macro to define a variable with alignbytes alignment */ |
AnnaBridge | 172:65be27845400 | 254 | #define SDK_ALIGN(var, alignbytes) __attribute__((aligned(alignbytes))) var |
AnnaBridge | 161:aa5281ff4a02 | 255 | /*! Macro to define a variable with L1 d-cache line size alignment */ |
AnnaBridge | 161:aa5281ff4a02 | 256 | #if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) |
AnnaBridge | 172:65be27845400 | 257 | #define SDK_L1DCACHE_ALIGN(var) __attribute__((aligned(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE))) var |
AnnaBridge | 161:aa5281ff4a02 | 258 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 259 | /*! Macro to define a variable with L2 cache line size alignment */ |
AnnaBridge | 161:aa5281ff4a02 | 260 | #if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) |
AnnaBridge | 172:65be27845400 | 261 | #define SDK_L2CACHE_ALIGN(var) __attribute__((aligned(FSL_FEATURE_L2CACHE_LINESIZE_BYTE))) var |
AnnaBridge | 161:aa5281ff4a02 | 262 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 263 | #elif defined(__GNUC__) |
AnnaBridge | 161:aa5281ff4a02 | 264 | /*! Macro to define a variable with alignbytes alignment */ |
AnnaBridge | 161:aa5281ff4a02 | 265 | #define SDK_ALIGN(var, alignbytes) var __attribute__((aligned(alignbytes))) |
AnnaBridge | 161:aa5281ff4a02 | 266 | /*! Macro to define a variable with L1 d-cache line size alignment */ |
AnnaBridge | 161:aa5281ff4a02 | 267 | #if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) |
AnnaBridge | 161:aa5281ff4a02 | 268 | #define SDK_L1DCACHE_ALIGN(var) var __attribute__((aligned(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE))) |
AnnaBridge | 161:aa5281ff4a02 | 269 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 270 | /*! Macro to define a variable with L2 cache line size alignment */ |
AnnaBridge | 161:aa5281ff4a02 | 271 | #if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) |
AnnaBridge | 161:aa5281ff4a02 | 272 | #define SDK_L2CACHE_ALIGN(var) var __attribute__((aligned(FSL_FEATURE_L2CACHE_LINESIZE_BYTE))) |
AnnaBridge | 161:aa5281ff4a02 | 273 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 274 | #else |
AnnaBridge | 161:aa5281ff4a02 | 275 | #error Toolchain not supported |
AnnaBridge | 161:aa5281ff4a02 | 276 | #define SDK_ALIGN(var, alignbytes) var |
AnnaBridge | 161:aa5281ff4a02 | 277 | #if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) |
AnnaBridge | 161:aa5281ff4a02 | 278 | #define SDK_L1DCACHE_ALIGN(var) var |
AnnaBridge | 161:aa5281ff4a02 | 279 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 280 | #if defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE) |
AnnaBridge | 161:aa5281ff4a02 | 281 | #define SDK_L2CACHE_ALIGN(var) var |
AnnaBridge | 161:aa5281ff4a02 | 282 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 283 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 284 | |
AnnaBridge | 161:aa5281ff4a02 | 285 | /*! Macro to change a value to a given size aligned value */ |
AnnaBridge | 161:aa5281ff4a02 | 286 | #define SDK_SIZEALIGN(var, alignbytes) \ |
AnnaBridge | 161:aa5281ff4a02 | 287 | ((unsigned int)((var) + ((alignbytes)-1)) & (unsigned int)(~(unsigned int)((alignbytes)-1))) |
AnnaBridge | 161:aa5281ff4a02 | 288 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 289 | |
AnnaBridge | 161:aa5281ff4a02 | 290 | /*! @name Non-cacheable region definition macros */ |
AnnaBridge | 161:aa5281ff4a02 | 291 | /* For initialized non-zero non-cacheable variables, please using "AT_NONCACHEABLE_SECTION_INIT(var) ={xx};" or |
AnnaBridge | 161:aa5281ff4a02 | 292 | * "AT_NONCACHEABLE_SECTION_ALIGN_INIT(var) ={xx};" in your projects to define them, for zero-inited non-cacheable variables, |
AnnaBridge | 161:aa5281ff4a02 | 293 | * please using "AT_NONCACHEABLE_SECTION(var);" or "AT_NONCACHEABLE_SECTION_ALIGN(var);" to define them, these zero-inited variables |
AnnaBridge | 161:aa5281ff4a02 | 294 | * will be initialized to zero in system startup. |
AnnaBridge | 161:aa5281ff4a02 | 295 | */ |
AnnaBridge | 161:aa5281ff4a02 | 296 | /* @{ */ |
AnnaBridge | 161:aa5281ff4a02 | 297 | #if (defined(__ICCARM__)) |
AnnaBridge | 161:aa5281ff4a02 | 298 | #if defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE) |
AnnaBridge | 161:aa5281ff4a02 | 299 | #define AT_NONCACHEABLE_SECTION(var) var @"NonCacheable" |
AnnaBridge | 161:aa5281ff4a02 | 300 | #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable" |
AnnaBridge | 161:aa5281ff4a02 | 301 | #define AT_NONCACHEABLE_SECTION_INIT(var) var @"NonCacheable.init" |
AnnaBridge | 161:aa5281ff4a02 | 302 | #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var @"NonCacheable.init" |
AnnaBridge | 161:aa5281ff4a02 | 303 | #else |
AnnaBridge | 161:aa5281ff4a02 | 304 | #define AT_NONCACHEABLE_SECTION(var) var |
AnnaBridge | 161:aa5281ff4a02 | 305 | #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var |
AnnaBridge | 161:aa5281ff4a02 | 306 | #define AT_NONCACHEABLE_SECTION_INIT(var) var |
AnnaBridge | 161:aa5281ff4a02 | 307 | #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) SDK_PRAGMA(data_alignment = alignbytes) var |
AnnaBridge | 161:aa5281ff4a02 | 308 | #endif |
AnnaBridge | 172:65be27845400 | 309 | #elif(defined(__CC_ARM) || defined(__ARMCC_VERSION)) |
AnnaBridge | 161:aa5281ff4a02 | 310 | #if defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE) |
AnnaBridge | 161:aa5281ff4a02 | 311 | #define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"), zero_init)) var |
AnnaBridge | 161:aa5281ff4a02 | 312 | #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \ |
AnnaBridge | 172:65be27845400 | 313 | __attribute__((section("NonCacheable"), zero_init)) __attribute__((aligned(alignbytes))) var |
AnnaBridge | 161:aa5281ff4a02 | 314 | #define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var |
AnnaBridge | 161:aa5281ff4a02 | 315 | #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \ |
AnnaBridge | 172:65be27845400 | 316 | __attribute__((section("NonCacheable.init"))) __attribute__((aligned(alignbytes))) var |
AnnaBridge | 161:aa5281ff4a02 | 317 | #else |
AnnaBridge | 161:aa5281ff4a02 | 318 | #define AT_NONCACHEABLE_SECTION(var) var |
AnnaBridge | 172:65be27845400 | 319 | #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) __attribute__((aligned(alignbytes))) var |
AnnaBridge | 161:aa5281ff4a02 | 320 | #define AT_NONCACHEABLE_SECTION_INIT(var) var |
AnnaBridge | 172:65be27845400 | 321 | #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) __attribute__((aligned(alignbytes))) var |
AnnaBridge | 161:aa5281ff4a02 | 322 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 323 | #elif(defined(__GNUC__)) |
AnnaBridge | 161:aa5281ff4a02 | 324 | /* For GCC, when the non-cacheable section is required, please define "__STARTUP_INITIALIZE_NONCACHEDATA" |
AnnaBridge | 161:aa5281ff4a02 | 325 | * in your projects to make sure the non-cacheable section variables will be initialized in system startup. |
AnnaBridge | 161:aa5281ff4a02 | 326 | */ |
AnnaBridge | 161:aa5281ff4a02 | 327 | #if defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE) |
AnnaBridge | 161:aa5281ff4a02 | 328 | #define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var |
AnnaBridge | 161:aa5281ff4a02 | 329 | #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \ |
AnnaBridge | 161:aa5281ff4a02 | 330 | __attribute__((section("NonCacheable.init"))) var __attribute__((aligned(alignbytes))) |
AnnaBridge | 161:aa5281ff4a02 | 331 | #define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var |
AnnaBridge | 161:aa5281ff4a02 | 332 | #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \ |
AnnaBridge | 161:aa5281ff4a02 | 333 | __attribute__((section("NonCacheable,\"aw\",%nobits @"))) var __attribute__((aligned(alignbytes))) |
AnnaBridge | 161:aa5281ff4a02 | 334 | #else |
AnnaBridge | 161:aa5281ff4a02 | 335 | #define AT_NONCACHEABLE_SECTION(var) var |
AnnaBridge | 161:aa5281ff4a02 | 336 | #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) var __attribute__((aligned(alignbytes))) |
AnnaBridge | 161:aa5281ff4a02 | 337 | #define AT_NONCACHEABLE_SECTION_INIT(var) var |
AnnaBridge | 161:aa5281ff4a02 | 338 | #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) var __attribute__((aligned(alignbytes))) |
AnnaBridge | 161:aa5281ff4a02 | 339 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 340 | #else |
AnnaBridge | 161:aa5281ff4a02 | 341 | #error Toolchain not supported. |
AnnaBridge | 161:aa5281ff4a02 | 342 | #define AT_NONCACHEABLE_SECTION(var) var |
AnnaBridge | 161:aa5281ff4a02 | 343 | #define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) var |
AnnaBridge | 161:aa5281ff4a02 | 344 | #define AT_NONCACHEABLE_SECTION_INIT(var) var |
AnnaBridge | 161:aa5281ff4a02 | 345 | #define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) var |
AnnaBridge | 161:aa5281ff4a02 | 346 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 347 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 348 | |
AnnaBridge | 170:e95d10626187 | 349 | /*! @name Time sensitive region */ |
AnnaBridge | 170:e95d10626187 | 350 | |
AnnaBridge | 161:aa5281ff4a02 | 351 | /******************************************************************************* |
AnnaBridge | 161:aa5281ff4a02 | 352 | * API |
AnnaBridge | 161:aa5281ff4a02 | 353 | ******************************************************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 354 | |
AnnaBridge | 161:aa5281ff4a02 | 355 | #if defined(__cplusplus) |
AnnaBridge | 161:aa5281ff4a02 | 356 | extern "C" |
AnnaBridge | 161:aa5281ff4a02 | 357 | { |
AnnaBridge | 161:aa5281ff4a02 | 358 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 359 | |
AnnaBridge | 161:aa5281ff4a02 | 360 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 361 | * @brief Enable specific interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 362 | * |
AnnaBridge | 161:aa5281ff4a02 | 363 | * Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt |
AnnaBridge | 161:aa5281ff4a02 | 364 | * levels. For example, there are NVIC and intmux. Here the interrupts connected |
AnnaBridge | 161:aa5281ff4a02 | 365 | * to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. |
AnnaBridge | 161:aa5281ff4a02 | 366 | * The interrupts connected to intmux are the LEVEL2 interrupts, they are routed |
AnnaBridge | 161:aa5281ff4a02 | 367 | * to NVIC first then routed to core. |
AnnaBridge | 161:aa5281ff4a02 | 368 | * |
AnnaBridge | 161:aa5281ff4a02 | 369 | * This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts |
AnnaBridge | 161:aa5281ff4a02 | 370 | * is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS. |
AnnaBridge | 161:aa5281ff4a02 | 371 | * |
AnnaBridge | 161:aa5281ff4a02 | 372 | * @param interrupt The IRQ number. |
AnnaBridge | 161:aa5281ff4a02 | 373 | * @retval kStatus_Success Interrupt enabled successfully |
AnnaBridge | 161:aa5281ff4a02 | 374 | * @retval kStatus_Fail Failed to enable the interrupt |
AnnaBridge | 161:aa5281ff4a02 | 375 | */ |
AnnaBridge | 161:aa5281ff4a02 | 376 | static inline status_t EnableIRQ(IRQn_Type interrupt) |
AnnaBridge | 161:aa5281ff4a02 | 377 | { |
AnnaBridge | 161:aa5281ff4a02 | 378 | if (NotAvail_IRQn == interrupt) |
AnnaBridge | 161:aa5281ff4a02 | 379 | { |
AnnaBridge | 161:aa5281ff4a02 | 380 | return kStatus_Fail; |
AnnaBridge | 161:aa5281ff4a02 | 381 | } |
AnnaBridge | 161:aa5281ff4a02 | 382 | |
AnnaBridge | 161:aa5281ff4a02 | 383 | #if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0) |
AnnaBridge | 161:aa5281ff4a02 | 384 | if (interrupt >= FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) |
AnnaBridge | 161:aa5281ff4a02 | 385 | { |
AnnaBridge | 161:aa5281ff4a02 | 386 | return kStatus_Fail; |
AnnaBridge | 161:aa5281ff4a02 | 387 | } |
AnnaBridge | 161:aa5281ff4a02 | 388 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 389 | |
AnnaBridge | 161:aa5281ff4a02 | 390 | #if defined(__GIC_PRIO_BITS) |
AnnaBridge | 161:aa5281ff4a02 | 391 | GIC_EnableIRQ(interrupt); |
AnnaBridge | 161:aa5281ff4a02 | 392 | #else |
AnnaBridge | 161:aa5281ff4a02 | 393 | NVIC_EnableIRQ(interrupt); |
AnnaBridge | 161:aa5281ff4a02 | 394 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 395 | return kStatus_Success; |
AnnaBridge | 161:aa5281ff4a02 | 396 | } |
AnnaBridge | 161:aa5281ff4a02 | 397 | |
AnnaBridge | 161:aa5281ff4a02 | 398 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 399 | * @brief Disable specific interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 400 | * |
AnnaBridge | 161:aa5281ff4a02 | 401 | * Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt |
AnnaBridge | 161:aa5281ff4a02 | 402 | * levels. For example, there are NVIC and intmux. Here the interrupts connected |
AnnaBridge | 161:aa5281ff4a02 | 403 | * to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. |
AnnaBridge | 161:aa5281ff4a02 | 404 | * The interrupts connected to intmux are the LEVEL2 interrupts, they are routed |
AnnaBridge | 161:aa5281ff4a02 | 405 | * to NVIC first then routed to core. |
AnnaBridge | 161:aa5281ff4a02 | 406 | * |
AnnaBridge | 161:aa5281ff4a02 | 407 | * This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts |
AnnaBridge | 161:aa5281ff4a02 | 408 | * is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS. |
AnnaBridge | 161:aa5281ff4a02 | 409 | * |
AnnaBridge | 161:aa5281ff4a02 | 410 | * @param interrupt The IRQ number. |
AnnaBridge | 161:aa5281ff4a02 | 411 | * @retval kStatus_Success Interrupt disabled successfully |
AnnaBridge | 161:aa5281ff4a02 | 412 | * @retval kStatus_Fail Failed to disable the interrupt |
AnnaBridge | 161:aa5281ff4a02 | 413 | */ |
AnnaBridge | 161:aa5281ff4a02 | 414 | static inline status_t DisableIRQ(IRQn_Type interrupt) |
AnnaBridge | 161:aa5281ff4a02 | 415 | { |
AnnaBridge | 161:aa5281ff4a02 | 416 | if (NotAvail_IRQn == interrupt) |
AnnaBridge | 161:aa5281ff4a02 | 417 | { |
AnnaBridge | 161:aa5281ff4a02 | 418 | return kStatus_Fail; |
AnnaBridge | 161:aa5281ff4a02 | 419 | } |
AnnaBridge | 161:aa5281ff4a02 | 420 | |
AnnaBridge | 161:aa5281ff4a02 | 421 | #if defined(FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) && (FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS > 0) |
AnnaBridge | 161:aa5281ff4a02 | 422 | if (interrupt >= FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS) |
AnnaBridge | 161:aa5281ff4a02 | 423 | { |
AnnaBridge | 161:aa5281ff4a02 | 424 | return kStatus_Fail; |
AnnaBridge | 161:aa5281ff4a02 | 425 | } |
AnnaBridge | 161:aa5281ff4a02 | 426 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 427 | |
AnnaBridge | 161:aa5281ff4a02 | 428 | #if defined(__GIC_PRIO_BITS) |
AnnaBridge | 161:aa5281ff4a02 | 429 | GIC_DisableIRQ(interrupt); |
AnnaBridge | 161:aa5281ff4a02 | 430 | #else |
AnnaBridge | 161:aa5281ff4a02 | 431 | NVIC_DisableIRQ(interrupt); |
AnnaBridge | 161:aa5281ff4a02 | 432 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 433 | return kStatus_Success; |
AnnaBridge | 161:aa5281ff4a02 | 434 | } |
AnnaBridge | 161:aa5281ff4a02 | 435 | |
AnnaBridge | 161:aa5281ff4a02 | 436 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 437 | * @brief Disable the global IRQ |
AnnaBridge | 161:aa5281ff4a02 | 438 | * |
AnnaBridge | 161:aa5281ff4a02 | 439 | * Disable the global interrupt and return the current primask register. User is required to provided the primask |
AnnaBridge | 161:aa5281ff4a02 | 440 | * register for the EnableGlobalIRQ(). |
AnnaBridge | 161:aa5281ff4a02 | 441 | * |
AnnaBridge | 161:aa5281ff4a02 | 442 | * @return Current primask value. |
AnnaBridge | 161:aa5281ff4a02 | 443 | */ |
AnnaBridge | 161:aa5281ff4a02 | 444 | static inline uint32_t DisableGlobalIRQ(void) |
AnnaBridge | 161:aa5281ff4a02 | 445 | { |
AnnaBridge | 161:aa5281ff4a02 | 446 | #if defined(CPSR_I_Msk) |
AnnaBridge | 161:aa5281ff4a02 | 447 | uint32_t cpsr = __get_CPSR() & CPSR_I_Msk; |
AnnaBridge | 161:aa5281ff4a02 | 448 | |
AnnaBridge | 161:aa5281ff4a02 | 449 | __disable_irq(); |
AnnaBridge | 161:aa5281ff4a02 | 450 | |
AnnaBridge | 161:aa5281ff4a02 | 451 | return cpsr; |
AnnaBridge | 161:aa5281ff4a02 | 452 | #else |
AnnaBridge | 161:aa5281ff4a02 | 453 | uint32_t regPrimask = __get_PRIMASK(); |
AnnaBridge | 161:aa5281ff4a02 | 454 | |
AnnaBridge | 161:aa5281ff4a02 | 455 | __disable_irq(); |
AnnaBridge | 161:aa5281ff4a02 | 456 | |
AnnaBridge | 161:aa5281ff4a02 | 457 | return regPrimask; |
AnnaBridge | 161:aa5281ff4a02 | 458 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 459 | } |
AnnaBridge | 161:aa5281ff4a02 | 460 | |
AnnaBridge | 161:aa5281ff4a02 | 461 | /*! |
AnnaBridge | 172:65be27845400 | 462 | * @brief Enable the global IRQ |
AnnaBridge | 161:aa5281ff4a02 | 463 | * |
AnnaBridge | 161:aa5281ff4a02 | 464 | * Set the primask register with the provided primask value but not just enable the primask. The idea is for the |
AnnaBridge | 172:65be27845400 | 465 | * convenience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to |
AnnaBridge | 161:aa5281ff4a02 | 466 | * use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair. |
AnnaBridge | 161:aa5281ff4a02 | 467 | * |
AnnaBridge | 161:aa5281ff4a02 | 468 | * @param primask value of primask register to be restored. The primask value is supposed to be provided by the |
AnnaBridge | 161:aa5281ff4a02 | 469 | * DisableGlobalIRQ(). |
AnnaBridge | 161:aa5281ff4a02 | 470 | */ |
AnnaBridge | 161:aa5281ff4a02 | 471 | static inline void EnableGlobalIRQ(uint32_t primask) |
AnnaBridge | 161:aa5281ff4a02 | 472 | { |
AnnaBridge | 161:aa5281ff4a02 | 473 | #if defined(CPSR_I_Msk) |
AnnaBridge | 161:aa5281ff4a02 | 474 | __set_CPSR((__get_CPSR() & ~CPSR_I_Msk) | primask); |
AnnaBridge | 161:aa5281ff4a02 | 475 | #else |
AnnaBridge | 161:aa5281ff4a02 | 476 | __set_PRIMASK(primask); |
AnnaBridge | 161:aa5281ff4a02 | 477 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 478 | } |
AnnaBridge | 161:aa5281ff4a02 | 479 | |
AnnaBridge | 161:aa5281ff4a02 | 480 | #if defined(ENABLE_RAM_VECTOR_TABLE) |
AnnaBridge | 161:aa5281ff4a02 | 481 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 482 | * @brief install IRQ handler |
AnnaBridge | 161:aa5281ff4a02 | 483 | * |
AnnaBridge | 161:aa5281ff4a02 | 484 | * @param irq IRQ number |
AnnaBridge | 161:aa5281ff4a02 | 485 | * @param irqHandler IRQ handler address |
AnnaBridge | 161:aa5281ff4a02 | 486 | * @return The old IRQ handler address |
AnnaBridge | 161:aa5281ff4a02 | 487 | */ |
AnnaBridge | 161:aa5281ff4a02 | 488 | uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler); |
AnnaBridge | 161:aa5281ff4a02 | 489 | #endif /* ENABLE_RAM_VECTOR_TABLE. */ |
AnnaBridge | 161:aa5281ff4a02 | 490 | |
AnnaBridge | 161:aa5281ff4a02 | 491 | #if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) |
AnnaBridge | 161:aa5281ff4a02 | 492 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 493 | * @brief Enable specific interrupt for wake-up from deep-sleep mode. |
AnnaBridge | 161:aa5281ff4a02 | 494 | * |
AnnaBridge | 161:aa5281ff4a02 | 495 | * Enable the interrupt for wake-up from deep sleep mode. |
AnnaBridge | 161:aa5281ff4a02 | 496 | * Some interrupts are typically used in sleep mode only and will not occur during |
AnnaBridge | 161:aa5281ff4a02 | 497 | * deep-sleep mode because relevant clocks are stopped. However, it is possible to enable |
AnnaBridge | 161:aa5281ff4a02 | 498 | * those clocks (significantly increasing power consumption in the reduced power mode), |
AnnaBridge | 161:aa5281ff4a02 | 499 | * making these wake-ups possible. |
AnnaBridge | 161:aa5281ff4a02 | 500 | * |
AnnaBridge | 161:aa5281ff4a02 | 501 | * @note This function also enables the interrupt in the NVIC (EnableIRQ() is called internally). |
AnnaBridge | 161:aa5281ff4a02 | 502 | * |
AnnaBridge | 161:aa5281ff4a02 | 503 | * @param interrupt The IRQ number. |
AnnaBridge | 161:aa5281ff4a02 | 504 | */ |
AnnaBridge | 161:aa5281ff4a02 | 505 | void EnableDeepSleepIRQ(IRQn_Type interrupt); |
AnnaBridge | 161:aa5281ff4a02 | 506 | |
AnnaBridge | 161:aa5281ff4a02 | 507 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 508 | * @brief Disable specific interrupt for wake-up from deep-sleep mode. |
AnnaBridge | 161:aa5281ff4a02 | 509 | * |
AnnaBridge | 161:aa5281ff4a02 | 510 | * Disable the interrupt for wake-up from deep sleep mode. |
AnnaBridge | 161:aa5281ff4a02 | 511 | * Some interrupts are typically used in sleep mode only and will not occur during |
AnnaBridge | 161:aa5281ff4a02 | 512 | * deep-sleep mode because relevant clocks are stopped. However, it is possible to enable |
AnnaBridge | 161:aa5281ff4a02 | 513 | * those clocks (significantly increasing power consumption in the reduced power mode), |
AnnaBridge | 161:aa5281ff4a02 | 514 | * making these wake-ups possible. |
AnnaBridge | 161:aa5281ff4a02 | 515 | * |
AnnaBridge | 161:aa5281ff4a02 | 516 | * @note This function also disables the interrupt in the NVIC (DisableIRQ() is called internally). |
AnnaBridge | 161:aa5281ff4a02 | 517 | * |
AnnaBridge | 161:aa5281ff4a02 | 518 | * @param interrupt The IRQ number. |
AnnaBridge | 161:aa5281ff4a02 | 519 | */ |
AnnaBridge | 161:aa5281ff4a02 | 520 | void DisableDeepSleepIRQ(IRQn_Type interrupt); |
AnnaBridge | 161:aa5281ff4a02 | 521 | #endif /* FSL_FEATURE_SOC_SYSCON_COUNT */ |
AnnaBridge | 161:aa5281ff4a02 | 522 | |
AnnaBridge | 170:e95d10626187 | 523 | /*! |
AnnaBridge | 170:e95d10626187 | 524 | * @brief Allocate memory with given alignment and aligned size. |
AnnaBridge | 170:e95d10626187 | 525 | * |
AnnaBridge | 170:e95d10626187 | 526 | * This is provided to support the dynamically allocated memory |
AnnaBridge | 170:e95d10626187 | 527 | * used in cache-able region. |
AnnaBridge | 170:e95d10626187 | 528 | * @param size The length required to malloc. |
AnnaBridge | 170:e95d10626187 | 529 | * @param alignbytes The alignment size. |
AnnaBridge | 170:e95d10626187 | 530 | * @retval The allocated memory. |
AnnaBridge | 170:e95d10626187 | 531 | */ |
AnnaBridge | 170:e95d10626187 | 532 | void *SDK_Malloc(size_t size, size_t alignbytes); |
AnnaBridge | 170:e95d10626187 | 533 | |
AnnaBridge | 170:e95d10626187 | 534 | /*! |
AnnaBridge | 170:e95d10626187 | 535 | * @brief Free memory. |
AnnaBridge | 170:e95d10626187 | 536 | * |
AnnaBridge | 170:e95d10626187 | 537 | * @param ptr The memory to be release. |
AnnaBridge | 170:e95d10626187 | 538 | */ |
AnnaBridge | 170:e95d10626187 | 539 | void SDK_Free(void *ptr); |
AnnaBridge | 170:e95d10626187 | 540 | |
AnnaBridge | 161:aa5281ff4a02 | 541 | #if defined(__cplusplus) |
AnnaBridge | 161:aa5281ff4a02 | 542 | } |
AnnaBridge | 161:aa5281ff4a02 | 543 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 544 | |
AnnaBridge | 161:aa5281ff4a02 | 545 | /*! @} */ |
AnnaBridge | 161:aa5281ff4a02 | 546 | |
AnnaBridge | 161:aa5281ff4a02 | 547 | #endif /* _FSL_COMMON_H_ */ |