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TARGET_MIMXRT1050_EVK/TOOLCHAIN_IAR/fsl_adc_etc.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /*
AnnaBridge 170:e95d10626187 2 * The Clear BSD License
AnnaBridge 161:aa5281ff4a02 3 * Copyright (c) 2016, Freescale Semiconductor, Inc.
AnnaBridge 161:aa5281ff4a02 4 * Copyright 2016-2017 NXP
AnnaBridge 170:e95d10626187 5 * All rights reserved.
AnnaBridge 170:e95d10626187 6 *
AnnaBridge 161:aa5281ff4a02 7 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 170:e95d10626187 8 * are permitted (subject to the limitations in the disclaimer below) provided
AnnaBridge 170:e95d10626187 9 * that the following conditions are met:
AnnaBridge 161:aa5281ff4a02 10 *
AnnaBridge 161:aa5281ff4a02 11 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 161:aa5281ff4a02 12 * of conditions and the following disclaimer.
AnnaBridge 161:aa5281ff4a02 13 *
AnnaBridge 161:aa5281ff4a02 14 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 161:aa5281ff4a02 15 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 161:aa5281ff4a02 16 * other materials provided with the distribution.
AnnaBridge 161:aa5281ff4a02 17 *
AnnaBridge 161:aa5281ff4a02 18 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 161:aa5281ff4a02 19 * contributors may be used to endorse or promote products derived from this
AnnaBridge 161:aa5281ff4a02 20 * software without specific prior written permission.
AnnaBridge 161:aa5281ff4a02 21 *
AnnaBridge 170:e95d10626187 22 * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
AnnaBridge 161:aa5281ff4a02 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 161:aa5281ff4a02 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 161:aa5281ff4a02 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 161:aa5281ff4a02 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 161:aa5281ff4a02 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 161:aa5281ff4a02 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 161:aa5281ff4a02 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 161:aa5281ff4a02 30 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 161:aa5281ff4a02 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 161:aa5281ff4a02 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 161:aa5281ff4a02 33 */
AnnaBridge 161:aa5281ff4a02 34
AnnaBridge 161:aa5281ff4a02 35 #ifndef _FSL_ADC_ETC_H_
AnnaBridge 161:aa5281ff4a02 36 #define _FSL_ADC_ETC_H_
AnnaBridge 161:aa5281ff4a02 37
AnnaBridge 161:aa5281ff4a02 38 #include "fsl_common.h"
AnnaBridge 161:aa5281ff4a02 39
AnnaBridge 161:aa5281ff4a02 40 /*!
AnnaBridge 161:aa5281ff4a02 41 * @addtogroup adc_etc
AnnaBridge 161:aa5281ff4a02 42 * @{
AnnaBridge 161:aa5281ff4a02 43 */
AnnaBridge 161:aa5281ff4a02 44
AnnaBridge 161:aa5281ff4a02 45 /*******************************************************************************
AnnaBridge 161:aa5281ff4a02 46 * Definitions
AnnaBridge 161:aa5281ff4a02 47 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 48 /*! @brief ADC_ETC driver version */
AnnaBridge 161:aa5281ff4a02 49 #define FSL_ADC_ETC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
AnnaBridge 161:aa5281ff4a02 50 /*! @brief The mask of status flags cleared by writing 1. */
AnnaBridge 161:aa5281ff4a02 51 #define ADC_ETC_DMA_CTRL_TRGn_REQ_MASK 0xFF0000U
AnnaBridge 161:aa5281ff4a02 52
AnnaBridge 161:aa5281ff4a02 53 /*!
AnnaBridge 161:aa5281ff4a02 54 * @brief ADC_ETC customized status flags mask.
AnnaBridge 161:aa5281ff4a02 55 */
AnnaBridge 161:aa5281ff4a02 56 enum _adc_etc_status_flag_mask
AnnaBridge 161:aa5281ff4a02 57 {
AnnaBridge 161:aa5281ff4a02 58 kADC_ETC_Done0StatusFlagMask = 1U,
AnnaBridge 161:aa5281ff4a02 59 kADC_ETC_Done1StatusFlagMask = 2U,
AnnaBridge 161:aa5281ff4a02 60 kADC_ETC_Done2StatusFlagMask = 4U,
AnnaBridge 161:aa5281ff4a02 61 kADC_ETC_ErrorStatusFlagMask = 8U,
AnnaBridge 161:aa5281ff4a02 62 };
AnnaBridge 161:aa5281ff4a02 63
AnnaBridge 161:aa5281ff4a02 64 /*!
AnnaBridge 161:aa5281ff4a02 65 * @brief External triggers sources.
AnnaBridge 161:aa5281ff4a02 66 */
AnnaBridge 161:aa5281ff4a02 67 typedef enum _adc_etc_external_trigger_source
AnnaBridge 161:aa5281ff4a02 68 {
AnnaBridge 161:aa5281ff4a02 69 /* External XBAR sources. Support HW or SW mode. */
AnnaBridge 161:aa5281ff4a02 70 kADC_ETC_Trg0TriggerSource = 0U, /* External XBAR trigger0 source. */
AnnaBridge 161:aa5281ff4a02 71 kADC_ETC_Trg1TriggerSource = 1U, /* External XBAR trigger1 source. */
AnnaBridge 161:aa5281ff4a02 72 kADC_ETC_Trg2TriggerSource = 2U, /* External XBAR trigger2 source. */
AnnaBridge 161:aa5281ff4a02 73 kADC_ETC_Trg3TriggerSource = 3U, /* External XBAR trigger3 source. */
AnnaBridge 161:aa5281ff4a02 74 kADC_ETC_Trg4TriggerSource = 4U, /* External XBAR trigger4 source. */
AnnaBridge 161:aa5281ff4a02 75 kADC_ETC_Trg5TriggerSource = 5U, /* External XBAR trigger5 source. */
AnnaBridge 161:aa5281ff4a02 76 kADC_ETC_Trg6TriggerSource = 6U, /* External XBAR trigger6 source. */
AnnaBridge 161:aa5281ff4a02 77 kADC_ETC_Trg7TriggerSource = 7U, /* External XBAR trigger7 source. */
AnnaBridge 161:aa5281ff4a02 78 /* External TSC sources. Only support HW mode. */
AnnaBridge 161:aa5281ff4a02 79 kADC_ETC_TSC0TriggerSource = 8U, /* External TSC trigger0 source. */
AnnaBridge 161:aa5281ff4a02 80 kADC_ETC_TSC1TriggerSource = 9U, /* External TSC trigger1 source. */
AnnaBridge 161:aa5281ff4a02 81 } adc_etc_external_trigger_source_t;
AnnaBridge 161:aa5281ff4a02 82
AnnaBridge 161:aa5281ff4a02 83 /*!
AnnaBridge 161:aa5281ff4a02 84 * @brief Interrupt enable/disable mask.
AnnaBridge 161:aa5281ff4a02 85 */
AnnaBridge 161:aa5281ff4a02 86 typedef enum _adc_etc_interrupt_enable
AnnaBridge 161:aa5281ff4a02 87 {
AnnaBridge 161:aa5281ff4a02 88 kADC_ETC_InterruptDisable = 0U, /* Disable the ADC_ETC interrupt. */
AnnaBridge 161:aa5281ff4a02 89 kADC_ETC_Done0InterruptEnable = 1U, /* Enable the DONE0 interrupt when ADC conversions complete. */
AnnaBridge 161:aa5281ff4a02 90 kADC_ETC_Done1InterruptEnable = 2U, /* Enable the DONE1 interrupt when ADC conversions complete. */
AnnaBridge 161:aa5281ff4a02 91 kADC_ETC_Done2InterruptEnable = 3U, /* Enable the DONE2 interrupt when ADC conversions complete. */
AnnaBridge 161:aa5281ff4a02 92 } adc_etc_interrupt_enable_t;
AnnaBridge 161:aa5281ff4a02 93
AnnaBridge 170:e95d10626187 94 #if defined(FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL) && FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL
AnnaBridge 170:e95d10626187 95 /*!
AnnaBridge 170:e95d10626187 96 * @brief DMA mode selection.
AnnaBridge 170:e95d10626187 97 */
AnnaBridge 170:e95d10626187 98 typedef enum _adc_etc_dma_mode_selection
AnnaBridge 170:e95d10626187 99 {
AnnaBridge 170:e95d10626187 100 kADC_ETC_TrigDMAWithLatchedSignal = 0U, /* Trig DMA_REQ with latched signal, REQ will be cleared when ACK and source request cleared. */
AnnaBridge 170:e95d10626187 101 kADC_ETC_TrigDMAWithPulsedSignal = 1U, /* Trig DMA_REQ with pulsed signal, REQ will be cleared by ACK only. */
AnnaBridge 170:e95d10626187 102 } adc_etc_dma_mode_selection_t;
AnnaBridge 170:e95d10626187 103 #endif /*FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL*/
AnnaBridge 170:e95d10626187 104
AnnaBridge 161:aa5281ff4a02 105 /*!
AnnaBridge 161:aa5281ff4a02 106 * @brief ADC_ETC configuration.
AnnaBridge 161:aa5281ff4a02 107 */
AnnaBridge 161:aa5281ff4a02 108 typedef struct _adc_etc_config
AnnaBridge 161:aa5281ff4a02 109 {
AnnaBridge 161:aa5281ff4a02 110 bool enableTSCBypass; /* If bypass TSC, TSC would trigger ADC directly.
AnnaBridge 161:aa5281ff4a02 111 Otherwise TSC would trigger ADC through ADC_ETC. */
AnnaBridge 161:aa5281ff4a02 112 bool enableTSC0Trigger; /* Enable external TSC0 trigger. It is valid when enableTSCBypass = false. */
AnnaBridge 161:aa5281ff4a02 113 bool enableTSC1Trigger; /* Enable external TSC1 trigger. It is valid when enableTSCBypass = false.*/
AnnaBridge 170:e95d10626187 114 #if defined(FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL) && FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL
AnnaBridge 170:e95d10626187 115 adc_etc_dma_mode_selection_t dmaMode; /* Select the ADC_ETC DMA mode. */
AnnaBridge 170:e95d10626187 116 #endif /*FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL*/
AnnaBridge 161:aa5281ff4a02 117 uint32_t TSC0triggerPriority; /* External TSC0 trigger priority, 7 is highest, 0 is lowest. */
AnnaBridge 161:aa5281ff4a02 118 uint32_t TSC1triggerPriority; /* External TSC1 trigger priority, 7 is highest, 0 is lowest. */
AnnaBridge 161:aa5281ff4a02 119 uint32_t clockPreDivider; /* Pre-divider for trig delay and interval. Available range is 0-255.
AnnaBridge 161:aa5281ff4a02 120 Clock would be divided by (clockPreDivider+1). */
AnnaBridge 161:aa5281ff4a02 121 uint32_t XBARtriggerMask; /* Enable the corresponding trigger source. Available range is trigger0:0x01 to
AnnaBridge 161:aa5281ff4a02 122 trigger7:0x80
AnnaBridge 161:aa5281ff4a02 123 For example, XBARtriggerMask = 0x7U, which means trigger0, trigger1 and trigger2 is
AnnaBridge 161:aa5281ff4a02 124 enabled. */
AnnaBridge 161:aa5281ff4a02 125 } adc_etc_config_t;
AnnaBridge 161:aa5281ff4a02 126
AnnaBridge 161:aa5281ff4a02 127 /*!
AnnaBridge 161:aa5281ff4a02 128 * @brief ADC_ETC trigger chain configuration.
AnnaBridge 161:aa5281ff4a02 129 */
AnnaBridge 161:aa5281ff4a02 130 typedef struct _adc_etc_trigger_chain_config
AnnaBridge 161:aa5281ff4a02 131 {
AnnaBridge 161:aa5281ff4a02 132 bool enableB2BMode; /* Enable ADC_ETC BackToBack mode. when not enabled B2B mode,
AnnaBridge 161:aa5281ff4a02 133 wait until interval delay is reached. */
AnnaBridge 161:aa5281ff4a02 134 uint32_t ADCHCRegisterSelect; /* Select relevant ADC_HCx register to trigger. 1U : HC0, 2U: HC1, 4U: HC2 ... */
AnnaBridge 161:aa5281ff4a02 135 uint32_t ADCChannelSelect; /* Select ADC sample channel. */
AnnaBridge 161:aa5281ff4a02 136 adc_etc_interrupt_enable_t InterruptEnable; /* Enable/disable Interrupt. */
AnnaBridge 161:aa5281ff4a02 137 } adc_etc_trigger_chain_config_t;
AnnaBridge 161:aa5281ff4a02 138
AnnaBridge 161:aa5281ff4a02 139 /*!
AnnaBridge 161:aa5281ff4a02 140 * @brief ADC_ETC trigger configuration.
AnnaBridge 161:aa5281ff4a02 141 */
AnnaBridge 161:aa5281ff4a02 142 typedef struct _adc_etc_trigger_config
AnnaBridge 161:aa5281ff4a02 143 {
AnnaBridge 161:aa5281ff4a02 144 bool enableSyncMode; /* Enable the sync Mode, In SyncMode ADC1 and ADC2 are controlled by the same trigger source.
AnnaBridge 161:aa5281ff4a02 145 In AsyncMode ADC1 and ADC2 are controlled by separate trigger source. */
AnnaBridge 161:aa5281ff4a02 146 bool enableSWTriggerMode; /* Enable the sofware trigger mode. */
AnnaBridge 161:aa5281ff4a02 147 uint32_t triggerChainLength; /* TRIG chain length to the ADC. 0: Trig length is 1. ... 7: Trig length is 8. */
AnnaBridge 161:aa5281ff4a02 148 uint32_t triggerPriority; /* External trigger priority, 7 is highest, 0 is lowest. */
AnnaBridge 161:aa5281ff4a02 149 uint32_t sampleIntervalDelay; /* Set sampling interval delay. */
AnnaBridge 161:aa5281ff4a02 150 uint32_t initialDelay; /* Set trigger initial delay. */
AnnaBridge 161:aa5281ff4a02 151 } adc_etc_trigger_config_t;
AnnaBridge 161:aa5281ff4a02 152
AnnaBridge 161:aa5281ff4a02 153 /*******************************************************************************
AnnaBridge 161:aa5281ff4a02 154 * API
AnnaBridge 161:aa5281ff4a02 155 ******************************************************************************/
AnnaBridge 161:aa5281ff4a02 156 #if defined(__cplusplus)
AnnaBridge 161:aa5281ff4a02 157 extern "C" {
AnnaBridge 161:aa5281ff4a02 158 #endif
AnnaBridge 161:aa5281ff4a02 159
AnnaBridge 161:aa5281ff4a02 160 /*!
AnnaBridge 161:aa5281ff4a02 161 * @name Initialization
AnnaBridge 161:aa5281ff4a02 162 * @{
AnnaBridge 161:aa5281ff4a02 163 */
AnnaBridge 161:aa5281ff4a02 164
AnnaBridge 161:aa5281ff4a02 165 /*!
AnnaBridge 161:aa5281ff4a02 166 * @brief Initialize the ADC_ETC module.
AnnaBridge 161:aa5281ff4a02 167 *
AnnaBridge 161:aa5281ff4a02 168 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 169 * @param config Pointer to "adc_etc_config_t" structure.
AnnaBridge 161:aa5281ff4a02 170 */
AnnaBridge 161:aa5281ff4a02 171 void ADC_ETC_Init(ADC_ETC_Type *base, const adc_etc_config_t *config);
AnnaBridge 161:aa5281ff4a02 172
AnnaBridge 161:aa5281ff4a02 173 /*!
AnnaBridge 161:aa5281ff4a02 174 * @brief De-Initialize the ADC_ETC module.
AnnaBridge 161:aa5281ff4a02 175 *
AnnaBridge 161:aa5281ff4a02 176 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 177 */
AnnaBridge 161:aa5281ff4a02 178 void ADC_ETC_Deinit(ADC_ETC_Type *base);
AnnaBridge 161:aa5281ff4a02 179
AnnaBridge 161:aa5281ff4a02 180 /*!
AnnaBridge 161:aa5281ff4a02 181 * @brief Gets an available pre-defined settings for the ADC_ETC's configuration.
AnnaBridge 161:aa5281ff4a02 182 * This function initializes the ADC_ETC's configuration structure with available settings. The default values are:
AnnaBridge 161:aa5281ff4a02 183 * @code
AnnaBridge 161:aa5281ff4a02 184 * config->enableTSCBypass = true;
AnnaBridge 161:aa5281ff4a02 185 * config->enableTSC0Trigger = false;
AnnaBridge 161:aa5281ff4a02 186 * config->enableTSC1Trigger = false;
AnnaBridge 161:aa5281ff4a02 187 * config->TSC0triggerPriority = 0U;
AnnaBridge 161:aa5281ff4a02 188 * config->TSC1triggerPriority = 0U;
AnnaBridge 161:aa5281ff4a02 189 * config->clockPreDivider = 0U;
AnnaBridge 161:aa5281ff4a02 190 * config->XBARtriggerMask = 0U;
AnnaBridge 161:aa5281ff4a02 191 * @endCode
AnnaBridge 161:aa5281ff4a02 192 *
AnnaBridge 161:aa5281ff4a02 193 * @param config Pointer to "adc_etc_config_t" structure.
AnnaBridge 161:aa5281ff4a02 194 */
AnnaBridge 161:aa5281ff4a02 195 void ADC_ETC_GetDefaultConfig(adc_etc_config_t *config);
AnnaBridge 161:aa5281ff4a02 196
AnnaBridge 161:aa5281ff4a02 197 /*!
AnnaBridge 161:aa5281ff4a02 198 * @brief Set the external XBAR trigger configuration.
AnnaBridge 161:aa5281ff4a02 199 *
AnnaBridge 161:aa5281ff4a02 200 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 201 * @param triggerGroup Trigger group index.
AnnaBridge 161:aa5281ff4a02 202 * @param config Pointer to "adc_etc_trigger_config_t" structure.
AnnaBridge 161:aa5281ff4a02 203 */
AnnaBridge 161:aa5281ff4a02 204 void ADC_ETC_SetTriggerConfig(ADC_ETC_Type *base, uint32_t triggerGroup, const adc_etc_trigger_config_t *config);
AnnaBridge 161:aa5281ff4a02 205
AnnaBridge 161:aa5281ff4a02 206 /*!
AnnaBridge 161:aa5281ff4a02 207 * @brief Set the external XBAR trigger chain configuration.
AnnaBridge 161:aa5281ff4a02 208 * For example, if triggerGroup is set to 0U and chainGroup is set to 1U, which means Trigger0 source's chain1 would be
AnnaBridge 161:aa5281ff4a02 209 * configurated.
AnnaBridge 161:aa5281ff4a02 210 *
AnnaBridge 161:aa5281ff4a02 211 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 212 * @param triggerGroup Trigger group index. Available number is 0~7.
AnnaBridge 161:aa5281ff4a02 213 * @param chainGroup Trigger chain group index. Available number is 0~7.
AnnaBridge 161:aa5281ff4a02 214 * @param config Pointer to "adc_etc_trigger_chain_config_t" structure.
AnnaBridge 161:aa5281ff4a02 215 */
AnnaBridge 161:aa5281ff4a02 216 void ADC_ETC_SetTriggerChainConfig(ADC_ETC_Type *base,
AnnaBridge 161:aa5281ff4a02 217 uint32_t triggerGroup,
AnnaBridge 161:aa5281ff4a02 218 uint32_t chainGroup,
AnnaBridge 161:aa5281ff4a02 219 const adc_etc_trigger_chain_config_t *config);
AnnaBridge 161:aa5281ff4a02 220
AnnaBridge 161:aa5281ff4a02 221 /*!
AnnaBridge 161:aa5281ff4a02 222 * @brief Gets the interrupt status flags of external XBAR and TSC triggers.
AnnaBridge 161:aa5281ff4a02 223 *
AnnaBridge 161:aa5281ff4a02 224 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 225 * @param sourceIndex trigger source index.
AnnaBridge 161:aa5281ff4a02 226 *
AnnaBridge 161:aa5281ff4a02 227 * @return Status flags mask of trigger. Refer to "_adc_etc_status_flag_mask".
AnnaBridge 161:aa5281ff4a02 228 */
AnnaBridge 161:aa5281ff4a02 229 uint32_t ADC_ETC_GetInterruptStatusFlags(ADC_ETC_Type *base, adc_etc_external_trigger_source_t sourceIndex);
AnnaBridge 161:aa5281ff4a02 230
AnnaBridge 161:aa5281ff4a02 231 /*!
AnnaBridge 161:aa5281ff4a02 232 * @brief Clears the ADC_ETC's interrupt status falgs.
AnnaBridge 161:aa5281ff4a02 233 *
AnnaBridge 161:aa5281ff4a02 234 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 235 * @param sourceIndex trigger source index.
AnnaBridge 161:aa5281ff4a02 236 * @param mask Status flags mask of trigger. Refer to "_adc_etc_status_flag_mask".
AnnaBridge 161:aa5281ff4a02 237 */
AnnaBridge 161:aa5281ff4a02 238 void ADC_ETC_ClearInterruptStatusFlags(ADC_ETC_Type *base,
AnnaBridge 161:aa5281ff4a02 239 adc_etc_external_trigger_source_t sourceIndex,
AnnaBridge 161:aa5281ff4a02 240 uint32_t mask);
AnnaBridge 161:aa5281ff4a02 241
AnnaBridge 161:aa5281ff4a02 242 /*!
AnnaBridge 161:aa5281ff4a02 243 * @brief Enable the DMA corresponding to each trigger source.
AnnaBridge 161:aa5281ff4a02 244 *
AnnaBridge 161:aa5281ff4a02 245 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 246 * @param triggerGroup Trigger group index. Available number is 0~7.
AnnaBridge 161:aa5281ff4a02 247 */
AnnaBridge 161:aa5281ff4a02 248 static inline void ADC_ETC_EnableDMA(ADC_ETC_Type *base, uint32_t triggerGroup)
AnnaBridge 161:aa5281ff4a02 249 {
AnnaBridge 161:aa5281ff4a02 250 /* Avoid clearing status flags at the same time. */
AnnaBridge 161:aa5281ff4a02 251 base->DMA_CTRL =
AnnaBridge 161:aa5281ff4a02 252 (base->DMA_CTRL | (ADC_ETC_DMA_CTRL_TRIG0_ENABLE_MASK << triggerGroup)) & ~ADC_ETC_DMA_CTRL_TRGn_REQ_MASK;
AnnaBridge 161:aa5281ff4a02 253 }
AnnaBridge 161:aa5281ff4a02 254
AnnaBridge 161:aa5281ff4a02 255 /*!
AnnaBridge 161:aa5281ff4a02 256 * @brief Disable the DMA corresponding to each trigger sources.
AnnaBridge 161:aa5281ff4a02 257 *
AnnaBridge 161:aa5281ff4a02 258 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 259 * @param triggerGroup Trigger group index. Available number is 0~7.
AnnaBridge 161:aa5281ff4a02 260 */
AnnaBridge 161:aa5281ff4a02 261 static inline void ADC_ETC_DisableDMA(ADC_ETC_Type *base, uint32_t triggerGroup)
AnnaBridge 161:aa5281ff4a02 262 {
AnnaBridge 161:aa5281ff4a02 263 /* Avoid clearing status flags at the same time. */
AnnaBridge 161:aa5281ff4a02 264 base->DMA_CTRL =
AnnaBridge 161:aa5281ff4a02 265 (base->DMA_CTRL & ~(ADC_ETC_DMA_CTRL_TRIG0_ENABLE_MASK << triggerGroup)) & ~ADC_ETC_DMA_CTRL_TRGn_REQ_MASK;
AnnaBridge 161:aa5281ff4a02 266 }
AnnaBridge 161:aa5281ff4a02 267
AnnaBridge 161:aa5281ff4a02 268 /*!
AnnaBridge 161:aa5281ff4a02 269 * @brief Get the DMA request status falgs. Only external XBAR sources support DMA request.
AnnaBridge 161:aa5281ff4a02 270 *
AnnaBridge 161:aa5281ff4a02 271 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 272 * @return Mask of external XBAR tirgger's DMA request asserted flags. Available range is trigger0:0x01 to
AnnaBridge 161:aa5281ff4a02 273 * trigger7:0x80.
AnnaBridge 161:aa5281ff4a02 274 */
AnnaBridge 161:aa5281ff4a02 275 static inline uint32_t ADC_ETC_GetDMAStatusFlags(ADC_ETC_Type *base)
AnnaBridge 161:aa5281ff4a02 276 {
AnnaBridge 161:aa5281ff4a02 277 return (((base->DMA_CTRL) & ADC_ETC_DMA_CTRL_TRGn_REQ_MASK) >> ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT);
AnnaBridge 161:aa5281ff4a02 278 }
AnnaBridge 161:aa5281ff4a02 279
AnnaBridge 161:aa5281ff4a02 280 /*!
AnnaBridge 161:aa5281ff4a02 281 * @brief Clear the DMA request status falgs. Only external XBAR sources support DMA request.
AnnaBridge 161:aa5281ff4a02 282 *
AnnaBridge 161:aa5281ff4a02 283 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 284 * @param mask Mask of external XBAR tirgger's DMA request asserted flags. Available range is trigger0:0x01 to
AnnaBridge 161:aa5281ff4a02 285 * trigger7:0x80.
AnnaBridge 161:aa5281ff4a02 286 */
AnnaBridge 161:aa5281ff4a02 287 static inline void ADC_ETC_ClearDMAStatusFlags(ADC_ETC_Type *base, uint32_t mask)
AnnaBridge 161:aa5281ff4a02 288 {
AnnaBridge 161:aa5281ff4a02 289 base->DMA_CTRL = ((base->DMA_CTRL) & ~ADC_ETC_DMA_CTRL_TRGn_REQ_MASK) | (mask << ADC_ETC_DMA_CTRL_TRIG0_REQ_SHIFT);
AnnaBridge 161:aa5281ff4a02 290 }
AnnaBridge 161:aa5281ff4a02 291
AnnaBridge 161:aa5281ff4a02 292 /*!
AnnaBridge 161:aa5281ff4a02 293 * @brief When enable ,all logical will be reset.
AnnaBridge 161:aa5281ff4a02 294 *
AnnaBridge 161:aa5281ff4a02 295 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 296 * @param enable Enable/Disable the software reset.
AnnaBridge 161:aa5281ff4a02 297 */
AnnaBridge 161:aa5281ff4a02 298 static inline void ADC_ETC_DoSoftwareReset(ADC_ETC_Type *base, bool enable)
AnnaBridge 161:aa5281ff4a02 299 {
AnnaBridge 161:aa5281ff4a02 300 if (enable)
AnnaBridge 161:aa5281ff4a02 301 {
AnnaBridge 161:aa5281ff4a02 302 base->CTRL |= ADC_ETC_CTRL_SOFTRST_MASK;
AnnaBridge 161:aa5281ff4a02 303 }
AnnaBridge 161:aa5281ff4a02 304 else
AnnaBridge 161:aa5281ff4a02 305 {
AnnaBridge 161:aa5281ff4a02 306 base->CTRL &= ~ADC_ETC_CTRL_SOFTRST_MASK;
AnnaBridge 161:aa5281ff4a02 307 }
AnnaBridge 161:aa5281ff4a02 308 }
AnnaBridge 161:aa5281ff4a02 309
AnnaBridge 161:aa5281ff4a02 310 /*!
AnnaBridge 161:aa5281ff4a02 311 * @brief Do software trigger corresponding to each XBAR trigger sources.
AnnaBridge 161:aa5281ff4a02 312 * Each XBAR trigger sources can be configured as HW or SW trigger mode. In hardware trigger mode,
AnnaBridge 161:aa5281ff4a02 313 * trigger source is from XBAR. In software mode, trigger source is from software tigger. TSC trigger sources
AnnaBridge 161:aa5281ff4a02 314 * can only work in hardware trigger mode.
AnnaBridge 161:aa5281ff4a02 315 *
AnnaBridge 161:aa5281ff4a02 316 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 317 * @param triggerGroup Trigger group index. Available number is 0~7.
AnnaBridge 161:aa5281ff4a02 318 */
AnnaBridge 161:aa5281ff4a02 319 static inline void ADC_ETC_DoSoftwareTrigger(ADC_ETC_Type *base, uint32_t triggerGroup)
AnnaBridge 161:aa5281ff4a02 320 {
AnnaBridge 161:aa5281ff4a02 321 assert(triggerGroup < ADC_ETC_TRIGn_CTRL_COUNT);
AnnaBridge 161:aa5281ff4a02 322
AnnaBridge 161:aa5281ff4a02 323 base->TRIG[triggerGroup].TRIGn_CTRL |= ADC_ETC_TRIGn_CTRL_SW_TRIG_MASK;
AnnaBridge 161:aa5281ff4a02 324 }
AnnaBridge 161:aa5281ff4a02 325
AnnaBridge 161:aa5281ff4a02 326 /*!
AnnaBridge 161:aa5281ff4a02 327 * @brief Get ADC conversion result from external XBAR sources.
AnnaBridge 161:aa5281ff4a02 328 * For example, if triggerGroup is set to 0U and chainGroup is set to 1U, which means the API would
AnnaBridge 161:aa5281ff4a02 329 * return Trigger0 source's chain1 conversion result.
AnnaBridge 161:aa5281ff4a02 330 *
AnnaBridge 161:aa5281ff4a02 331 * @param base ADC_ETC peripheral base address.
AnnaBridge 161:aa5281ff4a02 332 * @param triggerGroup Trigger group index. Available number is 0~7.
AnnaBridge 161:aa5281ff4a02 333 * @param chainGroup Trigger chain group index. Available number is 0~7.
AnnaBridge 161:aa5281ff4a02 334 * @return ADC conversion result value.
AnnaBridge 161:aa5281ff4a02 335 */
AnnaBridge 161:aa5281ff4a02 336 uint32_t ADC_ETC_GetADCConversionValue(ADC_ETC_Type *base, uint32_t triggerGroup, uint32_t chainGroup);
AnnaBridge 161:aa5281ff4a02 337
AnnaBridge 161:aa5281ff4a02 338 #if defined(__cplusplus)
AnnaBridge 161:aa5281ff4a02 339 }
AnnaBridge 161:aa5281ff4a02 340 #endif
AnnaBridge 161:aa5281ff4a02 341
AnnaBridge 161:aa5281ff4a02 342 #endif /* _FSL_ADC_ETC_H_ */